- status: 0 - openlane design prep
  runtime_s: 1.75
  runtime_ts: 0h0m1s750ms
- status: 1 - synthesis - yosys
  runtime_s: 1.19
  runtime_ts: 0h0m1s187ms
- status: 2 - sta - openroad
  runtime_s: 0.45
  runtime_ts: 0h0m0s446ms
- status: 3 - floorplan initialization - openroad
  runtime_s: 0.54
  runtime_ts: 0h0m0s539ms
- status: 4 - io_place - openlane
  runtime_s: 0.3
  runtime_ts: 0h0m0s299ms
- status: 5 - tap/decap insertion - openroad
  runtime_s: 0.42
  runtime_ts: 0h0m0s422ms
- status: 6 - pdn generation - openroad
  runtime_s: 0.44
  runtime_ts: 0h0m0s437ms
- status: 7 - random global placement - openlane
  runtime_s: 0.31
  runtime_ts: 0h0m0s306ms
- status: 8 - detailed placement - openroad
  runtime_s: 0.47
  runtime_ts: 0h0m0s466ms
- status: 9 - detailed placement - openroad
  runtime_s: 0.46
  runtime_ts: 0h0m0s463ms
- status: 11 - write verilog - openroad
  runtime_s: 0.39
  runtime_ts: 0h0m0s392ms
- status: 11 - global routing - openroad
  runtime_s: 0.49
  runtime_ts: 0h0m0s492ms
- status: 12 - fill insertion - openroad
  runtime_s: 0.46
  runtime_ts: 0h0m0s464ms
- status: 13 - detailed_routing - openroad
  runtime_s: 0.73
  runtime_ts: 0h0m0s726ms
- status: 14 - wire lengths - openlane
  runtime_s: 0.25
  runtime_ts: 0h0m0s251ms
- status: 15 - parasitics extraction - openroad
  runtime_s: 0.44
  runtime_ts: 0h0m0s441ms
- status: 16 - sta - openroad
  runtime_s: 1.49
  runtime_ts: 0h0m1s492ms
- status: 17 - parasitics extraction - openroad
  runtime_s: 0.43
  runtime_ts: 0h0m0s429ms
- status: 18 - sta - openroad
  runtime_s: 1.5
  runtime_ts: 0h0m1s499ms
- status: 19 - parasitics extraction - openroad
  runtime_s: 0.43
  runtime_ts: 0h0m0s428ms
- status: 20 - sta - openroad
  runtime_s: 1.51
  runtime_ts: 0h0m1s510ms
- status: 21 - sta - openroad
  runtime_s: 0.38
  runtime_ts: 0h0m0s377ms
- status: 22 - ir drop report - openroad
  runtime_s: 0.41
  runtime_ts: 0h0m0s413ms
- status: 23 - gdsii - magic
  runtime_s: 1.3
  runtime_ts: 0h0m1s296ms
- status: 24 - gdsii - klayout
  runtime_s: 0.42
  runtime_ts: 0h0m0s421ms
- status: 25 - xor - klayout
  runtime_s: 0.33
  runtime_ts: 0h0m0s334ms
- status: 26 - spice extraction - magic
  runtime_s: 0.37
  runtime_ts: 0h0m0s370ms
- status: 28 - write verilog - openroad
  runtime_s: 0.4
  runtime_ts: 0h0m0s403ms
- status: 28 - write powered verilog - openlane
  runtime_s: 0.51
  runtime_ts: 0h0m0s514ms
- status: 29 - lvs - netgen
  runtime_s: 0.09
  runtime_ts: 0h0m0s93ms
- status: 30 - drc - magic
  runtime_s: 1.05
  runtime_ts: 0h0m1s52ms
- status: 31 - antenna check - openroad
  runtime_s: 0.45
  runtime_ts: 0h0m0s453ms
- status: 32 - erc - circuit validity checker
  runtime_s: 0.13
  runtime_ts: 0h0m0s131ms
---
- status: routed
  runtime_s: 11.0
  runtime_ts: 0h0m11s0ms
- status: flow completed
  runtime_s: 26.0
  runtime_ts: 0h0m26s0ms