- status: 0 - openlane design prep
  runtime_s: 1.79
  runtime_ts: 0h0m1s786ms
- status: 1 - synthesis - yosys
  runtime_s: 44.16
  runtime_ts: 0h0m44s164ms
- status: 2 - sta - openroad
  runtime_s: 0.94
  runtime_ts: 0h0m0s937ms
- status: 3 - floorplan initialization - openroad
  runtime_s: 0.62
  runtime_ts: 0h0m0s618ms
- status: 4 - io_place - openlane
  runtime_s: 0.42
  runtime_ts: 0h0m0s418ms
- status: 5 - tap/decap insertion - openroad
  runtime_s: 0.5
  runtime_ts: 0h0m0s499ms
- status: 6 - pdn generation - openroad
  runtime_s: 0.75
  runtime_ts: 0h0m0s750ms
- status: 7 - global placement - openroad
  runtime_s: 14.1
  runtime_ts: 0h0m14s102ms
- status: 8 - resizer design optimizations - openroad
  runtime_s: 2.43
  runtime_ts: 0h0m2s426ms
- status: 9 - detailed placement - openroad
  runtime_s: 0.68
  runtime_ts: 0h0m0s678ms
- status: 10 - cts - openroad
  runtime_s: 27.91
  runtime_ts: 0h0m27s910ms
- status: 11 - resizer timing optimizations - openroad
  runtime_s: 5.86
  runtime_ts: 0h0m5s857ms
- status: 12 - resizer timing optimizations - openroad
  runtime_s: 41.94
  runtime_ts: 0h0m41s942ms
- status: 13 - detailed placement - openroad
  runtime_s: 0.76
  runtime_ts: 0h0m0s757ms
- status: 15 - write verilog - openroad
  runtime_s: 0.53
  runtime_ts: 0h0m0s528ms
- status: 15 - global routing - openroad
  runtime_s: 0.63
  runtime_ts: 0h0m0s633ms
- status: 16 - fill insertion - openroad
  runtime_s: 0.84
  runtime_ts: 0h0m0s839ms
- status: 17 - detailed_routing - openroad
  runtime_s: 260.09
  runtime_ts: 0h4m20s88ms
- status: 18 - wire lengths - openlane
  runtime_s: 0.68
  runtime_ts: 0h0m0s678ms
- status: 19 - parasitics extraction - openroad
  runtime_s: 4.69
  runtime_ts: 0h0m4s689ms
- status: 20 - sta - openroad
  runtime_s: 42.32
  runtime_ts: 0h0m42s317ms
- status: 21 - parasitics extraction - openroad
  runtime_s: 4.56
  runtime_ts: 0h0m4s559ms
- status: 22 - sta - openroad
  runtime_s: 43.94
  runtime_ts: 0h0m43s944ms
- status: 23 - parasitics extraction - openroad
  runtime_s: 4.53
  runtime_ts: 0h0m4s528ms
- status: 24 - sta - openroad
  runtime_s: 42.63
  runtime_ts: 0h0m42s625ms
- status: 25 - sta - openroad
  runtime_s: 7.98
  runtime_ts: 0h0m7s976ms
- status: 26 - ir drop report - openroad
  runtime_s: 1.3
  runtime_ts: 0h0m1s300ms
- status: 27 - gdsii - magic
  runtime_s: 22.78
  runtime_ts: 0h0m22s778ms
- status: 28 - spice extraction - magic
  runtime_s: 39.47
  runtime_ts: 0h0m39s466ms
- status: 30 - write verilog - openroad
  runtime_s: 0.64
  runtime_ts: 0h0m0s642ms
- status: 30 - write powered verilog - openlane
  runtime_s: 0.76
  runtime_ts: 0h0m0s758ms
- status: 31 - lvs - netgen
  runtime_s: 1.63
  runtime_ts: 0h0m1s631ms
- status: 32 - drc - magic
  runtime_s: 93.29
  runtime_ts: 0h1m33s290ms
- status: 33 - antenna check - openroad
  runtime_s: 1.48
  runtime_ts: 0h0m1s480ms
- status: 34 - erc - circuit validity checker
  runtime_s: 0.33
  runtime_ts: 0h0m0s331ms
---
- status: routed
  runtime_s: 413.0
  runtime_ts: 0h6m53s0ms
- status: flow completed
  runtime_s: 728.0
  runtime_ts: 0h12m8s0ms