CVC: Circuit Validation Check Version 1.1.0 CVC: Log output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_47/reports/signoff/digital_pll.rpt CVC: Error output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_47/reports/signoff/digital_pll.rpt.error.gz CVC: Debug output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_47/reports/signoff/digital_pll.rpt.debug.gz CVC: Start: Thu Oct 13 13:49:17 2022 Using the following parameters for CVC (Circuit Validation Check) from /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/cvcrc CVC_TOP = 'digital_pll' CVC_NETLIST = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_47/tmp/signoff/digital_pll.cdl' CVC_MODE = 'digital_pll' CVC_MODEL_FILE = '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/models' CVC_POWER_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_47/tmp/signoff/digital_pll.power' CVC_FUSE_FILE = '' CVC_REPORT_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_47/reports/signoff/digital_pll.rpt' CVC_REPORT_TITLE = 'CVC $CVC_TOP' CVC_CIRCUIT_ERROR_LIMIT = '100' CVC_SEARCH_LIMIT = '100' CVC_LEAK_LIMIT = '0.0002' CVC_SOI = 'false' CVC_SCRC = 'false' CVC_VTH_GATES = 'false' CVC_MIN_VTH_GATES = 'false' CVC_IGNORE_VTH_FLOATING = 'false' CVC_IGNORE_NO_LEAK_FLOATING = 'false' CVC_LEAK_OVERVOLTAGE = 'true' CVC_LOGIC_DIODES = 'false' CVC_ANALOG_GATES = 'true' CVC_BACKUP_RESULTS = 'false' CVC_MOS_DIODE_ERROR_THRESHOLD = '0' CVC_SHORT_ERROR_THRESHOLD = '0' CVC_BIAS_ERROR_THRESHOLD = '0' CVC_FORWARD_ERROR_THRESHOLD = '0' CVC_FLOATING_ERROR_THRESHOLD = '0' CVC_GATE_ERROR_THRESHOLD = '0' CVC_LEAK?_ERROR_THRESHOLD = '0' CVC_EXPECTED_ERROR_THRESHOLD = '0' CVC_OVERVOLTAGE_ERROR_THRESHOLD = '0' CVC_PARALLEL_CIRCUIT_PORT_LIMIT = '0' CVC_CELL_ERROR_LIMIT_FILE = '' CVC_CELL_CHECKSUM_FILE = '' CVC_LARGE_CIRCUIT_SIZE = '10000000' CVC_NET_CHECK_FILE = '' CVC_MODEL_CHECK_FILE = '' End of parameters CVC: Reading device model settings... CVC: Reading power settings... CVC: Parsing netlist /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_47/tmp/signoff/digital_pll.cdl Cdl fixed data size 29223 Usage CDL: Time: 0 Memory: 6936 I/O: 3952 Swap: 0 CVC: Counting and linking... Fatal error:could not find subcircuit: XFILLER_11_100(sky130_ef_sc_hd__decap_12) in digital_pll