Jeff DiCorpo
49c5a688b1
tag = 2024.09.12-1
2024-09-12 14:01:55 -07:00
Jeff DiCorpo
79a032141a
Merge pull request #553 from efabless/reduced_poly_fill
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Modifications to reduce poly fill and re-enable LVS.
2024-09-12 15:56:24 -05:00
David Lindley
e636f25688
Added PDK path to first standard cell use statement
2024-09-04 11:41:35 -07:00
David Lindley
7a98b83ce6
Merge pull request #552 from d-m-bailey/EF_fill-mag-fix
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Changed EF_fill_4_8.mag scale and coordinates
2024-09-04 08:14:37 -04:00
D. Mitch Bailey
2c58642c42
Changed EF_fill_4_8.mag scale and coordinates
2024-09-04 00:08:33 -07:00
David Lindley
b7b9c26ab1
Merge branch 'reduced_poly_fill' of github.com:efabless/caravel into reduced_poly_fill
2024-09-03 17:05:41 -07:00
David Lindley
9d7492c666
Fixed properties in EF_fill_4_8.mag. Removed .mag extension from EF fill cells in housekeeping and caravan/caravel_core.mag files
2024-09-03 17:04:55 -07:00
David Lindley
68fefe74f5
Merge pull request #551 from d-m-bailey/poly-fix-verilog
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Fixed verilog instance name and ports.
2024-09-03 16:58:11 -04:00
Jeff DiCorpo
93ce8bb464
tag = 2024.09.03-1
2024-09-03 13:23:47 -07:00
David Lindley
78e4b39116
Added pins to fix LVS issues
2024-09-02 17:32:14 -07:00
D. Mitch Bailey
999d5e2311
Fixed verilog instance name and ports.
2024-09-01 08:23:15 -07:00
David Lindley
d53ed92620
Updated mag files by swapping decap_12 cells with fill_4 and fill_8. Modified the verilog/gl files to match.
2024-08-29 17:22:17 -07:00
Jeff DiCorpo
ac179548f9
tag = mpw-9k
2024-07-31 11:11:30 -07:00
Jeff DiCorpo
487a439614
tag mpw-9j
2024-05-30 14:37:02 -07:00
Jeff DiCorpo
eca7932980
Merge pull request #536 from efabless/Add-TRM-Doc
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New TRM document
2024-04-16 11:15:07 -07:00
David Lindley
c0e5821b14
New TRM document
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New Technical Reference Manual (TRM) documenting the Caravel SoC Register and Memory maps.
2024-04-15 08:35:27 -07:00
Jeff DiCorpo
cd263ed24b
Merge pull request #518 from d-m-bailey/user-id-reverse
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Correct user_id bit order in gl verilog and layout.
2024-01-10 10:24:37 -08:00
Jeff DiCorpo
2098608638
add Caravel datasheet
2024-01-08 22:50:41 -08:00
d-m-bailey
fad93a0e79
Apply automatic changes to Manifest and README.rst
2023-12-06 04:11:14 +00:00
D. Mitch Bailey
092ff66da0
Correct user_id bit order in gl verilog and layout.
2023-12-05 16:05:25 -08:00
Jeff DiCorpo
05baf48756
Merge pull request #515 from efabless/docs-fix
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Update .readthedocs.yml
2023-11-13 11:43:40 -08:00
marwaneltoukhy
2a5c603348
Apply automatic changes to Manifest and README.rst
2023-11-12 13:15:01 +00:00
Marwan Abbas
5c05a01d63
Update requirements.txt
2023-11-12 15:03:35 +02:00
Marwan Abbas
4991cf2d51
Update .readthedocs.yml
2023-11-12 15:02:35 +02:00
Jeff DiCorpo
084af0eb7c
update tag = mpw-9f
2023-11-05 10:47:16 -08:00
Jeff DiCorpo
5866a78353
Merge pull request #514 from efabless/revert_user_id_mag
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Revert the user_id_programming.mag file
2023-11-04 18:18:52 -07:00
Tim Edwards
b9a2e3ad7f
Revert the user_id_programming.mag file back to the state it was
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in before my Sept. 25 commit, where it accidentally got
overwritten when magic decided it needed a timestamp update
for some reason, destroying my manual edits in the process.
2023-11-04 21:08:20 -04:00
Jeff DiCorpo
6fccfd48a9
Merge pull request #511 from efabless/update_pdk_version
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Update Makefile
2023-11-02 10:14:37 -07:00
Jeff DiCorpo
cc1cd7f776
Merge pull request #498 from efabless/remove_cocotb
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remove cocotb directory since it is moved under other repos
2023-10-23 08:00:35 -07:00
Jeff DiCorpo
4996d338c4
Merge pull request #476 from efabless/remove_depency_over_power
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Fix power guards
2023-10-23 07:52:57 -07:00
Jeff DiCorpo
610a874a82
Merge branch 'main' into remove_depency_over_power
2023-10-23 07:50:12 -07:00
Jeff DiCorpo
d42e78e3dd
Merge pull request #491 from efabless/fix_openframe_netlists
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Modified the verilog/rtl/openframe_netlists.v.
2023-10-23 07:47:47 -07:00
Jeff DiCorpo
eab35f8af3
Merge pull request #504 from efabless/cocotb
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update cocotb top rtl to work with cheetah soc
2023-10-23 07:46:16 -07:00
Jeff DiCorpo
78a85b166b
Merge pull request #512 from efabless/caravel-lite_fix
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Update auto-update-caravel-lite.yml
2023-10-23 07:33:30 -07:00
Marwan Abbas
6c21917d49
Update auto-update-caravel-lite.yml
2023-10-22 10:08:28 +03:00
Marwan Abbas
93c54686f0
Update Makefile
2023-10-22 10:00:28 +03:00
Jeff DiCorpo
3afe4236c9
Merge pull request #503 from efabless/fix_openframe_wrapper_interface
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Modifications to the openframe padframe
2023-10-19 08:02:39 -07:00
RTimothyEdwards
bcb0e2791d
Apply automatic changes to Manifest and README.rst
2023-10-18 16:59:36 +00:00
Tim Edwards
4cd9d9cf2a
Added pins "vddio" and "vssio" to the openframe and openframe project
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wrapper RTL netlists and and openframe project wrapper GL netlist.
2023-10-18 12:47:56 -04:00
Jeff DiCorpo
85464f81ec
Merge pull request #508 from efabless/blocking_CI
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Create block_CI.yaml
2023-10-18 08:41:02 -07:00
Marwan Abbas
2c92ebfabb
Create block_CI.yaml
2023-10-12 15:11:03 +03:00
Tim Edwards
15bd09f066
Reverted "chip_io_gpio_connects.mag".
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Backed out an error in which the layout "chip_io_gpio_connects.mag",
which was used on caravel and caravan, was modified for openframe,
making it incompatible with caravel and caravan. Renamed it to
"chip_io_gpio_connects_vert.mag" which makes it unique to openframe
and also matches the nomenclature of "chip_io_gpio_connects_horiz".
2023-10-08 17:59:16 -04:00
Marwan Abbas
112142521c
Add files via upload
2023-10-08 14:05:22 +03:00
M0stafaRady
6b5829181a
Merge pull request #506 from efabless/main
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merge from main to cocotb
2023-10-03 10:02:58 +03:00
Tim Edwards
b3273ca5aa
Added the set of missing pins on the 2nd of the two vccd1/vssd1 power
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pads to the user project wrapper layout, which were missing, as pointed
out by Marwan. Regenerated the wrapper DEF file from the updated
layout.
2023-10-01 21:11:33 -04:00
Tim Edwards
495bf5fc5d
Stretched all metal3 pins 0.02um toward the center of the chip, so that
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the length of pin inside the wrapper boundary is 0.3um, which is the
minimum metal3 layer width, and is required by the routing tool.
2023-09-27 15:07:58 -04:00
Tim Edwards
990f5dffc9
Found one additional minor adjustment was needed to the resetb_h
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pin, which was neither 0.28um wide nor completely covered by
metal2.
2023-09-26 17:58:05 -04:00
Tim Edwards
2251bad60f
Additional tidying up. All pins on the openframe wrapper are now
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consistent (all metal2 pins the same width and length and all
metal3 pins the same width and length). The PR boundary was
moved back to where it was, 0.28um from the pin ends; that
causes overlap with the padframe but should not be an issue since
the openframe wrapper is manually placed. All pins reach from
0.28um inside the boundary to the bottom of the comment layer
(which is 2um wide). Some remaining pins which were not on a
10nm grid were corrected.
2023-09-26 12:50:50 -04:00
Tim Edwards
7bfab382d8
After updating from the PR that adds the gate level chip_io_openframe.v,
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modified it so that it matches the modified chip_io_openframe layout
in this PR (namely, the GPIO "_wrapped" pads are replaced with the
equivalent non-wrapped base cells).
2023-09-25 20:10:37 -04:00
RTimothyEdwards
849419d2e5
Apply automatic changes to Manifest and README.rst
2023-09-25 23:51:16 +00:00