riscv
/
caravel
mirror of https://github.com/efabless/caravel.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
1,429 Commits 140 Branches 61 Tags 15 GiB
Commit Graph

3 Commits

Author SHA1 Message Date
mo-hosni e076718887 add `/// sta-blackbox` in the modules that will be blackboxed in STA 2023-05-22 05:52:27 -07:00
M0stafaRady 096f5035f5
cocotb - updates related to enable simulating caraval using iverilog (#320) 
* cocotb - updates related to enable simulating caraval using iverilog

* Apply automatic changes to Manifest and README.rst

Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>
 2022-10-21 07:43:34 -07:00
Tim Edwards 332f9ec2e7 Seeding with documentation of pinout and verilog RTL (mostly unchanged 
from original except to remove blocks that are not supposed to be in
this repository like the processor core and the storage).
 2021-10-12 16:31:42 -04:00