(input for monitoring) changed from being connected directly to the
user project (where it shouldn't be) to the same signal on the input
side of the management protect block (where it should be). This is
functionally the same. Checked for any other signals connected
directly from the user project to any block other than mgmt_protect,
didn't find any (good). Modified the gate-level netlists and top-level
layouts for caravel and caravan with the corresponding change. This
was the only change affecting layout. Also: Revised the "pll"
testbench. This is still ongoing work. Also: Fixed the way the
pins on I/O pads are declared in chip_io.v, mprj_io.v, and pads.v, so
that it isn't so bizarre. Most of this change is functionally
agnostic (just a change in the way the ifdefs work), but did fix an
incorrect ifdef that causes the whole user power domain to be broken.
Fixed rstb_h, which was being input to low-voltage blocks. (2)
Fixed flash_csb_ieb_core and flash_clk_ieb_core, which were not
output from housekeeping as they should be; the solution was
to tie the INP_DIS lines low at the pad by connecting them to
the TIE_LO_ESD line. This should probably be addressed in
housekeeping but would change the current pinout.
problems that had been fixed recently in caravel, and which cause
the caravan testbench to break, but which were not noticed; (2)
corrected the count of gpio_control_block modules, which was one
off, with two of them overlapping (not sure how that even passes
simulation, but it did); (3) fixed a power connection in the
caravel chip_io, which should have caused chip_io to fail LVS,
so apparently LVS was not run on chip_io. . .
deleted "resetb_core_h" port label. Corrected the chip_io and chip_io_alt
verilog RTL files to replace the user area power supply clamp cells with
the new clamped3 cell from open_pdks.
around the entire padframe. The vccd1 and vccd2 domains are local
to their respective pads, and any bus routing must be done inside
the padframe. This means that all pads operate on global vddio for
3.3V as before, but also global vccd for 1.8V. The user 1.8V voltage
domain only goes as far as the input to the GPIO control block.
Tim Edwards
manarabdelaty