Marwan Abbas
3f7a9d0491
Merge pull request #241 from efabless/buff_power_connection
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added power connection to buffer rtl
2022-10-15 13:35:30 +02:00
Marwan Abbas
696eddcc7b
Merge branch 'caravel_redesign' into buff_power_connection
2022-10-15 13:34:21 +02:00
M0stafaRady
14ebfa5259
fix bug in bitbang_no_cpu_all_o testbench
2022-10-15 04:18:05 -07:00
kareem
3e3bd111c1
~ correct paths refereces in mag and maglef files from openlane
2022-10-15 04:06:07 -07:00
marwaneltoukhy
1d924ded70
Apply automatic changes to Manifest and README.rst
2022-10-15 10:58:52 +00:00
Marwan Abbas
40c7776b57
added power connection to buffer rtl
2022-10-15 12:56:40 +02:00
Marwan Abbas
1559e7c41d
Merge pull request #240 from efabless/cocotb
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Cocotb script updates
2022-10-15 11:55:41 +02:00
M0stafaRady
2d56c68ef2
fix script to not create directory annotation_logs
2022-10-15 02:54:35 -07:00
Marwan Abbas
2fdc9cb31e
Merge pull request #239 from efabless/buff_power_connection
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added power connection to buffer top level rtl
2022-10-15 11:52:20 +02:00
marwaneltoukhy
c9265568f6
Apply automatic changes to Manifest and README.rst
2022-10-15 09:50:52 +00:00
Marwan Abbas
d025944505
Merge branch 'caravel_redesign' into buff_power_connection
2022-10-15 11:48:51 +02:00
M0stafaRady
9be1caa84d
Merge branch 'caravel_redesign' into cocotb
2022-10-15 02:40:55 -07:00
marwaneltoukhy
34f555e1ad
Apply automatic changes to Manifest and README.rst
2022-10-15 09:29:34 +00:00
M0stafaRady
83e692e176
Merge branch 'caravel_redesign' into cocotb
2022-10-15 02:28:00 -07:00
Marwan Abbas
316f2dbb58
Merge pull request #238 from mo-hosni/update_mgmt_protect
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Update mgmt protect
2022-10-15 11:27:59 +02:00
Marwan Abbas
6c19140590
added power connection to buffer top level rtl
2022-10-15 11:27:30 +02:00
M0stafaRady
267dfd0965
Add new regression for gpios gpio_rtl and gpio_gl
2022-10-15 02:26:36 -07:00
M0stafaRady
16f55976a9
fix bug at generating new linker script for memory tests
2022-10-15 02:22:21 -07:00
Marwan Abbas
3d8561ffdc
Merge pull request #213 from efabless/add_top_level_buffers
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Add top level buffers
2022-10-15 11:16:57 +02:00
mo-hosni
b76becefef
add sdf and spef files
2022-10-15 01:56:09 -07:00
mo-hosni
edcbcb959d
add openlane signoff files for mgmt_protect
2022-10-15 01:52:24 -07:00
mo-hosni
3361c8787d
Add mgmt_protect views and openlane files
2022-10-15 01:46:22 -07:00
M0stafaRady
5d6af67724
Merge branch 'cocotb' of github.com:efabless/caravel into cocotb
2022-10-14 17:13:23 -07:00
M0stafaRady
422bb26ca0
Optimize and update mem tests - script is generating new linker script for the test to be all to test the whole dff or dff2 memory
2022-10-14 17:12:45 -07:00
M0stafaRady
5e044fc505
Merge branch 'caravel_redesign' into cocotb
2022-10-14 16:18:53 -07:00
M0stafaRady
5f046793e4
update verify cocotb script to delete waves if test passed
2022-10-14 16:18:33 -07:00
passant5
4a30414db2
Apply automatic changes to Manifest and README.rst
2022-10-14 22:30:13 +00:00
passant5
8c0e4f7403
Merge branch 'caravel_redesign' into add_top_level_buffers
2022-10-15 00:28:14 +02:00
passant5
e7af9a3aec
Apply automatic changes to Manifest and README.rst
2022-10-14 22:08:07 +00:00
Passant
b47fa798db
Merge branch 'caravel_redesign' of github.com:efabless/caravel into caravel_redesign
2022-10-14 15:06:06 -07:00
Passant
653e7fa561
update top-level rtl to resolve conflict with adding top level buffers between housekeeping and `gpio_control_block` https://github.com/efabless/caravel/pull/213
2022-10-14 15:02:16 -07:00
passant5
9e1b6610d1
Merge pull request #234 from efabless/openlane-runs-config
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+ add caravel_clocking & digital_pl & gpio_control_block openlane runs config.tcl file
2022-10-14 23:47:44 +02:00
passant5
d37d624760
Merge pull request #233 from efabless/fix_mgmt_protect_hv_pins
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Rewrote the layout for mgmt_protect_hv after correcting the pins,
2022-10-14 23:46:55 +02:00
kareem
ea6badcd67
+ add caravel_clocking & digital_pl & gpio_control_block openlane run config.tcl file
2022-10-14 14:28:47 -07:00
Tim Edwards
65573a64a6
Revised the LEF view of mgmt_protect_hv, since it has changed due
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to the increase of the horizontal m3 buses (pins) to 0.5um.
2022-10-14 17:06:45 -04:00
Passant
f69a522f19
update script to get the signoff sdc from directory `./signoff/<design name>/<design name>.sdc`
2022-10-14 13:57:16 -07:00
Tim Edwards
1f5a158077
Essentially the same commit as the last one, but setting the metal
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3 horizontal bus width to 0.5um, as requested, rather than 0.6um.
2022-10-14 16:36:42 -04:00
Tim Edwards
276580feb4
Updated the metal 3 horizontal power stripes on the mgmt_protect_hv
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layout to make them 0.6um (up from 0.3um wide).
2022-10-14 16:28:07 -04:00
passant5
3a229be6d3
Apply automatic changes to Manifest and README.rst
2022-10-14 20:17:07 +00:00
Passant
f499b8b75f
update top-level rtl with 7 pass through signals to be buffered inside the SoC
2022-10-14 13:11:42 -07:00
Tim Edwards
92e2f5e8a4
Added layout views (.mag, GDS, DEF, and LEF) for the caravan
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variant of the top level GPIO signal buffering (module
gpio_signal_buffering_alt).
2022-10-14 16:06:11 -04:00
Marwan Abbas
ec85a1f401
Merge pull request #232 from mo-hosni/add_full_config_files
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add full configuration files for housekeeping and mgmt_protect
2022-10-14 21:19:26 +02:00
mo-hosni
d596b9dae6
add full configuration files for housekeeping and mgmt_protect
2022-10-14 12:12:39 -07:00
Tim Edwards
aff5817f30
Rewrote the layout for mgmt_protect_hv after correcting the pins,
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which had not been correctly annotated for ports and so were
marked only as plain labels, causing issues when using the cell
as a macro inside mgmt_protect.
2022-10-14 15:11:52 -04:00
Marwan Abbas
e4b3af043a
fixed report generation path
2022-10-14 19:02:08 +02:00
Marwan Abbas
63c147bbd5
Merge pull request #230 from mo-hosni/housekeeping_update
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Housekeeping update
2022-10-14 18:52:39 +02:00
mo-hosni
9b2f20d428
add openlane signoff for housekeeping
2022-10-14 09:35:57 -07:00
mo-hosni
0e01725608
add housekeeping views
2022-10-14 09:26:34 -07:00
RTimothyEdwards
c742a7f337
Apply automatic changes to Manifest and README.rst
2022-10-14 14:55:08 +00:00
Tim Edwards
ac209d2397
Corrected a bunch of typos (different signal names used in the
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same file), errors (buffer output pin name, power supplies not
passed at the top level). Corrected a major error that prevented
the use of the buffers in simulation, so this was not previously
verified by simulation. The buffering has now been properly
verified.
2022-10-14 10:51:29 -04:00