caravel

Commit Graph

Author	SHA1	Message	Date
Kareem Farid	d14035d8a2	gpio_signal_buffering rtl decaps + add sky130_ef_sc_hd__decap_12 decaps in the rtl of gpio_signal_buffering + add sky130_ef_sc_hd__decap_12 stub file for openlane; there is no yosys-parseable verilog model for sky130_ef_sc_hd__decap_12 ~ change config of gpio_signal_buffering* to add sky130_ef_sc_hd__decap_12 ~ regenerate the gl netlist based on the above changes	2022-11-01 19:16:53 +02:00
R. Timothy Edwards	30d35947f1	Added decap cells to the gate-level verilog for the (#343 ) gpio_signal_buffering_alt cell (caravan chip). This was previously done for gpio_signal_buffering (caravel chip) but the same thing had not previously been done for caravan.	2022-10-22 12:12:06 -07:00
Marwan Abbas	7db65f3e32	Added gl netlists for chip_io_alt and gpio_signal_buffering_alt (#327 )	2022-10-21 12:06:20 -07:00

Author

SHA1

Message

Date

Kareem Farid

d14035d8a2

gpio_signal_buffering rtl decaps

+ add sky130_ef_sc_hd__decap_12 decaps in the rtl of gpio_signal_buffering
+ add sky130_ef_sc_hd__decap_12 stub file for openlane; there is no
yosys-parseable verilog model for sky130_ef_sc_hd__decap_12
~ change config of gpio_signal_buffering* to add sky130_ef_sc_hd__decap_12
~ regenerate the gl netlist based on the above changes

2022-11-01 19:16:53 +02:00

R. Timothy Edwards

30d35947f1

Added decap cells to the gate-level verilog for the (#343 )

gpio_signal_buffering_alt cell (caravan chip).  This was
previously done for gpio_signal_buffering (caravel chip) but
the same thing had not previously been done for caravan.

2022-10-22 12:12:06 -07:00

Marwan Abbas

7db65f3e32

Added gl netlists for chip_io_alt and gpio_signal_buffering_alt (#327 )

2022-10-21 12:06:20 -07:00

3 Commits