longer in the PDK but have been folded into larger library files.
With the most recent push to open_pdks to fix an error in the I/O
verilog library, the verilog testbenches once again pass.
via programming. The values for each of the GPIOs at power-up are
defined in the "user_defines.v" file. For the verilog, they are
applied as parameters. For the layout, they will need to be
separately defined cells for each of the GPIOs, or at least for
each set of unique default values.