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caravel
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75 Commits

Author SHA1 Message Date
Tim Edwards 43b8f9d4fe Merge branch 'caravel_redesign' into fix_top_buffers_again 
Updating to the most recent caravel_redesign branch version.
 2022-10-16 10:05:36 -04:00
Tim Edwards dcc3c56b83 Some additional corrections to the gpio_signal_buffering cells. 
Corrected one instance where a buffer had incorrectly been replaced
with a decap cell.  Moved the left-hand side in by 0.6um to clear
the chip_io connections on the left-hand side.  Corrected a small
DRC error in a route position at the bottom.
 2022-10-16 09:50:20 -04:00
Marwan Abbas ab026c4c1f changed report path of drc 2022-10-15 23:31:38 +02:00
Passant 9b80912487 update signoff scripts to add signoff results of SoC modules to `./<MCW_ROOT>/signoff/` 
add false paths and case analysis reports for top-level caravel STA run
 2022-10-15 13:34:45 -07:00
Tim Edwards 3db846b119 Fixes issues with the GPIO signal buffering by applying a bounding 
box to the layout, so that LEF and DEF positions are correct.
 2022-10-15 10:31:35 -04:00
Marwan Abbas fe2f5678aa changed cloning pt libs to the new repo 2022-10-15 15:03:14 +02:00
Passant f69a522f19 update script to get the signoff sdc from directory `./signoff/<design name>/<design name>.sdc` 2022-10-14 13:57:16 -07:00
Marwan Abbas e4b3af043a fixed report generation path 2022-10-14 19:02:08 +02:00
Marwan Abbas f4f26398f0
Merge pull request #209 from efabless/add_pt_dir 
Add PT signoff directories for each block
 2022-10-13 21:08:51 +02:00
Passant 66616d2cf3 modify STA scripts to adhere to the updated repo structure 
- primetime generated files (reports, lib, and sdf) are added to `./signoff/<design>/primetime-signoff/`
- STA logs are added to `./scripts/logs/<design>/`
 2022-10-13 09:24:44 -07:00
Marwan Abbas a5aec786fd fixed bugs + linting 2022-10-13 17:18:36 +02:00
Marwan Abbas 99ad0fa67e fixed bugs with running antenna check 2022-10-13 17:13:03 +02:00
Marwan Abbas c01164071f fixed typo 2022-10-13 14:38:16 +02:00
Marwan Abbas 0d25187693 fixed typo 2022-10-13 14:34:41 +02:00
Marwan Abbas c934426903 added antenna checks 2022-10-13 14:32:24 +02:00
Marwan Abbas e3e513bcee changed build script to load mgmt_core_wrapper mag 2022-10-13 13:13:52 +02:00
Passant e9dad36675 remove old comment 2022-10-12 14:19:22 -07:00
Passant 3bacc59a01 fix PT not exiting when an error occurs 
add support for top-level caravel STA run including user project wrapper
 2022-10-12 14:07:36 -07:00
Marwan Abbas cf614868a7
Update README.md 2022-10-12 19:45:06 +02:00
Marwan Abbas 021b395f3a fixed multiple bugs due to typos 2022-10-12 19:35:43 +02:00
Marwan Abbas fc207d8d84 fixed multiple bugs due to typos 2022-10-12 18:57:56 +02:00
Marwan Abbas 795ffcb3df changed place of caravel_root and mcw_root checks 2022-10-12 18:40:55 +02:00
Marwan Abbas de6033a87b added design switch to run checks on a specific design, and added parsing STA logs 2022-10-12 18:07:12 +02:00
Passant 84b5a65260 Merge branch 'caravel_redesign' of github.com:efabless/caravel into caravel_redesign 2022-10-12 07:36:55 -07:00
Passant d784fd2dd1 update the script with the modified spef and signoff sdc directories 
update spef mapping proc to match the new RAM names
 2022-10-12 07:32:07 -07:00
Marwan Abbas ea6f4e9aea Merge branch 'caravel_redesign' of github.com:efabless/caravel into caravel_redesign 2022-10-12 14:16:27 +02:00
Marwan Abbas ad0923b4e8 added README to run signoff automation 2022-10-12 14:16:18 +02:00
Mohamed Shalan 98951388d0
Merge pull request #179 from efabless/chip_io_fix_ports 
Fixes the .mag, LEF, DEF, and GDS views of chip_io and chip_io_alt
 2022-10-12 11:37:24 +02:00
Marwan Abbas 6914202dfc added sheilds for exporting caravel_root and mcw_root 2022-10-12 10:07:02 +02:00
Tim Edwards a2feddf714 Corrected the layout views of chip_io and chip_io_alt, which were 
missing some of the labels for the power supplies (they were
accidentally erased during layout re-work).
 2022-10-11 11:39:03 -04:00
Passant 7dccb3aeb4 remove redundant makedirs 2022-10-11 05:00:12 -07:00
Marwan Abbas 8540c4fcdf Merge branch 'caravel_redesign' of github.com:efabless/caravel into caravel_redesign 2022-10-11 12:22:09 +02:00
Marwan Abbas e378a191ad fixed build script and run sta 2022-10-11 12:22:01 +02:00
Passant b3f69ba769 add creating `.lib` for the design at the end of the STA run 
add all process corners liberties for the IO cells
update spef mapping based on the updated instances names in the top-level caravel
 2022-10-10 15:46:41 -07:00
Marwan Abbas a8934d66cc fixes for logging and sta running 2022-10-10 13:25:09 +02:00
Marwan Abbas a3dd90fc61 build script fixes 2022-10-09 20:11:42 +02:00
Marwan Abbas 943a503441 run sta in parallel with drc, lvs and verification 2022-10-09 20:10:28 +02:00
Marwan Abbas ccb9a90977 added klayout drc python script 2022-10-09 19:55:27 +02:00
Marwan Abbas 82fcb3a54d remove unnecessary prints 2022-10-09 19:43:17 +02:00
Marwan Abbas ecc06078b9 added signoff automation script + supporting scripts 2022-10-09 19:36:50 +02:00
Passant 855ea54add add reading multicorner spef generated from OL 2022-10-09 10:26:01 -07:00
Passant ef688785f3 add script to run STA [in review] 2022-10-09 07:40:32 -07:00
Passant a5d73caf34 add script to run PrimeTime STA [in review] 2022-10-09 03:23:01 -07:00
Tim Edwards 7276623d3c Corrected the pull-up definition and revised the CSB definition to 
match the corrected defintions (namely, pull-up is configuration
0x0801, and pull-down is configuration 0x0c01).
 2022-10-05 10:02:24 -04:00
Tim Edwards aba145e0e2 Made modifications in support of changing the hard-coded default 
configuration of GPIO 3 (CSB) from a standard input to a weak
pull-up input.
 2022-09-27 20:58:57 -04:00
sto6 9949306c42
issue-105: caravel & caravan.mag: relabel top-level v*_core power nets (label PLUS underlying met5); (#110) 
tweak blackbox lvs scripts for very fast extract; update spi/lvs/*.spice.
The .spice (once propagated to caravel-lite AND caravel-lite embed in mpw_precheck docker)
will pass the consistency check.

Co-authored-by: Risto Bell <rb@efabless.com>
 2022-08-26 23:03:00 -07:00
R. Timothy Edwards a2ccbd9e7e
Modified the set_user_id.py script so that mode "-report" returns a valid value. (#93) 
* Modified the set_user_id.py script so that mode "-report" returns
a valid value, instead of throwing an error, because the "info.yaml"
file was removed without due consideration of the side effects.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
 2022-05-08 22:50:48 -07:00
R. Timothy Edwards 80c7d29412
A minor correction the gen_gpio_defaults.py script to ensure that (#95) 
it will recognize all block cell types in the gate level netlist
after having been run previously.  The former code was only looking
for numeric digits in the cell name, but the cell name suffix is
hex, not integer, and so the script needs to add a check for the
letters A-F or a-f in the cell name suffix.  This is not an
immediate issue because the two default values used are "0403" and
"1803" and happen not to have any alphabetic hex digits.  But if
it were deemed necessary to change a default, then this script
should not break.
 2022-05-08 22:50:20 -07:00
Mitch Bailey 21d44910b4
Fix verilog gpio_defaults_block replacement for gpio 0-4 (#87) 
* Create lvs-cvc.rst

* user_project_analog_wrapper -> user_analog_project_wrapper

* Added table

* Update lvs-cvc.rst

* Create lvs_cvc_mpw4.rst

Initial steps for LVS and CVC-RV for MPW-4 slot-002

* Update lvs_cvc_mpw4.rst

diode and short errors

* daily progress

`simple_por` changes to `caravel.v`

* Update lvs_cvc_mpw4.rst

* Changed int (truncate) to round to correct gpio_default error.

* Replace gpio_defaults_block for gpio 0-4 correctly.
Remove old versions of gpio_defaults_block 0403 and 1803.

* Removed local CVC-RV docs not ready for commit.
 2022-04-23 17:57:34 -07:00
Mitch Bailey da3f77d680
Changed int (truncate) to round to correct gpio_default error. (#83) 2022-04-21 17:53:21 -07:00