Commit Graph

41 Commits

Author SHA1 Message Date
Marwan Abbas a8934d66cc fixes for logging and sta running 2022-10-10 13:25:09 +02:00
Marwan Abbas a3dd90fc61 build script fixes 2022-10-09 20:11:42 +02:00
Marwan Abbas 943a503441 run sta in parallel with drc, lvs and verification 2022-10-09 20:10:28 +02:00
Marwan Abbas ccb9a90977 added klayout drc python script 2022-10-09 19:55:27 +02:00
Marwan Abbas 82fcb3a54d remove unnecessary prints 2022-10-09 19:43:17 +02:00
Marwan Abbas ecc06078b9 added signoff automation script + supporting scripts 2022-10-09 19:36:50 +02:00
Passant 855ea54add add reading multicorner spef generated from OL 2022-10-09 10:26:01 -07:00
Passant ef688785f3 add script to run STA [in review] 2022-10-09 07:40:32 -07:00
Passant a5d73caf34 add script to run PrimeTime STA [in review] 2022-10-09 03:23:01 -07:00
Tim Edwards 7276623d3c Corrected the pull-up definition and revised the CSB definition to
match the corrected defintions (namely, pull-up is configuration
0x0801, and pull-down is configuration 0x0c01).
2022-10-05 10:02:24 -04:00
Tim Edwards aba145e0e2 Made modifications in support of changing the hard-coded default
configuration of GPIO 3 (CSB) from a standard input to a weak
pull-up input.
2022-09-27 20:58:57 -04:00
sto6 9949306c42
issue-105: caravel & caravan.mag: relabel top-level v*_core power nets (label PLUS underlying met5); (#110)
tweak blackbox lvs scripts for very fast extract; update spi/lvs/*.spice.
The .spice (once propagated to caravel-lite AND caravel-lite embed in mpw_precheck docker)
will pass the consistency check.

Co-authored-by: Risto Bell <rb@efabless.com>
2022-08-26 23:03:00 -07:00
R. Timothy Edwards a2ccbd9e7e
Modified the set_user_id.py script so that mode "-report" returns a valid value. (#93)
* Modified the set_user_id.py script so that mode "-report" returns
a valid value, instead of throwing an error, because the "info.yaml"
file was removed without due consideration of the side effects.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
2022-05-08 22:50:48 -07:00
R. Timothy Edwards 80c7d29412
A minor correction the gen_gpio_defaults.py script to ensure that (#95)
it will recognize all block cell types in the gate level netlist
after having been run previously.  The former code was only looking
for numeric digits in the cell name, but the cell name suffix is
hex, not integer, and so the script needs to add a check for the
letters A-F or a-f in the cell name suffix.  This is not an
immediate issue because the two default values used are "0403" and
"1803" and happen not to have any alphabetic hex digits.  But if
it were deemed necessary to change a default, then this script
should not break.
2022-05-08 22:50:20 -07:00
Mitch Bailey 21d44910b4
Fix verilog gpio_defaults_block replacement for gpio 0-4 (#87)
* Create lvs-cvc.rst

* user_project_analog_wrapper -> user_analog_project_wrapper

* Added table

* Update lvs-cvc.rst

* Create lvs_cvc_mpw4.rst

Initial steps for LVS and CVC-RV for MPW-4 slot-002

* Update lvs_cvc_mpw4.rst

diode and short errors

* daily progress

`simple_por` changes to `caravel.v`

* Update lvs_cvc_mpw4.rst

* Changed int (truncate) to round to correct gpio_default error.

* Replace gpio_defaults_block for gpio 0-4 correctly.
Remove old versions of gpio_defaults_block 0403 and 1803.

* Removed local CVC-RV docs not ready for commit.
2022-04-23 17:57:34 -07:00
Mitch Bailey da3f77d680
Changed int (truncate) to round to correct gpio_default error. (#83) 2022-04-21 17:53:21 -07:00
R. Timothy Edwards 8aafe0cff6
Fixes an error in the gen_gpio_defaults.py script (#79)
* Fixes an error in the gen_gpio_defaults.py script that is incompatible
with the use of indexed arrays for five of the gpio_defaults_block
instances.  Previously this was handled by manually changing the names
in the layout file.  This script avoids the need for manual modification
by directly handling the indexed notation.  Also, this extends the
modifications made to the layout to include the first five defaults
blocks;  otherwise, the first five defaults blocks are not changed and
the defaults will be wrong for the housekeeping SPI pins.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
2022-04-20 10:31:15 -04:00
R. Timothy Edwards 99518acd15
Numerous bug fixes, ending in clean full LVS for both caravel and caravan. (#76)
* (1) Modified the .magicrc file to set a default for PDK if not set in the
environment.  (2) Fixed the user ID programming layout to not leave holes
behind when the script moves the vias around (similar to the handling of
the GPIO defaults block).  (3) Added substrate isolation to gpio_control_block
and fixed the path references to the standard cells.  (4) Fixed the four
missing routes on the Caravan top level.  (5) Reinstated the large rendered
labels for the pads on both caravel and caravan.  (6) Corrected the top
level gate-level netlist for caravan to add the missing pins to the
management core wrapper.  (7) Did the same for the caravan top level RTL.
(8) Created scripts to run full LVS including extracting the management
core wrapper and reading all gate-level verilog submodules.  (9) Moved all
of the LVS scripts to the scripts directory.

* Apply automatic changes to Manifest and README.rst

* Made the changes from pull request #73 as they did not get merged
successfully, and if merged now they will generate conflicts with
this pull request in scripts/set_user_id.py.  So it's easier to
just manually add them to this pull request.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
2022-04-19 19:05:27 -07:00
Mitch Bailey 6f99301588
Changes that correct mgmt_core references and user_id_programming generation. (#73)
* Create lvs-cvc.rst

* user_project_analog_wrapper -> user_analog_project_wrapper

* Added table

* Update lvs-cvc.rst

* Create lvs_cvc_mpw4.rst

Initial steps for LVS and CVC-RV for MPW-4 slot-002

* Update lvs_cvc_mpw4.rst

diode and short errors

* daily progress

`simple_por` changes to `caravel.v`

* Update lvs_cvc_mpw4.rst

* Remove old local documentation.

* Changes that correct gpio_default_block, user_id_programming, and mgmt_core references.

mgmt_core_wrapper
  Use absolute path instead of relative path.

user_id_programming
  Remove GDS references as GDS is no longer modified.
  Corrected string concatenation.
  Corrected mag data replacement.
  Corrected verilog data replacement.

gpio_default_block
  Rename instances for gpio_default_blocks 0-4 in caravel.mag and caravan.mag.
  Change replace range in gen_gpio_defaults.py to handle gpio_default_blocks 0-4.

* Revert changes related to gpio_default_block.

* Changed mgmt_core_wrapper absolute path from UPRJ_ROOT to MCW_ROOT.

* Corrected MCW_ROOT path (includes mgmt_core_wrapper)
2022-04-18 20:24:11 -07:00
Tim Edwards 078aabbfeb Corrected the set_user_id.py script. 2022-04-12 15:48:14 -04:00
Marwan Abbas e9f023f9fa
Introduction of PDK variable (#39)
* added PDK_VARIENT variable

* changed variable name to PDK

* resolve issue

Co-authored-by: Marwan Abbas <marwan@ciic.c.catx-ext-efabless.internal>
2022-04-08 09:05:58 -07:00
Tim Edwards 53abff5bbf This commit fixes the issue with the user ID programming block not
getting changed by "make ship" because the build is done in a place
where the path pointer to the user_id_programming GDS still points
back to the original caravel repository, not the user project
repository.  The user_id_programming GDS was removed (no longer used),
the user_id_programming.mag file was modified to remove the path
pointer to the GDS, and the set_user_id.py script was modified to
make changes directly to the user_id_programming.mag file instead of
the GDS.  An additional method was added to the set_user_id.py script
to modify the gate-level verilog/gl/user_id_programming.v to make
the user ID correct for gate-level testbench simulations.
2022-03-22 10:25:25 -04:00
Tim Edwards 2f6fe69b36 Corrected the gen_gpio_defaults.py script so that it behaves
correctly no matter how the "gpio_defaults_block.mag" and
"gl/gpio_defaults_block.v" are defined.  Previously it assumed
that they both defined all bits as zero, which was not the case
for the layout.  Now both define bit value 0x0402 and the script
can flip bits either direction as needed in both verilog and
layout
2021-12-29 15:42:41 -05:00
Tim Edwards 3246e64407 Correction to the gen_gpio_defaults.py file, which was accidentally
overwriting the top-level gate-level verilog netlist with the
modified layout file contents.
2021-12-04 12:41:06 -05:00
Tim Edwards 024801ab56 Extended the gen_gpio_defaults.py script to handle modifying the
verilog gate-level netlists to match the correct GPIO default
value assignments, and modify the top level gate-level caravel.v
and caravan.v netlists to match.
2021-12-02 16:04:51 -05:00
Tim Edwards 6482c1e011 Corrected the set_user_id.py script to (1) reverse the position of
characters in the user_id_textblock layout, which was backwards,
and (2) add a path reference to "hexdigits" for each new character
layout encountered in the file, so that the text block layouts
are found even if "addpath hexdigits" has not been specified.
There were some other corrections to handling gzipped files that
probably does not apply in practice, where "make uncompress" has
been run prior to the set_user_id.py script.
2021-12-02 09:35:13 -05:00
jeffdi 73343aed18 correcting magicrc file and pdkpath issues 2021-12-01 21:59:03 -08:00
jeffdi aa64579d63 fix pdkpath in generate_fill.py and compositor.py 2021-12-01 21:45:48 -08:00
jeffdi 547709b619 fix rcfile reference in generate_fill.py and compositor.py 2021-12-01 21:05:46 -08:00
jeffdi 0a09f3b5ac added missing scripts 2021-12-01 11:03:45 -08:00
jeffdi 91b94ad919 test gen_gpio_defaults.py 2021-11-26 15:32:13 -08:00
jeffdi fd81e0814b test gen_gpio_defaults.py 2021-11-26 15:28:03 -08:00
jeffdi b3320b7500 test gen_gpio_defaults.py 2021-11-26 14:04:00 -08:00
jeffdi 2ce03a196c test gen_gpio_defaults.py 2021-11-26 14:03:03 -08:00
jeffdi 2bd7c40946 test gen_gpio_defaults.py 2021-11-26 14:01:12 -08:00
jeffdi f996157088 test gen_gpio_defaults.py 2021-11-26 13:57:18 -08:00
Tim Edwards b0d3217280 Replaced the gpio_defaults_block_0000.mag layout with gpio_defaults_block.mag
so that it contains a valid layout after processing by Openlane (since the
verilog module is named gpio_defaults_block).  Corrected the orientation of
the defaults block layouts on the right side of Caravel and erased the
incorrect routing there.  Reinstated the copyright, user ID text, open source
logo, and Caravel logo.  Revised the gen_gpio_defaults.py script to handle
the first five GPIOs in the same way as the others, although as fixed entries
which cannot be modified by the user project designer.
2021-11-20 13:43:49 -05:00
Tim Edwards f18a219be4 Modified the set_user_id script so that if it happens to be run on
a repository where the user_id_programming GDS has been compressed,
it will handle it correctly.
2021-11-15 16:41:04 -05:00
Tim Edwards 4a27ea4c6b Finished first draft of the gen_gpio_defaults.py script, which now
makes backup copies of caravel and caravan layouts and replaces the
cell name of any gpio defaults block that is changed from the
contents of user_defines.v.  NOTE:  user_defines.v ultimately must
reside in the user project.  The Makefile should copy the user's
version into the caravel directory space before running the script,
or else the script should be rewritten to reference the user's
project area when reading user_defines.v.
2021-11-07 21:51:00 -05:00
Tim Edwards 6a93ea582d Added a script which parses the file "user_defines.v" in
verilog/rtl/, and creates all the layout files needed to represent
all unique combinations of defaults used in the file.  Not done:
Modifying the top level layout to use the correct defaults (because
the top level layout does not yet exist).
2021-11-06 21:19:42 -04:00
Tim Edwards a67cbcb01c Added back a couple more files related to the user ID programming block. 2021-10-26 10:40:55 -04:00