* REVERT ME: temporarily match simple_por pin in verilog with lef
* - update configs
- add patch file for power routing def
* - update the following caravel toplevel views
- gl
- mag
- def
- add caravel power routing def
* Apply automatic changes to Manifest and README.rst
* update gl mag and def for caravel
* Revert "REVERT ME: temporarily match simple_por pin in verilog with lef"
This reverts commit b70c27c69f.
* update caravel gds
* Apply automatic changes to Manifest and README.rst
* Added text and logo cells back into the caravel top level. Put an
isolated ground marker layer on the xres_buf layout. Corrected
the power supply pin names on the gate level verilog netlist of
simple_por in caravel.v. Updated the copyright block text.
Corrected DRC errors in the top level routing.
Co-authored-by: Tim Edwards <tim@opencircuitdesign.com>
Kareem Farid