2 Commits

Author	SHA1	Message	Date
Tim Edwards	7bfab382d8	After updating from the PR that adds the gate level chip_io_openframe.v, ... modified it so that it matches the modified chip_io_openframe layout in this PR (namely, the GPIO "_wrapped" pads are replaced with the equivalent non-wrapped base cells).	2023-09-25 20:10:37 -04:00
mo-hosni	f5199a7475	add a gate-level for `chip_io_openframe`	2023-09-24 17:10:34 +03:00