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caravel
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1,008 Commits 140 Branches 61 Tags 15 GiB
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156 Commits

Author SHA1 Message Date
Tim Edwards 767342e183 Added a completely revised sysctrl testbench based on accessing the 
housekeeping SPI through the back-door wishbone interface.  Checks
most of the SPI registers (but could do more).
 2021-10-19 17:32:20 -04:00
Tim Edwards e2f6a02688 Added and verified testbenches timer, timer2, uart, and user_pass_thru. 2021-10-18 21:53:09 -04:00
Tim Edwards 0fa2e3bb89 Added testbenches for irq, mem, mprj_ctrl, and pass_thru (note that "mem" 
does not pass yet and still needs to be debugged).
 2021-10-18 20:32:50 -04:00
Tim Edwards 2e57b5da08 Added and debugged two more testbenches, gpio_mgmt and hkspi. 2021-10-18 11:25:26 -04:00
Tim Edwards 842200b7ec Changed the memory map to move the 2e and 2f wishbone domains into 
the 26 domain (now dedicated to the housekeeping module), with
2e0... now 261... and 2f0... now 262...  Although this is not
strictly backwards-compatible, the addresses in defs.h have been
modified so that C code remains valid with a recompile.
 2021-10-16 17:58:36 -04:00
Tim Edwards bdfa747145 First major update; current code passes syntax checks in iverilog 
and simulates, but fails testbench (not surprising at this stage).
 2021-10-15 21:49:49 -04:00