From 889aa7e3082eb5e871d287a58996b875dbea9592 Mon Sep 17 00:00:00 2001 From: mo-hosni Date: Thu, 13 Oct 2022 10:35:51 -0700 Subject: [PATCH 1/3] add buff_flash_clkrst --- def/buff_flash_clkrst.def | 571 ++++ gds/buff_flash_clkrst.gds.gz | Bin 0 -> 14151 bytes lef/buff_flash_clkrst.lef | 336 +++ lib/buff_flash_clkrst.lib | 583 ++++ mag/buff_flash_clkrst.mag | 2703 ++++++++++++++++++ maglef/buff_flash_clkrst.mag | 172 ++ openlane/buff_flash_clkrst/config.tcl | 48 + openlane/buff_flash_clkrst/drc_exclude.list | 80 + openlane/buff_flash_clkrst/pin_order.cfg | 7 + sdc/buff_flash_clkrst.sdc | 79 + sdf/buff_flash_clkrst.sdf | 186 ++ sdf/multicorner/max/buff_flash_clkrst.ff.sdf | 186 ++ sdf/multicorner/max/buff_flash_clkrst.ss.sdf | 186 ++ sdf/multicorner/max/buff_flash_clkrst.tt.sdf | 186 ++ sdf/multicorner/min/buff_flash_clkrst.ff.sdf | 186 ++ sdf/multicorner/min/buff_flash_clkrst.ss.sdf | 186 ++ sdf/multicorner/min/buff_flash_clkrst.tt.sdf | 186 ++ sdf/multicorner/nom/buff_flash_clkrst.ff.sdf | 186 ++ sdf/multicorner/nom/buff_flash_clkrst.ss.sdf | 186 ++ sdf/multicorner/nom/buff_flash_clkrst.tt.sdf | 186 ++ signoff/buff_flash_clkrst/OPENLANE_VERSION | 1 + signoff/buff_flash_clkrst/PDK_SOURCES | 1 + signoff/buff_flash_clkrst/metrics.csv | 2 + spef/buff_flash_clkrst.spef | 587 ++++ spef/multicorner/buff_flash_clkrst.max.spef | 619 ++++ spef/multicorner/buff_flash_clkrst.min.spef | 587 ++++ spef/multicorner/buff_flash_clkrst.nom.spef | 587 ++++ verilog/gl/buff_flash_clkrst.nl.v | 101 + verilog/gl/buff_flash_clkrst.v | 323 +++ verilog/rtl/buff_flash_clkrst.v | 5 + 30 files changed, 9252 insertions(+) create mode 100644 def/buff_flash_clkrst.def create mode 100644 gds/buff_flash_clkrst.gds.gz create mode 100644 lef/buff_flash_clkrst.lef create mode 100644 lib/buff_flash_clkrst.lib create mode 100644 mag/buff_flash_clkrst.mag create mode 100644 maglef/buff_flash_clkrst.mag create mode 100644 openlane/buff_flash_clkrst/config.tcl create mode 100644 openlane/buff_flash_clkrst/drc_exclude.list create mode 100644 openlane/buff_flash_clkrst/pin_order.cfg create mode 100644 sdc/buff_flash_clkrst.sdc create mode 100644 sdf/buff_flash_clkrst.sdf create mode 100644 sdf/multicorner/max/buff_flash_clkrst.ff.sdf create mode 100644 sdf/multicorner/max/buff_flash_clkrst.ss.sdf create mode 100644 sdf/multicorner/max/buff_flash_clkrst.tt.sdf create mode 100644 sdf/multicorner/min/buff_flash_clkrst.ff.sdf create mode 100644 sdf/multicorner/min/buff_flash_clkrst.ss.sdf create mode 100644 sdf/multicorner/min/buff_flash_clkrst.tt.sdf create mode 100644 sdf/multicorner/nom/buff_flash_clkrst.ff.sdf create mode 100644 sdf/multicorner/nom/buff_flash_clkrst.ss.sdf create mode 100644 sdf/multicorner/nom/buff_flash_clkrst.tt.sdf create mode 100644 signoff/buff_flash_clkrst/OPENLANE_VERSION create mode 100644 signoff/buff_flash_clkrst/PDK_SOURCES create mode 100644 signoff/buff_flash_clkrst/metrics.csv create mode 100644 spef/buff_flash_clkrst.spef create mode 100644 spef/multicorner/buff_flash_clkrst.max.spef create mode 100644 spef/multicorner/buff_flash_clkrst.min.spef create mode 100644 spef/multicorner/buff_flash_clkrst.nom.spef create mode 100644 verilog/gl/buff_flash_clkrst.nl.v create mode 100644 verilog/gl/buff_flash_clkrst.v create mode 100644 verilog/rtl/buff_flash_clkrst.v diff --git a/def/buff_flash_clkrst.def b/def/buff_flash_clkrst.def new file mode 100644 index 00000000..ee93b85a --- /dev/null +++ b/def/buff_flash_clkrst.def @@ -0,0 +1,571 @@ +VERSION 5.8 ; +DIVIDERCHAR "/" ; +BUSBITCHARS "[]" ; +DESIGN buff_flash_clkrst ; +UNITS DISTANCE MICRONS 1000 ; +DIEAREA ( 0 0 ) ( 40000 25000 ) ; +ROW ROW_0 unithd 1840 5440 N DO 78 BY 1 STEP 460 0 ; +ROW ROW_1 unithd 1840 8160 FS DO 78 BY 1 STEP 460 0 ; +ROW ROW_2 unithd 1840 10880 N DO 78 BY 1 STEP 460 0 ; +ROW ROW_3 unithd 1840 13600 FS DO 78 BY 1 STEP 460 0 ; +ROW ROW_4 unithd 1840 16320 N DO 78 BY 1 STEP 460 0 ; +TRACKS X 230 DO 87 STEP 460 LAYER li1 ; +TRACKS Y 170 DO 74 STEP 340 LAYER li1 ; +TRACKS X 170 DO 118 STEP 340 LAYER met1 ; +TRACKS Y 170 DO 74 STEP 340 LAYER met1 ; +TRACKS X 230 DO 87 STEP 460 LAYER met2 ; +TRACKS Y 230 DO 54 STEP 460 LAYER met2 ; +TRACKS X 340 DO 59 STEP 680 LAYER met3 ; +TRACKS Y 340 DO 37 STEP 680 LAYER met3 ; +TRACKS X 460 DO 43 STEP 920 LAYER met4 ; +TRACKS Y 460 DO 27 STEP 920 LAYER met4 ; +TRACKS X 1700 DO 12 STEP 3400 LAYER met5 ; +TRACKS Y 1700 DO 7 STEP 3400 LAYER met5 ; +GCELLGRID X 0 DO 5 STEP 6900 ; +GCELLGRID Y 0 DO 3 STEP 6900 ; +VIAS 3 ; + - via2_3_1600_480_1_5_320_320 + VIARULE M1M2_PR + CUTSIZE 150 150 + LAYERS met1 via met2 + CUTSPACING 170 170 + ENCLOSURE 85 165 55 85 + ROWCOL 1 5 ; + - via3_4_1600_480_1_4_400_400 + VIARULE M2M3_PR + CUTSIZE 200 200 + LAYERS met2 via2 met3 + CUTSPACING 200 200 + ENCLOSURE 40 85 65 65 + ROWCOL 1 4 ; + - via4_5_1600_480_1_4_400_400 + VIARULE M3M4_PR + CUTSIZE 200 200 + LAYERS met3 via3 met4 + CUTSPACING 200 200 + ENCLOSURE 90 60 100 65 + ROWCOL 1 4 ; +END VIAS +COMPONENTS 73 ; + - BUF\[0\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 5520 5440 ) N ; + - BUF\[10\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 28980 8160 ) FS ; + - BUF\[11\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 28980 13600 ) FS ; + - BUF\[12\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 28980 5440 ) FN ; + - BUF\[13\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 28980 16320 ) FN ; + - BUF\[14\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 21620 5440 ) FN ; + - BUF\[1\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 5520 16320 ) N ; + - BUF\[2\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 4600 8160 ) S ; + - BUF\[3\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 9200 13600 ) FS ; + - BUF\[4\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 8740 10880 ) FN ; + - BUF\[5\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 11500 8160 ) S ; + - BUF\[6\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 16100 13600 ) FS ; + - BUF\[7\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 18400 8160 ) FS ; + - BUF\[8\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 20700 10880 ) N ; + - BUF\[9\] sky130_fd_sc_hd__clkbuf_8 + PLACED ( 27600 10880 ) N ; + - FILLER_0_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 5440 ) N ; + - FILLER_0_27 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 14260 5440 ) N ; + - FILLER_0_29 sky130_ef_sc_hd__decap_12 + SOURCE DIST + PLACED ( 15180 5440 ) N ; + - FILLER_0_3 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 3220 5440 ) N ; + - FILLER_0_41 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 20700 5440 ) N ; + - FILLER_0_54 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 26680 5440 ) N ; + - FILLER_0_57 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 28060 5440 ) N ; + - FILLER_0_7 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 5060 5440 ) N ; + - FILLER_0_70 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 34040 5440 ) N ; + - FILLER_0_74 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 35880 5440 ) N ; + - FILLER_1_17 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 9660 8160 ) FS ; + - FILLER_1_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 3220 8160 ) FS ; + - FILLER_1_32 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 16560 8160 ) FS ; + - FILLER_1_47 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 23460 8160 ) FS ; + - FILLER_1_55 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 27140 8160 ) FS ; + - FILLER_1_57 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 28060 8160 ) FS ; + - FILLER_1_70 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 34040 8160 ) FS ; + - FILLER_1_74 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 35880 8160 ) FS ; + - FILLER_2_26 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 13800 10880 ) N ; + - FILLER_2_29 sky130_ef_sc_hd__decap_12 + SOURCE DIST + PLACED ( 15180 10880 ) N ; + - FILLER_2_3 sky130_ef_sc_hd__decap_12 + SOURCE DIST + PLACED ( 3220 10880 ) N ; + - FILLER_2_52 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 25760 10880 ) N ; + - FILLER_2_67 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 32660 10880 ) N ; + - FILLER_3_15 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 8740 13600 ) FS ; + - FILLER_3_27 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 14260 13600 ) FS ; + - FILLER_3_3 sky130_ef_sc_hd__decap_12 + SOURCE DIST + PLACED ( 3220 13600 ) FS ; + - FILLER_3_42 sky130_ef_sc_hd__decap_12 + SOURCE DIST + PLACED ( 21160 13600 ) FS ; + - FILLER_3_54 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 26680 13600 ) FS ; + - FILLER_3_57 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 28060 13600 ) FS ; + - FILLER_3_70 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 34040 13600 ) FS ; + - FILLER_3_74 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 35880 13600 ) FS ; + - FILLER_4_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 16320 ) N ; + - FILLER_4_27 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 14260 16320 ) N ; + - FILLER_4_29 sky130_ef_sc_hd__decap_12 + SOURCE DIST + PLACED ( 15180 16320 ) N ; + - FILLER_4_3 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 3220 16320 ) N ; + - FILLER_4_41 sky130_ef_sc_hd__decap_12 + SOURCE DIST + PLACED ( 20700 16320 ) N ; + - FILLER_4_53 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 26220 16320 ) N ; + - FILLER_4_57 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 28060 16320 ) N ; + - FILLER_4_7 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 5060 16320 ) N ; + - FILLER_4_70 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 34040 16320 ) N ; + - FILLER_4_74 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 35880 16320 ) N ; + - PHY_0 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 1840 5440 ) N ; + - PHY_1 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 36340 5440 ) FN ; + - PHY_2 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 1840 8160 ) FS ; + - PHY_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 36340 8160 ) S ; + - PHY_4 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 1840 10880 ) N ; + - PHY_5 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 36340 10880 ) FN ; + - PHY_6 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 1840 13600 ) FS ; + - PHY_7 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 36340 13600 ) S ; + - PHY_8 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 1840 16320 ) N ; + - PHY_9 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 36340 16320 ) FN ; + - TAP_10 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 14720 5440 ) N ; + - TAP_11 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 27600 5440 ) N ; + - TAP_12 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 27600 8160 ) FS ; + - TAP_13 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 14720 10880 ) N ; + - TAP_14 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 27600 13600 ) FS ; + - TAP_15 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 14720 16320 ) N ; + - TAP_16 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 27600 16320 ) N ; +END COMPONENTS +PINS 32 ; + - VGND + NET VGND + SPECIAL + DIRECTION INOUT + USE GROUND + + PORT + + LAYER met4 ( -800 -7040 ) ( 800 7040 ) + + LAYER met4 ( -9765 -7040 ) ( -8165 7040 ) + + LAYER met4 ( -18730 -7040 ) ( -17130 7040 ) + + LAYER met4 ( -27695 -7040 ) ( -26095 7040 ) + + FIXED ( 37695 12240 ) N ; + - VPWR + NET VPWR + SPECIAL + DIRECTION INOUT + USE POWER + + PORT + + LAYER met4 ( -800 -7040 ) ( 800 7040 ) + + LAYER met4 ( -9765 -7040 ) ( -8165 7040 ) + + LAYER met4 ( -18730 -7040 ) ( -17130 7040 ) + + LAYER met4 ( -27695 -7040 ) ( -26095 7040 ) + + FIXED ( 33215 12240 ) N ; + - in_n[0] + NET in_n[0] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 10810 23000 ) N ; + - in_n[10] + NET in_n[10] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 33810 23000 ) N ; + - in_n[11] + NET in_n[11] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 36110 23000 ) N ; + - in_n[1] + NET in_n[1] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 13110 23000 ) N ; + - in_n[2] + NET in_n[2] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 15410 23000 ) N ; + - in_n[3] + NET in_n[3] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 17710 23000 ) N ; + - in_n[4] + NET in_n[4] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 20010 23000 ) N ; + - in_n[5] + NET in_n[5] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 22310 23000 ) N ; + - in_n[6] + NET in_n[6] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 24610 23000 ) N ; + - in_n[7] + NET in_n[7] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 26910 23000 ) N ; + - in_n[8] + NET in_n[8] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 29210 23000 ) N ; + - in_n[9] + NET in_n[9] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 31510 23000 ) N ; + - in_s[0] + NET in_s[0] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 3910 2000 ) N ; + - in_s[1] + NET in_s[1] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 6210 2000 ) N ; + - in_s[2] + NET in_s[2] + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 8510 2000 ) N ; + - out_n[0] + NET out_n[0] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 3910 23000 ) N ; + - out_n[1] + NET out_n[1] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 6210 23000 ) N ; + - out_n[2] + NET out_n[2] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 8510 23000 ) N ; + - out_s[0] + NET out_s[0] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 10810 2000 ) N ; + - out_s[10] + NET out_s[10] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 33810 2000 ) N ; + - out_s[11] + NET out_s[11] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 36110 2000 ) N ; + - out_s[1] + NET out_s[1] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 13110 2000 ) N ; + - out_s[2] + NET out_s[2] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 15410 2000 ) N ; + - out_s[3] + NET out_s[3] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 17710 2000 ) N ; + - out_s[4] + NET out_s[4] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 20010 2000 ) N ; + - out_s[5] + NET out_s[5] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 22310 2000 ) N ; + - out_s[6] + NET out_s[6] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 24610 2000 ) N ; + - out_s[7] + NET out_s[7] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 26910 2000 ) N ; + - out_s[8] + NET out_s[8] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 29210 2000 ) N ; + - out_s[9] + NET out_s[9] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -2000 ) ( 140 2000 ) + + PLACED ( 31510 2000 ) N ; +END PINS +SPECIALNETS 2 ; + - VGND ( PIN VGND ) ( * VNB ) ( * VGND ) + USE GROUND + + ROUTED met1 480 + SHAPE FOLLOWPIN ( 1840 16320 ) ( 38495 16320 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 1840 10880 ) ( 38495 10880 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 1840 5440 ) ( 38495 5440 ) + NEW met4 1600 + SHAPE STRIPE ( 37695 5200 ) ( 37695 19280 ) + NEW met4 1600 + SHAPE STRIPE ( 28730 5200 ) ( 28730 19280 ) + NEW met4 1600 + SHAPE STRIPE ( 19765 5200 ) ( 19765 19280 ) + NEW met4 1600 + SHAPE STRIPE ( 10800 5200 ) ( 10800 19280 ) + NEW met3 330 + SHAPE STRIPE ( 36905 16320 ) ( 38485 16320 ) + NEW met3 0 + SHAPE STRIPE ( 37695 16320 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 36925 16320 ) ( 38465 16320 ) + NEW met2 0 + SHAPE STRIPE ( 37695 16320 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 37695 16320 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 36905 10880 ) ( 38485 10880 ) + NEW met3 0 + SHAPE STRIPE ( 37695 10880 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 36925 10880 ) ( 38465 10880 ) + NEW met2 0 + SHAPE STRIPE ( 37695 10880 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 37695 10880 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 36905 5440 ) ( 38485 5440 ) + NEW met3 0 + SHAPE STRIPE ( 37695 5440 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 36925 5440 ) ( 38465 5440 ) + NEW met2 0 + SHAPE STRIPE ( 37695 5440 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 37695 5440 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 27940 16320 ) ( 29520 16320 ) + NEW met3 0 + SHAPE STRIPE ( 28730 16320 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 27960 16320 ) ( 29500 16320 ) + NEW met2 0 + SHAPE STRIPE ( 28730 16320 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 28730 16320 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 27940 10880 ) ( 29520 10880 ) + NEW met3 0 + SHAPE STRIPE ( 28730 10880 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 27960 10880 ) ( 29500 10880 ) + NEW met2 0 + SHAPE STRIPE ( 28730 10880 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 28730 10880 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 27940 5440 ) ( 29520 5440 ) + NEW met3 0 + SHAPE STRIPE ( 28730 5440 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 27960 5440 ) ( 29500 5440 ) + NEW met2 0 + SHAPE STRIPE ( 28730 5440 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 28730 5440 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 18975 16320 ) ( 20555 16320 ) + NEW met3 0 + SHAPE STRIPE ( 19765 16320 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 18995 16320 ) ( 20535 16320 ) + NEW met2 0 + SHAPE STRIPE ( 19765 16320 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 19765 16320 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 18975 10880 ) ( 20555 10880 ) + NEW met3 0 + SHAPE STRIPE ( 19765 10880 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 18995 10880 ) ( 20535 10880 ) + NEW met2 0 + SHAPE STRIPE ( 19765 10880 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 19765 10880 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 18975 5440 ) ( 20555 5440 ) + NEW met3 0 + SHAPE STRIPE ( 19765 5440 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 18995 5440 ) ( 20535 5440 ) + NEW met2 0 + SHAPE STRIPE ( 19765 5440 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 19765 5440 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 10010 16320 ) ( 11590 16320 ) + NEW met3 0 + SHAPE STRIPE ( 10800 16320 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 10030 16320 ) ( 11570 16320 ) + NEW met2 0 + SHAPE STRIPE ( 10800 16320 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10800 16320 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 10010 10880 ) ( 11590 10880 ) + NEW met3 0 + SHAPE STRIPE ( 10800 10880 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 10030 10880 ) ( 11570 10880 ) + NEW met2 0 + SHAPE STRIPE ( 10800 10880 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10800 10880 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 10010 5440 ) ( 11590 5440 ) + NEW met3 0 + SHAPE STRIPE ( 10800 5440 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 10030 5440 ) ( 11570 5440 ) + NEW met2 0 + SHAPE STRIPE ( 10800 5440 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10800 5440 ) via2_3_1600_480_1_5_320_320 ; + - VPWR ( PIN VPWR ) ( * VPB ) ( * VPWR ) + USE POWER + + ROUTED met1 480 + SHAPE FOLLOWPIN ( 1840 19040 ) ( 37720 19040 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 1840 13600 ) ( 37720 13600 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 1840 8160 ) ( 37720 8160 ) + NEW met4 1600 + SHAPE STRIPE ( 33215 5200 ) ( 33215 19280 ) + NEW met4 1600 + SHAPE STRIPE ( 24250 5200 ) ( 24250 19280 ) + NEW met4 1600 + SHAPE STRIPE ( 15285 5200 ) ( 15285 19280 ) + NEW met4 1600 + SHAPE STRIPE ( 6320 5200 ) ( 6320 19280 ) + NEW met3 330 + SHAPE STRIPE ( 32425 19040 ) ( 34005 19040 ) + NEW met3 0 + SHAPE STRIPE ( 33215 19040 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 32445 19040 ) ( 33985 19040 ) + NEW met2 0 + SHAPE STRIPE ( 33215 19040 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 33215 19040 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 32425 13600 ) ( 34005 13600 ) + NEW met3 0 + SHAPE STRIPE ( 33215 13600 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 32445 13600 ) ( 33985 13600 ) + NEW met2 0 + SHAPE STRIPE ( 33215 13600 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 33215 13600 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 32425 8160 ) ( 34005 8160 ) + NEW met3 0 + SHAPE STRIPE ( 33215 8160 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 32445 8160 ) ( 33985 8160 ) + NEW met2 0 + SHAPE STRIPE ( 33215 8160 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 33215 8160 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 23460 19040 ) ( 25040 19040 ) + NEW met3 0 + SHAPE STRIPE ( 24250 19040 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 23480 19040 ) ( 25020 19040 ) + NEW met2 0 + SHAPE STRIPE ( 24250 19040 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 24250 19040 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 23460 13600 ) ( 25040 13600 ) + NEW met3 0 + SHAPE STRIPE ( 24250 13600 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 23480 13600 ) ( 25020 13600 ) + NEW met2 0 + SHAPE STRIPE ( 24250 13600 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 24250 13600 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 23460 8160 ) ( 25040 8160 ) + NEW met3 0 + SHAPE STRIPE ( 24250 8160 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 23480 8160 ) ( 25020 8160 ) + NEW met2 0 + SHAPE STRIPE ( 24250 8160 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 24250 8160 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 14495 19040 ) ( 16075 19040 ) + NEW met3 0 + SHAPE STRIPE ( 15285 19040 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 14515 19040 ) ( 16055 19040 ) + NEW met2 0 + SHAPE STRIPE ( 15285 19040 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 15285 19040 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 14495 13600 ) ( 16075 13600 ) + NEW met3 0 + SHAPE STRIPE ( 15285 13600 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 14515 13600 ) ( 16055 13600 ) + NEW met2 0 + SHAPE STRIPE ( 15285 13600 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 15285 13600 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 14495 8160 ) ( 16075 8160 ) + NEW met3 0 + SHAPE STRIPE ( 15285 8160 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 14515 8160 ) ( 16055 8160 ) + NEW met2 0 + SHAPE STRIPE ( 15285 8160 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 15285 8160 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 5530 19040 ) ( 7110 19040 ) + NEW met3 0 + SHAPE STRIPE ( 6320 19040 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 5550 19040 ) ( 7090 19040 ) + NEW met2 0 + SHAPE STRIPE ( 6320 19040 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 6320 19040 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 5530 13600 ) ( 7110 13600 ) + NEW met3 0 + SHAPE STRIPE ( 6320 13600 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 5550 13600 ) ( 7090 13600 ) + NEW met2 0 + SHAPE STRIPE ( 6320 13600 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 6320 13600 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 5530 8160 ) ( 7110 8160 ) + NEW met3 0 + SHAPE STRIPE ( 6320 8160 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 5550 8160 ) ( 7090 8160 ) + NEW met2 0 + SHAPE STRIPE ( 6320 8160 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 6320 8160 ) via2_3_1600_480_1_5_320_320 ; +END SPECIALNETS +NETS 30 ; + - in_n[0] ( PIN in_n[0] ) ( BUF\[3\] A ) + USE SIGNAL + + ROUTED met2 ( 9430 15470 ) ( * 21420 ) + NEW met2 ( 9430 21420 ) ( 10810 * 0 ) + NEW li1 ( 9430 15470 ) L1M1_PR_MR + NEW met1 ( 9430 15470 ) M1M2_PR + NEW met1 ( 9430 15470 ) RECT ( -355 -70 0 70 ) ; + - in_n[10] ( PIN in_n[10] ) ( BUF\[13\] A ) + USE SIGNAL + + ROUTED met1 ( 33810 17510 ) ( 34270 * ) + NEW met2 ( 34270 17510 ) ( * 20060 ) + NEW met2 ( 33810 20060 ) ( 34270 * ) + NEW met2 ( 33810 20060 ) ( * 21420 0 ) + NEW li1 ( 33810 17510 ) L1M1_PR_MR + NEW met1 ( 34270 17510 ) M1M2_PR ; + - in_n[11] ( PIN in_n[11] ) ( BUF\[14\] A ) + USE SIGNAL + + ROUTED met1 ( 26450 6630 ) ( 31510 * ) + NEW met1 ( 31510 6630 ) ( * 6970 ) + NEW met1 ( 31510 6970 ) ( 34270 * ) + NEW met1 ( 34270 6630 ) ( * 6970 ) + NEW met1 ( 34270 6630 ) ( 36110 * ) + NEW met2 ( 36110 6630 ) ( * 21420 0 ) + NEW li1 ( 26450 6630 ) L1M1_PR_MR + NEW met1 ( 36110 6630 ) M1M2_PR ; + - in_n[1] ( PIN in_n[1] ) ( BUF\[4\] A ) + USE SIGNAL + + ROUTED met2 ( 13570 12070 ) ( * 21420 ) + NEW met2 ( 13110 21420 0 ) ( 13570 * ) + NEW li1 ( 13570 12070 ) L1M1_PR_MR + NEW met1 ( 13570 12070 ) M1M2_PR + NEW met1 ( 13570 12070 ) RECT ( -355 -70 0 70 ) ; + - in_n[2] ( PIN in_n[2] ) ( BUF\[5\] A ) + USE SIGNAL + + ROUTED met1 ( 14030 10030 ) ( 16330 * ) + NEW met2 ( 14030 10030 ) ( * 21420 ) + NEW met2 ( 14030 21420 ) ( 15410 * 0 ) + NEW li1 ( 16330 10030 ) L1M1_PR_MR + NEW met1 ( 14030 10030 ) M1M2_PR ; + - in_n[3] ( PIN in_n[3] ) ( BUF\[6\] A ) + USE SIGNAL + + ROUTED met2 ( 16330 15470 ) ( * 21420 ) + NEW met2 ( 16330 21420 ) ( 17710 * 0 ) + NEW li1 ( 16330 15470 ) L1M1_PR_MR + NEW met1 ( 16330 15470 ) M1M2_PR + NEW met1 ( 16330 15470 ) RECT ( -355 -70 0 70 ) ; + - in_n[4] ( PIN in_n[4] ) ( BUF\[7\] A ) + USE SIGNAL + + ROUTED met2 ( 18630 10030 ) ( * 21420 ) + NEW met2 ( 18630 21420 ) ( 20010 * 0 ) + NEW li1 ( 18630 10030 ) L1M1_PR_MR + NEW met1 ( 18630 10030 ) M1M2_PR + NEW met1 ( 18630 10030 ) RECT ( -355 -70 0 70 ) ; + - in_n[5] ( PIN in_n[5] ) ( BUF\[8\] A ) + USE SIGNAL + + ROUTED met2 ( 20930 12070 ) ( * 21420 ) + NEW met2 ( 20930 21420 ) ( 22310 * 0 ) + NEW li1 ( 20930 12070 ) L1M1_PR_MR + NEW met1 ( 20930 12070 ) M1M2_PR + NEW met1 ( 20930 12070 ) RECT ( -355 -70 0 70 ) ; + - in_n[6] ( PIN in_n[6] ) ( BUF\[9\] A ) + USE SIGNAL + + ROUTED met1 ( 26450 12070 ) ( 27830 * ) + NEW met2 ( 26450 12070 ) ( * 21420 ) + NEW met2 ( 24610 21420 0 ) ( 26450 * ) + NEW li1 ( 27830 12070 ) L1M1_PR_MR + NEW met1 ( 26450 12070 ) M1M2_PR ; + - in_n[7] ( PIN in_n[7] ) ( BUF\[10\] A ) + USE SIGNAL + + ROUTED met1 ( 26910 10030 ) ( 29210 * ) + NEW met2 ( 26910 10030 ) ( * 21420 0 ) + NEW li1 ( 29210 10030 ) L1M1_PR_MR + NEW met1 ( 26910 10030 ) M1M2_PR ; + - in_n[8] ( PIN in_n[8] ) ( BUF\[11\] A ) + USE SIGNAL + + ROUTED met1 ( 29210 15470 ) ( 30130 * ) + NEW met2 ( 30130 15470 ) ( * 18020 ) + NEW met2 ( 29210 18020 ) ( 30130 * ) + NEW met2 ( 29210 18020 ) ( * 21420 0 ) + NEW li1 ( 29210 15470 ) L1M1_PR_MR + NEW met1 ( 30130 15470 ) M1M2_PR ; + - in_n[9] ( PIN in_n[9] ) ( BUF\[12\] A ) + USE SIGNAL + + ROUTED met1 ( 31970 6630 ) ( 33810 * ) + NEW met2 ( 31970 6630 ) ( * 21420 ) + NEW met2 ( 31510 21420 0 ) ( 31970 * ) + NEW li1 ( 33810 6630 ) L1M1_PR_MR + NEW met1 ( 31970 6630 ) M1M2_PR ; + - in_s[0] ( PIN in_s[0] ) ( BUF\[0\] A ) + USE SIGNAL + + ROUTED met2 ( 3910 3740 0 ) ( * 6290 ) + NEW met1 ( 3910 6290 ) ( 5750 * ) + NEW met1 ( 3910 6290 ) M1M2_PR + NEW li1 ( 5750 6290 ) L1M1_PR_MR ; + - in_s[1] ( PIN in_s[1] ) ( BUF\[1\] A ) + USE SIGNAL + + ROUTED met2 ( 6210 3740 0 ) ( * 7140 ) + NEW met2 ( 5290 7140 ) ( 6210 * ) + NEW met2 ( 5290 7140 ) ( * 17170 ) + NEW met1 ( 5290 17170 ) ( 5750 * ) + NEW met1 ( 5290 17170 ) M1M2_PR + NEW li1 ( 5750 17170 ) L1M1_PR_MR ; + - in_s[2] ( PIN in_s[2] ) ( BUF\[2\] A ) + USE SIGNAL + + ROUTED met2 ( 8510 3740 0 ) ( * 9690 ) + NEW met1 ( 8510 9690 ) ( 9430 * ) + NEW met1 ( 8510 9690 ) M1M2_PR + NEW li1 ( 9430 9690 ) L1M1_PR_MR ; + - out_n[0] ( PIN out_n[0] ) ( BUF\[0\] X ) + USE SIGNAL + + ROUTED met1 ( 4830 6630 ) ( 9430 * ) + NEW met2 ( 4830 6630 ) ( * 21420 ) + NEW met2 ( 3910 21420 0 ) ( 4830 * ) + NEW li1 ( 9430 6630 ) L1M1_PR_MR + NEW met1 ( 4830 6630 ) M1M2_PR ; + - out_n[1] ( PIN out_n[1] ) ( BUF\[1\] X ) + USE SIGNAL + + ROUTED met1 ( 7590 17850 ) ( 9430 * ) + NEW met2 ( 7590 17850 ) ( * 21420 ) + NEW met2 ( 6210 21420 0 ) ( 7590 * ) + NEW li1 ( 9430 17850 ) L1M1_PR_MR + NEW met1 ( 7590 17850 ) M1M2_PR ; + - out_n[2] ( PIN out_n[2] ) ( BUF\[2\] X ) + USE SIGNAL + + ROUTED met1 ( 5750 10030 ) ( 8050 * ) + NEW met2 ( 8050 10030 ) ( * 21420 ) + NEW met2 ( 8050 21420 ) ( 8510 * 0 ) + NEW li1 ( 5750 10030 ) L1M1_PR_MR + NEW met1 ( 8050 10030 ) M1M2_PR ; + - out_s[0] ( PIN out_s[0] ) ( BUF\[3\] X ) + USE SIGNAL + + ROUTED met2 ( 10810 3740 0 ) ( * 4420 ) + NEW met2 ( 10810 4420 ) ( 11270 * ) + NEW met2 ( 11270 3740 ) ( * 4420 ) + NEW met2 ( 11270 3740 ) ( 12190 * ) + NEW met2 ( 12190 3740 ) ( * 14790 ) + NEW met1 ( 12190 14790 ) ( 13110 * ) + NEW met1 ( 12190 14790 ) M1M2_PR + NEW li1 ( 13110 14790 ) L1M1_PR_MR ; + - out_s[10] ( PIN out_s[10] ) ( BUF\[13\] X ) + USE SIGNAL + + ROUTED met2 ( 33810 3740 0 ) ( * 7140 ) + NEW met2 ( 33810 7140 ) ( 34270 * ) + NEW met2 ( 34270 7140 ) ( * 16830 ) + NEW met1 ( 34270 16830 ) ( * 17170 ) + NEW met1 ( 30130 17170 ) ( 34270 * ) + NEW met1 ( 34270 16830 ) M1M2_PR + NEW li1 ( 30130 17170 ) L1M1_PR_MR ; + - out_s[11] ( PIN out_s[11] ) ( BUF\[14\] X ) + USE SIGNAL + + ROUTED met2 ( 36110 3740 0 ) ( * 5950 ) + NEW met1 ( 22770 5950 ) ( 36110 * ) + NEW met1 ( 22770 5950 ) ( * 6290 ) + NEW met1 ( 36110 5950 ) M1M2_PR + NEW li1 ( 22770 6290 ) L1M1_PR_MR ; + - out_s[1] ( PIN out_s[1] ) ( BUF\[4\] X ) + USE SIGNAL + + ROUTED met2 ( 13110 3740 0 ) ( * 11730 ) + NEW met1 ( 9890 11730 ) ( 13110 * ) + NEW met1 ( 13110 11730 ) M1M2_PR + NEW li1 ( 9890 11730 ) L1M1_PR_MR ; + - out_s[2] ( PIN out_s[2] ) ( BUF\[5\] X ) + USE SIGNAL + + ROUTED met2 ( 15410 3740 0 ) ( * 4420 ) + NEW met2 ( 14950 4420 ) ( 15410 * ) + NEW met2 ( 14950 3740 ) ( * 4420 ) + NEW met2 ( 14030 3740 ) ( 14950 * ) + NEW met2 ( 14030 3740 ) ( * 9350 ) + NEW met1 ( 12650 9350 ) ( 14030 * ) + NEW met1 ( 14030 9350 ) M1M2_PR + NEW li1 ( 12650 9350 ) L1M1_PR_MR ; + - out_s[3] ( PIN out_s[3] ) ( BUF\[6\] X ) + USE SIGNAL + + ROUTED met2 ( 17710 3740 0 ) ( * 14790 ) + NEW met1 ( 17710 14790 ) ( 20010 * ) + NEW met1 ( 17710 14790 ) M1M2_PR + NEW li1 ( 20010 14790 ) L1M1_PR_MR ; + - out_s[4] ( PIN out_s[4] ) ( BUF\[7\] X ) + USE SIGNAL + + ROUTED met2 ( 20010 3740 0 ) ( * 4420 ) + NEW met2 ( 20010 4420 ) ( 20930 * ) + NEW met2 ( 20930 4420 ) ( * 9350 ) + NEW met1 ( 20930 9350 ) ( 22310 * ) + NEW met1 ( 20930 9350 ) M1M2_PR + NEW li1 ( 22310 9350 ) L1M1_PR_MR ; + - out_s[5] ( PIN out_s[5] ) ( BUF\[8\] X ) + USE SIGNAL + + ROUTED met2 ( 22310 3740 0 ) ( * 11730 ) + NEW met1 ( 22310 11730 ) ( 24610 * ) + NEW met1 ( 22310 11730 ) M1M2_PR + NEW li1 ( 24610 11730 ) L1M1_PR_MR ; + - out_s[6] ( PIN out_s[6] ) ( BUF\[9\] X ) + USE SIGNAL + + ROUTED met2 ( 24610 3740 0 ) ( * 5780 ) + NEW met2 ( 24610 5780 ) ( 25530 * ) + NEW met2 ( 25530 5780 ) ( * 11730 ) + NEW met1 ( 25530 11730 ) ( 31510 * ) + NEW met1 ( 25530 11730 ) M1M2_PR + NEW li1 ( 31510 11730 ) L1M1_PR_MR ; + - out_s[7] ( PIN out_s[7] ) ( BUF\[10\] X ) + USE SIGNAL + + ROUTED met2 ( 26910 3740 0 ) ( * 9350 ) + NEW met1 ( 26910 9350 ) ( 32890 * ) + NEW met1 ( 26910 9350 ) M1M2_PR + NEW li1 ( 32890 9350 ) L1M1_PR_MR ; + - out_s[8] ( PIN out_s[8] ) ( BUF\[11\] X ) + USE SIGNAL + + ROUTED met2 ( 29210 3740 0 ) ( * 4420 ) + NEW met2 ( 29210 4420 ) ( 30130 * ) + NEW met2 ( 30130 4420 ) ( * 14790 ) + NEW met1 ( 30130 14790 ) ( 32890 * ) + NEW met1 ( 30130 14790 ) M1M2_PR + NEW li1 ( 32890 14790 ) L1M1_PR_MR ; + - out_s[9] ( PIN out_s[9] ) ( BUF\[12\] X ) + USE SIGNAL + + ROUTED met2 ( 31510 3740 0 ) ( * 6290 ) + NEW met1 ( 30130 6290 ) ( 31510 * ) + NEW met1 ( 31510 6290 ) M1M2_PR + NEW li1 ( 30130 6290 ) L1M1_PR_MR ; +END NETS +END DESIGN diff --git a/gds/buff_flash_clkrst.gds.gz b/gds/buff_flash_clkrst.gds.gz new file mode 100644 index 0000000000000000000000000000000000000000..6f1d7361803a77a8cf8fd5826d28c93c4c916748 GIT binary patch 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zgwfG!JgpqM3avQ#Jpz5v`>xH^;xmlsLf+();IzBlWxXJ%XpFMUbbsJvCfm08NuFV_ xAn&ZQ{Z`$+sBCwu+ri3qpSm5cY%|pD-<9o=xl!EycHB2!u#n!tU%vUve*;5(PnrM# literal 0 HcmV?d00001 diff --git a/lef/buff_flash_clkrst.lef b/lef/buff_flash_clkrst.lef new file mode 100644 index 00000000..83a42551 --- /dev/null +++ b/lef/buff_flash_clkrst.lef @@ -0,0 +1,336 @@ +VERSION 5.7 ; + NOWIREEXTENSIONATPIN ON ; + DIVIDERCHAR "/" ; + BUSBITCHARS "[]" ; +MACRO buff_flash_clkrst + CLASS BLOCK ; + FOREIGN buff_flash_clkrst ; + ORIGIN 0.000 0.000 ; + SIZE 40.000 BY 25.000 ; + PIN VGND + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER met4 ; + RECT 10.000 5.200 11.600 19.280 ; + END + PORT + LAYER met4 ; + RECT 18.965 5.200 20.565 19.280 ; + END + PORT + LAYER met4 ; + RECT 27.930 5.200 29.530 19.280 ; + END + PORT + LAYER met4 ; + RECT 36.895 5.200 38.495 19.280 ; + END + END VGND + PIN VPWR + DIRECTION INOUT ; + USE POWER ; + PORT + LAYER met4 ; + RECT 5.520 5.200 7.120 19.280 ; + END + PORT + LAYER met4 ; + RECT 14.485 5.200 16.085 19.280 ; + END + PORT + LAYER met4 ; + RECT 23.450 5.200 25.050 19.280 ; + END + PORT + LAYER met4 ; + RECT 32.415 5.200 34.015 19.280 ; + END + END VPWR + PIN in_n[0] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 10.670 21.000 10.950 25.000 ; + END + END in_n[0] + PIN in_n[10] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 33.670 21.000 33.950 25.000 ; + END + END in_n[10] + PIN in_n[11] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 35.970 21.000 36.250 25.000 ; + END + END in_n[11] + PIN in_n[1] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 12.970 21.000 13.250 25.000 ; + END + END in_n[1] + PIN in_n[2] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 15.270 21.000 15.550 25.000 ; + END + END in_n[2] + PIN in_n[3] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 17.570 21.000 17.850 25.000 ; + END + END in_n[3] + PIN in_n[4] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 19.870 21.000 20.150 25.000 ; + END + END in_n[4] + PIN in_n[5] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 22.170 21.000 22.450 25.000 ; + END + END in_n[5] + PIN in_n[6] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 24.470 21.000 24.750 25.000 ; + END + END in_n[6] + PIN in_n[7] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 26.770 21.000 27.050 25.000 ; + END + END in_n[7] + PIN in_n[8] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 29.070 21.000 29.350 25.000 ; + END + END in_n[8] + PIN in_n[9] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 31.370 21.000 31.650 25.000 ; + END + END in_n[9] + PIN in_s[0] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 3.770 0.000 4.050 4.000 ; + END + END in_s[0] + PIN in_s[1] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 6.070 0.000 6.350 4.000 ; + END + END in_s[1] + PIN in_s[2] + DIRECTION INPUT ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 8.370 0.000 8.650 4.000 ; + END + END in_s[2] + PIN out_n[0] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 3.770 21.000 4.050 25.000 ; + END + END out_n[0] + PIN out_n[1] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 6.070 21.000 6.350 25.000 ; + END + END out_n[1] + PIN out_n[2] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 8.370 21.000 8.650 25.000 ; + END + END out_n[2] + PIN out_s[0] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 10.670 0.000 10.950 4.000 ; + END + END out_s[0] + PIN out_s[10] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 33.670 0.000 33.950 4.000 ; + END + END out_s[10] + PIN out_s[11] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 35.970 0.000 36.250 4.000 ; + END + END out_s[11] + PIN out_s[1] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 12.970 0.000 13.250 4.000 ; + END + END out_s[1] + PIN out_s[2] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 15.270 0.000 15.550 4.000 ; + END + END out_s[2] + PIN out_s[3] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 17.570 0.000 17.850 4.000 ; + END + END out_s[3] + PIN out_s[4] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 19.870 0.000 20.150 4.000 ; + END + END out_s[4] + PIN out_s[5] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 22.170 0.000 22.450 4.000 ; + END + END out_s[5] + PIN out_s[6] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 24.470 0.000 24.750 4.000 ; + END + END out_s[6] + PIN out_s[7] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 26.770 0.000 27.050 4.000 ; + END + END out_s[7] + PIN out_s[8] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 29.070 0.000 29.350 4.000 ; + END + END out_s[8] + PIN out_s[9] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 31.370 0.000 31.650 4.000 ; + END + END out_s[9] + OBS + LAYER nwell ; + RECT 1.650 17.625 37.910 19.230 ; + RECT 1.650 12.185 37.910 15.015 ; + RECT 1.650 6.745 37.910 9.575 ; + LAYER li1 ; + RECT 1.840 5.355 37.720 19.125 ; + LAYER met1 ; + RECT 1.840 5.200 38.495 19.280 ; + LAYER met2 ; + RECT 4.330 20.720 5.790 21.490 ; + RECT 6.630 20.720 8.090 21.490 ; + RECT 8.930 20.720 10.390 21.490 ; + RECT 11.230 20.720 12.690 21.490 ; + RECT 13.530 20.720 14.990 21.490 ; + RECT 15.830 20.720 17.290 21.490 ; + RECT 18.130 20.720 19.590 21.490 ; + RECT 20.430 20.720 21.890 21.490 ; + RECT 22.730 20.720 24.190 21.490 ; + RECT 25.030 20.720 26.490 21.490 ; + RECT 27.330 20.720 28.790 21.490 ; + RECT 29.630 20.720 31.090 21.490 ; + RECT 31.930 20.720 33.390 21.490 ; + RECT 34.230 20.720 35.690 21.490 ; + RECT 36.530 20.720 38.465 21.490 ; + RECT 3.780 4.280 38.465 20.720 ; + RECT 4.330 3.670 5.790 4.280 ; + RECT 6.630 3.670 8.090 4.280 ; + RECT 8.930 3.670 10.390 4.280 ; + RECT 11.230 3.670 12.690 4.280 ; + RECT 13.530 3.670 14.990 4.280 ; + RECT 15.830 3.670 17.290 4.280 ; + RECT 18.130 3.670 19.590 4.280 ; + RECT 20.430 3.670 21.890 4.280 ; + RECT 22.730 3.670 24.190 4.280 ; + RECT 25.030 3.670 26.490 4.280 ; + RECT 27.330 3.670 28.790 4.280 ; + RECT 29.630 3.670 31.090 4.280 ; + RECT 31.930 3.670 33.390 4.280 ; + RECT 34.230 3.670 35.690 4.280 ; + RECT 36.530 3.670 38.465 4.280 ; + LAYER met3 ; + RECT 5.530 5.275 38.485 19.205 ; + END +END buff_flash_clkrst +END LIBRARY + diff --git a/lib/buff_flash_clkrst.lib b/lib/buff_flash_clkrst.lib new file mode 100644 index 00000000..51ef8663 --- /dev/null +++ b/lib/buff_flash_clkrst.lib @@ -0,0 +1,583 @@ +library (buff_flash_clkrst) { + comment : ""; + delay_model : table_lookup; + simulation : false; + capacitive_load_unit (1,pF); + leakage_power_unit : 1pW; + current_unit : "1A"; + pulling_resistance_unit : "1kohm"; + time_unit : "1ns"; + voltage_unit : "1v"; + library_features(report_delay_calculation); + + input_threshold_pct_rise : 50; + input_threshold_pct_fall : 50; + output_threshold_pct_rise : 50; + output_threshold_pct_fall : 50; + slew_lower_threshold_pct_rise : 20; + slew_lower_threshold_pct_fall : 20; + slew_upper_threshold_pct_rise : 80; + slew_upper_threshold_pct_fall : 80; + slew_derate_from_library : 1.0; + + + nom_process : 1.0; + nom_temperature : 25.0; + nom_voltage : 1.80; + + lu_table_template(template_1) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_10) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_11) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_12) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_13) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_14) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_15) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_16) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_17) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_18) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_19) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_2) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_20) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_21) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_22) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_23) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_24) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_25) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_26) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_27) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_28) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_29) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_3) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_30) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_4) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_5) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_6) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_7) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_8) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + lu_table_template(template_9) { + variable_1 : total_output_net_capacitance; + index_1 ("0.00050, 0.00175, 0.00610, 0.02132, 0.07449, 0.26022, 0.90913"); + } + type ("in_n") { + base_type : array; + data_type : bit; + bit_width : 12; + bit_from : 11; + bit_to : 0; + } + type ("in_s") { + base_type : array; + data_type : bit; + bit_width : 3; + bit_from : 2; + bit_to : 0; + } + type ("out_n") { + base_type : array; + data_type : bit; + bit_width : 3; + bit_from : 2; + bit_to : 0; + } + type ("out_s") { + base_type : array; + data_type : bit; + bit_width : 12; + bit_from : 11; + bit_to : 0; + } + + cell ("buff_flash_clkrst") { + pin("VPWR") { + direction : input; + capacitance : 0.0002; + } + pin("VGND") { + direction : input; + capacitance : 0.0002; + } + bus("in_n") { + bus_type : in_n; + direction : input; + capacitance : 0.0000; + pin("in_n[11]") { + direction : input; + capacitance : 0.0071; + } + pin("in_n[10]") { + direction : input; + capacitance : 0.0047; + } + pin("in_n[9]") { + direction : input; + capacitance : 0.0061; + } + pin("in_n[8]") { + direction : input; + capacitance : 0.0050; + } + pin("in_n[7]") { + direction : input; + capacitance : 0.0060; + } + pin("in_n[6]") { + direction : input; + capacitance : 0.0059; + } + pin("in_n[5]") { + direction : input; + capacitance : 0.0052; + } + pin("in_n[4]") { + direction : input; + capacitance : 0.0055; + } + pin("in_n[3]") { + direction : input; + capacitance : 0.0049; + } + pin("in_n[2]") { + direction : input; + capacitance : 0.0062; + } + pin("in_n[1]") { + direction : input; + capacitance : 0.0055; + } + pin("in_n[0]") { + direction : input; + capacitance : 0.0049; + } + } + bus("in_s") { + bus_type : in_s; + direction : input; + capacitance : 0.0000; + pin("in_s[2]") { + direction : input; + capacitance : 0.0049; + } + pin("in_s[1]") { + direction : input; + capacitance : 0.0061; + } + pin("in_s[0]") { + direction : input; + capacitance : 0.0047; + } + } + bus("out_n") { + bus_type : out_n; + direction : output; + capacitance : 0.0000; + pin("out_n[2]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_s[2]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_29) { + values("0.12205,0.12483,0.13320,0.15618,0.22127,0.43583,1.18473"); + } + rise_transition(template_29) { + values("0.02209,0.02435,0.03145,0.05499,0.13876,0.44350,1.51271"); + } + cell_fall(template_30) { + values("0.12088,0.12342,0.13084,0.14981,0.19636,0.33046,0.78848"); + } + fall_transition(template_30) { + values("0.02101,0.02246,0.02767,0.04268,0.08998,0.26118,0.88479"); + } + } + } + pin("out_n[1]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_s[1]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_27) { + values("0.12720,0.12998,0.13836,0.16133,0.22643,0.44114,1.18891"); + } + rise_transition(template_27) { + values("0.02209,0.02433,0.03145,0.05498,0.13875,0.44330,1.51127"); + } + cell_fall(template_28) { + values("0.12337,0.12590,0.13332,0.15231,0.19882,0.33296,0.79091"); + } + fall_transition(template_28) { + values("0.02104,0.02245,0.02769,0.04266,0.08998,0.26119,0.88461"); + } + } + } + pin("out_n[0]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_s[0]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_25) { + values("0.12244,0.12522,0.13359,0.15658,0.22167,0.43621,1.18525"); + } + rise_transition(template_25) { + values("0.02209,0.02435,0.03146,0.05499,0.13876,0.44352,1.51289"); + } + cell_fall(template_26) { + values("0.12131,0.12386,0.13128,0.15024,0.19680,0.33089,0.78892"); + } + fall_transition(template_26) { + values("0.02101,0.02246,0.02767,0.04268,0.08997,0.26118,0.88481"); + } + } + } + } + bus("out_s") { + bus_type : out_s; + direction : output; + capacitance : 0.0000; + pin("out_s[11]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[11]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_5) { + values("0.13459,0.13737,0.14576,0.16871,0.23382,0.44864,1.19553"); + } + rise_transition(template_5) { + values("0.02209,0.02432,0.03144,0.05497,0.13874,0.44315,1.51013"); + } + cell_fall(template_6) { + values("0.12778,0.13030,0.13772,0.15673,0.20321,0.33738,0.79528"); + } + fall_transition(template_6) { + values("0.02106,0.02244,0.02770,0.04264,0.08998,0.26119,0.88446"); + } + } + } + pin("out_s[10]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[10]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_3) { + values("0.12170,0.12448,0.13285,0.15583,0.22093,0.43546,1.18452"); + } + rise_transition(template_3) { + values("0.02209,0.02435,0.03146,0.05499,0.13876,0.44353,1.51292"); + } + cell_fall(template_4) { + values("0.12079,0.12334,0.13076,0.14972,0.19628,0.33037,0.78841"); + } + fall_transition(template_4) { + values("0.02101,0.02246,0.02767,0.04268,0.08997,0.26118,0.88481"); + } + } + } + pin("out_s[9]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[9]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_23) { + values("0.12666,0.12945,0.13783,0.16079,0.22589,0.44060,1.18840"); + } + rise_transition(template_23) { + values("0.02209,0.02433,0.03145,0.05498,0.13875,0.44331,1.51130"); + } + cell_fall(template_24) { + values("0.12300,0.12553,0.13296,0.15194,0.19846,0.33259,0.79055"); + } + fall_transition(template_24) { + values("0.02104,0.02245,0.02769,0.04266,0.08998,0.26119,0.88461"); + } + } + } + pin("out_s[8]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[8]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_21) { + values("0.12260,0.12538,0.13375,0.15673,0.22183,0.43640,1.18519"); + } + rise_transition(template_21) { + values("0.02209,0.02435,0.03145,0.05499,0.13876,0.44348,1.51258"); + } + cell_fall(template_22) { + values("0.12116,0.12371,0.13113,0.15009,0.19664,0.33074,0.78876"); + } + fall_transition(template_22) { + values("0.02102,0.02246,0.02767,0.04268,0.08998,0.26118,0.88477"); + } + } + } + pin("out_s[7]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[7]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_19) { + values("0.12734,0.13012,0.13850,0.16147,0.22657,0.44127,1.18913"); + } + rise_transition(template_19) { + values("0.02209,0.02434,0.03145,0.05498,0.13875,0.44332,1.51139"); + } + cell_fall(template_20) { + values("0.12358,0.12611,0.13354,0.15252,0.19904,0.33317,0.79113"); + } + fall_transition(template_20) { + values("0.02104,0.02245,0.02769,0.04266,0.08998,0.26118,0.88462"); + } + } + } + pin("out_s[6]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[6]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_17) { + values("0.12738,0.13016,0.13854,0.16151,0.22661,0.44129,1.18928"); + } + rise_transition(template_17) { + values("0.02209,0.02434,0.03145,0.05498,0.13875,0.44334,1.51155"); + } + cell_fall(template_18) { + values("0.12376,0.12629,0.13371,0.15269,0.19922,0.33334,0.79131"); + } + fall_transition(template_18) { + values("0.02104,0.02245,0.02768,0.04266,0.08998,0.26118,0.88464"); + } + } + } + pin("out_s[5]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[5]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_15) { + values("0.12304,0.12582,0.13419,0.15717,0.22227,0.43687,1.18545"); + } + rise_transition(template_15) { + values("0.02209,0.02434,0.03145,0.05499,0.13876,0.44344,1.51232"); + } + cell_fall(template_16) { + values("0.12125,0.12379,0.13122,0.15018,0.19673,0.33084,0.78884"); + } + fall_transition(template_16) { + values("0.02102,0.02245,0.02767,0.04267,0.08998,0.26118,0.88474"); + } + } + } + pin("out_s[4]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[4]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_13) { + values("0.12397,0.12675,0.13513,0.15810,0.22320,0.43783,1.18618"); + } + rise_transition(template_13) { + values("0.02209,0.02434,0.03145,0.05498,0.13875,0.44340,1.51201"); + } + cell_fall(template_14) { + values("0.12166,0.12420,0.13163,0.15060,0.19714,0.33125,0.78924"); + } + fall_transition(template_14) { + values("0.02103,0.02245,0.02768,0.04267,0.08998,0.26118,0.88470"); + } + } + } + pin("out_s[3]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[3]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_11) { + values("0.12175,0.12453,0.13290,0.15588,0.22098,0.43553,1.18443"); + } + rise_transition(template_11) { + values("0.02209,0.02435,0.03145,0.05499,0.13876,0.44350,1.51271"); + } + cell_fall(template_12) { + values("0.12066,0.12320,0.13063,0.14959,0.19614,0.33024,0.78826"); + } + fall_transition(template_12) { + values("0.02101,0.02246,0.02767,0.04268,0.08998,0.26118,0.88479"); + } + } + } + pin("out_s[2]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[2]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_9) { + values("0.12766,0.13044,0.13883,0.16179,0.22689,0.44161,1.18933"); + } + rise_transition(template_9) { + values("0.02209,0.02433,0.03145,0.05498,0.13875,0.44330,1.51120"); + } + cell_fall(template_10) { + values("0.12366,0.12619,0.13361,0.15260,0.19911,0.33325,0.79120"); + } + fall_transition(template_10) { + values("0.02104,0.02245,0.02769,0.04266,0.08998,0.26119,0.88460"); + } + } + } + pin("out_s[1]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[1]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_7) { + values("0.12485,0.12763,0.13601,0.15898,0.22408,0.43872,1.18704"); + } + rise_transition(template_7) { + values("0.02209,0.02434,0.03145,0.05498,0.13875,0.44340,1.51198"); + } + cell_fall(template_8) { + values("0.12228,0.12482,0.13224,0.15122,0.19775,0.33187,0.78986"); + } + fall_transition(template_8) { + values("0.02103,0.02245,0.02768,0.04267,0.08998,0.26118,0.88469"); + } + } + } + pin("out_s[0]") { + direction : output; + capacitance : 0.0334; + timing() { + related_pin : "in_n[0]"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise(template_1) { + values("0.12197,0.12475,0.13312,0.15611,0.22120,0.43576,1.18463"); + } + rise_transition(template_1) { + values("0.02209,0.02435,0.03145,0.05499,0.13876,0.44349,1.51268"); + } + cell_fall(template_2) { + values("0.12080,0.12335,0.13077,0.14973,0.19629,0.33038,0.78841"); + } + fall_transition(template_2) { + values("0.02102,0.02246,0.02767,0.04268,0.08998,0.26118,0.88478"); + } + } + } + } + } + +} diff --git a/mag/buff_flash_clkrst.mag b/mag/buff_flash_clkrst.mag new file mode 100644 index 00000000..ffb6cdc1 --- /dev/null +++ b/mag/buff_flash_clkrst.mag @@ -0,0 +1,2703 @@ +magic +tech sky130A +magscale 1 2 +timestamp 1665682149 +<< viali >> +rect 1869 3553 1903 3587 +rect 6745 3485 6779 3519 +rect 1133 3417 1167 3451 +rect 6009 3417 6043 3451 +rect 1869 3077 1903 3111 +rect 3249 3077 3283 3111 +rect 5825 3077 5859 3111 +rect 2605 2941 2639 2975 +rect 3985 2941 4019 2975 +rect 6561 2941 6595 2975 +rect 2697 2397 2731 2431 +rect 4169 2397 4203 2431 +rect 5549 2397 5583 2431 +rect 1961 2329 1995 2363 +rect 4905 2329 4939 2363 +rect 6285 2329 6319 2363 +rect 1133 1989 1167 2023 +rect 3249 1989 3283 2023 +rect 3709 1989 3743 2023 +rect 5825 1989 5859 2023 +rect 1869 1921 1903 1955 +rect 2513 1853 2547 1887 +rect 4445 1853 4479 1887 +rect 6561 1853 6595 1887 +rect 1869 1309 1903 1343 +rect 5273 1309 5307 1343 +rect 6745 1309 6779 1343 +rect 1133 1241 1167 1275 +rect 4537 1241 4571 1275 +rect 6009 1241 6043 1275 +<< metal1 >> +rect 368 3834 7544 3856 +rect 368 3782 1110 3834 +rect 1162 3782 1174 3834 +rect 1226 3782 1238 3834 +rect 1290 3782 1302 3834 +rect 1354 3782 1366 3834 +rect 1418 3782 2903 3834 +rect 2955 3782 2967 3834 +rect 3019 3782 3031 3834 +rect 3083 3782 3095 3834 +rect 3147 3782 3159 3834 +rect 3211 3782 4696 3834 +rect 4748 3782 4760 3834 +rect 4812 3782 4824 3834 +rect 4876 3782 4888 3834 +rect 4940 3782 4952 3834 +rect 5004 3782 6489 3834 +rect 6541 3782 6553 3834 +rect 6605 3782 6617 3834 +rect 6669 3782 6681 3834 +rect 6733 3782 6745 3834 +rect 6797 3782 7544 3834 +rect 368 3760 7544 3782 +rect 1486 3544 1492 3596 +rect 1544 3584 1550 3596 +rect 1857 3587 1915 3593 +rect 1857 3584 1869 3587 +rect 1544 3556 1869 3584 +rect 1544 3544 1550 3556 +rect 1857 3553 1869 3556 +rect 1903 3553 1915 3587 +rect 1857 3547 1915 3553 +rect 6733 3519 6791 3525 +rect 6733 3485 6745 3519 +rect 6779 3516 6791 3519 +rect 6822 3516 6828 3528 +rect 6779 3488 6828 3516 +rect 6779 3485 6791 3488 +rect 6733 3479 6791 3485 +rect 6822 3476 6828 3488 +rect 6880 3476 6886 3528 +rect 1026 3408 1032 3460 +rect 1084 3448 1090 3460 +rect 1121 3451 1179 3457 +rect 1121 3448 1133 3451 +rect 1084 3420 1133 3448 +rect 1084 3408 1090 3420 +rect 1121 3417 1133 3420 +rect 1167 3417 1179 3451 +rect 1121 3411 1179 3417 +rect 5997 3451 6055 3457 +rect 5997 3417 6009 3451 +rect 6043 3448 6055 3451 +rect 6043 3420 6868 3448 +rect 6043 3417 6055 3420 +rect 5997 3411 6055 3417 +rect 6840 3392 6868 3420 +rect 6822 3340 6828 3392 +rect 6880 3340 6886 3392 +rect 368 3290 7699 3312 +rect 368 3238 2006 3290 +rect 2058 3238 2070 3290 +rect 2122 3238 2134 3290 +rect 2186 3238 2198 3290 +rect 2250 3238 2262 3290 +rect 2314 3238 3799 3290 +rect 3851 3238 3863 3290 +rect 3915 3238 3927 3290 +rect 3979 3238 3991 3290 +rect 4043 3238 4055 3290 +rect 4107 3238 5592 3290 +rect 5644 3238 5656 3290 +rect 5708 3238 5720 3290 +rect 5772 3238 5784 3290 +rect 5836 3238 5848 3290 +rect 5900 3238 7385 3290 +rect 7437 3238 7449 3290 +rect 7501 3238 7513 3290 +rect 7565 3238 7577 3290 +rect 7629 3238 7641 3290 +rect 7693 3238 7699 3290 +rect 368 3216 7699 3238 +rect 1854 3108 1860 3120 +rect 1815 3080 1860 3108 +rect 1854 3068 1860 3080 +rect 1912 3068 1918 3120 +rect 3234 3108 3240 3120 +rect 3195 3080 3240 3108 +rect 3234 3068 3240 3080 +rect 3292 3068 3298 3120 +rect 5813 3111 5871 3117 +rect 5813 3077 5825 3111 +rect 5859 3108 5871 3111 +rect 5994 3108 6000 3120 +rect 5859 3080 6000 3108 +rect 5859 3077 5871 3080 +rect 5813 3071 5871 3077 +rect 5994 3068 6000 3080 +rect 6052 3068 6058 3120 +rect 2406 2932 2412 2984 +rect 2464 2972 2470 2984 +rect 2593 2975 2651 2981 +rect 2593 2972 2605 2975 +rect 2464 2944 2605 2972 +rect 2464 2932 2470 2944 +rect 2593 2941 2605 2944 +rect 2639 2941 2651 2975 +rect 2593 2935 2651 2941 +rect 3510 2932 3516 2984 +rect 3568 2972 3574 2984 +rect 3973 2975 4031 2981 +rect 3973 2972 3985 2975 +rect 3568 2944 3985 2972 +rect 3568 2932 3574 2944 +rect 3973 2941 3985 2944 +rect 4019 2941 4031 2975 +rect 3973 2935 4031 2941 +rect 5994 2932 6000 2984 +rect 6052 2972 6058 2984 +rect 6549 2975 6607 2981 +rect 6549 2972 6561 2975 +rect 6052 2944 6561 2972 +rect 6052 2932 6058 2944 +rect 6549 2941 6561 2944 +rect 6595 2941 6607 2975 +rect 6549 2935 6607 2941 +rect 368 2746 7544 2768 +rect 368 2694 1110 2746 +rect 1162 2694 1174 2746 +rect 1226 2694 1238 2746 +rect 1290 2694 1302 2746 +rect 1354 2694 1366 2746 +rect 1418 2694 2903 2746 +rect 2955 2694 2967 2746 +rect 3019 2694 3031 2746 +rect 3083 2694 3095 2746 +rect 3147 2694 3159 2746 +rect 3211 2694 4696 2746 +rect 4748 2694 4760 2746 +rect 4812 2694 4824 2746 +rect 4876 2694 4888 2746 +rect 4940 2694 4952 2746 +rect 5004 2694 6489 2746 +rect 6541 2694 6553 2746 +rect 6605 2694 6617 2746 +rect 6669 2694 6681 2746 +rect 6733 2694 6745 2746 +rect 6797 2694 7544 2746 +rect 368 2672 7544 2694 +rect 2682 2428 2688 2440 +rect 2643 2400 2688 2428 +rect 2682 2388 2688 2400 +rect 2740 2388 2746 2440 +rect 4154 2428 4160 2440 +rect 4115 2400 4160 2428 +rect 4154 2388 4160 2400 +rect 4212 2388 4218 2440 +rect 5258 2388 5264 2440 +rect 5316 2428 5322 2440 +rect 5537 2431 5595 2437 +rect 5537 2428 5549 2431 +rect 5316 2400 5549 2428 +rect 5316 2388 5322 2400 +rect 5537 2397 5549 2400 +rect 5583 2397 5595 2431 +rect 5537 2391 5595 2397 +rect 1949 2363 2007 2369 +rect 1949 2329 1961 2363 +rect 1995 2360 2007 2363 +rect 2590 2360 2596 2372 +rect 1995 2332 2596 2360 +rect 1995 2329 2007 2332 +rect 1949 2323 2007 2329 +rect 2590 2320 2596 2332 +rect 2648 2320 2654 2372 +rect 4430 2320 4436 2372 +rect 4488 2360 4494 2372 +rect 4893 2363 4951 2369 +rect 4893 2360 4905 2363 +rect 4488 2332 4905 2360 +rect 4488 2320 4494 2332 +rect 4893 2329 4905 2332 +rect 4939 2329 4951 2363 +rect 4893 2323 4951 2329 +rect 5074 2320 5080 2372 +rect 5132 2360 5138 2372 +rect 6273 2363 6331 2369 +rect 6273 2360 6285 2363 +rect 5132 2332 6285 2360 +rect 5132 2320 5138 2332 +rect 6273 2329 6285 2332 +rect 6319 2329 6331 2363 +rect 6273 2323 6331 2329 +rect 368 2202 7699 2224 +rect 368 2150 2006 2202 +rect 2058 2150 2070 2202 +rect 2122 2150 2134 2202 +rect 2186 2150 2198 2202 +rect 2250 2150 2262 2202 +rect 2314 2150 3799 2202 +rect 3851 2150 3863 2202 +rect 3915 2150 3927 2202 +rect 3979 2150 3991 2202 +rect 4043 2150 4055 2202 +rect 4107 2150 5592 2202 +rect 5644 2150 5656 2202 +rect 5708 2150 5720 2202 +rect 5772 2150 5784 2202 +rect 5836 2150 5848 2202 +rect 5900 2150 7385 2202 +rect 7437 2150 7449 2202 +rect 7501 2150 7513 2202 +rect 7565 2150 7577 2202 +rect 7629 2150 7641 2202 +rect 7693 2150 7699 2202 +rect 368 2128 7699 2150 +rect 1121 2023 1179 2029 +rect 1121 1989 1133 2023 +rect 1167 2020 1179 2023 +rect 1578 2020 1584 2032 +rect 1167 1992 1584 2020 +rect 1167 1989 1179 1992 +rect 1121 1983 1179 1989 +rect 1578 1980 1584 1992 +rect 1636 1980 1642 2032 +rect 2774 1980 2780 2032 +rect 2832 2020 2838 2032 +rect 3237 2023 3295 2029 +rect 3237 2020 3249 2023 +rect 2832 1992 3249 2020 +rect 2832 1980 2838 1992 +rect 3237 1989 3249 1992 +rect 3283 1989 3295 2023 +rect 3694 2020 3700 2032 +rect 3655 1992 3700 2020 +rect 3237 1983 3295 1989 +rect 3694 1980 3700 1992 +rect 3752 1980 3758 2032 +rect 5350 1980 5356 2032 +rect 5408 2020 5414 2032 +rect 5813 2023 5871 2029 +rect 5813 2020 5825 2023 +rect 5408 1992 5825 2020 +rect 5408 1980 5414 1992 +rect 5813 1989 5825 1992 +rect 5859 1989 5871 2023 +rect 5813 1983 5871 1989 +rect 1670 1912 1676 1964 +rect 1728 1952 1734 1964 +rect 1857 1955 1915 1961 +rect 1857 1952 1869 1955 +rect 1728 1924 1869 1952 +rect 1728 1912 1734 1924 +rect 1857 1921 1869 1924 +rect 1903 1921 1915 1955 +rect 1857 1915 1915 1921 +rect 2501 1887 2559 1893 +rect 2501 1853 2513 1887 +rect 2547 1884 2559 1887 +rect 2774 1884 2780 1896 +rect 2547 1856 2780 1884 +rect 2547 1853 2559 1856 +rect 2501 1847 2559 1853 +rect 2774 1844 2780 1856 +rect 2832 1844 2838 1896 +rect 4154 1844 4160 1896 +rect 4212 1884 4218 1896 +rect 4433 1887 4491 1893 +rect 4433 1884 4445 1887 +rect 4212 1856 4445 1884 +rect 4212 1844 4218 1856 +rect 4433 1853 4445 1856 +rect 4479 1853 4491 1887 +rect 4433 1847 4491 1853 +rect 5350 1844 5356 1896 +rect 5408 1884 5414 1896 +rect 6549 1887 6607 1893 +rect 6549 1884 6561 1887 +rect 5408 1856 6561 1884 +rect 5408 1844 5414 1856 +rect 6549 1853 6561 1856 +rect 6595 1853 6607 1887 +rect 6549 1847 6607 1853 +rect 368 1658 7544 1680 +rect 368 1606 1110 1658 +rect 1162 1606 1174 1658 +rect 1226 1606 1238 1658 +rect 1290 1606 1302 1658 +rect 1354 1606 1366 1658 +rect 1418 1606 2903 1658 +rect 2955 1606 2967 1658 +rect 3019 1606 3031 1658 +rect 3083 1606 3095 1658 +rect 3147 1606 3159 1658 +rect 3211 1606 4696 1658 +rect 4748 1606 4760 1658 +rect 4812 1606 4824 1658 +rect 4876 1606 4888 1658 +rect 4940 1606 4952 1658 +rect 5004 1606 6489 1658 +rect 6541 1606 6553 1658 +rect 6605 1606 6617 1658 +rect 6669 1606 6681 1658 +rect 6733 1606 6745 1658 +rect 6797 1606 7544 1658 +rect 368 1584 7544 1606 +rect 6288 1380 6868 1408 +rect 934 1300 940 1352 +rect 992 1340 998 1352 +rect 1857 1343 1915 1349 +rect 1857 1340 1869 1343 +rect 992 1312 1869 1340 +rect 992 1300 998 1312 +rect 1857 1309 1869 1312 +rect 1903 1309 1915 1343 +rect 1857 1303 1915 1309 +rect 5261 1343 5319 1349 +rect 5261 1309 5273 1343 +rect 5307 1340 5319 1343 +rect 6288 1340 6316 1380 +rect 5307 1312 6316 1340 +rect 5307 1309 5319 1312 +rect 5261 1303 5319 1309 +rect 6362 1300 6368 1352 +rect 6420 1340 6426 1352 +rect 6733 1343 6791 1349 +rect 6733 1340 6745 1343 +rect 6420 1312 6745 1340 +rect 6420 1300 6426 1312 +rect 6733 1309 6745 1312 +rect 6779 1309 6791 1343 +rect 6840 1340 6868 1380 +rect 7190 1340 7196 1352 +rect 6840 1312 7196 1340 +rect 6733 1303 6791 1309 +rect 7190 1300 7196 1312 +rect 7248 1300 7254 1352 +rect 750 1232 756 1284 +rect 808 1272 814 1284 +rect 1121 1275 1179 1281 +rect 1121 1272 1133 1275 +rect 808 1244 1133 1272 +rect 808 1232 814 1244 +rect 1121 1241 1133 1244 +rect 1167 1241 1179 1275 +rect 1121 1235 1179 1241 +rect 4525 1275 4583 1281 +rect 4525 1241 4537 1275 +rect 4571 1241 4583 1275 +rect 4525 1235 4583 1241 +rect 5997 1275 6055 1281 +rect 5997 1241 6009 1275 +rect 6043 1272 6055 1275 +rect 6270 1272 6276 1284 +rect 6043 1244 6276 1272 +rect 6043 1241 6055 1244 +rect 5997 1235 6055 1241 +rect 4540 1204 4568 1235 +rect 6270 1232 6276 1244 +rect 6328 1232 6334 1284 +rect 7190 1204 7196 1216 +rect 4540 1176 7196 1204 +rect 7190 1164 7196 1176 +rect 7248 1164 7254 1216 +rect 368 1114 7699 1136 +rect 368 1062 2006 1114 +rect 2058 1062 2070 1114 +rect 2122 1062 2134 1114 +rect 2186 1062 2198 1114 +rect 2250 1062 2262 1114 +rect 2314 1062 3799 1114 +rect 3851 1062 3863 1114 +rect 3915 1062 3927 1114 +rect 3979 1062 3991 1114 +rect 4043 1062 4055 1114 +rect 4107 1062 5592 1114 +rect 5644 1062 5656 1114 +rect 5708 1062 5720 1114 +rect 5772 1062 5784 1114 +rect 5836 1062 5848 1114 +rect 5900 1062 7385 1114 +rect 7437 1062 7449 1114 +rect 7501 1062 7513 1114 +rect 7565 1062 7577 1114 +rect 7629 1062 7641 1114 +rect 7693 1062 7699 1114 +rect 368 1040 7699 1062 +<< via1 >> +rect 1110 3782 1162 3834 +rect 1174 3782 1226 3834 +rect 1238 3782 1290 3834 +rect 1302 3782 1354 3834 +rect 1366 3782 1418 3834 +rect 2903 3782 2955 3834 +rect 2967 3782 3019 3834 +rect 3031 3782 3083 3834 +rect 3095 3782 3147 3834 +rect 3159 3782 3211 3834 +rect 4696 3782 4748 3834 +rect 4760 3782 4812 3834 +rect 4824 3782 4876 3834 +rect 4888 3782 4940 3834 +rect 4952 3782 5004 3834 +rect 6489 3782 6541 3834 +rect 6553 3782 6605 3834 +rect 6617 3782 6669 3834 +rect 6681 3782 6733 3834 +rect 6745 3782 6797 3834 +rect 1492 3544 1544 3596 +rect 6828 3476 6880 3528 +rect 1032 3408 1084 3460 +rect 6828 3340 6880 3392 +rect 2006 3238 2058 3290 +rect 2070 3238 2122 3290 +rect 2134 3238 2186 3290 +rect 2198 3238 2250 3290 +rect 2262 3238 2314 3290 +rect 3799 3238 3851 3290 +rect 3863 3238 3915 3290 +rect 3927 3238 3979 3290 +rect 3991 3238 4043 3290 +rect 4055 3238 4107 3290 +rect 5592 3238 5644 3290 +rect 5656 3238 5708 3290 +rect 5720 3238 5772 3290 +rect 5784 3238 5836 3290 +rect 5848 3238 5900 3290 +rect 7385 3238 7437 3290 +rect 7449 3238 7501 3290 +rect 7513 3238 7565 3290 +rect 7577 3238 7629 3290 +rect 7641 3238 7693 3290 +rect 1860 3111 1912 3120 +rect 1860 3077 1869 3111 +rect 1869 3077 1903 3111 +rect 1903 3077 1912 3111 +rect 1860 3068 1912 3077 +rect 3240 3111 3292 3120 +rect 3240 3077 3249 3111 +rect 3249 3077 3283 3111 +rect 3283 3077 3292 3111 +rect 3240 3068 3292 3077 +rect 6000 3068 6052 3120 +rect 2412 2932 2464 2984 +rect 3516 2932 3568 2984 +rect 6000 2932 6052 2984 +rect 1110 2694 1162 2746 +rect 1174 2694 1226 2746 +rect 1238 2694 1290 2746 +rect 1302 2694 1354 2746 +rect 1366 2694 1418 2746 +rect 2903 2694 2955 2746 +rect 2967 2694 3019 2746 +rect 3031 2694 3083 2746 +rect 3095 2694 3147 2746 +rect 3159 2694 3211 2746 +rect 4696 2694 4748 2746 +rect 4760 2694 4812 2746 +rect 4824 2694 4876 2746 +rect 4888 2694 4940 2746 +rect 4952 2694 5004 2746 +rect 6489 2694 6541 2746 +rect 6553 2694 6605 2746 +rect 6617 2694 6669 2746 +rect 6681 2694 6733 2746 +rect 6745 2694 6797 2746 +rect 2688 2431 2740 2440 +rect 2688 2397 2697 2431 +rect 2697 2397 2731 2431 +rect 2731 2397 2740 2431 +rect 2688 2388 2740 2397 +rect 4160 2431 4212 2440 +rect 4160 2397 4169 2431 +rect 4169 2397 4203 2431 +rect 4203 2397 4212 2431 +rect 4160 2388 4212 2397 +rect 5264 2388 5316 2440 +rect 2596 2320 2648 2372 +rect 4436 2320 4488 2372 +rect 5080 2320 5132 2372 +rect 2006 2150 2058 2202 +rect 2070 2150 2122 2202 +rect 2134 2150 2186 2202 +rect 2198 2150 2250 2202 +rect 2262 2150 2314 2202 +rect 3799 2150 3851 2202 +rect 3863 2150 3915 2202 +rect 3927 2150 3979 2202 +rect 3991 2150 4043 2202 +rect 4055 2150 4107 2202 +rect 5592 2150 5644 2202 +rect 5656 2150 5708 2202 +rect 5720 2150 5772 2202 +rect 5784 2150 5836 2202 +rect 5848 2150 5900 2202 +rect 7385 2150 7437 2202 +rect 7449 2150 7501 2202 +rect 7513 2150 7565 2202 +rect 7577 2150 7629 2202 +rect 7641 2150 7693 2202 +rect 1584 1980 1636 2032 +rect 2780 1980 2832 2032 +rect 3700 2023 3752 2032 +rect 3700 1989 3709 2023 +rect 3709 1989 3743 2023 +rect 3743 1989 3752 2023 +rect 3700 1980 3752 1989 +rect 5356 1980 5408 2032 +rect 1676 1912 1728 1964 +rect 2780 1844 2832 1896 +rect 4160 1844 4212 1896 +rect 5356 1844 5408 1896 +rect 1110 1606 1162 1658 +rect 1174 1606 1226 1658 +rect 1238 1606 1290 1658 +rect 1302 1606 1354 1658 +rect 1366 1606 1418 1658 +rect 2903 1606 2955 1658 +rect 2967 1606 3019 1658 +rect 3031 1606 3083 1658 +rect 3095 1606 3147 1658 +rect 3159 1606 3211 1658 +rect 4696 1606 4748 1658 +rect 4760 1606 4812 1658 +rect 4824 1606 4876 1658 +rect 4888 1606 4940 1658 +rect 4952 1606 5004 1658 +rect 6489 1606 6541 1658 +rect 6553 1606 6605 1658 +rect 6617 1606 6669 1658 +rect 6681 1606 6733 1658 +rect 6745 1606 6797 1658 +rect 940 1300 992 1352 +rect 6368 1300 6420 1352 +rect 7196 1300 7248 1352 +rect 756 1232 808 1284 +rect 6276 1232 6328 1284 +rect 7196 1164 7248 1216 +rect 2006 1062 2058 1114 +rect 2070 1062 2122 1114 +rect 2134 1062 2186 1114 +rect 2198 1062 2250 1114 +rect 2262 1062 2314 1114 +rect 3799 1062 3851 1114 +rect 3863 1062 3915 1114 +rect 3927 1062 3979 1114 +rect 3991 1062 4043 1114 +rect 4055 1062 4107 1114 +rect 5592 1062 5644 1114 +rect 5656 1062 5708 1114 +rect 5720 1062 5772 1114 +rect 5784 1062 5836 1114 +rect 5848 1062 5900 1114 +rect 7385 1062 7437 1114 +rect 7449 1062 7501 1114 +rect 7513 1062 7565 1114 +rect 7577 1062 7629 1114 +rect 7641 1062 7693 1114 +<< metal2 >> +rect 754 4298 810 5000 +rect 1214 4298 1270 5000 +rect 1674 4298 1730 5000 +rect 2134 4298 2190 5000 +rect 754 4270 980 4298 +rect 754 4200 810 4270 +rect 952 1358 980 4270 +rect 1214 4270 1532 4298 +rect 1214 4200 1270 4270 +rect 1110 3836 1418 3845 +rect 1110 3834 1116 3836 +rect 1172 3834 1196 3836 +rect 1252 3834 1276 3836 +rect 1332 3834 1356 3836 +rect 1412 3834 1418 3836 +rect 1172 3782 1174 3834 +rect 1354 3782 1356 3834 +rect 1110 3780 1116 3782 +rect 1172 3780 1196 3782 +rect 1252 3780 1276 3782 +rect 1332 3780 1356 3782 +rect 1412 3780 1418 3782 +rect 1110 3771 1418 3780 +rect 1504 3602 1532 4270 +rect 1596 4270 1730 4298 +rect 1492 3596 1544 3602 +rect 1492 3538 1544 3544 +rect 1032 3460 1084 3466 +rect 1032 3402 1084 3408 +rect 1044 1442 1072 3402 +rect 1110 2748 1418 2757 +rect 1110 2746 1116 2748 +rect 1172 2746 1196 2748 +rect 1252 2746 1276 2748 +rect 1332 2746 1356 2748 +rect 1412 2746 1418 2748 +rect 1172 2694 1174 2746 +rect 1354 2694 1356 2746 +rect 1110 2692 1116 2694 +rect 1172 2692 1196 2694 +rect 1252 2692 1276 2694 +rect 1332 2692 1356 2694 +rect 1412 2692 1418 2694 +rect 1110 2683 1418 2692 +rect 1596 2038 1624 4270 +rect 1674 4200 1730 4270 +rect 1872 4270 2190 4298 +rect 1872 3126 1900 4270 +rect 2134 4200 2190 4270 +rect 2594 4298 2650 5000 +rect 3054 4298 3110 5000 +rect 3514 4298 3570 5000 +rect 3974 4298 4030 5000 +rect 4434 4298 4490 5000 +rect 2594 4270 2728 4298 +rect 2594 4200 2650 4270 +rect 2006 3292 2314 3301 +rect 2006 3290 2012 3292 +rect 2068 3290 2092 3292 +rect 2148 3290 2172 3292 +rect 2228 3290 2252 3292 +rect 2308 3290 2314 3292 +rect 2068 3238 2070 3290 +rect 2250 3238 2252 3290 +rect 2006 3236 2012 3238 +rect 2068 3236 2092 3238 +rect 2148 3236 2172 3238 +rect 2228 3236 2252 3238 +rect 2308 3236 2314 3238 +rect 2006 3227 2314 3236 +rect 1860 3120 1912 3126 +rect 1860 3062 1912 3068 +rect 2412 2984 2464 2990 +rect 2412 2926 2464 2932 +rect 2006 2204 2314 2213 +rect 2006 2202 2012 2204 +rect 2068 2202 2092 2204 +rect 2148 2202 2172 2204 +rect 2228 2202 2252 2204 +rect 2308 2202 2314 2204 +rect 2068 2150 2070 2202 +rect 2250 2150 2252 2202 +rect 2006 2148 2012 2150 +rect 2068 2148 2092 2150 +rect 2148 2148 2172 2150 +rect 2228 2148 2252 2150 +rect 2308 2148 2314 2150 +rect 2006 2139 2314 2148 +rect 1584 2032 1636 2038 +rect 1584 1974 1636 1980 +rect 1676 1964 1728 1970 +rect 1676 1906 1728 1912 +rect 1110 1660 1418 1669 +rect 1110 1658 1116 1660 +rect 1172 1658 1196 1660 +rect 1252 1658 1276 1660 +rect 1332 1658 1356 1660 +rect 1412 1658 1418 1660 +rect 1172 1606 1174 1658 +rect 1354 1606 1356 1658 +rect 1110 1604 1116 1606 +rect 1172 1604 1196 1606 +rect 1252 1604 1276 1606 +rect 1332 1604 1356 1606 +rect 1412 1604 1418 1606 +rect 1110 1595 1418 1604 +rect 1044 1414 1256 1442 +rect 940 1352 992 1358 +rect 940 1294 992 1300 +rect 756 1284 808 1290 +rect 756 1226 808 1232 +rect 768 800 796 1226 +rect 1228 800 1256 1414 +rect 1688 800 1716 1906 +rect 2006 1116 2314 1125 +rect 2006 1114 2012 1116 +rect 2068 1114 2092 1116 +rect 2148 1114 2172 1116 +rect 2228 1114 2252 1116 +rect 2308 1114 2314 1116 +rect 2068 1062 2070 1114 +rect 2250 1062 2252 1114 +rect 2006 1060 2012 1062 +rect 2068 1060 2092 1062 +rect 2148 1060 2172 1062 +rect 2228 1060 2252 1062 +rect 2308 1060 2314 1062 +rect 2006 1051 2314 1060 +rect 2148 870 2268 898 +rect 2148 800 2176 870 +rect 754 0 810 800 +rect 1214 0 1270 800 +rect 1674 0 1730 800 +rect 2134 0 2190 800 +rect 2240 762 2268 870 +rect 2424 762 2452 2926 +rect 2700 2446 2728 4270 +rect 2792 4270 3110 4298 +rect 2688 2440 2740 2446 +rect 2688 2382 2740 2388 +rect 2596 2372 2648 2378 +rect 2596 2314 2648 2320 +rect 2608 800 2636 2314 +rect 2792 2038 2820 4270 +rect 3054 4200 3110 4270 +rect 3252 4270 3570 4298 +rect 2903 3836 3211 3845 +rect 2903 3834 2909 3836 +rect 2965 3834 2989 3836 +rect 3045 3834 3069 3836 +rect 3125 3834 3149 3836 +rect 3205 3834 3211 3836 +rect 2965 3782 2967 3834 +rect 3147 3782 3149 3834 +rect 2903 3780 2909 3782 +rect 2965 3780 2989 3782 +rect 3045 3780 3069 3782 +rect 3125 3780 3149 3782 +rect 3205 3780 3211 3782 +rect 2903 3771 3211 3780 +rect 3252 3126 3280 4270 +rect 3514 4200 3570 4270 +rect 3712 4270 4030 4298 +rect 3240 3120 3292 3126 +rect 3240 3062 3292 3068 +rect 3516 2984 3568 2990 +rect 3516 2926 3568 2932 +rect 2903 2748 3211 2757 +rect 2903 2746 2909 2748 +rect 2965 2746 2989 2748 +rect 3045 2746 3069 2748 +rect 3125 2746 3149 2748 +rect 3205 2746 3211 2748 +rect 2965 2694 2967 2746 +rect 3147 2694 3149 2746 +rect 2903 2692 2909 2694 +rect 2965 2692 2989 2694 +rect 3045 2692 3069 2694 +rect 3125 2692 3149 2694 +rect 3205 2692 3211 2694 +rect 2903 2683 3211 2692 +rect 2780 2032 2832 2038 +rect 2780 1974 2832 1980 +rect 2780 1896 2832 1902 +rect 2780 1838 2832 1844 +rect 2240 734 2452 762 +rect 2594 0 2650 800 +rect 2792 762 2820 1838 +rect 2903 1660 3211 1669 +rect 2903 1658 2909 1660 +rect 2965 1658 2989 1660 +rect 3045 1658 3069 1660 +rect 3125 1658 3149 1660 +rect 3205 1658 3211 1660 +rect 2965 1606 2967 1658 +rect 3147 1606 3149 1658 +rect 2903 1604 2909 1606 +rect 2965 1604 2989 1606 +rect 3045 1604 3069 1606 +rect 3125 1604 3149 1606 +rect 3205 1604 3211 1606 +rect 2903 1595 3211 1604 +rect 2976 870 3096 898 +rect 2976 762 3004 870 +rect 3068 800 3096 870 +rect 3528 800 3556 2926 +rect 3712 2038 3740 4270 +rect 3974 4200 4030 4270 +rect 4172 4270 4490 4298 +rect 3799 3292 4107 3301 +rect 3799 3290 3805 3292 +rect 3861 3290 3885 3292 +rect 3941 3290 3965 3292 +rect 4021 3290 4045 3292 +rect 4101 3290 4107 3292 +rect 3861 3238 3863 3290 +rect 4043 3238 4045 3290 +rect 3799 3236 3805 3238 +rect 3861 3236 3885 3238 +rect 3941 3236 3965 3238 +rect 4021 3236 4045 3238 +rect 4101 3236 4107 3238 +rect 3799 3227 4107 3236 +rect 4172 2446 4200 4270 +rect 4434 4200 4490 4270 +rect 4894 4298 4950 5000 +rect 4894 4270 5304 4298 +rect 4894 4200 4950 4270 +rect 4696 3836 5004 3845 +rect 4696 3834 4702 3836 +rect 4758 3834 4782 3836 +rect 4838 3834 4862 3836 +rect 4918 3834 4942 3836 +rect 4998 3834 5004 3836 +rect 4758 3782 4760 3834 +rect 4940 3782 4942 3834 +rect 4696 3780 4702 3782 +rect 4758 3780 4782 3782 +rect 4838 3780 4862 3782 +rect 4918 3780 4942 3782 +rect 4998 3780 5004 3782 +rect 4696 3771 5004 3780 +rect 4696 2748 5004 2757 +rect 4696 2746 4702 2748 +rect 4758 2746 4782 2748 +rect 4838 2746 4862 2748 +rect 4918 2746 4942 2748 +rect 4998 2746 5004 2748 +rect 4758 2694 4760 2746 +rect 4940 2694 4942 2746 +rect 4696 2692 4702 2694 +rect 4758 2692 4782 2694 +rect 4838 2692 4862 2694 +rect 4918 2692 4942 2694 +rect 4998 2692 5004 2694 +rect 4696 2683 5004 2692 +rect 5276 2446 5304 4270 +rect 5354 4200 5410 5000 +rect 5814 4200 5870 5000 +rect 6274 4298 6330 5000 +rect 6274 4270 6408 4298 +rect 6274 4200 6330 4270 +rect 4160 2440 4212 2446 +rect 4160 2382 4212 2388 +rect 5264 2440 5316 2446 +rect 5264 2382 5316 2388 +rect 4436 2372 4488 2378 +rect 4436 2314 4488 2320 +rect 5080 2372 5132 2378 +rect 5080 2314 5132 2320 +rect 3799 2204 4107 2213 +rect 3799 2202 3805 2204 +rect 3861 2202 3885 2204 +rect 3941 2202 3965 2204 +rect 4021 2202 4045 2204 +rect 4101 2202 4107 2204 +rect 3861 2150 3863 2202 +rect 4043 2150 4045 2202 +rect 3799 2148 3805 2150 +rect 3861 2148 3885 2150 +rect 3941 2148 3965 2150 +rect 4021 2148 4045 2150 +rect 4101 2148 4107 2150 +rect 3799 2139 4107 2148 +rect 3700 2032 3752 2038 +rect 3700 1974 3752 1980 +rect 4160 1896 4212 1902 +rect 4160 1838 4212 1844 +rect 3799 1116 4107 1125 +rect 3799 1114 3805 1116 +rect 3861 1114 3885 1116 +rect 3941 1114 3965 1116 +rect 4021 1114 4045 1116 +rect 4101 1114 4107 1116 +rect 3861 1062 3863 1114 +rect 4043 1062 4045 1114 +rect 3799 1060 3805 1062 +rect 3861 1060 3885 1062 +rect 3941 1060 3965 1062 +rect 4021 1060 4045 1062 +rect 4101 1060 4107 1062 +rect 3799 1051 4107 1060 +rect 4172 898 4200 1838 +rect 3988 870 4200 898 +rect 3988 800 4016 870 +rect 4448 800 4476 2314 +rect 4696 1660 5004 1669 +rect 4696 1658 4702 1660 +rect 4758 1658 4782 1660 +rect 4838 1658 4862 1660 +rect 4918 1658 4942 1660 +rect 4998 1658 5004 1660 +rect 4758 1606 4760 1658 +rect 4940 1606 4942 1658 +rect 4696 1604 4702 1606 +rect 4758 1604 4782 1606 +rect 4838 1604 4862 1606 +rect 4918 1604 4942 1606 +rect 4998 1604 5004 1606 +rect 4696 1595 5004 1604 +rect 5092 1170 5120 2314 +rect 5368 2038 5396 4200 +rect 5828 3618 5856 4200 +rect 5828 3590 6040 3618 +rect 5592 3292 5900 3301 +rect 5592 3290 5598 3292 +rect 5654 3290 5678 3292 +rect 5734 3290 5758 3292 +rect 5814 3290 5838 3292 +rect 5894 3290 5900 3292 +rect 5654 3238 5656 3290 +rect 5836 3238 5838 3290 +rect 5592 3236 5598 3238 +rect 5654 3236 5678 3238 +rect 5734 3236 5758 3238 +rect 5814 3236 5838 3238 +rect 5894 3236 5900 3238 +rect 5592 3227 5900 3236 +rect 6012 3126 6040 3590 +rect 6000 3120 6052 3126 +rect 6000 3062 6052 3068 +rect 6000 2984 6052 2990 +rect 6000 2926 6052 2932 +rect 5592 2204 5900 2213 +rect 5592 2202 5598 2204 +rect 5654 2202 5678 2204 +rect 5734 2202 5758 2204 +rect 5814 2202 5838 2204 +rect 5894 2202 5900 2204 +rect 5654 2150 5656 2202 +rect 5836 2150 5838 2202 +rect 5592 2148 5598 2150 +rect 5654 2148 5678 2150 +rect 5734 2148 5758 2150 +rect 5814 2148 5838 2150 +rect 5894 2148 5900 2150 +rect 5592 2139 5900 2148 +rect 5356 2032 5408 2038 +rect 5356 1974 5408 1980 +rect 5356 1896 5408 1902 +rect 5356 1838 5408 1844 +rect 4908 1142 5120 1170 +rect 4908 800 4936 1142 +rect 5368 800 5396 1838 +rect 5592 1116 5900 1125 +rect 5592 1114 5598 1116 +rect 5654 1114 5678 1116 +rect 5734 1114 5758 1116 +rect 5814 1114 5838 1116 +rect 5894 1114 5900 1116 +rect 5654 1062 5656 1114 +rect 5836 1062 5838 1114 +rect 5592 1060 5598 1062 +rect 5654 1060 5678 1062 +rect 5734 1060 5758 1062 +rect 5814 1060 5838 1062 +rect 5894 1060 5900 1062 +rect 5592 1051 5900 1060 +rect 6012 898 6040 2926 +rect 6380 1358 6408 4270 +rect 6734 4200 6790 5000 +rect 7194 4200 7250 5000 +rect 6748 4026 6776 4200 +rect 6748 3998 6868 4026 +rect 6489 3836 6797 3845 +rect 6489 3834 6495 3836 +rect 6551 3834 6575 3836 +rect 6631 3834 6655 3836 +rect 6711 3834 6735 3836 +rect 6791 3834 6797 3836 +rect 6551 3782 6553 3834 +rect 6733 3782 6735 3834 +rect 6489 3780 6495 3782 +rect 6551 3780 6575 3782 +rect 6631 3780 6655 3782 +rect 6711 3780 6735 3782 +rect 6791 3780 6797 3782 +rect 6489 3771 6797 3780 +rect 6840 3534 6868 3998 +rect 6828 3528 6880 3534 +rect 6828 3470 6880 3476 +rect 6828 3392 6880 3398 +rect 6828 3334 6880 3340 +rect 6489 2748 6797 2757 +rect 6489 2746 6495 2748 +rect 6551 2746 6575 2748 +rect 6631 2746 6655 2748 +rect 6711 2746 6735 2748 +rect 6791 2746 6797 2748 +rect 6551 2694 6553 2746 +rect 6733 2694 6735 2746 +rect 6489 2692 6495 2694 +rect 6551 2692 6575 2694 +rect 6631 2692 6655 2694 +rect 6711 2692 6735 2694 +rect 6791 2692 6797 2694 +rect 6489 2683 6797 2692 +rect 6489 1660 6797 1669 +rect 6489 1658 6495 1660 +rect 6551 1658 6575 1660 +rect 6631 1658 6655 1660 +rect 6711 1658 6735 1660 +rect 6791 1658 6797 1660 +rect 6551 1606 6553 1658 +rect 6733 1606 6735 1658 +rect 6489 1604 6495 1606 +rect 6551 1604 6575 1606 +rect 6631 1604 6655 1606 +rect 6711 1604 6735 1606 +rect 6791 1604 6797 1606 +rect 6489 1595 6797 1604 +rect 6840 1442 6868 3334 +rect 6748 1414 6868 1442 +rect 6368 1352 6420 1358 +rect 6368 1294 6420 1300 +rect 6276 1284 6328 1290 +rect 6276 1226 6328 1232 +rect 5828 870 6040 898 +rect 5828 800 5856 870 +rect 6288 800 6316 1226 +rect 6748 800 6776 1414 +rect 7208 1358 7236 4200 +rect 7385 3292 7693 3301 +rect 7385 3290 7391 3292 +rect 7447 3290 7471 3292 +rect 7527 3290 7551 3292 +rect 7607 3290 7631 3292 +rect 7687 3290 7693 3292 +rect 7447 3238 7449 3290 +rect 7629 3238 7631 3290 +rect 7385 3236 7391 3238 +rect 7447 3236 7471 3238 +rect 7527 3236 7551 3238 +rect 7607 3236 7631 3238 +rect 7687 3236 7693 3238 +rect 7385 3227 7693 3236 +rect 7385 2204 7693 2213 +rect 7385 2202 7391 2204 +rect 7447 2202 7471 2204 +rect 7527 2202 7551 2204 +rect 7607 2202 7631 2204 +rect 7687 2202 7693 2204 +rect 7447 2150 7449 2202 +rect 7629 2150 7631 2202 +rect 7385 2148 7391 2150 +rect 7447 2148 7471 2150 +rect 7527 2148 7551 2150 +rect 7607 2148 7631 2150 +rect 7687 2148 7693 2150 +rect 7385 2139 7693 2148 +rect 7196 1352 7248 1358 +rect 7196 1294 7248 1300 +rect 7196 1216 7248 1222 +rect 7196 1158 7248 1164 +rect 7208 800 7236 1158 +rect 7385 1116 7693 1125 +rect 7385 1114 7391 1116 +rect 7447 1114 7471 1116 +rect 7527 1114 7551 1116 +rect 7607 1114 7631 1116 +rect 7687 1114 7693 1116 +rect 7447 1062 7449 1114 +rect 7629 1062 7631 1114 +rect 7385 1060 7391 1062 +rect 7447 1060 7471 1062 +rect 7527 1060 7551 1062 +rect 7607 1060 7631 1062 +rect 7687 1060 7693 1062 +rect 7385 1051 7693 1060 +rect 2792 734 3004 762 +rect 3054 0 3110 800 +rect 3514 0 3570 800 +rect 3974 0 4030 800 +rect 4434 0 4490 800 +rect 4894 0 4950 800 +rect 5354 0 5410 800 +rect 5814 0 5870 800 +rect 6274 0 6330 800 +rect 6734 0 6790 800 +rect 7194 0 7250 800 +<< via2 >> +rect 1116 3834 1172 3836 +rect 1196 3834 1252 3836 +rect 1276 3834 1332 3836 +rect 1356 3834 1412 3836 +rect 1116 3782 1162 3834 +rect 1162 3782 1172 3834 +rect 1196 3782 1226 3834 +rect 1226 3782 1238 3834 +rect 1238 3782 1252 3834 +rect 1276 3782 1290 3834 +rect 1290 3782 1302 3834 +rect 1302 3782 1332 3834 +rect 1356 3782 1366 3834 +rect 1366 3782 1412 3834 +rect 1116 3780 1172 3782 +rect 1196 3780 1252 3782 +rect 1276 3780 1332 3782 +rect 1356 3780 1412 3782 +rect 1116 2746 1172 2748 +rect 1196 2746 1252 2748 +rect 1276 2746 1332 2748 +rect 1356 2746 1412 2748 +rect 1116 2694 1162 2746 +rect 1162 2694 1172 2746 +rect 1196 2694 1226 2746 +rect 1226 2694 1238 2746 +rect 1238 2694 1252 2746 +rect 1276 2694 1290 2746 +rect 1290 2694 1302 2746 +rect 1302 2694 1332 2746 +rect 1356 2694 1366 2746 +rect 1366 2694 1412 2746 +rect 1116 2692 1172 2694 +rect 1196 2692 1252 2694 +rect 1276 2692 1332 2694 +rect 1356 2692 1412 2694 +rect 2012 3290 2068 3292 +rect 2092 3290 2148 3292 +rect 2172 3290 2228 3292 +rect 2252 3290 2308 3292 +rect 2012 3238 2058 3290 +rect 2058 3238 2068 3290 +rect 2092 3238 2122 3290 +rect 2122 3238 2134 3290 +rect 2134 3238 2148 3290 +rect 2172 3238 2186 3290 +rect 2186 3238 2198 3290 +rect 2198 3238 2228 3290 +rect 2252 3238 2262 3290 +rect 2262 3238 2308 3290 +rect 2012 3236 2068 3238 +rect 2092 3236 2148 3238 +rect 2172 3236 2228 3238 +rect 2252 3236 2308 3238 +rect 2012 2202 2068 2204 +rect 2092 2202 2148 2204 +rect 2172 2202 2228 2204 +rect 2252 2202 2308 2204 +rect 2012 2150 2058 2202 +rect 2058 2150 2068 2202 +rect 2092 2150 2122 2202 +rect 2122 2150 2134 2202 +rect 2134 2150 2148 2202 +rect 2172 2150 2186 2202 +rect 2186 2150 2198 2202 +rect 2198 2150 2228 2202 +rect 2252 2150 2262 2202 +rect 2262 2150 2308 2202 +rect 2012 2148 2068 2150 +rect 2092 2148 2148 2150 +rect 2172 2148 2228 2150 +rect 2252 2148 2308 2150 +rect 1116 1658 1172 1660 +rect 1196 1658 1252 1660 +rect 1276 1658 1332 1660 +rect 1356 1658 1412 1660 +rect 1116 1606 1162 1658 +rect 1162 1606 1172 1658 +rect 1196 1606 1226 1658 +rect 1226 1606 1238 1658 +rect 1238 1606 1252 1658 +rect 1276 1606 1290 1658 +rect 1290 1606 1302 1658 +rect 1302 1606 1332 1658 +rect 1356 1606 1366 1658 +rect 1366 1606 1412 1658 +rect 1116 1604 1172 1606 +rect 1196 1604 1252 1606 +rect 1276 1604 1332 1606 +rect 1356 1604 1412 1606 +rect 2012 1114 2068 1116 +rect 2092 1114 2148 1116 +rect 2172 1114 2228 1116 +rect 2252 1114 2308 1116 +rect 2012 1062 2058 1114 +rect 2058 1062 2068 1114 +rect 2092 1062 2122 1114 +rect 2122 1062 2134 1114 +rect 2134 1062 2148 1114 +rect 2172 1062 2186 1114 +rect 2186 1062 2198 1114 +rect 2198 1062 2228 1114 +rect 2252 1062 2262 1114 +rect 2262 1062 2308 1114 +rect 2012 1060 2068 1062 +rect 2092 1060 2148 1062 +rect 2172 1060 2228 1062 +rect 2252 1060 2308 1062 +rect 2909 3834 2965 3836 +rect 2989 3834 3045 3836 +rect 3069 3834 3125 3836 +rect 3149 3834 3205 3836 +rect 2909 3782 2955 3834 +rect 2955 3782 2965 3834 +rect 2989 3782 3019 3834 +rect 3019 3782 3031 3834 +rect 3031 3782 3045 3834 +rect 3069 3782 3083 3834 +rect 3083 3782 3095 3834 +rect 3095 3782 3125 3834 +rect 3149 3782 3159 3834 +rect 3159 3782 3205 3834 +rect 2909 3780 2965 3782 +rect 2989 3780 3045 3782 +rect 3069 3780 3125 3782 +rect 3149 3780 3205 3782 +rect 2909 2746 2965 2748 +rect 2989 2746 3045 2748 +rect 3069 2746 3125 2748 +rect 3149 2746 3205 2748 +rect 2909 2694 2955 2746 +rect 2955 2694 2965 2746 +rect 2989 2694 3019 2746 +rect 3019 2694 3031 2746 +rect 3031 2694 3045 2746 +rect 3069 2694 3083 2746 +rect 3083 2694 3095 2746 +rect 3095 2694 3125 2746 +rect 3149 2694 3159 2746 +rect 3159 2694 3205 2746 +rect 2909 2692 2965 2694 +rect 2989 2692 3045 2694 +rect 3069 2692 3125 2694 +rect 3149 2692 3205 2694 +rect 2909 1658 2965 1660 +rect 2989 1658 3045 1660 +rect 3069 1658 3125 1660 +rect 3149 1658 3205 1660 +rect 2909 1606 2955 1658 +rect 2955 1606 2965 1658 +rect 2989 1606 3019 1658 +rect 3019 1606 3031 1658 +rect 3031 1606 3045 1658 +rect 3069 1606 3083 1658 +rect 3083 1606 3095 1658 +rect 3095 1606 3125 1658 +rect 3149 1606 3159 1658 +rect 3159 1606 3205 1658 +rect 2909 1604 2965 1606 +rect 2989 1604 3045 1606 +rect 3069 1604 3125 1606 +rect 3149 1604 3205 1606 +rect 3805 3290 3861 3292 +rect 3885 3290 3941 3292 +rect 3965 3290 4021 3292 +rect 4045 3290 4101 3292 +rect 3805 3238 3851 3290 +rect 3851 3238 3861 3290 +rect 3885 3238 3915 3290 +rect 3915 3238 3927 3290 +rect 3927 3238 3941 3290 +rect 3965 3238 3979 3290 +rect 3979 3238 3991 3290 +rect 3991 3238 4021 3290 +rect 4045 3238 4055 3290 +rect 4055 3238 4101 3290 +rect 3805 3236 3861 3238 +rect 3885 3236 3941 3238 +rect 3965 3236 4021 3238 +rect 4045 3236 4101 3238 +rect 4702 3834 4758 3836 +rect 4782 3834 4838 3836 +rect 4862 3834 4918 3836 +rect 4942 3834 4998 3836 +rect 4702 3782 4748 3834 +rect 4748 3782 4758 3834 +rect 4782 3782 4812 3834 +rect 4812 3782 4824 3834 +rect 4824 3782 4838 3834 +rect 4862 3782 4876 3834 +rect 4876 3782 4888 3834 +rect 4888 3782 4918 3834 +rect 4942 3782 4952 3834 +rect 4952 3782 4998 3834 +rect 4702 3780 4758 3782 +rect 4782 3780 4838 3782 +rect 4862 3780 4918 3782 +rect 4942 3780 4998 3782 +rect 4702 2746 4758 2748 +rect 4782 2746 4838 2748 +rect 4862 2746 4918 2748 +rect 4942 2746 4998 2748 +rect 4702 2694 4748 2746 +rect 4748 2694 4758 2746 +rect 4782 2694 4812 2746 +rect 4812 2694 4824 2746 +rect 4824 2694 4838 2746 +rect 4862 2694 4876 2746 +rect 4876 2694 4888 2746 +rect 4888 2694 4918 2746 +rect 4942 2694 4952 2746 +rect 4952 2694 4998 2746 +rect 4702 2692 4758 2694 +rect 4782 2692 4838 2694 +rect 4862 2692 4918 2694 +rect 4942 2692 4998 2694 +rect 3805 2202 3861 2204 +rect 3885 2202 3941 2204 +rect 3965 2202 4021 2204 +rect 4045 2202 4101 2204 +rect 3805 2150 3851 2202 +rect 3851 2150 3861 2202 +rect 3885 2150 3915 2202 +rect 3915 2150 3927 2202 +rect 3927 2150 3941 2202 +rect 3965 2150 3979 2202 +rect 3979 2150 3991 2202 +rect 3991 2150 4021 2202 +rect 4045 2150 4055 2202 +rect 4055 2150 4101 2202 +rect 3805 2148 3861 2150 +rect 3885 2148 3941 2150 +rect 3965 2148 4021 2150 +rect 4045 2148 4101 2150 +rect 3805 1114 3861 1116 +rect 3885 1114 3941 1116 +rect 3965 1114 4021 1116 +rect 4045 1114 4101 1116 +rect 3805 1062 3851 1114 +rect 3851 1062 3861 1114 +rect 3885 1062 3915 1114 +rect 3915 1062 3927 1114 +rect 3927 1062 3941 1114 +rect 3965 1062 3979 1114 +rect 3979 1062 3991 1114 +rect 3991 1062 4021 1114 +rect 4045 1062 4055 1114 +rect 4055 1062 4101 1114 +rect 3805 1060 3861 1062 +rect 3885 1060 3941 1062 +rect 3965 1060 4021 1062 +rect 4045 1060 4101 1062 +rect 4702 1658 4758 1660 +rect 4782 1658 4838 1660 +rect 4862 1658 4918 1660 +rect 4942 1658 4998 1660 +rect 4702 1606 4748 1658 +rect 4748 1606 4758 1658 +rect 4782 1606 4812 1658 +rect 4812 1606 4824 1658 +rect 4824 1606 4838 1658 +rect 4862 1606 4876 1658 +rect 4876 1606 4888 1658 +rect 4888 1606 4918 1658 +rect 4942 1606 4952 1658 +rect 4952 1606 4998 1658 +rect 4702 1604 4758 1606 +rect 4782 1604 4838 1606 +rect 4862 1604 4918 1606 +rect 4942 1604 4998 1606 +rect 5598 3290 5654 3292 +rect 5678 3290 5734 3292 +rect 5758 3290 5814 3292 +rect 5838 3290 5894 3292 +rect 5598 3238 5644 3290 +rect 5644 3238 5654 3290 +rect 5678 3238 5708 3290 +rect 5708 3238 5720 3290 +rect 5720 3238 5734 3290 +rect 5758 3238 5772 3290 +rect 5772 3238 5784 3290 +rect 5784 3238 5814 3290 +rect 5838 3238 5848 3290 +rect 5848 3238 5894 3290 +rect 5598 3236 5654 3238 +rect 5678 3236 5734 3238 +rect 5758 3236 5814 3238 +rect 5838 3236 5894 3238 +rect 5598 2202 5654 2204 +rect 5678 2202 5734 2204 +rect 5758 2202 5814 2204 +rect 5838 2202 5894 2204 +rect 5598 2150 5644 2202 +rect 5644 2150 5654 2202 +rect 5678 2150 5708 2202 +rect 5708 2150 5720 2202 +rect 5720 2150 5734 2202 +rect 5758 2150 5772 2202 +rect 5772 2150 5784 2202 +rect 5784 2150 5814 2202 +rect 5838 2150 5848 2202 +rect 5848 2150 5894 2202 +rect 5598 2148 5654 2150 +rect 5678 2148 5734 2150 +rect 5758 2148 5814 2150 +rect 5838 2148 5894 2150 +rect 5598 1114 5654 1116 +rect 5678 1114 5734 1116 +rect 5758 1114 5814 1116 +rect 5838 1114 5894 1116 +rect 5598 1062 5644 1114 +rect 5644 1062 5654 1114 +rect 5678 1062 5708 1114 +rect 5708 1062 5720 1114 +rect 5720 1062 5734 1114 +rect 5758 1062 5772 1114 +rect 5772 1062 5784 1114 +rect 5784 1062 5814 1114 +rect 5838 1062 5848 1114 +rect 5848 1062 5894 1114 +rect 5598 1060 5654 1062 +rect 5678 1060 5734 1062 +rect 5758 1060 5814 1062 +rect 5838 1060 5894 1062 +rect 6495 3834 6551 3836 +rect 6575 3834 6631 3836 +rect 6655 3834 6711 3836 +rect 6735 3834 6791 3836 +rect 6495 3782 6541 3834 +rect 6541 3782 6551 3834 +rect 6575 3782 6605 3834 +rect 6605 3782 6617 3834 +rect 6617 3782 6631 3834 +rect 6655 3782 6669 3834 +rect 6669 3782 6681 3834 +rect 6681 3782 6711 3834 +rect 6735 3782 6745 3834 +rect 6745 3782 6791 3834 +rect 6495 3780 6551 3782 +rect 6575 3780 6631 3782 +rect 6655 3780 6711 3782 +rect 6735 3780 6791 3782 +rect 6495 2746 6551 2748 +rect 6575 2746 6631 2748 +rect 6655 2746 6711 2748 +rect 6735 2746 6791 2748 +rect 6495 2694 6541 2746 +rect 6541 2694 6551 2746 +rect 6575 2694 6605 2746 +rect 6605 2694 6617 2746 +rect 6617 2694 6631 2746 +rect 6655 2694 6669 2746 +rect 6669 2694 6681 2746 +rect 6681 2694 6711 2746 +rect 6735 2694 6745 2746 +rect 6745 2694 6791 2746 +rect 6495 2692 6551 2694 +rect 6575 2692 6631 2694 +rect 6655 2692 6711 2694 +rect 6735 2692 6791 2694 +rect 6495 1658 6551 1660 +rect 6575 1658 6631 1660 +rect 6655 1658 6711 1660 +rect 6735 1658 6791 1660 +rect 6495 1606 6541 1658 +rect 6541 1606 6551 1658 +rect 6575 1606 6605 1658 +rect 6605 1606 6617 1658 +rect 6617 1606 6631 1658 +rect 6655 1606 6669 1658 +rect 6669 1606 6681 1658 +rect 6681 1606 6711 1658 +rect 6735 1606 6745 1658 +rect 6745 1606 6791 1658 +rect 6495 1604 6551 1606 +rect 6575 1604 6631 1606 +rect 6655 1604 6711 1606 +rect 6735 1604 6791 1606 +rect 7391 3290 7447 3292 +rect 7471 3290 7527 3292 +rect 7551 3290 7607 3292 +rect 7631 3290 7687 3292 +rect 7391 3238 7437 3290 +rect 7437 3238 7447 3290 +rect 7471 3238 7501 3290 +rect 7501 3238 7513 3290 +rect 7513 3238 7527 3290 +rect 7551 3238 7565 3290 +rect 7565 3238 7577 3290 +rect 7577 3238 7607 3290 +rect 7631 3238 7641 3290 +rect 7641 3238 7687 3290 +rect 7391 3236 7447 3238 +rect 7471 3236 7527 3238 +rect 7551 3236 7607 3238 +rect 7631 3236 7687 3238 +rect 7391 2202 7447 2204 +rect 7471 2202 7527 2204 +rect 7551 2202 7607 2204 +rect 7631 2202 7687 2204 +rect 7391 2150 7437 2202 +rect 7437 2150 7447 2202 +rect 7471 2150 7501 2202 +rect 7501 2150 7513 2202 +rect 7513 2150 7527 2202 +rect 7551 2150 7565 2202 +rect 7565 2150 7577 2202 +rect 7577 2150 7607 2202 +rect 7631 2150 7641 2202 +rect 7641 2150 7687 2202 +rect 7391 2148 7447 2150 +rect 7471 2148 7527 2150 +rect 7551 2148 7607 2150 +rect 7631 2148 7687 2150 +rect 7391 1114 7447 1116 +rect 7471 1114 7527 1116 +rect 7551 1114 7607 1116 +rect 7631 1114 7687 1116 +rect 7391 1062 7437 1114 +rect 7437 1062 7447 1114 +rect 7471 1062 7501 1114 +rect 7501 1062 7513 1114 +rect 7513 1062 7527 1114 +rect 7551 1062 7565 1114 +rect 7565 1062 7577 1114 +rect 7577 1062 7607 1114 +rect 7631 1062 7641 1114 +rect 7641 1062 7687 1114 +rect 7391 1060 7447 1062 +rect 7471 1060 7527 1062 +rect 7551 1060 7607 1062 +rect 7631 1060 7687 1062 +<< metal3 >> +rect 1106 3840 1422 3841 +rect 1106 3776 1112 3840 +rect 1176 3776 1192 3840 +rect 1256 3776 1272 3840 +rect 1336 3776 1352 3840 +rect 1416 3776 1422 3840 +rect 1106 3775 1422 3776 +rect 2899 3840 3215 3841 +rect 2899 3776 2905 3840 +rect 2969 3776 2985 3840 +rect 3049 3776 3065 3840 +rect 3129 3776 3145 3840 +rect 3209 3776 3215 3840 +rect 2899 3775 3215 3776 +rect 4692 3840 5008 3841 +rect 4692 3776 4698 3840 +rect 4762 3776 4778 3840 +rect 4842 3776 4858 3840 +rect 4922 3776 4938 3840 +rect 5002 3776 5008 3840 +rect 4692 3775 5008 3776 +rect 6485 3840 6801 3841 +rect 6485 3776 6491 3840 +rect 6555 3776 6571 3840 +rect 6635 3776 6651 3840 +rect 6715 3776 6731 3840 +rect 6795 3776 6801 3840 +rect 6485 3775 6801 3776 +rect 2002 3296 2318 3297 +rect 2002 3232 2008 3296 +rect 2072 3232 2088 3296 +rect 2152 3232 2168 3296 +rect 2232 3232 2248 3296 +rect 2312 3232 2318 3296 +rect 2002 3231 2318 3232 +rect 3795 3296 4111 3297 +rect 3795 3232 3801 3296 +rect 3865 3232 3881 3296 +rect 3945 3232 3961 3296 +rect 4025 3232 4041 3296 +rect 4105 3232 4111 3296 +rect 3795 3231 4111 3232 +rect 5588 3296 5904 3297 +rect 5588 3232 5594 3296 +rect 5658 3232 5674 3296 +rect 5738 3232 5754 3296 +rect 5818 3232 5834 3296 +rect 5898 3232 5904 3296 +rect 5588 3231 5904 3232 +rect 7381 3296 7697 3297 +rect 7381 3232 7387 3296 +rect 7451 3232 7467 3296 +rect 7531 3232 7547 3296 +rect 7611 3232 7627 3296 +rect 7691 3232 7697 3296 +rect 7381 3231 7697 3232 +rect 1106 2752 1422 2753 +rect 1106 2688 1112 2752 +rect 1176 2688 1192 2752 +rect 1256 2688 1272 2752 +rect 1336 2688 1352 2752 +rect 1416 2688 1422 2752 +rect 1106 2687 1422 2688 +rect 2899 2752 3215 2753 +rect 2899 2688 2905 2752 +rect 2969 2688 2985 2752 +rect 3049 2688 3065 2752 +rect 3129 2688 3145 2752 +rect 3209 2688 3215 2752 +rect 2899 2687 3215 2688 +rect 4692 2752 5008 2753 +rect 4692 2688 4698 2752 +rect 4762 2688 4778 2752 +rect 4842 2688 4858 2752 +rect 4922 2688 4938 2752 +rect 5002 2688 5008 2752 +rect 4692 2687 5008 2688 +rect 6485 2752 6801 2753 +rect 6485 2688 6491 2752 +rect 6555 2688 6571 2752 +rect 6635 2688 6651 2752 +rect 6715 2688 6731 2752 +rect 6795 2688 6801 2752 +rect 6485 2687 6801 2688 +rect 2002 2208 2318 2209 +rect 2002 2144 2008 2208 +rect 2072 2144 2088 2208 +rect 2152 2144 2168 2208 +rect 2232 2144 2248 2208 +rect 2312 2144 2318 2208 +rect 2002 2143 2318 2144 +rect 3795 2208 4111 2209 +rect 3795 2144 3801 2208 +rect 3865 2144 3881 2208 +rect 3945 2144 3961 2208 +rect 4025 2144 4041 2208 +rect 4105 2144 4111 2208 +rect 3795 2143 4111 2144 +rect 5588 2208 5904 2209 +rect 5588 2144 5594 2208 +rect 5658 2144 5674 2208 +rect 5738 2144 5754 2208 +rect 5818 2144 5834 2208 +rect 5898 2144 5904 2208 +rect 5588 2143 5904 2144 +rect 7381 2208 7697 2209 +rect 7381 2144 7387 2208 +rect 7451 2144 7467 2208 +rect 7531 2144 7547 2208 +rect 7611 2144 7627 2208 +rect 7691 2144 7697 2208 +rect 7381 2143 7697 2144 +rect 1106 1664 1422 1665 +rect 1106 1600 1112 1664 +rect 1176 1600 1192 1664 +rect 1256 1600 1272 1664 +rect 1336 1600 1352 1664 +rect 1416 1600 1422 1664 +rect 1106 1599 1422 1600 +rect 2899 1664 3215 1665 +rect 2899 1600 2905 1664 +rect 2969 1600 2985 1664 +rect 3049 1600 3065 1664 +rect 3129 1600 3145 1664 +rect 3209 1600 3215 1664 +rect 2899 1599 3215 1600 +rect 4692 1664 5008 1665 +rect 4692 1600 4698 1664 +rect 4762 1600 4778 1664 +rect 4842 1600 4858 1664 +rect 4922 1600 4938 1664 +rect 5002 1600 5008 1664 +rect 4692 1599 5008 1600 +rect 6485 1664 6801 1665 +rect 6485 1600 6491 1664 +rect 6555 1600 6571 1664 +rect 6635 1600 6651 1664 +rect 6715 1600 6731 1664 +rect 6795 1600 6801 1664 +rect 6485 1599 6801 1600 +rect 2002 1120 2318 1121 +rect 2002 1056 2008 1120 +rect 2072 1056 2088 1120 +rect 2152 1056 2168 1120 +rect 2232 1056 2248 1120 +rect 2312 1056 2318 1120 +rect 2002 1055 2318 1056 +rect 3795 1120 4111 1121 +rect 3795 1056 3801 1120 +rect 3865 1056 3881 1120 +rect 3945 1056 3961 1120 +rect 4025 1056 4041 1120 +rect 4105 1056 4111 1120 +rect 3795 1055 4111 1056 +rect 5588 1120 5904 1121 +rect 5588 1056 5594 1120 +rect 5658 1056 5674 1120 +rect 5738 1056 5754 1120 +rect 5818 1056 5834 1120 +rect 5898 1056 5904 1120 +rect 5588 1055 5904 1056 +rect 7381 1120 7697 1121 +rect 7381 1056 7387 1120 +rect 7451 1056 7467 1120 +rect 7531 1056 7547 1120 +rect 7611 1056 7627 1120 +rect 7691 1056 7697 1120 +rect 7381 1055 7697 1056 +<< via3 >> +rect 1112 3836 1176 3840 +rect 1112 3780 1116 3836 +rect 1116 3780 1172 3836 +rect 1172 3780 1176 3836 +rect 1112 3776 1176 3780 +rect 1192 3836 1256 3840 +rect 1192 3780 1196 3836 +rect 1196 3780 1252 3836 +rect 1252 3780 1256 3836 +rect 1192 3776 1256 3780 +rect 1272 3836 1336 3840 +rect 1272 3780 1276 3836 +rect 1276 3780 1332 3836 +rect 1332 3780 1336 3836 +rect 1272 3776 1336 3780 +rect 1352 3836 1416 3840 +rect 1352 3780 1356 3836 +rect 1356 3780 1412 3836 +rect 1412 3780 1416 3836 +rect 1352 3776 1416 3780 +rect 2905 3836 2969 3840 +rect 2905 3780 2909 3836 +rect 2909 3780 2965 3836 +rect 2965 3780 2969 3836 +rect 2905 3776 2969 3780 +rect 2985 3836 3049 3840 +rect 2985 3780 2989 3836 +rect 2989 3780 3045 3836 +rect 3045 3780 3049 3836 +rect 2985 3776 3049 3780 +rect 3065 3836 3129 3840 +rect 3065 3780 3069 3836 +rect 3069 3780 3125 3836 +rect 3125 3780 3129 3836 +rect 3065 3776 3129 3780 +rect 3145 3836 3209 3840 +rect 3145 3780 3149 3836 +rect 3149 3780 3205 3836 +rect 3205 3780 3209 3836 +rect 3145 3776 3209 3780 +rect 4698 3836 4762 3840 +rect 4698 3780 4702 3836 +rect 4702 3780 4758 3836 +rect 4758 3780 4762 3836 +rect 4698 3776 4762 3780 +rect 4778 3836 4842 3840 +rect 4778 3780 4782 3836 +rect 4782 3780 4838 3836 +rect 4838 3780 4842 3836 +rect 4778 3776 4842 3780 +rect 4858 3836 4922 3840 +rect 4858 3780 4862 3836 +rect 4862 3780 4918 3836 +rect 4918 3780 4922 3836 +rect 4858 3776 4922 3780 +rect 4938 3836 5002 3840 +rect 4938 3780 4942 3836 +rect 4942 3780 4998 3836 +rect 4998 3780 5002 3836 +rect 4938 3776 5002 3780 +rect 6491 3836 6555 3840 +rect 6491 3780 6495 3836 +rect 6495 3780 6551 3836 +rect 6551 3780 6555 3836 +rect 6491 3776 6555 3780 +rect 6571 3836 6635 3840 +rect 6571 3780 6575 3836 +rect 6575 3780 6631 3836 +rect 6631 3780 6635 3836 +rect 6571 3776 6635 3780 +rect 6651 3836 6715 3840 +rect 6651 3780 6655 3836 +rect 6655 3780 6711 3836 +rect 6711 3780 6715 3836 +rect 6651 3776 6715 3780 +rect 6731 3836 6795 3840 +rect 6731 3780 6735 3836 +rect 6735 3780 6791 3836 +rect 6791 3780 6795 3836 +rect 6731 3776 6795 3780 +rect 2008 3292 2072 3296 +rect 2008 3236 2012 3292 +rect 2012 3236 2068 3292 +rect 2068 3236 2072 3292 +rect 2008 3232 2072 3236 +rect 2088 3292 2152 3296 +rect 2088 3236 2092 3292 +rect 2092 3236 2148 3292 +rect 2148 3236 2152 3292 +rect 2088 3232 2152 3236 +rect 2168 3292 2232 3296 +rect 2168 3236 2172 3292 +rect 2172 3236 2228 3292 +rect 2228 3236 2232 3292 +rect 2168 3232 2232 3236 +rect 2248 3292 2312 3296 +rect 2248 3236 2252 3292 +rect 2252 3236 2308 3292 +rect 2308 3236 2312 3292 +rect 2248 3232 2312 3236 +rect 3801 3292 3865 3296 +rect 3801 3236 3805 3292 +rect 3805 3236 3861 3292 +rect 3861 3236 3865 3292 +rect 3801 3232 3865 3236 +rect 3881 3292 3945 3296 +rect 3881 3236 3885 3292 +rect 3885 3236 3941 3292 +rect 3941 3236 3945 3292 +rect 3881 3232 3945 3236 +rect 3961 3292 4025 3296 +rect 3961 3236 3965 3292 +rect 3965 3236 4021 3292 +rect 4021 3236 4025 3292 +rect 3961 3232 4025 3236 +rect 4041 3292 4105 3296 +rect 4041 3236 4045 3292 +rect 4045 3236 4101 3292 +rect 4101 3236 4105 3292 +rect 4041 3232 4105 3236 +rect 5594 3292 5658 3296 +rect 5594 3236 5598 3292 +rect 5598 3236 5654 3292 +rect 5654 3236 5658 3292 +rect 5594 3232 5658 3236 +rect 5674 3292 5738 3296 +rect 5674 3236 5678 3292 +rect 5678 3236 5734 3292 +rect 5734 3236 5738 3292 +rect 5674 3232 5738 3236 +rect 5754 3292 5818 3296 +rect 5754 3236 5758 3292 +rect 5758 3236 5814 3292 +rect 5814 3236 5818 3292 +rect 5754 3232 5818 3236 +rect 5834 3292 5898 3296 +rect 5834 3236 5838 3292 +rect 5838 3236 5894 3292 +rect 5894 3236 5898 3292 +rect 5834 3232 5898 3236 +rect 7387 3292 7451 3296 +rect 7387 3236 7391 3292 +rect 7391 3236 7447 3292 +rect 7447 3236 7451 3292 +rect 7387 3232 7451 3236 +rect 7467 3292 7531 3296 +rect 7467 3236 7471 3292 +rect 7471 3236 7527 3292 +rect 7527 3236 7531 3292 +rect 7467 3232 7531 3236 +rect 7547 3292 7611 3296 +rect 7547 3236 7551 3292 +rect 7551 3236 7607 3292 +rect 7607 3236 7611 3292 +rect 7547 3232 7611 3236 +rect 7627 3292 7691 3296 +rect 7627 3236 7631 3292 +rect 7631 3236 7687 3292 +rect 7687 3236 7691 3292 +rect 7627 3232 7691 3236 +rect 1112 2748 1176 2752 +rect 1112 2692 1116 2748 +rect 1116 2692 1172 2748 +rect 1172 2692 1176 2748 +rect 1112 2688 1176 2692 +rect 1192 2748 1256 2752 +rect 1192 2692 1196 2748 +rect 1196 2692 1252 2748 +rect 1252 2692 1256 2748 +rect 1192 2688 1256 2692 +rect 1272 2748 1336 2752 +rect 1272 2692 1276 2748 +rect 1276 2692 1332 2748 +rect 1332 2692 1336 2748 +rect 1272 2688 1336 2692 +rect 1352 2748 1416 2752 +rect 1352 2692 1356 2748 +rect 1356 2692 1412 2748 +rect 1412 2692 1416 2748 +rect 1352 2688 1416 2692 +rect 2905 2748 2969 2752 +rect 2905 2692 2909 2748 +rect 2909 2692 2965 2748 +rect 2965 2692 2969 2748 +rect 2905 2688 2969 2692 +rect 2985 2748 3049 2752 +rect 2985 2692 2989 2748 +rect 2989 2692 3045 2748 +rect 3045 2692 3049 2748 +rect 2985 2688 3049 2692 +rect 3065 2748 3129 2752 +rect 3065 2692 3069 2748 +rect 3069 2692 3125 2748 +rect 3125 2692 3129 2748 +rect 3065 2688 3129 2692 +rect 3145 2748 3209 2752 +rect 3145 2692 3149 2748 +rect 3149 2692 3205 2748 +rect 3205 2692 3209 2748 +rect 3145 2688 3209 2692 +rect 4698 2748 4762 2752 +rect 4698 2692 4702 2748 +rect 4702 2692 4758 2748 +rect 4758 2692 4762 2748 +rect 4698 2688 4762 2692 +rect 4778 2748 4842 2752 +rect 4778 2692 4782 2748 +rect 4782 2692 4838 2748 +rect 4838 2692 4842 2748 +rect 4778 2688 4842 2692 +rect 4858 2748 4922 2752 +rect 4858 2692 4862 2748 +rect 4862 2692 4918 2748 +rect 4918 2692 4922 2748 +rect 4858 2688 4922 2692 +rect 4938 2748 5002 2752 +rect 4938 2692 4942 2748 +rect 4942 2692 4998 2748 +rect 4998 2692 5002 2748 +rect 4938 2688 5002 2692 +rect 6491 2748 6555 2752 +rect 6491 2692 6495 2748 +rect 6495 2692 6551 2748 +rect 6551 2692 6555 2748 +rect 6491 2688 6555 2692 +rect 6571 2748 6635 2752 +rect 6571 2692 6575 2748 +rect 6575 2692 6631 2748 +rect 6631 2692 6635 2748 +rect 6571 2688 6635 2692 +rect 6651 2748 6715 2752 +rect 6651 2692 6655 2748 +rect 6655 2692 6711 2748 +rect 6711 2692 6715 2748 +rect 6651 2688 6715 2692 +rect 6731 2748 6795 2752 +rect 6731 2692 6735 2748 +rect 6735 2692 6791 2748 +rect 6791 2692 6795 2748 +rect 6731 2688 6795 2692 +rect 2008 2204 2072 2208 +rect 2008 2148 2012 2204 +rect 2012 2148 2068 2204 +rect 2068 2148 2072 2204 +rect 2008 2144 2072 2148 +rect 2088 2204 2152 2208 +rect 2088 2148 2092 2204 +rect 2092 2148 2148 2204 +rect 2148 2148 2152 2204 +rect 2088 2144 2152 2148 +rect 2168 2204 2232 2208 +rect 2168 2148 2172 2204 +rect 2172 2148 2228 2204 +rect 2228 2148 2232 2204 +rect 2168 2144 2232 2148 +rect 2248 2204 2312 2208 +rect 2248 2148 2252 2204 +rect 2252 2148 2308 2204 +rect 2308 2148 2312 2204 +rect 2248 2144 2312 2148 +rect 3801 2204 3865 2208 +rect 3801 2148 3805 2204 +rect 3805 2148 3861 2204 +rect 3861 2148 3865 2204 +rect 3801 2144 3865 2148 +rect 3881 2204 3945 2208 +rect 3881 2148 3885 2204 +rect 3885 2148 3941 2204 +rect 3941 2148 3945 2204 +rect 3881 2144 3945 2148 +rect 3961 2204 4025 2208 +rect 3961 2148 3965 2204 +rect 3965 2148 4021 2204 +rect 4021 2148 4025 2204 +rect 3961 2144 4025 2148 +rect 4041 2204 4105 2208 +rect 4041 2148 4045 2204 +rect 4045 2148 4101 2204 +rect 4101 2148 4105 2204 +rect 4041 2144 4105 2148 +rect 5594 2204 5658 2208 +rect 5594 2148 5598 2204 +rect 5598 2148 5654 2204 +rect 5654 2148 5658 2204 +rect 5594 2144 5658 2148 +rect 5674 2204 5738 2208 +rect 5674 2148 5678 2204 +rect 5678 2148 5734 2204 +rect 5734 2148 5738 2204 +rect 5674 2144 5738 2148 +rect 5754 2204 5818 2208 +rect 5754 2148 5758 2204 +rect 5758 2148 5814 2204 +rect 5814 2148 5818 2204 +rect 5754 2144 5818 2148 +rect 5834 2204 5898 2208 +rect 5834 2148 5838 2204 +rect 5838 2148 5894 2204 +rect 5894 2148 5898 2204 +rect 5834 2144 5898 2148 +rect 7387 2204 7451 2208 +rect 7387 2148 7391 2204 +rect 7391 2148 7447 2204 +rect 7447 2148 7451 2204 +rect 7387 2144 7451 2148 +rect 7467 2204 7531 2208 +rect 7467 2148 7471 2204 +rect 7471 2148 7527 2204 +rect 7527 2148 7531 2204 +rect 7467 2144 7531 2148 +rect 7547 2204 7611 2208 +rect 7547 2148 7551 2204 +rect 7551 2148 7607 2204 +rect 7607 2148 7611 2204 +rect 7547 2144 7611 2148 +rect 7627 2204 7691 2208 +rect 7627 2148 7631 2204 +rect 7631 2148 7687 2204 +rect 7687 2148 7691 2204 +rect 7627 2144 7691 2148 +rect 1112 1660 1176 1664 +rect 1112 1604 1116 1660 +rect 1116 1604 1172 1660 +rect 1172 1604 1176 1660 +rect 1112 1600 1176 1604 +rect 1192 1660 1256 1664 +rect 1192 1604 1196 1660 +rect 1196 1604 1252 1660 +rect 1252 1604 1256 1660 +rect 1192 1600 1256 1604 +rect 1272 1660 1336 1664 +rect 1272 1604 1276 1660 +rect 1276 1604 1332 1660 +rect 1332 1604 1336 1660 +rect 1272 1600 1336 1604 +rect 1352 1660 1416 1664 +rect 1352 1604 1356 1660 +rect 1356 1604 1412 1660 +rect 1412 1604 1416 1660 +rect 1352 1600 1416 1604 +rect 2905 1660 2969 1664 +rect 2905 1604 2909 1660 +rect 2909 1604 2965 1660 +rect 2965 1604 2969 1660 +rect 2905 1600 2969 1604 +rect 2985 1660 3049 1664 +rect 2985 1604 2989 1660 +rect 2989 1604 3045 1660 +rect 3045 1604 3049 1660 +rect 2985 1600 3049 1604 +rect 3065 1660 3129 1664 +rect 3065 1604 3069 1660 +rect 3069 1604 3125 1660 +rect 3125 1604 3129 1660 +rect 3065 1600 3129 1604 +rect 3145 1660 3209 1664 +rect 3145 1604 3149 1660 +rect 3149 1604 3205 1660 +rect 3205 1604 3209 1660 +rect 3145 1600 3209 1604 +rect 4698 1660 4762 1664 +rect 4698 1604 4702 1660 +rect 4702 1604 4758 1660 +rect 4758 1604 4762 1660 +rect 4698 1600 4762 1604 +rect 4778 1660 4842 1664 +rect 4778 1604 4782 1660 +rect 4782 1604 4838 1660 +rect 4838 1604 4842 1660 +rect 4778 1600 4842 1604 +rect 4858 1660 4922 1664 +rect 4858 1604 4862 1660 +rect 4862 1604 4918 1660 +rect 4918 1604 4922 1660 +rect 4858 1600 4922 1604 +rect 4938 1660 5002 1664 +rect 4938 1604 4942 1660 +rect 4942 1604 4998 1660 +rect 4998 1604 5002 1660 +rect 4938 1600 5002 1604 +rect 6491 1660 6555 1664 +rect 6491 1604 6495 1660 +rect 6495 1604 6551 1660 +rect 6551 1604 6555 1660 +rect 6491 1600 6555 1604 +rect 6571 1660 6635 1664 +rect 6571 1604 6575 1660 +rect 6575 1604 6631 1660 +rect 6631 1604 6635 1660 +rect 6571 1600 6635 1604 +rect 6651 1660 6715 1664 +rect 6651 1604 6655 1660 +rect 6655 1604 6711 1660 +rect 6711 1604 6715 1660 +rect 6651 1600 6715 1604 +rect 6731 1660 6795 1664 +rect 6731 1604 6735 1660 +rect 6735 1604 6791 1660 +rect 6791 1604 6795 1660 +rect 6731 1600 6795 1604 +rect 2008 1116 2072 1120 +rect 2008 1060 2012 1116 +rect 2012 1060 2068 1116 +rect 2068 1060 2072 1116 +rect 2008 1056 2072 1060 +rect 2088 1116 2152 1120 +rect 2088 1060 2092 1116 +rect 2092 1060 2148 1116 +rect 2148 1060 2152 1116 +rect 2088 1056 2152 1060 +rect 2168 1116 2232 1120 +rect 2168 1060 2172 1116 +rect 2172 1060 2228 1116 +rect 2228 1060 2232 1116 +rect 2168 1056 2232 1060 +rect 2248 1116 2312 1120 +rect 2248 1060 2252 1116 +rect 2252 1060 2308 1116 +rect 2308 1060 2312 1116 +rect 2248 1056 2312 1060 +rect 3801 1116 3865 1120 +rect 3801 1060 3805 1116 +rect 3805 1060 3861 1116 +rect 3861 1060 3865 1116 +rect 3801 1056 3865 1060 +rect 3881 1116 3945 1120 +rect 3881 1060 3885 1116 +rect 3885 1060 3941 1116 +rect 3941 1060 3945 1116 +rect 3881 1056 3945 1060 +rect 3961 1116 4025 1120 +rect 3961 1060 3965 1116 +rect 3965 1060 4021 1116 +rect 4021 1060 4025 1116 +rect 3961 1056 4025 1060 +rect 4041 1116 4105 1120 +rect 4041 1060 4045 1116 +rect 4045 1060 4101 1116 +rect 4101 1060 4105 1116 +rect 4041 1056 4105 1060 +rect 5594 1116 5658 1120 +rect 5594 1060 5598 1116 +rect 5598 1060 5654 1116 +rect 5654 1060 5658 1116 +rect 5594 1056 5658 1060 +rect 5674 1116 5738 1120 +rect 5674 1060 5678 1116 +rect 5678 1060 5734 1116 +rect 5734 1060 5738 1116 +rect 5674 1056 5738 1060 +rect 5754 1116 5818 1120 +rect 5754 1060 5758 1116 +rect 5758 1060 5814 1116 +rect 5814 1060 5818 1116 +rect 5754 1056 5818 1060 +rect 5834 1116 5898 1120 +rect 5834 1060 5838 1116 +rect 5838 1060 5894 1116 +rect 5894 1060 5898 1116 +rect 5834 1056 5898 1060 +rect 7387 1116 7451 1120 +rect 7387 1060 7391 1116 +rect 7391 1060 7447 1116 +rect 7447 1060 7451 1116 +rect 7387 1056 7451 1060 +rect 7467 1116 7531 1120 +rect 7467 1060 7471 1116 +rect 7471 1060 7527 1116 +rect 7527 1060 7531 1116 +rect 7467 1056 7531 1060 +rect 7547 1116 7611 1120 +rect 7547 1060 7551 1116 +rect 7551 1060 7607 1116 +rect 7607 1060 7611 1116 +rect 7547 1056 7611 1060 +rect 7627 1116 7691 1120 +rect 7627 1060 7631 1116 +rect 7631 1060 7687 1116 +rect 7687 1060 7691 1116 +rect 7627 1056 7691 1060 +<< metal4 >> +rect 1104 3840 1424 3856 +rect 1104 3776 1112 3840 +rect 1176 3776 1192 3840 +rect 1256 3776 1272 3840 +rect 1336 3776 1352 3840 +rect 1416 3776 1424 3840 +rect 1104 2752 1424 3776 +rect 1104 2688 1112 2752 +rect 1176 2688 1192 2752 +rect 1256 2688 1272 2752 +rect 1336 2688 1352 2752 +rect 1416 2688 1424 2752 +rect 1104 1664 1424 2688 +rect 1104 1600 1112 1664 +rect 1176 1600 1192 1664 +rect 1256 1600 1272 1664 +rect 1336 1600 1352 1664 +rect 1416 1600 1424 1664 +rect 1104 1040 1424 1600 +rect 2000 3296 2320 3856 +rect 2000 3232 2008 3296 +rect 2072 3232 2088 3296 +rect 2152 3232 2168 3296 +rect 2232 3232 2248 3296 +rect 2312 3232 2320 3296 +rect 2000 2208 2320 3232 +rect 2000 2144 2008 2208 +rect 2072 2144 2088 2208 +rect 2152 2144 2168 2208 +rect 2232 2144 2248 2208 +rect 2312 2144 2320 2208 +rect 2000 1120 2320 2144 +rect 2000 1056 2008 1120 +rect 2072 1056 2088 1120 +rect 2152 1056 2168 1120 +rect 2232 1056 2248 1120 +rect 2312 1056 2320 1120 +rect 2000 1040 2320 1056 +rect 2897 3840 3217 3856 +rect 2897 3776 2905 3840 +rect 2969 3776 2985 3840 +rect 3049 3776 3065 3840 +rect 3129 3776 3145 3840 +rect 3209 3776 3217 3840 +rect 2897 2752 3217 3776 +rect 2897 2688 2905 2752 +rect 2969 2688 2985 2752 +rect 3049 2688 3065 2752 +rect 3129 2688 3145 2752 +rect 3209 2688 3217 2752 +rect 2897 1664 3217 2688 +rect 2897 1600 2905 1664 +rect 2969 1600 2985 1664 +rect 3049 1600 3065 1664 +rect 3129 1600 3145 1664 +rect 3209 1600 3217 1664 +rect 2897 1040 3217 1600 +rect 3793 3296 4113 3856 +rect 3793 3232 3801 3296 +rect 3865 3232 3881 3296 +rect 3945 3232 3961 3296 +rect 4025 3232 4041 3296 +rect 4105 3232 4113 3296 +rect 3793 2208 4113 3232 +rect 3793 2144 3801 2208 +rect 3865 2144 3881 2208 +rect 3945 2144 3961 2208 +rect 4025 2144 4041 2208 +rect 4105 2144 4113 2208 +rect 3793 1120 4113 2144 +rect 3793 1056 3801 1120 +rect 3865 1056 3881 1120 +rect 3945 1056 3961 1120 +rect 4025 1056 4041 1120 +rect 4105 1056 4113 1120 +rect 3793 1040 4113 1056 +rect 4690 3840 5010 3856 +rect 4690 3776 4698 3840 +rect 4762 3776 4778 3840 +rect 4842 3776 4858 3840 +rect 4922 3776 4938 3840 +rect 5002 3776 5010 3840 +rect 4690 2752 5010 3776 +rect 4690 2688 4698 2752 +rect 4762 2688 4778 2752 +rect 4842 2688 4858 2752 +rect 4922 2688 4938 2752 +rect 5002 2688 5010 2752 +rect 4690 1664 5010 2688 +rect 4690 1600 4698 1664 +rect 4762 1600 4778 1664 +rect 4842 1600 4858 1664 +rect 4922 1600 4938 1664 +rect 5002 1600 5010 1664 +rect 4690 1040 5010 1600 +rect 5586 3296 5906 3856 +rect 5586 3232 5594 3296 +rect 5658 3232 5674 3296 +rect 5738 3232 5754 3296 +rect 5818 3232 5834 3296 +rect 5898 3232 5906 3296 +rect 5586 2208 5906 3232 +rect 5586 2144 5594 2208 +rect 5658 2144 5674 2208 +rect 5738 2144 5754 2208 +rect 5818 2144 5834 2208 +rect 5898 2144 5906 2208 +rect 5586 1120 5906 2144 +rect 5586 1056 5594 1120 +rect 5658 1056 5674 1120 +rect 5738 1056 5754 1120 +rect 5818 1056 5834 1120 +rect 5898 1056 5906 1120 +rect 5586 1040 5906 1056 +rect 6483 3840 6803 3856 +rect 6483 3776 6491 3840 +rect 6555 3776 6571 3840 +rect 6635 3776 6651 3840 +rect 6715 3776 6731 3840 +rect 6795 3776 6803 3840 +rect 6483 2752 6803 3776 +rect 6483 2688 6491 2752 +rect 6555 2688 6571 2752 +rect 6635 2688 6651 2752 +rect 6715 2688 6731 2752 +rect 6795 2688 6803 2752 +rect 6483 1664 6803 2688 +rect 6483 1600 6491 1664 +rect 6555 1600 6571 1664 +rect 6635 1600 6651 1664 +rect 6715 1600 6731 1664 +rect 6795 1600 6803 1664 +rect 6483 1040 6803 1600 +rect 7379 3296 7699 3856 +rect 7379 3232 7387 3296 +rect 7451 3232 7467 3296 +rect 7531 3232 7547 3296 +rect 7611 3232 7627 3296 +rect 7691 3232 7699 3296 +rect 7379 2208 7699 3232 +rect 7379 2144 7387 2208 +rect 7451 2144 7467 2208 +rect 7531 2144 7547 2208 +rect 7611 2144 7627 2208 +rect 7691 2144 7699 2208 +rect 7379 1120 7699 2144 +rect 7379 1056 7387 1120 +rect 7451 1056 7467 1120 +rect 7531 1056 7547 1120 +rect 7611 1056 7627 1120 +rect 7691 1056 7699 1120 +rect 7379 1040 7699 1056 +use sky130_fd_sc_hd__clkbuf_8 BUF\[0\] OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag +timestamp 1665323087 +transform 1 0 1104 0 1 1088 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[1\] +timestamp 1665323087 +transform 1 0 1104 0 1 3264 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[2\] +timestamp 1665323087 +transform -1 0 1932 0 -1 2176 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[3\] +timestamp 1665323087 +transform 1 0 1840 0 -1 3264 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[4\] +timestamp 1665323087 +transform -1 0 2760 0 1 2176 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[5\] +timestamp 1665323087 +transform -1 0 3312 0 -1 2176 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[6\] +timestamp 1665323087 +transform 1 0 3220 0 -1 3264 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[7\] +timestamp 1665323087 +transform 1 0 3680 0 -1 2176 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[8\] +timestamp 1665323087 +transform 1 0 4140 0 1 2176 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[9\] +timestamp 1665323087 +transform 1 0 5520 0 1 2176 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[10\] +timestamp 1665323087 +transform 1 0 5796 0 -1 2176 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[11\] +timestamp 1665323087 +transform 1 0 5796 0 -1 3264 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[12\] +timestamp 1665323087 +transform -1 0 6808 0 1 1088 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[13\] +timestamp 1665323087 +transform -1 0 6808 0 1 3264 +box -38 -48 1050 592 +use sky130_fd_sc_hd__clkbuf_8 BUF\[14\] +timestamp 1665323087 +transform -1 0 5336 0 1 1088 +box -38 -48 1050 592 +use sky130_fd_sc_hd__decap_4 FILLER_0_3 OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag +timestamp 1665323087 +transform 1 0 644 0 1 1088 +box -38 -48 406 592 +use sky130_fd_sc_hd__fill_1 FILLER_0_7 OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag +timestamp 1665323087 +transform 1 0 1012 0 1 1088 +box -38 -48 130 592 +use sky130_fd_sc_hd__decap_8 FILLER_0_19 OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag +timestamp 1665323087 +transform 1 0 2116 0 1 1088 +box -38 -48 774 592 +use sky130_fd_sc_hd__fill_1 FILLER_0_27 +timestamp 1665323087 +transform 1 0 2852 0 1 1088 +box -38 -48 130 592 +use sky130_ef_sc_hd__decap_12 FILLER_0_29 OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag +timestamp 1665323087 +transform 1 0 3036 0 1 1088 +box -38 -48 1142 592 +use sky130_fd_sc_hd__fill_2 FILLER_0_41 OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag +timestamp 1665323087 +transform 1 0 4140 0 1 1088 +box -38 -48 222 592 +use sky130_fd_sc_hd__fill_2 FILLER_0_54 +timestamp 1665323087 +transform 1 0 5336 0 1 1088 +box -38 -48 222 592 +use sky130_fd_sc_hd__fill_2 FILLER_0_57 +timestamp 1665323087 +transform 1 0 5612 0 1 1088 +box -38 -48 222 592 +use sky130_fd_sc_hd__decap_4 FILLER_0_70 +timestamp 1665323087 +transform 1 0 6808 0 1 1088 +box -38 -48 406 592 +use sky130_fd_sc_hd__fill_1 FILLER_0_74 +timestamp 1665323087 +transform 1 0 7176 0 1 1088 +box -38 -48 130 592 +use sky130_fd_sc_hd__decap_3 FILLER_1_3 OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag +timestamp 1665323087 +transform 1 0 644 0 -1 2176 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_4 FILLER_1_17 +timestamp 1665323087 +transform 1 0 1932 0 -1 2176 +box -38 -48 406 592 +use sky130_fd_sc_hd__decap_4 FILLER_1_32 +timestamp 1665323087 +transform 1 0 3312 0 -1 2176 +box -38 -48 406 592 +use sky130_fd_sc_hd__decap_8 FILLER_1_47 +timestamp 1665323087 +transform 1 0 4692 0 -1 2176 +box -38 -48 774 592 +use sky130_fd_sc_hd__fill_1 FILLER_1_55 +timestamp 1665323087 +transform 1 0 5428 0 -1 2176 +box -38 -48 130 592 +use sky130_fd_sc_hd__fill_2 FILLER_1_57 +timestamp 1665323087 +transform 1 0 5612 0 -1 2176 +box -38 -48 222 592 +use sky130_fd_sc_hd__decap_4 FILLER_1_70 +timestamp 1665323087 +transform 1 0 6808 0 -1 2176 +box -38 -48 406 592 +use sky130_fd_sc_hd__fill_1 FILLER_1_74 +timestamp 1665323087 +transform 1 0 7176 0 -1 2176 +box -38 -48 130 592 +use sky130_ef_sc_hd__decap_12 FILLER_2_3 +timestamp 1665323087 +transform 1 0 644 0 1 2176 +box -38 -48 1142 592 +use sky130_fd_sc_hd__fill_2 FILLER_2_26 +timestamp 1665323087 +transform 1 0 2760 0 1 2176 +box -38 -48 222 592 +use sky130_ef_sc_hd__decap_12 FILLER_2_29 +timestamp 1665323087 +transform 1 0 3036 0 1 2176 +box -38 -48 1142 592 +use sky130_fd_sc_hd__decap_4 FILLER_2_52 +timestamp 1665323087 +transform 1 0 5152 0 1 2176 +box -38 -48 406 592 +use sky130_fd_sc_hd__decap_8 FILLER_2_67 +timestamp 1665323087 +transform 1 0 6532 0 1 2176 +box -38 -48 774 592 +use sky130_ef_sc_hd__decap_12 FILLER_3_3 +timestamp 1665323087 +transform 1 0 644 0 -1 3264 +box -38 -48 1142 592 +use sky130_fd_sc_hd__fill_1 FILLER_3_15 +timestamp 1665323087 +transform 1 0 1748 0 -1 3264 +box -38 -48 130 592 +use sky130_fd_sc_hd__decap_4 FILLER_3_27 +timestamp 1665323087 +transform 1 0 2852 0 -1 3264 +box -38 -48 406 592 +use sky130_ef_sc_hd__decap_12 FILLER_3_42 +timestamp 1665323087 +transform 1 0 4232 0 -1 3264 +box -38 -48 1142 592 +use sky130_fd_sc_hd__fill_2 FILLER_3_54 +timestamp 1665323087 +transform 1 0 5336 0 -1 3264 +box -38 -48 222 592 +use sky130_fd_sc_hd__fill_2 FILLER_3_57 +timestamp 1665323087 +transform 1 0 5612 0 -1 3264 +box -38 -48 222 592 +use sky130_fd_sc_hd__decap_4 FILLER_3_70 +timestamp 1665323087 +transform 1 0 6808 0 -1 3264 +box -38 -48 406 592 +use sky130_fd_sc_hd__fill_1 FILLER_3_74 +timestamp 1665323087 +transform 1 0 7176 0 -1 3264 +box -38 -48 130 592 +use sky130_fd_sc_hd__decap_4 FILLER_4_3 +timestamp 1665323087 +transform 1 0 644 0 1 3264 +box -38 -48 406 592 +use sky130_fd_sc_hd__fill_1 FILLER_4_7 +timestamp 1665323087 +transform 1 0 1012 0 1 3264 +box -38 -48 130 592 +use sky130_fd_sc_hd__decap_8 FILLER_4_19 +timestamp 1665323087 +transform 1 0 2116 0 1 3264 +box -38 -48 774 592 +use sky130_fd_sc_hd__fill_1 FILLER_4_27 +timestamp 1665323087 +transform 1 0 2852 0 1 3264 +box -38 -48 130 592 +use sky130_ef_sc_hd__decap_12 FILLER_4_29 +timestamp 1665323087 +transform 1 0 3036 0 1 3264 +box -38 -48 1142 592 +use sky130_ef_sc_hd__decap_12 FILLER_4_41 +timestamp 1665323087 +transform 1 0 4140 0 1 3264 +box -38 -48 1142 592 +use sky130_fd_sc_hd__decap_3 FILLER_4_53 +timestamp 1665323087 +transform 1 0 5244 0 1 3264 +box -38 -48 314 592 +use sky130_fd_sc_hd__fill_2 FILLER_4_57 +timestamp 1665323087 +transform 1 0 5612 0 1 3264 +box -38 -48 222 592 +use sky130_fd_sc_hd__decap_4 FILLER_4_70 +timestamp 1665323087 +transform 1 0 6808 0 1 3264 +box -38 -48 406 592 +use sky130_fd_sc_hd__fill_1 FILLER_4_74 +timestamp 1665323087 +transform 1 0 7176 0 1 3264 +box -38 -48 130 592 +use sky130_fd_sc_hd__decap_3 PHY_0 +timestamp 1665323087 +transform 1 0 368 0 1 1088 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_1 +timestamp 1665323087 +transform -1 0 7544 0 1 1088 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_2 +timestamp 1665323087 +transform 1 0 368 0 -1 2176 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_3 +timestamp 1665323087 +transform -1 0 7544 0 -1 2176 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_4 +timestamp 1665323087 +transform 1 0 368 0 1 2176 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_5 +timestamp 1665323087 +transform -1 0 7544 0 1 2176 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_6 +timestamp 1665323087 +transform 1 0 368 0 -1 3264 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_7 +timestamp 1665323087 +transform -1 0 7544 0 -1 3264 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_8 +timestamp 1665323087 +transform 1 0 368 0 1 3264 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_9 +timestamp 1665323087 +transform -1 0 7544 0 1 3264 +box -38 -48 314 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag +timestamp 1665323087 +transform 1 0 2944 0 1 1088 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_11 +timestamp 1665323087 +transform 1 0 5520 0 1 1088 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_12 +timestamp 1665323087 +transform 1 0 5520 0 -1 2176 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_13 +timestamp 1665323087 +transform 1 0 2944 0 1 2176 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_14 +timestamp 1665323087 +transform 1 0 5520 0 -1 3264 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_15 +timestamp 1665323087 +transform 1 0 2944 0 1 3264 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_16 +timestamp 1665323087 +transform 1 0 5520 0 1 3264 +box -38 -48 130 592 +<< labels >> +flabel metal4 s 2000 1040 2320 3856 0 FreeSans 1920 90 0 0 VGND +port 0 nsew ground bidirectional +flabel metal4 s 3793 1040 4113 3856 0 FreeSans 1920 90 0 0 VGND +port 0 nsew ground bidirectional +flabel metal4 s 5586 1040 5906 3856 0 FreeSans 1920 90 0 0 VGND +port 0 nsew ground bidirectional +flabel metal4 s 7379 1040 7699 3856 0 FreeSans 1920 90 0 0 VGND +port 0 nsew ground bidirectional +flabel metal4 s 1104 1040 1424 3856 0 FreeSans 1920 90 0 0 VPWR +port 1 nsew power bidirectional +flabel metal4 s 2897 1040 3217 3856 0 FreeSans 1920 90 0 0 VPWR +port 1 nsew power bidirectional +flabel metal4 s 4690 1040 5010 3856 0 FreeSans 1920 90 0 0 VPWR +port 1 nsew power bidirectional +flabel metal4 s 6483 1040 6803 3856 0 FreeSans 1920 90 0 0 VPWR +port 1 nsew power bidirectional +flabel metal2 s 2134 4200 2190 5000 0 FreeSans 224 90 0 0 in_n[0] +port 2 nsew signal input +flabel metal2 s 6734 4200 6790 5000 0 FreeSans 224 90 0 0 in_n[10] +port 3 nsew signal input +flabel metal2 s 7194 4200 7250 5000 0 FreeSans 224 90 0 0 in_n[11] +port 4 nsew signal input +flabel metal2 s 2594 4200 2650 5000 0 FreeSans 224 90 0 0 in_n[1] +port 5 nsew signal input +flabel metal2 s 3054 4200 3110 5000 0 FreeSans 224 90 0 0 in_n[2] +port 6 nsew signal input +flabel metal2 s 3514 4200 3570 5000 0 FreeSans 224 90 0 0 in_n[3] +port 7 nsew signal input +flabel metal2 s 3974 4200 4030 5000 0 FreeSans 224 90 0 0 in_n[4] +port 8 nsew signal input +flabel metal2 s 4434 4200 4490 5000 0 FreeSans 224 90 0 0 in_n[5] +port 9 nsew signal input +flabel metal2 s 4894 4200 4950 5000 0 FreeSans 224 90 0 0 in_n[6] +port 10 nsew signal input +flabel metal2 s 5354 4200 5410 5000 0 FreeSans 224 90 0 0 in_n[7] +port 11 nsew signal input +flabel metal2 s 5814 4200 5870 5000 0 FreeSans 224 90 0 0 in_n[8] +port 12 nsew signal input +flabel metal2 s 6274 4200 6330 5000 0 FreeSans 224 90 0 0 in_n[9] +port 13 nsew signal input +flabel metal2 s 754 0 810 800 0 FreeSans 224 90 0 0 in_s[0] +port 14 nsew signal input +flabel metal2 s 1214 0 1270 800 0 FreeSans 224 90 0 0 in_s[1] +port 15 nsew signal input +flabel metal2 s 1674 0 1730 800 0 FreeSans 224 90 0 0 in_s[2] +port 16 nsew signal input +flabel metal2 s 754 4200 810 5000 0 FreeSans 224 90 0 0 out_n[0] +port 17 nsew signal tristate +flabel metal2 s 1214 4200 1270 5000 0 FreeSans 224 90 0 0 out_n[1] +port 18 nsew signal tristate +flabel metal2 s 1674 4200 1730 5000 0 FreeSans 224 90 0 0 out_n[2] +port 19 nsew signal tristate +flabel metal2 s 2134 0 2190 800 0 FreeSans 224 90 0 0 out_s[0] +port 20 nsew signal tristate +flabel metal2 s 6734 0 6790 800 0 FreeSans 224 90 0 0 out_s[10] +port 21 nsew signal tristate +flabel metal2 s 7194 0 7250 800 0 FreeSans 224 90 0 0 out_s[11] +port 22 nsew signal tristate +flabel metal2 s 2594 0 2650 800 0 FreeSans 224 90 0 0 out_s[1] +port 23 nsew signal tristate +flabel metal2 s 3054 0 3110 800 0 FreeSans 224 90 0 0 out_s[2] +port 24 nsew signal tristate +flabel metal2 s 3514 0 3570 800 0 FreeSans 224 90 0 0 out_s[3] +port 25 nsew signal tristate +flabel metal2 s 3974 0 4030 800 0 FreeSans 224 90 0 0 out_s[4] +port 26 nsew signal tristate +flabel metal2 s 4434 0 4490 800 0 FreeSans 224 90 0 0 out_s[5] +port 27 nsew signal tristate +flabel metal2 s 4894 0 4950 800 0 FreeSans 224 90 0 0 out_s[6] +port 28 nsew signal tristate +flabel metal2 s 5354 0 5410 800 0 FreeSans 224 90 0 0 out_s[7] +port 29 nsew signal tristate +flabel metal2 s 5814 0 5870 800 0 FreeSans 224 90 0 0 out_s[8] +port 30 nsew signal tristate +flabel metal2 s 6274 0 6330 800 0 FreeSans 224 90 0 0 out_s[9] +port 31 nsew signal tristate +<< properties >> +string FIXED_BBOX 0 0 8000 5000 +<< end >> diff --git a/maglef/buff_flash_clkrst.mag b/maglef/buff_flash_clkrst.mag new file mode 100644 index 00000000..086182ae --- /dev/null +++ b/maglef/buff_flash_clkrst.mag @@ -0,0 +1,172 @@ +magic +tech sky130A +magscale 1 2 +timestamp 1665682150 +<< nwell >> +rect 330 3525 7582 3846 +rect 330 2437 7582 3003 +rect 330 1349 7582 1915 +<< obsli1 >> +rect 368 1071 7544 3825 +<< obsm1 >> +rect 368 1040 7699 3856 +<< metal2 >> +rect 754 4200 810 5000 +rect 1214 4200 1270 5000 +rect 1674 4200 1730 5000 +rect 2134 4200 2190 5000 +rect 2594 4200 2650 5000 +rect 3054 4200 3110 5000 +rect 3514 4200 3570 5000 +rect 3974 4200 4030 5000 +rect 4434 4200 4490 5000 +rect 4894 4200 4950 5000 +rect 5354 4200 5410 5000 +rect 5814 4200 5870 5000 +rect 6274 4200 6330 5000 +rect 6734 4200 6790 5000 +rect 7194 4200 7250 5000 +rect 754 0 810 800 +rect 1214 0 1270 800 +rect 1674 0 1730 800 +rect 2134 0 2190 800 +rect 2594 0 2650 800 +rect 3054 0 3110 800 +rect 3514 0 3570 800 +rect 3974 0 4030 800 +rect 4434 0 4490 800 +rect 4894 0 4950 800 +rect 5354 0 5410 800 +rect 5814 0 5870 800 +rect 6274 0 6330 800 +rect 6734 0 6790 800 +rect 7194 0 7250 800 +<< obsm2 >> +rect 866 4144 1158 4298 +rect 1326 4144 1618 4298 +rect 1786 4144 2078 4298 +rect 2246 4144 2538 4298 +rect 2706 4144 2998 4298 +rect 3166 4144 3458 4298 +rect 3626 4144 3918 4298 +rect 4086 4144 4378 4298 +rect 4546 4144 4838 4298 +rect 5006 4144 5298 4298 +rect 5466 4144 5758 4298 +rect 5926 4144 6218 4298 +rect 6386 4144 6678 4298 +rect 6846 4144 7138 4298 +rect 7306 4144 7693 4298 +rect 756 856 7693 4144 +rect 866 734 1158 856 +rect 1326 734 1618 856 +rect 1786 734 2078 856 +rect 2246 734 2538 856 +rect 2706 734 2998 856 +rect 3166 734 3458 856 +rect 3626 734 3918 856 +rect 4086 734 4378 856 +rect 4546 734 4838 856 +rect 5006 734 5298 856 +rect 5466 734 5758 856 +rect 5926 734 6218 856 +rect 6386 734 6678 856 +rect 6846 734 7138 856 +rect 7306 734 7693 856 +<< obsm3 >> +rect 1106 1055 7697 3841 +<< metal4 >> +rect 1104 1040 1424 3856 +rect 2000 1040 2320 3856 +rect 2897 1040 3217 3856 +rect 3793 1040 4113 3856 +rect 4690 1040 5010 3856 +rect 5586 1040 5906 3856 +rect 6483 1040 6803 3856 +rect 7379 1040 7699 3856 +<< labels >> +rlabel metal4 s 2000 1040 2320 3856 6 VGND +port 1 nsew ground bidirectional +rlabel metal4 s 3793 1040 4113 3856 6 VGND +port 1 nsew ground bidirectional +rlabel metal4 s 5586 1040 5906 3856 6 VGND +port 1 nsew ground bidirectional +rlabel metal4 s 7379 1040 7699 3856 6 VGND +port 1 nsew ground bidirectional +rlabel metal4 s 1104 1040 1424 3856 6 VPWR +port 2 nsew power bidirectional +rlabel metal4 s 2897 1040 3217 3856 6 VPWR +port 2 nsew power bidirectional +rlabel metal4 s 4690 1040 5010 3856 6 VPWR +port 2 nsew power bidirectional +rlabel metal4 s 6483 1040 6803 3856 6 VPWR +port 2 nsew power bidirectional +rlabel metal2 s 2134 4200 2190 5000 6 in_n[0] +port 3 nsew signal input +rlabel metal2 s 6734 4200 6790 5000 6 in_n[10] +port 4 nsew signal input +rlabel metal2 s 7194 4200 7250 5000 6 in_n[11] +port 5 nsew signal input +rlabel metal2 s 2594 4200 2650 5000 6 in_n[1] +port 6 nsew signal input +rlabel metal2 s 3054 4200 3110 5000 6 in_n[2] +port 7 nsew signal input +rlabel metal2 s 3514 4200 3570 5000 6 in_n[3] +port 8 nsew signal input +rlabel metal2 s 3974 4200 4030 5000 6 in_n[4] +port 9 nsew signal input +rlabel metal2 s 4434 4200 4490 5000 6 in_n[5] +port 10 nsew signal input +rlabel metal2 s 4894 4200 4950 5000 6 in_n[6] +port 11 nsew signal input +rlabel metal2 s 5354 4200 5410 5000 6 in_n[7] +port 12 nsew signal input +rlabel metal2 s 5814 4200 5870 5000 6 in_n[8] +port 13 nsew signal input +rlabel metal2 s 6274 4200 6330 5000 6 in_n[9] +port 14 nsew signal input +rlabel metal2 s 754 0 810 800 6 in_s[0] +port 15 nsew signal input +rlabel metal2 s 1214 0 1270 800 6 in_s[1] +port 16 nsew signal input +rlabel metal2 s 1674 0 1730 800 6 in_s[2] +port 17 nsew signal input +rlabel metal2 s 754 4200 810 5000 6 out_n[0] +port 18 nsew signal output +rlabel metal2 s 1214 4200 1270 5000 6 out_n[1] +port 19 nsew signal output +rlabel metal2 s 1674 4200 1730 5000 6 out_n[2] +port 20 nsew signal output +rlabel metal2 s 2134 0 2190 800 6 out_s[0] +port 21 nsew signal output +rlabel metal2 s 6734 0 6790 800 6 out_s[10] +port 22 nsew signal output +rlabel metal2 s 7194 0 7250 800 6 out_s[11] +port 23 nsew signal output +rlabel metal2 s 2594 0 2650 800 6 out_s[1] +port 24 nsew signal output +rlabel metal2 s 3054 0 3110 800 6 out_s[2] +port 25 nsew signal output +rlabel metal2 s 3514 0 3570 800 6 out_s[3] +port 26 nsew signal output +rlabel metal2 s 3974 0 4030 800 6 out_s[4] +port 27 nsew signal output +rlabel metal2 s 4434 0 4490 800 6 out_s[5] +port 28 nsew signal output +rlabel metal2 s 4894 0 4950 800 6 out_s[6] +port 29 nsew signal output +rlabel metal2 s 5354 0 5410 800 6 out_s[7] +port 30 nsew signal output +rlabel metal2 s 5814 0 5870 800 6 out_s[8] +port 31 nsew signal output +rlabel metal2 s 6274 0 6330 800 6 out_s[9] +port 32 nsew signal output +<< properties >> +string FIXED_BBOX 0 0 8000 5000 +string LEFclass BLOCK +string LEFview TRUE +string GDS_END 83666 +string GDS_FILE /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.magic.gds +string GDS_START 25066 +<< end >> + diff --git a/openlane/buff_flash_clkrst/config.tcl b/openlane/buff_flash_clkrst/config.tcl new file mode 100644 index 00000000..3a3e56ff --- /dev/null +++ b/openlane/buff_flash_clkrst/config.tcl @@ -0,0 +1,48 @@ +# SPDX-FileCopyrightText: 2020 Efabless Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# SPDX-License-Identifier: Apache-2.0 + +set script_dir [file dirname [file normalize [info script]]] +# virtual clock +set ::env(CLOCK_PERIOD) 8 +set ::env(CLOCK_PORT) "" +set ::env(DESIGN_NAME) buff_flash_clkrst +set ::env(DESIGN_IS_CORE) 0 +# set ::env(DESIGN_IS_CORE) 1 +set ::env(SYNTH_READ_BLACKBOX_LIB) 1 +set ::env(FP_SIZING) "absolute" +set ::env(DIE_AREA) "0 0 40 25" +# set ::env(CORE_AREA) "1 1 19 19" + +set ::env(VERILOG_FILES) "$::env(DESIGN_DIR)/../../verilog/rtl/buff_flash_clkrst.v" +set ::env(DRC_EXCLUDE_CELL_LIST) [glob $::env(DESIGN_DIR)/drc_exclude.list] +set ::env(FP_PIN_ORDER_CFG) [glob $::env(DESIGN_DIR)/pin_order.cfg] + +set ::env(FP_PDN_VOFFSET) 2 +set ::env(FP_PDN_VPITCH) 7 +set ::env(FP_PDN_VSPACING) 2 +set ::env(PL_TARGET_DENSITY) 0.96 +# set ::env(FP_CORE_UTIL) 0.99 +set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) 0 +set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) 0 +set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) 0 +set ::env(SYNTH_BUFFERING) 0 +set ::env(SYNTH_SIZING) 0 +set ::env(TAP_DECAP_INSERTION) 1 +set ::env(CLOCK_TREE_SYNTH) 0 +set ::env(RIGHT_MARGIN_MULT) {4} +set ::env(LEFT_MARGIN_MULT) {4} +set ::env(TOP_MARGIN_MULT) {2} +set ::env(BOTTOM_MARGIN_MULT) {2} +set ::env(MAGIC_EXT_USE_GDS) 1 \ No newline at end of file diff --git a/openlane/buff_flash_clkrst/drc_exclude.list b/openlane/buff_flash_clkrst/drc_exclude.list new file mode 100644 index 00000000..65e1eebc --- /dev/null +++ b/openlane/buff_flash_clkrst/drc_exclude.list @@ -0,0 +1,80 @@ +sky130_fd_sc_hd__a2111oi_0 +sky130_fd_sc_hd__a21boi_0 +sky130_fd_sc_hd__and2_0 +sky130_fd_sc_hd__buf_16 +sky130_fd_sc_hd__clkdlybuf4s15_1 +sky130_fd_sc_hd__clkdlybuf4s18_1 +sky130_fd_sc_hd__fa_4 +sky130_fd_sc_hd__lpflow_bleeder_1 +sky130_fd_sc_hd__lpflow_clkbufkapwr_1 +sky130_fd_sc_hd__lpflow_clkbufkapwr_16 +sky130_fd_sc_hd__lpflow_clkbufkapwr_2 +sky130_fd_sc_hd__lpflow_clkbufkapwr_4 +sky130_fd_sc_hd__lpflow_clkbufkapwr_8 +sky130_fd_sc_hd__lpflow_clkinvkapwr_1 +sky130_fd_sc_hd__lpflow_clkinvkapwr_16 +sky130_fd_sc_hd__lpflow_clkinvkapwr_2 +sky130_fd_sc_hd__lpflow_clkinvkapwr_4 +sky130_fd_sc_hd__lpflow_clkinvkapwr_8 +sky130_fd_sc_hd__lpflow_decapkapwr_12 +sky130_fd_sc_hd__lpflow_decapkapwr_3 +sky130_fd_sc_hd__lpflow_decapkapwr_4 +sky130_fd_sc_hd__lpflow_decapkapwr_6 +sky130_fd_sc_hd__lpflow_decapkapwr_8 +sky130_fd_sc_hd__lpflow_inputiso0n_1 +sky130_fd_sc_hd__lpflow_inputiso0p_1 +sky130_fd_sc_hd__lpflow_inputiso1n_1 +sky130_fd_sc_hd__lpflow_inputiso1p_1 +sky130_fd_sc_hd__lpflow_inputisolatch_1 +sky130_fd_sc_hd__lpflow_isobufsrc_1 +sky130_fd_sc_hd__lpflow_isobufsrc_16 +sky130_fd_sc_hd__lpflow_isobufsrc_2 +sky130_fd_sc_hd__lpflow_isobufsrc_4 +sky130_fd_sc_hd__lpflow_isobufsrc_8 +sky130_fd_sc_hd__lpflow_isobufsrckapwr_16 +sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1 +sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2 +sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4 +sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4 +sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1 +sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2 +sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4 +sky130_fd_sc_hd__mux4_4 +sky130_fd_sc_hd__o21ai_0 +sky130_fd_sc_hd__o311ai_0 +sky130_fd_sc_hd__or2_0 +sky130_fd_sc_hd__probe_p_8 +sky130_fd_sc_hd__probec_p_8 +sky130_fd_sc_hd__xor3_1 +sky130_fd_sc_hd__xor3_2 +sky130_fd_sc_hd__xor3_4 +sky130_fd_sc_hd__xnor3_1 +sky130_fd_sc_hd__xnor3_2 +sky130_fd_sc_hd__xnor3_4 +sky130_fd_sc_hd__clkbuf_1 +sky130_fd_sc_hd__clkbuf_2 +sky130_fd_sc_hd__clkbuf_12 +sky130_fd_sc_hd__clkbuf_16 +sky130_fd_sc_hd__clkdlybuf4s15_1 +sky130_fd_sc_hd__clkdlybuf4s15_2 +sky130_fd_sc_hd__clkdlybuf4s18_1 +sky130_fd_sc_hd__clkdlybuf4s18_2 +sky130_fd_sc_hd__clkdlybuf4s25_1 +sky130_fd_sc_hd__clkdlybuf4s25_2 +sky130_fd_sc_hd__clkdlybuf4s50_1 +sky130_fd_sc_hd__clkdlybuf4s50_2 +sky130_fd_sc_hd__dlygate4sd1_1 +sky130_fd_sc_hd__dlygate4sd2_1 +sky130_fd_sc_hd__dlygate4sd3_1 +sky130_fd_sc_hd__dlymetal6s2s_1 +sky130_fd_sc_hd__dlymetal6s4s_1 +sky130_fd_sc_hd__dlymetal6s6s_1 +sky130_fd_sc_hd__buf_1 +sky130_fd_sc_hd__buf_2 +sky130_fd_sc_hd__buf_12 +sky130_fd_sc_hd__decap_3 +sky130_ef_sc_hd__decap_12 +sky130_fd_sc_hd__decap_4 +sky130_fd_sc_hd__decap_8 +sky130_fd_sc_hd__decap_3 +sky130_fd_sc_hd__decap_6 diff --git a/openlane/buff_flash_clkrst/pin_order.cfg b/openlane/buff_flash_clkrst/pin_order.cfg new file mode 100644 index 00000000..3962bdf2 --- /dev/null +++ b/openlane/buff_flash_clkrst/pin_order.cfg @@ -0,0 +1,7 @@ +#S +in_s.* +out_s.* + +#N +out_n.* +in_n.* \ No newline at end of file diff --git a/sdc/buff_flash_clkrst.sdc b/sdc/buff_flash_clkrst.sdc new file mode 100644 index 00000000..e677bf2c --- /dev/null +++ b/sdc/buff_flash_clkrst.sdc @@ -0,0 +1,79 @@ +############################################################################### +# Created by write_sdc +# Thu Oct 13 17:28:51 2022 +############################################################################### +current_design buff_flash_clkrst +############################################################################### +# Timing Constraints +############################################################################### +create_clock -name __VIRTUAL_CLK__ -period 8.0000 +set_clock_uncertainty 0.2500 __VIRTUAL_CLK__ +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[0]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[10]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[11]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[1]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[2]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[3]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[4]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[5]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[6]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[7]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[8]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_n[9]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_s[0]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_s[1]}] +set_input_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {in_s[2]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_n[0]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_n[1]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_n[2]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[0]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[10]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[11]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[1]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[2]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[3]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[4]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[5]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[6]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[7]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[8]}] +set_output_delay 1.6000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {out_s[9]}] +############################################################################### +# Environment +############################################################################### +set_load -pin_load 0.0334 [get_ports {out_n[2]}] +set_load -pin_load 0.0334 [get_ports {out_n[1]}] +set_load -pin_load 0.0334 [get_ports {out_n[0]}] +set_load -pin_load 0.0334 [get_ports {out_s[11]}] +set_load -pin_load 0.0334 [get_ports {out_s[10]}] +set_load -pin_load 0.0334 [get_ports {out_s[9]}] +set_load -pin_load 0.0334 [get_ports {out_s[8]}] +set_load -pin_load 0.0334 [get_ports {out_s[7]}] +set_load -pin_load 0.0334 [get_ports {out_s[6]}] +set_load -pin_load 0.0334 [get_ports {out_s[5]}] +set_load -pin_load 0.0334 [get_ports {out_s[4]}] +set_load -pin_load 0.0334 [get_ports {out_s[3]}] +set_load -pin_load 0.0334 [get_ports {out_s[2]}] +set_load -pin_load 0.0334 [get_ports {out_s[1]}] +set_load -pin_load 0.0334 [get_ports {out_s[0]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[11]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[10]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[9]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[8]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[7]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[6]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[5]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[4]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[3]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[2]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[1]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_n[0]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_s[2]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_s[1]}] +set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in_s[0]}] +set_timing_derate -early 0.9500 +set_timing_derate -late 1.0500 +############################################################################### +# Design Rules +############################################################################### +set_max_fanout 10.0000 [current_design] diff --git a/sdf/buff_flash_clkrst.sdf b/sdf/buff_flash_clkrst.sdf new file mode 100644 index 00000000..6553c34f --- /dev/null +++ b/sdf/buff_flash_clkrst.sdf @@ -0,0 +1,186 @@ +(DELAYFILE + (SDFVERSION "3.0") + (DESIGN "buff_flash_clkrst") + (DATE "Thu Oct 13 17:29:08 2022") + (VENDOR "Parallax") + (PROGRAM "STA") + (VERSION "2.3.1") + (DIVIDER .) + (VOLTAGE 1.800::1.800) + (PROCESS "1.000::1.000") + (TEMPERATURE 25.000::25.000) + (TIMESCALE 1ns) + (CELL + (CELLTYPE "buff_flash_clkrst") + (INSTANCE) + (DELAY + (ABSOLUTE + (INTERCONNECT in_n[0] BUF\[3\].A (0.018:0.018:0.018) (0.007:0.007:0.007)) + (INTERCONNECT in_n[10] BUF\[13\].A (0.017:0.017:0.017) (0.007:0.007:0.007)) + (INTERCONNECT in_n[11] BUF\[14\].A (0.025:0.025:0.025) (0.011:0.011:0.011)) + (INTERCONNECT in_n[1] BUF\[4\].A (0.019:0.019:0.019) (0.008:0.008:0.008)) + (INTERCONNECT in_n[2] BUF\[5\].A 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(CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[0\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.145:0.145:0.145) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[10\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.146:0.146:0.146) (0.146:0.146:0.146)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[11\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.145:0.145:0.145) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[12\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.145:0.145:0.145) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[13\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.145:0.145:0.145) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[14\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.149:0.149:0.149) (0.148:0.148:0.148)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[1\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.146:0.146:0.146) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[2\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.144:0.144:0.144) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[3\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.144:0.144:0.144) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[4\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.145:0.145:0.145) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[5\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.146:0.146:0.146) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[6\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.144:0.144:0.144) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[7\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.145:0.145:0.145) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[8\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.144:0.144:0.144) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[9\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.146:0.146:0.146) (0.146:0.146:0.146)) + ) + ) + ) +) diff --git a/sdf/multicorner/max/buff_flash_clkrst.ff.sdf b/sdf/multicorner/max/buff_flash_clkrst.ff.sdf new file mode 100644 index 00000000..56daec0d --- /dev/null +++ b/sdf/multicorner/max/buff_flash_clkrst.ff.sdf @@ -0,0 +1,186 @@ +(DELAYFILE + (SDFVERSION "3.0") + (DESIGN "buff_flash_clkrst") + (DATE "Thu Oct 13 17:29:04 2022") + (VENDOR "Parallax") + (PROGRAM "STA") + (VERSION "2.3.1") + (DIVIDER .) + (VOLTAGE 1.600::1.600) + (PROCESS "1.000::1.000") + (TEMPERATURE 100.000::100.000) + (TIMESCALE 1ns) + (CELL + (CELLTYPE "buff_flash_clkrst") + (INSTANCE) + (DELAY + (ABSOLUTE + (INTERCONNECT in_n[0] BUF\[3\].A (0.013:0.013:0.013) (0.004:0.004:0.004)) + (INTERCONNECT in_n[10] BUF\[13\].A (0.012:0.012:0.012) (0.004:0.004:0.004)) + (INTERCONNECT in_n[11] BUF\[14\].A (0.019:0.019:0.019) (0.006:0.006:0.006)) + (INTERCONNECT in_n[1] BUF\[4\].A (0.015:0.015:0.015) (0.005:0.005:0.005)) + (INTERCONNECT in_n[2] BUF\[5\].A (0.017:0.017:0.017) (0.005:0.005:0.005)) + (INTERCONNECT in_n[3] BUF\[6\].A (0.013:0.013:0.013) (0.004:0.004:0.004)) + (INTERCONNECT in_n[4] BUF\[7\].A (0.015:0.015:0.015) (0.004:0.004:0.004)) + (INTERCONNECT in_n[5] BUF\[8\].A (0.014:0.014:0.014) (0.004:0.004:0.004)) + (INTERCONNECT in_n[6] BUF\[9\].A (0.016:0.016:0.016) (0.005:0.005:0.005)) + (INTERCONNECT in_n[7] BUF\[10\].A (0.016:0.016:0.016) (0.005:0.005:0.005)) + (INTERCONNECT in_n[8] BUF\[11\].A (0.013:0.013:0.013) (0.004:0.004:0.004)) + (INTERCONNECT in_n[9] BUF\[12\].A (0.016:0.016:0.016) (0.005:0.005:0.005)) + (INTERCONNECT in_s[0] BUF\[0\].A (0.013:0.013:0.013) (0.004:0.004:0.004)) + (INTERCONNECT in_s[1] BUF\[1\].A (0.016:0.016:0.016) (0.005:0.005:0.005)) + (INTERCONNECT in_s[2] BUF\[2\].A (0.013:0.013:0.013) (0.004:0.004:0.004)) + (INTERCONNECT BUF\[0\].X out_n[0] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT BUF\[10\].X out_s[7] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT BUF\[11\].X out_s[8] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT BUF\[12\].X out_s[9] (0.001:0.001:0.001) (0.001:0.001:0.001)) + (INTERCONNECT BUF\[13\].X out_s[10] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT BUF\[14\].X out_s[11] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT BUF\[1\].X out_n[1] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT BUF\[2\].X out_n[2] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT BUF\[3\].X out_s[0] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT BUF\[4\].X out_s[1] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT BUF\[5\].X out_s[2] (0.002:0.002:0.002) (0.002:0.002:0.002)) + (INTERCONNECT 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(IOPATH A X (0.145:0.145:0.145) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[8\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.144:0.144:0.144) (0.145:0.145:0.145)) + ) + ) + ) + (CELL + (CELLTYPE "sky130_fd_sc_hd__clkbuf_8") + (INSTANCE BUF\[9\]) + (DELAY + (ABSOLUTE + (IOPATH A X (0.146:0.146:0.146) (0.146:0.146:0.146)) + ) + ) + ) +) diff --git a/signoff/buff_flash_clkrst/OPENLANE_VERSION b/signoff/buff_flash_clkrst/OPENLANE_VERSION new file mode 100644 index 00000000..c185049e --- /dev/null +++ b/signoff/buff_flash_clkrst/OPENLANE_VERSION @@ -0,0 +1 @@ +OpenLane e3a5189a1b0fc4290686fcf2ae46cd6d7947cf9f diff --git a/signoff/buff_flash_clkrst/PDK_SOURCES b/signoff/buff_flash_clkrst/PDK_SOURCES new file mode 100644 index 00000000..64834074 --- /dev/null +++ b/signoff/buff_flash_clkrst/PDK_SOURCES @@ -0,0 +1 @@ +open_pdks de752ec0ba4da0ecb1fbcd309eeec4993d88f5bc diff --git a/signoff/buff_flash_clkrst/metrics.csv b/signoff/buff_flash_clkrst/metrics.csv new file mode 100644 index 00000000..3bd0638c --- /dev/null +++ b/signoff/buff_flash_clkrst/metrics.csv @@ -0,0 +1,2 @@ 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+/home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst,buff_flash_clkrst,22_10_13_10_28,flow completed,0h0m29s0ms,0h0m13s0ms,-2.0,0.001,-1,46.74,481.88,-1,0,0,0,0,0,0,0,-1,-1,-1,-1,357,60,0.0,0.0,-1,0.0,0.0,0.0,0.0,-1,0.0,0.0,376761.0,0.0,5.19,13.85,0.0,0.0,0.0,4,30,4,30,0,0,0,15,0,0,0,0,0,0,0,0,-1,-1,-1,10,7,0,17,487.96799999999985,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,8.0,125.0,8,AREA 0,10,50,1,8.965,3.395,0.96,0.3,sky130_fd_sc_hd,3 diff --git a/spef/buff_flash_clkrst.spef b/spef/buff_flash_clkrst.spef new file mode 100644 index 00000000..e4f997a5 --- /dev/null +++ b/spef/buff_flash_clkrst.spef @@ -0,0 +1,587 @@ +*SPEF "ieee 1481-1999" +*DESIGN "buff_flash_clkrst" +*DATE "11:11:11 Fri 11 11, 1111" +*VENDOR "OpenRCX" +*PROGRAM "Parallel Extraction" +*VERSION "1.0" +*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE" +*DIVIDER / +*DELIMITER : +*BUS_DELIMITER [] +*T_UNIT 1 NS +*C_UNIT 1 PF +*R_UNIT 1 OHM +*L_UNIT 1 HENRY + +*NAME_MAP +*3 in_n[0] +*4 in_n[10] +*5 in_n[11] +*6 in_n[1] +*7 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6.74911e-05 +5 *43:A out_s[2] 6.05161e-06 +6 *43:A *44:A 0 +7 *42:A *43:A 0.000680277 +*RES +1 in_n[2] *43:A 27.5679 +*END + +*D_NET *8 0.000719992 +*CONN +*P in_n[3] I +*I *44:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[3] 0.000359996 +2 *44:A 0.000359996 +3 *44:A *45:A 0 +4 *43:A *44:A 0 +*RES +1 in_n[3] *44:A 20.5321 +*END + +*D_NET *9 0.00131838 +*CONN +*P in_n[4] I +*I *45:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[4] 0.000565243 +2 *45:A 0.000565243 +3 *45:A out_s[3] 0.000187893 +4 *45:A *46:A 0 +5 *44:A *45:A 0 +*RES +1 in_n[4] *45:A 25.3893 +*END + +*D_NET *10 0.00105711 +*CONN +*P in_n[5] I +*I *46:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[5] 0.000528554 +2 *46:A 0.000528554 +3 *45:A *46:A 0 +*RES +1 in_n[5] *46:A 23.5679 +*END + +*D_NET *11 0.00171215 +*CONN +*P in_n[6] I +*I *47:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[6] 0.000448575 +2 *47:A 0.000448575 +3 *47:A out_s[6] 0.000141554 +4 *47:A *34:A 0.000673444 +*RES +1 in_n[6] *47:A 25.3357 +*END + +*D_NET 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+*RES +1 in_s[0] *33:A 17.9071 +*END + +*D_NET *16 0.00194543 +*CONN +*P in_s[1] I +*I *39:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[1] 0.000603696 +2 *39:A 0.000603696 +3 *39:A out_n[0] 0.000738039 +4 *39:A out_n[2] 0 +5 *39:A *40:A 0 +6 *33:A *39:A 0 +*RES +1 in_s[1] *39:A 27.4607 +*END + +*D_NET *17 0.000720944 +*CONN +*P in_s[2] I +*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[2] 0.000360472 +2 *40:A 0.000360472 +3 *40:A out_s[0] 0 +4 *39:A *40:A 0 +*RES +1 in_s[2] *40:A 20.1214 +*END + +*D_NET *18 0.00251314 +*CONN +*P out_n[0] O +*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[0] 0.00083721 +2 *33:X 0.00083721 +3 out_n[0] out_n[1] 0 +4 out_n[0] out_n[2] 0 +5 *33:A out_n[0] 0.000100684 +6 *39:A out_n[0] 0.000738039 +*RES +1 *33:X out_n[0] 32.2464 +*END + +*D_NET *19 0.0008921 +*CONN +*P out_n[1] O +*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[1] 0.000313512 +2 *39:X 0.000313512 +3 out_n[1] out_n[2] 0.000265077 +4 out_n[0] out_n[1] 0 +*RES +1 *39:X out_n[1] 20.175 +*END + +*D_NET *20 0.00165991 +*CONN +*P out_n[2] O +*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[2] 0.000615442 +2 *40:X 0.000615442 +3 out_n[2] out_s[0] 0 +4 out_n[0] out_n[2] 0 +5 out_n[1] out_n[2] 0.000265077 +6 *39:A out_n[2] 0 +7 *41:A out_n[2] 0.000163953 +*RES +1 *40:X out_n[2] 26.7464 +*END + +*D_NET *21 0.00149166 +*CONN +*P out_s[0] O +*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[0] 0.000551682 +2 *41:X 0.000551682 +3 out_s[0] out_s[1] 0.000312442 +4 out_s[0] out_s[2] 0 +5 out_n[2] out_s[0] 0 +6 *40:A out_s[0] 0 +7 *42:A out_s[0] 7.58571e-05 +8 *43:A out_s[0] 0 +*RES +1 *41:X out_s[0] 27.6214 +*END + +*D_NET *22 0.00205685 +*CONN +*P out_s[10] O +*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[10] 0.000999988 +2 *37:X 0.000999988 +3 out_s[10] out_s[11] 0 +4 out_s[10] out_s[9] 0 +5 *36:A out_s[10] 0 +6 *37:A out_s[10] 5.68722e-05 +7 *38:A out_s[10] 0 +*RES +1 *37:X out_s[10] 30.4607 +*END + +*D_NET *23 0.00269979 +*CONN +*P out_s[11] O +*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[11] 0.001077 +2 *38:X 0.001077 +3 out_s[11] out_s[9] 0.000140933 +4 out_s[10] out_s[11] 0 +5 *36:A out_s[11] 9.98961e-05 +6 *38:A out_s[11] 0.000304969 +*RES +1 *38:X out_s[11] 28.3 +*END + +*D_NET *24 0.00141598 +*CONN +*P out_s[1] O +*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[1] 0.000407902 +2 *42:X 0.000407902 +3 out_s[1] out_s[2] 0.000220246 +4 out_s[1] out_s[3] 0 +5 out_s[0] out_s[1] 0.000312442 +6 *43:A out_s[1] 6.74911e-05 +*RES +1 *42:X out_s[1] 23.9964 +*END + +*D_NET *25 0.000977116 +*CONN +*P out_s[2] O +*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[2] 0.000375409 +2 *43:X 0.000375409 +3 out_s[2] out_s[3] 0 +4 out_s[0] out_s[2] 0 +5 out_s[1] out_s[2] 0.000220246 +6 *43:A out_s[2] 6.05161e-06 +*RES +1 *43:X out_s[2] 23.175 +*END + +*D_NET *26 0.00144163 +*CONN +*P out_s[3] O +*I *44:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[3] 0.000626868 +2 *44:X 0.000626868 +3 out_s[3] out_s[4] 0 +4 out_s[3] out_s[5] 0 +5 out_s[1] out_s[3] 0 +6 out_s[2] out_s[3] 0 +7 *45:A out_s[3] 0.000187893 +*RES +1 *44:X out_s[3] 25.9071 +*END + +*D_NET *27 0.000857812 +*CONN +*P out_s[4] O +*I *45:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[4] 0.00037039 +2 *45:X 0.00037039 +3 out_s[4] out_s[5] 0.000117033 +4 out_s[3] out_s[4] 0 +*RES +1 *45:X out_s[4] 21.3 +*END + +*D_NET *28 0.0011436 +*CONN +*P out_s[5] O +*I *46:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[5] 0.000513285 +2 *46:X 0.000513285 +3 out_s[5] out_s[6] 0 +4 out_s[3] out_s[5] 0 +5 out_s[4] out_s[5] 0.000117033 +*RES +1 *46:X out_s[5] 23.175 +*END + +*D_NET *29 0.00186776 +*CONN +*P out_s[6] O +*I *47:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[6] 0.000801981 +2 *47:X 0.000801981 +3 out_s[6] out_s[7] 8.37335e-05 +4 out_s[5] out_s[6] 0 +5 *34:A out_s[6] 3.85148e-05 +6 *47:A out_s[6] 0.000141554 +*RES +1 *47:X out_s[6] 27.5321 +*END + +*D_NET *30 0.00134038 +*CONN +*P out_s[7] O +*I *34:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[7] 0.000566407 +2 *34:X 0.000566407 +3 out_s[7] out_s[8] 0 +4 out_s[6] out_s[7] 8.37335e-05 +5 *34:A out_s[7] 0.000123836 +*RES +1 *34:X out_s[7] 24.3357 +*END + +*D_NET *31 0.00161835 +*CONN +*P out_s[8] O +*I *35:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[8] 0.000784339 +2 *35:X 0.000784339 +3 out_s[8] out_s[9] 4.36202e-05 +4 out_s[7] out_s[8] 0 +5 *34:A out_s[8] 0 +6 *35:A out_s[8] 6.05161e-06 +*RES +1 *35:X out_s[8] 27.3893 +*END + +*D_NET *32 0.000618171 +*CONN +*P out_s[9] O +*I *36:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[9] 0.000146343 +2 *36:X 0.000146343 +3 out_s[10] out_s[9] 0 +4 out_s[11] out_s[9] 0.000140933 +5 out_s[8] out_s[9] 4.36202e-05 +6 *38:A out_s[9] 0.000140933 +*RES +1 *36:X out_s[9] 17.4964 +*END diff --git a/spef/multicorner/buff_flash_clkrst.max.spef b/spef/multicorner/buff_flash_clkrst.max.spef new file mode 100644 index 00000000..e7faa01b --- /dev/null +++ b/spef/multicorner/buff_flash_clkrst.max.spef @@ -0,0 +1,619 @@ +*SPEF "ieee 1481-1999" +*DESIGN "buff_flash_clkrst" +*DATE "11:11:11 Fri 11 11, 1111" +*VENDOR "OpenRCX" +*PROGRAM "Parallel Extraction" +*VERSION "1.0" +*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE" +*DIVIDER / +*DELIMITER : +*BUS_DELIMITER [] +*T_UNIT 1 NS +*C_UNIT 1 PF +*R_UNIT 1 OHM +*L_UNIT 1 HENRY + +*NAME_MAP +*3 in_n[0] +*4 in_n[10] +*5 in_n[11] +*6 in_n[1] +*7 in_n[2] +*8 in_n[3] +*9 in_n[4] +*10 in_n[5] +*11 in_n[6] +*12 in_n[7] +*13 in_n[8] +*14 in_n[9] +*15 in_s[0] +*16 in_s[1] +*17 in_s[2] +*18 out_n[0] +*19 out_n[1] +*20 out_n[2] +*21 out_s[0] +*22 out_s[10] +*23 out_s[11] +*24 out_s[1] +*25 out_s[2] +*26 out_s[3] +*27 out_s[4] +*28 out_s[5] +*29 out_s[6] +*30 out_s[7] +*31 out_s[8] +*32 out_s[9] +*33 BUF\[0\] +*34 BUF\[10\] +*35 BUF\[11\] +*36 BUF\[12\] +*37 BUF\[13\] +*38 BUF\[14\] +*39 BUF\[1\] +*40 BUF\[2\] +*41 BUF\[3\] +*42 BUF\[4\] +*43 BUF\[5\] +*44 BUF\[6\] +*45 BUF\[7\] +*46 BUF\[8\] +*47 BUF\[9\] +*48 FILLER_0_19 +*49 FILLER_0_27 +*50 FILLER_0_29 +*51 FILLER_0_3 +*52 FILLER_0_41 +*53 FILLER_0_54 +*54 FILLER_0_57 +*55 FILLER_0_7 +*56 FILLER_0_70 +*57 FILLER_0_74 +*58 FILLER_1_17 +*59 FILLER_1_3 +*60 FILLER_1_32 +*61 FILLER_1_47 +*62 FILLER_1_55 +*63 FILLER_1_57 +*64 FILLER_1_70 +*65 FILLER_1_74 +*66 FILLER_2_26 +*67 FILLER_2_29 +*68 FILLER_2_3 +*69 FILLER_2_52 +*70 FILLER_2_67 +*71 FILLER_3_15 +*72 FILLER_3_27 +*73 FILLER_3_3 +*74 FILLER_3_42 +*75 FILLER_3_54 +*76 FILLER_3_57 +*77 FILLER_3_70 +*78 FILLER_3_74 +*79 FILLER_4_19 +*80 FILLER_4_27 +*81 FILLER_4_29 +*82 FILLER_4_3 +*83 FILLER_4_41 +*84 FILLER_4_53 +*85 FILLER_4_57 +*86 FILLER_4_7 +*87 FILLER_4_70 +*88 FILLER_4_74 +*89 PHY_0 +*90 PHY_1 +*91 PHY_2 +*92 PHY_3 +*93 PHY_4 +*94 PHY_5 +*95 PHY_6 +*96 PHY_7 +*97 PHY_8 +*98 PHY_9 +*99 TAP_10 +*100 TAP_11 +*101 TAP_12 +*102 TAP_13 +*103 TAP_14 +*104 TAP_15 +*105 TAP_16 + +*PORTS +in_n[0] I +in_n[10] I +in_n[11] I +in_n[1] I +in_n[2] I +in_n[3] I +in_n[4] I +in_n[5] I +in_n[6] I +in_n[7] I +in_n[8] I +in_n[9] I +in_s[0] I +in_s[1] I +in_s[2] I +out_n[0] O +out_n[1] O +out_n[2] O +out_s[0] O +out_s[10] O +out_s[11] O +out_s[1] O +out_s[2] O +out_s[3] O +out_s[4] O +out_s[5] O +out_s[6] O +out_s[7] O +out_s[8] O +out_s[9] O + +*D_NET *3 0.000809487 +*CONN +*P in_n[0] I +*I *41:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[0] 0.000321834 +2 *41:A 0.000321834 +3 *41:A out_n[2] 0.000165819 +4 *41:A *42:A 0 +*RES +1 in_n[0] *41:A 45.8093 +*END + +*D_NET *4 0.00058245 +*CONN +*P in_n[10] I +*I *37:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[10] 0.000262561 +2 *37:A 0.000262561 +3 *37:A *5:16 0 +4 *37:A *14:10 0 +5 *37:A *22:9 5.73288e-05 +*RES +1 in_n[10] *37:A 43.51 +*END + +*D_NET *5 0.00314715 +*CONN +*P in_n[11] I +*I *38:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[11] 0.00125418 +2 *38:A 0 +3 *5:16 0.00125418 +4 *5:16 out_s[10] 0 +5 *5:16 out_s[9] 0.000140259 +6 *5:16 *14:10 0.000186606 +7 *5:16 *23:7 0.000311915 +8 *37:A *5:16 0 +*RES +1 in_n[11] *5:16 41.825 +2 *5:16 *38:A 23 +*END + +*D_NET *6 0.00149003 +*CONN +*P in_n[1] I +*I *42:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[1] 0.00032827 +2 *42:A 0.00032827 +3 *42:A out_s[0] 7.66085e-05 +4 *42:A *7:10 0.000756884 +5 *41:A *42:A 0 +*RES +1 in_n[1] *42:A 48.3779 +*END + +*D_NET *7 0.00223276 +*CONN +*P in_n[2] I +*I *43:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[2] 0.00069966 +2 *43:A 0 +3 *7:10 0.00069966 +4 *7:10 out_s[0] 0 +5 *7:10 out_s[1] 7.03766e-05 +6 *7:10 out_s[2] 6.17437e-06 +7 *7:10 *44:A 0 +8 *42:A *7:10 0.000756884 +*RES +1 in_n[2] *7:10 30.9707 +2 *7:10 *43:A 23 +*END + +*D_NET *8 0.000770166 +*CONN +*P in_n[3] I +*I *44:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[3] 0.000385083 +2 *44:A 0.000385083 +3 *44:A *9:9 0 +4 *7:10 *44:A 0 +*RES +1 in_n[3] *44:A 45.8093 +*END + +*D_NET *9 0.00142628 +*CONN +*P in_n[4] I +*I *45:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[4] 0.000615049 +2 *45:A 0 +3 *9:9 0.000615049 +4 *9:9 out_s[3] 0.000196178 +5 *9:9 *46:A 0 +6 *44:A *9:9 0 +*RES +1 in_n[4] *9:9 28.4436 +2 *9:9 *45:A 23 +*END + +*D_NET *10 0.00113314 +*CONN +*P in_n[5] I +*I *46:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[5] 0.000566572 +2 *46:A 0.000566572 +3 *9:9 *46:A 0 +*RES +1 in_n[5] *46:A 49.3307 +*END + +*D_NET *11 0.00188726 +*CONN +*P in_n[6] I +*I *47:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[6] 0.00049832 +2 *47:A 0 +3 *11:10 0.00049832 +4 *11:10 *12:8 0.000748939 +5 *11:10 *29:7 0.000141677 +*RES +1 in_n[6] *11:10 28.3814 +2 *11:10 *47:A 23 +*END + +*D_NET *12 0.00204954 +*CONN +*P in_n[7] I +*I *34:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[7] 0.000567827 +2 *34:A 0 +3 *12:8 0.000567827 +4 *12:8 out_s[6] 3.67805e-05 +5 *12:8 out_s[8] 0 +6 *12:8 *35:A 0 +7 *12:8 *30:7 0.000128169 +8 *11:10 *12:8 0.000748939 +*RES +1 in_n[7] *12:8 29.3964 +2 *12:8 *34:A 23 +*END + +*D_NET *13 0.000912246 +*CONN +*P in_n[8] I +*I *35:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[8] 0.000453036 +2 *35:A 0.000453036 +3 *35:A *14:10 0 +4 *35:A *31:7 6.17437e-06 +5 *12:8 *35:A 0 +*RES +1 in_n[8] *35:A 46.5757 +*END + +*D_NET *14 0.00209477 +*CONN +*P in_n[9] I +*I *36:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[9] 0.000902356 +2 *36:A 0 +3 *14:10 0.000902356 +4 *14:10 out_s[10] 0 +5 *14:10 *23:7 0.000103447 +6 *35:A *14:10 0 +7 *37:A *14:10 0 +8 *5:16 *14:10 0.000186606 +*RES +1 in_n[9] *14:10 33.0629 +2 *14:10 *36:A 23 +*END + +*D_NET *15 0.000609775 +*CONN +*P in_s[0] I +*I *33:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[0] 0.000254485 +2 *33:A 0.000254485 +3 *33:A *16:12 0 +4 *33:A *18:7 0.000100805 +*RES +1 in_s[0] *33:A 42.7643 +*END + +*D_NET *16 0.00215843 +*CONN +*P in_s[1] I +*I *39:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[1] 0.000669693 +2 *39:A 0 +3 *16:12 0.000669693 +4 *16:12 out_n[0] 0.000819045 +5 *16:12 out_n[2] 0 +6 *16:12 *40:A 0 +7 *33:A *16:12 0 +*RES +1 in_s[1] *16:12 30.8464 +2 *16:12 *39:A 23 +*END + +*D_NET *17 0.000791768 +*CONN +*P in_s[2] I +*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[2] 0.000395884 +2 *40:A 0.000395884 +3 *40:A out_s[0] 0 +4 *16:12 *40:A 0 +*RES +1 in_s[2] *40:A 45.3329 +*END + +*D_NET *18 0.00275982 +*CONN +*P out_n[0] O +*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[0] 0.000649033 +2 *33:X 0.000270953 +3 *18:7 0.000919986 +4 out_n[0] out_n[1] 0 +5 out_n[0] out_n[2] 0 +6 *33:A *18:7 0.000100805 +7 *16:12 out_n[0] 0.000819045 +*RES +1 *33:X *18:7 42.9093 +2 *18:7 out_n[0] 16.4886 +*END + +*D_NET *19 0.000996874 +*CONN +*P out_n[1] O +*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[1] 0.000351055 +2 *39:X 0.000351055 +3 out_n[1] out_n[2] 0.000294763 +4 out_n[0] out_n[1] 0 +*RES +1 *39:X out_n[1] 45.395 +*END + +*D_NET *20 0.00183616 +*CONN +*P out_n[2] O +*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[2] 0.000507504 +2 *40:X 0.000180283 +3 *20:7 0.000687787 +4 out_n[2] out_s[0] 0 +5 out_n[0] out_n[2] 0 +6 out_n[1] out_n[2] 0.000294763 +7 *41:A out_n[2] 0.000165819 +8 *16:12 out_n[2] 0 +*RES +1 *40:X *20:7 40.5271 +2 *20:7 out_n[2] 12.4907 +*END + +*D_NET *21 0.00163663 +*CONN +*P out_s[0] O +*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[0] 0.000548786 +2 *41:X 6.80678e-05 +3 *21:7 0.000616853 +4 out_s[0] out_s[1] 0.00032632 +5 out_s[0] out_s[2] 0 +6 out_n[2] out_s[0] 0 +7 *40:A out_s[0] 0 +8 *42:A out_s[0] 7.66085e-05 +9 *7:10 out_s[0] 0 +*RES +1 *41:X *21:7 39.0979 +2 *21:7 out_s[0] 14.935 +*END + +*D_NET *22 0.0022753 +*CONN +*P out_s[10] O +*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[10] 0.000810796 +2 *37:X 0.000298189 +3 *22:9 0.00110899 +4 out_s[10] out_s[11] 0 +5 out_s[10] out_s[9] 0 +6 *37:A *22:9 5.73288e-05 +7 *5:16 out_s[10] 0 +8 *14:10 out_s[10] 0 +*RES +1 *37:X *22:9 42.93 +2 *22:9 out_s[10] 14.3964 +*END + +*D_NET *23 0.00285697 +*CONN +*P out_s[11] O +*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[11] 0.000131317 +2 *38:X 0.00101936 +3 *23:7 0.00115068 +4 *23:7 out_s[9] 0.000140259 +5 out_s[10] out_s[11] 0 +6 *5:16 *23:7 0.000311915 +7 *14:10 *23:7 0.000103447 +*RES +1 *38:X *23:7 37.4586 +2 *23:7 out_s[11] 17.3614 +*END + +*D_NET *24 0.00157731 +*CONN +*P out_s[1] O +*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[1] 0.00047529 +2 *42:X 0.00047529 +3 out_s[1] out_s[2] 0.000230031 +4 out_s[1] out_s[3] 0 +5 out_s[0] out_s[1] 0.00032632 +6 *7:10 out_s[1] 7.03766e-05 +*RES +1 *42:X out_s[1] 49.8279 +*END + +*D_NET *25 0.00106966 +*CONN +*P out_s[2] O +*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[2] 0.000416727 +2 *43:X 0.000416727 +3 out_s[2] out_s[3] 0 +4 out_s[0] out_s[2] 0 +5 out_s[1] out_s[2] 0.000230031 +6 *7:10 out_s[2] 6.17437e-06 +*RES +1 *43:X out_s[2] 48.875 +*END + +*D_NET *26 0.00157855 +*CONN +*P out_s[3] O +*I *44:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[3] 0.000532775 +2 *44:X 0.000158411 +3 *26:7 0.000691186 +4 out_s[3] out_s[4] 0 +5 out_s[3] out_s[5] 0 +6 out_s[1] out_s[3] 0 +7 out_s[2] out_s[3] 0 +8 *9:9 out_s[3] 0.000196178 +*RES +1 *44:X *26:7 40.5271 +2 *26:7 out_s[3] 11.5171 +*END + +*D_NET *27 0.000935888 +*CONN +*P out_s[4] O +*I *45:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[4] 0.0004112 +2 *45:X 0.0004112 +3 out_s[4] out_s[5] 0.000113488 +4 out_s[3] out_s[4] 0 +*RES +1 *45:X out_s[4] 46.7 +*END + +*D_NET *28 0.00124869 +*CONN +*P out_s[5] O +*I *46:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[5] 0.000567599 +2 *46:X 0.000567599 +3 out_s[5] out_s[6] 0 +4 out_s[3] out_s[5] 0 +5 out_s[4] out_s[5] 0.000113488 +*RES +1 *46:X out_s[5] 48.875 +*END + +*D_NET *29 0.00207606 +*CONN +*P out_s[6] O +*I *47:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[6] 0.000503989 +2 *47:X 0.000404635 +3 *29:7 0.000908623 +4 out_s[6] out_s[7] 8.03508e-05 +5 out_s[5] out_s[6] 0 +6 *11:10 *29:7 0.000141677 +7 *12:8 out_s[6] 3.67805e-05 +*RES +1 *47:X *29:7 44.3386 +2 *29:7 out_s[6] 9.59071 +*END + +*D_NET *30 0.0014735 +*CONN +*P out_s[7] O +*I *34:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[7] 0.00028451 +2 *34:X 0.00034798 +3 *30:7 0.00063249 +4 out_s[7] out_s[8] 0 +5 out_s[6] out_s[7] 8.03508e-05 +6 *12:8 *30:7 0.000128169 +*RES +1 *34:X *30:7 44.3386 +2 *30:7 out_s[7] 5.88286 +*END + +*D_NET *31 0.00179676 +*CONN +*P out_s[8] O +*I *35:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[8] 0.000680814 +2 *35:X 0.000193091 +3 *31:7 0.000873905 +4 out_s[8] out_s[9] 4.27783e-05 +5 out_s[7] out_s[8] 0 +6 *35:A *31:7 6.17437e-06 +7 *12:8 out_s[8] 0 +*RES +1 *35:X *31:7 41.0036 +2 *31:7 out_s[8] 12.76 +*END + +*D_NET *32 0.000667532 +*CONN +*P out_s[9] O +*I *36:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[9] 0.000172118 +2 *36:X 0.000172118 +3 out_s[10] out_s[9] 0 +4 out_s[8] out_s[9] 4.27783e-05 +5 *5:16 out_s[9] 0.000140259 +6 *23:7 out_s[9] 0.000140259 +*RES +1 *36:X out_s[9] 42.2879 +*END diff --git a/spef/multicorner/buff_flash_clkrst.min.spef b/spef/multicorner/buff_flash_clkrst.min.spef new file mode 100644 index 00000000..1fd93639 --- /dev/null +++ b/spef/multicorner/buff_flash_clkrst.min.spef @@ -0,0 +1,587 @@ +*SPEF "ieee 1481-1999" +*DESIGN "buff_flash_clkrst" +*DATE "11:11:11 Fri 11 11, 1111" +*VENDOR "OpenRCX" +*PROGRAM "Parallel Extraction" +*VERSION "1.0" +*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE" +*DIVIDER / +*DELIMITER : +*BUS_DELIMITER [] +*T_UNIT 1 NS +*C_UNIT 1 PF +*R_UNIT 1 OHM +*L_UNIT 1 HENRY + +*NAME_MAP +*3 in_n[0] +*4 in_n[10] +*5 in_n[11] +*6 in_n[1] +*7 in_n[2] +*8 in_n[3] +*9 in_n[4] +*10 in_n[5] +*11 in_n[6] +*12 in_n[7] +*13 in_n[8] +*14 in_n[9] +*15 in_s[0] +*16 in_s[1] +*17 in_s[2] +*18 out_n[0] +*19 out_n[1] +*20 out_n[2] +*21 out_s[0] +*22 out_s[10] +*23 out_s[11] +*24 out_s[1] +*25 out_s[2] +*26 out_s[3] +*27 out_s[4] +*28 out_s[5] +*29 out_s[6] +*30 out_s[7] +*31 out_s[8] +*32 out_s[9] +*33 BUF\[0\] +*34 BUF\[10\] +*35 BUF\[11\] +*36 BUF\[12\] +*37 BUF\[13\] +*38 BUF\[14\] +*39 BUF\[1\] +*40 BUF\[2\] +*41 BUF\[3\] +*42 BUF\[4\] +*43 BUF\[5\] +*44 BUF\[6\] +*45 BUF\[7\] +*46 BUF\[8\] +*47 BUF\[9\] +*48 FILLER_0_19 +*49 FILLER_0_27 +*50 FILLER_0_29 +*51 FILLER_0_3 +*52 FILLER_0_41 +*53 FILLER_0_54 +*54 FILLER_0_57 +*55 FILLER_0_7 +*56 FILLER_0_70 +*57 FILLER_0_74 +*58 FILLER_1_17 +*59 FILLER_1_3 +*60 FILLER_1_32 +*61 FILLER_1_47 +*62 FILLER_1_55 +*63 FILLER_1_57 +*64 FILLER_1_70 +*65 FILLER_1_74 +*66 FILLER_2_26 +*67 FILLER_2_29 +*68 FILLER_2_3 +*69 FILLER_2_52 +*70 FILLER_2_67 +*71 FILLER_3_15 +*72 FILLER_3_27 +*73 FILLER_3_3 +*74 FILLER_3_42 +*75 FILLER_3_54 +*76 FILLER_3_57 +*77 FILLER_3_70 +*78 FILLER_3_74 +*79 FILLER_4_19 +*80 FILLER_4_27 +*81 FILLER_4_29 +*82 FILLER_4_3 +*83 FILLER_4_41 +*84 FILLER_4_53 +*85 FILLER_4_57 +*86 FILLER_4_7 +*87 FILLER_4_70 +*88 FILLER_4_74 +*89 PHY_0 +*90 PHY_1 +*91 PHY_2 +*92 PHY_3 +*93 PHY_4 +*94 PHY_5 +*95 PHY_6 +*96 PHY_7 +*97 PHY_8 +*98 PHY_9 +*99 TAP_10 +*100 TAP_11 +*101 TAP_12 +*102 TAP_13 +*103 TAP_14 +*104 TAP_15 +*105 TAP_16 + +*PORTS +in_n[0] I +in_n[10] I +in_n[11] I +in_n[1] I +in_n[2] I +in_n[3] I +in_n[4] I +in_n[5] I +in_n[6] I +in_n[7] I +in_n[8] I +in_n[9] I +in_s[0] I +in_s[1] I +in_s[2] I +out_n[0] O +out_n[1] O +out_n[2] O +out_s[0] O +out_s[10] O +out_s[11] O +out_s[1] O +out_s[2] O +out_s[3] O +out_s[4] O +out_s[5] O +out_s[6] O +out_s[7] O +out_s[8] O +out_s[9] O + +*D_NET *3 0.000698578 +*CONN +*P in_n[0] I +*I *41:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[0] 0.000265612 +2 *41:A 0.000265612 +3 *41:A out_n[2] 0.000167353 +4 *41:A *42:A 0 +*RES +1 in_n[0] *41:A 9.255 +*END + +*D_NET *4 0.000496833 +*CONN +*P in_n[10] I +*I *37:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[10] 0.000223693 +2 *37:A 0.000223693 +3 *37:A out_s[10] 4.94474e-05 +4 *37:A *36:A 0 +5 *37:A *38:A 0 +*RES +1 in_n[10] *37:A 7.59 +*END + +*D_NET *5 0.00265835 +*CONN +*P in_n[11] I +*I *38:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[11] 0.0010441 +2 *38:A 0.0010441 +3 *38:A out_s[10] 0 +4 *38:A out_s[11] 0.000287765 +5 *38:A out_s[9] 0.000123225 +6 *38:A *36:A 0.000159156 +7 *37:A *38:A 0 +*RES +1 in_n[11] *38:A 23.025 +*END + +*D_NET *6 0.00123947 +*CONN +*P in_n[1] I +*I *42:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[1] 0.000265945 +2 *42:A 0.000265945 +3 *42:A out_s[0] 7.75325e-05 +4 *42:A *43:A 0.000630049 +5 *41:A *42:A 0 +*RES +1 in_n[1] *42:A 11.115 +*END + +*D_NET *7 0.00183936 +*CONN +*P in_n[2] I +*I *43:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[2] 0.000568975 +2 *43:A 0.000568975 +3 *43:A out_s[0] 0 +4 *43:A out_s[1] 6.55328e-05 +5 *43:A out_s[2] 5.83121e-06 +6 *43:A *44:A 0 +7 *42:A *43:A 0.000630049 +*RES +1 in_n[2] *43:A 15.165 +*END + +*D_NET *8 0.000671935 +*CONN +*P in_n[3] I +*I *44:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[3] 0.000335968 +2 *44:A 0.000335968 +3 *44:A *45:A 0 +4 *43:A *44:A 0 +*RES +1 in_n[3] *44:A 9.255 +*END + +*D_NET *9 0.00122617 +*CONN +*P in_n[4] I +*I *45:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[4] 0.00052251 +2 *45:A 0.00052251 +3 *45:A out_s[3] 0.000181152 +4 *45:A *46:A 0 +5 *44:A *45:A 0 +*RES +1 in_n[4] *45:A 13.335 +*END + +*D_NET *10 0.000985911 +*CONN +*P in_n[5] I +*I *46:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[5] 0.000492956 +2 *46:A 0.000492956 +3 *45:A *46:A 0 +*RES +1 in_n[5] *46:A 11.805 +*END + +*D_NET *11 0.00156745 +*CONN +*P in_n[6] I +*I *47:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[6] 0.000410161 +2 *47:A 0.000410161 +3 *47:A out_s[6] 0.00012349 +4 *47:A *34:A 0.000623638 +*RES +1 in_n[6] *47:A 13.29 +*END + +*D_NET *12 0.00169542 +*CONN +*P in_n[7] I +*I *34:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[7] 0.000457718 +2 *34:A 0.000457718 +3 *34:A out_s[6] 4.04613e-05 +4 *34:A out_s[7] 0.000115886 +5 *34:A out_s[8] 0 +6 *34:A *35:A 0 +7 *47:A *34:A 0.000623638 +*RES +1 in_n[7] *34:A 14.025 +*END + +*D_NET *13 0.000773264 +*CONN +*P in_n[8] I +*I *35:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[8] 0.000383717 +2 *35:A 0.000383717 +3 *35:A out_s[8] 5.83121e-06 +4 *35:A *36:A 0 +5 *34:A *35:A 0 +*RES +1 in_n[8] *35:A 9.81 +*END + +*D_NET *14 0.00175178 +*CONN +*P in_n[9] I +*I *36:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[9] 0.00074955 +2 *36:A 0.00074955 +3 *36:A out_s[10] 0 +4 *36:A out_s[11] 9.3521e-05 +5 *35:A *36:A 0 +6 *37:A *36:A 0 +7 *38:A *36:A 0.000159156 +*RES +1 in_n[9] *36:A 16.68 +*END + +*D_NET *15 0.000514326 +*CONN +*P in_s[0] I +*I *33:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[0] 0.000213288 +2 *33:A 0.000213288 +3 *33:A out_n[0] 8.77498e-05 +4 *33:A *39:A 0 +*RES +1 in_s[0] *33:A 7.05 +*END + +*D_NET *16 0.00178446 +*CONN +*P in_s[1] I +*I *39:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[1] 0.000549895 +2 *39:A 0.000549895 +3 *39:A out_n[0] 0.000684666 +4 *39:A out_n[2] 0 +5 *39:A *40:A 0 +6 *33:A *39:A 0 +*RES +1 in_s[1] *39:A 15.075 +*END + +*D_NET *17 0.000663109 +*CONN +*P in_s[2] I +*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[2] 0.000331555 +2 *40:A 0.000331555 +3 *40:A out_s[0] 0 +4 *39:A *40:A 0 +*RES +1 in_s[2] *40:A 8.91 +*END + +*D_NET *18 0.00231172 +*CONN +*P out_n[0] O +*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[0] 0.000769652 +2 *33:X 0.000769652 +3 out_n[0] out_n[1] 0 +4 out_n[0] out_n[2] 0 +5 *33:A out_n[0] 8.77498e-05 +6 *39:A out_n[0] 0.000684666 +*RES +1 *33:X out_n[0] 19.095 +*END + +*D_NET *19 0.000816795 +*CONN +*P out_n[1] O +*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[1] 0.000285665 +2 *39:X 0.000285665 +3 out_n[1] out_n[2] 0.000245465 +4 out_n[0] out_n[1] 0 +*RES +1 *39:X out_n[1] 8.955 +*END + +*D_NET *20 0.00152863 +*CONN +*P out_n[2] O +*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[2] 0.000557907 +2 *40:X 0.000557907 +3 out_n[2] out_s[0] 0 +4 out_n[0] out_n[2] 0 +5 out_n[1] out_n[2] 0.000245465 +6 *39:A out_n[2] 0 +7 *41:A out_n[2] 0.000167353 +*RES +1 *40:X out_n[2] 14.475 +*END + +*D_NET *21 0.00137998 +*CONN +*P out_s[0] O +*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[0] 0.000500863 +2 *41:X 0.000500863 +3 out_s[0] out_s[1] 0.000300724 +4 out_s[0] out_s[2] 0 +5 out_n[2] out_s[0] 0 +6 *40:A out_s[0] 0 +7 *42:A out_s[0] 7.75325e-05 +8 *43:A out_s[0] 0 +*RES +1 *41:X out_s[0] 15.21 +*END + +*D_NET *22 0.00187612 +*CONN +*P out_s[10] O +*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[10] 0.000913335 +2 *37:X 0.000913335 +3 out_s[10] out_s[11] 0 +4 out_s[10] out_s[9] 0 +5 *36:A out_s[10] 0 +6 *37:A out_s[10] 4.94474e-05 +7 *38:A out_s[10] 0 +*RES +1 *37:X out_s[10] 17.595 +*END + +*D_NET *23 0.00239933 +*CONN +*P out_s[11] O +*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[11] 0.000947411 +2 *38:X 0.000947411 +3 out_s[11] out_s[9] 0.000123225 +4 out_s[10] out_s[11] 0 +5 *36:A out_s[11] 9.3521e-05 +6 *38:A out_s[11] 0.000287765 +*RES +1 *38:X out_s[11] 15.78 +*END + +*D_NET *24 0.00130092 +*CONN +*P out_s[1] O +*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[1] 0.000361344 +2 *42:X 0.000361344 +3 out_s[1] out_s[2] 0.000211976 +4 out_s[1] out_s[3] 0 +5 out_s[0] out_s[1] 0.000300724 +6 *43:A out_s[1] 6.55328e-05 +*RES +1 *42:X out_s[1] 12.165 +*END + +*D_NET *25 0.000903705 +*CONN +*P out_s[2] O +*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[2] 0.000342949 +2 *43:X 0.000342949 +3 out_s[2] out_s[3] 0 +4 out_s[0] out_s[2] 0 +5 out_s[1] out_s[2] 0.000211976 +6 *43:A out_s[2] 5.83121e-06 +*RES +1 *43:X out_s[2] 11.475 +*END + +*D_NET *26 0.00133229 +*CONN +*P out_s[3] O +*I *44:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[3] 0.000575568 +2 *44:X 0.000575568 +3 out_s[3] out_s[4] 0 +4 out_s[3] out_s[5] 0 +5 out_s[1] out_s[3] 0 +6 out_s[2] out_s[3] 0 +7 *45:A out_s[3] 0.000181152 +*RES +1 *44:X out_s[3] 13.77 +*END + +*D_NET *27 0.00079736 +*CONN +*P out_s[4] O +*I *45:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[4] 0.000337866 +2 *45:X 0.000337866 +3 out_s[4] out_s[5] 0.000121628 +4 out_s[3] out_s[4] 0 +*RES +1 *45:X out_s[4] 9.9 +*END + +*D_NET *28 0.00105662 +*CONN +*P out_s[5] O +*I *46:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[5] 0.000467496 +2 *46:X 0.000467496 +3 out_s[5] out_s[6] 0 +4 out_s[3] out_s[5] 0 +5 out_s[4] out_s[5] 0.000121628 +*RES +1 *46:X out_s[5] 11.475 +*END + +*D_NET *29 0.00170008 +*CONN +*P out_s[6] O +*I *47:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[6] 0.000724414 +2 *47:X 0.000724414 +3 out_s[6] out_s[7] 8.73036e-05 +4 out_s[5] out_s[6] 0 +5 *34:A out_s[6] 4.04613e-05 +6 *47:A out_s[6] 0.00012349 +*RES +1 *47:X out_s[6] 15.135 +*END + +*D_NET *30 0.00123387 +*CONN +*P out_s[7] O +*I *34:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[7] 0.000515339 +2 *34:X 0.000515339 +3 out_s[7] out_s[8] 0 +4 out_s[6] out_s[7] 8.73036e-05 +5 *34:A out_s[7] 0.000115886 +*RES +1 *34:X out_s[7] 12.45 +*END + +*D_NET *31 0.00148373 +*CONN +*P out_s[8] O +*I *35:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[8] 0.000716184 +2 *35:X 0.000716184 +3 out_s[8] out_s[9] 4.55329e-05 +4 out_s[7] out_s[8] 0 +5 *34:A out_s[8] 0 +6 *35:A out_s[8] 5.83121e-06 +*RES +1 *35:X out_s[8] 15.015 +*END + +*D_NET *32 0.000550203 +*CONN +*P out_s[9] O +*I *36:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[9] 0.000129111 +2 *36:X 0.000129111 +3 out_s[10] out_s[9] 0 +4 out_s[11] out_s[9] 0.000123225 +5 out_s[8] out_s[9] 4.55329e-05 +6 *38:A out_s[9] 0.000123225 +*RES +1 *36:X out_s[9] 6.705 +*END diff --git a/spef/multicorner/buff_flash_clkrst.nom.spef b/spef/multicorner/buff_flash_clkrst.nom.spef new file mode 100644 index 00000000..e4f997a5 --- /dev/null +++ b/spef/multicorner/buff_flash_clkrst.nom.spef @@ -0,0 +1,587 @@ +*SPEF "ieee 1481-1999" +*DESIGN "buff_flash_clkrst" +*DATE "11:11:11 Fri 11 11, 1111" +*VENDOR "OpenRCX" +*PROGRAM "Parallel Extraction" +*VERSION "1.0" +*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE" +*DIVIDER / +*DELIMITER : +*BUS_DELIMITER [] +*T_UNIT 1 NS +*C_UNIT 1 PF +*R_UNIT 1 OHM +*L_UNIT 1 HENRY + +*NAME_MAP +*3 in_n[0] +*4 in_n[10] +*5 in_n[11] +*6 in_n[1] +*7 in_n[2] +*8 in_n[3] +*9 in_n[4] +*10 in_n[5] +*11 in_n[6] +*12 in_n[7] +*13 in_n[8] +*14 in_n[9] +*15 in_s[0] +*16 in_s[1] +*17 in_s[2] +*18 out_n[0] +*19 out_n[1] +*20 out_n[2] +*21 out_s[0] +*22 out_s[10] +*23 out_s[11] +*24 out_s[1] +*25 out_s[2] +*26 out_s[3] +*27 out_s[4] +*28 out_s[5] +*29 out_s[6] +*30 out_s[7] +*31 out_s[8] +*32 out_s[9] +*33 BUF\[0\] +*34 BUF\[10\] +*35 BUF\[11\] +*36 BUF\[12\] +*37 BUF\[13\] +*38 BUF\[14\] +*39 BUF\[1\] +*40 BUF\[2\] +*41 BUF\[3\] +*42 BUF\[4\] +*43 BUF\[5\] +*44 BUF\[6\] +*45 BUF\[7\] +*46 BUF\[8\] +*47 BUF\[9\] +*48 FILLER_0_19 +*49 FILLER_0_27 +*50 FILLER_0_29 +*51 FILLER_0_3 +*52 FILLER_0_41 +*53 FILLER_0_54 +*54 FILLER_0_57 +*55 FILLER_0_7 +*56 FILLER_0_70 +*57 FILLER_0_74 +*58 FILLER_1_17 +*59 FILLER_1_3 +*60 FILLER_1_32 +*61 FILLER_1_47 +*62 FILLER_1_55 +*63 FILLER_1_57 +*64 FILLER_1_70 +*65 FILLER_1_74 +*66 FILLER_2_26 +*67 FILLER_2_29 +*68 FILLER_2_3 +*69 FILLER_2_52 +*70 FILLER_2_67 +*71 FILLER_3_15 +*72 FILLER_3_27 +*73 FILLER_3_3 +*74 FILLER_3_42 +*75 FILLER_3_54 +*76 FILLER_3_57 +*77 FILLER_3_70 +*78 FILLER_3_74 +*79 FILLER_4_19 +*80 FILLER_4_27 +*81 FILLER_4_29 +*82 FILLER_4_3 +*83 FILLER_4_41 +*84 FILLER_4_53 +*85 FILLER_4_57 +*86 FILLER_4_7 +*87 FILLER_4_70 +*88 FILLER_4_74 +*89 PHY_0 +*90 PHY_1 +*91 PHY_2 +*92 PHY_3 +*93 PHY_4 +*94 PHY_5 +*95 PHY_6 +*96 PHY_7 +*97 PHY_8 +*98 PHY_9 +*99 TAP_10 +*100 TAP_11 +*101 TAP_12 +*102 TAP_13 +*103 TAP_14 +*104 TAP_15 +*105 TAP_16 + +*PORTS +in_n[0] I +in_n[10] I +in_n[11] I +in_n[1] I +in_n[2] I +in_n[3] I +in_n[4] I +in_n[5] I +in_n[6] I +in_n[7] I +in_n[8] I +in_n[9] I +in_s[0] I +in_s[1] I +in_s[2] I +out_n[0] O +out_n[1] O +out_n[2] O +out_s[0] O +out_s[10] O +out_s[11] O +out_s[1] O +out_s[2] O +out_s[3] O +out_s[4] O +out_s[5] O +out_s[6] O +out_s[7] O +out_s[8] O +out_s[9] O + +*D_NET *3 0.000746189 +*CONN +*P in_n[0] I +*I *41:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[0] 0.000291118 +2 *41:A 0.000291118 +3 *41:A out_n[2] 0.000163953 +4 *41:A *42:A 0 +*RES +1 in_n[0] *41:A 20.5321 +*END + +*D_NET *4 0.000540091 +*CONN +*P in_n[10] I +*I *37:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[10] 0.00024161 +2 *37:A 0.00024161 +3 *37:A out_s[10] 5.68722e-05 +4 *37:A *36:A 0 +5 *37:A *38:A 0 +*RES +1 in_n[10] *37:A 18.55 +*END + +*D_NET *5 0.00290352 +*CONN +*P in_n[11] I +*I *38:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[11] 0.00113707 +2 *38:A 0.00113707 +3 *38:A out_s[10] 0 +4 *38:A out_s[11] 0.000304969 +5 *38:A out_s[9] 0.000140933 +6 *38:A *36:A 0.000183477 +7 *37:A *38:A 0 +*RES +1 in_n[11] *38:A 36.925 +*END + +*D_NET *6 0.00134243 +*CONN +*P in_n[1] I +*I *42:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[1] 0.000293149 +2 *42:A 0.000293149 +3 *42:A out_s[0] 7.58571e-05 +4 *42:A *43:A 0.000680277 +5 *41:A *42:A 0 +*RES +1 in_n[1] *42:A 22.7464 +*END + +*D_NET *7 0.00200548 +*CONN +*P in_n[2] I +*I *43:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[2] 0.000625829 +2 *43:A 0.000625829 +3 *43:A out_s[0] 0 +4 *43:A out_s[1] 6.74911e-05 +5 *43:A out_s[2] 6.05161e-06 +6 *43:A *44:A 0 +7 *42:A *43:A 0.000680277 +*RES +1 in_n[2] *43:A 27.5679 +*END + +*D_NET *8 0.000719992 +*CONN +*P in_n[3] I +*I *44:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[3] 0.000359996 +2 *44:A 0.000359996 +3 *44:A *45:A 0 +4 *43:A *44:A 0 +*RES +1 in_n[3] *44:A 20.5321 +*END + +*D_NET *9 0.00131838 +*CONN +*P in_n[4] I +*I *45:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[4] 0.000565243 +2 *45:A 0.000565243 +3 *45:A out_s[3] 0.000187893 +4 *45:A *46:A 0 +5 *44:A *45:A 0 +*RES +1 in_n[4] *45:A 25.3893 +*END + +*D_NET *10 0.00105711 +*CONN +*P in_n[5] I +*I *46:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[5] 0.000528554 +2 *46:A 0.000528554 +3 *45:A *46:A 0 +*RES +1 in_n[5] *46:A 23.5679 +*END + +*D_NET *11 0.00171215 +*CONN +*P in_n[6] I +*I *47:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[6] 0.000448575 +2 *47:A 0.000448575 +3 *47:A out_s[6] 0.000141554 +4 *47:A *34:A 0.000673444 +*RES +1 in_n[6] *47:A 25.3357 +*END + +*D_NET *12 0.00184731 +*CONN +*P in_n[7] I +*I *34:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[7] 0.000505756 +2 *34:A 0.000505756 +3 *34:A out_s[6] 3.85148e-05 +4 *34:A out_s[7] 0.000123836 +5 *34:A out_s[8] 0 +6 *34:A *35:A 0 +7 *47:A *34:A 0.000673444 +*RES +1 in_n[7] *34:A 26.2107 +*END + +*D_NET *13 0.00083737 +*CONN +*P in_n[8] I +*I *35:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[8] 0.000415659 +2 *35:A 0.000415659 +3 *35:A out_s[8] 6.05161e-06 +4 *35:A *36:A 0 +5 *34:A *35:A 0 +*RES +1 in_n[8] *35:A 21.1929 +*END + +*D_NET *14 0.00191759 +*CONN +*P in_n[9] I +*I *36:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[9] 0.000817106 +2 *36:A 0.000817106 +3 *36:A out_s[10] 0 +4 *36:A out_s[11] 9.98961e-05 +5 *35:A *36:A 0 +6 *37:A *36:A 0 +7 *38:A *36:A 0.000183477 +*RES +1 in_n[9] *36:A 29.3714 +*END + +*D_NET *15 0.000565776 +*CONN +*P in_s[0] I +*I *33:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[0] 0.000232546 +2 *33:A 0.000232546 +3 *33:A out_n[0] 0.000100684 +4 *33:A *39:A 0 +*RES +1 in_s[0] *33:A 17.9071 +*END + +*D_NET *16 0.00194543 +*CONN +*P in_s[1] I +*I *39:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[1] 0.000603696 +2 *39:A 0.000603696 +3 *39:A out_n[0] 0.000738039 +4 *39:A out_n[2] 0 +5 *39:A *40:A 0 +6 *33:A *39:A 0 +*RES +1 in_s[1] *39:A 27.4607 +*END + +*D_NET *17 0.000720944 +*CONN +*P in_s[2] I +*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[2] 0.000360472 +2 *40:A 0.000360472 +3 *40:A out_s[0] 0 +4 *39:A *40:A 0 +*RES +1 in_s[2] *40:A 20.1214 +*END + +*D_NET *18 0.00251314 +*CONN +*P out_n[0] O +*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[0] 0.00083721 +2 *33:X 0.00083721 +3 out_n[0] out_n[1] 0 +4 out_n[0] out_n[2] 0 +5 *33:A out_n[0] 0.000100684 +6 *39:A out_n[0] 0.000738039 +*RES +1 *33:X out_n[0] 32.2464 +*END + +*D_NET *19 0.0008921 +*CONN +*P out_n[1] O +*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[1] 0.000313512 +2 *39:X 0.000313512 +3 out_n[1] out_n[2] 0.000265077 +4 out_n[0] out_n[1] 0 +*RES +1 *39:X out_n[1] 20.175 +*END + +*D_NET *20 0.00165991 +*CONN +*P out_n[2] O +*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[2] 0.000615442 +2 *40:X 0.000615442 +3 out_n[2] out_s[0] 0 +4 out_n[0] out_n[2] 0 +5 out_n[1] out_n[2] 0.000265077 +6 *39:A out_n[2] 0 +7 *41:A out_n[2] 0.000163953 +*RES +1 *40:X out_n[2] 26.7464 +*END + +*D_NET *21 0.00149166 +*CONN +*P out_s[0] O +*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[0] 0.000551682 +2 *41:X 0.000551682 +3 out_s[0] out_s[1] 0.000312442 +4 out_s[0] out_s[2] 0 +5 out_n[2] out_s[0] 0 +6 *40:A out_s[0] 0 +7 *42:A out_s[0] 7.58571e-05 +8 *43:A out_s[0] 0 +*RES +1 *41:X out_s[0] 27.6214 +*END + +*D_NET *22 0.00205685 +*CONN +*P out_s[10] O +*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[10] 0.000999988 +2 *37:X 0.000999988 +3 out_s[10] out_s[11] 0 +4 out_s[10] out_s[9] 0 +5 *36:A out_s[10] 0 +6 *37:A out_s[10] 5.68722e-05 +7 *38:A out_s[10] 0 +*RES +1 *37:X out_s[10] 30.4607 +*END + +*D_NET *23 0.00269979 +*CONN +*P out_s[11] O +*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[11] 0.001077 +2 *38:X 0.001077 +3 out_s[11] out_s[9] 0.000140933 +4 out_s[10] out_s[11] 0 +5 *36:A out_s[11] 9.98961e-05 +6 *38:A out_s[11] 0.000304969 +*RES +1 *38:X out_s[11] 28.3 +*END + +*D_NET *24 0.00141598 +*CONN +*P out_s[1] O +*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[1] 0.000407902 +2 *42:X 0.000407902 +3 out_s[1] out_s[2] 0.000220246 +4 out_s[1] out_s[3] 0 +5 out_s[0] out_s[1] 0.000312442 +6 *43:A out_s[1] 6.74911e-05 +*RES +1 *42:X out_s[1] 23.9964 +*END + +*D_NET *25 0.000977116 +*CONN +*P out_s[2] O +*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[2] 0.000375409 +2 *43:X 0.000375409 +3 out_s[2] out_s[3] 0 +4 out_s[0] out_s[2] 0 +5 out_s[1] out_s[2] 0.000220246 +6 *43:A out_s[2] 6.05161e-06 +*RES +1 *43:X out_s[2] 23.175 +*END + +*D_NET *26 0.00144163 +*CONN +*P out_s[3] O +*I *44:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[3] 0.000626868 +2 *44:X 0.000626868 +3 out_s[3] out_s[4] 0 +4 out_s[3] out_s[5] 0 +5 out_s[1] out_s[3] 0 +6 out_s[2] out_s[3] 0 +7 *45:A out_s[3] 0.000187893 +*RES +1 *44:X out_s[3] 25.9071 +*END + +*D_NET *27 0.000857812 +*CONN +*P out_s[4] O +*I *45:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[4] 0.00037039 +2 *45:X 0.00037039 +3 out_s[4] out_s[5] 0.000117033 +4 out_s[3] out_s[4] 0 +*RES +1 *45:X out_s[4] 21.3 +*END + +*D_NET *28 0.0011436 +*CONN +*P out_s[5] O +*I *46:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[5] 0.000513285 +2 *46:X 0.000513285 +3 out_s[5] out_s[6] 0 +4 out_s[3] out_s[5] 0 +5 out_s[4] out_s[5] 0.000117033 +*RES +1 *46:X out_s[5] 23.175 +*END + +*D_NET *29 0.00186776 +*CONN +*P out_s[6] O +*I *47:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[6] 0.000801981 +2 *47:X 0.000801981 +3 out_s[6] out_s[7] 8.37335e-05 +4 out_s[5] out_s[6] 0 +5 *34:A out_s[6] 3.85148e-05 +6 *47:A out_s[6] 0.000141554 +*RES +1 *47:X out_s[6] 27.5321 +*END + +*D_NET *30 0.00134038 +*CONN +*P out_s[7] O +*I *34:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[7] 0.000566407 +2 *34:X 0.000566407 +3 out_s[7] out_s[8] 0 +4 out_s[6] out_s[7] 8.37335e-05 +5 *34:A out_s[7] 0.000123836 +*RES +1 *34:X out_s[7] 24.3357 +*END + +*D_NET *31 0.00161835 +*CONN +*P out_s[8] O +*I *35:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[8] 0.000784339 +2 *35:X 0.000784339 +3 out_s[8] out_s[9] 4.36202e-05 +4 out_s[7] out_s[8] 0 +5 *34:A out_s[8] 0 +6 *35:A out_s[8] 6.05161e-06 +*RES +1 *35:X out_s[8] 27.3893 +*END + +*D_NET *32 0.000618171 +*CONN +*P out_s[9] O +*I *36:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[9] 0.000146343 +2 *36:X 0.000146343 +3 out_s[10] out_s[9] 0 +4 out_s[11] out_s[9] 0.000140933 +5 out_s[8] out_s[9] 4.36202e-05 +6 *38:A out_s[9] 0.000140933 +*RES +1 *36:X out_s[9] 17.4964 +*END diff --git a/verilog/gl/buff_flash_clkrst.nl.v b/verilog/gl/buff_flash_clkrst.nl.v new file mode 100644 index 00000000..4e0e3e02 --- /dev/null +++ b/verilog/gl/buff_flash_clkrst.nl.v @@ -0,0 +1,101 @@ +// This is the unpowered netlist. +module buff_flash_clkrst (in_n, + in_s, + out_n, + out_s); + input [11:0] in_n; + input [2:0] in_s; + output [2:0] out_n; + output [11:0] out_s; + + + sky130_fd_sc_hd__clkbuf_8 \BUF[0] (.A(in_s[0]), + .X(out_n[0])); + sky130_fd_sc_hd__clkbuf_8 \BUF[10] (.A(in_n[7]), + .X(out_s[7])); + sky130_fd_sc_hd__clkbuf_8 \BUF[11] (.A(in_n[8]), + .X(out_s[8])); + sky130_fd_sc_hd__clkbuf_8 \BUF[12] (.A(in_n[9]), + .X(out_s[9])); + sky130_fd_sc_hd__clkbuf_8 \BUF[13] (.A(in_n[10]), + .X(out_s[10])); + sky130_fd_sc_hd__clkbuf_8 \BUF[14] (.A(in_n[11]), + .X(out_s[11])); + sky130_fd_sc_hd__clkbuf_8 \BUF[1] (.A(in_s[1]), + .X(out_n[1])); + sky130_fd_sc_hd__clkbuf_8 \BUF[2] (.A(in_s[2]), + .X(out_n[2])); + sky130_fd_sc_hd__clkbuf_8 \BUF[3] (.A(in_n[0]), + .X(out_s[0])); + sky130_fd_sc_hd__clkbuf_8 \BUF[4] (.A(in_n[1]), + .X(out_s[1])); + sky130_fd_sc_hd__clkbuf_8 \BUF[5] (.A(in_n[2]), + .X(out_s[2])); + sky130_fd_sc_hd__clkbuf_8 \BUF[6] (.A(in_n[3]), + .X(out_s[3])); + sky130_fd_sc_hd__clkbuf_8 \BUF[7] (.A(in_n[4]), + .X(out_s[4])); + sky130_fd_sc_hd__clkbuf_8 \BUF[8] (.A(in_n[5]), + .X(out_s[5])); + sky130_fd_sc_hd__clkbuf_8 \BUF[9] (.A(in_n[6]), + .X(out_s[6])); + sky130_fd_sc_hd__decap_3 PHY_0 (); + sky130_fd_sc_hd__decap_3 PHY_1 (); + sky130_fd_sc_hd__decap_3 PHY_2 (); + sky130_fd_sc_hd__decap_3 PHY_3 (); + sky130_fd_sc_hd__decap_3 PHY_4 (); + sky130_fd_sc_hd__decap_3 PHY_5 (); + sky130_fd_sc_hd__decap_3 PHY_6 (); + sky130_fd_sc_hd__decap_3 PHY_7 (); + sky130_fd_sc_hd__decap_3 PHY_8 (); + sky130_fd_sc_hd__decap_3 PHY_9 (); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_11 (); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_12 (); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_13 (); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_14 (); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_15 (); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_16 (); + sky130_fd_sc_hd__decap_4 FILLER_0_3 (); + sky130_fd_sc_hd__fill_1 FILLER_0_7 (); + sky130_fd_sc_hd__decap_8 FILLER_0_19 (); + sky130_fd_sc_hd__fill_1 FILLER_0_27 (); + sky130_ef_sc_hd__decap_12 FILLER_0_29 (); + sky130_fd_sc_hd__fill_2 FILLER_0_41 (); + sky130_fd_sc_hd__fill_2 FILLER_0_54 (); + sky130_fd_sc_hd__fill_2 FILLER_0_57 (); + sky130_fd_sc_hd__decap_4 FILLER_0_70 (); + sky130_fd_sc_hd__fill_1 FILLER_0_74 (); + sky130_fd_sc_hd__decap_3 FILLER_1_3 (); + sky130_fd_sc_hd__decap_4 FILLER_1_17 (); + sky130_fd_sc_hd__decap_4 FILLER_1_32 (); + sky130_fd_sc_hd__decap_8 FILLER_1_47 (); + sky130_fd_sc_hd__fill_1 FILLER_1_55 (); + sky130_fd_sc_hd__fill_2 FILLER_1_57 (); + sky130_fd_sc_hd__decap_4 FILLER_1_70 (); + sky130_fd_sc_hd__fill_1 FILLER_1_74 (); + sky130_ef_sc_hd__decap_12 FILLER_2_3 (); + sky130_fd_sc_hd__fill_2 FILLER_2_26 (); + sky130_ef_sc_hd__decap_12 FILLER_2_29 (); + sky130_fd_sc_hd__decap_4 FILLER_2_52 (); + sky130_fd_sc_hd__decap_8 FILLER_2_67 (); + sky130_ef_sc_hd__decap_12 FILLER_3_3 (); + sky130_fd_sc_hd__fill_1 FILLER_3_15 (); + sky130_fd_sc_hd__decap_4 FILLER_3_27 (); + sky130_ef_sc_hd__decap_12 FILLER_3_42 (); + sky130_fd_sc_hd__fill_2 FILLER_3_54 (); + sky130_fd_sc_hd__fill_2 FILLER_3_57 (); + sky130_fd_sc_hd__decap_4 FILLER_3_70 (); + sky130_fd_sc_hd__fill_1 FILLER_3_74 (); + sky130_fd_sc_hd__decap_4 FILLER_4_3 (); + sky130_fd_sc_hd__fill_1 FILLER_4_7 (); + sky130_fd_sc_hd__decap_8 FILLER_4_19 (); + sky130_fd_sc_hd__fill_1 FILLER_4_27 (); + sky130_ef_sc_hd__decap_12 FILLER_4_29 (); + sky130_ef_sc_hd__decap_12 FILLER_4_41 (); + sky130_fd_sc_hd__decap_3 FILLER_4_53 (); + sky130_fd_sc_hd__fill_2 FILLER_4_57 (); + sky130_fd_sc_hd__decap_4 FILLER_4_70 (); + sky130_fd_sc_hd__fill_1 FILLER_4_74 (); +endmodule + diff --git a/verilog/gl/buff_flash_clkrst.v b/verilog/gl/buff_flash_clkrst.v new file mode 100644 index 00000000..514d9e4a --- /dev/null +++ b/verilog/gl/buff_flash_clkrst.v @@ -0,0 +1,323 @@ +module buff_flash_clkrst (VPWR, + VGND, + in_n, + in_s, + out_n, + out_s); + input VPWR; + input VGND; + input [11:0] in_n; + input [2:0] in_s; + output [2:0] out_n; + output [11:0] out_s; + + + sky130_fd_sc_hd__clkbuf_8 \BUF[0] (.A(in_s[0]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_n[0])); + sky130_fd_sc_hd__clkbuf_8 \BUF[10] (.A(in_n[7]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[7])); + sky130_fd_sc_hd__clkbuf_8 \BUF[11] (.A(in_n[8]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[8])); + sky130_fd_sc_hd__clkbuf_8 \BUF[12] (.A(in_n[9]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[9])); + sky130_fd_sc_hd__clkbuf_8 \BUF[13] (.A(in_n[10]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[10])); + sky130_fd_sc_hd__clkbuf_8 \BUF[14] (.A(in_n[11]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[11])); + sky130_fd_sc_hd__clkbuf_8 \BUF[1] (.A(in_s[1]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_n[1])); + sky130_fd_sc_hd__clkbuf_8 \BUF[2] (.A(in_s[2]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_n[2])); + sky130_fd_sc_hd__clkbuf_8 \BUF[3] (.A(in_n[0]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[0])); + sky130_fd_sc_hd__clkbuf_8 \BUF[4] (.A(in_n[1]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[1])); + sky130_fd_sc_hd__clkbuf_8 \BUF[5] (.A(in_n[2]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[2])); + sky130_fd_sc_hd__clkbuf_8 \BUF[6] (.A(in_n[3]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[3])); + sky130_fd_sc_hd__clkbuf_8 \BUF[7] (.A(in_n[4]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[4])); + sky130_fd_sc_hd__clkbuf_8 \BUF[8] (.A(in_n[5]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[5])); + sky130_fd_sc_hd__clkbuf_8 \BUF[9] (.A(in_n[6]), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(out_s[6])); + sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_6 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_7 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_8 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_9 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_11 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_12 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_13 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_14 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_15 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_16 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_7 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_0_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_0_41 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_0_54 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_0_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_70 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_74 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 FILLER_1_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_1_17 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_1_32 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_1_47 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_1_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_1_70 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_1_74 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_2_26 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_2_52 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_2_67 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_3_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_3_15 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_3_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_3_42 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_3_54 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_3_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_3_70 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_3_74 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_4_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_4_7 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_4_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_4_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_4_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_4_41 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 FILLER_4_53 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_4_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_4_70 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_4_74 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); +endmodule diff --git a/verilog/rtl/buff_flash_clkrst.v b/verilog/rtl/buff_flash_clkrst.v new file mode 100644 index 00000000..eb9b0b1b --- /dev/null +++ b/verilog/rtl/buff_flash_clkrst.v @@ -0,0 +1,5 @@ +module buff_flash_clkrst (input[11:0] in_n, input[2:0] in_s, output[11:0] out_s, output[2:0] out_n); + + sky130_fd_sc_hd__clkbuf_8 BUF[14:0] (.A({in_n, in_s}), .X({out_s, out_n}) ); + +endmodule \ No newline at end of file From 687723fb14babcb744fc081f09516bc53d0bbb9c Mon Sep 17 00:00:00 2001 From: mo-hosni Date: Thu, 13 Oct 2022 11:47:35 -0700 Subject: [PATCH 2/3] add buff_flash_clkrst signoff reports, sdf, and spef files --- .../14-parasitics_extraction.min.log | 40 + .../openlane-signoff/15-rcx_mcsta.min.log | 3152 +++++++++++++++++ .../16-parasitics_extraction.max.log | 40 + .../openlane-signoff/17-rcx_mcsta.max.log | 3152 +++++++++++++++++ .../18-parasitics_extraction.nom.log | 40 + .../openlane-signoff/19-rcx_mcsta.nom.log | 3152 +++++++++++++++++ .../openlane-signoff/20-rcx_sta.log | 433 +++ .../openlane-signoff/21-irdrop.log | 37 + .../openlane-signoff/22-gds_ptrs.log | 27 + .../openlane-signoff/22-gdsii.log | 67 + .../openlane-signoff/22-lef.log | 73 + .../openlane-signoff/22-maglef.log | 18 + .../openlane-signoff/23-gdsii-klayout.log | 17 + .../openlane-signoff/24-xor.log | 652 ++++ .../openlane-signoff/25-gds.spice.log | 50 + .../openlane-signoff/26-write_powered_def.log | 25 + .../26-write_powered_verilog.log | 7 + .../28-buff_flash_clkrst.gds.json | 293 ++ .../28-buff_flash_clkrst.gds.log | 3 + .../openlane-signoff/28-lvs.gds.log | 205 ++ .../openlane-signoff/29-drc.log | 36 + .../openlane-signoff/30-antenna.log | 5 + .../sdf/max/buff_flash_clkrst.ff.sdf | 186 + .../sdf/max/buff_flash_clkrst.ss.sdf | 186 + .../sdf/max/buff_flash_clkrst.tt.sdf | 186 + .../sdf/min/buff_flash_clkrst.ff.sdf | 186 + .../sdf/min/buff_flash_clkrst.ss.sdf | 186 + .../sdf/min/buff_flash_clkrst.tt.sdf | 186 + .../sdf/nom/buff_flash_clkrst.ff.sdf | 186 + .../sdf/nom/buff_flash_clkrst.ss.sdf | 186 + .../sdf/nom/buff_flash_clkrst.tt.sdf | 186 + .../spef/buff_flash_clkrst.max.spef | 619 ++++ .../spef/buff_flash_clkrst.min.spef | 587 +++ .../spef/buff_flash_clkrst.nom.spef | 587 +++ 34 files changed, 14991 insertions(+) create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/14-parasitics_extraction.min.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/15-rcx_mcsta.min.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/16-parasitics_extraction.max.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/17-rcx_mcsta.max.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/18-parasitics_extraction.nom.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/19-rcx_mcsta.nom.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/20-rcx_sta.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/21-irdrop.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/22-gds_ptrs.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/22-gdsii.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/22-lef.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/22-maglef.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/23-gdsii-klayout.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/24-xor.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/25-gds.spice.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/26-write_powered_def.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/26-write_powered_verilog.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/28-buff_flash_clkrst.gds.json create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/28-buff_flash_clkrst.gds.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/28-lvs.gds.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/29-drc.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/30-antenna.log create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/sdf/max/buff_flash_clkrst.ff.sdf create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/sdf/max/buff_flash_clkrst.ss.sdf create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/sdf/max/buff_flash_clkrst.tt.sdf create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/sdf/min/buff_flash_clkrst.ff.sdf create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/sdf/min/buff_flash_clkrst.ss.sdf create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/sdf/min/buff_flash_clkrst.tt.sdf create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/sdf/nom/buff_flash_clkrst.ff.sdf create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/sdf/nom/buff_flash_clkrst.ss.sdf create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/sdf/nom/buff_flash_clkrst.tt.sdf create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.max.spef create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.min.spef create mode 100644 signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.nom.spef diff --git a/signoff/buff_flash_clkrst/openlane-signoff/14-parasitics_extraction.min.log b/signoff/buff_flash_clkrst/openlane-signoff/14-parasitics_extraction.min.log new file mode 100644 index 00000000..1fa8db76 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/14-parasitics_extraction.min.log @@ -0,0 +1,40 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[INFO ODB-0222] Reading LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.min.lef +[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later. +The LEF parser will ignore this statement. +To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.min.lef at line 930. + +[INFO ODB-0223] Created 13 technology layers +[INFO ODB-0224] Created 25 technology vias +[INFO ODB-0225] Created 441 library cells +[INFO ODB-0226] Finished LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.min.lef +[INFO ODB-0127] Reading DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +[INFO ODB-0128] Design: buff_flash_clkrst +[INFO ODB-0130] Created 32 pins. +[INFO ODB-0131] Created 73 components and 308 component-terminals. +[INFO ODB-0132] Created 2 special nets and 278 connections. +[INFO ODB-0133] Created 30 nets and 30 connections. +[INFO ODB-0134] Finished DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +Using RCX ruleset '/home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre'... +[INFO RCX-0431] Defined process_corner X with ext_model_index 0 +[INFO RCX-0029] Defined extraction corner X +[INFO RCX-0008] extracting parasitics of buff_flash_clkrst ... +[INFO RCX-0435] Reading extraction model file /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre ... +[INFO RCX-0436] RC segment generation buff_flash_clkrst (max_merge_res 50.0) ... +[INFO RCX-0040] Final 30 rc segments +[INFO RCX-0439] Coupling Cap extraction buff_flash_clkrst ... +[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded. +[INFO RCX-0043] 156 wires to be extracted +[INFO RCX-0442] 66% completion -- 103 wires have been extracted +[INFO RCX-0442] 100% completion -- 156 wires have been extracted +[INFO RCX-0045] Extract 30 nets, 60 rsegs, 60 caps, 53 ccs +[INFO RCX-0015] Finished extracting buff_flash_clkrst. +Writing result to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_min/buff_flash_clkrst.spef... +Setting global connections for newly added cells... +[WARNING] Did not save OpenROAD database! +Writing extracted parasitics to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_min/buff_flash_clkrst.spef... +[INFO RCX-0016] Writing SPEF ... +[INFO RCX-0443] 30 nets finished +[INFO RCX-0017] Finished writing SPEF ... diff --git a/signoff/buff_flash_clkrst/openlane-signoff/15-rcx_mcsta.min.log b/signoff/buff_flash_clkrst/openlane-signoff/15-rcx_mcsta.min.log new file mode 100644 index 00000000..0c66840d --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/15-rcx_mcsta.min.log @@ -0,0 +1,3152 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[WARNING STA-0357] virtual clock __VIRTUAL_CLK__ can not be propagated. +min_report + +=========================================================================== +report_checks -path_delay min (Hold) +============================================================================ + +======================= Slowest Corner =================================== + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.02 0.00 1.61 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.09 0.00 1.86 v out_s[10] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.02 0.00 1.61 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.09 0.00 1.86 v out_s[3] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.02 0.00 1.61 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.09 0.00 1.86 v out_s[0] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.02 0.00 1.61 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.09 0.00 1.86 v out_n[2] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.02 0.00 1.61 v BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.09 0.00 1.86 v out_n[0] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.03 0.00 1.61 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.09 0.00 1.86 v out_s[8] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_n[5] (in) + 1 0.00 in_n[5] (net) + 0.03 0.00 1.61 v BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.09 0.00 1.86 v out_s[5] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[4] (in) + 1 0.00 in_n[4] (net) + 0.03 0.00 1.62 v BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.09 0.00 1.86 v out_s[4] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[1] (in) + 1 0.00 in_n[1] (net) + 0.03 0.00 1.62 v BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.09 0.00 1.87 v out_s[1] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.03 0.00 1.62 v BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.09 0.00 1.87 v out_s[9] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.03 0.00 1.62 v BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.09 0.00 1.87 v out_n[1] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.03 0.00 1.62 v BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.09 0.00 1.87 v out_s[7] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.03 0.00 1.62 v BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.09 0.00 1.87 v out_s[6] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.03 0.00 1.62 v BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.09 0.00 1.87 v out_s[2] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.03 0.00 1.62 v BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.09 0.00 1.87 v out_s[11] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + + +======================= Typical Corner =================================== + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.01 0.00 1.61 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.05 0.00 1.74 v out_s[3] (out) + 1.74 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.74 data arrival time +----------------------------------------------------------------------------- + 3.09 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.01 0.00 1.61 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.05 0.00 1.74 v out_s[10] (out) + 1.74 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.74 data arrival time +----------------------------------------------------------------------------- + 3.09 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.01 0.00 1.61 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.05 0.00 1.74 v out_s[0] (out) + 1.74 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.74 data arrival time +----------------------------------------------------------------------------- + 3.09 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.01 0.00 1.61 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.05 0.00 1.74 v out_n[2] (out) + 1.74 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.74 data arrival time +----------------------------------------------------------------------------- + 3.09 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.01 0.00 1.61 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.05 0.00 1.74 v out_s[8] (out) + 1.74 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.74 data arrival time +----------------------------------------------------------------------------- + 3.09 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.01 0.00 1.61 v BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.05 0.00 1.74 v out_n[0] (out) + 1.74 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.74 data arrival time +----------------------------------------------------------------------------- + 3.09 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[5] (in) + 1 0.00 in_n[5] (net) + 0.01 0.00 1.61 v BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.05 0.00 1.74 v out_s[5] (out) + 1.74 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.74 data arrival time +----------------------------------------------------------------------------- + 3.09 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[4] (in) + 1 0.00 in_n[4] (net) + 0.01 0.00 1.61 v BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.05 0.00 1.75 v out_s[4] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[1] (in) + 1 0.00 in_n[1] (net) + 0.01 0.00 1.61 v BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.05 0.00 1.75 v out_s[1] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.01 0.00 1.61 v BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.05 0.00 1.75 v out_s[9] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.01 0.00 1.61 v BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.05 0.00 1.75 v out_n[1] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.01 0.00 1.61 v BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.05 0.00 1.75 v out_s[7] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.01 0.00 1.61 v BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.05 0.00 1.75 v out_s[2] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.01 0.00 1.61 v BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.05 0.00 1.75 v out_s[6] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.02 0.00 1.61 v BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.05 0.00 1.75 v out_s[11] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + + +======================= Fastest Corner =================================== + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.01 0.00 1.60 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.04 0.00 1.70 v out_s[3] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.01 0.00 1.60 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.04 0.00 1.70 v out_s[0] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.01 0.00 1.60 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.04 0.00 1.70 v out_n[2] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.01 0.00 1.60 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.04 0.00 1.70 v out_s[10] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.01 0.00 1.60 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.04 0.00 1.70 v out_s[8] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[5] (in) + 1 0.00 in_n[5] (net) + 0.01 0.00 1.60 v BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.04 0.00 1.70 v out_s[5] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.01 0.00 1.60 v BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.04 0.00 1.70 v out_n[0] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[4] (in) + 1 0.00 in_n[4] (net) + 0.01 0.00 1.60 v BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.04 0.00 1.70 v out_s[4] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[1] (in) + 1 0.00 in_n[1] (net) + 0.01 0.00 1.60 v BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.04 0.00 1.70 v out_s[1] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.01 0.00 1.60 v BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.04 0.00 1.70 v out_s[9] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.01 0.00 1.60 v BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.04 0.00 1.70 v out_n[1] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.01 0.00 1.60 v BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.04 0.00 1.70 v out_s[7] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.01 0.00 1.60 v BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.04 0.00 1.70 v out_s[2] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.01 0.00 1.60 v BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.04 0.00 1.70 v out_s[6] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.01 0.00 1.61 v BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.04 0.00 1.70 v out_s[11] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +min_report_end +max_report + +=========================================================================== +report_checks -path_delay max (Setup) +============================================================================ + +======================= Slowest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.06 0.00 1.64 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.28 1.92 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.12 0.00 1.92 ^ out_s[11] (out) + 1.92 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.92 data arrival time +----------------------------------------------------------------------------- + 4.23 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.05 0.00 1.63 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.12 0.00 1.91 ^ out_s[2] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.05 0.00 1.63 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.12 0.00 1.91 ^ out_s[7] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.05 0.00 1.63 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.12 0.00 1.91 ^ out_s[6] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.05 0.00 1.63 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.12 0.00 1.91 ^ out_n[1] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.05 0.00 1.63 ^ BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.12 0.00 1.91 ^ out_s[9] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.05 0.00 1.63 ^ BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.12 0.00 1.90 ^ out_s[1] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.05 0.00 1.63 ^ BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.12 0.00 1.90 ^ out_s[4] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[5] (in) + 1 0.01 in_n[5] (net) + 0.05 0.00 1.63 ^ BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.12 0.00 1.90 ^ out_s[5] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.05 0.00 1.63 ^ BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.12 0.00 1.90 ^ out_s[8] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.03 1.63 ^ in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.04 0.00 1.63 ^ BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.12 0.00 1.90 ^ out_n[0] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.05 0.00 1.63 ^ BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.12 0.00 1.90 ^ out_s[0] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.05 0.00 1.63 ^ BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.12 0.00 1.90 ^ out_n[2] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.05 0.00 1.63 ^ BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.12 0.00 1.90 ^ out_s[3] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.03 1.63 ^ in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.04 0.00 1.63 ^ BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.12 0.00 1.90 ^ out_s[10] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + + +======================= Typical Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.02 1.62 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.04 0.00 1.62 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.16 1.78 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.08 0.00 1.78 ^ out_s[11] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.03 0.00 1.62 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.07 0.00 1.78 ^ out_s[2] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.03 0.00 1.62 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.07 0.00 1.78 ^ out_s[7] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.03 0.00 1.62 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.07 0.00 1.78 ^ out_s[6] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.03 0.00 1.62 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.07 0.00 1.77 ^ out_n[1] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.03 0.00 1.62 ^ BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.07 0.00 1.77 ^ out_s[9] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.03 0.00 1.62 ^ BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.07 0.00 1.77 ^ out_s[1] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.03 0.00 1.62 ^ BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.07 0.00 1.77 ^ out_s[4] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[5] (in) + 1 0.01 in_n[5] (net) + 0.03 0.00 1.62 ^ BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.07 0.00 1.77 ^ out_s[5] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.03 0.00 1.62 ^ BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.07 0.00 1.77 ^ out_s[8] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.03 0.00 1.62 ^ BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.15 1.77 ^ BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.08 0.00 1.77 ^ out_n[0] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.03 0.00 1.62 ^ BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.07 0.00 1.77 ^ out_n[2] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.03 0.00 1.62 ^ BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.07 0.00 1.77 ^ out_s[0] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.03 0.00 1.62 ^ BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.07 0.00 1.77 ^ out_s[3] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.03 0.00 1.62 ^ BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.07 0.00 1.77 ^ out_s[10] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + + +======================= Fastest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.03 0.00 1.62 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.11 1.73 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.06 0.00 1.73 ^ out_s[11] (out) + 1.73 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.73 data arrival time +----------------------------------------------------------------------------- + 4.42 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.03 0.00 1.62 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.05 0.00 1.72 ^ out_s[2] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.02 1.62 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.02 0.00 1.62 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.11 1.72 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.06 0.00 1.72 ^ out_s[6] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.02 1.62 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.02 0.00 1.62 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.05 0.00 1.72 ^ out_s[7] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.02 1.62 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.02 0.00 1.62 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.05 0.00 1.72 ^ out_n[1] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.02 1.62 ^ in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.02 0.00 1.62 ^ BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.05 0.00 1.72 ^ out_s[9] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.02 0.00 1.61 ^ BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.05 0.00 1.72 ^ out_s[1] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.02 0.00 1.61 ^ BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.05 0.00 1.72 ^ out_s[4] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[5] (in) + 1 0.01 in_n[5] (net) + 0.02 0.00 1.61 ^ BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.05 0.00 1.72 ^ out_s[5] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.02 0.00 1.61 ^ BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.05 0.00 1.72 ^ out_s[8] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.02 0.00 1.61 ^ BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.06 0.00 1.72 ^ out_n[0] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.02 0.00 1.61 ^ BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.06 0.00 1.72 ^ out_n[2] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.02 0.00 1.61 ^ BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.05 0.00 1.72 ^ out_s[0] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.02 0.00 1.61 ^ BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.05 0.00 1.72 ^ out_s[3] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.02 0.00 1.61 ^ BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.06 0.00 1.72 ^ out_s[10] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +max_report_end +check_report + +=========================================================================== +report_checks -unconstrained +============================================================================ + +======================= Slowest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.06 0.00 1.64 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.28 1.92 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.12 0.00 1.92 ^ out_s[11] (out) + 1.92 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.92 data arrival time +----------------------------------------------------------------------------- + 4.23 slack (MET) + + + +======================= Typical Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.02 1.62 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.04 0.00 1.62 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.16 1.78 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.08 0.00 1.78 ^ out_s[11] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + + +======================= Fastest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.03 0.00 1.62 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.11 1.73 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.06 0.00 1.73 ^ out_s[11] (out) + 1.73 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.73 data arrival time +----------------------------------------------------------------------------- + 4.42 slack (MET) + + + +=========================================================================== +report_checks --slack_max -0.01 +============================================================================ + +======================= Slowest Corner =================================== + +No paths found. + +======================= Typical Corner =================================== + +No paths found. + +======================= Fastest Corner =================================== + +No paths found. +check_report_end +check_slew + +=========================================================================== + report_check_types -max_slew -max_cap -max_fanout -violators +============================================================================ + +======================= Slowest Corner =================================== + + +======================= Typical Corner =================================== + + +======================= Fastest Corner =================================== + + +=========================================================================== +max slew violation count 0 +max fanout violation count 0 +max cap violation count 0 +============================================================================ +check_slew_end +tns_report + +=========================================================================== + report_tns +============================================================================ +tns 0.00 +tns_report_end +wns_report + +=========================================================================== + report_wns +============================================================================ +wns 0.00 +wns_report_end +worst_slack + +=========================================================================== + report_worst_slack -max (Setup) +============================================================================ +worst slack 4.23 + +=========================================================================== + report_worst_slack -min (Hold) +============================================================================ +worst slack 3.05 +worst_slack_end +power_report + +=========================================================================== + report_power +============================================================================ + + +======================= Slowest Corner ================================= + +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 7.01e-06 8.02e-06 1.61e-07 1.52e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 7.01e-06 8.02e-06 1.61e-07 1.52e-05 100.0% + 46.2% 52.8% 1.1% + +======================= Typical Corner =================================== + +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 8.50e-06 1.01e-05 1.89e-10 1.86e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 8.50e-06 1.01e-05 1.89e-10 1.86e-05 100.0% + 45.6% 54.4% 0.0% + + +======================= Fastest Corner ================================= + +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 9.68e-06 1.19e-05 5.58e-10 2.16e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 9.68e-06 1.19e-05 5.58e-10 2.16e-05 100.0% + 44.8% 55.1% 0.0% +power_report_end +area_report + +=========================================================================== + report_design_area +============================================================================ +Design area 215 u^2 44% utilization. +area_report_end +Setting global connections for newly added cells... +[WARNING] Did not save OpenROAD database! +Writing SDF files for all corners... +Writing SDF for the ff corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_min/buff_flash_clkrst.ff.sdf... +Writing SDF for the ss corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_min/buff_flash_clkrst.ss.sdf... +Writing SDF for the tt corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_min/buff_flash_clkrst.tt.sdf... +Writing timing models for all corners... +Writing timing models for the ff corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_min/buff_flash_clkrst.ff.lib... +Writing timing models for the ss corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_min/buff_flash_clkrst.ss.lib... +Writing timing models for the tt corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_min/buff_flash_clkrst.tt.lib... diff --git a/signoff/buff_flash_clkrst/openlane-signoff/16-parasitics_extraction.max.log b/signoff/buff_flash_clkrst/openlane-signoff/16-parasitics_extraction.max.log new file mode 100644 index 00000000..6134b5ff --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/16-parasitics_extraction.max.log @@ -0,0 +1,40 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[INFO ODB-0222] Reading LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.max.lef +[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later. +The LEF parser will ignore this statement. +To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.max.lef at line 930. + +[INFO ODB-0223] Created 13 technology layers +[INFO ODB-0224] Created 25 technology vias +[INFO ODB-0225] Created 441 library cells +[INFO ODB-0226] Finished LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.max.lef +[INFO ODB-0127] Reading DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +[INFO ODB-0128] Design: buff_flash_clkrst +[INFO ODB-0130] Created 32 pins. +[INFO ODB-0131] Created 73 components and 308 component-terminals. +[INFO ODB-0132] Created 2 special nets and 278 connections. +[INFO ODB-0133] Created 30 nets and 30 connections. +[INFO ODB-0134] Finished DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +Using RCX ruleset '/home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre'... +[INFO RCX-0431] Defined process_corner X with ext_model_index 0 +[INFO RCX-0029] Defined extraction corner X +[INFO RCX-0008] extracting parasitics of buff_flash_clkrst ... +[INFO RCX-0435] Reading extraction model file /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre ... +[INFO RCX-0436] RC segment generation buff_flash_clkrst (max_merge_res 50.0) ... +[INFO RCX-0040] Final 46 rc segments +[INFO RCX-0439] Coupling Cap extraction buff_flash_clkrst ... +[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded. +[INFO RCX-0043] 156 wires to be extracted +[INFO RCX-0442] 66% completion -- 103 wires have been extracted +[INFO RCX-0442] 100% completion -- 156 wires have been extracted +[INFO RCX-0045] Extract 30 nets, 76 rsegs, 76 caps, 53 ccs +[INFO RCX-0015] Finished extracting buff_flash_clkrst. +Writing result to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_max/buff_flash_clkrst.spef... +Setting global connections for newly added cells... +[WARNING] Did not save OpenROAD database! +Writing extracted parasitics to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_max/buff_flash_clkrst.spef... +[INFO RCX-0016] Writing SPEF ... +[INFO RCX-0443] 30 nets finished +[INFO RCX-0017] Finished writing SPEF ... diff --git a/signoff/buff_flash_clkrst/openlane-signoff/17-rcx_mcsta.max.log b/signoff/buff_flash_clkrst/openlane-signoff/17-rcx_mcsta.max.log new file mode 100644 index 00000000..aa13f0ce --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/17-rcx_mcsta.max.log @@ -0,0 +1,3152 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[WARNING STA-0357] virtual clock __VIRTUAL_CLK__ can not be propagated. +min_report + +=========================================================================== +report_checks -path_delay min (Hold) +============================================================================ + +======================= Slowest Corner =================================== + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.03 0.00 1.61 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.09 0.00 1.86 v out_s[3] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.02 0.00 1.61 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.09 0.00 1.86 v out_s[10] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.03 0.00 1.61 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.09 0.00 1.86 v out_s[0] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.03 0.00 1.61 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.09 0.00 1.86 v out_n[2] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.02 0.00 1.61 v BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.09 0.00 1.87 v out_n[0] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.03 0.00 1.61 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.09 0.00 1.87 v out_s[8] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_n[5] (in) + 1 0.00 in_n[5] (net) + 0.03 0.00 1.61 v BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.09 0.00 1.87 v out_s[5] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.03 0.00 1.62 v BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.09 0.00 1.87 v out_s[4] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.03 0.00 1.62 v BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.09 0.00 1.87 v out_s[1] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.03 0.00 1.62 v BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.09 0.00 1.87 v out_s[9] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.03 0.00 1.62 v BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.09 0.00 1.87 v out_n[1] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.03 0.00 1.62 v BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.09 0.00 1.87 v out_s[7] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.03 0.00 1.62 v BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.09 0.00 1.87 v out_s[6] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.03 0.00 1.62 v BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.09 0.00 1.87 v out_s[2] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.03 0.00 1.62 v BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.88 v BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.09 0.00 1.88 v out_s[11] (out) + 1.88 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.88 data arrival time +----------------------------------------------------------------------------- + 3.23 slack (MET) + + + +======================= Typical Corner =================================== + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.01 0.00 1.61 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.05 0.00 1.75 v out_s[3] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.01 0.00 1.61 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.05 0.00 1.75 v out_s[0] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.01 0.00 1.61 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.05 0.00 1.75 v out_s[10] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.01 0.00 1.61 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.05 0.00 1.75 v out_n[2] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.01 0.00 1.61 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.05 0.00 1.75 v out_s[8] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[5] (in) + 1 0.00 in_n[5] (net) + 0.01 0.00 1.61 v BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.05 0.00 1.75 v out_s[5] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.01 0.00 1.61 v BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.05 0.00 1.75 v out_n[0] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.01 0.00 1.61 v BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.05 0.00 1.75 v out_s[4] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.01 0.00 1.61 v BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.05 0.00 1.75 v out_s[1] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.02 0.00 1.61 v BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.05 0.00 1.75 v out_s[9] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.02 0.00 1.61 v BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.05 0.00 1.75 v out_n[1] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.02 0.00 1.61 v BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.05 0.00 1.75 v out_s[7] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.02 0.00 1.61 v BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.05 0.00 1.75 v out_s[2] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.01 0.00 1.61 v BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.05 0.00 1.75 v out_s[6] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.02 0.00 1.61 v BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.05 0.00 1.75 v out_s[11] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + + +======================= Fastest Corner =================================== + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.01 0.00 1.60 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.04 0.00 1.70 v out_s[3] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.01 0.00 1.60 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.04 0.00 1.70 v out_s[0] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.01 0.00 1.60 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.04 0.00 1.70 v out_n[2] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.01 0.00 1.60 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.04 0.00 1.70 v out_s[10] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[5] (in) + 1 0.00 in_n[5] (net) + 0.01 0.00 1.60 v BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.04 0.00 1.70 v out_s[5] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.01 0.00 1.60 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.04 0.00 1.70 v out_s[8] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.01 0.00 1.60 v BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.04 0.00 1.70 v out_n[0] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.01 0.00 1.60 v BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.04 0.00 1.70 v out_s[4] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.01 0.00 1.60 v BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.04 0.00 1.70 v out_s[1] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.01 0.00 1.60 v BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.04 0.00 1.70 v out_s[9] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.01 0.00 1.61 v BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.04 0.00 1.70 v out_n[1] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.01 0.00 1.60 v BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.04 0.00 1.70 v out_s[7] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.01 0.00 1.61 v BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.04 0.00 1.70 v out_s[2] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.01 0.00 1.60 v BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.04 0.00 1.70 v out_s[6] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.01 0.00 1.61 v BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.04 0.00 1.70 v out_s[11] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +min_report_end +max_report + +=========================================================================== +report_checks -path_delay max (Setup) +============================================================================ + +======================= Slowest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.06 0.00 1.64 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.28 1.92 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.12 0.00 1.92 ^ out_s[11] (out) + 1.92 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.92 data arrival time +----------------------------------------------------------------------------- + 4.23 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.06 0.00 1.64 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.12 0.00 1.91 ^ out_s[2] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.06 0.00 1.64 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.12 0.00 1.91 ^ out_s[7] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.06 0.00 1.64 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.12 0.00 1.91 ^ out_n[1] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.05 0.00 1.63 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.12 0.00 1.91 ^ out_s[6] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.06 0.00 1.64 ^ BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.12 0.00 1.91 ^ out_s[9] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.05 0.00 1.63 ^ BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.12 0.00 1.91 ^ out_s[1] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.05 0.00 1.63 ^ BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.12 0.00 1.90 ^ out_s[4] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[5] (in) + 1 0.01 in_n[5] (net) + 0.05 0.00 1.63 ^ BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.12 0.00 1.90 ^ out_s[5] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[8] (in) + 1 0.01 in_n[8] (net) + 0.05 0.00 1.63 ^ BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.12 0.00 1.90 ^ out_s[8] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.05 0.00 1.63 ^ BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.12 0.00 1.90 ^ out_n[0] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.05 0.00 1.63 ^ BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.12 0.00 1.90 ^ out_n[2] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.05 0.00 1.63 ^ BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.12 0.00 1.90 ^ out_s[0] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.05 0.00 1.63 ^ BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.12 0.00 1.90 ^ out_s[3] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.05 0.00 1.63 ^ BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.12 0.00 1.90 ^ out_s[10] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + + +======================= Typical Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.03 1.63 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.04 0.00 1.63 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.16 1.78 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.08 0.00 1.79 ^ out_s[11] (out) + 1.79 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.79 data arrival time +----------------------------------------------------------------------------- + 4.36 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.02 1.62 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.04 0.00 1.62 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.07 0.00 1.78 ^ out_s[2] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.03 0.00 1.62 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.07 0.00 1.78 ^ out_s[6] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.03 0.00 1.62 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.07 0.00 1.78 ^ out_s[7] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.02 1.62 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.04 0.00 1.62 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.07 0.00 1.78 ^ out_n[1] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.03 0.00 1.62 ^ BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.07 0.00 1.78 ^ out_s[9] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.03 0.00 1.62 ^ BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.07 0.00 1.78 ^ out_s[1] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.03 0.00 1.62 ^ BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.07 0.00 1.77 ^ out_s[4] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[5] (in) + 1 0.01 in_n[5] (net) + 0.03 0.00 1.62 ^ BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.07 0.00 1.77 ^ out_s[5] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[8] (in) + 1 0.01 in_n[8] (net) + 0.03 0.00 1.62 ^ BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.07 0.00 1.77 ^ out_s[8] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.03 0.00 1.62 ^ BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.15 1.77 ^ BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.08 0.00 1.77 ^ out_n[0] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.03 0.00 1.62 ^ BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.07 0.00 1.77 ^ out_n[2] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.03 0.00 1.62 ^ BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.07 0.00 1.77 ^ out_s[0] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.03 0.00 1.62 ^ BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.15 1.77 ^ BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.08 0.00 1.77 ^ out_s[10] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.03 0.00 1.62 ^ BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.07 0.00 1.77 ^ out_s[3] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + + +======================= Fastest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.03 0.00 1.62 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.11 1.73 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.06 0.00 1.73 ^ out_s[11] (out) + 1.73 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.73 data arrival time +----------------------------------------------------------------------------- + 4.42 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.03 0.00 1.62 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.05 0.00 1.72 ^ out_s[2] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.03 0.00 1.62 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.11 1.72 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.06 0.00 1.72 ^ out_s[6] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.03 0.00 1.62 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.06 0.00 1.72 ^ out_s[7] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.03 0.00 1.62 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.05 0.00 1.72 ^ out_n[1] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.03 0.00 1.62 ^ BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.05 0.00 1.72 ^ out_s[9] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.02 1.62 ^ in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.02 0.00 1.62 ^ BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.06 0.00 1.72 ^ out_s[1] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.02 1.62 ^ in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.02 0.00 1.62 ^ BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.05 0.00 1.72 ^ out_s[4] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[5] (in) + 1 0.01 in_n[5] (net) + 0.02 0.00 1.61 ^ BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.05 0.00 1.72 ^ out_s[5] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[8] (in) + 1 0.01 in_n[8] (net) + 0.02 0.00 1.61 ^ BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.06 0.00 1.72 ^ out_s[8] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.02 0.00 1.61 ^ BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.06 0.00 1.72 ^ out_n[0] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.02 0.00 1.61 ^ BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.06 0.00 1.72 ^ out_n[2] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.02 0.00 1.61 ^ BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.06 0.00 1.72 ^ out_s[0] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.02 0.00 1.61 ^ BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.06 0.00 1.72 ^ out_s[10] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.02 0.00 1.61 ^ BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.06 0.00 1.72 ^ out_s[3] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +max_report_end +check_report + +=========================================================================== +report_checks -unconstrained +============================================================================ + +======================= Slowest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.06 0.00 1.64 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.28 1.92 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.12 0.00 1.92 ^ out_s[11] (out) + 1.92 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.92 data arrival time +----------------------------------------------------------------------------- + 4.23 slack (MET) + + + +======================= Typical Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.03 1.63 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.04 0.00 1.63 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.16 1.78 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.08 0.00 1.79 ^ out_s[11] (out) + 1.79 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.79 data arrival time +----------------------------------------------------------------------------- + 4.36 slack (MET) + + + +======================= Fastest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.03 0.00 1.62 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.11 1.73 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.06 0.00 1.73 ^ out_s[11] (out) + 1.73 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.73 data arrival time +----------------------------------------------------------------------------- + 4.42 slack (MET) + + + +=========================================================================== +report_checks --slack_max -0.01 +============================================================================ + +======================= Slowest Corner =================================== + +No paths found. + +======================= Typical Corner =================================== + +No paths found. + +======================= Fastest Corner =================================== + +No paths found. +check_report_end +check_slew + +=========================================================================== + report_check_types -max_slew -max_cap -max_fanout -violators +============================================================================ + +======================= Slowest Corner =================================== + + +======================= Typical Corner =================================== + + +======================= Fastest Corner =================================== + + +=========================================================================== +max slew violation count 0 +max fanout violation count 0 +max cap violation count 0 +============================================================================ +check_slew_end +tns_report + +=========================================================================== + report_tns +============================================================================ +tns 0.00 +tns_report_end +wns_report + +=========================================================================== + report_wns +============================================================================ +wns 0.00 +wns_report_end +worst_slack + +=========================================================================== + report_worst_slack -max (Setup) +============================================================================ +worst slack 4.23 + +=========================================================================== + report_worst_slack -min (Hold) +============================================================================ +worst slack 3.05 +worst_slack_end +power_report + +=========================================================================== + report_power +============================================================================ + + +======================= Slowest Corner ================================= + +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 7.01e-06 8.02e-06 1.61e-07 1.52e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 7.01e-06 8.02e-06 1.61e-07 1.52e-05 100.0% + 46.2% 52.8% 1.1% + +======================= Typical Corner =================================== + +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 8.50e-06 1.01e-05 1.89e-10 1.86e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 8.50e-06 1.01e-05 1.89e-10 1.86e-05 100.0% + 45.6% 54.4% 0.0% + + +======================= Fastest Corner ================================= + +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 9.68e-06 1.19e-05 5.58e-10 2.16e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 9.68e-06 1.19e-05 5.58e-10 2.16e-05 100.0% + 44.8% 55.2% 0.0% +power_report_end +area_report + +=========================================================================== + report_design_area +============================================================================ +Design area 215 u^2 44% utilization. +area_report_end +Setting global connections for newly added cells... +[WARNING] Did not save OpenROAD database! +Writing SDF files for all corners... +Writing SDF for the ff corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_max/buff_flash_clkrst.ff.sdf... +Writing SDF for the ss corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_max/buff_flash_clkrst.ss.sdf... +Writing SDF for the tt corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_max/buff_flash_clkrst.tt.sdf... +Writing timing models for all corners... +Writing timing models for the ff corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_max/buff_flash_clkrst.ff.lib... +Writing timing models for the ss corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_max/buff_flash_clkrst.ss.lib... +Writing timing models for the tt corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_max/buff_flash_clkrst.tt.lib... diff --git a/signoff/buff_flash_clkrst/openlane-signoff/18-parasitics_extraction.nom.log b/signoff/buff_flash_clkrst/openlane-signoff/18-parasitics_extraction.nom.log new file mode 100644 index 00000000..75034e3d --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/18-parasitics_extraction.nom.log @@ -0,0 +1,40 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[INFO ODB-0222] Reading LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef +[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later. +The LEF parser will ignore this statement. +To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef at line 930. + +[INFO ODB-0223] Created 13 technology layers +[INFO ODB-0224] Created 25 technology vias +[INFO ODB-0225] Created 441 library cells +[INFO ODB-0226] Finished LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef +[INFO ODB-0127] Reading DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +[INFO ODB-0128] Design: buff_flash_clkrst +[INFO ODB-0130] Created 32 pins. +[INFO ODB-0131] Created 73 components and 308 component-terminals. +[INFO ODB-0132] Created 2 special nets and 278 connections. +[INFO ODB-0133] Created 30 nets and 30 connections. +[INFO ODB-0134] Finished DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +Using RCX ruleset '/home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre'... +[INFO RCX-0431] Defined process_corner X with ext_model_index 0 +[INFO RCX-0029] Defined extraction corner X +[INFO RCX-0008] extracting parasitics of buff_flash_clkrst ... +[INFO RCX-0435] Reading extraction model file /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre ... +[INFO RCX-0436] RC segment generation buff_flash_clkrst (max_merge_res 50.0) ... +[INFO RCX-0040] Final 30 rc segments +[INFO RCX-0439] Coupling Cap extraction buff_flash_clkrst ... +[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded. +[INFO RCX-0043] 156 wires to be extracted +[INFO RCX-0442] 66% completion -- 103 wires have been extracted +[INFO RCX-0442] 100% completion -- 156 wires have been extracted +[INFO RCX-0045] Extract 30 nets, 60 rsegs, 60 caps, 53 ccs +[INFO RCX-0015] Finished extracting buff_flash_clkrst. +Writing result to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.spef... +Setting global connections for newly added cells... +[WARNING] Did not save OpenROAD database! +Writing extracted parasitics to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.spef... +[INFO RCX-0016] Writing SPEF ... +[INFO RCX-0443] 30 nets finished +[INFO RCX-0017] Finished writing SPEF ... diff --git a/signoff/buff_flash_clkrst/openlane-signoff/19-rcx_mcsta.nom.log b/signoff/buff_flash_clkrst/openlane-signoff/19-rcx_mcsta.nom.log new file mode 100644 index 00000000..141803c4 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/19-rcx_mcsta.nom.log @@ -0,0 +1,3152 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[WARNING STA-0357] virtual clock __VIRTUAL_CLK__ can not be propagated. +min_report + +=========================================================================== +report_checks -path_delay min (Hold) +============================================================================ + +======================= Slowest Corner =================================== + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.02 0.00 1.61 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.09 0.00 1.86 v out_s[3] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.02 0.00 1.61 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.09 0.00 1.86 v out_s[10] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.03 0.00 1.61 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.09 0.00 1.86 v out_s[0] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.02 0.00 1.61 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.09 0.00 1.86 v out_n[2] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.02 0.00 1.61 v BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.09 0.00 1.86 v out_n[0] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.03 0.00 1.61 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.09 0.00 1.86 v out_s[8] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.01 1.61 v in_n[5] (in) + 1 0.00 in_n[5] (net) + 0.03 0.00 1.61 v BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.09 0.00 1.86 v out_s[5] (out) + 1.86 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.86 data arrival time +----------------------------------------------------------------------------- + 3.21 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.03 0.00 1.62 v BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.86 v BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.09 0.00 1.87 v out_s[4] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.03 0.00 1.62 v BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.09 0.00 1.87 v out_s[1] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.03 0.00 1.62 v BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.09 0.00 1.87 v out_s[9] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.03 0.00 1.62 v BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.09 0.00 1.87 v out_n[1] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.03 0.00 1.62 v BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.09 0.00 1.87 v out_s[7] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.03 0.00 1.62 v BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.09 0.00 1.87 v out_s[6] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.03 0.00 1.62 v BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.09 0.00 1.87 v out_s[2] (out) + 1.87 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.87 data arrival time +----------------------------------------------------------------------------- + 3.22 slack (MET) + + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.03 0.02 1.62 v in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.03 0.00 1.62 v BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.09 0.25 1.87 v BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.09 0.00 1.88 v out_s[11] (out) + 1.88 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.88 data arrival time +----------------------------------------------------------------------------- + 3.23 slack (MET) + + + +======================= Typical Corner =================================== + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.01 0.00 1.61 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.05 0.00 1.74 v out_s[3] (out) + 1.74 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.74 data arrival time +----------------------------------------------------------------------------- + 3.09 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.01 0.00 1.61 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.05 0.00 1.75 v out_s[10] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.01 0.00 1.61 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.05 0.00 1.75 v out_s[0] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.01 0.00 1.61 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.05 0.00 1.75 v out_n[2] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.01 0.00 1.61 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.05 0.00 1.75 v out_s[8] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[5] (in) + 1 0.00 in_n[5] (net) + 0.01 0.00 1.61 v BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.05 0.00 1.75 v out_s[5] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.01 0.00 1.61 v BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.05 0.00 1.75 v out_n[0] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[4] (in) + 1 0.00 in_n[4] (net) + 0.01 0.00 1.61 v BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.05 0.00 1.75 v out_s[4] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.01 0.00 1.61 v BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.05 0.00 1.75 v out_s[1] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.01 0.00 1.61 v BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.05 0.00 1.75 v out_s[9] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.01 0.00 1.61 v BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.05 0.00 1.75 v out_n[1] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.01 0.00 1.61 v BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.05 0.00 1.75 v out_s[7] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.02 0.00 1.61 v BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.05 0.00 1.75 v out_s[2] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.01 0.00 1.61 v BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.05 0.00 1.75 v out_s[6] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.02 0.01 1.61 v in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.02 0.00 1.61 v BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.75 v BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.05 0.00 1.75 v out_s[11] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + + +======================= Fastest Corner =================================== + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.01 0.00 1.60 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.04 0.00 1.70 v out_s[3] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.01 0.00 1.60 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.04 0.00 1.70 v out_s[0] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.01 0.00 1.60 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.04 0.00 1.70 v out_n[2] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.01 0.00 1.60 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.04 0.00 1.70 v out_s[10] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[5] (in) + 1 0.00 in_n[5] (net) + 0.01 0.00 1.60 v BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.04 0.00 1.70 v out_s[5] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.01 0.00 1.60 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.04 0.00 1.70 v out_s[8] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.01 0.00 1.60 v BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.04 0.00 1.70 v out_n[0] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.01 0.00 1.60 v BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.04 0.00 1.70 v out_s[4] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.01 0.00 1.60 v BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.04 0.00 1.70 v out_s[1] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.01 0.00 1.60 v BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.04 0.00 1.70 v out_s[9] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.01 0.00 1.60 v BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.04 0.00 1.70 v out_n[1] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.01 0.00 1.60 v BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.04 0.00 1.70 v out_s[7] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.01 0.00 1.60 v BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.04 0.00 1.70 v out_s[2] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.00 1.60 v in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.01 0.00 1.60 v BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.04 0.00 1.70 v out_s[6] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.01 0.00 1.61 v BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.04 0.09 1.70 v BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.04 0.00 1.70 v out_s[11] (out) + 1.70 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.70 data arrival time +----------------------------------------------------------------------------- + 3.05 slack (MET) + + +min_report_end +max_report + +=========================================================================== +report_checks -path_delay max (Setup) +============================================================================ + +======================= Slowest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.06 0.00 1.64 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.28 1.92 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.12 0.00 1.92 ^ out_s[11] (out) + 1.92 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.92 data arrival time +----------------------------------------------------------------------------- + 4.23 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.06 0.00 1.64 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.12 0.00 1.91 ^ out_s[2] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.05 0.00 1.63 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.12 0.00 1.91 ^ out_s[7] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.05 0.00 1.63 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.12 0.00 1.91 ^ out_s[6] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.05 0.00 1.63 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.12 0.00 1.91 ^ out_n[1] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.05 0.00 1.63 ^ BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.91 ^ BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.12 0.00 1.91 ^ out_s[9] (out) + 1.91 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.91 data arrival time +----------------------------------------------------------------------------- + 4.24 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.05 0.00 1.63 ^ BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.12 0.00 1.90 ^ out_s[1] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.05 0.00 1.63 ^ BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.12 0.00 1.90 ^ out_s[4] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[5] (in) + 1 0.01 in_n[5] (net) + 0.05 0.00 1.63 ^ BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.12 0.00 1.90 ^ out_s[5] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.05 0.00 1.63 ^ BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.12 0.00 1.90 ^ out_s[8] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.05 0.00 1.63 ^ BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.12 0.00 1.90 ^ out_n[0] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.05 0.00 1.63 ^ BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.12 0.00 1.90 ^ out_n[2] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.05 0.00 1.63 ^ BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.12 0.00 1.90 ^ out_s[0] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.05 0.00 1.63 ^ BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.12 0.00 1.90 ^ out_s[3] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.05 0.03 1.63 ^ in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.05 0.00 1.63 ^ BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.27 1.90 ^ BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.12 0.00 1.90 ^ out_s[10] (out) + 1.90 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.90 data arrival time +----------------------------------------------------------------------------- + 4.25 slack (MET) + + + +======================= Typical Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.03 1.63 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.04 0.00 1.63 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.16 1.78 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.08 0.00 1.78 ^ out_s[11] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.03 0.00 1.62 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.07 0.00 1.78 ^ out_s[2] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.03 0.00 1.62 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.07 0.00 1.78 ^ out_s[6] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.03 0.00 1.62 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.07 0.00 1.78 ^ out_s[7] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.03 0.00 1.62 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.07 0.00 1.78 ^ out_n[1] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.03 0.00 1.62 ^ BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.07 0.00 1.78 ^ out_s[9] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.03 0.00 1.62 ^ BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.07 0.00 1.77 ^ out_s[1] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.03 0.00 1.62 ^ BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.07 0.00 1.77 ^ out_s[4] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[5] (in) + 1 0.01 in_n[5] (net) + 0.03 0.00 1.62 ^ BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.07 0.00 1.77 ^ out_s[5] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.03 0.00 1.62 ^ BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.07 0.00 1.77 ^ out_s[8] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.03 0.00 1.62 ^ BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.15 1.77 ^ BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.08 0.00 1.77 ^ out_n[0] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.03 0.00 1.62 ^ BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.07 0.00 1.77 ^ out_n[2] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.03 0.00 1.62 ^ BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.07 0.00 1.77 ^ out_s[0] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.03 0.00 1.62 ^ BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.07 0.00 1.77 ^ out_s[3] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.03 0.00 1.62 ^ BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.77 ^ BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.07 0.00 1.77 ^ out_s[10] (out) + 1.77 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.77 data arrival time +----------------------------------------------------------------------------- + 4.38 slack (MET) + + + +======================= Fastest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.03 0.00 1.62 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.11 1.73 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.06 0.00 1.73 ^ out_s[11] (out) + 1.73 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.73 data arrival time +----------------------------------------------------------------------------- + 4.42 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.03 0.00 1.62 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.05 0.00 1.72 ^ out_s[2] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.02 1.62 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.02 0.00 1.62 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.11 1.72 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.06 0.00 1.72 ^ out_s[6] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.03 0.00 1.62 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.05 0.00 1.72 ^ out_s[7] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.03 0.00 1.62 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.05 0.00 1.72 ^ out_n[1] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[9] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[9] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[9] (in) + 1 0.01 in_n[9] (net) + 0.03 0.00 1.62 ^ BUF[12]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[12]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[9] (net) + 0.05 0.00 1.72 ^ out_s[9] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[1] (in) + 1 0.01 in_n[1] (net) + 0.02 0.00 1.61 ^ BUF[4]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[4]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[1] (net) + 0.05 0.00 1.72 ^ out_s[1] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[4] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[4] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[4] (in) + 1 0.01 in_n[4] (net) + 0.02 0.00 1.61 ^ BUF[7]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[7]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[4] (net) + 0.05 0.00 1.72 ^ out_s[4] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[5] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[5] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[5] (in) + 1 0.01 in_n[5] (net) + 0.02 0.00 1.61 ^ BUF[8]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[8]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[5] (net) + 0.05 0.00 1.72 ^ out_s[5] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[8] (in) + 1 0.01 in_n[8] (net) + 0.02 0.00 1.61 ^ BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.06 0.00 1.72 ^ out_s[8] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_s[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_s[0] (in) + 1 0.00 in_s[0] (net) + 0.02 0.00 1.61 ^ BUF[0]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[0]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[0] (net) + 0.06 0.00 1.72 ^ out_n[0] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.02 0.00 1.61 ^ BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.06 0.00 1.72 ^ out_n[2] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.02 0.00 1.61 ^ BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.05 0.00 1.72 ^ out_s[0] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.02 0.00 1.61 ^ BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.10 1.72 ^ BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.06 0.00 1.72 ^ out_s[10] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.02 0.01 1.61 ^ in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.02 0.00 1.61 ^ BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.10 1.72 ^ BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.05 0.00 1.72 ^ out_s[3] (out) + 1.72 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.72 data arrival time +----------------------------------------------------------------------------- + 4.43 slack (MET) + + +max_report_end +check_report + +=========================================================================== +report_checks -unconstrained +============================================================================ + +======================= Slowest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ss + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.06 0.04 1.64 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.06 0.00 1.64 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.12 0.28 1.92 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.12 0.00 1.92 ^ out_s[11] (out) + 1.92 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.92 data arrival time +----------------------------------------------------------------------------- + 4.23 slack (MET) + + + +======================= Typical Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: tt + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.03 1.63 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.04 0.00 1.63 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.16 1.78 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.08 0.00 1.78 ^ out_s[11] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + + +======================= Fastest Corner =================================== + +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max +Corner: ff + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.03 0.00 1.62 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.06 0.11 1.73 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.06 0.00 1.73 ^ out_s[11] (out) + 1.73 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.73 data arrival time +----------------------------------------------------------------------------- + 4.42 slack (MET) + + + +=========================================================================== +report_checks --slack_max -0.01 +============================================================================ + +======================= Slowest Corner =================================== + +No paths found. + +======================= Typical Corner =================================== + +No paths found. + +======================= Fastest Corner =================================== + +No paths found. +check_report_end +check_slew + +=========================================================================== + report_check_types -max_slew -max_cap -max_fanout -violators +============================================================================ + +======================= Slowest Corner =================================== + + +======================= Typical Corner =================================== + + +======================= Fastest Corner =================================== + + +=========================================================================== +max slew violation count 0 +max fanout violation count 0 +max cap violation count 0 +============================================================================ +check_slew_end +tns_report + +=========================================================================== + report_tns +============================================================================ +tns 0.00 +tns_report_end +wns_report + +=========================================================================== + report_wns +============================================================================ +wns 0.00 +wns_report_end +worst_slack + +=========================================================================== + report_worst_slack -max (Setup) +============================================================================ +worst slack 4.23 + +=========================================================================== + report_worst_slack -min (Hold) +============================================================================ +worst slack 3.05 +worst_slack_end +power_report + +=========================================================================== + report_power +============================================================================ + + +======================= Slowest Corner ================================= + +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 7.01e-06 8.02e-06 1.61e-07 1.52e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 7.01e-06 8.02e-06 1.61e-07 1.52e-05 100.0% + 46.2% 52.8% 1.1% + +======================= Typical Corner =================================== + +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 8.50e-06 1.01e-05 1.89e-10 1.86e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 8.50e-06 1.01e-05 1.89e-10 1.86e-05 100.0% + 45.6% 54.4% 0.0% + + +======================= Fastest Corner ================================= + +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 9.68e-06 1.19e-05 5.58e-10 2.16e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 9.68e-06 1.19e-05 5.58e-10 2.16e-05 100.0% + 44.8% 55.2% 0.0% +power_report_end +area_report + +=========================================================================== + report_design_area +============================================================================ +Design area 215 u^2 44% utilization. +area_report_end +Setting global connections for newly added cells... +[WARNING] Did not save OpenROAD database! +Writing SDF files for all corners... +Writing SDF for the ff corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.ff.sdf... +Writing SDF for the ss corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.ss.sdf... +Writing SDF for the tt corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.tt.sdf... +Writing timing models for all corners... +Writing timing models for the ff corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.ff.lib... +Writing timing models for the ss corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.ss.lib... +Writing timing models for the tt corner to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.tt.lib... diff --git a/signoff/buff_flash_clkrst/openlane-signoff/20-rcx_sta.log b/signoff/buff_flash_clkrst/openlane-signoff/20-rcx_sta.log new file mode 100644 index 00000000..cfe7d44a --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/20-rcx_sta.log @@ -0,0 +1,433 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[WARNING STA-0357] virtual clock __VIRTUAL_CLK__ can not be propagated. +min_report + +=========================================================================== +report_checks -path_delay min (Hold) +============================================================================ +Startpoint: in_n[3] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[3] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[3] (in) + 1 0.00 in_n[3] (net) + 0.01 0.00 1.61 v BUF[6]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[6]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[3] (net) + 0.05 0.00 1.74 v out_s[3] (out) + 1.74 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.74 data arrival time +----------------------------------------------------------------------------- + 3.09 slack (MET) + + +Startpoint: in_n[10] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[10] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[10] (in) + 1 0.00 in_n[10] (net) + 0.01 0.00 1.61 v BUF[13]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[13]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[10] (net) + 0.05 0.00 1.75 v out_s[10] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[0] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[0] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[0] (in) + 1 0.00 in_n[0] (net) + 0.01 0.00 1.61 v BUF[3]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[3]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[0] (net) + 0.05 0.00 1.75 v out_s[0] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_s[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_s[2] (in) + 1 0.00 in_s[2] (net) + 0.01 0.00 1.61 v BUF[2]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[2]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[2] (net) + 0.05 0.00 1.75 v out_n[2] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +Startpoint: in_n[8] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[8] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: min + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 v input external delay + 0.01 0.01 1.61 v in_n[8] (in) + 1 0.00 in_n[8] (net) + 0.01 0.00 1.61 v BUF[11]/A (sky130_fd_sc_hd__clkbuf_8) + 0.05 0.14 1.74 v BUF[11]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[8] (net) + 0.05 0.00 1.75 v out_s[8] (out) + 1.75 data arrival time + + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 0.25 0.25 clock uncertainty + 0.00 0.25 clock reconvergence pessimism + -1.60 -1.35 output external delay + -1.35 data required time +----------------------------------------------------------------------------- + -1.35 data required time + -1.75 data arrival time +----------------------------------------------------------------------------- + 3.10 slack (MET) + + +min_report_end +max_report + +=========================================================================== +report_checks -path_delay max (Setup) +============================================================================ +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.03 1.63 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.04 0.00 1.63 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.16 1.78 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.08 0.00 1.78 ^ out_s[11] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[2] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[2] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[2] (in) + 1 0.01 in_n[2] (net) + 0.03 0.00 1.62 ^ BUF[5]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[5]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[2] (net) + 0.07 0.00 1.78 ^ out_s[2] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[6] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[6] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[6] (in) + 1 0.01 in_n[6] (net) + 0.03 0.00 1.62 ^ BUF[9]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[9]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[6] (net) + 0.07 0.00 1.78 ^ out_s[6] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_n[7] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[7] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_n[7] (in) + 1 0.01 in_n[7] (net) + 0.03 0.00 1.62 ^ BUF[10]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[10]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[7] (net) + 0.07 0.00 1.78 ^ out_s[7] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +Startpoint: in_s[1] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_n[1] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.03 0.02 1.62 ^ in_s[1] (in) + 1 0.01 in_s[1] (net) + 0.03 0.00 1.62 ^ BUF[1]/A (sky130_fd_sc_hd__clkbuf_8) + 0.07 0.15 1.78 ^ BUF[1]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_n[1] (net) + 0.07 0.00 1.78 ^ out_n[1] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + +max_report_end +check_report + +=========================================================================== +report_checks -unconstrained +============================================================================ +Startpoint: in_n[11] (input port clocked by __VIRTUAL_CLK__) +Endpoint: out_s[11] (output port clocked by __VIRTUAL_CLK__) +Path Group: __VIRTUAL_CLK__ +Path Type: max + +Fanout Cap Slew Delay Time Description +----------------------------------------------------------------------------- + 0.00 0.00 0.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 0.00 clock network delay (ideal) + 1.60 1.60 ^ input external delay + 0.04 0.03 1.63 ^ in_n[11] (in) + 1 0.01 in_n[11] (net) + 0.04 0.00 1.63 ^ BUF[14]/A (sky130_fd_sc_hd__clkbuf_8) + 0.08 0.16 1.78 ^ BUF[14]/X (sky130_fd_sc_hd__clkbuf_8) + 1 0.03 out_s[11] (net) + 0.08 0.00 1.78 ^ out_s[11] (out) + 1.78 data arrival time + + 0.00 8.00 8.00 clock __VIRTUAL_CLK__ (rise edge) + 0.00 8.00 clock network delay (ideal) + -0.25 7.75 clock uncertainty + 0.00 7.75 clock reconvergence pessimism + -1.60 6.15 output external delay + 6.15 data required time +----------------------------------------------------------------------------- + 6.15 data required time + -1.78 data arrival time +----------------------------------------------------------------------------- + 4.37 slack (MET) + + + +=========================================================================== +report_checks --slack_max -0.01 +============================================================================ +No paths found. +check_report_end +check_slew + +=========================================================================== + report_check_types -max_slew -max_cap -max_fanout -violators +============================================================================ + +=========================================================================== +max slew violation count 0 +max fanout violation count 0 +max cap violation count 0 +============================================================================ +check_slew_end +tns_report + +=========================================================================== + report_tns +============================================================================ +tns 0.00 +tns_report_end +wns_report + +=========================================================================== + report_wns +============================================================================ +wns 0.00 +wns_report_end +worst_slack + +=========================================================================== + report_worst_slack -max (Setup) +============================================================================ +worst slack 4.37 + +=========================================================================== + report_worst_slack -min (Hold) +============================================================================ +worst slack 3.09 +worst_slack_end +power_report + +=========================================================================== + report_power +============================================================================ +Group Internal Switching Leakage Total + Power Power Power Power (Watts) +---------------------------------------------------------------- +Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Combinational 8.50e-06 1.01e-05 1.92e-10 1.86e-05 100.0% +Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% +---------------------------------------------------------------- +Total 8.50e-06 1.01e-05 1.92e-10 1.86e-05 100.0% + 45.6% 54.4% 0.0% +power_report_end +area_report + +=========================================================================== + report_design_area +============================================================================ +Design area 215 u^2 44% utilization. +area_report_end +Setting global connections for newly added cells... +[WARNING] Did not save OpenROAD database! +Writing SDF to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.sdf... +Writing timing model to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/mca/process_corner_nom/buff_flash_clkrst.lib... diff --git a/signoff/buff_flash_clkrst/openlane-signoff/21-irdrop.log b/signoff/buff_flash_clkrst/openlane-signoff/21-irdrop.log new file mode 100644 index 00000000..ccc98e80 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/21-irdrop.log @@ -0,0 +1,37 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[INFO ODB-0222] Reading LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef +[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later. +The LEF parser will ignore this statement. +To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef at line 930. + +[INFO ODB-0223] Created 13 technology layers +[INFO ODB-0224] Created 25 technology vias +[INFO ODB-0225] Created 441 library cells +[INFO ODB-0226] Finished LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef +[INFO ODB-0127] Reading DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +[INFO ODB-0128] Design: buff_flash_clkrst +[INFO ODB-0130] Created 32 pins. +[INFO ODB-0131] Created 73 components and 308 component-terminals. +[INFO ODB-0132] Created 2 special nets and 278 connections. +[INFO ODB-0133] Created 30 nets and 30 connections. +[INFO ODB-0134] Finished DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +[INFO]: Setting RC values... +[INFO PSM-0002] Output voltage file is specified as: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/reports/signoff/21-irdrop.rpt. +[WARNING PSM-0016] Voltage pad location (VSRC) file not specified, defaulting pad location to checkerboard pattern on core area. +[WARNING PSM-0017] X direction bump pitch is not specified, defaulting to 140um. +[WARNING PSM-0018] Y direction bump pitch is not specified, defaulting to 140um. +[WARNING PSM-0019] Voltage on net VPWR is not explicitly set. +[WARNING PSM-0022] Using voltage 1.800V for VDD network. +[WARNING PSM-0063] Specified bump pitches of 140.000 and 140.000 are less than core width of 35.880 or core height of 13.600. Changing bump location to the center of the die at (19.780, 12.240). +[WARNING PSM-0065] VSRC location not specified, using default checkerboard pattern with one VDD every size bumps in x-direction and one in two bumps in the y-direction +[INFO PSM-0076] Setting metal node density to be standard cell height times 5. +[INFO PSM-0031] Number of PDN nodes on net VPWR = 110. +[INFO PSM-0064] Number of voltage sources = 1. +[INFO PSM-0040] All PDN stripes on net VPWR are connected. +########## IR report ################# +Worstcase voltage: 1.80e+00 V +Average IR drop : 2.19e-10 V +Worstcase IR drop: 3.61e-10 V +###################################### diff --git a/signoff/buff_flash_clkrst/openlane-signoff/22-gds_ptrs.log b/signoff/buff_flash_clkrst/openlane-signoff/22-gds_ptrs.log new file mode 100644 index 00000000..7b742df1 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/22-gds_ptrs.log @@ -0,0 +1,27 @@ + +Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022. +Starting magic under Tcl interpreter +Using the terminal as the console. +Using NULL graphics device. +Processing system .magicrc file +Sourcing design .magicrc for technology sky130A ... +2 Magic internal units = 1 Lambda +Input style sky130(vendor): scaleFactor=2, multiplier=2 +The following types are not handled by extraction and will be treated as non-electrical types: + ubm +Scaled tech values by 2 / 1 to match internal grid scaling +Loading sky130A Device Generator Menu ... +Using technology "sky130A", version 1.0.341-2-gde752ec +Warning: Calma reading is not undoable! I hope that's OK. +Library written using GDS-II Release 3.0 +Library name: buff_flash_clkrst +Reading "sky130_fd_sc_hd__clkbuf_8". +Reading "sky130_fd_sc_hd__decap_4". +Reading "sky130_fd_sc_hd__fill_1". +Reading "sky130_fd_sc_hd__decap_3". +Reading "sky130_fd_sc_hd__decap_8". +Reading "sky130_ef_sc_hd__decap_12". +Reading "sky130_fd_sc_hd__tapvpwrvgnd_1". +Reading "sky130_fd_sc_hd__fill_2". +Reading "buff_flash_clkrst". +[INFO]: Wrote /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/signoff/gds_ptrs.mag including GDS pointers. diff --git a/signoff/buff_flash_clkrst/openlane-signoff/22-gdsii.log b/signoff/buff_flash_clkrst/openlane-signoff/22-gdsii.log new file mode 100644 index 00000000..ef4e42f7 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/22-gdsii.log @@ -0,0 +1,67 @@ + +Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022. +Starting magic under Tcl interpreter +Using the terminal as the console. +Using NULL graphics device. +Processing system .magicrc file +Sourcing design .magicrc for technology sky130A ... +2 Magic internal units = 1 Lambda +Input style sky130(vendor): scaleFactor=2, multiplier=2 +The following types are not handled by extraction and will be treated as non-electrical types: + ubm +Scaled tech values by 2 / 1 to match internal grid scaling +Loading sky130A Device Generator Menu ... +Using technology "sky130A", version 1.0.341-2-gde752ec +Reading LEF data from file /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef. +This action cannot be undone. +LEF read, Line 78 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 79 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 112 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring. +LEF read, Line 114 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 115 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 121 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring. +LEF read, Line 122 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring. +LEF read, Line 123 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring. +LEF read, Line 156 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring. +LEF read, Line 164 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 165 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 167 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring. +LEF read, Line 168 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring. +LEF read, Line 169 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring. +LEF read, Line 206 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 207 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 209 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring. +LEF read, Line 210 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring. +LEF read, Line 211 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring. +LEF read, Line 248 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 249 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 251 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring. +LEF read, Line 252 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring. +LEF read, Line 253 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring. +LEF read, Line 290 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 291 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read: Processed 797 lines. +Reading DEF data from file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def. +This action cannot be undone. + Processed 3 vias total. + Processed 73 subcell instances total. + Processed 32 pins total. + Processed 2 special nets total. + Processed 30 nets total. +DEF read: Processed 571 lines. +Root cell box: + width x height ( llx, lly ), ( urx, ury ) area (units^2) + +microns: 40.000 x 25.000 ( 0.000, 0.000), ( 40.000, 25.000) 1000.000 +lambda: 4000.00 x 2500.00 ( 0.00, 0.00 ), ( 4000.00, 2500.00) 10000000.00 +internal: 8000 x 5000 ( 0, 0 ), ( 8000, 5000 ) 40000000 + Generating output for cell sky130_fd_sc_hd__clkbuf_8 + Generating output for cell sky130_fd_sc_hd__decap_4 + Generating output for cell sky130_fd_sc_hd__fill_1 + Generating output for cell sky130_fd_sc_hd__decap_3 + Generating output for cell sky130_fd_sc_hd__decap_8 + Generating output for cell sky130_ef_sc_hd__decap_12 + Generating output for cell sky130_fd_sc_hd__tapvpwrvgnd_1 + Generating output for cell sky130_fd_sc_hd__fill_2 + Generating output for cell buff_flash_clkrst +[INFO]: GDS Write Complete diff --git a/signoff/buff_flash_clkrst/openlane-signoff/22-lef.log b/signoff/buff_flash_clkrst/openlane-signoff/22-lef.log new file mode 100644 index 00000000..95a447b3 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/22-lef.log @@ -0,0 +1,73 @@ + +Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022. +Starting magic under Tcl interpreter +Using the terminal as the console. +Using NULL graphics device. +Processing system .magicrc file +Sourcing design .magicrc for technology sky130A ... +2 Magic internal units = 1 Lambda +Input style sky130(vendor): scaleFactor=2, multiplier=2 +The following types are not handled by extraction and will be treated as non-electrical types: + ubm +Scaled tech values by 2 / 1 to match internal grid scaling +Loading sky130A Device Generator Menu ... +Using technology "sky130A", version 1.0.341-2-gde752ec +Reading LEF data from file /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef. +This action cannot be undone. +LEF read, Line 78 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 79 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 112 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring. +LEF read, Line 114 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 115 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 121 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring. +LEF read, Line 122 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring. +LEF read, Line 123 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring. +LEF read, Line 156 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring. +LEF read, Line 164 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 165 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 167 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring. +LEF read, Line 168 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring. +LEF read, Line 169 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring. +LEF read, Line 206 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 207 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 209 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring. +LEF read, Line 210 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring. +LEF read, Line 211 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring. +LEF read, Line 248 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 249 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read, Line 251 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring. +LEF read, Line 252 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring. +LEF read, Line 253 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring. +LEF read, Line 290 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring. +LEF read, Line 291 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring. +LEF read: Processed 797 lines. +[INFO]: Writing abstract LEF +Generating LEF output /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.lef for cell buff_flash_clkrst: +Diagnostic: Write LEF header for cell buff_flash_clkrst +Diagnostic: Writing LEF output for cell buff_flash_clkrst +Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_8" at bad file path /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/sky130_fd_sc_hd__clkbuf_8.mag. +The cell exists in the search paths at /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkbuf_8.mag. +The discovered version will be used. +Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_4" at bad file path /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/sky130_fd_sc_hd__decap_4.mag. +The cell exists in the search paths at /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_4.mag. +The discovered version will be used. +Warning: Parent cell lists instance of "sky130_fd_sc_hd__fill_1" at bad file path /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/sky130_fd_sc_hd__fill_1.mag. +The cell exists in the search paths at /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__fill_1.mag. +The discovered version will be used. +Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_3" at bad file path /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/sky130_fd_sc_hd__decap_3.mag. +The cell exists in the search paths at /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_3.mag. +The discovered version will be used. +Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_8" at bad file path /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/sky130_fd_sc_hd__decap_8.mag. +The cell exists in the search paths at /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_8.mag. +The discovered version will be used. +Warning: Parent cell lists instance of "sky130_ef_sc_hd__decap_12" at bad file path /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/sky130_ef_sc_hd__decap_12.mag. +The cell exists in the search paths at /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_ef_sc_hd__decap_12.mag. +The discovered version will be used. +Warning: Parent cell lists instance of "sky130_fd_sc_hd__tapvpwrvgnd_1" at bad file path /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/sky130_fd_sc_hd__tapvpwrvgnd_1.mag. +The cell exists in the search paths at /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__tapvpwrvgnd_1.mag. +The discovered version will be used. +Warning: Parent cell lists instance of "sky130_fd_sc_hd__fill_2" at bad file path /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/sky130_fd_sc_hd__fill_2.mag. +The cell exists in the search paths at /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__fill_2.mag. +The discovered version will be used. +Diagnostic: Scale value is 0.005000 +[INFO]: LEF Write Complete diff --git a/signoff/buff_flash_clkrst/openlane-signoff/22-maglef.log b/signoff/buff_flash_clkrst/openlane-signoff/22-maglef.log new file mode 100644 index 00000000..4af53c42 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/22-maglef.log @@ -0,0 +1,18 @@ + +Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022. +Starting magic under Tcl interpreter +Using the terminal as the console. +Using NULL graphics device. +Processing system .magicrc file +Sourcing design .magicrc for technology sky130A ... +2 Magic internal units = 1 Lambda +Input style sky130(vendor): scaleFactor=2, multiplier=2 +The following types are not handled by extraction and will be treated as non-electrical types: + ubm +Scaled tech values by 2 / 1 to match internal grid scaling +Loading sky130A Device Generator Menu ... +Using technology "sky130A", version 1.0.341-2-gde752ec +Reading LEF data from file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.lef. +This action cannot be undone. +LEF read: Processed 335 lines. +[INFO]: DONE GENERATING MAGLEF VIEW diff --git a/signoff/buff_flash_clkrst/openlane-signoff/23-gdsii-klayout.log b/signoff/buff_flash_clkrst/openlane-signoff/23-gdsii-klayout.log new file mode 100644 index 00000000..4f7453bf --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/23-gdsii-klayout.log @@ -0,0 +1,17 @@ + +Input: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +Output: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.klayout.gds +Design: buff_flash_clkrst +Technology File: /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.tech/klayout/tech/sky130A.lyt +GDS File List: ['/home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds'] +LEF File: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef + +[INFO] Clearing cells... +[INFO] Merging GDS files... + /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds +[INFO] Copying toplevel cell 'buff_flash_clkrst' +WARNING: no fill config file specified +[INFO] Checking for missing GDS... +[INFO] All LEF cells have matching GDS cells +[INFO] Writing out GDS '/home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.klayout.gds' +[INFO] Done. diff --git a/signoff/buff_flash_clkrst/openlane-signoff/24-xor.log b/signoff/buff_flash_clkrst/openlane-signoff/24-xor.log new file mode 100644 index 00000000..c6734e42 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/24-xor.log @@ -0,0 +1,652 @@ +First Layout: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.gds +Second Layout: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.klayout.gds +Design Name: buff_flash_clkrst +Output GDS will be: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/reports/signoff/buff_flash_clkrst.xor.xml +Reading /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.gds .. +Reading /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.klayout.gds .. +--- Running XOR for 10/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 96 (flat) 4 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 96 (flat) 4 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 96 +"output" in: xor.drc:40 + Polygons (raw): 96 (flat) 4 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 11/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 32 (flat) 9 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 32 (flat) 9 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 32 +"output" in: xor.drc:40 + Polygons (raw): 32 (flat) 9 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 11/1 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 11/2 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 8 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 8 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 8 +"output" in: xor.drc:40 + Polygons (raw): 8 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 122/16 --- +"input" in: xor.drc:38 + Polygons (raw): 66 (flat) 7 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 66 (flat) 7 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 14/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 1 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 1 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 1 +"output" in: xor.drc:40 + Polygons (raw): 1 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 235/4 --- +"input" in: xor.drc:38 + Polygons (raw): 1 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 1 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 1 +"output" in: xor.drc:40 + Polygons (raw): 1 (flat) 1 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +--- Running XOR for 236/0 --- +"input" in: xor.drc:38 + Polygons (raw): 48 (flat) 5 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 48 (flat) 5 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 3/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 30 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 30 (flat) 1 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +XOR differences: 30 +"output" in: xor.drc:40 + Polygons (raw): 30 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 4/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 30 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 30 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 30 +"output" in: xor.drc:40 + Polygons (raw): 30 (flat) 1 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 5/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 126 (flat) 45 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 126 (flat) 45 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +XOR differences: 126 +"output" in: xor.drc:40 + Polygons (raw): 126 (flat) 45 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 6/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 150 (flat) 6 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 150 (flat) 6 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 150 +"output" in: xor.drc:40 + Polygons (raw): 150 (flat) 6 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 64/16 --- +"input" in: xor.drc:38 + Polygons (raw): 66 (flat) 7 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 66 (flat) 7 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 64/20 --- +"input" in: xor.drc:38 + Polygons (raw): 73 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 73 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 64/5 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 64/59 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +--- Running XOR for 65/20 --- +"input" in: xor.drc:38 + Polygons (raw): 96 (flat) 10 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 96 (flat) 10 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 65/44 --- +"input" in: xor.drc:38 + Polygons (raw): 14 (flat) 2 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 14 (flat) 2 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 66/20 --- +"input" in: xor.drc:38 + Polygons (raw): 96 (flat) 10 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 96 (flat) 10 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 66/44 --- +"input" in: xor.drc:38 + Polygons (raw): 827 (flat) 73 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 827 (flat) 73 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 67/16 --- +"input" in: xor.drc:38 + Polygons (raw): 120 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 120 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 67/20 --- +"input" in: xor.drc:38 + Polygons (raw): 293 (flat) 57 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 263 (flat) 27 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 67/44 --- +"input" in: xor.drc:38 + Polygons (raw): 810 (flat) 114 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 780 (flat) 84 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 30 (flat) 30 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +XOR differences: 30 +"output" in: xor.drc:40 + Polygons (raw): 30 (flat) 30 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 67/5 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 68/16 --- +"input" in: xor.drc:38 + Polygons (raw): 146 (flat) 16 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 146 (flat) 16 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 68/20 --- +"input" in: xor.drc:38 + Polygons (raw): 296 (flat) 166 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 146 (flat) 16 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 33 (flat) 33 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 33 +"output" in: xor.drc:40 + Polygons (raw): 33 (flat) 33 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 68/44 --- +"input" in: xor.drc:38 + Polygons (raw): 150 (flat) 150 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 150 (flat) 150 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 150 +"output" in: xor.drc:40 + Polygons (raw): 150 (flat) 150 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 68/5 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 69/16 --- +"input" in: xor.drc:38 + Polygons (raw): 30 (flat) 30 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 30 (flat) 30 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 30 +"output" in: xor.drc:40 + Polygons (raw): 30 (flat) 30 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 69/20 --- +"input" in: xor.drc:38 + Polygons (raw): 158 (flat) 158 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 158 (flat) 158 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 158 +"output" in: xor.drc:40 + Polygons (raw): 158 (flat) 158 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 69/44 --- +"input" in: xor.drc:38 + Polygons (raw): 96 (flat) 96 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 96 (flat) 96 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 96 +"output" in: xor.drc:40 + Polygons (raw): 96 (flat) 96 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 7/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 165 (flat) 90 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 165 (flat) 90 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 165 +"output" in: xor.drc:40 + Polygons (raw): 165 (flat) 90 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 7/1 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 7/2 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 30 (flat) 30 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 30 (flat) 30 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 30 +"output" in: xor.drc:40 + Polygons (raw): 30 (flat) 30 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 70/20 --- +"input" in: xor.drc:38 + Polygons (raw): 24 (flat) 24 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 24 (flat) 24 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 24 +"output" in: xor.drc:40 + Polygons (raw): 24 (flat) 24 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +--- Running XOR for 70/44 --- +"input" in: xor.drc:38 + Polygons (raw): 96 (flat) 96 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 96 (flat) 96 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 96 +"output" in: xor.drc:40 + Polygons (raw): 96 (flat) 96 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 71/16 --- +"input" in: xor.drc:38 + Polygons (raw): 8 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 8 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 8 +"output" in: xor.drc:40 + Polygons (raw): 8 (flat) 8 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +--- Running XOR for 71/20 --- +"input" in: xor.drc:38 + Polygons (raw): 8 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 8 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 8 +"output" in: xor.drc:40 + Polygons (raw): 8 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 78/44 --- +"input" in: xor.drc:38 + Polygons (raw): 73 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 73 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 8/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 96 (flat) 4 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 96 (flat) 4 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 96 +"output" in: xor.drc:40 + Polygons (raw): 96 (flat) 4 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 81/4 --- +"input" in: xor.drc:38 + Polygons (raw): 73 (flat) 8 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 73 (flat) 8 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 83/44 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 9/0 --- +"input" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 72 (flat) 26 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 72 (flat) 26 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 72 +"output" in: xor.drc:40 + Polygons (raw): 72 (flat) 26 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 93/44 --- +"input" in: xor.drc:38 + Polygons (raw): 80 (flat) 9 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 80 (flat) 9 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.010s Memory: 345.00M +--- Running XOR for 94/20 --- +"input" in: xor.drc:38 + Polygons (raw): 80 (flat) 9 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 80 (flat) 9 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +--- Running XOR for 95/20 --- +"input" in: xor.drc:38 + Polygons (raw): 48 (flat) 5 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"input" in: xor.drc:38 + Polygons (raw): 48 (flat) 5 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +"^" in: xor.drc:38 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +XOR differences: 0 +"output" in: xor.drc:40 + Polygons (raw): 0 (flat) 0 (hierarchical) + Elapsed: 0.000s Memory: 345.00M +Writing report database: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/reports/signoff/buff_flash_clkrst.xor.xml .. +Total elapsed: 0.290s Memory: 345.00M diff --git a/signoff/buff_flash_clkrst/openlane-signoff/25-gds.spice.log b/signoff/buff_flash_clkrst/openlane-signoff/25-gds.spice.log new file mode 100644 index 00000000..fa2b1dbd --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/25-gds.spice.log @@ -0,0 +1,50 @@ + +Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022. +Starting magic under Tcl interpreter +Using the terminal as the console. +Using NULL graphics device. +Processing system .magicrc file +Sourcing design .magicrc for technology sky130A ... +2 Magic internal units = 1 Lambda +Input style sky130(vendor): scaleFactor=2, multiplier=2 +The following types are not handled by extraction and will be treated as non-electrical types: + ubm +Scaled tech values by 2 / 1 to match internal grid scaling +Loading sky130A Device Generator Menu ... +Using technology "sky130A", version 1.0.341-2-gde752ec +Warning: Calma reading is not undoable! I hope that's OK. +Library written using GDS-II Release 3.0 +Library name: buff_flash_clkrst +Reading "sky130_fd_sc_hd__clkbuf_8". +Reading "sky130_fd_sc_hd__decap_4". +Reading "sky130_fd_sc_hd__fill_1". +Reading "sky130_fd_sc_hd__decap_3". +Reading "sky130_fd_sc_hd__decap_8". +Reading "sky130_ef_sc_hd__decap_12". +Reading "sky130_fd_sc_hd__tapvpwrvgnd_1". +Reading "sky130_fd_sc_hd__fill_2". +Reading "buff_flash_clkrst". +Processing sky130_fd_sc_hd__clkbuf_8 +Processing sky130_fd_sc_hd__decap_4 +Processing sky130_fd_sc_hd__fill_1 +Processing sky130_fd_sc_hd__decap_3 +Processing sky130_fd_sc_hd__decap_8 +Processing sky130_ef_sc_hd__decap_12 +Processing sky130_fd_sc_hd__tapvpwrvgnd_1 +Processing sky130_fd_sc_hd__fill_2 +Processing buff_flash_clkrst +Extracting sky130_fd_sc_hd__clkbuf_8 into sky130_fd_sc_hd__clkbuf_8.ext: +Extracting sky130_fd_sc_hd__decap_4 into sky130_fd_sc_hd__decap_4.ext: +sky130_fd_sc_hd__decap_4: 2 warnings +Extracting sky130_fd_sc_hd__fill_1 into sky130_fd_sc_hd__fill_1.ext: +Extracting sky130_fd_sc_hd__decap_3 into sky130_fd_sc_hd__decap_3.ext: +sky130_fd_sc_hd__decap_3: 2 warnings +Extracting sky130_fd_sc_hd__decap_8 into sky130_fd_sc_hd__decap_8.ext: +sky130_fd_sc_hd__decap_8: 2 warnings +Extracting sky130_ef_sc_hd__decap_12 into sky130_ef_sc_hd__decap_12.ext: +sky130_ef_sc_hd__decap_12: 2 warnings +Extracting sky130_fd_sc_hd__tapvpwrvgnd_1 into sky130_fd_sc_hd__tapvpwrvgnd_1.ext: +Extracting sky130_fd_sc_hd__fill_2 into sky130_fd_sc_hd__fill_2.ext: +Extracting buff_flash_clkrst into buff_flash_clkrst.ext: +Total of 8 warnings. +exttospice finished. diff --git a/signoff/buff_flash_clkrst/openlane-signoff/26-write_powered_def.log b/signoff/buff_flash_clkrst/openlane-signoff/26-write_powered_def.log new file mode 100644 index 00000000..ba08cfd3 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/26-write_powered_def.log @@ -0,0 +1,25 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[INFO ODB-0222] Reading LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef +[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later. +The LEF parser will ignore this statement. +To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef at line 930. + +[INFO ODB-0223] Created 13 technology layers +[INFO ODB-0224] Created 25 technology vias +[INFO ODB-0225] Created 441 library cells +[INFO ODB-0226] Finished LEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/merged.nom.lef +[INFO ODB-0127] Reading DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +[INFO ODB-0128] Design: buff_flash_clkrst +[INFO ODB-0130] Created 32 pins. +[INFO ODB-0131] Created 73 components and 308 component-terminals. +[INFO ODB-0132] Created 2 special nets and 278 connections. +[INFO ODB-0133] Created 30 nets and 30 connections. +[INFO ODB-0134] Finished DEF file: /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/routing/buff_flash_clkrst.def +Top-level design name: buff_flash_clkrst +Found default power net 'VPWR' +Found default ground net 'VGND' +Found 1 power ports. +Found 1 ground ports. +Modified power connections of 73/73 cells. diff --git a/signoff/buff_flash_clkrst/openlane-signoff/26-write_powered_verilog.log b/signoff/buff_flash_clkrst/openlane-signoff/26-write_powered_verilog.log new file mode 100644 index 00000000..8ad08ec0 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/26-write_powered_verilog.log @@ -0,0 +1,7 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +Setting global connections for newly added cells... +[WARNING] Did not save OpenROAD database! +Writing netlist to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/signoff/25-buff_flash_clkrst.nl.v... +Writing powered netlist to /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/signoff/25-buff_flash_clkrst.pnl.v... diff --git a/signoff/buff_flash_clkrst/openlane-signoff/28-buff_flash_clkrst.gds.json b/signoff/buff_flash_clkrst/openlane-signoff/28-buff_flash_clkrst.gds.json new file mode 100644 index 00000000..a36686b7 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/28-buff_flash_clkrst.gds.json @@ -0,0 +1,293 @@ +[ + { + "pins": [ + [ + "1", + "2", + "3", + "4" + ], [ + "1", + "2", + "3", + "4" + ] + ] + }, + { + "pins": [ + [ + "1", + "2", + "3", + "4" + ], [ + "1", + "2", + "3", + "4" + ] + ] + }, + { + "name": [ + "sky130_fd_sc_hd__clkbuf_8", + "sky130_fd_sc_hd__clkbuf_8" + ], + "devices": [ + [ + ["sky130_fd_pr__pfet_01v8_hvt", 2], + ["sky130_fd_pr__nfet_01v8", 2 ] + ], [ + ["sky130_fd_pr__pfet_01v8_hvt", 2 ], + ["sky130_fd_pr__nfet_01v8", 2 ] + ] + ], + "nets": [ + 7, + 7 + ], + "badnets": [ + ], + "badelements": [ + ], + "pins": [ + [ + "X", + "VGND", + "VNB", + "A", + "VPWR", + "VPB" + ], [ + "X", + "VGND", + "VNB", + "A", + "VPWR", + "VPB" + ] + ] + }, + { + "pins": [ + [ + "VGND", + "VPWR", + "VNB", + "VPB" + ], [ + "VGND", + "VPWR", + "VNB", + "VPB" + ] + ] + }, + { + "name": [ + "sky130_fd_sc_hd__decap_4", + "sky130_fd_sc_hd__decap_4" + ], + "devices": [ + [ + ["sky130_fd_pr__pfet_01v8_hvt", 1], + ["sky130_fd_pr__nfet_01v8", 1 ] + ], [ + ["sky130_fd_pr__pfet_01v8_hvt", 1 ], + ["sky130_fd_pr__nfet_01v8", 1 ] + ] + ], + "nets": [ + 4, + 4 + ], + "badnets": [ + ], + "badelements": [ + ], + "pins": [ + [ + "VPB", + "VNB", + "VPWR", + "VGND" + ], [ + "VPB", + "VNB", + "VPWR", + "VGND" + ] + ] + }, + { + "name": [ + "sky130_fd_sc_hd__decap_3", + "sky130_fd_sc_hd__decap_3" + ], + "devices": [ + [ + ["sky130_fd_pr__pfet_01v8_hvt", 1], + ["sky130_fd_pr__nfet_01v8", 1 ] + ], [ + ["sky130_fd_pr__pfet_01v8_hvt", 1 ], + ["sky130_fd_pr__nfet_01v8", 1 ] + ] + ], + "nets": [ + 4, + 4 + ], + "badnets": [ + ], + "badelements": [ + ], + "pins": [ + [ + "VPB", + "VNB", + "VPWR", + "VGND" + ], [ + "VPB", + "VNB", + "VPWR", + "VGND" + ] + ] + }, + { + "name": [ + "sky130_fd_sc_hd__decap_8", + "sky130_fd_sc_hd__decap_8" + ], + "devices": [ + [ + ["sky130_fd_pr__pfet_01v8_hvt", 1], + ["sky130_fd_pr__nfet_01v8", 1 ] + ], [ + ["sky130_fd_pr__pfet_01v8_hvt", 1 ], + ["sky130_fd_pr__nfet_01v8", 1 ] + ] + ], + "nets": [ + 4, + 4 + ], + "badnets": [ + ], + "badelements": [ + ], + "pins": [ + [ + "VPB", + "VNB", + "VPWR", + "VGND" + ], [ + "VPB", + "VNB", + "VPWR", + "VGND" + ] + ] + }, + { + "name": [ + "buff_flash_clkrst", + "buff_flash_clkrst" + ], + "devices": [ + [ + ["sky130_fd_sc_hd__clkbuf_8", 15], + ["sky130_ef_sc_hd__decap_12", 1], + ["sky130_fd_sc_hd__decap_4", 1], + ["sky130_fd_sc_hd__decap_3", 1], + ["sky130_fd_sc_hd__decap_8", 1 ] + ], [ + ["sky130_fd_sc_hd__clkbuf_8", 15 ], + ["sky130_ef_sc_hd__decap_12", 1 ], + ["sky130_fd_sc_hd__decap_4", 1 ], + ["sky130_fd_sc_hd__decap_3", 1 ], + ["sky130_fd_sc_hd__decap_8", 1 ] + ] + ], + "nets": [ + 32, + 32 + ], + "badnets": [ + ], + "badelements": [ + ], + "pins": [ + [ + "VGND", + "VPWR", + "in_n[4]", + "in_n[9]", + "in_n[11]", + "in_n[6]", + "in_s[0]", + "in_s[2]", + "in_n[1]", + "in_n[8]", + "in_n[3]", + "in_n[5]", + "in_n[10]", + "in_s[1]", + "in_n[0]", + "in_n[2]", + "in_n[7]", + "out_s[4]", + "out_s[9]", + "out_s[11]", + "out_s[6]", + "out_n[0]", + "out_n[2]", + "out_s[1]", + "out_s[8]", + "out_s[3]", + "out_s[5]", + "out_s[10]", + "out_n[1]", + "out_s[0]", + "out_s[2]", + "out_s[7]" + ], [ + "VGND", + "VPWR", + "in_n[4]", + "in_n[9]", + "in_n[11]", + "in_n[6]", + "in_s[0]", + "in_s[2]", + "in_n[1]", + "in_n[8]", + "in_n[3]", + "in_n[5]", + "in_n[10]", + "in_s[1]", + "in_n[0]", + "in_n[2]", + "in_n[7]", + "out_s[4]", + "out_s[9]", + "out_s[11]", + "out_s[6]", + "out_n[0]", + "out_n[2]", + "out_s[1]", + "out_s[8]", + "out_s[3]", + "out_s[5]", + "out_s[10]", + "out_n[1]", + "out_s[0]", + "out_s[2]", + "out_s[7]" + ] + ] + } +] diff --git a/signoff/buff_flash_clkrst/openlane-signoff/28-buff_flash_clkrst.gds.log b/signoff/buff_flash_clkrst/openlane-signoff/28-buff_flash_clkrst.gds.log new file mode 100644 index 00000000..0a843e53 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/28-buff_flash_clkrst.gds.log @@ -0,0 +1,3 @@ +LVS reports no net, device, pin, or property mismatches. + +Total errors = 0 diff --git a/signoff/buff_flash_clkrst/openlane-signoff/28-lvs.gds.log b/signoff/buff_flash_clkrst/openlane-signoff/28-lvs.gds.log new file mode 100644 index 00000000..545e7bfc --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/28-lvs.gds.log @@ -0,0 +1,205 @@ +Netgen 1.5.234 compiled on Sun Oct 9 10:24:01 UTC 2022 +Warning: netgen command 'format' use fully-qualified name '::netgen::format' +Warning: netgen command 'global' use fully-qualified name '::netgen::global' +Reading spice netlist file /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice +Call to undefined subcircuit sky130_fd_pr__pfet_01v8_hvt +Creating placeholder cell definition. +Call to undefined subcircuit sky130_fd_pr__nfet_01v8 +Creating placeholder cell definition. +Call to undefined subcircuit sky130_fd_sc_hd__nand2_2 +Creating placeholder cell definition. +Call to undefined subcircuit sky130_fd_sc_hd__nor2_2 +Creating placeholder cell definition. +Generating JSON file result +Reading netlist file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.gds.spice +Call to undefined subcircuit sky130_fd_pr__pfet_01v8_hvt +Creating placeholder cell definition. +Call to undefined subcircuit sky130_fd_pr__nfet_01v8 +Creating placeholder cell definition. +Reading netlist file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/tmp/signoff/25-buff_flash_clkrst.pnl.v +Warning: A case-insensitive file has been read and so the verilog file must be treated case-insensitive to match. +Creating placeholder cell definition for module sky130_ef_sc_hd__decap_12. +Reading setup file /home/hosni/OL_LATEST/OpenLane/pdks/sky130A/libs.tech/netgen/sky130A_setup.tcl +Model sky130_fd_pr__res_generic_po pin end_a == end_b +No property mult found for device sky130_fd_pr__res_generic_po +Model sky130_fd_pr__nfet_01v8 pin 1 == 3 +No property mult found for device sky130_fd_pr__nfet_01v8 +No property sa found for device sky130_fd_pr__nfet_01v8 +No property sb found for device sky130_fd_pr__nfet_01v8 +No property sd found for device sky130_fd_pr__nfet_01v8 +No property nf found for device sky130_fd_pr__nfet_01v8 +No property nrd found for device sky130_fd_pr__nfet_01v8 +No property nrs found for device sky130_fd_pr__nfet_01v8 +No property area found for device sky130_fd_pr__nfet_01v8 +No property perim found for device sky130_fd_pr__nfet_01v8 +No property topography found for device sky130_fd_pr__nfet_01v8 +Model sky130_fd_pr__nfet_01v8 pin 1 == 3 +No property as found for device sky130_fd_pr__nfet_01v8 +No property ad found for device sky130_fd_pr__nfet_01v8 +No property ps found for device sky130_fd_pr__nfet_01v8 +No property pd found for device sky130_fd_pr__nfet_01v8 +No property mult found for device sky130_fd_pr__nfet_01v8 +No property sa found for device sky130_fd_pr__nfet_01v8 +No property sb found for device sky130_fd_pr__nfet_01v8 +No property sd found for device sky130_fd_pr__nfet_01v8 +No property nf found for device sky130_fd_pr__nfet_01v8 +No property nrd found for device sky130_fd_pr__nfet_01v8 +No property nrs found for device sky130_fd_pr__nfet_01v8 +No property area found for device sky130_fd_pr__nfet_01v8 +No property perim found for device sky130_fd_pr__nfet_01v8 +No property topography found for device sky130_fd_pr__nfet_01v8 +Model sky130_fd_pr__pfet_01v8_hvt pin 1 == 3 +No property mult found for device sky130_fd_pr__pfet_01v8_hvt +No property sa found for device sky130_fd_pr__pfet_01v8_hvt +No property sb found for device sky130_fd_pr__pfet_01v8_hvt +No property sd found for device sky130_fd_pr__pfet_01v8_hvt +No property nf found for device sky130_fd_pr__pfet_01v8_hvt +No property nrd found for device sky130_fd_pr__pfet_01v8_hvt +No property nrs found for device sky130_fd_pr__pfet_01v8_hvt +No property area found for device sky130_fd_pr__pfet_01v8_hvt +No property perim found for device sky130_fd_pr__pfet_01v8_hvt +No property topography found for device sky130_fd_pr__pfet_01v8_hvt +Model sky130_fd_pr__pfet_01v8_hvt pin 1 == 3 +No property as found for device sky130_fd_pr__pfet_01v8_hvt +No property ad found for device sky130_fd_pr__pfet_01v8_hvt +No property ps found for device sky130_fd_pr__pfet_01v8_hvt +No property pd found for device sky130_fd_pr__pfet_01v8_hvt +No property mult found for device sky130_fd_pr__pfet_01v8_hvt +No property sa found for device sky130_fd_pr__pfet_01v8_hvt +No property sb found for device sky130_fd_pr__pfet_01v8_hvt +No property sd found for device sky130_fd_pr__pfet_01v8_hvt +No property nf found for device sky130_fd_pr__pfet_01v8_hvt +No property nrd found for device sky130_fd_pr__pfet_01v8_hvt +No property nrs found for device sky130_fd_pr__pfet_01v8_hvt +No property area found for device sky130_fd_pr__pfet_01v8_hvt +No property perim found for device sky130_fd_pr__pfet_01v8_hvt +No property topography found for device sky130_fd_pr__pfet_01v8_hvt +No property value found for device sky130_fd_pr__diode_pw2nd_05v5 +No property mult found for device sky130_fd_pr__diode_pw2nd_05v5 +No property perim found for device sky130_fd_pr__diode_pw2nd_05v5 +Comparison output logged to file /home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/logs/signoff/28-buff_flash_clkrst.gds.log +Logging to file "/home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/logs/signoff/28-buff_flash_clkrst.gds.log" enabled +Circuit sky130_fd_pr__pfet_01v8_hvt contains no devices. +Circuit sky130_fd_pr__nfet_01v8 contains no devices. + +Contents of circuit 1: Circuit: 'sky130_fd_sc_hd__clkbuf_8' +Circuit sky130_fd_sc_hd__clkbuf_8 contains 20 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 10 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 10 +Circuit contains 7 nets. +Contents of circuit 2: Circuit: 'sky130_fd_sc_hd__clkbuf_8' +Circuit sky130_fd_sc_hd__clkbuf_8 contains 20 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 10 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 10 +Circuit contains 7 nets. + +Circuit was modified by parallel/series device merging. +New circuit summary: + +Contents of circuit 1: Circuit: 'sky130_fd_sc_hd__clkbuf_8' +Circuit sky130_fd_sc_hd__clkbuf_8 contains 4 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 2 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 2 +Circuit contains 7 nets. +Contents of circuit 2: Circuit: 'sky130_fd_sc_hd__clkbuf_8' +Circuit sky130_fd_sc_hd__clkbuf_8 contains 4 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 2 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 2 +Circuit contains 7 nets. + +Circuit 1 contains 4 devices, Circuit 2 contains 4 devices. +Circuit 1 contains 7 nets, Circuit 2 contains 7 nets. + +Circuit sky130_ef_sc_hd__decap_12 contains no devices. + +Contents of circuit 1: Circuit: 'sky130_fd_sc_hd__decap_4' +Circuit sky130_fd_sc_hd__decap_4 contains 2 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 1 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 1 +Circuit contains 4 nets. +Contents of circuit 2: Circuit: 'sky130_fd_sc_hd__decap_4' +Circuit sky130_fd_sc_hd__decap_4 contains 2 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 1 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 1 +Circuit contains 4 nets. + +Circuit 1 contains 2 devices, Circuit 2 contains 2 devices. +Circuit 1 contains 4 nets, Circuit 2 contains 4 nets. + + +Contents of circuit 1: Circuit: 'sky130_fd_sc_hd__decap_3' +Circuit sky130_fd_sc_hd__decap_3 contains 2 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 1 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 1 +Circuit contains 4 nets. +Contents of circuit 2: Circuit: 'sky130_fd_sc_hd__decap_3' +Circuit sky130_fd_sc_hd__decap_3 contains 2 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 1 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 1 +Circuit contains 4 nets. + +Circuit 1 contains 2 devices, Circuit 2 contains 2 devices. +Circuit 1 contains 4 nets, Circuit 2 contains 4 nets. + + +Contents of circuit 1: Circuit: 'sky130_fd_sc_hd__decap_8' +Circuit sky130_fd_sc_hd__decap_8 contains 2 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 1 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 1 +Circuit contains 4 nets. +Contents of circuit 2: Circuit: 'sky130_fd_sc_hd__decap_8' +Circuit sky130_fd_sc_hd__decap_8 contains 2 device instances. + Class: sky130_fd_pr__nfet_01v8 instances: 1 + Class: sky130_fd_pr__pfet_01v8_hvt instances: 1 +Circuit contains 4 nets. + +Circuit 1 contains 2 devices, Circuit 2 contains 2 devices. +Circuit 1 contains 4 nets, Circuit 2 contains 4 nets. + + +Contents of circuit 1: Circuit: 'buff_flash_clkrst' +Circuit buff_flash_clkrst contains 48 device instances. + Class: sky130_ef_sc_hd__decap_12 instances: 7 + Class: sky130_fd_sc_hd__clkbuf_8 instances: 15 + Class: sky130_fd_sc_hd__decap_3 instances: 12 + Class: sky130_fd_sc_hd__decap_4 instances: 10 + Class: sky130_fd_sc_hd__decap_8 instances: 4 +Circuit contains 32 nets. +Contents of circuit 2: Circuit: 'buff_flash_clkrst' +Circuit buff_flash_clkrst contains 48 device instances. + Class: sky130_ef_sc_hd__decap_12 instances: 7 + Class: sky130_fd_sc_hd__clkbuf_8 instances: 15 + Class: sky130_fd_sc_hd__decap_3 instances: 12 + Class: sky130_fd_sc_hd__decap_4 instances: 10 + Class: sky130_fd_sc_hd__decap_8 instances: 4 +Circuit contains 32 nets. + +Circuit was modified by parallel/series device merging. +New circuit summary: + +Contents of circuit 1: Circuit: 'buff_flash_clkrst' +Circuit buff_flash_clkrst contains 19 device instances. + Class: sky130_ef_sc_hd__decap_12 instances: 1 + Class: sky130_fd_sc_hd__clkbuf_8 instances: 15 + Class: sky130_fd_sc_hd__decap_3 instances: 1 + Class: sky130_fd_sc_hd__decap_4 instances: 1 + Class: sky130_fd_sc_hd__decap_8 instances: 1 +Circuit contains 32 nets. +Contents of circuit 2: Circuit: 'buff_flash_clkrst' +Circuit buff_flash_clkrst contains 19 device instances. + Class: sky130_ef_sc_hd__decap_12 instances: 1 + Class: sky130_fd_sc_hd__clkbuf_8 instances: 15 + Class: sky130_fd_sc_hd__decap_3 instances: 1 + Class: sky130_fd_sc_hd__decap_4 instances: 1 + Class: sky130_fd_sc_hd__decap_8 instances: 1 +Circuit contains 32 nets. + +Circuit 1 contains 19 devices, Circuit 2 contains 19 devices. +Circuit 1 contains 32 nets, Circuit 2 contains 32 nets. + + +Final result: +Circuits match uniquely. +. +Logging to file "/home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/logs/signoff/28-buff_flash_clkrst.gds.log" disabled +LVS Done. diff --git a/signoff/buff_flash_clkrst/openlane-signoff/29-drc.log b/signoff/buff_flash_clkrst/openlane-signoff/29-drc.log new file mode 100644 index 00000000..05c67141 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/29-drc.log @@ -0,0 +1,36 @@ + +Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022. +Starting magic under Tcl interpreter +Using the terminal as the console. +Using NULL graphics device. +Processing system .magicrc file +Sourcing design .magicrc for technology sky130A ... +2 Magic internal units = 1 Lambda +Input style sky130(vendor): scaleFactor=2, multiplier=2 +The following types are not handled by extraction and will be treated as non-electrical types: + ubm +Scaled tech values by 2 / 1 to match internal grid scaling +Loading sky130A Device Generator Menu ... +Using technology "sky130A", version 1.0.341-2-gde752ec +Warning: Calma reading is not undoable! I hope that's OK. +Library written using GDS-II Release 3.0 +Library name: buff_flash_clkrst +Reading "sky130_fd_sc_hd__clkbuf_8". +Reading "sky130_fd_sc_hd__decap_4". +Reading "sky130_fd_sc_hd__fill_1". +Reading "sky130_fd_sc_hd__decap_3". +Reading "sky130_fd_sc_hd__decap_8". +Reading "sky130_ef_sc_hd__decap_12". +Reading "sky130_fd_sc_hd__tapvpwrvgnd_1". +Reading "sky130_fd_sc_hd__fill_2". +Reading "buff_flash_clkrst". +[INFO]: Loading buff_flash_clkrst + +DRC style is now "drc(full)" +Loading DRC CIF style. +No errors found. +[INFO]: COUNT: 0 +[INFO]: Should be divided by 3 or 4 +[INFO]: DRC Checking DONE (/home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/reports/signoff/drc.rpt) +[INFO]: Saving mag view with DRC errors (/home/hosni/My_forks/FINAL/caravel/openlane/buff_flash_clkrst/runs/22_10_13_10_28/results/signoff/buff_flash_clkrst.drc.mag) +[INFO]: Saved diff --git a/signoff/buff_flash_clkrst/openlane-signoff/30-antenna.log b/signoff/buff_flash_clkrst/openlane-signoff/30-antenna.log new file mode 100644 index 00000000..63a81b8a --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/30-antenna.log @@ -0,0 +1,5 @@ +OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e +This program is licensed under the BSD-3 license. See the LICENSE file for details. +Components of this program may be licensed under more restrictive licenses which must be honored. +[INFO ANT-0002] Found 0 net violations. +[INFO ANT-0001] Found 0 pin violations. diff --git a/signoff/buff_flash_clkrst/openlane-signoff/sdf/max/buff_flash_clkrst.ff.sdf b/signoff/buff_flash_clkrst/openlane-signoff/sdf/max/buff_flash_clkrst.ff.sdf new file mode 100644 index 00000000..56daec0d --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/sdf/max/buff_flash_clkrst.ff.sdf @@ -0,0 +1,186 @@ +(DELAYFILE + (SDFVERSION "3.0") + (DESIGN "buff_flash_clkrst") + (DATE "Thu Oct 13 17:29:04 2022") + (VENDOR "Parallax") + (PROGRAM "STA") + (VERSION "2.3.1") + (DIVIDER .) + (VOLTAGE 1.600::1.600) + (PROCESS "1.000::1.000") + (TEMPERATURE 100.000::100.000) + (TIMESCALE 1ns) + (CELL + (CELLTYPE "buff_flash_clkrst") + (INSTANCE) + (DELAY + (ABSOLUTE + (INTERCONNECT in_n[0] BUF\[3\].A (0.013:0.013:0.013) (0.004:0.004:0.004)) + (INTERCONNECT in_n[10] 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sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[3] 0.000385083 +2 *44:A 0.000385083 +3 *44:A *9:9 0 +4 *7:10 *44:A 0 +*RES +1 in_n[3] *44:A 45.8093 +*END + +*D_NET *9 0.00142628 +*CONN +*P in_n[4] I +*I *45:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[4] 0.000615049 +2 *45:A 0 +3 *9:9 0.000615049 +4 *9:9 out_s[3] 0.000196178 +5 *9:9 *46:A 0 +6 *44:A *9:9 0 +*RES +1 in_n[4] *9:9 28.4436 +2 *9:9 *45:A 23 +*END + +*D_NET *10 0.00113314 +*CONN +*P in_n[5] I +*I *46:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[5] 0.000566572 +2 *46:A 0.000566572 +3 *9:9 *46:A 0 +*RES +1 in_n[5] *46:A 49.3307 +*END + +*D_NET *11 0.00188726 +*CONN +*P in_n[6] I +*I *47:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[6] 0.00049832 +2 *47:A 0 +3 *11:10 0.00049832 +4 *11:10 *12:8 0.000748939 +5 *11:10 *29:7 0.000141677 +*RES +1 in_n[6] *11:10 28.3814 +2 *11:10 *47:A 23 +*END + +*D_NET *12 0.00204954 +*CONN +*P in_n[7] I +*I *34:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[7] 0.000567827 +2 *34:A 0 +3 *12:8 0.000567827 +4 *12:8 out_s[6] 3.67805e-05 +5 *12:8 out_s[8] 0 +6 *12:8 *35:A 0 +7 *12:8 *30:7 0.000128169 +8 *11:10 *12:8 0.000748939 +*RES +1 in_n[7] *12:8 29.3964 +2 *12:8 *34:A 23 +*END + +*D_NET *13 0.000912246 +*CONN +*P in_n[8] I +*I *35:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[8] 0.000453036 +2 *35:A 0.000453036 +3 *35:A *14:10 0 +4 *35:A *31:7 6.17437e-06 +5 *12:8 *35:A 0 +*RES +1 in_n[8] *35:A 46.5757 +*END + +*D_NET *14 0.00209477 +*CONN +*P in_n[9] I +*I *36:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[9] 0.000902356 +2 *36:A 0 +3 *14:10 0.000902356 +4 *14:10 out_s[10] 0 +5 *14:10 *23:7 0.000103447 +6 *35:A *14:10 0 +7 *37:A *14:10 0 +8 *5:16 *14:10 0.000186606 +*RES +1 in_n[9] *14:10 33.0629 +2 *14:10 *36:A 23 +*END + +*D_NET *15 0.000609775 +*CONN +*P in_s[0] I +*I *33:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[0] 0.000254485 +2 *33:A 0.000254485 +3 *33:A *16:12 0 +4 *33:A *18:7 0.000100805 +*RES +1 in_s[0] *33:A 42.7643 +*END + +*D_NET *16 0.00215843 +*CONN +*P in_s[1] I +*I *39:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[1] 0.000669693 +2 *39:A 0 +3 *16:12 0.000669693 +4 *16:12 out_n[0] 0.000819045 +5 *16:12 out_n[2] 0 +6 *16:12 *40:A 0 +7 *33:A *16:12 0 +*RES +1 in_s[1] *16:12 30.8464 +2 *16:12 *39:A 23 +*END + +*D_NET *17 0.000791768 +*CONN +*P in_s[2] I +*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[2] 0.000395884 +2 *40:A 0.000395884 +3 *40:A out_s[0] 0 +4 *16:12 *40:A 0 +*RES +1 in_s[2] *40:A 45.3329 +*END + +*D_NET *18 0.00275982 +*CONN +*P out_n[0] O +*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[0] 0.000649033 +2 *33:X 0.000270953 +3 *18:7 0.000919986 +4 out_n[0] out_n[1] 0 +5 out_n[0] out_n[2] 0 +6 *33:A *18:7 0.000100805 +7 *16:12 out_n[0] 0.000819045 +*RES +1 *33:X *18:7 42.9093 +2 *18:7 out_n[0] 16.4886 +*END + +*D_NET *19 0.000996874 +*CONN +*P out_n[1] O +*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[1] 0.000351055 +2 *39:X 0.000351055 +3 out_n[1] out_n[2] 0.000294763 +4 out_n[0] out_n[1] 0 +*RES +1 *39:X out_n[1] 45.395 +*END + +*D_NET *20 0.00183616 +*CONN +*P out_n[2] O +*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[2] 0.000507504 +2 *40:X 0.000180283 +3 *20:7 0.000687787 +4 out_n[2] out_s[0] 0 +5 out_n[0] out_n[2] 0 +6 out_n[1] out_n[2] 0.000294763 +7 *41:A out_n[2] 0.000165819 +8 *16:12 out_n[2] 0 +*RES +1 *40:X *20:7 40.5271 +2 *20:7 out_n[2] 12.4907 +*END + +*D_NET *21 0.00163663 +*CONN +*P out_s[0] O +*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[0] 0.000548786 +2 *41:X 6.80678e-05 +3 *21:7 0.000616853 +4 out_s[0] out_s[1] 0.00032632 +5 out_s[0] out_s[2] 0 +6 out_n[2] out_s[0] 0 +7 *40:A out_s[0] 0 +8 *42:A out_s[0] 7.66085e-05 +9 *7:10 out_s[0] 0 +*RES +1 *41:X *21:7 39.0979 +2 *21:7 out_s[0] 14.935 +*END + +*D_NET *22 0.0022753 +*CONN +*P out_s[10] O +*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[10] 0.000810796 +2 *37:X 0.000298189 +3 *22:9 0.00110899 +4 out_s[10] out_s[11] 0 +5 out_s[10] out_s[9] 0 +6 *37:A *22:9 5.73288e-05 +7 *5:16 out_s[10] 0 +8 *14:10 out_s[10] 0 +*RES +1 *37:X *22:9 42.93 +2 *22:9 out_s[10] 14.3964 +*END + +*D_NET *23 0.00285697 +*CONN +*P out_s[11] O +*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[11] 0.000131317 +2 *38:X 0.00101936 +3 *23:7 0.00115068 +4 *23:7 out_s[9] 0.000140259 +5 out_s[10] out_s[11] 0 +6 *5:16 *23:7 0.000311915 +7 *14:10 *23:7 0.000103447 +*RES +1 *38:X *23:7 37.4586 +2 *23:7 out_s[11] 17.3614 +*END + +*D_NET *24 0.00157731 +*CONN +*P out_s[1] O +*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[1] 0.00047529 +2 *42:X 0.00047529 +3 out_s[1] out_s[2] 0.000230031 +4 out_s[1] out_s[3] 0 +5 out_s[0] out_s[1] 0.00032632 +6 *7:10 out_s[1] 7.03766e-05 +*RES +1 *42:X out_s[1] 49.8279 +*END + +*D_NET *25 0.00106966 +*CONN +*P out_s[2] O +*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[2] 0.000416727 +2 *43:X 0.000416727 +3 out_s[2] out_s[3] 0 +4 out_s[0] out_s[2] 0 +5 out_s[1] out_s[2] 0.000230031 +6 *7:10 out_s[2] 6.17437e-06 +*RES +1 *43:X out_s[2] 48.875 +*END + +*D_NET *26 0.00157855 +*CONN +*P out_s[3] O +*I *44:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[3] 0.000532775 +2 *44:X 0.000158411 +3 *26:7 0.000691186 +4 out_s[3] out_s[4] 0 +5 out_s[3] out_s[5] 0 +6 out_s[1] out_s[3] 0 +7 out_s[2] out_s[3] 0 +8 *9:9 out_s[3] 0.000196178 +*RES +1 *44:X *26:7 40.5271 +2 *26:7 out_s[3] 11.5171 +*END + +*D_NET *27 0.000935888 +*CONN +*P out_s[4] O +*I *45:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[4] 0.0004112 +2 *45:X 0.0004112 +3 out_s[4] out_s[5] 0.000113488 +4 out_s[3] out_s[4] 0 +*RES +1 *45:X out_s[4] 46.7 +*END + +*D_NET *28 0.00124869 +*CONN +*P out_s[5] O +*I *46:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[5] 0.000567599 +2 *46:X 0.000567599 +3 out_s[5] out_s[6] 0 +4 out_s[3] out_s[5] 0 +5 out_s[4] out_s[5] 0.000113488 +*RES +1 *46:X out_s[5] 48.875 +*END + +*D_NET *29 0.00207606 +*CONN +*P out_s[6] O +*I *47:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[6] 0.000503989 +2 *47:X 0.000404635 +3 *29:7 0.000908623 +4 out_s[6] out_s[7] 8.03508e-05 +5 out_s[5] out_s[6] 0 +6 *11:10 *29:7 0.000141677 +7 *12:8 out_s[6] 3.67805e-05 +*RES +1 *47:X *29:7 44.3386 +2 *29:7 out_s[6] 9.59071 +*END + +*D_NET *30 0.0014735 +*CONN +*P out_s[7] O +*I *34:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[7] 0.00028451 +2 *34:X 0.00034798 +3 *30:7 0.00063249 +4 out_s[7] out_s[8] 0 +5 out_s[6] out_s[7] 8.03508e-05 +6 *12:8 *30:7 0.000128169 +*RES +1 *34:X *30:7 44.3386 +2 *30:7 out_s[7] 5.88286 +*END + +*D_NET *31 0.00179676 +*CONN +*P out_s[8] O +*I *35:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[8] 0.000680814 +2 *35:X 0.000193091 +3 *31:7 0.000873905 +4 out_s[8] out_s[9] 4.27783e-05 +5 out_s[7] out_s[8] 0 +6 *35:A *31:7 6.17437e-06 +7 *12:8 out_s[8] 0 +*RES +1 *35:X *31:7 41.0036 +2 *31:7 out_s[8] 12.76 +*END + +*D_NET *32 0.000667532 +*CONN +*P out_s[9] O +*I *36:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[9] 0.000172118 +2 *36:X 0.000172118 +3 out_s[10] out_s[9] 0 +4 out_s[8] out_s[9] 4.27783e-05 +5 *5:16 out_s[9] 0.000140259 +6 *23:7 out_s[9] 0.000140259 +*RES +1 *36:X out_s[9] 42.2879 +*END diff --git a/signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.min.spef b/signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.min.spef new file mode 100644 index 00000000..1fd93639 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.min.spef @@ -0,0 +1,587 @@ +*SPEF "ieee 1481-1999" +*DESIGN "buff_flash_clkrst" +*DATE "11:11:11 Fri 11 11, 1111" +*VENDOR "OpenRCX" +*PROGRAM "Parallel Extraction" +*VERSION "1.0" +*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE" +*DIVIDER / +*DELIMITER : +*BUS_DELIMITER [] +*T_UNIT 1 NS +*C_UNIT 1 PF +*R_UNIT 1 OHM +*L_UNIT 1 HENRY + +*NAME_MAP +*3 in_n[0] +*4 in_n[10] +*5 in_n[11] +*6 in_n[1] +*7 in_n[2] +*8 in_n[3] +*9 in_n[4] +*10 in_n[5] +*11 in_n[6] +*12 in_n[7] +*13 in_n[8] +*14 in_n[9] +*15 in_s[0] +*16 in_s[1] +*17 in_s[2] +*18 out_n[0] +*19 out_n[1] +*20 out_n[2] +*21 out_s[0] +*22 out_s[10] +*23 out_s[11] +*24 out_s[1] +*25 out_s[2] +*26 out_s[3] +*27 out_s[4] +*28 out_s[5] +*29 out_s[6] +*30 out_s[7] +*31 out_s[8] +*32 out_s[9] +*33 BUF\[0\] +*34 BUF\[10\] +*35 BUF\[11\] +*36 BUF\[12\] +*37 BUF\[13\] +*38 BUF\[14\] +*39 BUF\[1\] +*40 BUF\[2\] +*41 BUF\[3\] +*42 BUF\[4\] +*43 BUF\[5\] +*44 BUF\[6\] +*45 BUF\[7\] +*46 BUF\[8\] +*47 BUF\[9\] +*48 FILLER_0_19 +*49 FILLER_0_27 +*50 FILLER_0_29 +*51 FILLER_0_3 +*52 FILLER_0_41 +*53 FILLER_0_54 +*54 FILLER_0_57 +*55 FILLER_0_7 +*56 FILLER_0_70 +*57 FILLER_0_74 +*58 FILLER_1_17 +*59 FILLER_1_3 +*60 FILLER_1_32 +*61 FILLER_1_47 +*62 FILLER_1_55 +*63 FILLER_1_57 +*64 FILLER_1_70 +*65 FILLER_1_74 +*66 FILLER_2_26 +*67 FILLER_2_29 +*68 FILLER_2_3 +*69 FILLER_2_52 +*70 FILLER_2_67 +*71 FILLER_3_15 +*72 FILLER_3_27 +*73 FILLER_3_3 +*74 FILLER_3_42 +*75 FILLER_3_54 +*76 FILLER_3_57 +*77 FILLER_3_70 +*78 FILLER_3_74 +*79 FILLER_4_19 +*80 FILLER_4_27 +*81 FILLER_4_29 +*82 FILLER_4_3 +*83 FILLER_4_41 +*84 FILLER_4_53 +*85 FILLER_4_57 +*86 FILLER_4_7 +*87 FILLER_4_70 +*88 FILLER_4_74 +*89 PHY_0 +*90 PHY_1 +*91 PHY_2 +*92 PHY_3 +*93 PHY_4 +*94 PHY_5 +*95 PHY_6 +*96 PHY_7 +*97 PHY_8 +*98 PHY_9 +*99 TAP_10 +*100 TAP_11 +*101 TAP_12 +*102 TAP_13 +*103 TAP_14 +*104 TAP_15 +*105 TAP_16 + +*PORTS +in_n[0] I +in_n[10] I +in_n[11] I +in_n[1] I +in_n[2] I +in_n[3] I +in_n[4] I +in_n[5] I +in_n[6] I +in_n[7] I +in_n[8] I +in_n[9] I +in_s[0] I +in_s[1] I +in_s[2] I +out_n[0] O +out_n[1] O +out_n[2] O +out_s[0] O +out_s[10] O +out_s[11] O +out_s[1] O +out_s[2] O +out_s[3] O +out_s[4] O +out_s[5] O +out_s[6] O +out_s[7] O +out_s[8] O +out_s[9] O + +*D_NET *3 0.000698578 +*CONN +*P in_n[0] I +*I *41:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[0] 0.000265612 +2 *41:A 0.000265612 +3 *41:A out_n[2] 0.000167353 +4 *41:A *42:A 0 +*RES +1 in_n[0] *41:A 9.255 +*END + +*D_NET *4 0.000496833 +*CONN +*P in_n[10] I +*I *37:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[10] 0.000223693 +2 *37:A 0.000223693 +3 *37:A out_s[10] 4.94474e-05 +4 *37:A *36:A 0 +5 *37:A *38:A 0 +*RES +1 in_n[10] *37:A 7.59 +*END + +*D_NET *5 0.00265835 +*CONN +*P in_n[11] I +*I *38:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[11] 0.0010441 +2 *38:A 0.0010441 +3 *38:A out_s[10] 0 +4 *38:A out_s[11] 0.000287765 +5 *38:A out_s[9] 0.000123225 +6 *38:A *36:A 0.000159156 +7 *37:A *38:A 0 +*RES +1 in_n[11] *38:A 23.025 +*END + +*D_NET *6 0.00123947 +*CONN +*P in_n[1] I +*I *42:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[1] 0.000265945 +2 *42:A 0.000265945 +3 *42:A out_s[0] 7.75325e-05 +4 *42:A *43:A 0.000630049 +5 *41:A *42:A 0 +*RES +1 in_n[1] *42:A 11.115 +*END + +*D_NET *7 0.00183936 +*CONN +*P in_n[2] I +*I *43:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[2] 0.000568975 +2 *43:A 0.000568975 +3 *43:A out_s[0] 0 +4 *43:A out_s[1] 6.55328e-05 +5 *43:A out_s[2] 5.83121e-06 +6 *43:A *44:A 0 +7 *42:A *43:A 0.000630049 +*RES +1 in_n[2] *43:A 15.165 +*END + +*D_NET *8 0.000671935 +*CONN +*P in_n[3] I +*I *44:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[3] 0.000335968 +2 *44:A 0.000335968 +3 *44:A *45:A 0 +4 *43:A *44:A 0 +*RES +1 in_n[3] *44:A 9.255 +*END + +*D_NET *9 0.00122617 +*CONN +*P in_n[4] I +*I *45:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[4] 0.00052251 +2 *45:A 0.00052251 +3 *45:A out_s[3] 0.000181152 +4 *45:A *46:A 0 +5 *44:A *45:A 0 +*RES +1 in_n[4] *45:A 13.335 +*END + +*D_NET *10 0.000985911 +*CONN +*P in_n[5] I +*I *46:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[5] 0.000492956 +2 *46:A 0.000492956 +3 *45:A *46:A 0 +*RES +1 in_n[5] *46:A 11.805 +*END + +*D_NET *11 0.00156745 +*CONN +*P in_n[6] I +*I *47:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[6] 0.000410161 +2 *47:A 0.000410161 +3 *47:A out_s[6] 0.00012349 +4 *47:A *34:A 0.000623638 +*RES +1 in_n[6] *47:A 13.29 +*END + +*D_NET *12 0.00169542 +*CONN +*P in_n[7] I +*I *34:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[7] 0.000457718 +2 *34:A 0.000457718 +3 *34:A out_s[6] 4.04613e-05 +4 *34:A out_s[7] 0.000115886 +5 *34:A out_s[8] 0 +6 *34:A *35:A 0 +7 *47:A *34:A 0.000623638 +*RES +1 in_n[7] *34:A 14.025 +*END + +*D_NET *13 0.000773264 +*CONN +*P in_n[8] I +*I *35:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[8] 0.000383717 +2 *35:A 0.000383717 +3 *35:A out_s[8] 5.83121e-06 +4 *35:A *36:A 0 +5 *34:A *35:A 0 +*RES +1 in_n[8] *35:A 9.81 +*END + +*D_NET *14 0.00175178 +*CONN +*P in_n[9] I +*I *36:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[9] 0.00074955 +2 *36:A 0.00074955 +3 *36:A out_s[10] 0 +4 *36:A out_s[11] 9.3521e-05 +5 *35:A *36:A 0 +6 *37:A *36:A 0 +7 *38:A *36:A 0.000159156 +*RES +1 in_n[9] *36:A 16.68 +*END + +*D_NET *15 0.000514326 +*CONN +*P in_s[0] I +*I *33:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[0] 0.000213288 +2 *33:A 0.000213288 +3 *33:A out_n[0] 8.77498e-05 +4 *33:A *39:A 0 +*RES +1 in_s[0] *33:A 7.05 +*END + +*D_NET *16 0.00178446 +*CONN +*P in_s[1] I +*I *39:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[1] 0.000549895 +2 *39:A 0.000549895 +3 *39:A out_n[0] 0.000684666 +4 *39:A out_n[2] 0 +5 *39:A *40:A 0 +6 *33:A *39:A 0 +*RES +1 in_s[1] *39:A 15.075 +*END + +*D_NET *17 0.000663109 +*CONN +*P in_s[2] I +*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[2] 0.000331555 +2 *40:A 0.000331555 +3 *40:A out_s[0] 0 +4 *39:A *40:A 0 +*RES +1 in_s[2] *40:A 8.91 +*END + +*D_NET *18 0.00231172 +*CONN +*P out_n[0] O +*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[0] 0.000769652 +2 *33:X 0.000769652 +3 out_n[0] out_n[1] 0 +4 out_n[0] out_n[2] 0 +5 *33:A out_n[0] 8.77498e-05 +6 *39:A out_n[0] 0.000684666 +*RES +1 *33:X out_n[0] 19.095 +*END + +*D_NET *19 0.000816795 +*CONN +*P out_n[1] O +*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[1] 0.000285665 +2 *39:X 0.000285665 +3 out_n[1] out_n[2] 0.000245465 +4 out_n[0] out_n[1] 0 +*RES +1 *39:X out_n[1] 8.955 +*END + +*D_NET *20 0.00152863 +*CONN +*P out_n[2] O +*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[2] 0.000557907 +2 *40:X 0.000557907 +3 out_n[2] out_s[0] 0 +4 out_n[0] out_n[2] 0 +5 out_n[1] out_n[2] 0.000245465 +6 *39:A out_n[2] 0 +7 *41:A out_n[2] 0.000167353 +*RES +1 *40:X out_n[2] 14.475 +*END + +*D_NET *21 0.00137998 +*CONN +*P out_s[0] O +*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[0] 0.000500863 +2 *41:X 0.000500863 +3 out_s[0] out_s[1] 0.000300724 +4 out_s[0] out_s[2] 0 +5 out_n[2] out_s[0] 0 +6 *40:A out_s[0] 0 +7 *42:A out_s[0] 7.75325e-05 +8 *43:A out_s[0] 0 +*RES +1 *41:X out_s[0] 15.21 +*END + +*D_NET *22 0.00187612 +*CONN +*P out_s[10] O +*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[10] 0.000913335 +2 *37:X 0.000913335 +3 out_s[10] out_s[11] 0 +4 out_s[10] out_s[9] 0 +5 *36:A out_s[10] 0 +6 *37:A out_s[10] 4.94474e-05 +7 *38:A out_s[10] 0 +*RES +1 *37:X out_s[10] 17.595 +*END + +*D_NET *23 0.00239933 +*CONN +*P out_s[11] O +*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[11] 0.000947411 +2 *38:X 0.000947411 +3 out_s[11] out_s[9] 0.000123225 +4 out_s[10] out_s[11] 0 +5 *36:A out_s[11] 9.3521e-05 +6 *38:A out_s[11] 0.000287765 +*RES +1 *38:X out_s[11] 15.78 +*END + +*D_NET *24 0.00130092 +*CONN +*P out_s[1] O +*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[1] 0.000361344 +2 *42:X 0.000361344 +3 out_s[1] out_s[2] 0.000211976 +4 out_s[1] out_s[3] 0 +5 out_s[0] out_s[1] 0.000300724 +6 *43:A out_s[1] 6.55328e-05 +*RES +1 *42:X out_s[1] 12.165 +*END + +*D_NET *25 0.000903705 +*CONN +*P out_s[2] O +*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[2] 0.000342949 +2 *43:X 0.000342949 +3 out_s[2] out_s[3] 0 +4 out_s[0] out_s[2] 0 +5 out_s[1] out_s[2] 0.000211976 +6 *43:A out_s[2] 5.83121e-06 +*RES +1 *43:X out_s[2] 11.475 +*END + +*D_NET *26 0.00133229 +*CONN +*P out_s[3] O +*I *44:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[3] 0.000575568 +2 *44:X 0.000575568 +3 out_s[3] out_s[4] 0 +4 out_s[3] out_s[5] 0 +5 out_s[1] out_s[3] 0 +6 out_s[2] out_s[3] 0 +7 *45:A out_s[3] 0.000181152 +*RES +1 *44:X out_s[3] 13.77 +*END + +*D_NET *27 0.00079736 +*CONN +*P out_s[4] O +*I *45:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[4] 0.000337866 +2 *45:X 0.000337866 +3 out_s[4] out_s[5] 0.000121628 +4 out_s[3] out_s[4] 0 +*RES +1 *45:X out_s[4] 9.9 +*END + +*D_NET *28 0.00105662 +*CONN +*P out_s[5] O +*I *46:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[5] 0.000467496 +2 *46:X 0.000467496 +3 out_s[5] out_s[6] 0 +4 out_s[3] out_s[5] 0 +5 out_s[4] out_s[5] 0.000121628 +*RES +1 *46:X out_s[5] 11.475 +*END + +*D_NET *29 0.00170008 +*CONN +*P out_s[6] O +*I *47:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[6] 0.000724414 +2 *47:X 0.000724414 +3 out_s[6] out_s[7] 8.73036e-05 +4 out_s[5] out_s[6] 0 +5 *34:A out_s[6] 4.04613e-05 +6 *47:A out_s[6] 0.00012349 +*RES +1 *47:X out_s[6] 15.135 +*END + +*D_NET *30 0.00123387 +*CONN +*P out_s[7] O +*I *34:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[7] 0.000515339 +2 *34:X 0.000515339 +3 out_s[7] out_s[8] 0 +4 out_s[6] out_s[7] 8.73036e-05 +5 *34:A out_s[7] 0.000115886 +*RES +1 *34:X out_s[7] 12.45 +*END + +*D_NET *31 0.00148373 +*CONN +*P out_s[8] O +*I *35:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[8] 0.000716184 +2 *35:X 0.000716184 +3 out_s[8] out_s[9] 4.55329e-05 +4 out_s[7] out_s[8] 0 +5 *34:A out_s[8] 0 +6 *35:A out_s[8] 5.83121e-06 +*RES +1 *35:X out_s[8] 15.015 +*END + +*D_NET *32 0.000550203 +*CONN +*P out_s[9] O +*I *36:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[9] 0.000129111 +2 *36:X 0.000129111 +3 out_s[10] out_s[9] 0 +4 out_s[11] out_s[9] 0.000123225 +5 out_s[8] out_s[9] 4.55329e-05 +6 *38:A out_s[9] 0.000123225 +*RES +1 *36:X out_s[9] 6.705 +*END diff --git a/signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.nom.spef b/signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.nom.spef new file mode 100644 index 00000000..e4f997a5 --- /dev/null +++ b/signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.nom.spef @@ -0,0 +1,587 @@ +*SPEF "ieee 1481-1999" +*DESIGN "buff_flash_clkrst" +*DATE "11:11:11 Fri 11 11, 1111" +*VENDOR "OpenRCX" +*PROGRAM "Parallel Extraction" +*VERSION "1.0" +*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE" +*DIVIDER / +*DELIMITER : +*BUS_DELIMITER [] +*T_UNIT 1 NS +*C_UNIT 1 PF +*R_UNIT 1 OHM +*L_UNIT 1 HENRY + +*NAME_MAP +*3 in_n[0] +*4 in_n[10] +*5 in_n[11] +*6 in_n[1] +*7 in_n[2] +*8 in_n[3] +*9 in_n[4] +*10 in_n[5] +*11 in_n[6] +*12 in_n[7] +*13 in_n[8] +*14 in_n[9] +*15 in_s[0] +*16 in_s[1] +*17 in_s[2] +*18 out_n[0] +*19 out_n[1] +*20 out_n[2] +*21 out_s[0] +*22 out_s[10] +*23 out_s[11] +*24 out_s[1] +*25 out_s[2] +*26 out_s[3] +*27 out_s[4] +*28 out_s[5] +*29 out_s[6] +*30 out_s[7] +*31 out_s[8] +*32 out_s[9] +*33 BUF\[0\] +*34 BUF\[10\] +*35 BUF\[11\] +*36 BUF\[12\] +*37 BUF\[13\] +*38 BUF\[14\] +*39 BUF\[1\] +*40 BUF\[2\] +*41 BUF\[3\] +*42 BUF\[4\] +*43 BUF\[5\] +*44 BUF\[6\] +*45 BUF\[7\] +*46 BUF\[8\] +*47 BUF\[9\] +*48 FILLER_0_19 +*49 FILLER_0_27 +*50 FILLER_0_29 +*51 FILLER_0_3 +*52 FILLER_0_41 +*53 FILLER_0_54 +*54 FILLER_0_57 +*55 FILLER_0_7 +*56 FILLER_0_70 +*57 FILLER_0_74 +*58 FILLER_1_17 +*59 FILLER_1_3 +*60 FILLER_1_32 +*61 FILLER_1_47 +*62 FILLER_1_55 +*63 FILLER_1_57 +*64 FILLER_1_70 +*65 FILLER_1_74 +*66 FILLER_2_26 +*67 FILLER_2_29 +*68 FILLER_2_3 +*69 FILLER_2_52 +*70 FILLER_2_67 +*71 FILLER_3_15 +*72 FILLER_3_27 +*73 FILLER_3_3 +*74 FILLER_3_42 +*75 FILLER_3_54 +*76 FILLER_3_57 +*77 FILLER_3_70 +*78 FILLER_3_74 +*79 FILLER_4_19 +*80 FILLER_4_27 +*81 FILLER_4_29 +*82 FILLER_4_3 +*83 FILLER_4_41 +*84 FILLER_4_53 +*85 FILLER_4_57 +*86 FILLER_4_7 +*87 FILLER_4_70 +*88 FILLER_4_74 +*89 PHY_0 +*90 PHY_1 +*91 PHY_2 +*92 PHY_3 +*93 PHY_4 +*94 PHY_5 +*95 PHY_6 +*96 PHY_7 +*97 PHY_8 +*98 PHY_9 +*99 TAP_10 +*100 TAP_11 +*101 TAP_12 +*102 TAP_13 +*103 TAP_14 +*104 TAP_15 +*105 TAP_16 + +*PORTS +in_n[0] I +in_n[10] I +in_n[11] I +in_n[1] I +in_n[2] I +in_n[3] I +in_n[4] I +in_n[5] I +in_n[6] I +in_n[7] I +in_n[8] I +in_n[9] I +in_s[0] I +in_s[1] I +in_s[2] I +out_n[0] O +out_n[1] O +out_n[2] O +out_s[0] O +out_s[10] O +out_s[11] O +out_s[1] O +out_s[2] O +out_s[3] O +out_s[4] O +out_s[5] O +out_s[6] O +out_s[7] O +out_s[8] O +out_s[9] O + +*D_NET *3 0.000746189 +*CONN +*P in_n[0] I +*I *41:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[0] 0.000291118 +2 *41:A 0.000291118 +3 *41:A out_n[2] 0.000163953 +4 *41:A *42:A 0 +*RES +1 in_n[0] *41:A 20.5321 +*END + +*D_NET *4 0.000540091 +*CONN +*P in_n[10] I +*I *37:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[10] 0.00024161 +2 *37:A 0.00024161 +3 *37:A out_s[10] 5.68722e-05 +4 *37:A *36:A 0 +5 *37:A *38:A 0 +*RES +1 in_n[10] *37:A 18.55 +*END + +*D_NET *5 0.00290352 +*CONN +*P in_n[11] I +*I *38:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[11] 0.00113707 +2 *38:A 0.00113707 +3 *38:A out_s[10] 0 +4 *38:A out_s[11] 0.000304969 +5 *38:A out_s[9] 0.000140933 +6 *38:A *36:A 0.000183477 +7 *37:A *38:A 0 +*RES +1 in_n[11] *38:A 36.925 +*END + +*D_NET *6 0.00134243 +*CONN +*P in_n[1] I +*I *42:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[1] 0.000293149 +2 *42:A 0.000293149 +3 *42:A out_s[0] 7.58571e-05 +4 *42:A *43:A 0.000680277 +5 *41:A *42:A 0 +*RES +1 in_n[1] *42:A 22.7464 +*END + +*D_NET *7 0.00200548 +*CONN +*P in_n[2] I +*I *43:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[2] 0.000625829 +2 *43:A 0.000625829 +3 *43:A out_s[0] 0 +4 *43:A out_s[1] 6.74911e-05 +5 *43:A out_s[2] 6.05161e-06 +6 *43:A *44:A 0 +7 *42:A *43:A 0.000680277 +*RES +1 in_n[2] *43:A 27.5679 +*END + +*D_NET *8 0.000719992 +*CONN +*P in_n[3] I +*I *44:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[3] 0.000359996 +2 *44:A 0.000359996 +3 *44:A *45:A 0 +4 *43:A *44:A 0 +*RES +1 in_n[3] *44:A 20.5321 +*END + +*D_NET *9 0.00131838 +*CONN +*P in_n[4] I +*I *45:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[4] 0.000565243 +2 *45:A 0.000565243 +3 *45:A out_s[3] 0.000187893 +4 *45:A *46:A 0 +5 *44:A *45:A 0 +*RES +1 in_n[4] *45:A 25.3893 +*END + +*D_NET *10 0.00105711 +*CONN +*P in_n[5] I +*I *46:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[5] 0.000528554 +2 *46:A 0.000528554 +3 *45:A *46:A 0 +*RES +1 in_n[5] *46:A 23.5679 +*END + +*D_NET *11 0.00171215 +*CONN +*P in_n[6] I +*I *47:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[6] 0.000448575 +2 *47:A 0.000448575 +3 *47:A out_s[6] 0.000141554 +4 *47:A *34:A 0.000673444 +*RES +1 in_n[6] *47:A 25.3357 +*END + +*D_NET *12 0.00184731 +*CONN +*P in_n[7] I +*I *34:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[7] 0.000505756 +2 *34:A 0.000505756 +3 *34:A out_s[6] 3.85148e-05 +4 *34:A out_s[7] 0.000123836 +5 *34:A out_s[8] 0 +6 *34:A *35:A 0 +7 *47:A *34:A 0.000673444 +*RES +1 in_n[7] *34:A 26.2107 +*END + +*D_NET *13 0.00083737 +*CONN +*P in_n[8] I +*I *35:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[8] 0.000415659 +2 *35:A 0.000415659 +3 *35:A out_s[8] 6.05161e-06 +4 *35:A *36:A 0 +5 *34:A *35:A 0 +*RES +1 in_n[8] *35:A 21.1929 +*END + +*D_NET *14 0.00191759 +*CONN +*P in_n[9] I +*I *36:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_n[9] 0.000817106 +2 *36:A 0.000817106 +3 *36:A out_s[10] 0 +4 *36:A out_s[11] 9.98961e-05 +5 *35:A *36:A 0 +6 *37:A *36:A 0 +7 *38:A *36:A 0.000183477 +*RES +1 in_n[9] *36:A 29.3714 +*END + +*D_NET *15 0.000565776 +*CONN +*P in_s[0] I +*I *33:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[0] 0.000232546 +2 *33:A 0.000232546 +3 *33:A out_n[0] 0.000100684 +4 *33:A *39:A 0 +*RES +1 in_s[0] *33:A 17.9071 +*END + +*D_NET *16 0.00194543 +*CONN +*P in_s[1] I +*I *39:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[1] 0.000603696 +2 *39:A 0.000603696 +3 *39:A out_n[0] 0.000738039 +4 *39:A out_n[2] 0 +5 *39:A *40:A 0 +6 *33:A *39:A 0 +*RES +1 in_s[1] *39:A 27.4607 +*END + +*D_NET *17 0.000720944 +*CONN +*P in_s[2] I +*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 in_s[2] 0.000360472 +2 *40:A 0.000360472 +3 *40:A out_s[0] 0 +4 *39:A *40:A 0 +*RES +1 in_s[2] *40:A 20.1214 +*END + +*D_NET *18 0.00251314 +*CONN +*P out_n[0] O +*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[0] 0.00083721 +2 *33:X 0.00083721 +3 out_n[0] out_n[1] 0 +4 out_n[0] out_n[2] 0 +5 *33:A out_n[0] 0.000100684 +6 *39:A out_n[0] 0.000738039 +*RES +1 *33:X out_n[0] 32.2464 +*END + +*D_NET *19 0.0008921 +*CONN +*P out_n[1] O +*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[1] 0.000313512 +2 *39:X 0.000313512 +3 out_n[1] out_n[2] 0.000265077 +4 out_n[0] out_n[1] 0 +*RES +1 *39:X out_n[1] 20.175 +*END + +*D_NET *20 0.00165991 +*CONN +*P out_n[2] O +*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_n[2] 0.000615442 +2 *40:X 0.000615442 +3 out_n[2] out_s[0] 0 +4 out_n[0] out_n[2] 0 +5 out_n[1] out_n[2] 0.000265077 +6 *39:A out_n[2] 0 +7 *41:A out_n[2] 0.000163953 +*RES +1 *40:X out_n[2] 26.7464 +*END + +*D_NET *21 0.00149166 +*CONN +*P out_s[0] O +*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[0] 0.000551682 +2 *41:X 0.000551682 +3 out_s[0] out_s[1] 0.000312442 +4 out_s[0] out_s[2] 0 +5 out_n[2] out_s[0] 0 +6 *40:A out_s[0] 0 +7 *42:A out_s[0] 7.58571e-05 +8 *43:A out_s[0] 0 +*RES +1 *41:X out_s[0] 27.6214 +*END + +*D_NET *22 0.00205685 +*CONN +*P out_s[10] O +*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[10] 0.000999988 +2 *37:X 0.000999988 +3 out_s[10] out_s[11] 0 +4 out_s[10] out_s[9] 0 +5 *36:A out_s[10] 0 +6 *37:A out_s[10] 5.68722e-05 +7 *38:A out_s[10] 0 +*RES +1 *37:X out_s[10] 30.4607 +*END + +*D_NET *23 0.00269979 +*CONN +*P out_s[11] O +*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[11] 0.001077 +2 *38:X 0.001077 +3 out_s[11] out_s[9] 0.000140933 +4 out_s[10] out_s[11] 0 +5 *36:A out_s[11] 9.98961e-05 +6 *38:A out_s[11] 0.000304969 +*RES +1 *38:X out_s[11] 28.3 +*END + +*D_NET *24 0.00141598 +*CONN +*P out_s[1] O +*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[1] 0.000407902 +2 *42:X 0.000407902 +3 out_s[1] out_s[2] 0.000220246 +4 out_s[1] out_s[3] 0 +5 out_s[0] out_s[1] 0.000312442 +6 *43:A out_s[1] 6.74911e-05 +*RES +1 *42:X out_s[1] 23.9964 +*END + +*D_NET *25 0.000977116 +*CONN +*P out_s[2] O +*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 +*CAP +1 out_s[2] 0.000375409 +2 *43:X 0.000375409 +3 out_s[2] out_s[3] 0 +4 out_s[0] out_s[2] 0 +5 out_s[1] out_s[2] 0.000220246 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c771ef038b7fabe737c370e7887cdb87d295068e Mon Sep 17 00:00:00 2001 From: marwaneltoukhy Date: Thu, 13 Oct 2022 11:52:27 -0700 Subject: [PATCH 3/3] changed sdf paths --- sdf/multicorner/max/buff_flash_clkrst.ff.sdf | 186 ------ sdf/multicorner/max/buff_flash_clkrst.ss.sdf | 186 ------ sdf/multicorner/max/buff_flash_clkrst.tt.sdf | 186 ------ spef/multicorner/buff_flash_clkrst.max.spef | 619 ------------------- spef/multicorner/buff_flash_clkrst.min.spef | 587 ------------------ spef/multicorner/buff_flash_clkrst.nom.spef | 587 ------------------ 6 files changed, 2351 deletions(-) delete mode 100644 sdf/multicorner/max/buff_flash_clkrst.ff.sdf delete mode 100644 sdf/multicorner/max/buff_flash_clkrst.ss.sdf delete mode 100644 sdf/multicorner/max/buff_flash_clkrst.tt.sdf delete mode 100644 spef/multicorner/buff_flash_clkrst.max.spef delete mode 100644 spef/multicorner/buff_flash_clkrst.min.spef delete mode 100644 spef/multicorner/buff_flash_clkrst.nom.spef diff --git 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*16:12 *40:A 0 -7 *33:A *16:12 0 -*RES -1 in_s[1] *16:12 30.8464 -2 *16:12 *39:A 23 -*END - -*D_NET *17 0.000791768 -*CONN -*P in_s[2] I -*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_s[2] 0.000395884 -2 *40:A 0.000395884 -3 *40:A out_s[0] 0 -4 *16:12 *40:A 0 -*RES -1 in_s[2] *40:A 45.3329 -*END - -*D_NET *18 0.00275982 -*CONN -*P out_n[0] O -*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_n[0] 0.000649033 -2 *33:X 0.000270953 -3 *18:7 0.000919986 -4 out_n[0] out_n[1] 0 -5 out_n[0] out_n[2] 0 -6 *33:A *18:7 0.000100805 -7 *16:12 out_n[0] 0.000819045 -*RES -1 *33:X *18:7 42.9093 -2 *18:7 out_n[0] 16.4886 -*END - -*D_NET *19 0.000996874 -*CONN -*P out_n[1] O -*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_n[1] 0.000351055 -2 *39:X 0.000351055 -3 out_n[1] out_n[2] 0.000294763 -4 out_n[0] out_n[1] 0 -*RES -1 *39:X out_n[1] 45.395 -*END - -*D_NET *20 0.00183616 -*CONN -*P out_n[2] O -*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_n[2] 0.000507504 -2 *40:X 0.000180283 -3 *20:7 0.000687787 -4 out_n[2] out_s[0] 0 -5 out_n[0] out_n[2] 0 -6 out_n[1] out_n[2] 0.000294763 -7 *41:A out_n[2] 0.000165819 -8 *16:12 out_n[2] 0 -*RES -1 *40:X *20:7 40.5271 -2 *20:7 out_n[2] 12.4907 -*END - -*D_NET *21 0.00163663 -*CONN -*P out_s[0] O -*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[0] 0.000548786 -2 *41:X 6.80678e-05 -3 *21:7 0.000616853 -4 out_s[0] out_s[1] 0.00032632 -5 out_s[0] out_s[2] 0 -6 out_n[2] out_s[0] 0 -7 *40:A out_s[0] 0 -8 *42:A out_s[0] 7.66085e-05 -9 *7:10 out_s[0] 0 -*RES -1 *41:X *21:7 39.0979 -2 *21:7 out_s[0] 14.935 -*END - -*D_NET *22 0.0022753 -*CONN -*P out_s[10] O -*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[10] 0.000810796 -2 *37:X 0.000298189 -3 *22:9 0.00110899 -4 out_s[10] out_s[11] 0 -5 out_s[10] out_s[9] 0 -6 *37:A *22:9 5.73288e-05 -7 *5:16 out_s[10] 0 -8 *14:10 out_s[10] 0 -*RES -1 *37:X *22:9 42.93 -2 *22:9 out_s[10] 14.3964 -*END - -*D_NET *23 0.00285697 -*CONN -*P out_s[11] O -*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[11] 0.000131317 -2 *38:X 0.00101936 -3 *23:7 0.00115068 -4 *23:7 out_s[9] 0.000140259 -5 out_s[10] out_s[11] 0 -6 *5:16 *23:7 0.000311915 -7 *14:10 *23:7 0.000103447 -*RES -1 *38:X *23:7 37.4586 -2 *23:7 out_s[11] 17.3614 -*END - -*D_NET *24 0.00157731 -*CONN -*P out_s[1] O -*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[1] 0.00047529 -2 *42:X 0.00047529 -3 out_s[1] out_s[2] 0.000230031 -4 out_s[1] out_s[3] 0 -5 out_s[0] out_s[1] 0.00032632 -6 *7:10 out_s[1] 7.03766e-05 -*RES -1 *42:X out_s[1] 49.8279 -*END - -*D_NET *25 0.00106966 -*CONN -*P out_s[2] O -*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[2] 0.000416727 -2 *43:X 0.000416727 -3 out_s[2] out_s[3] 0 -4 out_s[0] out_s[2] 0 -5 out_s[1] out_s[2] 0.000230031 -6 *7:10 out_s[2] 6.17437e-06 -*RES -1 *43:X out_s[2] 48.875 -*END - -*D_NET *26 0.00157855 -*CONN -*P out_s[3] O -*I *44:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[3] 0.000532775 -2 *44:X 0.000158411 -3 *26:7 0.000691186 -4 out_s[3] out_s[4] 0 -5 out_s[3] out_s[5] 0 -6 out_s[1] out_s[3] 0 -7 out_s[2] out_s[3] 0 -8 *9:9 out_s[3] 0.000196178 -*RES -1 *44:X *26:7 40.5271 -2 *26:7 out_s[3] 11.5171 -*END - -*D_NET *27 0.000935888 -*CONN -*P out_s[4] O -*I *45:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[4] 0.0004112 -2 *45:X 0.0004112 -3 out_s[4] out_s[5] 0.000113488 -4 out_s[3] out_s[4] 0 -*RES -1 *45:X out_s[4] 46.7 -*END - -*D_NET *28 0.00124869 -*CONN -*P out_s[5] O -*I *46:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[5] 0.000567599 -2 *46:X 0.000567599 -3 out_s[5] out_s[6] 0 -4 out_s[3] out_s[5] 0 -5 out_s[4] out_s[5] 0.000113488 -*RES -1 *46:X out_s[5] 48.875 -*END - -*D_NET *29 0.00207606 -*CONN -*P out_s[6] O -*I *47:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[6] 0.000503989 -2 *47:X 0.000404635 -3 *29:7 0.000908623 -4 out_s[6] out_s[7] 8.03508e-05 -5 out_s[5] out_s[6] 0 -6 *11:10 *29:7 0.000141677 -7 *12:8 out_s[6] 3.67805e-05 -*RES -1 *47:X *29:7 44.3386 -2 *29:7 out_s[6] 9.59071 -*END - -*D_NET *30 0.0014735 -*CONN -*P out_s[7] O -*I *34:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[7] 0.00028451 -2 *34:X 0.00034798 -3 *30:7 0.00063249 -4 out_s[7] out_s[8] 0 -5 out_s[6] out_s[7] 8.03508e-05 -6 *12:8 *30:7 0.000128169 -*RES -1 *34:X *30:7 44.3386 -2 *30:7 out_s[7] 5.88286 -*END - -*D_NET *31 0.00179676 -*CONN -*P out_s[8] O -*I *35:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[8] 0.000680814 -2 *35:X 0.000193091 -3 *31:7 0.000873905 -4 out_s[8] out_s[9] 4.27783e-05 -5 out_s[7] out_s[8] 0 -6 *35:A *31:7 6.17437e-06 -7 *12:8 out_s[8] 0 -*RES -1 *35:X *31:7 41.0036 -2 *31:7 out_s[8] 12.76 -*END - -*D_NET *32 0.000667532 -*CONN -*P out_s[9] O -*I *36:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[9] 0.000172118 -2 *36:X 0.000172118 -3 out_s[10] out_s[9] 0 -4 out_s[8] out_s[9] 4.27783e-05 -5 *5:16 out_s[9] 0.000140259 -6 *23:7 out_s[9] 0.000140259 -*RES -1 *36:X out_s[9] 42.2879 -*END diff --git a/spef/multicorner/buff_flash_clkrst.min.spef b/spef/multicorner/buff_flash_clkrst.min.spef deleted file mode 100644 index 1fd93639..00000000 --- a/spef/multicorner/buff_flash_clkrst.min.spef +++ /dev/null @@ -1,587 +0,0 @@ -*SPEF "ieee 1481-1999" -*DESIGN "buff_flash_clkrst" -*DATE "11:11:11 Fri 11 11, 1111" -*VENDOR "OpenRCX" -*PROGRAM "Parallel Extraction" -*VERSION "1.0" -*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE" -*DIVIDER / -*DELIMITER : -*BUS_DELIMITER [] -*T_UNIT 1 NS -*C_UNIT 1 PF -*R_UNIT 1 OHM -*L_UNIT 1 HENRY - -*NAME_MAP -*3 in_n[0] -*4 in_n[10] -*5 in_n[11] -*6 in_n[1] -*7 in_n[2] -*8 in_n[3] -*9 in_n[4] -*10 in_n[5] -*11 in_n[6] -*12 in_n[7] -*13 in_n[8] -*14 in_n[9] -*15 in_s[0] -*16 in_s[1] -*17 in_s[2] -*18 out_n[0] -*19 out_n[1] -*20 out_n[2] -*21 out_s[0] -*22 out_s[10] -*23 out_s[11] -*24 out_s[1] -*25 out_s[2] -*26 out_s[3] -*27 out_s[4] -*28 out_s[5] -*29 out_s[6] -*30 out_s[7] -*31 out_s[8] -*32 out_s[9] -*33 BUF\[0\] -*34 BUF\[10\] -*35 BUF\[11\] -*36 BUF\[12\] -*37 BUF\[13\] -*38 BUF\[14\] -*39 BUF\[1\] -*40 BUF\[2\] -*41 BUF\[3\] -*42 BUF\[4\] -*43 BUF\[5\] -*44 BUF\[6\] -*45 BUF\[7\] -*46 BUF\[8\] -*47 BUF\[9\] -*48 FILLER_0_19 -*49 FILLER_0_27 -*50 FILLER_0_29 -*51 FILLER_0_3 -*52 FILLER_0_41 -*53 FILLER_0_54 -*54 FILLER_0_57 -*55 FILLER_0_7 -*56 FILLER_0_70 -*57 FILLER_0_74 -*58 FILLER_1_17 -*59 FILLER_1_3 -*60 FILLER_1_32 -*61 FILLER_1_47 -*62 FILLER_1_55 -*63 FILLER_1_57 -*64 FILLER_1_70 -*65 FILLER_1_74 -*66 FILLER_2_26 -*67 FILLER_2_29 -*68 FILLER_2_3 -*69 FILLER_2_52 -*70 FILLER_2_67 -*71 FILLER_3_15 -*72 FILLER_3_27 -*73 FILLER_3_3 -*74 FILLER_3_42 -*75 FILLER_3_54 -*76 FILLER_3_57 -*77 FILLER_3_70 -*78 FILLER_3_74 -*79 FILLER_4_19 -*80 FILLER_4_27 -*81 FILLER_4_29 -*82 FILLER_4_3 -*83 FILLER_4_41 -*84 FILLER_4_53 -*85 FILLER_4_57 -*86 FILLER_4_7 -*87 FILLER_4_70 -*88 FILLER_4_74 -*89 PHY_0 -*90 PHY_1 -*91 PHY_2 -*92 PHY_3 -*93 PHY_4 -*94 PHY_5 -*95 PHY_6 -*96 PHY_7 -*97 PHY_8 -*98 PHY_9 -*99 TAP_10 -*100 TAP_11 -*101 TAP_12 -*102 TAP_13 -*103 TAP_14 -*104 TAP_15 -*105 TAP_16 - -*PORTS -in_n[0] I -in_n[10] I -in_n[11] I -in_n[1] I -in_n[2] I -in_n[3] I -in_n[4] I -in_n[5] I -in_n[6] I -in_n[7] I -in_n[8] I -in_n[9] I -in_s[0] I -in_s[1] I -in_s[2] I -out_n[0] O -out_n[1] O -out_n[2] O -out_s[0] O -out_s[10] O -out_s[11] O -out_s[1] O -out_s[2] O -out_s[3] O -out_s[4] O -out_s[5] O -out_s[6] O -out_s[7] O -out_s[8] O -out_s[9] O - -*D_NET *3 0.000698578 -*CONN -*P in_n[0] I -*I *41:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[0] 0.000265612 -2 *41:A 0.000265612 -3 *41:A out_n[2] 0.000167353 -4 *41:A *42:A 0 -*RES -1 in_n[0] *41:A 9.255 -*END - -*D_NET *4 0.000496833 -*CONN -*P in_n[10] I -*I *37:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[10] 0.000223693 -2 *37:A 0.000223693 -3 *37:A out_s[10] 4.94474e-05 -4 *37:A *36:A 0 -5 *37:A *38:A 0 -*RES -1 in_n[10] *37:A 7.59 -*END - -*D_NET *5 0.00265835 -*CONN -*P in_n[11] I -*I *38:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[11] 0.0010441 -2 *38:A 0.0010441 -3 *38:A out_s[10] 0 -4 *38:A out_s[11] 0.000287765 -5 *38:A out_s[9] 0.000123225 -6 *38:A *36:A 0.000159156 -7 *37:A *38:A 0 -*RES -1 in_n[11] *38:A 23.025 -*END - -*D_NET *6 0.00123947 -*CONN -*P in_n[1] I -*I *42:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[1] 0.000265945 -2 *42:A 0.000265945 -3 *42:A out_s[0] 7.75325e-05 -4 *42:A *43:A 0.000630049 -5 *41:A *42:A 0 -*RES -1 in_n[1] *42:A 11.115 -*END - -*D_NET *7 0.00183936 -*CONN -*P in_n[2] I -*I *43:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[2] 0.000568975 -2 *43:A 0.000568975 -3 *43:A out_s[0] 0 -4 *43:A out_s[1] 6.55328e-05 -5 *43:A out_s[2] 5.83121e-06 -6 *43:A *44:A 0 -7 *42:A *43:A 0.000630049 -*RES -1 in_n[2] *43:A 15.165 -*END - -*D_NET *8 0.000671935 -*CONN -*P in_n[3] I -*I *44:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[3] 0.000335968 -2 *44:A 0.000335968 -3 *44:A *45:A 0 -4 *43:A *44:A 0 -*RES -1 in_n[3] *44:A 9.255 -*END - -*D_NET *9 0.00122617 -*CONN -*P in_n[4] I -*I *45:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[4] 0.00052251 -2 *45:A 0.00052251 -3 *45:A out_s[3] 0.000181152 -4 *45:A *46:A 0 -5 *44:A *45:A 0 -*RES -1 in_n[4] *45:A 13.335 -*END - -*D_NET *10 0.000985911 -*CONN -*P in_n[5] I -*I *46:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[5] 0.000492956 -2 *46:A 0.000492956 -3 *45:A *46:A 0 -*RES -1 in_n[5] *46:A 11.805 -*END - -*D_NET *11 0.00156745 -*CONN -*P in_n[6] I -*I *47:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[6] 0.000410161 -2 *47:A 0.000410161 -3 *47:A out_s[6] 0.00012349 -4 *47:A *34:A 0.000623638 -*RES -1 in_n[6] *47:A 13.29 -*END - -*D_NET *12 0.00169542 -*CONN -*P in_n[7] I -*I *34:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[7] 0.000457718 -2 *34:A 0.000457718 -3 *34:A out_s[6] 4.04613e-05 -4 *34:A out_s[7] 0.000115886 -5 *34:A out_s[8] 0 -6 *34:A *35:A 0 -7 *47:A *34:A 0.000623638 -*RES -1 in_n[7] *34:A 14.025 -*END - -*D_NET *13 0.000773264 -*CONN -*P in_n[8] I -*I *35:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[8] 0.000383717 -2 *35:A 0.000383717 -3 *35:A out_s[8] 5.83121e-06 -4 *35:A *36:A 0 -5 *34:A *35:A 0 -*RES -1 in_n[8] *35:A 9.81 -*END - -*D_NET *14 0.00175178 -*CONN -*P in_n[9] I -*I *36:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[9] 0.00074955 -2 *36:A 0.00074955 -3 *36:A out_s[10] 0 -4 *36:A out_s[11] 9.3521e-05 -5 *35:A *36:A 0 -6 *37:A *36:A 0 -7 *38:A *36:A 0.000159156 -*RES -1 in_n[9] *36:A 16.68 -*END - -*D_NET *15 0.000514326 -*CONN -*P in_s[0] I -*I *33:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_s[0] 0.000213288 -2 *33:A 0.000213288 -3 *33:A out_n[0] 8.77498e-05 -4 *33:A *39:A 0 -*RES -1 in_s[0] *33:A 7.05 -*END - -*D_NET *16 0.00178446 -*CONN -*P in_s[1] I -*I *39:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_s[1] 0.000549895 -2 *39:A 0.000549895 -3 *39:A out_n[0] 0.000684666 -4 *39:A out_n[2] 0 -5 *39:A *40:A 0 -6 *33:A *39:A 0 -*RES -1 in_s[1] *39:A 15.075 -*END - -*D_NET *17 0.000663109 -*CONN -*P in_s[2] I -*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_s[2] 0.000331555 -2 *40:A 0.000331555 -3 *40:A out_s[0] 0 -4 *39:A *40:A 0 -*RES -1 in_s[2] *40:A 8.91 -*END - -*D_NET *18 0.00231172 -*CONN -*P out_n[0] O -*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_n[0] 0.000769652 -2 *33:X 0.000769652 -3 out_n[0] out_n[1] 0 -4 out_n[0] out_n[2] 0 -5 *33:A out_n[0] 8.77498e-05 -6 *39:A out_n[0] 0.000684666 -*RES -1 *33:X out_n[0] 19.095 -*END - -*D_NET *19 0.000816795 -*CONN -*P out_n[1] O -*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_n[1] 0.000285665 -2 *39:X 0.000285665 -3 out_n[1] out_n[2] 0.000245465 -4 out_n[0] out_n[1] 0 -*RES -1 *39:X out_n[1] 8.955 -*END - -*D_NET *20 0.00152863 -*CONN -*P out_n[2] O -*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_n[2] 0.000557907 -2 *40:X 0.000557907 -3 out_n[2] out_s[0] 0 -4 out_n[0] out_n[2] 0 -5 out_n[1] out_n[2] 0.000245465 -6 *39:A out_n[2] 0 -7 *41:A out_n[2] 0.000167353 -*RES -1 *40:X out_n[2] 14.475 -*END - -*D_NET *21 0.00137998 -*CONN -*P out_s[0] O -*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[0] 0.000500863 -2 *41:X 0.000500863 -3 out_s[0] out_s[1] 0.000300724 -4 out_s[0] out_s[2] 0 -5 out_n[2] out_s[0] 0 -6 *40:A out_s[0] 0 -7 *42:A out_s[0] 7.75325e-05 -8 *43:A out_s[0] 0 -*RES -1 *41:X out_s[0] 15.21 -*END - -*D_NET *22 0.00187612 -*CONN -*P out_s[10] O -*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[10] 0.000913335 -2 *37:X 0.000913335 -3 out_s[10] out_s[11] 0 -4 out_s[10] out_s[9] 0 -5 *36:A out_s[10] 0 -6 *37:A out_s[10] 4.94474e-05 -7 *38:A out_s[10] 0 -*RES -1 *37:X out_s[10] 17.595 -*END - -*D_NET *23 0.00239933 -*CONN -*P out_s[11] O -*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[11] 0.000947411 -2 *38:X 0.000947411 -3 out_s[11] out_s[9] 0.000123225 -4 out_s[10] out_s[11] 0 -5 *36:A out_s[11] 9.3521e-05 -6 *38:A out_s[11] 0.000287765 -*RES -1 *38:X out_s[11] 15.78 -*END - -*D_NET *24 0.00130092 -*CONN -*P out_s[1] O -*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[1] 0.000361344 -2 *42:X 0.000361344 -3 out_s[1] out_s[2] 0.000211976 -4 out_s[1] out_s[3] 0 -5 out_s[0] out_s[1] 0.000300724 -6 *43:A out_s[1] 6.55328e-05 -*RES -1 *42:X out_s[1] 12.165 -*END - -*D_NET *25 0.000903705 -*CONN -*P out_s[2] O -*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[2] 0.000342949 -2 *43:X 0.000342949 -3 out_s[2] out_s[3] 0 -4 out_s[0] out_s[2] 0 -5 out_s[1] out_s[2] 0.000211976 -6 *43:A out_s[2] 5.83121e-06 -*RES -1 *43:X out_s[2] 11.475 -*END - -*D_NET *26 0.00133229 -*CONN -*P out_s[3] O -*I *44:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[3] 0.000575568 -2 *44:X 0.000575568 -3 out_s[3] out_s[4] 0 -4 out_s[3] out_s[5] 0 -5 out_s[1] out_s[3] 0 -6 out_s[2] out_s[3] 0 -7 *45:A out_s[3] 0.000181152 -*RES -1 *44:X out_s[3] 13.77 -*END - -*D_NET *27 0.00079736 -*CONN -*P out_s[4] O -*I *45:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[4] 0.000337866 -2 *45:X 0.000337866 -3 out_s[4] out_s[5] 0.000121628 -4 out_s[3] out_s[4] 0 -*RES -1 *45:X out_s[4] 9.9 -*END - -*D_NET *28 0.00105662 -*CONN -*P out_s[5] O -*I *46:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[5] 0.000467496 -2 *46:X 0.000467496 -3 out_s[5] out_s[6] 0 -4 out_s[3] out_s[5] 0 -5 out_s[4] out_s[5] 0.000121628 -*RES -1 *46:X out_s[5] 11.475 -*END - -*D_NET *29 0.00170008 -*CONN -*P out_s[6] O -*I *47:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[6] 0.000724414 -2 *47:X 0.000724414 -3 out_s[6] out_s[7] 8.73036e-05 -4 out_s[5] out_s[6] 0 -5 *34:A out_s[6] 4.04613e-05 -6 *47:A out_s[6] 0.00012349 -*RES -1 *47:X out_s[6] 15.135 -*END - -*D_NET *30 0.00123387 -*CONN -*P out_s[7] O -*I *34:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[7] 0.000515339 -2 *34:X 0.000515339 -3 out_s[7] out_s[8] 0 -4 out_s[6] out_s[7] 8.73036e-05 -5 *34:A out_s[7] 0.000115886 -*RES -1 *34:X out_s[7] 12.45 -*END - -*D_NET *31 0.00148373 -*CONN -*P out_s[8] O -*I *35:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[8] 0.000716184 -2 *35:X 0.000716184 -3 out_s[8] out_s[9] 4.55329e-05 -4 out_s[7] out_s[8] 0 -5 *34:A out_s[8] 0 -6 *35:A out_s[8] 5.83121e-06 -*RES -1 *35:X out_s[8] 15.015 -*END - -*D_NET *32 0.000550203 -*CONN -*P out_s[9] O -*I *36:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[9] 0.000129111 -2 *36:X 0.000129111 -3 out_s[10] out_s[9] 0 -4 out_s[11] out_s[9] 0.000123225 -5 out_s[8] out_s[9] 4.55329e-05 -6 *38:A out_s[9] 0.000123225 -*RES -1 *36:X out_s[9] 6.705 -*END diff --git a/spef/multicorner/buff_flash_clkrst.nom.spef b/spef/multicorner/buff_flash_clkrst.nom.spef deleted file mode 100644 index e4f997a5..00000000 --- a/spef/multicorner/buff_flash_clkrst.nom.spef +++ /dev/null @@ -1,587 +0,0 @@ -*SPEF "ieee 1481-1999" -*DESIGN "buff_flash_clkrst" -*DATE "11:11:11 Fri 11 11, 1111" -*VENDOR "OpenRCX" -*PROGRAM "Parallel Extraction" -*VERSION "1.0" -*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE" -*DIVIDER / -*DELIMITER : -*BUS_DELIMITER [] -*T_UNIT 1 NS -*C_UNIT 1 PF -*R_UNIT 1 OHM -*L_UNIT 1 HENRY - -*NAME_MAP -*3 in_n[0] -*4 in_n[10] -*5 in_n[11] -*6 in_n[1] -*7 in_n[2] -*8 in_n[3] -*9 in_n[4] -*10 in_n[5] -*11 in_n[6] -*12 in_n[7] -*13 in_n[8] -*14 in_n[9] -*15 in_s[0] -*16 in_s[1] -*17 in_s[2] -*18 out_n[0] -*19 out_n[1] -*20 out_n[2] -*21 out_s[0] -*22 out_s[10] -*23 out_s[11] -*24 out_s[1] -*25 out_s[2] -*26 out_s[3] -*27 out_s[4] -*28 out_s[5] -*29 out_s[6] -*30 out_s[7] -*31 out_s[8] -*32 out_s[9] -*33 BUF\[0\] -*34 BUF\[10\] -*35 BUF\[11\] -*36 BUF\[12\] -*37 BUF\[13\] -*38 BUF\[14\] -*39 BUF\[1\] -*40 BUF\[2\] -*41 BUF\[3\] -*42 BUF\[4\] -*43 BUF\[5\] -*44 BUF\[6\] -*45 BUF\[7\] -*46 BUF\[8\] -*47 BUF\[9\] -*48 FILLER_0_19 -*49 FILLER_0_27 -*50 FILLER_0_29 -*51 FILLER_0_3 -*52 FILLER_0_41 -*53 FILLER_0_54 -*54 FILLER_0_57 -*55 FILLER_0_7 -*56 FILLER_0_70 -*57 FILLER_0_74 -*58 FILLER_1_17 -*59 FILLER_1_3 -*60 FILLER_1_32 -*61 FILLER_1_47 -*62 FILLER_1_55 -*63 FILLER_1_57 -*64 FILLER_1_70 -*65 FILLER_1_74 -*66 FILLER_2_26 -*67 FILLER_2_29 -*68 FILLER_2_3 -*69 FILLER_2_52 -*70 FILLER_2_67 -*71 FILLER_3_15 -*72 FILLER_3_27 -*73 FILLER_3_3 -*74 FILLER_3_42 -*75 FILLER_3_54 -*76 FILLER_3_57 -*77 FILLER_3_70 -*78 FILLER_3_74 -*79 FILLER_4_19 -*80 FILLER_4_27 -*81 FILLER_4_29 -*82 FILLER_4_3 -*83 FILLER_4_41 -*84 FILLER_4_53 -*85 FILLER_4_57 -*86 FILLER_4_7 -*87 FILLER_4_70 -*88 FILLER_4_74 -*89 PHY_0 -*90 PHY_1 -*91 PHY_2 -*92 PHY_3 -*93 PHY_4 -*94 PHY_5 -*95 PHY_6 -*96 PHY_7 -*97 PHY_8 -*98 PHY_9 -*99 TAP_10 -*100 TAP_11 -*101 TAP_12 -*102 TAP_13 -*103 TAP_14 -*104 TAP_15 -*105 TAP_16 - -*PORTS -in_n[0] I -in_n[10] I -in_n[11] I -in_n[1] I -in_n[2] I -in_n[3] I -in_n[4] I -in_n[5] I -in_n[6] I -in_n[7] I -in_n[8] I -in_n[9] I -in_s[0] I -in_s[1] I -in_s[2] I -out_n[0] O -out_n[1] O -out_n[2] O -out_s[0] O -out_s[10] O -out_s[11] O -out_s[1] O -out_s[2] O -out_s[3] O -out_s[4] O -out_s[5] O -out_s[6] O -out_s[7] O -out_s[8] O -out_s[9] O - -*D_NET *3 0.000746189 -*CONN -*P in_n[0] I -*I *41:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[0] 0.000291118 -2 *41:A 0.000291118 -3 *41:A out_n[2] 0.000163953 -4 *41:A *42:A 0 -*RES -1 in_n[0] *41:A 20.5321 -*END - -*D_NET *4 0.000540091 -*CONN -*P in_n[10] I -*I *37:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[10] 0.00024161 -2 *37:A 0.00024161 -3 *37:A out_s[10] 5.68722e-05 -4 *37:A *36:A 0 -5 *37:A *38:A 0 -*RES -1 in_n[10] *37:A 18.55 -*END - -*D_NET *5 0.00290352 -*CONN -*P in_n[11] I -*I *38:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[11] 0.00113707 -2 *38:A 0.00113707 -3 *38:A out_s[10] 0 -4 *38:A out_s[11] 0.000304969 -5 *38:A out_s[9] 0.000140933 -6 *38:A *36:A 0.000183477 -7 *37:A *38:A 0 -*RES -1 in_n[11] *38:A 36.925 -*END - -*D_NET *6 0.00134243 -*CONN -*P in_n[1] I -*I *42:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[1] 0.000293149 -2 *42:A 0.000293149 -3 *42:A out_s[0] 7.58571e-05 -4 *42:A *43:A 0.000680277 -5 *41:A *42:A 0 -*RES -1 in_n[1] *42:A 22.7464 -*END - -*D_NET *7 0.00200548 -*CONN -*P in_n[2] I -*I *43:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[2] 0.000625829 -2 *43:A 0.000625829 -3 *43:A out_s[0] 0 -4 *43:A out_s[1] 6.74911e-05 -5 *43:A out_s[2] 6.05161e-06 -6 *43:A *44:A 0 -7 *42:A *43:A 0.000680277 -*RES -1 in_n[2] *43:A 27.5679 -*END - -*D_NET *8 0.000719992 -*CONN -*P in_n[3] I -*I *44:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[3] 0.000359996 -2 *44:A 0.000359996 -3 *44:A *45:A 0 -4 *43:A *44:A 0 -*RES -1 in_n[3] *44:A 20.5321 -*END - -*D_NET *9 0.00131838 -*CONN -*P in_n[4] I -*I *45:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[4] 0.000565243 -2 *45:A 0.000565243 -3 *45:A out_s[3] 0.000187893 -4 *45:A *46:A 0 -5 *44:A *45:A 0 -*RES -1 in_n[4] *45:A 25.3893 -*END - -*D_NET *10 0.00105711 -*CONN -*P in_n[5] I -*I *46:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[5] 0.000528554 -2 *46:A 0.000528554 -3 *45:A *46:A 0 -*RES -1 in_n[5] *46:A 23.5679 -*END - -*D_NET *11 0.00171215 -*CONN -*P in_n[6] I -*I *47:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[6] 0.000448575 -2 *47:A 0.000448575 -3 *47:A out_s[6] 0.000141554 -4 *47:A *34:A 0.000673444 -*RES -1 in_n[6] *47:A 25.3357 -*END - -*D_NET *12 0.00184731 -*CONN -*P in_n[7] I -*I *34:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[7] 0.000505756 -2 *34:A 0.000505756 -3 *34:A out_s[6] 3.85148e-05 -4 *34:A out_s[7] 0.000123836 -5 *34:A out_s[8] 0 -6 *34:A *35:A 0 -7 *47:A *34:A 0.000673444 -*RES -1 in_n[7] *34:A 26.2107 -*END - -*D_NET *13 0.00083737 -*CONN -*P in_n[8] I -*I *35:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[8] 0.000415659 -2 *35:A 0.000415659 -3 *35:A out_s[8] 6.05161e-06 -4 *35:A *36:A 0 -5 *34:A *35:A 0 -*RES -1 in_n[8] *35:A 21.1929 -*END - -*D_NET *14 0.00191759 -*CONN -*P in_n[9] I -*I *36:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_n[9] 0.000817106 -2 *36:A 0.000817106 -3 *36:A out_s[10] 0 -4 *36:A out_s[11] 9.98961e-05 -5 *35:A *36:A 0 -6 *37:A *36:A 0 -7 *38:A *36:A 0.000183477 -*RES -1 in_n[9] *36:A 29.3714 -*END - -*D_NET *15 0.000565776 -*CONN -*P in_s[0] I -*I *33:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_s[0] 0.000232546 -2 *33:A 0.000232546 -3 *33:A out_n[0] 0.000100684 -4 *33:A *39:A 0 -*RES -1 in_s[0] *33:A 17.9071 -*END - -*D_NET *16 0.00194543 -*CONN -*P in_s[1] I -*I *39:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_s[1] 0.000603696 -2 *39:A 0.000603696 -3 *39:A out_n[0] 0.000738039 -4 *39:A out_n[2] 0 -5 *39:A *40:A 0 -6 *33:A *39:A 0 -*RES -1 in_s[1] *39:A 27.4607 -*END - -*D_NET *17 0.000720944 -*CONN -*P in_s[2] I -*I *40:A I *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 in_s[2] 0.000360472 -2 *40:A 0.000360472 -3 *40:A out_s[0] 0 -4 *39:A *40:A 0 -*RES -1 in_s[2] *40:A 20.1214 -*END - -*D_NET *18 0.00251314 -*CONN -*P out_n[0] O -*I *33:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_n[0] 0.00083721 -2 *33:X 0.00083721 -3 out_n[0] out_n[1] 0 -4 out_n[0] out_n[2] 0 -5 *33:A out_n[0] 0.000100684 -6 *39:A out_n[0] 0.000738039 -*RES -1 *33:X out_n[0] 32.2464 -*END - -*D_NET *19 0.0008921 -*CONN -*P out_n[1] O -*I *39:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_n[1] 0.000313512 -2 *39:X 0.000313512 -3 out_n[1] out_n[2] 0.000265077 -4 out_n[0] out_n[1] 0 -*RES -1 *39:X out_n[1] 20.175 -*END - -*D_NET *20 0.00165991 -*CONN -*P out_n[2] O -*I *40:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_n[2] 0.000615442 -2 *40:X 0.000615442 -3 out_n[2] out_s[0] 0 -4 out_n[0] out_n[2] 0 -5 out_n[1] out_n[2] 0.000265077 -6 *39:A out_n[2] 0 -7 *41:A out_n[2] 0.000163953 -*RES -1 *40:X out_n[2] 26.7464 -*END - -*D_NET *21 0.00149166 -*CONN -*P out_s[0] O -*I *41:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[0] 0.000551682 -2 *41:X 0.000551682 -3 out_s[0] out_s[1] 0.000312442 -4 out_s[0] out_s[2] 0 -5 out_n[2] out_s[0] 0 -6 *40:A out_s[0] 0 -7 *42:A out_s[0] 7.58571e-05 -8 *43:A out_s[0] 0 -*RES -1 *41:X out_s[0] 27.6214 -*END - -*D_NET *22 0.00205685 -*CONN -*P out_s[10] O -*I *37:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[10] 0.000999988 -2 *37:X 0.000999988 -3 out_s[10] out_s[11] 0 -4 out_s[10] out_s[9] 0 -5 *36:A out_s[10] 0 -6 *37:A out_s[10] 5.68722e-05 -7 *38:A out_s[10] 0 -*RES -1 *37:X out_s[10] 30.4607 -*END - -*D_NET *23 0.00269979 -*CONN -*P out_s[11] O -*I *38:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[11] 0.001077 -2 *38:X 0.001077 -3 out_s[11] out_s[9] 0.000140933 -4 out_s[10] out_s[11] 0 -5 *36:A out_s[11] 9.98961e-05 -6 *38:A out_s[11] 0.000304969 -*RES -1 *38:X out_s[11] 28.3 -*END - -*D_NET *24 0.00141598 -*CONN -*P out_s[1] O -*I *42:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[1] 0.000407902 -2 *42:X 0.000407902 -3 out_s[1] out_s[2] 0.000220246 -4 out_s[1] out_s[3] 0 -5 out_s[0] out_s[1] 0.000312442 -6 *43:A out_s[1] 6.74911e-05 -*RES -1 *42:X out_s[1] 23.9964 -*END - -*D_NET *25 0.000977116 -*CONN -*P out_s[2] O -*I *43:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[2] 0.000375409 -2 *43:X 0.000375409 -3 out_s[2] out_s[3] 0 -4 out_s[0] out_s[2] 0 -5 out_s[1] out_s[2] 0.000220246 -6 *43:A out_s[2] 6.05161e-06 -*RES -1 *43:X out_s[2] 23.175 -*END - -*D_NET *26 0.00144163 -*CONN -*P out_s[3] O -*I *44:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[3] 0.000626868 -2 *44:X 0.000626868 -3 out_s[3] out_s[4] 0 -4 out_s[3] out_s[5] 0 -5 out_s[1] out_s[3] 0 -6 out_s[2] out_s[3] 0 -7 *45:A out_s[3] 0.000187893 -*RES -1 *44:X out_s[3] 25.9071 -*END - -*D_NET *27 0.000857812 -*CONN -*P out_s[4] O -*I *45:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[4] 0.00037039 -2 *45:X 0.00037039 -3 out_s[4] out_s[5] 0.000117033 -4 out_s[3] out_s[4] 0 -*RES -1 *45:X out_s[4] 21.3 -*END - -*D_NET *28 0.0011436 -*CONN -*P out_s[5] O -*I *46:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[5] 0.000513285 -2 *46:X 0.000513285 -3 out_s[5] out_s[6] 0 -4 out_s[3] out_s[5] 0 -5 out_s[4] out_s[5] 0.000117033 -*RES -1 *46:X out_s[5] 23.175 -*END - -*D_NET *29 0.00186776 -*CONN -*P out_s[6] O -*I *47:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[6] 0.000801981 -2 *47:X 0.000801981 -3 out_s[6] out_s[7] 8.37335e-05 -4 out_s[5] out_s[6] 0 -5 *34:A out_s[6] 3.85148e-05 -6 *47:A out_s[6] 0.000141554 -*RES -1 *47:X out_s[6] 27.5321 -*END - -*D_NET *30 0.00134038 -*CONN -*P out_s[7] O -*I *34:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[7] 0.000566407 -2 *34:X 0.000566407 -3 out_s[7] out_s[8] 0 -4 out_s[6] out_s[7] 8.37335e-05 -5 *34:A out_s[7] 0.000123836 -*RES -1 *34:X out_s[7] 24.3357 -*END - -*D_NET *31 0.00161835 -*CONN -*P out_s[8] O -*I *35:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[8] 0.000784339 -2 *35:X 0.000784339 -3 out_s[8] out_s[9] 4.36202e-05 -4 out_s[7] out_s[8] 0 -5 *34:A out_s[8] 0 -6 *35:A out_s[8] 6.05161e-06 -*RES -1 *35:X out_s[8] 27.3893 -*END - -*D_NET *32 0.000618171 -*CONN -*P out_s[9] O -*I *36:X O *D sky130_fd_sc_hd__clkbuf_8 -*CAP -1 out_s[9] 0.000146343 -2 *36:X 0.000146343 -3 out_s[10] out_s[9] 0 -4 out_s[11] out_s[9] 0.000140933 -5 out_s[8] out_s[9] 4.36202e-05 -6 *38:A out_s[9] 0.000140933 -*RES -1 *36:X out_s[9] 17.4964 -*END