mirror of https://github.com/efabless/caravel.git
update `caravel_core` openlane configs with the mgmt_soc with DFT
This commit is contained in:
mo-hosni
parent
477212724f
commit
f01a352fcb
|
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@ -13,20 +13,26 @@
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"Odb.ApplyDEFTemplate",
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"Odb.AddPDNObstructions",
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"OpenROAD.GeneratePDN",
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"Magic.StreamOut",
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"OpenROAD.GlobalPlacement",
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"OpenROAD.RepairDesignPostGPL",
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"OpenROAD.DetailedPlacement",
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"OpenROAD.CTS",
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"OpenROAD.ResizerTimingPostCTS",
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"Odb.DiodesOnPorts",
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"Odb.HeuristicDiodeInsertion",
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"OpenROAD.DetailedPlacement",
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"OpenROAD.GlobalRouting",
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"OpenROAD.RepairDesignPostGRT",
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"OpenROAD.ResizerTimingPostGRT",
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"OpenROAD.GlobalPlacement",
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"OpenROAD.DetailedPlacement",
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"OpenROAD.GlobalRouting",
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"OpenROAD.RepairDesignPostGRT",
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"OpenROAD.ResizerTimingPostGRT",
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"OpenROAD.GlobalPlacement",
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"OpenROAD.DetailedPlacement",
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"Odb.HeuristicDiodeInsertion",
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"OpenROAD.RepairAntennas",
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"OpenROAD.DetailedPlacement",
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"Odb.AddRoutingObstructions",
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"OpenROAD.DetailedRouting",
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"Checker.TrDRC",
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"Odb.ReportDisconnectedPins",
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@ -55,7 +61,7 @@
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"CLOCK_PORT": "clock_core",
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"CLOCK_NET": "caravel_clk",
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"CLOCK_PERIOD": 25,
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"PNR_SDC_FILE": "dir::/sdc_files/base_2.sdc",
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"PNR_SDC_FILE": "dir::/sdc_files/base.sdc",
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"SIGNOFF_SDC_FILE": "dir::/sdc_files/signoff.sdc",
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"MAX_FANOUT_CONSTRAINT": 14,
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@ -65,9 +71,8 @@
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"dir::/../../verilog/rtl/user_defines.v",
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"dir::/../../verilog/rtl/caravel_core.v",
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"dir::/../../verilog/rtl/mgmt_protect.v",
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"dir::/../../verilog/rtl/digital_pll.v",
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"dir::/../../verilog/rtl/clock_div.v",
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"dir::/../../verilog/rtl/gpio_control_block.v"
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"dir::/../../verilog/rtl/gpio_control_block.v",
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"dir::/../../verilog/rtl/gpio_control_block_mgmt.v"
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],
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"SYNTH_EXTRA_MAPPING_FILE": "dir::/synth_configuration/yosys_mapping.v",
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@ -80,652 +85,93 @@
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"FP_IO_VEXTEND": 2,
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"FP_IO_HEXTEND": 2,
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"FP_TAPCELL_DIST": 10,
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"//": "MACROS",
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"MACROS": {
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"mgmt_core_wrapper": {
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"gds": [
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"dir::/../../../caravel_mgmt_soc_litex/gds/mgmt_core_wrapper.gds.gz"
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],
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"lef": [
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"dir::/../../../caravel_mgmt_soc_litex/lef/mgmt_core_wrapper.lef"
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],
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"instances": {
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"soc": {
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"location": [100, 111],
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"orientation": "N"
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}
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},
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"nl": [
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"dir::/../../../caravel_mgmt_soc_litex/verilog/gl/mgmt_core_wrapper.v"
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],
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"spef": {
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"min_*": [
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"dir::/../../../caravel_mgmt_soc_litex/signoff/mgmt_core_wrapper/openlane-signoff/spef/mgmt_core_wrapper.min.spef"
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],
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"nom_*": [
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"dir::/../../../caravel_mgmt_soc_litex/signoff/mgmt_core_wrapper/openlane-signoff/spef/mgmt_core_wrapper.nom.spef"
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],
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"max_*": [
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"dir::/../../../caravel_mgmt_soc_litex/signoff/mgmt_core_wrapper/openlane-signoff/spef/mgmt_core_wrapper.max.spef"
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]
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},
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"lib": {
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"*": [
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"dir::/../../../caravel_mgmt_soc_litex/lib/mgmt_core_wrapper.lib"
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]
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}
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},
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"user_id_programming": {
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"gds": [
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"dir::/../../gds/user_id_programming.gds.gz"
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],
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"lef": [
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"dir::/../../lef/user_id_programming.lef"
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],
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"instances": {
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"user_id_value": {
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"location": [2962.655, 129.19],
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"orientation": "N"
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}
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},
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"nl": [
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"dir::/../../verilog/rtl/user_id_programming.v"
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]
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},
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"user_project_wrapper": {
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"gds": [
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"dir::/../../gds/user_project_wrapper_empty.gds.gz"
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],
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"lef": [
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"dir::/../../lef/user_project_wrapper_empty.lef"
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],
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"instances": {
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"mprj": {
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"location": [121.74, 1072],
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"orientation": "N"
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}
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},
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"nl": [
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"dir::/../../verilog/rtl/__user_project_wrapper.v"
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],
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"lib": {
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"*": [
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"dir::/../../lib/user_project_wrapper.lib"
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]
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}
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},
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"housekeeping_alt": {
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"gds": [
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"dir::/../../gds/housekeeping_alt.gds.gz"
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],
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"lef": [
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"dir::/../../lef/housekeeping_alt.lef"
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],
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"instances": {
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"housekeeping": {
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"location": [2660, 260],
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"orientation": "N"
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}
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},
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"nl": [
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"dir::/../../verilog/gl/housekeeping_alt.v"
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],
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"spef": {
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"min_*": [
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"dir::/../../signoff/housekeeping_alt/openlane-signoff/spef/housekeeping_alt.min.spef"
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],
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"nom_*": [
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"dir::/../../signoff/housekeeping_alt/openlane-signoff/spef/housekeeping_alt.nom.spef"
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],
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"max_*": [
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"dir::/../../signoff/housekeeping_alt/openlane-signoff/spef/housekeeping_alt.max.spef"
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]
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},
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"lib": {
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"*": [
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"dir::/../../lib/housekeeping_alt.lib"
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]
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}
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},
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"simple_por": {
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"gds": [
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"dir::/../../gds/simple_por.gds.gz"
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],
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"lef": [
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"dir::/../../lef/simple_por.lef"
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],
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"instances": {
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"por": {
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"location": [2645, 130],
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"orientation": "N"
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}
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},
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"nl": [
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"dir::/../../verilog/rtl/simple_por.v"
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]
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},
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"xres_buf": {
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"gds": [
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"dir::/../../gds/xres_buf.gds.gz"
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],
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"lef": [
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"dir::/../../lef/xres_buf.lef"
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],
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"instances": {
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"rstb_level": {
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"location": [683.62, 26],
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"orientation": "S"
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}
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},
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"nl": [
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"dir::/../../verilog/rtl/xres_buf.v"
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]
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},
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"spare_logic_block": {
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"gds": [
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"dir::/../../gds/spare_logic_block.gds.gz"
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],
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"lef": [
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"dir::/../../lef/spare_logic_block.lef"
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],
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"instances": {
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"spare_logic\\[0\\]": {
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"location": [454, 900],
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"orientation": "N"
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},
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"spare_logic\\[1\\]": {
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"location": [1646, 900],
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"orientation": "N"
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},
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"spare_logic\\[2\\]": {
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"location": [2211, 910],
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"orientation": "N"
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},
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"spare_logic\\[3\\]": {
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"location": [2800, 900],
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"orientation": "N"
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}
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},
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"nl": [
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"dir::/../../verilog/gl/spare_logic_block.v"
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]
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},
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"mprj_io_buffer": {
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"gds": [
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"dir::/../../gds/mprj_io_buffer.gds.gz"
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],
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"lef": [
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"dir::/../../lef/mprj_io_buffer.lef"
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],
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"instances": {
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"gpio_buf": {
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"location": [80, 940],
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"orientation": "N"
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}
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},
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"nl": [
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"dir::/../../verilog/gl/mprj_io_buffer.v"
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],
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"spef": {
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"min_*": [
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"dir::/../../signoff/mprj_io_buffer/openlane-signoff/spef/mprj_io_buffer.min.spef"
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],
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"nom_*": [
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"dir::/../../signoff/mprj_io_buffer/openlane-signoff/spef/mprj_io_buffer.nom.spef"
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],
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"max_*": [
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"dir::/../../signoff/mprj_io_buffer/openlane-signoff/spef/mprj_io_buffer.max.spef"
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]
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},
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"lib": {
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"*": [
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"dir::/../../lib/mprj_io_buffer.lib"
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]
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}
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},
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"gpio_defaults_block": {
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"gds": [
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"dir::/../../gds/gpio_defaults_block.gds.gz"
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],
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"lef": [
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"dir::/../../lef/gpio_defaults_block.lef"
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],
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"instances": {
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"gpio_defaults_block_0": {
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"location": [3137, 230],
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"orientation": "N"
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},
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"gpio_defaults_block_1": {
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"location": [3137, 460],
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"orientation": "N"
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},
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"gpio_defaults_block_2": {
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"location": [3137, 680],
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"orientation": "N"
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},
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"gpio_defaults_block_3": {
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"location": [3137, 910],
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"orientation": "N"
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},
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"gpio_defaults_block_4": {
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"location": [3137, 1130],
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"orientation": "N"
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},
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"gpio_defaults_block_5": {
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"location": [3137, 1350],
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"orientation": "N"
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},
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"gpio_defaults_block_6": {
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"location": [3137, 1590],
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"orientation": "N"
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},
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"gpio_defaults_block_7": {
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"location": [3137, 2460],
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"orientation": "N"
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},
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"gpio_defaults_block_8": {
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"location": [3137, 2700],
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"orientation": "N"
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},
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"gpio_defaults_block_9": {
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"location": [3137, 2920],
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"orientation": "N"
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},
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"gpio_defaults_block_10": {
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"location": [3137, 3150],
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"orientation": "N"
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},
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"gpio_defaults_block_11": {
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"location": [3137, 3380],
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"orientation": "N"
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},
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"gpio_defaults_block_12": {
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"location": [3137, 3600],
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"orientation": "N"
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},
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"gpio_defaults_block_13": {
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"location": [3137, 4030],
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"orientation": "N"
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},
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"gpio_defaults_block_14": {
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"location": [3137, 4480],
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"orientation": "N"
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},
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"gpio_defaults_block_15": {
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"location": [2922.66, 4653],
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"orientation": "N"
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},
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"gpio_defaults_block_16": {
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"location": [2622.66, 4653],
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"orientation": "N"
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},
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"gpio_defaults_block_17": {
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"location": [2322.66, 4653],
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"orientation": "N"
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},
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"gpio_defaults_block_18": {
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"location": [2022.66, 4653],
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"orientation": "N"
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},
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"gpio_defaults_block_19": {
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"location": [1722.66, 4653],
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"orientation": "N"
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},
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"gpio_defaults_block_20": {
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"location": [1422.66, 4653],
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"orientation": "N"
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},
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"gpio_defaults_block_21": {
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"location": [1122.66, 4653],
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"orientation": "N"
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},
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"gpio_defaults_block_22": {
|
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"location": [822.66, 4653],
|
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"orientation": "N"
|
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},
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"gpio_defaults_block_23": {
|
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"location": [522.66, 4653],
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"orientation": "N"
|
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},
|
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"gpio_defaults_block_24": {
|
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"location": [10, 4530],
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"orientation": "FN"
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},
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"gpio_defaults_block_25": {
|
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"location": [10, 3680],
|
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"orientation": "FN"
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},
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"gpio_defaults_block_26": {
|
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"location": [10, 3460],
|
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"orientation": "FN"
|
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},
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"gpio_defaults_block_27": {
|
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"location": [10, 3240],
|
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"orientation": "FN"
|
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},
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"gpio_defaults_block_28": {
|
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"location": [10, 3030],
|
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"orientation": "FN"
|
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},
|
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"gpio_defaults_block_29": {
|
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"location": [10, 2800],
|
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"orientation": "FN"
|
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},
|
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"gpio_defaults_block_30": {
|
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"location": [10, 2600],
|
||||
"orientation": "FN"
|
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},
|
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"gpio_defaults_block_31": {
|
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"location": [10, 2390],
|
||||
"orientation": "FN"
|
||||
},
|
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"gpio_defaults_block_32": {
|
||||
"location": [10, 1740],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_33": {
|
||||
"location": [10, 1530],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_34": {
|
||||
"location": [10, 1300],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_35": {
|
||||
"location": [10, 1090],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_36": {
|
||||
"location": [10, 870],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_37": {
|
||||
"location": [10, 660],
|
||||
"orientation": "FN"
|
||||
}
|
||||
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/rtl/gpio_defaults_block.v"
|
||||
]
|
||||
},
|
||||
"gpio_logic_high": {
|
||||
"gds": [
|
||||
"dir::/../../gds/gpio_logic_high.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/gpio_logic_high.lef"
|
||||
],
|
||||
"instances": {
|
||||
"gpio_control_bidir_1\\[0\\].gpio_logic_high": {
|
||||
"location": [3128.9, 200],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_1\\[1\\].gpio_logic_high": {
|
||||
"location": [3128.9, 430],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[0\\].gpio_logic_high": {
|
||||
"location": [3128.9, 650],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[1\\].gpio_logic_high": {
|
||||
"location": [3128.9, 880],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[2\\].gpio_logic_high": {
|
||||
"location": [3128.9, 1100],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[3\\].gpio_logic_high": {
|
||||
"location": [3128.9, 1320],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[4\\].gpio_logic_high": {
|
||||
"location": [3128.9, 1560],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[5\\].gpio_logic_high": {
|
||||
"location": [3128.9, 2430],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[0\\].gpio_logic_high": {
|
||||
"location": [3128.9, 2670],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[1\\].gpio_logic_high": {
|
||||
"location": [3128.9, 2890],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[2\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3120],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[3\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3350],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[4\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3570],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[5\\].gpio_logic_high": {
|
||||
"location": [3128.9, 4000],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[6\\].gpio_logic_high": {
|
||||
"location": [3128.9, 4450],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[7\\].gpio_logic_high": {
|
||||
"location": [2755, 4655],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_1\\[8\\].gpio_logic_high": {
|
||||
"location": [2355, 4655],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_1\\[9\\].gpio_logic_high": {
|
||||
"location": [2055, 4655],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_1\\[10\\].gpio_logic_high": {
|
||||
"location": [1755, 4655],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[0\\].gpio_logic_high": {
|
||||
"location": [1455, 4655],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[1\\].gpio_logic_high": {
|
||||
"location": [1155, 4655],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[2\\].gpio_logic_high": {
|
||||
"location": [955, 4655],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[3\\].gpio_logic_high": {
|
||||
"location": [555, 4655],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[4\\].gpio_logic_high": {
|
||||
"location": [255, 4655],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[5\\].gpio_logic_high": {
|
||||
"location": [11, 4500],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[6\\].gpio_logic_high": {
|
||||
"location": [11, 3650],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[7\\].gpio_logic_high": {
|
||||
"location": [11, 3430],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[8\\].gpio_logic_high": {
|
||||
"location": [11, 3210],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[9\\].gpio_logic_high": {
|
||||
"location": [11, 3000],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[10\\].gpio_logic_high": {
|
||||
"location": [11, 2770],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[11\\].gpio_logic_high": {
|
||||
"location": [11, 2570],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[12\\].gpio_logic_high": {
|
||||
"location": [11, 2360],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[13\\].gpio_logic_high": {
|
||||
"location": [11, 1710],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[14\\].gpio_logic_high": {
|
||||
"location": [11, 1500],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[15\\].gpio_logic_high": {
|
||||
"location": [11, 1270],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_2\\[0\\].gpio_logic_high": {
|
||||
"location": [11, 1060],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_2\\[1\\].gpio_logic_high": {
|
||||
"location": [11, 840],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_2\\[2\\].gpio_logic_high": {
|
||||
"location": [11, 630],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/gpio_logic_high.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/gpio_logic_high.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"mprj_logic_high": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mprj_logic_high.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mprj_logic_high.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mgmt_buffers.mprj_logic_high_inst": {
|
||||
"location": [1190.94, 900],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mprj_logic_high.v"
|
||||
]
|
||||
},
|
||||
"mprj2_logic_high": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mprj2_logic_high.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mprj2_logic_high.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mgmt_buffers.mprj2_logic_high_inst": {
|
||||
"location": [823, 900],
|
||||
"orientation": "FN"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mprj2_logic_high.v"
|
||||
]
|
||||
},
|
||||
"mgmt_protect_hv": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mgmt_protect_hv.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mgmt_protect_hv.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mgmt_buffers.powergood_check": {
|
||||
"location": [1794, 900],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mgmt_protect_hv.v"
|
||||
]
|
||||
},
|
||||
"caravel_clocking": {
|
||||
"gds": [
|
||||
"dir::/../../gds/caravel_clocking.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/caravel_clocking.lef"
|
||||
],
|
||||
"instances": {
|
||||
"clock_ctrl": {
|
||||
"location": [2793, 125],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/caravel_clocking.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/caravel_clocking/openlane-signoff/spef/caravel_clocking.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/caravel_clocking/openlane-signoff/spef/caravel_clocking.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/caravel_clocking/openlane-signoff/spef/caravel_clocking.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/caravel_clocking.lib"
|
||||
]
|
||||
}
|
||||
}
|
||||
},
|
||||
"FP_OBSTRUCTIONS": [
|
||||
[0, 1200, 3166, 1250],
|
||||
[0, 1300, 3166, 1350],
|
||||
[0, 1400, 3166, 1450],
|
||||
[0, 1500, 3166, 1550],
|
||||
[0, 1600, 3166, 1650],
|
||||
[0, 1700, 3166, 1750],
|
||||
[0, 1800, 3166, 1850],
|
||||
[0, 1900, 3166, 1950],
|
||||
[0, 2000, 3166, 2050],
|
||||
[0, 2100, 3166, 2150],
|
||||
[0, 2200, 3166, 2250],
|
||||
[0, 2300, 3166, 2350],
|
||||
[0, 2400, 3166, 2450],
|
||||
[0, 2500, 3166, 2550],
|
||||
[0, 2600, 3166, 2650],
|
||||
[0, 2700, 3166, 2750],
|
||||
[0, 2800, 3166, 2850],
|
||||
[0, 2900, 3166, 2950],
|
||||
[0, 3000, 3166, 3050],
|
||||
[0, 3100, 3166, 3150],
|
||||
[0, 3200, 3166, 3250],
|
||||
[0, 3300, 3166, 3350],
|
||||
[0, 3400, 3166, 3450],
|
||||
[0, 3500, 3166, 3550],
|
||||
[0, 3600, 3166, 3650],
|
||||
[0, 3700, 3166, 3750],
|
||||
[0, 3800, 3166, 3850],
|
||||
[0, 3900, 3166, 3950],
|
||||
[0, 4000, 3166, 4050],
|
||||
[0, 4100, 3166, 4150],
|
||||
[0, 4200, 3166, 4250],
|
||||
[0, 4300, 3166, 4350],
|
||||
[0, 4400, 3166, 4450],
|
||||
[0, 4500, 3166, 4550],
|
||||
[78, 1033, 3085, 1072],
|
||||
[78, 1072, 121, 4592],
|
||||
[78, 4592, 3085, 4630],
|
||||
[3042, 1072, 3085, 4592],
|
||||
[2650, 4661, 2745, 4712],
|
||||
[992, 0, 1071, 34],
|
||||
[2645, 0, 3075, 258]
|
||||
],
|
||||
"FP_MACRO_HORIZONTAL_HALO": 10,
|
||||
"FP_MACRO_VERTICAL_HALO": 10,
|
||||
|
||||
"//": "PDN",
|
||||
"FP_PDN_VERTICAL_HALO": 8,
|
||||
"FP_PDN_HORIZONTAL_HALO": 0,
|
||||
"PDN_CONNECT_MACROS_TO_GRID": true,
|
||||
"PDN_OBSTRUCTIONS": [
|
||||
"met4 77.11 1032.73 3085.99 4630.95",
|
||||
"met5 78.11 1033.73 3084.99 4629.95"
|
||||
],
|
||||
"PDN_CFG": "dir::/pdn_configuration/pdn.tcl",
|
||||
"met4 77.11 1032.73 3085.99 4630.95",
|
||||
"met5 77.52 1033.73 3086.58 4629.95",
|
||||
"met5 -16 125 120 207",
|
||||
"met5 -16 1987 120 2073",
|
||||
"met5 -16 2199 120 2283",
|
||||
"met5 -16 3920 120 4005",
|
||||
"met5 -16 4344 120 4431",
|
||||
"met5 3043 4321 3171.23 4406",
|
||||
"met5 3043 3873 3171.23 3960",
|
||||
"met5 3043 2302 3171.23 2387",
|
||||
"met5 3043 2082 3171.23 2167",
|
||||
"met5 3043 1859 3171.23 1945",
|
||||
"met4 992 -10 1071 122",
|
||||
"met4 2648 4631 2747 4772.41"
|
||||
],
|
||||
"FP_PDN_CFG": "dir::/pdn_configuration/pdn.tcl",
|
||||
"PDN_MACRO_CONNECTIONS": [
|
||||
"mprj vccd1 vssd1 vccd1 vssd1",
|
||||
"user_id_value vccd vssd VPWR VGND",
|
||||
"housekeeping vccd vssd VPWR VGND",
|
||||
"mprj vccd1 vssd1 vccd1 vssd1",
|
||||
"mprj vccd2 vssd2 vccd2 vssd2",
|
||||
"mprj vdda1 vssa1 vdda1 vssa1",
|
||||
"mprj vdda2 vssa2 vdda2 vssa2",
|
||||
"soc vccd vssd VPWR VGND",
|
||||
"mgmt_buffers.mprj_logic_high_inst vccd1 vssd1 vccd1 vssd1",
|
||||
"mgmt_buffers.mprj2_logic_high_inst vccd2 vssd2 vccd2 vssd2",
|
||||
"mgmt_buffers.powergood_check vccd vssd vccd vssd",
|
||||
"mgmt_buffers.powergood_check vdda1 vssa1 vdda1 vssa1",
|
||||
"mgmt_buffers.powergood_check vdda2 vssa2 vdda2 vssa2",
|
||||
"gpio_control.* vccd1 vssd1 vccd1 vssd1",
|
||||
"spare_logic.* vccd vssd vccd vssd",
|
||||
"clock_ctrl vccd vssd VPWR VGND",
|
||||
"por vddio vssio vdd3v3 vss3v3",
|
||||
"por vccd vssd vdd1v8 vss1v8",
|
||||
"rstb_level vddio vssio VPWR VGND",
|
||||
"rstb_level vccd vssd LVPWR LVGND"
|
||||
],
|
||||
"FP_PDN_CORE_RING": true,
|
||||
"FP_PDN_SKIPTRIM": true,
|
||||
"FP_PDN_CORE_RING_VWIDTH": 10,
|
||||
|
|
@ -746,36 +192,51 @@
|
|||
"GND_NETS": ["vssd", "vssd1", "vssd2", "vssa1", "vssa2", "vssio"],
|
||||
|
||||
"//": "PLACEMENT",
|
||||
"PL_TIME_DRIVEN": true,
|
||||
"PL_TARGET_DENSITY_PCT": 32,
|
||||
"PL_TIME_DRIVEN": false,
|
||||
"PL_ROUTABILITY_DRIVEN": true,
|
||||
"PL_WIRE_LENGTH_COEF": 0.01,
|
||||
"PL_TARGET_DENSITY_PCT": 29,
|
||||
"PL_RESIZER_DESIGN_OPTIMIZATIONS": true,
|
||||
"PL_RESIZER_TIMING_OPTIMIZATIONS": true,
|
||||
"PL_RESIZER_HOLD_SLACK_MARGIN": 0.1,
|
||||
"DESIGN_REPAIR_MAX_SLEW_PCT": 10,
|
||||
"DESIGN_REPAIR_MAX_CAP_PCT": 10,
|
||||
"DESIGN_REPAIR_MAX_WIRE_LENGTH": 1100,
|
||||
"DESIGN_REPAIR_MAX_WIRE_LENGTH": 1200,
|
||||
|
||||
"//": "CTS",
|
||||
"CTS_MAX_CAP": 0.3,
|
||||
"CTS_MAX_CAP": 0.80,
|
||||
"CTS_CLK_MAX_WIRE_LENGTH": 800,
|
||||
"CTS_SINK_CLUSTERING_SIZE": 30,
|
||||
"CTS_SINK_CLUSTERING_MAX_DIAMETER": 140,
|
||||
"CTS_SINK_CLUSTERING_SIZE": 1,
|
||||
"CTS_SINK_CLUSTERING_MAX_DIAMETER": 50,
|
||||
"CTS_CLK_BUFFERS": ["sky130_fd_sc_hd__clkbuf_8", "sky130_fd_sc_hd__clkbuf_4"],
|
||||
|
||||
"//": "ROUTING",
|
||||
"RT_CLOCK_MIN_LAYER": "met3",
|
||||
"DRT_THREADS": 24,
|
||||
"GRT_ADJUSTMENT": 0.02,
|
||||
"DRT_THREADS": 20,
|
||||
"GRT_ADJUSTMENT": 0.10,
|
||||
"GRT_ALLOW_CONGESTION": true,
|
||||
"GLB_RESIZER_TIMING_OPTIMIZATIONS": true,
|
||||
"GRT_RESIZER_HOLD_SLACK_MARGIN": 0.05,
|
||||
"GRT_RESIZER_SETUP_SLACK_MARGIN": 0.2,
|
||||
"GRT_DESIGN_REPAIR_MAX_WIRE_LENGTH": 1100,
|
||||
"GRT_ANTENNA_ITERS": 50,
|
||||
"GRT_DESIGN_REPAIR_MAX_WIRE_LENGTH": 3000,
|
||||
"GRT_ANTENNA_ITERS": 10,
|
||||
"ROUTING_OBSTRUCTIONS": [
|
||||
"met3 672 33 700 40",
|
||||
"met3 2648.72 150.82 2737.92 154.625",
|
||||
"met4 2655.52 147.27 2730.32 152.455"
|
||||
],
|
||||
|
||||
"DEFAULT_CORNER": "max_ss_100C_1v60",
|
||||
|
||||
"//": "DONT TOUCH",
|
||||
"RSZ_DONT_TOUCH_RX": "analog_io|rstb_h|porb_h|serial_clock_out|serial_load_out|ringosc|mgmt_buffers.la_data_out_core|mprj_ack_i_user|mprj_dat_i_user|user_irq_core",
|
||||
"RSZ_DONT_TOUCH_RX": "analog_io|rstb_h|porb_h|serial_clock_out|serial_load_out|ringosc|mgmt_buffers.la_data_out_core|mprj_ack_i_user|mprj_dat_i_user|user_irq_core|user_io_out|user_io_oeb",
|
||||
|
||||
"//": "MAGIC",
|
||||
"MAGIC_CAPTURE_ERRORS": false,
|
||||
"MAGIC_DEF_LABELS": false
|
||||
"MAGIC_DEF_LABELS": false,
|
||||
"MAGIC_EXT_USE_GDS": true,
|
||||
"ERROR_ON_MAGIC_DRC": false,
|
||||
|
||||
"//": "netgen",
|
||||
"ERROR_ON_LVS_ERROR": false
|
||||
}
|
||||
|
|
@ -0,0 +1,761 @@
|
|||
{
|
||||
"//": "MACROS",
|
||||
"MACROS": {
|
||||
"mgmt_core_wrapper": {
|
||||
"gds": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/gds/mgmt_core_wrapper.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/lef/mgmt_core_wrapper.lef"
|
||||
],
|
||||
"instances": {
|
||||
"soc": {
|
||||
"location": [85, 109.6],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/verilog/gl/mgmt_core_wrapper.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/spef/multicorner/mgmt_core_wrapper.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/spef/multicorner/mgmt_core_wrapper.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/spef/multicorner/mgmt_core_wrapper.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/lib/mgmt_core_wrapper.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
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|
||||
"dir::/../../lib/user_project_wrapper.lib"
|
||||
]
|
||||
}
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
],
|
||||
"spef": {
|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"lib": {
|
||||
"*": [
|
||||
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|
||||
]
|
||||
}
|
||||
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|
||||
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|
||||
"gds": [
|
||||
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|
||||
],
|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
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|
||||
"location": [2663, 111],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
]
|
||||
},
|
||||
"xres_buf": {
|
||||
"gds": [
|
||||
"dir::/../../gds/xres_buf.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/xres_buf.lef"
|
||||
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|
||||
"instances": {
|
||||
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|
||||
"location": [683.62, 26],
|
||||
"orientation": "S"
|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
]
|
||||
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|
||||
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|
||||
"gds": [
|
||||
"dir::/../../gds/spare_logic_block.gds.gz"
|
||||
],
|
||||
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|
||||
"dir::/../../lef/spare_logic_block.lef"
|
||||
],
|
||||
"instances": {
|
||||
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|
||||
"location": [454, 900],
|
||||
"orientation": "N"
|
||||
},
|
||||
"spare_logic\\[1\\]": {
|
||||
"location": [2720, 900],
|
||||
"orientation": "N"
|
||||
},
|
||||
"spare_logic\\[2\\]": {
|
||||
"location": [2366, 902.48],
|
||||
"orientation": "N"
|
||||
},
|
||||
"spare_logic\\[3\\]": {
|
||||
"location": [2800, 900],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
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|
||||
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|
||||
"gds": [
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
"gpio_defaults_block_1": {
|
||||
"location": [3137, 460],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_2": {
|
||||
"location": [3137, 680],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_3": {
|
||||
"location": [3137, 910],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_4": {
|
||||
"location": [3137, 1130],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_5": {
|
||||
"location": [3137, 1375],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_6": {
|
||||
"location": [3137, 1575],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_7": {
|
||||
"location": [3137, 2475],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_8": {
|
||||
"location": [3137, 2675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_9": {
|
||||
"location": [3137, 2875],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_10": {
|
||||
"location": [3137, 3175],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_11": {
|
||||
"location": [3137, 3375],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_12": {
|
||||
"location": [3137, 3575],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_13": {
|
||||
"location": [3137, 3975],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_14": {
|
||||
"location": [3137, 4475],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_15": {
|
||||
"location": [2922.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_16": {
|
||||
"location": [2622.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_17": {
|
||||
"location": [2322.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_18": {
|
||||
"location": [2022.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_19": {
|
||||
"location": [1722.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_20": {
|
||||
"location": [1422.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_21": {
|
||||
"location": [1122.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_22": {
|
||||
"location": [822.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_23": {
|
||||
"location": [522.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_24": {
|
||||
"location": [10, 4475],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_25": {
|
||||
"location": [10, 3675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_26": {
|
||||
"location": [10, 3476],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_27": {
|
||||
"location": [10, 3175],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_28": {
|
||||
"location": [10, 2975],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_29": {
|
||||
"location": [10, 2777],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_30": {
|
||||
"location": [10, 2575],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_31": {
|
||||
"location": [10, 2375],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_32": {
|
||||
"location": [10, 1750],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_33": {
|
||||
"location": [10, 1550],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_34": {
|
||||
"location": [10, 1275],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_35": {
|
||||
"location": [10, 1090],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_36": {
|
||||
"location": [10, 870],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_37": {
|
||||
"location": [10, 660],
|
||||
"orientation": "FN"
|
||||
}
|
||||
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/rtl/gpio_defaults_block.v"
|
||||
]
|
||||
},
|
||||
"gpio_logic_high": {
|
||||
"gds": [
|
||||
"dir::/../../gds/gpio_logic_high.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/gpio_logic_high.lef"
|
||||
],
|
||||
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|
||||
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|
||||
"location": [3128.9, 200],
|
||||
"orientation": "N"
|
||||
},
|
||||
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|
||||
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|
||||
"orientation": "N"
|
||||
},
|
||||
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|
||||
"location": [3128.9, 650],
|
||||
"orientation": "N"
|
||||
},
|
||||
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|
||||
"location": [3128.9, 880],
|
||||
"orientation": "N"
|
||||
},
|
||||
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|
||||
"location": [3128.9, 1100],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[3\\].gpio_logic_high": {
|
||||
"location": [3128.9, 1345],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[4\\].gpio_logic_high": {
|
||||
"location": [3128.9, 1545],
|
||||
"orientation": "N"
|
||||
},
|
||||
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|
||||
"location": [3128.9, 2445],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[0\\].gpio_logic_high": {
|
||||
"location": [3128.9, 2645],
|
||||
"orientation": "N"
|
||||
},
|
||||
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|
||||
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|
||||
"orientation": "N"
|
||||
},
|
||||
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|
||||
"location": [3128.9, 3145],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[3\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3345],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[4\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3545],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[5\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3945],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[6\\].gpio_logic_high": {
|
||||
"location": [3128.9, 4445],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[7\\].gpio_logic_high": {
|
||||
"location": [2755, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_1\\[8\\].gpio_logic_high": {
|
||||
"location": [2355, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_1\\[9\\].gpio_logic_high": {
|
||||
"location": [2055, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_1\\[10\\].gpio_logic_high": {
|
||||
"location": [1755, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[0\\].gpio_logic_high": {
|
||||
"location": [1455, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[1\\].gpio_logic_high": {
|
||||
"location": [1155, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[2\\].gpio_logic_high": {
|
||||
"location": [955, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[3\\].gpio_logic_high": {
|
||||
"location": [555, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[4\\].gpio_logic_high": {
|
||||
"location": [255, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[5\\].gpio_logic_high": {
|
||||
"location": [11, 4445],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[6\\].gpio_logic_high": {
|
||||
"location": [11, 3645],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[7\\].gpio_logic_high": {
|
||||
"location": [11, 3446],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[8\\].gpio_logic_high": {
|
||||
"location": [11, 3145],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[9\\].gpio_logic_high": {
|
||||
"location": [11, 2945],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[10\\].gpio_logic_high": {
|
||||
"location": [11, 2747],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[11\\].gpio_logic_high": {
|
||||
"location": [11, 2545],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[12\\].gpio_logic_high": {
|
||||
"location": [11, 2345],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[13\\].gpio_logic_high": {
|
||||
"location": [11, 1680],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[14\\].gpio_logic_high": {
|
||||
"location": [11, 1484],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[15\\].gpio_logic_high": {
|
||||
"location": [11, 1245],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_2\\[0\\].gpio_logic_high": {
|
||||
"location": [11, 1060],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_2\\[1\\].gpio_logic_high": {
|
||||
"location": [11, 840],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_2\\[2\\].gpio_logic_high": {
|
||||
"location": [11, 630],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/gpio_logic_high.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/gpio_logic_high.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"mprj_logic_high": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mprj_logic_high.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mprj_logic_high.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mgmt_buffers.mprj_logic_high_inst": {
|
||||
"location": [1190.94, 930],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mprj_logic_high.v"
|
||||
]
|
||||
},
|
||||
"mprj2_logic_high": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mprj2_logic_high.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mprj2_logic_high.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mgmt_buffers.mprj2_logic_high_inst": {
|
||||
"location": [823, 930],
|
||||
"orientation": "FN"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mprj2_logic_high.v"
|
||||
]
|
||||
},
|
||||
"mgmt_protect_hv": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mgmt_protect_hv.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mgmt_protect_hv.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mgmt_buffers.powergood_check": {
|
||||
"location": [1794, 930],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mgmt_protect_hv.v"
|
||||
]
|
||||
},
|
||||
"caravel_clocking": {
|
||||
"gds": [
|
||||
"dir::/../../gds/caravel_clocking.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/caravel_clocking.lef"
|
||||
],
|
||||
"instances": {
|
||||
"clock_ctrl": {
|
||||
"location": [2747, 9.40],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/caravel_clocking.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/caravel_clocking/openlane-signoff/spef/caravel_clocking.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/caravel_clocking/openlane-signoff/spef/caravel_clocking.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/caravel_clocking/openlane-signoff/spef/caravel_clocking.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/caravel_clocking.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"digital_locked_loop": {
|
||||
"gds": [
|
||||
"dir::/../../gds/digital_locked_loop.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/digital_locked_loop.lef"
|
||||
],
|
||||
"instances": {
|
||||
"pll": {
|
||||
"location": [2800, 145],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/digital_locked_loop.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/digital_locked_loop/openlane-signoff/spef/digital_locked_loop.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/digital_locked_loop/openlane-signoff/spef/digital_locked_loop.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/digital_locked_loop/openlane-signoff/spef/digital_locked_loop.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/digital_locked_loop.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"mprj_vias": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mprj_vias.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mprj_vias.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mprj_vias": {
|
||||
"location": [121.74, 1072],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mprj_vias.v"
|
||||
]
|
||||
},
|
||||
"manual_power_connections": {
|
||||
"gds": [
|
||||
"dir::/../../gds/manual_power_connections.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/manual_power_connections.lef"
|
||||
],
|
||||
"instances": {
|
||||
"manual_power_connections": {
|
||||
"location": [0, 0],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/manual_power_connections.v"
|
||||
]
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,705 @@
|
|||
{
|
||||
"//": "MACROS",
|
||||
"MACROS": {
|
||||
"mgmt_core_wrapper": {
|
||||
"gds": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/gds/mgmt_core_wrapper.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/lef/mgmt_core_wrapper.lef"
|
||||
],
|
||||
"instances": {
|
||||
"soc": {
|
||||
"location": [85, 109.6],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/verilog/gl/mgmt_core_wrapper.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/spef/multicorner/mgmt_core_wrapper.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/spef/multicorner/mgmt_core_wrapper.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/spef/multicorner/mgmt_core_wrapper.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../../caravel_mgmt_soc_litex/lib/mgmt_core_wrapper.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"user_id_programming": {
|
||||
"gds": [
|
||||
"dir::/../../gds/user_id_programming.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/user_id_programming.lef"
|
||||
],
|
||||
"instances": {
|
||||
"user_id_value": {
|
||||
"location": [2962.655, 108],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/rtl/user_id_programming.v"
|
||||
]
|
||||
},
|
||||
"user_project_wrapper": {
|
||||
"gds": [
|
||||
"dir::/../../gds/user_project_wrapper_empty.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/user_project_wrapper_empty.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mprj": {
|
||||
"location": [121.74, 1072],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/rtl/defines.v",
|
||||
"dir::/../../verilog/rtl/__user_project_wrapper.v"
|
||||
],
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/user_project_wrapper.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"housekeeping_alt": {
|
||||
"gds": [
|
||||
"dir::/../../gds/housekeeping_alt.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/housekeeping_alt.lef"
|
||||
],
|
||||
"instances": {
|
||||
"housekeeping": {
|
||||
"location": [2665, 257.52],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/housekeeping_alt.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/housekeeping_alt/openlane-signoff/spef/housekeeping_alt.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/housekeeping_alt/openlane-signoff/spef/housekeeping_alt.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/housekeeping_alt/openlane-signoff/spef/housekeeping_alt.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/housekeeping_alt.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"simple_por": {
|
||||
"gds": [
|
||||
"dir::/../../gds/simple_por.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/simple_por.lef"
|
||||
],
|
||||
"instances": {
|
||||
"por": {
|
||||
"location": [2663, 111],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/rtl/simple_por.v"
|
||||
]
|
||||
},
|
||||
"xres_buf": {
|
||||
"gds": [
|
||||
"dir::/../../gds/xres_buf.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/xres_buf.lef"
|
||||
],
|
||||
"instances": {
|
||||
"rstb_level": {
|
||||
"location": [683.62, 26],
|
||||
"orientation": "S"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/rtl/xres_buf.v"
|
||||
]
|
||||
},
|
||||
"spare_logic_block": {
|
||||
"gds": [
|
||||
"dir::/../../gds/spare_logic_block.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/spare_logic_block.lef"
|
||||
],
|
||||
"instances": {
|
||||
"spare_logic\\[0\\]": {
|
||||
"location": [454, 900],
|
||||
"orientation": "N"
|
||||
},
|
||||
"spare_logic\\[1\\]": {
|
||||
"location": [2720, 900],
|
||||
"orientation": "N"
|
||||
},
|
||||
"spare_logic\\[2\\]": {
|
||||
"location": [2366, 902.48],
|
||||
"orientation": "N"
|
||||
},
|
||||
"spare_logic\\[3\\]": {
|
||||
"location": [2800, 900],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/spare_logic_block.v"
|
||||
]
|
||||
},
|
||||
"mprj_io_buffer": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mprj_io_buffer.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mprj_io_buffer.lef"
|
||||
],
|
||||
"instances": {
|
||||
"gpio_buf": {
|
||||
"location": [80, 940],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mprj_io_buffer.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/mprj_io_buffer/openlane-signoff/spef/mprj_io_buffer.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/mprj_io_buffer/openlane-signoff/spef/mprj_io_buffer.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/mprj_io_buffer/openlane-signoff/spef/mprj_io_buffer.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/mprj_io_buffer.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"gpio_defaults_block": {
|
||||
"gds": [
|
||||
"dir::/../../gds/gpio_defaults_block.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/gpio_defaults_block.lef"
|
||||
],
|
||||
"instances": {
|
||||
"gpio_defaults_block_0": {
|
||||
"location": [3137, 230],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_1": {
|
||||
"location": [3137, 460],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_2": {
|
||||
"location": [3137, 680],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_3": {
|
||||
"location": [3137, 910],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_4": {
|
||||
"location": [3137, 1130],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_5": {
|
||||
"location": [3137, 1375],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_6": {
|
||||
"location": [3137, 1575],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_7": {
|
||||
"location": [3137, 2475],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_8": {
|
||||
"location": [3137, 2675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_9": {
|
||||
"location": [3137, 2875],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_10": {
|
||||
"location": [3137, 3175],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_11": {
|
||||
"location": [3137, 3375],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_12": {
|
||||
"location": [3137, 3575],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_13": {
|
||||
"location": [3137, 3975],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_14": {
|
||||
"location": [3137, 4475],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_15": {
|
||||
"location": [2922.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_16": {
|
||||
"location": [2622.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_17": {
|
||||
"location": [2322.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_18": {
|
||||
"location": [2022.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_19": {
|
||||
"location": [1722.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_20": {
|
||||
"location": [1422.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_21": {
|
||||
"location": [1122.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_22": {
|
||||
"location": [822.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_23": {
|
||||
"location": [522.66, 4675],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_defaults_block_24": {
|
||||
"location": [10, 4475],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_25": {
|
||||
"location": [10, 3675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_26": {
|
||||
"location": [10, 3476],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_27": {
|
||||
"location": [10, 3175],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_28": {
|
||||
"location": [10, 2975],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_29": {
|
||||
"location": [10, 2777],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_30": {
|
||||
"location": [10, 2575],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_31": {
|
||||
"location": [10, 2375],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_32": {
|
||||
"location": [10, 1750],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_33": {
|
||||
"location": [10, 1550],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_34": {
|
||||
"location": [10, 1275],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_35": {
|
||||
"location": [10, 1090],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_36": {
|
||||
"location": [10, 870],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_defaults_block_37": {
|
||||
"location": [10, 660],
|
||||
"orientation": "FN"
|
||||
}
|
||||
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/rtl/gpio_defaults_block.v"
|
||||
]
|
||||
},
|
||||
"gpio_logic_high": {
|
||||
"gds": [
|
||||
"dir::/../../gds/gpio_logic_high.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/gpio_logic_high.lef"
|
||||
],
|
||||
"instances": {
|
||||
"gpio_control_bidir_1\\[0\\].gpio_logic_high": {
|
||||
"location": [3128.9, 200],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_1\\[1\\].gpio_logic_high": {
|
||||
"location": [3128.9, 430],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[0\\].gpio_logic_high": {
|
||||
"location": [3128.9, 650],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[1\\].gpio_logic_high": {
|
||||
"location": [3128.9, 880],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[2\\].gpio_logic_high": {
|
||||
"location": [3128.9, 1100],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[3\\].gpio_logic_high": {
|
||||
"location": [3128.9, 1345],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[4\\].gpio_logic_high": {
|
||||
"location": [3128.9, 1545],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1a\\[5\\].gpio_logic_high": {
|
||||
"location": [3128.9, 2445],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[0\\].gpio_logic_high": {
|
||||
"location": [3128.9, 2645],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[1\\].gpio_logic_high": {
|
||||
"location": [3128.9, 2845],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[2\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3145],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[3\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3345],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[4\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3545],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[5\\].gpio_logic_high": {
|
||||
"location": [3128.9, 3945],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[6\\].gpio_logic_high": {
|
||||
"location": [3128.9, 4445],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_1\\[7\\].gpio_logic_high": {
|
||||
"location": [2755, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_1\\[8\\].gpio_logic_high": {
|
||||
"location": [2355, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_1\\[9\\].gpio_logic_high": {
|
||||
"location": [2055, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_1\\[10\\].gpio_logic_high": {
|
||||
"location": [1755, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[0\\].gpio_logic_high": {
|
||||
"location": [1455, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[1\\].gpio_logic_high": {
|
||||
"location": [1155, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[2\\].gpio_logic_high": {
|
||||
"location": [955, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[3\\].gpio_logic_high": {
|
||||
"location": [555, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[4\\].gpio_logic_high": {
|
||||
"location": [255, 4675],
|
||||
"orientation": "FN"
|
||||
},
|
||||
"gpio_control_in_2\\[5\\].gpio_logic_high": {
|
||||
"location": [11, 4445],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[6\\].gpio_logic_high": {
|
||||
"location": [11, 3645],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[7\\].gpio_logic_high": {
|
||||
"location": [11, 3446],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[8\\].gpio_logic_high": {
|
||||
"location": [11, 3145],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[9\\].gpio_logic_high": {
|
||||
"location": [11, 2945],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[10\\].gpio_logic_high": {
|
||||
"location": [11, 2747],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[11\\].gpio_logic_high": {
|
||||
"location": [11, 2545],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[12\\].gpio_logic_high": {
|
||||
"location": [11, 2345],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[13\\].gpio_logic_high": {
|
||||
"location": [11, 1680],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[14\\].gpio_logic_high": {
|
||||
"location": [11, 1484],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_in_2\\[15\\].gpio_logic_high": {
|
||||
"location": [11, 1245],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_2\\[0\\].gpio_logic_high": {
|
||||
"location": [11, 1060],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_2\\[1\\].gpio_logic_high": {
|
||||
"location": [11, 840],
|
||||
"orientation": "N"
|
||||
},
|
||||
"gpio_control_bidir_2\\[2\\].gpio_logic_high": {
|
||||
"location": [11, 630],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/gpio_logic_high.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/gpio_logic_high.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"mprj_logic_high": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mprj_logic_high.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mprj_logic_high.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mgmt_buffers.mprj_logic_high_inst": {
|
||||
"location": [1190.94, 930],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mprj_logic_high.v"
|
||||
]
|
||||
},
|
||||
"mprj2_logic_high": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mprj2_logic_high.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mprj2_logic_high.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mgmt_buffers.mprj2_logic_high_inst": {
|
||||
"location": [823, 930],
|
||||
"orientation": "FN"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mprj2_logic_high.v"
|
||||
]
|
||||
},
|
||||
"mgmt_protect_hv": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mgmt_protect_hv.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mgmt_protect_hv.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mgmt_buffers.powergood_check": {
|
||||
"location": [1794, 930],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mgmt_protect_hv.v"
|
||||
]
|
||||
},
|
||||
"caravel_clocking": {
|
||||
"gds": [
|
||||
"dir::/../../gds/caravel_clocking.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/caravel_clocking.lef"
|
||||
],
|
||||
"instances": {
|
||||
"clock_ctrl": {
|
||||
"location": [2747, 9.40],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/caravel_clocking.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/caravel_clocking/openlane-signoff/spef/caravel_clocking.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/caravel_clocking/openlane-signoff/spef/caravel_clocking.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/caravel_clocking/openlane-signoff/spef/caravel_clocking.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/caravel_clocking.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"digital_locked_loop": {
|
||||
"gds": [
|
||||
"dir::/../../gds/digital_locked_loop.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/digital_locked_loop.lef"
|
||||
],
|
||||
"instances": {
|
||||
"pll": {
|
||||
"location": [2800, 145],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/digital_locked_loop.v"
|
||||
],
|
||||
"spef": {
|
||||
"min_*": [
|
||||
"dir::/../../signoff/digital_locked_loop/openlane-signoff/spef/digital_locked_loop.min.spef"
|
||||
],
|
||||
"nom_*": [
|
||||
"dir::/../../signoff/digital_locked_loop/openlane-signoff/spef/digital_locked_loop.nom.spef"
|
||||
],
|
||||
"max_*": [
|
||||
"dir::/../../signoff/digital_locked_loop/openlane-signoff/spef/digital_locked_loop.max.spef"
|
||||
]
|
||||
},
|
||||
"lib": {
|
||||
"*": [
|
||||
"dir::/../../lib/digital_locked_loop.lib"
|
||||
]
|
||||
}
|
||||
},
|
||||
"mprj_vias": {
|
||||
"gds": [
|
||||
"dir::/../../gds/mprj_vias.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/mprj_vias.lef"
|
||||
],
|
||||
"instances": {
|
||||
"mprj_vias": {
|
||||
"location": [121.74, 1072],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/mprj_vias.v"
|
||||
]
|
||||
},
|
||||
"manual_power_connections": {
|
||||
"gds": [
|
||||
"dir::/../../gds/manual_power_connections.gds.gz"
|
||||
],
|
||||
"lef": [
|
||||
"dir::/../../lef/manual_power_connections.lef"
|
||||
],
|
||||
"instances": {
|
||||
"manual_power_connections": {
|
||||
"location": [0, 0],
|
||||
"orientation": "N"
|
||||
}
|
||||
},
|
||||
"nl": [
|
||||
"dir::/../../verilog/gl/manual_power_connections.v"
|
||||
]
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
export RUN_TAG=RUN_15
|
||||
rm -rf /home/hosni/caravel-3/caravel/openlane/caravel_core/runs/$RUN_TAG
|
||||
export DEFINE_CLOCKS=0 ; python3 -m openlane /home/hosni/caravel-3/caravel/openlane/caravel_core/config.json /home/hosni/caravel-3/caravel/openlane/caravel_core/macros.json --run-tag $RUN_TAG --to OpenROAD.CTS --log-level WARNING
|
||||
export DEFINE_CLOCKS=1 ; python3 -m openlane /home/hosni/caravel-3/caravel/openlane/caravel_core/config.json /home/hosni/caravel-3/caravel/openlane/caravel_core/macros.json --run-tag $RUN_TAG --from OpenROAD.ResizerTimingPostCTS --to OpenROAD.RCX --log-level WARNING
|
||||
python3 -m openlane /home/hosni/caravel-3/caravel/openlane/caravel_core/config.json /home/hosni/caravel-3/caravel/openlane/caravel_core/macros-sta.json --run-tag $RUN_TAG --from OpenROAD.STAPostPNR --log-level WARNING
|
||||
|
|
@ -43,11 +43,11 @@ foreach vdd $::env(VDD_NETS) gnd $::env(GND_NETS) {
|
|||
set_voltage_domain -name CORE -power $::env(VDD_NET) -ground $::env(GND_NET) \
|
||||
-secondary_power $secondary
|
||||
|
||||
define_pdn_grid \
|
||||
-name stdcell_grid \
|
||||
-starts_with POWER \
|
||||
-voltage_domain CORE \
|
||||
-pins "met4 met5"
|
||||
define_pdn_grid \
|
||||
-name stdcell_grid \
|
||||
-starts_with POWER \
|
||||
-voltage_domain CORE \
|
||||
-pins "met3 met4 met5"
|
||||
|
||||
#### core ring ####
|
||||
add_pdn_stripe \
|
||||
|
|
@ -130,7 +130,7 @@ add_pdn_stripe \
|
|||
-layer met5 \
|
||||
-width 6.4 \
|
||||
-pitch 100 \
|
||||
-offset 200 \
|
||||
-offset 205 \
|
||||
-spacing 2.4 \
|
||||
-nets "vccd vssd" \
|
||||
-starts_with POWER
|
||||
|
|
@ -162,7 +162,7 @@ add_pdn_stripe \
|
|||
-layer met5 \
|
||||
-width 4.8 \
|
||||
-pitch 120 \
|
||||
-offset 827 \
|
||||
-offset 844.3 \
|
||||
-spacing 3.2 \
|
||||
-number_of_straps 1 \
|
||||
-nets "vccd1 vssd1 vccd2 vssd2 vdda1 vssa1 vdda2 vssa2" \
|
||||
|
|
@ -248,9 +248,9 @@ add_pdn_stripe \
|
|||
add_pdn_stripe \
|
||||
-grid stdcell_grid \
|
||||
-layer met5 \
|
||||
-width 5 \
|
||||
-pitch 14 \
|
||||
-offset 137 \
|
||||
-width 6 \
|
||||
-pitch 34 \
|
||||
-offset 110.5 \
|
||||
-spacing 2 \
|
||||
-number_of_straps 2 \
|
||||
-nets "vddio vssio" \
|
||||
|
|
@ -260,17 +260,42 @@ add_pdn_stripe \
|
|||
-layer met4 \
|
||||
-width 4.8 \
|
||||
-pitch 386 \
|
||||
-offset 647 \
|
||||
-offset 2641 \
|
||||
-spacing 2 \
|
||||
-number_of_straps 2 \
|
||||
-nets "vddio vssio" \
|
||||
-starts_with POWER
|
||||
add_pdn_stripe \
|
||||
-grid stdcell_grid \
|
||||
-layer met4 \
|
||||
-width 4.8 \
|
||||
-pitch 386 \
|
||||
-offset 665 \
|
||||
-spacing 2 \
|
||||
-number_of_straps 2 \
|
||||
-nets "vddio vssio" \
|
||||
-starts_with POWER
|
||||
|
||||
## mprj connections
|
||||
add_pdn_stripe \
|
||||
-grid stdcell_grid \
|
||||
-layer met3 \
|
||||
-width 2.4 \
|
||||
-pitch 100 \
|
||||
-offset 1200 \
|
||||
-spacing 2 \
|
||||
-number_of_straps 34 \
|
||||
-nets "vccd1 vssd1 vccd2 vssd2 vssa1 vdda1 vdda2 vssa2" \
|
||||
-starts_with POWER
|
||||
|
||||
add_pdn_connect \
|
||||
-grid stdcell_grid \
|
||||
-layers "met4 met5"
|
||||
|
||||
add_pdn_connect \
|
||||
-grid stdcell_grid \
|
||||
-layers "met3 met4"
|
||||
|
||||
# Adds the standard cell rails if enabled.
|
||||
if { $::env(FP_PDN_ENABLE_RAILS) == 1 } {
|
||||
add_pdn_stripe \
|
||||
|
|
@ -290,7 +315,7 @@ define_pdn_grid \
|
|||
-default \
|
||||
-name macro \
|
||||
-starts_with POWER \
|
||||
-halo "5 5"
|
||||
-halo "1 0.8"
|
||||
|
||||
add_pdn_connect \
|
||||
-grid macro \
|
||||
|
|
|
|||
|
|
@ -1,26 +1,42 @@
|
|||
### Caravel Signoff SDC
|
||||
### Caravel base SDC
|
||||
### Rev 3
|
||||
### Date: 28/10/2022
|
||||
### Date: 3/12/2022
|
||||
|
||||
## MASTER CLOCKS
|
||||
create_clock -name clk -period 18 [get_pins {clock_ctrl/core_clk}]
|
||||
# create_clock -name clk -period 25 [get_ports {clock_core}]
|
||||
if {$::env(DEFINE_CLOCKS) == 1} {
|
||||
## MASTER CLOCKS
|
||||
# create_clock -name clk -period 25 [get_ports {clock_core}]
|
||||
create_clock -name clk -period 25 [get_pins {clock_ctrl/core_clk}]
|
||||
|
||||
set_clock_uncertainty 0.5 [get_clocks {clk}]
|
||||
create_clock -name hk_serial_clk -period 50 [get_pins {housekeeping/serial_clock}]
|
||||
create_clock -name hk_serial_load -period 1000 [get_pins {housekeeping/serial_load}]
|
||||
# hk_serial_clk period is x2 core clock
|
||||
|
||||
set_propagated_clock [get_clocks {clk}]
|
||||
set_clock_uncertainty 0.200 [get_clocks {clk}]
|
||||
set_clock_uncertainty 0.100 [get_clocks {hk_serial_clk hk_serial_load}]
|
||||
|
||||
## INPUT/OUTPUT DELAYS
|
||||
set input_delay_value 4
|
||||
set output_delay_value 20
|
||||
puts "\[INFO\]: Setting output delay to: $output_delay_value"
|
||||
puts "\[INFO\]: Setting input delay to: $input_delay_value"
|
||||
# set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [all_inputs]
|
||||
set_input_delay 0 -clock [get_clocks {clk}] [get_ports {clock_core}]
|
||||
set_input_delay 1 -clock [get_clocks {clk}] [get_ports {flash_io0_di}]
|
||||
set_input_delay 1 -clock [get_clocks {clk}] [get_ports {flash_io1_di}]
|
||||
set_clock_groups \
|
||||
-name clock_group \
|
||||
-logically_exclusive \
|
||||
-group [get_clocks {clk}]\
|
||||
-group [get_clocks {hk_serial_clk}]\
|
||||
-group [get_clocks {hk_serial_load}]
|
||||
|
||||
# set_output_delay $output_delay_value -clock [get_clocks {clk}] -add_delay [all_outputs]
|
||||
set_propagated_clock [get_clocks {clk}]
|
||||
set_propagated_clock [get_clocks {hk_serial_clk}]
|
||||
set_propagated_clock [get_clocks {hk_serial_load}]
|
||||
|
||||
## INPUT/OUTPUT DELAYS
|
||||
set input_delay_value 4
|
||||
set output_delay_value 20
|
||||
puts "\[INFO\]: Setting output delay to: $output_delay_value"
|
||||
puts "\[INFO\]: Setting input delay to: $input_delay_value"
|
||||
set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [all_inputs]
|
||||
set_input_delay 0 -clock [get_clocks {clk}] [get_ports {clock_core}]
|
||||
set_input_delay -2 -clock [get_clocks {clk}] [get_ports {flash_io0_di}]
|
||||
set_input_delay -2 -clock [get_clocks {clk}] [get_ports {flash_io1_di}]
|
||||
|
||||
set_output_delay $output_delay_value -clock [get_clocks {clk}] -add_delay [all_outputs]
|
||||
}
|
||||
|
||||
## MAX FANOUT
|
||||
set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design]
|
||||
|
|
@ -43,13 +59,10 @@ set_input_transition -min $min_in_tran [all_inputs]
|
|||
set_input_transition -max $max_in_tran [all_inputs]
|
||||
|
||||
# derates
|
||||
set derate 0.15
|
||||
set derate 0.06
|
||||
puts "\[INFO\]: Setting derate factor to: [expr $derate * 100] %"
|
||||
set_timing_derate -early [expr 1-$derate]
|
||||
set_timing_derate -late [expr 1+$derate]
|
||||
|
||||
## MAX transition/cap
|
||||
set_max_trans 0.9 [current_design]
|
||||
# set_max_cap 0.5 [current_design]
|
||||
|
||||
# group_path -weight 100 -through [get_pins mprj/la_data_out[0]] -name mprj_floating
|
||||
set_max_trans 0.90 [current_design]
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
### Caravel base SDC
|
||||
### Rev 3
|
||||
### Date: 3/12/2022
|
||||
|
||||
## MASTER CLOCKS
|
||||
# create_clock -name clk -period 25 [get_ports {clock_core}]
|
||||
create_clock -name clk -period 18 [get_pins {clock_ctrl/core_clk}]
|
||||
|
||||
create_clock -name hk_serial_clk -period 50 [get_pins {housekeeping/serial_clock}]
|
||||
create_clock -name hk_serial_load -period 1000 [get_pins {housekeeping/serial_load}]
|
||||
# hk_serial_clk period is x2 core clock
|
||||
|
||||
set_clock_uncertainty 0.55 [get_clocks {clk}]
|
||||
set_clock_uncertainty 1 [get_clocks {hk_serial_clk hk_serial_load}]
|
||||
|
||||
set_clock_groups \
|
||||
-name clock_group \
|
||||
-logically_exclusive \
|
||||
-group [get_clocks {clk}]\
|
||||
-group [get_clocks {hk_serial_clk}]\
|
||||
-group [get_clocks {hk_serial_load}]
|
||||
|
||||
|
||||
set_propagated_clock [get_clocks {clk}]
|
||||
set_propagated_clock [get_clocks {hk_serial_clk}]
|
||||
set_propagated_clock [get_clocks {hk_serial_load}]
|
||||
|
||||
## INPUT/OUTPUT DELAYS
|
||||
set input_delay_value 4
|
||||
set output_delay_value 20
|
||||
puts "\[INFO\]: Setting output delay to: $output_delay_value"
|
||||
puts "\[INFO\]: Setting input delay to: $input_delay_value"
|
||||
# set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [all_inputs]
|
||||
set_input_delay 0 -clock [get_clocks {clk}] [get_ports {clock_core}]
|
||||
set_input_delay 1 -clock [get_clocks {clk}] [get_ports {flash_io0_di}]
|
||||
set_input_delay 1 -clock [get_clocks {clk}] [get_ports {flash_io1_di}]
|
||||
|
||||
# set_output_delay $output_delay_value -clock [get_clocks {clk}] -add_delay [all_outputs]
|
||||
|
||||
## MAX FANOUT
|
||||
set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design]
|
||||
|
||||
## FALSE PATHS (ASYNCHRONOUS INPUTS)
|
||||
set_false_path -from [get_ports {rstb_h}]
|
||||
|
||||
# add loads for output ports (pads)
|
||||
set min_cap 0.5
|
||||
set max_cap 1.0
|
||||
puts "\[INFO\]: Cap load range: $min_cap : $max_cap"
|
||||
# set_load 10 [all_outputs]
|
||||
set_load -min $min_cap [all_outputs]
|
||||
set_load -max $max_cap [all_outputs]
|
||||
|
||||
set min_in_tran 1
|
||||
set max_in_tran 1.49
|
||||
puts "\[INFO\]: Input transition range: $min_in_tran : $max_in_tran"
|
||||
set_input_transition -min $min_in_tran [all_inputs]
|
||||
set_input_transition -max $max_in_tran [all_inputs]
|
||||
|
||||
# derates
|
||||
set derate 0.15
|
||||
puts "\[INFO\]: Setting derate factor to: [expr $derate * 100] %"
|
||||
set_timing_derate -early [expr 1-$derate]
|
||||
set_timing_derate -late [expr 1+$derate]
|
||||
|
||||
## MAX transition/cap
|
||||
set_max_trans 0.9 [current_design]
|
||||
# set_max_cap 0.5 [current_design]
|
||||
|
|
@ -26,19 +26,19 @@ set_propagated_clock [get_clocks {hk_serial_clk}]
|
|||
set_propagated_clock [get_clocks {hk_serial_load}]
|
||||
|
||||
## INPUT/OUTPUT DELAYS
|
||||
# set input_delay_value 10
|
||||
# set output_delay_value 10
|
||||
# puts "\[INFO\]: Setting output delay to: $output_delay_value"
|
||||
# puts "\[INFO\]: Setting input delay to: $input_delay_value"
|
||||
# set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [all_inputs]
|
||||
# set_input_delay 0 -clock [get_clocks {clk}] [get_ports {mprj_io_in[35]}]
|
||||
# set_input_delay 0 -clock [get_clocks {clk}] [get_ports {clock_core}]
|
||||
# set_input_delay 1 -clock [get_clocks {clk}] [get_ports {flash_io0_di}]
|
||||
# set_input_delay 1 -clock [get_clocks {clk}] [get_ports {flash_io1_di}]
|
||||
# set_input_delay -8 -clock [get_clocks {debug_clk}] [get_ports {mgmt_io_in[0]}]
|
||||
#
|
||||
# set_output_delay $output_delay_value -clock [get_clocks {clk}] -add_delay [all_outputs]
|
||||
# set_output_delay 21 -clock [get_clocks {debug_clk}] [get_ports {mgmt_io_out[0]}]
|
||||
set input_delay_value 4
|
||||
set output_delay_value 4
|
||||
puts "\[INFO\]: Setting output delay to: $output_delay_value"
|
||||
puts "\[INFO\]: Setting input delay to: $input_delay_value"
|
||||
set_input_delay $input_delay_value -clock [get_clocks {clk}] -add_delay [all_inputs]
|
||||
set_input_delay 0 -clock [get_clocks {clk}] [get_ports {mprj_io_in[35]}]
|
||||
set_input_delay 0 -clock [get_clocks {clk}] [get_ports {clock_core}]
|
||||
set_input_delay 2.5 -clock [get_clocks {clk}] [get_ports {flash_io0_di}]
|
||||
set_input_delay 2.5 -clock [get_clocks {clk}] [get_ports {flash_io1_di}]
|
||||
set_input_delay -2 -clock [get_clocks {debug_clk}] [get_ports {mgmt_io_in[0]}]
|
||||
|
||||
set_output_delay $output_delay_value -clock [get_clocks {clk}] -add_delay [all_outputs]
|
||||
set_output_delay 21 -clock [get_clocks {debug_clk}] [get_ports {mgmt_io_out[0]}]
|
||||
|
||||
## MAX FANOUT
|
||||
set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design]
|
||||
|
|
@ -46,6 +46,15 @@ set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design]
|
|||
## FALSE PATHS (ASYNCHRONOUS INPUTS)
|
||||
set_false_path -from [get_ports {rstb_h}]
|
||||
|
||||
## MULTI CYCLE PATHS
|
||||
# Multicycle paths
|
||||
set_multicycle_path -setup 2 -through [get_pins {mprj/wbs_ack_o}]
|
||||
set_multicycle_path -hold 1 -through [get_pins {mprj/wbs_ack_o}]
|
||||
set_multicycle_path -setup 2 -through [get_pins {mprj/wbs_cyc_i}]
|
||||
set_multicycle_path -hold 1 -through [get_pins {mprj/wbs_cyc_i}]
|
||||
set_multicycle_path -setup 2 -through [get_pins {mprj/wbs_stb_i}]
|
||||
set_multicycle_path -hold 1 -through [get_pins {mprj/wbs_stb_i}]
|
||||
|
||||
# add loads for output ports (pads)
|
||||
set min_cap 0.5
|
||||
set max_cap 1.0
|
||||
|
|
@ -54,14 +63,14 @@ puts "\[INFO\]: Cap load range: $min_cap : $max_cap"
|
|||
set_load -min $min_cap [all_outputs]
|
||||
set_load -max $max_cap [all_outputs]
|
||||
|
||||
set min_in_tran 1
|
||||
set max_in_tran 1.49
|
||||
set min_in_tran 0.6
|
||||
set max_in_tran 1.2
|
||||
puts "\[INFO\]: Input transition range: $min_in_tran : $max_in_tran"
|
||||
set_input_transition -min $min_in_tran [all_inputs]
|
||||
set_input_transition -max $max_in_tran [all_inputs]
|
||||
|
||||
# derates
|
||||
set derate 0.0375
|
||||
set derate 0.05
|
||||
puts "\[INFO\]: Setting derate factor to: [expr $derate * 100] %"
|
||||
set_timing_derate -early [expr 1-$derate]
|
||||
set_timing_derate -late [expr 1+$derate]
|
||||
|
|
|
|||
Loading…
Reference in New Issue