diff --git a/openlane/caravan_core/config.tcl b/openlane/caravan_core/config.tcl
index 65302f0c..491750d9 100644
--- a/openlane/caravan_core/config.tcl
+++ b/openlane/caravan_core/config.tcl
@@ -73,10 +73,10 @@ set ::env(FP_IO_MIN_DISTANCE) 5
 set ::env(FP_IO_VEXTEND) 2
 set ::env(FP_IO_HEXTEND) 2
 
-set ::env(FP_TAPCELL_DIST) 12
-set ::env(PL_MACRO_HALO) "3 3"
-set ::env(FP_TAP_HORIZONTAL_HALO) 3
-set ::env(FP_TAP_VERTICAL_HALO) 3
+set ::env(FP_TAPCELL_DIST) 10
+set ::env(PL_MACRO_HALO) "1 1"
+set ::env(FP_TAP_HORIZONTAL_HALO) 10
+set ::env(FP_TAP_VERTICAL_HALO) 10
 
 # set ::env(GPL_CELL_PADDING) 0
 # set ::env(DPL_CELL_PADDING) 2
diff --git a/openlane/caravan_core/floorplan_configuration/macro_placement.cfg b/openlane/caravan_core/floorplan_configuration/macro_placement.cfg
index b105985f..2cbc1181 100644
--- a/openlane/caravan_core/floorplan_configuration/macro_placement.cfg
+++ b/openlane/caravan_core/floorplan_configuration/macro_placement.cfg
@@ -2,9 +2,9 @@ user_id_value 2962.655 129.19 N
 soc.core.RAM256.BANK128\[0\].RAM128 90.09 175 N
 soc.core.RAM256.BANK128\[1\].RAM128 581.97 175 FN
 soc.core.RAM128 1800 125 FN
-mgmt_buffers.mprj_logic_high_inst 1190.94 900 N
-mgmt_buffers.powergood_check 1794 900 N
-mgmt_buffers.mprj2_logic_high_inst 823 900 FN
+mgmt_buffers.mprj_logic_high_inst 1190.94 880 N
+mgmt_buffers.powergood_check 1794 880 N
+mgmt_buffers.mprj2_logic_high_inst 823 880 FN
 por 1063.15 135 MX
 mprj 115.04 1183.09 N
 housekeeping_alt 2650 190 N
diff --git a/openlane/caravan_core/interactive.tcl b/openlane/caravan_core/interactive.tcl
index 88a33b4c..f63c397c 100755
--- a/openlane/caravan_core/interactive.tcl
+++ b/openlane/caravan_core/interactive.tcl
@@ -63,18 +63,18 @@ run_cts
 
 run_resizer_timing
 
-# ##  Routing Optmization  ##
-# run_resizer_design_routing
-# run_resizer_timing_routing
+##  Routing Optmization  ##
+run_resizer_design_routing
+run_resizer_timing_routing
 
-# ################ Place and route on the optmized netlist ################
-# set ::env(PL_TARGET_DENSITY) 0.26
-# set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) 0
-# set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) 0
-# set ::env(GLB_RESIZER_DESIGN_OPTIMIZATIONS) 0
-# set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) 0
-# run_placement
-# run_cts 
+################ Place and route on the optmized netlist ################
+set ::env(PL_TARGET_DENSITY) 0.26
+set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) 0
+set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) 0
+set ::env(GLB_RESIZER_DESIGN_OPTIMIZATIONS) 0
+set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) 0
+run_placement
+run_cts
 
 # Adding met4/5 routing obstructions over the the RAMs and housekeeping to prevent routing DRCs
 set ::env(GRT_OBS) "\