From efc0304e1e72e54cd3dc923315bc39ee4f915895 Mon Sep 17 00:00:00 2001
From: mo-hosni <m.hosni.ibra@gmail.com>
Date: Sun, 17 Mar 2024 12:09:49 +0200
Subject: [PATCH] fix a typo in caravel_core RTL

---
 verilog/rtl/caravel_core.v | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/verilog/rtl/caravel_core.v b/verilog/rtl/caravel_core.v
index 14944e6d..fc26a906 100644
--- a/verilog/rtl/caravel_core.v
+++ b/verilog/rtl/caravel_core.v
@@ -1429,7 +1429,7 @@ module caravel_core (
     );
     /* Section 2 GPIOs (GPIO 32 to 34) */
 
-    gpio_control_block_mgmt gpio_control_in_2_3 [2:0] (
+    gpio_control_block gpio_control_in_2_3 [2:0] (
 `ifdef USE_POWER_PINS
     .vccd(vccd),
     .vssd(vssd),