From eceb71ee04e00a7c4208503d44c89fb39dcf25b2 Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Sat, 8 Oct 2022 22:24:38 -0400 Subject: [PATCH] Added GDS, DEF, and LEF views of both chip_io and chip_io_alt. --- def/chip_io.def | 30485 +++++++++++++++++++++++++++++++++------ def/chip_io_alt.def | 28371 ++++++++++++++++++++++++++++++++++++ gds/chip_io.gds.gz | Bin 6925239 -> 6827245 bytes gds/chip_io_alt.gds.gz | Bin 6956288 -> 6875685 bytes lef/chip_io.lef | 13793 +++++++++--------- lef/chip_io_alt.lef | 11136 ++++++++------ 6 files changed, 67567 insertions(+), 16218 deletions(-) create mode 100644 def/chip_io_alt.def diff --git a/def/chip_io.def b/def/chip_io.def index d1f0cd11..739ab531 100644 --- a/def/chip_io.def +++ b/def/chip_io.def @@ -3,2620 +3,15890 @@ VERSION 5.7 ; DIVIDERCHAR "/" ; BUSBITCHARS "()" ; DESIGN chip_io ; + TECHNOLOGY sky130A ; UNITS DISTANCE MICRONS 1000 ; DIEAREA ( 0 0 ) ( 3588000 5188000 ) ; -VIAS 20 ; +VIAS 31 ; - via4_11800_22760 + RECT met4 ( -5900 -11380 ) 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5700 10500 ) + + RECT via3 ( -5700 10700 ) ( -5500 10900 ) + + RECT via3 ( -5300 10700 ) ( -5100 10900 ) + + RECT via3 ( -4900 10700 ) ( -4700 10900 ) + + RECT via3 ( -4500 10700 ) ( -4300 10900 ) + + RECT via3 ( -4100 10700 ) ( -3900 10900 ) + + RECT via3 ( -3700 10700 ) ( -3500 10900 ) + + RECT via3 ( -3300 10700 ) ( -3100 10900 ) + + RECT via3 ( -2900 10700 ) ( -2700 10900 ) + + RECT via3 ( -2500 10700 ) ( -2300 10900 ) + + RECT via3 ( -2100 10700 ) ( -1900 10900 ) + + RECT via3 ( -1700 10700 ) ( -1500 10900 ) + + RECT via3 ( -1300 10700 ) ( -1100 10900 ) + + RECT via3 ( -900 10700 ) ( -700 10900 ) + + RECT via3 ( -500 10700 ) ( -300 10900 ) + + RECT via3 ( -100 10700 ) ( 100 10900 ) + + RECT via3 ( 300 10700 ) ( 500 10900 ) + + RECT via3 ( 700 10700 ) ( 900 10900 ) + + RECT via3 ( 1100 10700 ) ( 1300 10900 ) + + RECT via3 ( 1500 10700 ) ( 1700 10900 ) + + RECT via3 ( 1900 10700 ) ( 2100 10900 ) + + RECT via3 ( 2300 10700 ) ( 2500 10900 ) + + RECT via3 ( 2700 10700 ) ( 2900 10900 ) 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8100 ) + + RECT via3 ( 5300 7900 ) ( 5500 8100 ) + + RECT via3 ( 5700 7900 ) ( 5900 8100 ) + + RECT via3 ( -5900 8300 ) ( -5700 8500 ) + + RECT via3 ( -5500 8300 ) ( -5300 8500 ) + + RECT via3 ( -5100 8300 ) ( -4900 8500 ) + + RECT via3 ( -4700 8300 ) ( -4500 8500 ) + + RECT via3 ( -4300 8300 ) ( -4100 8500 ) + + RECT via3 ( -3900 8300 ) ( -3700 8500 ) + + RECT via3 ( -3500 8300 ) ( -3300 8500 ) + + RECT via3 ( -3100 8300 ) ( -2900 8500 ) + + RECT via3 ( -2700 8300 ) ( -2500 8500 ) + + RECT via3 ( -2300 8300 ) ( -2100 8500 ) + + RECT via3 ( -1900 8300 ) ( -1700 8500 ) + + RECT via3 ( -1500 8300 ) ( -1300 8500 ) + + RECT via3 ( -1100 8300 ) ( -900 8500 ) + + RECT via3 ( -700 8300 ) ( -500 8500 ) + + RECT via3 ( -300 8300 ) ( -100 8500 ) + + RECT via3 ( 100 8300 ) ( 300 8500 ) + + RECT via3 ( 500 8300 ) ( 700 8500 ) + + RECT via3 ( 900 8300 ) ( 1100 8500 ) + + RECT via3 ( 1300 8300 ) ( 1500 8500 ) + + RECT via3 ( 1700 8300 ) ( 1900 8500 ) + + RECT via3 ( 2100 8300 ) ( 2300 8500 ) + + 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9700 ) + + RECT via3 ( 4100 9500 ) ( 4300 9700 ) + + RECT via3 ( 4500 9500 ) ( 4700 9700 ) + + RECT via3 ( 4900 9500 ) ( 5100 9700 ) + + RECT via3 ( 5300 9500 ) ( 5500 9700 ) + + RECT via3 ( 5700 9500 ) ( 5900 9700 ) + + RECT via3 ( -5900 9900 ) ( -5700 10100 ) + + RECT via3 ( -5500 9900 ) ( -5300 10100 ) + + RECT via3 ( -5100 9900 ) ( -4900 10100 ) + + RECT via3 ( -4700 9900 ) ( -4500 10100 ) + + RECT via3 ( -4300 9900 ) ( -4100 10100 ) + + RECT via3 ( -3900 9900 ) ( -3700 10100 ) + + RECT via3 ( -3500 9900 ) ( -3300 10100 ) + + RECT via3 ( -3100 9900 ) ( -2900 10100 ) + + RECT via3 ( -2700 9900 ) ( -2500 10100 ) + + RECT via3 ( -2300 9900 ) ( -2100 10100 ) + + RECT via3 ( -1900 9900 ) ( -1700 10100 ) + + RECT via3 ( -1500 9900 ) ( -1300 10100 ) + + RECT via3 ( -1100 9900 ) ( -900 10100 ) + + RECT via3 ( -700 9900 ) ( -500 10100 ) + + RECT via3 ( -300 9900 ) ( -100 10100 ) + + RECT via3 ( 100 9900 ) ( 300 10100 ) + + RECT via3 ( 500 9900 ) ( 700 10100 ) + + RECT via3 ( 900 9900 ) ( 1100 10100 ) + + RECT via3 ( 1300 9900 ) ( 1500 10100 ) + + RECT via3 ( 1700 9900 ) ( 1900 10100 ) + + RECT via3 ( 2100 9900 ) ( 2300 10100 ) + + RECT via3 ( 2500 9900 ) ( 2700 10100 ) + + RECT via3 ( 2900 9900 ) ( 3100 10100 ) + + RECT via3 ( 3300 9900 ) ( 3500 10100 ) + + RECT via3 ( 3700 9900 ) ( 3900 10100 ) + + RECT via3 ( 4100 9900 ) ( 4300 10100 ) + + RECT via3 ( 4500 9900 ) ( 4700 10100 ) + + RECT via3 ( 4900 9900 ) ( 5100 10100 ) + + RECT via3 ( 5300 9900 ) ( 5500 10100 ) + + RECT via3 ( 5700 9900 ) ( 5900 10100 ) + + RECT via3 ( -5900 10300 ) ( -5700 10500 ) + + RECT via3 ( -5500 10300 ) ( -5300 10500 ) + + RECT via3 ( -5100 10300 ) ( -4900 10500 ) + + RECT via3 ( -4700 10300 ) ( -4500 10500 ) + + RECT via3 ( -4300 10300 ) ( -4100 10500 ) + + RECT via3 ( -3900 10300 ) ( -3700 10500 ) + + RECT via3 ( -3500 10300 ) ( -3300 10500 ) + + RECT via3 ( -3100 10300 ) ( -2900 10500 ) + + RECT via3 ( -2700 10300 ) ( -2500 10500 ) + + RECT via3 ( -2300 10300 ) ( -2100 10500 ) + + RECT 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) ( 5700 8700 ) + + RECT via3 ( -5700 8900 ) ( -5500 9100 ) + + RECT via3 ( -5300 8900 ) ( -5100 9100 ) + + RECT via3 ( -4900 8900 ) ( -4700 9100 ) + + RECT via3 ( -4500 8900 ) ( -4300 9100 ) + + RECT via3 ( -4100 8900 ) ( -3900 9100 ) + + RECT via3 ( -3700 8900 ) ( -3500 9100 ) + + RECT via3 ( -3300 8900 ) ( -3100 9100 ) + + RECT via3 ( -2900 8900 ) ( -2700 9100 ) + + RECT via3 ( -2500 8900 ) ( -2300 9100 ) + + RECT via3 ( -2100 8900 ) ( -1900 9100 ) + + RECT via3 ( -1700 8900 ) ( -1500 9100 ) + + RECT via3 ( -1300 8900 ) ( -1100 9100 ) + + RECT via3 ( -900 8900 ) ( -700 9100 ) + + RECT via3 ( -500 8900 ) ( -300 9100 ) + + RECT via3 ( -100 8900 ) ( 100 9100 ) + + RECT via3 ( 300 8900 ) ( 500 9100 ) + + RECT via3 ( 700 8900 ) ( 900 9100 ) + + RECT via3 ( 1100 8900 ) ( 1300 9100 ) + + RECT via3 ( 1500 8900 ) ( 1700 9100 ) + + RECT via3 ( 1900 8900 ) ( 2100 9100 ) + + RECT via3 ( 2300 8900 ) ( 2500 9100 ) + + RECT via3 ( 2700 8900 ) ( 2900 9100 ) + + RECT via3 ( 3100 8900 ) ( 3300 9100 ) + + RECT via3 ( 3500 8900 ) ( 3700 9100 ) + + RECT via3 ( 3900 8900 ) ( 4100 9100 ) + + RECT via3 ( 4300 8900 ) ( 4500 9100 ) + + RECT via3 ( 4700 8900 ) ( 4900 9100 ) + + RECT via3 ( 5100 8900 ) ( 5300 9100 ) + + RECT via3 ( 5500 8900 ) ( 5700 9100 ) + + RECT via3 ( -5700 9300 ) ( -5500 9500 ) + + RECT via3 ( -5300 9300 ) ( -5100 9500 ) + + RECT via3 ( -4900 9300 ) ( -4700 9500 ) + + RECT via3 ( -4500 9300 ) ( -4300 9500 ) + + RECT via3 ( -4100 9300 ) ( -3900 9500 ) + + RECT via3 ( -3700 9300 ) ( -3500 9500 ) + + RECT via3 ( -3300 9300 ) ( -3100 9500 ) + + RECT via3 ( -2900 9300 ) ( -2700 9500 ) + + RECT via3 ( -2500 9300 ) ( -2300 9500 ) + + RECT via3 ( -2100 9300 ) ( -1900 9500 ) + + RECT via3 ( -1700 9300 ) ( -1500 9500 ) + + RECT via3 ( -1300 9300 ) ( -1100 9500 ) + + RECT via3 ( -900 9300 ) ( -700 9500 ) + + RECT via3 ( -500 9300 ) ( -300 9500 ) + + RECT via3 ( -100 9300 ) ( 100 9500 ) + + RECT via3 ( 300 9300 ) ( 500 9500 ) + + RECT via3 ( 700 9300 ) ( 900 9500 ) + + RECT via3 ( 1100 9300 ) ( 1300 9500 ) + + RECT via3 ( 1500 9300 ) ( 1700 9500 ) + + RECT via3 ( 1900 9300 ) ( 2100 9500 ) + + RECT via3 ( 2300 9300 ) ( 2500 9500 ) + + RECT via3 ( 2700 9300 ) ( 2900 9500 ) + + RECT via3 ( 3100 9300 ) ( 3300 9500 ) + + RECT via3 ( 3500 9300 ) ( 3700 9500 ) + + RECT via3 ( 3900 9300 ) ( 4100 9500 ) + + RECT via3 ( 4300 9300 ) ( 4500 9500 ) + + RECT via3 ( 4700 9300 ) ( 4900 9500 ) + + RECT via3 ( 5100 9300 ) ( 5300 9500 ) + + RECT via3 ( 5500 9300 ) ( 5700 9500 ) + + RECT via3 ( -5700 9700 ) ( -5500 9900 ) + + RECT via3 ( -5300 9700 ) ( -5100 9900 ) + + RECT via3 ( -4900 9700 ) ( -4700 9900 ) + + RECT via3 ( -4500 9700 ) ( -4300 9900 ) + + RECT via3 ( -4100 9700 ) ( -3900 9900 ) + + RECT via3 ( -3700 9700 ) ( -3500 9900 ) + + RECT via3 ( -3300 9700 ) ( -3100 9900 ) + + RECT via3 ( -2900 9700 ) ( -2700 9900 ) + + RECT via3 ( -2500 9700 ) ( -2300 9900 ) + + RECT via3 ( -2100 9700 ) ( -1900 9900 ) + + RECT via3 ( -1700 9700 ) ( -1500 9900 ) + + RECT via3 ( -1300 9700 ) ( -1100 9900 ) + + RECT via3 ( -900 9700 ) ( -700 9900 ) + + RECT via3 ( -500 9700 ) ( -300 9900 ) + + RECT via3 ( -100 9700 ) ( 100 9900 ) + + RECT via3 ( 300 9700 ) ( 500 9900 ) + + RECT via3 ( 700 9700 ) ( 900 9900 ) + + RECT via3 ( 1100 9700 ) ( 1300 9900 ) + + RECT via3 ( 1500 9700 ) ( 1700 9900 ) + + RECT via3 ( 1900 9700 ) ( 2100 9900 ) + + RECT via3 ( 2300 9700 ) ( 2500 9900 ) + + RECT via3 ( 2700 9700 ) ( 2900 9900 ) + + RECT via3 ( 3100 9700 ) ( 3300 9900 ) + + RECT via3 ( 3500 9700 ) ( 3700 9900 ) + + RECT via3 ( 3900 9700 ) ( 4100 9900 ) + + RECT via3 ( 4300 9700 ) ( 4500 9900 ) + + RECT via3 ( 4700 9700 ) ( 4900 9900 ) + + RECT via3 ( 5100 9700 ) ( 5300 9900 ) + + RECT via3 ( 5500 9700 ) ( 5700 9900 ) + + RECT via3 ( -5700 10100 ) ( -5500 10300 ) + + RECT via3 ( -5300 10100 ) ( -5100 10300 ) + + RECT via3 ( -4900 10100 ) ( -4700 10300 ) + + RECT via3 ( -4500 10100 ) ( -4300 10300 ) + + RECT via3 ( -4100 10100 ) ( -3900 10300 ) + + RECT via3 ( -3700 10100 ) ( -3500 10300 ) + + RECT via3 ( -3300 10100 ) ( -3100 10300 ) + + RECT via3 ( -2900 10100 ) ( -2700 10300 ) + + RECT via3 ( -2500 10100 ) ( -2300 10300 ) + + RECT via3 ( -2100 10100 ) ( -1900 10300 ) + + RECT via3 ( -1700 10100 ) ( -1500 10300 ) + + RECT via3 ( -1300 10100 ) ( -1100 10300 ) + + RECT via3 ( -900 10100 ) ( -700 10300 ) + + RECT via3 ( -500 10100 ) ( -300 10300 ) + + RECT via3 ( -100 10100 ) ( 100 10300 ) + + RECT via3 ( 300 10100 ) ( 500 10300 ) + + RECT via3 ( 700 10100 ) ( 900 10300 ) + + RECT via3 ( 1100 10100 ) ( 1300 10300 ) + + RECT via3 ( 1500 10100 ) ( 1700 10300 ) + + RECT via3 ( 1900 10100 ) ( 2100 10300 ) + + RECT via3 ( 2300 10100 ) ( 2500 10300 ) + + RECT via3 ( 2700 10100 ) ( 2900 10300 ) + + RECT via3 ( 3100 10100 ) ( 3300 10300 ) + + RECT via3 ( 3500 10100 ) ( 3700 10300 ) + + RECT via3 ( 3900 10100 ) ( 4100 10300 ) + + RECT via3 ( 4300 10100 ) ( 4500 10300 ) + + RECT via3 ( 4700 10100 ) ( 4900 10300 ) + + RECT via3 ( 5100 10100 ) ( 5300 10300 ) + + RECT via3 ( 5500 10100 ) ( 5700 10300 ) + + RECT via3 ( -5700 10500 ) ( -5500 10700 ) + + RECT via3 ( -5300 10500 ) ( -5100 10700 ) + + RECT via3 ( -4900 10500 ) ( -4700 10700 ) + + RECT via3 ( -4500 10500 ) ( -4300 10700 ) + + RECT via3 ( -4100 10500 ) ( -3900 10700 ) + + RECT via3 ( -3700 10500 ) ( -3500 10700 ) + + RECT via3 ( -3300 10500 ) ( -3100 10700 ) + + RECT via3 ( -2900 10500 ) ( -2700 10700 ) + + RECT via3 ( -2500 10500 ) ( -2300 10700 ) + + RECT via3 ( -2100 10500 ) ( -1900 10700 ) + + RECT via3 ( -1700 10500 ) ( -1500 10700 ) + + RECT via3 ( -1300 10500 ) ( -1100 10700 ) + + RECT via3 ( -900 10500 ) ( -700 10700 ) + + RECT via3 ( -500 10500 ) ( -300 10700 ) + + RECT via3 ( -100 10500 ) ( 100 10700 ) + + RECT via3 ( 300 10500 ) ( 500 10700 ) + + RECT via3 ( 700 10500 ) ( 900 10700 ) + + RECT via3 ( 1100 10500 ) ( 1300 10700 ) + + RECT via3 ( 1500 10500 ) ( 1700 10700 ) + + RECT via3 ( 1900 10500 ) ( 2100 10700 ) + + RECT via3 ( 2300 10500 ) ( 2500 10700 ) + + RECT via3 ( 2700 10500 ) ( 2900 10700 ) + + RECT via3 ( 3100 10500 ) ( 3300 10700 ) + + RECT via3 ( 3500 10500 ) ( 3700 10700 ) + + RECT via3 ( 3900 10500 ) ( 4100 10700 ) + + RECT via3 ( 4300 10500 ) ( 4500 10700 ) + + RECT via3 ( 4700 10500 ) ( 4900 10700 ) + + RECT via3 ( 5100 10500 ) ( 5300 10700 ) + + RECT via3 ( 5500 10500 ) ( 5700 10700 ) + + RECT via3 ( -5700 10900 ) ( -5500 11100 ) + + RECT via3 ( -5300 10900 ) ( -5100 11100 ) + + RECT via3 ( -4900 10900 ) ( -4700 11100 ) + + RECT via3 ( -4500 10900 ) ( -4300 11100 ) + + RECT via3 ( -4100 10900 ) ( -3900 11100 ) + + RECT via3 ( -3700 10900 ) ( -3500 11100 ) + + RECT via3 ( -3300 10900 ) ( -3100 11100 ) + + RECT via3 ( -2900 10900 ) ( -2700 11100 ) + + RECT via3 ( -2500 10900 ) ( -2300 11100 ) + + RECT via3 ( -2100 10900 ) ( -1900 11100 ) + + RECT via3 ( -1700 10900 ) ( -1500 11100 ) + + RECT via3 ( -1300 10900 ) ( -1100 11100 ) + + RECT via3 ( -900 10900 ) ( -700 11100 ) + + RECT via3 ( -500 10900 ) ( -300 11100 ) + + RECT via3 ( -100 10900 ) ( 100 11100 ) + + RECT via3 ( 300 10900 ) ( 500 11100 ) + + RECT via3 ( 700 10900 ) ( 900 11100 ) + + RECT via3 ( 1100 10900 ) ( 1300 11100 ) + + RECT via3 ( 1500 10900 ) ( 1700 11100 ) + + RECT via3 ( 1900 10900 ) ( 2100 11100 ) + + RECT via3 ( 2300 10900 ) ( 2500 11100 ) + + RECT via3 ( 2700 10900 ) ( 2900 11100 ) + + RECT via3 ( 3100 10900 ) ( 3300 11100 ) + + RECT via3 ( 3500 10900 ) ( 3700 11100 ) + + RECT via3 ( 3900 10900 ) ( 4100 11100 ) + + RECT via3 ( 4300 10900 ) ( 4500 11100 ) + + RECT via3 ( 4700 10900 ) ( 4900 11100 ) + + RECT via3 ( 5100 10900 ) ( 5300 11100 ) + + RECT via3 ( 5500 10900 ) ( 5700 11100 ) ; + - via3_900_1725_hx + + RECT met3 ( -480 -862.5 ) ( 480 862.5 ) + + RECT met4 ( -455 -867.5 ) ( 455 867.5 ) + + RECT via3 ( -300 -700 ) ( -100 -500 ) + + RECT via3 ( 100 -700 ) ( 300 -500 ) + + RECT via3 ( -300 -300 ) ( -100 -100 ) + + RECT via3 ( 100 -300 ) ( 300 -100 ) + + RECT via3 ( -300 100 ) ( -100 300 ) + + RECT via3 ( 100 100 ) ( 300 300 ) + + RECT via3 ( -300 500 ) ( -100 700 ) + + RECT via3 ( 100 500 ) ( 300 700 ) ; END VIAS -COMPONENTS 811 ; - - mgmt_corner\[0\] sky130_ef_io__corner_pad - + PLACED ( 0 0 ) S ; +COMPONENTS 818 ; - FILLER_170 sky130_ef_io__com_bus_slice_20um + PLACED ( 200000 0 ) S ; - FILLER_374 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 204000 ) W ; - - FILLER_171 sky130_ef_io__com_bus_slice_10um - + PLACED ( 220000 0 ) S ; - - FILLER_172 sky130_ef_io__com_bus_slice_5um - + PLACED ( 230000 0 ) S ; - - FILLER_174 sky130_ef_io__com_bus_slice_1um - + PLACED ( 236000 0 ) S ; - - FILLER_173 sky130_ef_io__com_bus_slice_1um - + PLACED ( 235000 0 ) S ; + - mgmt_corner\[0\] sky130_ef_io__corner_pad + + PLACED ( 0 0 ) S ; - bus_tie_3 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 277000 0 ) S ; - bus_tie_2 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 257000 0 ) S ; - bus_tie_1 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 237000 0 ) S ; - - FILLER_181 sky130_ef_io__com_bus_slice_20um - + PLACED ( 357000 0 ) S ; + - FILLER_174 sky130_ef_io__com_bus_slice_1um + + PLACED ( 236000 0 ) S ; + - FILLER_173 sky130_ef_io__com_bus_slice_1um + + PLACED ( 235000 0 ) S ; + - FILLER_172 sky130_ef_io__com_bus_slice_5um + + PLACED ( 230000 0 ) S ; + - FILLER_171 sky130_ef_io__com_bus_slice_10um + + PLACED ( 220000 0 ) S ; - bus_tie_6 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 337000 0 ) S ; - bus_tie_5 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 317000 0 ) S ; - bus_tie_4 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 297000 0 ) S ; - - FILLER_182 sky130_ef_io__com_bus_slice_10um - + PLACED ( 377000 0 ) S ; - - FILLER_183 sky130_ef_io__com_bus_slice_5um - + PLACED ( 387000 0 ) S ; + - FILLER_181 sky130_ef_io__com_bus_slice_20um + + PLACED ( 357000 0 ) S ; + - mgmt_vssa_hvclamp_pad sky130_ef_io__vssa_hvc_clamped_pad + + PLACED ( 394000 0 ) S ; - FILLER_185 sky130_ef_io__com_bus_slice_1um + PLACED ( 393000 0 ) S ; - FILLER_184 sky130_ef_io__com_bus_slice_1um + PLACED ( 392000 0 ) S ; - - mgmt_vssa_hvclamp_pad sky130_ef_io__vssa_hvc_clamped_pad - + PLACED ( 394000 2035 ) S ; + - FILLER_183 sky130_ef_io__com_bus_slice_5um + + PLACED ( 387000 0 ) S ; + - FILLER_182 sky130_ef_io__com_bus_slice_10um + + PLACED ( 377000 0 ) S ; - FILLER_187 sky130_ef_io__com_bus_slice_20um + PLACED ( 469000 0 ) S ; - - FILLER_188 sky130_ef_io__com_bus_slice_10um - + PLACED ( 489000 0 ) S ; - FILLER_189 sky130_ef_io__com_bus_slice_5um + PLACED ( 499000 0 ) S ; + - FILLER_188 sky130_ef_io__com_bus_slice_10um + + PLACED ( 489000 0 ) S ; + - bus_tie_7 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 506000 0 ) S ; - FILLER_191 sky130_ef_io__com_bus_slice_1um + PLACED ( 505000 0 ) S ; - FILLER_190 sky130_ef_io__com_bus_slice_1um + PLACED ( 504000 0 ) S ; - - bus_tie_7 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um - + PLACED ( 506000 0 ) S ; - bus_tie_8 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 526000 0 ) S ; - bus_tie_9 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um @@ -2629,62 +15899,66 @@ COMPONENTS 811 ; + PLACED ( 606000 0 ) S ; - FILLER_198 sky130_ef_io__com_bus_slice_20um + PLACED ( 626000 0 ) S ; - - FILLER_199 sky130_ef_io__com_bus_slice_10um - + PLACED ( 646000 0 ) S ; - - FILLER_200 sky130_ef_io__com_bus_slice_5um - + PLACED ( 656000 0 ) S ; + - resetb_pad sky130_fd_io__top_xres4v2 + + PLACED ( 663000 0 ) S ; - FILLER_202 sky130_ef_io__com_bus_slice_1um + PLACED ( 662000 0 ) S ; - FILLER_201 sky130_ef_io__com_bus_slice_1um + PLACED ( 661000 0 ) S ; - - resetb_pad sky130_fd_io__top_xres4v2 - + PLACED ( 662895 0 ) S ; - - FILLER_204 sky130_ef_io__com_bus_slice_20um - + PLACED ( 738000 0 ) S ; - - FILLER_205 sky130_ef_io__com_bus_slice_10um - + PLACED ( 758000 0 ) S ; - - FILLER_206 sky130_ef_io__com_bus_slice_5um - + PLACED ( 768000 0 ) S ; + - FILLER_200 sky130_ef_io__com_bus_slice_5um + + PLACED ( 656000 0 ) S ; + - FILLER_199 sky130_ef_io__com_bus_slice_10um + + PLACED ( 646000 0 ) S ; + - constant_block_0 constant_block + + PLACED ( 741080 197260 ) FN ; + - bus_tie_13 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 775000 0 ) S ; - FILLER_208 sky130_ef_io__com_bus_slice_1um + PLACED ( 774000 0 ) S ; - FILLER_207 sky130_ef_io__com_bus_slice_1um + PLACED ( 773000 0 ) S ; - - bus_tie_13 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um - + PLACED ( 775000 0 ) S ; + - FILLER_206 sky130_ef_io__com_bus_slice_5um + + PLACED ( 768000 0 ) S ; + - FILLER_205 sky130_ef_io__com_bus_slice_10um + + PLACED ( 758000 0 ) S ; + - FILLER_204 sky130_ef_io__com_bus_slice_20um + + PLACED ( 738000 0 ) S ; - bus_tie_16 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 835000 0 ) S ; - bus_tie_15 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 815000 0 ) S ; - bus_tie_14 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 795000 0 ) S ; - - FILLER_215 sky130_ef_io__com_bus_slice_20um - + PLACED ( 895000 0 ) S ; - - FILLER_216 sky130_ef_io__com_bus_slice_10um - + PLACED ( 915000 0 ) S ; - bus_tie_18 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 875000 0 ) S ; - bus_tie_17 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 855000 0 ) S ; - - FILLER_217 sky130_ef_io__com_bus_slice_5um - + PLACED ( 925000 0 ) S ; + - FILLER_216 sky130_ef_io__com_bus_slice_10um + + PLACED ( 915000 0 ) S ; + - FILLER_215 sky130_ef_io__com_bus_slice_20um + + PLACED ( 895000 0 ) S ; + - clock_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 932000 0 ) S ; - FILLER_219 sky130_ef_io__com_bus_slice_1um + PLACED ( 931000 0 ) S ; - FILLER_218 sky130_ef_io__com_bus_slice_1um + PLACED ( 930000 0 ) S ; - - clock_pad sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 932000 0 ) S ; - - FILLER_221 sky130_ef_io__com_bus_slice_20um - + PLACED ( 1012000 0 ) S ; - - FILLER_222 sky130_ef_io__com_bus_slice_10um - + PLACED ( 1032000 0 ) S ; - - FILLER_223 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1042000 0 ) S ; + - FILLER_217 sky130_ef_io__com_bus_slice_5um + + PLACED ( 925000 0 ) S ; + - constant_block_1 constant_block + + PLACED ( 1015080 197260 ) FN ; + - bus_tie_19 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1049000 0 ) S ; - FILLER_225 sky130_ef_io__com_bus_slice_1um + PLACED ( 1048000 0 ) S ; - FILLER_224 sky130_ef_io__com_bus_slice_1um + PLACED ( 1047000 0 ) S ; - - bus_tie_19 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um - + PLACED ( 1049000 0 ) S ; + - FILLER_223 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1042000 0 ) S ; + - FILLER_222 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1032000 0 ) S ; + - FILLER_221 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1012000 0 ) S ; - bus_tie_23 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1129000 0 ) S ; - bus_tie_22 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um @@ -2693,34 +15967,34 @@ COMPONENTS 811 ; + PLACED ( 1089000 0 ) S ; - bus_tie_20 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1069000 0 ) S ; - - FILLER_232 sky130_ef_io__com_bus_slice_20um - + PLACED ( 1169000 0 ) S ; - - FILLER_233 sky130_ef_io__com_bus_slice_10um - + PLACED ( 1189000 0 ) S ; - - FILLER_234 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1199000 0 ) S ; + - mgmt_vssd_lvclamp_pad sky130_ef_io__vssd_lvc_clamped_pad + + PLACED ( 1206000 0 ) S ; + - bus_tie_24 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1149000 0 ) S ; - FILLER_236 sky130_ef_io__com_bus_slice_1um + PLACED ( 1205000 0 ) S ; - FILLER_235 sky130_ef_io__com_bus_slice_1um + PLACED ( 1204000 0 ) S ; - - bus_tie_24 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um - + PLACED ( 1149000 0 ) S ; - - mgmt_vssd_lvclamp_pad sky130_ef_io__vssd_lvc_clamped_pad - + PLACED ( 1194805 10535 ) S ; - - FILLER_238 sky130_ef_io__com_bus_slice_20um - + PLACED ( 1281000 0 ) S ; - - FILLER_239 sky130_ef_io__com_bus_slice_10um - + PLACED ( 1301000 0 ) S ; - - FILLER_240 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1311000 0 ) S ; - - FILLER_242 sky130_ef_io__com_bus_slice_1um - + PLACED ( 1317000 0 ) S ; - - FILLER_241 sky130_ef_io__com_bus_slice_1um - + PLACED ( 1316000 0 ) S ; + - FILLER_234 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1199000 0 ) S ; + - FILLER_233 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1189000 0 ) S ; + - FILLER_232 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1169000 0 ) S ; - bus_tie_26 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1338000 0 ) S ; - bus_tie_25 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1318000 0 ) S ; + - FILLER_242 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1317000 0 ) S ; + - FILLER_241 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1316000 0 ) S ; + - FILLER_240 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1311000 0 ) S ; + - FILLER_239 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1301000 0 ) S ; + - FILLER_238 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1281000 0 ) S ; - bus_tie_30 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1418000 0 ) S ; - bus_tie_29 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um @@ -2729,30 +16003,32 @@ COMPONENTS 811 ; + PLACED ( 1378000 0 ) S ; - bus_tie_27 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1358000 0 ) S ; - - FILLER_249 sky130_ef_io__com_bus_slice_20um - + PLACED ( 1438000 0 ) S ; - - FILLER_250 sky130_ef_io__com_bus_slice_10um - + PLACED ( 1458000 0 ) S ; - - FILLER_251 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1468000 0 ) S ; + - flash_csb_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 1475000 0 ) S ; - FILLER_253 sky130_ef_io__com_bus_slice_1um + PLACED ( 1474000 0 ) S ; - FILLER_252 sky130_ef_io__com_bus_slice_1um + PLACED ( 1473000 0 ) S ; - - flash_csb_pad sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 1475000 0 ) S ; + - FILLER_251 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1468000 0 ) S ; + - FILLER_250 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1458000 0 ) S ; + - FILLER_249 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1438000 0 ) S ; - FILLER_255 sky130_ef_io__com_bus_slice_20um + PLACED ( 1555000 0 ) S ; + - constant_block_2 constant_block + + PLACED ( 1563080 197260 ) FN ; - FILLER_256 sky130_ef_io__com_bus_slice_10um + PLACED ( 1575000 0 ) S ; - - FILLER_257 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1585000 0 ) S ; + - bus_tie_31 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1592000 0 ) S ; - FILLER_259 sky130_ef_io__com_bus_slice_1um + PLACED ( 1591000 0 ) S ; - FILLER_258 sky130_ef_io__com_bus_slice_1um + PLACED ( 1590000 0 ) S ; - - bus_tie_31 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um - + PLACED ( 1592000 0 ) S ; + - FILLER_257 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1585000 0 ) S ; - bus_tie_32 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1612000 0 ) S ; - bus_tie_33 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um @@ -2761,34 +16037,36 @@ COMPONENTS 811 ; + PLACED ( 1652000 0 ) S ; - bus_tie_35 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1672000 0 ) S ; - - FILLER_266 sky130_ef_io__com_bus_slice_20um - + PLACED ( 1712000 0 ) S ; - - FILLER_267 sky130_ef_io__com_bus_slice_10um - + PLACED ( 1732000 0 ) S ; - - FILLER_268 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1742000 0 ) S ; + - flash_clk_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 1749000 0 ) S ; + - bus_tie_36 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1692000 0 ) S ; - FILLER_270 sky130_ef_io__com_bus_slice_1um + PLACED ( 1748000 0 ) S ; - FILLER_269 sky130_ef_io__com_bus_slice_1um + PLACED ( 1747000 0 ) S ; - - bus_tie_36 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um - + PLACED ( 1692000 0 ) S ; - - flash_clk_pad sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 1749000 0 ) S ; + - FILLER_268 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1742000 0 ) S ; + - FILLER_267 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1732000 0 ) S ; + - FILLER_266 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1712000 0 ) S ; + - constant_block_3 constant_block + + PLACED ( 1837080 197260 ) FN ; - FILLER_272 sky130_ef_io__com_bus_slice_20um + PLACED ( 1829000 0 ) S ; - - FILLER_273 sky130_ef_io__com_bus_slice_10um - + PLACED ( 1849000 0 ) S ; - - FILLER_274 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1859000 0 ) S ; - - FILLER_276 sky130_ef_io__com_bus_slice_1um - + PLACED ( 1865000 0 ) S ; - - FILLER_275 sky130_ef_io__com_bus_slice_1um - + PLACED ( 1864000 0 ) S ; - bus_tie_38 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1886000 0 ) S ; - bus_tie_37 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1866000 0 ) S ; + - FILLER_276 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1865000 0 ) S ; + - FILLER_275 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1864000 0 ) S ; + - FILLER_274 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1859000 0 ) S ; + - FILLER_273 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1849000 0 ) S ; - bus_tie_42 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1966000 0 ) S ; - bus_tie_41 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um @@ -2797,64 +16075,68 @@ COMPONENTS 811 ; + PLACED ( 1926000 0 ) S ; - bus_tie_39 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 1906000 0 ) S ; - - FILLER_283 sky130_ef_io__com_bus_slice_20um - + PLACED ( 1986000 0 ) S ; - - FILLER_284 sky130_ef_io__com_bus_slice_10um - + PLACED ( 2006000 0 ) S ; - - FILLER_285 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2016000 0 ) S ; + - flash_io0_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 2023000 0 ) S ; - FILLER_287 sky130_ef_io__com_bus_slice_1um + PLACED ( 2022000 0 ) S ; - FILLER_286 sky130_ef_io__com_bus_slice_1um + PLACED ( 2021000 0 ) S ; - - flash_io0_pad sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 2023000 0 ) S ; + - FILLER_285 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2016000 0 ) S ; + - FILLER_284 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2006000 0 ) S ; + - FILLER_283 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1986000 0 ) S ; - FILLER_289 sky130_ef_io__com_bus_slice_20um + PLACED ( 2103000 0 ) S ; - - FILLER_290 sky130_ef_io__com_bus_slice_10um - + PLACED ( 2123000 0 ) S ; - - FILLER_291 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2133000 0 ) S ; - - FILLER_293 sky130_ef_io__com_bus_slice_1um - + PLACED ( 2139000 0 ) S ; - - FILLER_292 sky130_ef_io__com_bus_slice_1um - + PLACED ( 2138000 0 ) S ; + - constant_block_4 constant_block + + PLACED ( 2111080 197260 ) FN ; - bus_tie_45 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2180000 0 ) S ; - bus_tie_44 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2160000 0 ) S ; - bus_tie_43 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2140000 0 ) S ; - - FILLER_300 sky130_ef_io__com_bus_slice_20um - + PLACED ( 2260000 0 ) S ; + - FILLER_293 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2139000 0 ) S ; + - FILLER_292 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2138000 0 ) S ; + - FILLER_291 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2133000 0 ) S ; + - FILLER_290 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2123000 0 ) S ; - bus_tie_48 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2240000 0 ) S ; - bus_tie_47 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2220000 0 ) S ; - bus_tie_46 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2200000 0 ) S ; - - FILLER_301 sky130_ef_io__com_bus_slice_10um - + PLACED ( 2280000 0 ) S ; - - FILLER_302 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2290000 0 ) S ; + - FILLER_300 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2260000 0 ) S ; + - flash_io1_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 2297000 0 ) S ; - FILLER_304 sky130_ef_io__com_bus_slice_1um + PLACED ( 2296000 0 ) S ; - FILLER_303 sky130_ef_io__com_bus_slice_1um + PLACED ( 2295000 0 ) S ; - - flash_io1_pad sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 2297000 0 ) S ; + - FILLER_302 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2290000 0 ) S ; + - FILLER_301 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2280000 0 ) S ; - FILLER_306 sky130_ef_io__com_bus_slice_20um + PLACED ( 2377000 0 ) S ; + - constant_block_5 constant_block + + PLACED ( 2385080 197260 ) FN ; - FILLER_307 sky130_ef_io__com_bus_slice_10um + PLACED ( 2397000 0 ) S ; - - FILLER_308 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2407000 0 ) S ; + - bus_tie_49 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2414000 0 ) S ; - FILLER_310 sky130_ef_io__com_bus_slice_1um + PLACED ( 2413000 0 ) S ; - FILLER_309 sky130_ef_io__com_bus_slice_1um + PLACED ( 2412000 0 ) S ; - - bus_tie_49 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um - + PLACED ( 2414000 0 ) S ; + - FILLER_308 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2407000 0 ) S ; - bus_tie_50 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2434000 0 ) S ; - bus_tie_51 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um @@ -2865,62 +16147,60 @@ COMPONENTS 811 ; + PLACED ( 2494000 0 ) S ; - bus_tie_54 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2514000 0 ) S ; - - FILLER_317 sky130_ef_io__com_bus_slice_20um - + PLACED ( 2534000 0 ) S ; - - FILLER_318 sky130_ef_io__com_bus_slice_10um - + PLACED ( 2554000 0 ) S ; - - FILLER_319 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2564000 0 ) S ; + - gpio_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 2571000 0 ) S ; - FILLER_321 sky130_ef_io__com_bus_slice_1um + PLACED ( 2570000 0 ) S ; - FILLER_320 sky130_ef_io__com_bus_slice_1um + PLACED ( 2569000 0 ) S ; - - gpio_pad sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 2571000 0 ) S ; - - FILLER_323 sky130_ef_io__com_bus_slice_20um - + PLACED ( 2651000 0 ) S ; - - FILLER_324 sky130_ef_io__com_bus_slice_10um - + PLACED ( 2671000 0 ) S ; - - FILLER_325 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2681000 0 ) S ; + - FILLER_319 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2564000 0 ) S ; + - FILLER_318 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2554000 0 ) S ; + - FILLER_317 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2534000 0 ) S ; + - constant_block_6 constant_block + + PLACED ( 2659080 197260 ) FN ; + - bus_tie_55 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2688000 0 ) S ; - FILLER_327 sky130_ef_io__com_bus_slice_1um + PLACED ( 2687000 0 ) S ; - FILLER_326 sky130_ef_io__com_bus_slice_1um + PLACED ( 2686000 0 ) S ; - - bus_tie_55 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um - + PLACED ( 2688000 0 ) S ; + - FILLER_325 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2681000 0 ) S ; + - FILLER_324 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2671000 0 ) S ; + - FILLER_323 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2651000 0 ) S ; - bus_tie_57 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2728000 0 ) S ; - bus_tie_56 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2708000 0 ) S ; - - FILLER_334 sky130_ef_io__com_bus_slice_20um - + PLACED ( 2808000 0 ) S ; - bus_tie_60 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2788000 0 ) S ; - bus_tie_59 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2768000 0 ) S ; - bus_tie_58 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2748000 0 ) S ; - - FILLER_335 sky130_ef_io__com_bus_slice_10um - + PLACED ( 2828000 0 ) S ; - - FILLER_336 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2838000 0 ) S ; + - FILLER_334 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2808000 0 ) S ; + - mgmt_vssio_hvclamp_pad\[0\] sky130_ef_io__vssio_hvc_clamped_pad + + PLACED ( 2845000 0 ) S ; - FILLER_338 sky130_ef_io__com_bus_slice_1um + PLACED ( 2844000 0 ) S ; - FILLER_337 sky130_ef_io__com_bus_slice_1um + PLACED ( 2843000 0 ) S ; - - mgmt_vssio_hvclamp_pad\[0\] sky130_ef_io__vssio_hvc_clamped_pad - + PLACED ( 2845000 2035 ) S ; - - FILLER_340 sky130_ef_io__com_bus_slice_20um - + PLACED ( 2920000 0 ) S ; - - FILLER_341 sky130_ef_io__com_bus_slice_10um - + PLACED ( 2940000 0 ) S ; + - FILLER_336 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2838000 0 ) S ; + - FILLER_335 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2828000 0 ) S ; - FILLER_342 sky130_ef_io__com_bus_slice_5um + PLACED ( 2950000 0 ) S ; - - FILLER_344 sky130_ef_io__com_bus_slice_1um - + PLACED ( 2956000 0 ) S ; - - FILLER_343 sky130_ef_io__com_bus_slice_1um - + PLACED ( 2955000 0 ) S ; + - FILLER_341 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2940000 0 ) S ; + - FILLER_340 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2920000 0 ) S ; - bus_tie_64 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 3017000 0 ) S ; - bus_tie_63 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um @@ -2929,34 +16209,38 @@ COMPONENTS 811 ; + PLACED ( 2977000 0 ) S ; - bus_tie_61 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 2957000 0 ) S ; - - FILLER_351 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3077000 0 ) S ; - - FILLER_352 sky130_ef_io__com_bus_slice_10um - + PLACED ( 3097000 0 ) S ; + - FILLER_344 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2956000 0 ) S ; + - FILLER_343 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2955000 0 ) S ; - bus_tie_66 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 3057000 0 ) S ; - bus_tie_65 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 3037000 0 ) S ; - - FILLER_353 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3107000 0 ) S ; + - FILLER_352 sky130_ef_io__com_bus_slice_10um + + PLACED ( 3097000 0 ) S ; + - FILLER_351 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3077000 0 ) S ; + - mgmt_vdda_hvclamp_pad sky130_ef_io__vdda_hvc_clamped_pad + + PLACED ( 3114000 0 ) S ; - FILLER_355 sky130_ef_io__com_bus_slice_1um + PLACED ( 3113000 0 ) S ; - FILLER_354 sky130_ef_io__com_bus_slice_1um + PLACED ( 3112000 0 ) S ; - - mgmt_vdda_hvclamp_pad sky130_ef_io__vdda_hvc_clamped_pad - + PLACED ( 3114000 2035 ) S ; + - FILLER_353 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3107000 0 ) S ; - FILLER_357 sky130_ef_io__com_bus_slice_20um + PLACED ( 3189000 0 ) S ; - - FILLER_358 sky130_ef_io__com_bus_slice_10um - + PLACED ( 3209000 0 ) S ; - - FILLER_359 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3219000 0 ) S ; - FILLER_360 sky130_ef_io__com_bus_slice_1um + PLACED ( 3224000 0 ) S ; - - FILLER_361 sky130_ef_io__com_bus_slice_1um - + PLACED ( 3225000 0 ) S ; + - FILLER_359 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3219000 0 ) S ; + - FILLER_358 sky130_ef_io__com_bus_slice_10um + + PLACED ( 3209000 0 ) S ; - bus_tie_67 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 3226000 0 ) S ; + - FILLER_361 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3225000 0 ) S ; - bus_tie_68 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + PLACED ( 3246000 0 ) S ; - bus_tie_69 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um @@ -2971,10 +16255,6 @@ COMPONENTS 811 ; + PLACED ( 3346000 0 ) S ; - FILLER_369 sky130_ef_io__com_bus_slice_10um + PLACED ( 3366000 0 ) S ; - - mgmt_corner\[1\] sky130_ef_io__corner_pad - + PLACED ( 3384000 0 ) E ; - - FILLER_605 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 200000 ) E ; - FILLER_370 sky130_ef_io__com_bus_slice_5um + PLACED ( 3376000 0 ) S ; - FILLER_371 sky130_ef_io__com_bus_slice_1um @@ -2983,6 +16263,10 @@ COMPONENTS 811 ; + PLACED ( 3382000 0 ) S ; - FILLER_373 sky130_ef_io__com_bus_slice_1um + PLACED ( 3383000 0 ) S ; + - FILLER_605 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 200000 ) E ; + - mgmt_corner\[1\] sky130_ef_io__corner_pad + + PLACED ( 3384000 0 ) E ; - FILLER_378 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 284000 ) W ; - FILLER_377 sky130_ef_io__com_bus_slice_20um @@ -2991,16 +16275,16 @@ COMPONENTS 811 ; + PLACED ( 0 244000 ) W ; - FILLER_375 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 224000 ) W ; - - FILLER_379 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 304000 ) W ; - - FILLER_380 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 324000 ) W ; - - FILLER_381 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 334000 ) W ; + - mgmt_vccd_lvclamp_pad sky130_ef_io__vccd_lvc_clamped_pad + + PLACED ( 0 340000 ) W ; - FILLER_382 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 339000 ) W ; - - mgmt_vccd_lvclamp_pad sky130_ef_io__vccd_lvc_clamped_pad - + PLACED ( 0 350535 ) W ; + - FILLER_381 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 334000 ) W ; + - FILLER_380 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 324000 ) W ; + - FILLER_379 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 304000 ) W ; - FILLER_384 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 415000 ) W ; - FILLER_606 sky130_ef_io__com_bus_slice_20um @@ -3015,12 +16299,12 @@ COMPONENTS 811 ; + PLACED ( 3390035 300000 ) E ; - FILLER_611 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 320000 ) E ; - - FILLER_612 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 340000 ) E ; - - FILLER_SB1 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 350000 ) E ; - disconnect_vdda_1 sky130_ef_io__disconnect_vdda_slice_5um + PLACED ( 3390035 345000 ) E ; + - FILLER_SB1 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 350000 ) E ; + - FILLER_612 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 340000 ) E ; - FILLER_615 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 355000 ) E ; - FILLER_616 sky130_ef_io__com_bus_slice_20um @@ -3037,16 +16321,16 @@ COMPONENTS 811 ; + PLACED ( 0 455000 ) W ; - FILLER_385 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 435000 ) W ; - - FILLER_389 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 515000 ) W ; - - FILLER_390 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 535000 ) W ; - - FILLER_391 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 545000 ) W ; + - mgmt_vddio_hvclamp_pad\[0\] sky130_ef_io__vddio_hvc_clamped_pad + + PLACED ( 0 551000 ) W ; - FILLER_392 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 550000 ) W ; - - mgmt_vddio_hvclamp_pad\[0\] sky130_ef_io__vddio_hvc_clamped_pad - + PLACED ( 0 553035 ) W ; + - FILLER_391 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 545000 ) W ; + - FILLER_390 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 535000 ) W ; + - FILLER_389 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 515000 ) W ; - FILLER_394 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 626000 ) W ; - FILLER_619 sky130_ef_io__com_bus_slice_20um @@ -3055,16 +16339,16 @@ COMPONENTS 811 ; + PLACED ( 3390035 455000 ) E ; - FILLER_621 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 475000 ) E ; + - FILLER_622 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 495000 ) E ; - FILLER_624 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 580000 ) E ; - FILLER_625 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 600000 ) E ; - FILLER_626 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 620000 ) E ; - - FILLER_622 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 495000 ) E ; - mprj_pads.area1_io_pad\[0\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 499840 ) E ; + + PLACED ( 3377035 500000 ) E ; - FILLER_395 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 646000 ) W ; - FILLER_396 sky130_ef_io__com_bus_slice_20um @@ -3077,52 +16361,52 @@ COMPONENTS 811 ; + PLACED ( 0 726000 ) W ; - FILLER_400 sky130_ef_io__com_bus_slice_10um + PLACED ( 0 746000 ) W ; - - FILLER_405 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 772000 ) W ; - - FILLER_401 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 756000 ) W ; - - FILLER_SB2 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 767000 ) W ; - - FILLER_402 sky130_ef_io__com_bus_slice_1um - + PLACED ( 0 761000 ) W ; - disconnect_vdda_2 sky130_ef_io__disconnect_vdda_slice_5um + PLACED ( 0 762000 ) W ; + - FILLER_SB2 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 767000 ) W ; + - FILLER_405 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 772000 ) W ; + - FILLER_402 sky130_ef_io__com_bus_slice_1um + + PLACED ( 0 761000 ) W ; + - FILLER_401 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 756000 ) W ; - FILLER_406 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 792000 ) W ; - FILLER_407 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 812000 ) W ; - FILLER_408 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 832000 ) W ; - - FILLER_627 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 640000 ) E ; - - FILLER_628 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 660000 ) E ; - - FILLER_629 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 680000 ) E ; - FILLER_630 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 700000 ) E ; - - FILLER_634 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 806000 ) E ; - - FILLER_635 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 826000 ) E ; - - FILLER_631 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 720000 ) E ; + - FILLER_629 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 680000 ) E ; + - FILLER_628 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 660000 ) E ; + - FILLER_627 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 640000 ) E ; + - mprj_pads.area1_io_pad\[1\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 726000 ) E ; - FILLER_632 sky130_ef_io__com_bus_slice_1um + PLACED ( 3390035 725000 ) E ; - - mprj_pads.area1_io_pad\[1\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 725840 ) E ; + - FILLER_631 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 720000 ) E ; + - FILLER_635 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 826000 ) E ; + - FILLER_634 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 806000 ) E ; + - mprj_pads.area2_io_pad\[18\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 908000 ) W ; + - FILLER_413 sky130_ef_io__com_bus_slice_1um + + PLACED ( 0 907000 ) W ; + - FILLER_412 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 902000 ) W ; + - FILLER_411 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 892000 ) W ; - FILLER_410 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 872000 ) W ; - FILLER_409 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 852000 ) W ; - - FILLER_411 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 892000 ) W ; - - FILLER_412 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 902000 ) W ; - - FILLER_413 sky130_ef_io__com_bus_slice_1um - + PLACED ( 0 907000 ) W ; - - mprj_pads.area2_io_pad\[18\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 907840 ) W ; - FILLER_415 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 988000 ) W ; - FILLER_418 sky130_ef_io__com_bus_slice_20um @@ -3131,36 +16415,36 @@ COMPONENTS 811 ; + PLACED ( 0 1028000 ) W ; - FILLER_416 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1008000 ) W ; - - FILLER_636 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 846000 ) E ; - - FILLER_637 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 866000 ) E ; - - FILLER_638 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 886000 ) E ; - FILLER_639 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 906000 ) E ; - - FILLER_640 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 926000 ) E ; - - FILLER_643 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1031000 ) E ; - - FILLER_644 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1051000 ) E ; + - FILLER_638 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 886000 ) E ; + - FILLER_637 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 866000 ) E ; + - FILLER_636 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 846000 ) E ; + - mprj_pads.area1_io_pad\[2\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 951000 ) E ; - FILLER_641 sky130_ef_io__com_bus_slice_5um + PLACED ( 3390035 946000 ) E ; - - mprj_pads.area1_io_pad\[2\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 950840 ) E ; + - FILLER_640 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 926000 ) E ; + - FILLER_644 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1051000 ) E ; + - FILLER_643 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1031000 ) E ; + - mprj_pads.area2_io_pad\[17\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 1124000 ) W ; + - FILLER_423 sky130_ef_io__com_bus_slice_1um + + PLACED ( 0 1123000 ) W ; + - FILLER_422 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 1118000 ) W ; + - FILLER_421 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 1108000 ) W ; - FILLER_420 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1088000 ) W ; - FILLER_419 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1068000 ) W ; - - FILLER_421 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 1108000 ) W ; - - FILLER_422 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 1118000 ) W ; - - FILLER_423 sky130_ef_io__com_bus_slice_1um - + PLACED ( 0 1123000 ) W ; - - mprj_pads.area2_io_pad\[17\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 1123840 ) W ; - FILLER_425 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1204000 ) W ; - FILLER_428 sky130_ef_io__com_bus_slice_20um @@ -3169,42 +16453,42 @@ COMPONENTS 811 ; + PLACED ( 0 1244000 ) W ; - FILLER_426 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1224000 ) W ; - - FILLER_645 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1071000 ) E ; - - FILLER_646 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1091000 ) E ; - - FILLER_647 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1111000 ) E ; - FILLER_648 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 1131000 ) E ; + - FILLER_647 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1111000 ) E ; + - FILLER_646 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1091000 ) E ; + - FILLER_645 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1071000 ) E ; + - mprj_pads.area1_io_pad\[3\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 1177000 ) E ; + - FILLER_651 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3390035 1176000 ) E ; + - FILLER_650 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 1171000 ) E ; - FILLER_649 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 1151000 ) E ; - FILLER_653 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 1257000 ) E ; - - FILLER_650 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 1171000 ) E ; - - FILLER_651 sky130_ef_io__com_bus_slice_1um - + PLACED ( 3390035 1176000 ) E ; - - mprj_pads.area1_io_pad\[3\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 1176840 ) E ; - - FILLER_429 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 1284000 ) W ; - - FILLER_430 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 1304000 ) W ; - - FILLER_435 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 1420000 ) W ; - - FILLER_436 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 1440000 ) W ; - - FILLER_437 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 1460000 ) W ; - - FILLER_431 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 1324000 ) W ; - - FILLER_432 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 1334000 ) W ; + - mprj_pads.area2_io_pad\[16\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 1340000 ) W ; - FILLER_433 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 1339000 ) W ; - - mprj_pads.area2_io_pad\[16\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 1339840 ) W ; + - FILLER_432 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 1334000 ) W ; + - FILLER_431 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 1324000 ) W ; + - FILLER_430 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 1304000 ) W ; + - FILLER_429 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 1284000 ) W ; + - FILLER_435 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 1420000 ) W ; + - FILLER_437 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 1460000 ) W ; + - FILLER_436 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 1440000 ) W ; - FILLER_654 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 1277000 ) E ; - FILLER_655 sky130_ef_io__com_bus_slice_20um @@ -3220,59 +16504,59 @@ COMPONENTS 811 ; - FILLER_660 sky130_ef_io__com_bus_slice_5um + PLACED ( 3390035 1397000 ) E ; - mprj_pads.area1_io_pad\[4\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 1401840 ) E ; + + PLACED ( 3377035 1402000 ) E ; + - mprj_pads.area2_io_pad\[15\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 1556000 ) W ; + - FILLER_443 sky130_ef_io__com_bus_slice_1um + + PLACED ( 0 1555000 ) W ; + - FILLER_442 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 1550000 ) W ; + - FILLER_441 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 1540000 ) W ; - FILLER_440 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1520000 ) W ; - FILLER_439 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1500000 ) W ; - FILLER_438 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1480000 ) W ; - - FILLER_441 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 1540000 ) W ; - - FILLER_442 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 1550000 ) W ; - - FILLER_443 sky130_ef_io__com_bus_slice_1um - + PLACED ( 0 1555000 ) W ; - - mprj_pads.area2_io_pad\[15\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 1555840 ) W ; - FILLER_445 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1636000 ) W ; - FILLER_447 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1676000 ) W ; - FILLER_446 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1656000 ) W ; - - FILLER_662 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1482000 ) E ; - - FILLER_663 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1502000 ) E ; - - FILLER_664 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1522000 ) E ; - FILLER_665 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 1542000 ) E ; - - FILLER_666 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1562000 ) E ; - - FILLER_667 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1582000 ) E ; - - FILLER_668 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 1602000 ) E ; + - FILLER_664 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1522000 ) E ; + - FILLER_663 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1502000 ) E ; + - FILLER_662 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1482000 ) E ; + - mprj_pads.area1_io_pad\[5\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 1627000 ) E ; - FILLER_669 sky130_ef_io__com_bus_slice_5um + PLACED ( 3390035 1622000 ) E ; - - mprj_pads.area1_io_pad\[5\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 1626840 ) E ; + - FILLER_668 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1602000 ) E ; + - FILLER_667 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1582000 ) E ; + - FILLER_666 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 1562000 ) E ; + - FILLER_452 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 1766000 ) W ; + - FILLER_451 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 1756000 ) W ; - FILLER_450 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1736000 ) W ; - FILLER_449 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1716000 ) W ; - FILLER_448 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1696000 ) W ; - - FILLER_451 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 1756000 ) W ; - - FILLER_452 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 1766000 ) W ; + - mprj_pads.area2_io_pad\[14\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 1772000 ) W ; - FILLER_453 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 1771000 ) W ; - - mprj_pads.area2_io_pad\[14\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 1771840 ) W ; - FILLER_457 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1892000 ) W ; - FILLER_456 sky130_ef_io__com_bus_slice_20um @@ -3287,32 +16571,32 @@ COMPONENTS 811 ; + PLACED ( 3390035 1727000 ) E ; - FILLER_671 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 1707000 ) E ; + - FILLER_678 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 1847000 ) E ; - FILLER_677 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 1827000 ) E ; - FILLER_676 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 1807000 ) E ; - FILLER_675 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 1787000 ) E ; - - FILLER_678 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 1847000 ) E ; + - mprj_pads.area1_io_pad\[6\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 1853000 ) E ; - FILLER_679 sky130_ef_io__com_bus_slice_1um + PLACED ( 3390035 1852000 ) E ; - - mprj_pads.area1_io_pad\[6\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 1852840 ) E ; + - FILLER_461 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 1972000 ) W ; - FILLER_460 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1952000 ) W ; - FILLER_459 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1932000 ) W ; - FILLER_458 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 1912000 ) W ; - - FILLER_461 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 1972000 ) W ; - - FILLER_462 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 1982000 ) W ; + - mprj_pads.area2_io_pad\[13\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 1988000 ) W ; - FILLER_463 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 1987000 ) W ; - - mprj_pads.area2_io_pad\[13\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 1987840 ) W ; + - FILLER_462 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 1982000 ) W ; - FILLER_467 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2108000 ) W ; - FILLER_466 sky130_ef_io__com_bus_slice_20um @@ -3336,27 +16620,27 @@ COMPONENTS 811 ; - FILLER_688 sky130_ef_io__com_bus_slice_5um + PLACED ( 3390035 2073000 ) E ; - user1_vssa_hvclamp_pad\[1\] sky130_ef_io__vssa_hvc_clamped_pad - + PLACED ( 3388000 2080035 ) E ; + + PLACED ( 3390035 2078000 ) E ; + - FILLER_471 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 2188000 ) W ; - FILLER_470 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2168000 ) W ; - FILLER_469 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2148000 ) W ; - FILLER_468 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2128000 ) W ; - - FILLER_471 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 2188000 ) W ; + - user2_vssd_lvclamp_pad sky130_ef_io__vssd_lvc_clamped3_pad + + PLACED ( 0 2204000 ) W ; - FILLER_475 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2279000 ) W ; - - FILLER_472 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 2198000 ) W ; - FILLER_473 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 2203000 ) W ; - - user2_vssd_lvclamp_pad sky130_ef_io__vssd_lvc_clamped3_pad - + PLACED ( 0 2214885 ) W ; - - FILLER_476 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 2299000 ) W ; + - FILLER_472 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 2198000 ) W ; - FILLER_477 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2319000 ) W ; + - FILLER_476 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 2299000 ) W ; - FILLER_692 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 2193000 ) E ; - FILLER_691 sky130_ef_io__com_bus_slice_20um @@ -3371,26 +16655,26 @@ COMPONENTS 811 ; + PLACED ( 3390035 2233000 ) E ; - FILLER_693 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 2213000 ) E ; - - FILLER_697 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 2293000 ) E ; + - user1_vssd_lvclamp_pad sky130_ef_io__vssd_lvc_clamped3_pad + + PLACED ( 3390035 2299000 ) E ; - FILLER_698 sky130_ef_io__com_bus_slice_1um + PLACED ( 3390035 2298000 ) E ; - - user1_vssd_lvclamp_pad sky130_ef_io__vssd_lvc_clamped3_pad - + PLACED ( 3379150 2298950 ) E ; + - FILLER_697 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 2293000 ) E ; - FILLER_480 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2379000 ) W ; - FILLER_479 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2359000 ) W ; - FILLER_478 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2339000 ) W ; - - FILLER_481 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 2399000 ) W ; - - FILLER_482 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 2409000 ) W ; + - user2_vdda_hvclamp_pad sky130_ef_io__vdda_hvc_clamped_pad + + PLACED ( 0 2415000 ) W ; - FILLER_483 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 2414000 ) W ; - - user2_vdda_hvclamp_pad sky130_ef_io__vdda_hvc_clamped_pad - + PLACED ( 0 2417035 ) W ; + - FILLER_482 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 2409000 ) W ; + - FILLER_481 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 2399000 ) W ; - FILLER_487 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2530000 ) W ; - FILLER_486 sky130_ef_io__com_bus_slice_20um @@ -3414,43 +16698,43 @@ COMPONENTS 811 ; - FILLER_707 sky130_ef_io__com_bus_slice_5um + PLACED ( 3390035 2514000 ) E ; - user1_vdda_hvclamp_pad\[1\] sky130_ef_io__vdda_hvc_clamped_pad - + PLACED ( 3388000 2521035 ) E ; - - FILLER_488 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 2550000 ) W ; - - FILLER_489 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 2570000 ) W ; - - FILLER_490 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 2590000 ) W ; - - FILLER_495 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 2706000 ) W ; - - FILLER_496 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 2726000 ) W ; + + PLACED ( 3390035 2519000 ) E ; - FILLER_491 sky130_ef_io__com_bus_slice_10um + PLACED ( 0 2610000 ) W ; - - FILLER_492 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 2620000 ) W ; + - FILLER_490 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 2590000 ) W ; + - FILLER_489 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 2570000 ) W ; + - FILLER_488 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 2550000 ) W ; + - mprj_pads.area2_io_pad\[12\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 2626000 ) W ; - FILLER_493 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 2625000 ) W ; - - mprj_pads.area2_io_pad\[12\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 2625840 ) W ; + - FILLER_492 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 2620000 ) W ; + - FILLER_496 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 2726000 ) W ; + - FILLER_495 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 2706000 ) W ; - FILLER_709 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 2594000 ) E ; - - FILLER_710 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 2614000 ) E ; - - FILLER_711 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 2634000 ) E ; - - FILLER_712 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 2654000 ) E ; - FILLER_713 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 2674000 ) E ; - - FILLER_714 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 2694000 ) E ; - - FILLER_715 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 2714000 ) E ; + - FILLER_712 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 2654000 ) E ; + - FILLER_711 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 2634000 ) E ; + - FILLER_710 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 2614000 ) E ; + - mprj_pads.area1_io_pad\[7\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 2739000 ) E ; - FILLER_716 sky130_ef_io__com_bus_slice_5um + PLACED ( 3390035 2734000 ) E ; - - mprj_pads.area1_io_pad\[7\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 2738840 ) E ; + - FILLER_715 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 2714000 ) E ; + - FILLER_714 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 2694000 ) E ; - FILLER_500 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2806000 ) W ; - FILLER_499 sky130_ef_io__com_bus_slice_20um @@ -3459,14 +16743,14 @@ COMPONENTS 811 ; + PLACED ( 0 2766000 ) W ; - FILLER_497 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2746000 ) W ; - - FILLER_501 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 2826000 ) W ; - - FILLER_502 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 2836000 ) W ; + - mprj_pads.area2_io_pad\[11\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 2842000 ) W ; - FILLER_503 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 2841000 ) W ; - - mprj_pads.area2_io_pad\[11\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 2841840 ) W ; + - FILLER_502 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 2836000 ) W ; + - FILLER_501 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 2826000 ) W ; - FILLER_506 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2942000 ) W ; - FILLER_505 sky130_ef_io__com_bus_slice_20um @@ -3493,36 +16777,36 @@ COMPONENTS 811 ; + PLACED ( 0 2982000 ) W ; - FILLER_507 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 2962000 ) W ; - - FILLER_511 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 3042000 ) W ; - - FILLER_512 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 3052000 ) W ; + - mprj_pads.area2_io_pad\[10\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 3058000 ) W ; - FILLER_513 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 3057000 ) W ; - - mprj_pads.area2_io_pad\[10\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 3057840 ) W ; + - FILLER_512 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 3052000 ) W ; + - FILLER_511 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 3042000 ) W ; - FILLER_516 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3158000 ) W ; - FILLER_515 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3138000 ) W ; - - FILLER_728 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3045000 ) E ; - - FILLER_729 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3065000 ) E ; - - FILLER_730 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3085000 ) E ; - - FILLER_731 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3105000 ) E ; - - FILLER_732 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3125000 ) E ; - - FILLER_733 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3145000 ) E ; - - FILLER_725 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 2959000 ) E ; + - mprj_pads.area1_io_pad\[8\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 2965000 ) E ; - FILLER_726 sky130_ef_io__com_bus_slice_1um + PLACED ( 3390035 2964000 ) E ; - - mprj_pads.area1_io_pad\[8\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 2964840 ) E ; + - FILLER_725 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 2959000 ) E ; + - FILLER_731 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3105000 ) E ; + - FILLER_730 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3085000 ) E ; + - FILLER_729 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3065000 ) E ; + - FILLER_728 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3045000 ) E ; + - FILLER_733 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3145000 ) E ; + - FILLER_732 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3125000 ) E ; - FILLER_520 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3238000 ) W ; - FILLER_519 sky130_ef_io__com_bus_slice_20um @@ -3531,72 +16815,72 @@ COMPONENTS 811 ; + PLACED ( 0 3198000 ) W ; - FILLER_517 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3178000 ) W ; - - FILLER_521 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 3258000 ) W ; - - FILLER_522 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 3268000 ) W ; + - mprj_pads.area2_io_pad\[9\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 3274000 ) W ; - FILLER_523 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 3273000 ) W ; - - mprj_pads.area2_io_pad\[9\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 3273840 ) W ; + - FILLER_522 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 3268000 ) W ; + - FILLER_521 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 3258000 ) W ; - FILLER_526 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3374000 ) W ; - FILLER_525 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3354000 ) W ; - - FILLER_734 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3165000 ) E ; - - FILLER_737 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3270000 ) E ; - - FILLER_738 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3290000 ) E ; - - FILLER_739 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3310000 ) E ; - - FILLER_740 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3330000 ) E ; - - FILLER_741 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3350000 ) E ; - - FILLER_742 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3370000 ) E ; + - mprj_pads.area1_io_pad\[9\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 3190000 ) E ; - FILLER_735 sky130_ef_io__com_bus_slice_5um + PLACED ( 3390035 3185000 ) E ; - - mprj_pads.area1_io_pad\[9\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 3189840 ) E ; - - FILLER_527 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 3394000 ) W ; - - FILLER_528 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 3414000 ) W ; - - FILLER_529 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 3434000 ) W ; + - FILLER_734 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3165000 ) E ; + - FILLER_739 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3310000 ) E ; + - FILLER_738 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3290000 ) E ; + - FILLER_737 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3270000 ) E ; + - FILLER_742 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3370000 ) E ; + - FILLER_741 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3350000 ) E ; + - FILLER_740 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3330000 ) E ; - FILLER_530 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3454000 ) W ; - - FILLER_535 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 3570000 ) W ; - - FILLER_531 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 3474000 ) W ; - - FILLER_532 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 3484000 ) W ; + - FILLER_529 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 3434000 ) W ; + - FILLER_528 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 3414000 ) W ; + - FILLER_527 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 3394000 ) W ; + - mprj_pads.area2_io_pad\[8\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 3490000 ) W ; - FILLER_533 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 3489000 ) W ; - - mprj_pads.area2_io_pad\[8\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 3489840 ) W ; - - FILLER_743 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3390000 ) E ; - - FILLER_747 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3496000 ) E ; - - FILLER_748 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3516000 ) E ; - - FILLER_749 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3536000 ) E ; - - FILLER_750 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3556000 ) E ; - - FILLER_751 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3576000 ) E ; - - FILLER_744 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 3410000 ) E ; + - FILLER_532 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 3484000 ) W ; + - FILLER_531 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 3474000 ) W ; + - FILLER_535 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 3570000 ) W ; + - mprj_pads.area1_io_pad\[10\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 3416000 ) E ; - FILLER_745 sky130_ef_io__com_bus_slice_1um + PLACED ( 3390035 3415000 ) E ; - - mprj_pads.area1_io_pad\[10\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 3415840 ) E ; + - FILLER_744 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 3410000 ) E ; + - FILLER_743 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3390000 ) E ; + - FILLER_749 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3536000 ) E ; + - FILLER_748 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3516000 ) E ; + - FILLER_747 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3496000 ) E ; + - FILLER_751 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3576000 ) E ; + - FILLER_750 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3556000 ) E ; - FILLER_539 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3650000 ) W ; - FILLER_538 sky130_ef_io__com_bus_slice_20um @@ -3605,22 +16889,24 @@ COMPONENTS 811 ; + PLACED ( 0 3610000 ) W ; - FILLER_536 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3590000 ) W ; - - FILLER_540 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 3670000 ) W ; - - FILLER_541 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 3690000 ) W ; - - FILLER_542 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 3700000 ) W ; + - mprj_pads.area2_io_pad\[7\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 3706000 ) W ; - FILLER_543 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 3705000 ) W ; - - mprj_pads.area2_io_pad\[7\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 3705840 ) W ; + - FILLER_542 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 3700000 ) W ; + - FILLER_541 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 3690000 ) W ; + - FILLER_540 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 3670000 ) W ; - FILLER_545 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3786000 ) W ; - FILLER_752 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 3596000 ) E ; - FILLER_753 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 3616000 ) E ; + - FILLER_754 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 3636000 ) E ; - FILLER_756 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 3721000 ) E ; - FILLER_757 sky130_ef_io__com_bus_slice_20um @@ -3629,10 +16915,8 @@ COMPONENTS 811 ; + PLACED ( 3390035 3761000 ) E ; - FILLER_759 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 3781000 ) E ; - - FILLER_754 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 3636000 ) E ; - mprj_pads.area1_io_pad\[11\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 3640840 ) E ; + + PLACED ( 3377035 3641000 ) E ; - FILLER_549 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3866000 ) W ; - FILLER_548 sky130_ef_io__com_bus_slice_20um @@ -3641,36 +16925,36 @@ COMPONENTS 811 ; + PLACED ( 0 3826000 ) W ; - FILLER_546 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 3806000 ) W ; - - FILLER_550 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 3886000 ) W ; - - FILLER_551 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 3906000 ) W ; - - FILLER_552 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 3916000 ) W ; + - mprj_pads.area2_io_pad\[6\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 3922000 ) W ; - FILLER_553 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 3921000 ) W ; - - mprj_pads.area2_io_pad\[6\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 3921840 ) W ; + - FILLER_552 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 3916000 ) W ; + - FILLER_551 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 3906000 ) W ; + - FILLER_550 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 3886000 ) W ; - FILLER_555 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4002000 ) W ; - - FILLER_760 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3801000 ) E ; - - FILLER_761 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3821000 ) E ; - - FILLER_762 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3841000 ) E ; - - FILLER_765 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3946000 ) E ; - - FILLER_766 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3966000 ) E ; - - FILLER_767 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 3986000 ) E ; - - FILLER_768 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 4006000 ) E ; + - mprj_pads.area1_io_pad\[12\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3377035 3866000 ) E ; - FILLER_763 sky130_ef_io__com_bus_slice_5um + PLACED ( 3390035 3861000 ) E ; - - mprj_pads.area1_io_pad\[12\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 3865840 ) E ; + - FILLER_762 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3841000 ) E ; + - FILLER_761 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3821000 ) E ; + - FILLER_760 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3801000 ) E ; + - FILLER_765 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3946000 ) E ; + - FILLER_768 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4006000 ) E ; + - FILLER_767 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3986000 ) E ; + - FILLER_766 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 3966000 ) E ; - FILLER_559 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4082000 ) W ; - FILLER_558 sky130_ef_io__com_bus_slice_20um @@ -3679,16 +16963,16 @@ COMPONENTS 811 ; + PLACED ( 0 4042000 ) W ; - FILLER_556 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4022000 ) W ; - - FILLER_560 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 4102000 ) W ; - - FILLER_561 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 4122000 ) W ; - - FILLER_562 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 4132000 ) W ; + - user2_vssa_hvclamp_pad sky130_ef_io__vssa_hvc_clamped_pad + + PLACED ( 0 4138000 ) W ; - FILLER_563 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 4137000 ) W ; - - user2_vssa_hvclamp_pad sky130_ef_io__vssa_hvc_clamped_pad - + PLACED ( 0 4140035 ) W ; + - FILLER_562 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 4132000 ) W ; + - FILLER_561 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 4122000 ) W ; + - FILLER_560 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 4102000 ) W ; - FILLER_565 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4213000 ) W ; - FILLER_769 sky130_ef_io__com_bus_slice_20um @@ -3697,18 +16981,18 @@ COMPONENTS 811 ; + PLACED ( 3390035 4046000 ) E ; - FILLER_771 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4066000 ) E ; + - FILLER_772 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 4086000 ) E ; + - FILLER_773 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3390035 4091000 ) E ; - FILLER_775 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4167000 ) E ; - FILLER_776 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4187000 ) E ; - FILLER_777 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4207000 ) E ; - - FILLER_772 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 4086000 ) E ; - - FILLER_773 sky130_ef_io__com_bus_slice_1um - + PLACED ( 3390035 4091000 ) E ; - user1_vdda_hvclamp_pad\[0\] sky130_ef_io__vdda_hvc_clamped_pad - + PLACED ( 3388000 4094035 ) E ; + + PLACED ( 3390035 4092000 ) E ; - FILLER_569 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4293000 ) W ; - FILLER_568 sky130_ef_io__com_bus_slice_20um @@ -3717,16 +17001,16 @@ COMPONENTS 811 ; + PLACED ( 0 4253000 ) W ; - FILLER_566 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4233000 ) W ; - - FILLER_570 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 4313000 ) W ; - - FILLER_571 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 4333000 ) W ; - - FILLER_572 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 4343000 ) W ; + - mgmt_vddio_hvclamp_pad\[1\] sky130_ef_io__vddio_hvc_clamped_pad + + PLACED ( 0 4349000 ) W ; - FILLER_573 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 4348000 ) W ; - - mgmt_vddio_hvclamp_pad\[1\] sky130_ef_io__vddio_hvc_clamped_pad - + PLACED ( 0 4351035 ) W ; + - FILLER_572 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 4343000 ) W ; + - FILLER_571 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 4333000 ) W ; + - FILLER_570 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 4313000 ) W ; - FILLER_575 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4424000 ) W ; - FILLER_778 sky130_ef_io__com_bus_slice_20um @@ -3737,14 +17021,14 @@ COMPONENTS 811 ; + PLACED ( 3390035 4267000 ) E ; - FILLER_781 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4287000 ) E ; + - FILLER_782 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 4307000 ) E ; - FILLER_784 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4392000 ) E ; - FILLER_785 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4412000 ) E ; - - FILLER_782 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 4307000 ) E ; - mprj_pads.area1_io_pad\[13\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 4311840 ) E ; + + PLACED ( 3377035 4312000 ) E ; - FILLER_579 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4504000 ) W ; - FILLER_578 sky130_ef_io__com_bus_slice_20um @@ -3753,16 +17037,16 @@ COMPONENTS 811 ; + PLACED ( 0 4464000 ) W ; - FILLER_576 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4444000 ) W ; - - FILLER_580 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 4524000 ) W ; - - FILLER_581 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 4544000 ) W ; - - FILLER_582 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 4554000 ) W ; + - user2_vccd_lvclamp_pad sky130_ef_io__vccd_lvc_clamped3_pad + + PLACED ( 0 4560000 ) W ; - FILLER_583 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 4559000 ) W ; - - user2_vccd_lvclamp_pad sky130_ef_io__vccd_lvc_clamped3_pad - + PLACED ( 0 4570885 ) W ; + - FILLER_582 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 4554000 ) W ; + - FILLER_581 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 4544000 ) W ; + - FILLER_580 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 4524000 ) W ; - FILLER_585 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4635000 ) W ; - FILLER_790 sky130_ef_io__com_bus_slice_20um @@ -3775,16 +17059,16 @@ COMPONENTS 811 ; + PLACED ( 3390035 4452000 ) E ; - FILLER_786 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4432000 ) E ; - - FILLER_791 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 4532000 ) E ; + - user1_vccd_lvclamp_pad sky130_ef_io__vccd_lvc_clamped3_pad + + PLACED ( 3390035 4538000 ) E ; - FILLER_792 sky130_ef_io__com_bus_slice_1um + PLACED ( 3390035 4537000 ) E ; - - user1_vccd_lvclamp_pad sky130_ef_io__vccd_lvc_clamped3_pad - + PLACED ( 3379150 4537950 ) E ; - - FILLER_794 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 4613000 ) E ; + - FILLER_791 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 4532000 ) E ; - FILLER_795 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4633000 ) E ; + - FILLER_794 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4613000 ) E ; - FILLER_589 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4715000 ) W ; - FILLER_588 sky130_ef_io__com_bus_slice_20um @@ -3793,16 +17077,16 @@ COMPONENTS 811 ; + PLACED ( 0 4675000 ) W ; - FILLER_586 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4655000 ) W ; - - FILLER_590 sky130_ef_io__com_bus_slice_20um - + PLACED ( 0 4735000 ) W ; - - FILLER_591 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 4755000 ) W ; - - FILLER_592 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 4765000 ) W ; + - mprj_pads.area2_io_pad\[5\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 0 4771000 ) W ; - FILLER_593 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 4770000 ) W ; - - mprj_pads.area2_io_pad\[5\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 160 4770840 ) W ; + - FILLER_592 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 4765000 ) W ; + - FILLER_591 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 4755000 ) W ; + - FILLER_590 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 4735000 ) W ; - FILLER_595 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4851000 ) W ; - FILLER_796 sky130_ef_io__com_bus_slice_20um @@ -3815,12 +17099,12 @@ COMPONENTS 811 ; + PLACED ( 3390035 4713000 ) E ; - FILLER_800 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4733000 ) E ; - - FILLER_803 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 4838000 ) E ; - FILLER_801 sky130_ef_io__com_bus_slice_5um + PLACED ( 3390035 4753000 ) E ; + - FILLER_803 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4838000 ) E ; - mprj_pads.area1_io_pad\[14\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3377195 4757840 ) E ; + + PLACED ( 3377035 4758000 ) E ; - FILLER_600 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4951000 ) W ; - FILLER_599 sky130_ef_io__com_bus_slice_20um @@ -3831,14 +17115,14 @@ COMPONENTS 811 ; + PLACED ( 0 4891000 ) W ; - FILLER_596 sky130_ef_io__com_bus_slice_20um + PLACED ( 0 4871000 ) W ; - - FILLER_601 sky130_ef_io__com_bus_slice_10um - + PLACED ( 0 4971000 ) W ; - - FILLER_602 sky130_ef_io__com_bus_slice_5um - + PLACED ( 0 4981000 ) W ; - FILLER_604 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 4987000 ) W ; - FILLER_603 sky130_ef_io__com_bus_slice_1um + PLACED ( 0 4986000 ) W ; + - FILLER_602 sky130_ef_io__com_bus_slice_5um + + PLACED ( 0 4981000 ) W ; + - FILLER_601 sky130_ef_io__com_bus_slice_10um + + PLACED ( 0 4971000 ) W ; - user2_corner sky130_ef_io__corner_pad + PLACED ( 0 4988000 ) W ; - FILLER_5 sky130_ef_io__com_bus_slice_20um @@ -3851,22 +17135,22 @@ COMPONENTS 811 ; + PLACED ( 244000 4990035 ) N ; - FILLER_6 sky130_ef_io__com_bus_slice_20um + PLACED ( 224000 4990035 ) N ; + - FILLER_13 sky130_ef_io__com_bus_slice_10um + + PLACED ( 364000 4990035 ) N ; - FILLER_12 sky130_ef_io__com_bus_slice_20um + PLACED ( 344000 4990035 ) N ; - FILLER_11 sky130_ef_io__com_bus_slice_20um + PLACED ( 324000 4990035 ) N ; - FILLER_10 sky130_ef_io__com_bus_slice_20um + PLACED ( 304000 4990035 ) N ; - - FILLER_13 sky130_ef_io__com_bus_slice_10um - + PLACED ( 364000 4990035 ) N ; - - FILLER_14 sky130_ef_io__com_bus_slice_5um - + PLACED ( 374000 4990035 ) N ; + - mprj_pads.area2_io_pad\[4\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 381000 4977035 ) N ; - FILLER_16 sky130_ef_io__com_bus_slice_1um + PLACED ( 380000 4990035 ) N ; - FILLER_15 sky130_ef_io__com_bus_slice_1um + PLACED ( 379000 4990035 ) N ; - - mprj_pads.area2_io_pad\[4\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 381000 4977035 ) N ; + - FILLER_14 sky130_ef_io__com_bus_slice_5um + + PLACED ( 374000 4990035 ) N ; - FILLER_18 sky130_ef_io__com_bus_slice_20um + PLACED ( 461000 4990035 ) N ; - FILLER_19 sky130_ef_io__com_bus_slice_20um @@ -3883,16 +17167,16 @@ COMPONENTS 811 ; + PLACED ( 581000 4990035 ) N ; - FILLER_25 sky130_ef_io__com_bus_slice_20um + PLACED ( 601000 4990035 ) N ; - - FILLER_26 sky130_ef_io__com_bus_slice_10um - + PLACED ( 621000 4990035 ) N ; - FILLER_27 sky130_ef_io__com_bus_slice_5um + PLACED ( 631000 4990035 ) N ; + - FILLER_26 sky130_ef_io__com_bus_slice_10um + + PLACED ( 621000 4990035 ) N ; + - mprj_pads.area2_io_pad\[3\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 638000 4977035 ) N ; - FILLER_29 sky130_ef_io__com_bus_slice_1um + PLACED ( 637000 4990035 ) N ; - FILLER_28 sky130_ef_io__com_bus_slice_1um + PLACED ( 636000 4990035 ) N ; - - mprj_pads.area2_io_pad\[3\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 638000 4977035 ) N ; - FILLER_34 sky130_ef_io__com_bus_slice_20um + PLACED ( 778000 4990035 ) N ; - FILLER_33 sky130_ef_io__com_bus_slice_20um @@ -3907,18 +17191,18 @@ COMPONENTS 811 ; + PLACED ( 818000 4990035 ) N ; - FILLER_35 sky130_ef_io__com_bus_slice_20um + PLACED ( 798000 4990035 ) N ; - - FILLER_38 sky130_ef_io__com_bus_slice_20um - + PLACED ( 858000 4990035 ) N ; - - FILLER_39 sky130_ef_io__com_bus_slice_10um - + PLACED ( 878000 4990035 ) N ; - - FILLER_40 sky130_ef_io__com_bus_slice_5um - + PLACED ( 888000 4990035 ) N ; + - mprj_pads.area2_io_pad\[2\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 895000 4977035 ) N ; - FILLER_42 sky130_ef_io__com_bus_slice_1um + PLACED ( 894000 4990035 ) N ; - FILLER_41 sky130_ef_io__com_bus_slice_1um + PLACED ( 893000 4990035 ) N ; - - mprj_pads.area2_io_pad\[2\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 895000 4977035 ) N ; + - FILLER_40 sky130_ef_io__com_bus_slice_5um + + PLACED ( 888000 4990035 ) N ; + - FILLER_39 sky130_ef_io__com_bus_slice_10um + + PLACED ( 878000 4990035 ) N ; + - FILLER_38 sky130_ef_io__com_bus_slice_20um + + PLACED ( 858000 4990035 ) N ; - FILLER_45 sky130_ef_io__com_bus_slice_20um + PLACED ( 995000 4990035 ) N ; - FILLER_44 sky130_ef_io__com_bus_slice_20um @@ -3927,6 +17211,8 @@ COMPONENTS 811 ; + PLACED ( 1035000 4990035 ) N ; - FILLER_46 sky130_ef_io__com_bus_slice_20um + PLACED ( 1015000 4990035 ) N ; + - FILLER_52 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1135000 4990035 ) N ; - FILLER_51 sky130_ef_io__com_bus_slice_20um + PLACED ( 1115000 4990035 ) N ; - FILLER_50 sky130_ef_io__com_bus_slice_20um @@ -3935,16 +17221,14 @@ COMPONENTS 811 ; + PLACED ( 1075000 4990035 ) N ; - FILLER_48 sky130_ef_io__com_bus_slice_20um + PLACED ( 1055000 4990035 ) N ; - - FILLER_52 sky130_ef_io__com_bus_slice_10um - + PLACED ( 1135000 4990035 ) N ; - - FILLER_53 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1145000 4990035 ) N ; + - mprj_pads.area2_io_pad\[1\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 1152000 4977035 ) N ; - FILLER_55 sky130_ef_io__com_bus_slice_1um + PLACED ( 1151000 4990035 ) N ; - FILLER_54 sky130_ef_io__com_bus_slice_1um + PLACED ( 1150000 4990035 ) N ; - - mprj_pads.area2_io_pad\[1\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 1152000 4977035 ) N ; + - FILLER_53 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1145000 4990035 ) N ; - FILLER_58 sky130_ef_io__com_bus_slice_20um + PLACED ( 1252000 4990035 ) N ; - FILLER_57 sky130_ef_io__com_bus_slice_20um @@ -3957,22 +17241,22 @@ COMPONENTS 811 ; + PLACED ( 1292000 4990035 ) N ; - FILLER_59 sky130_ef_io__com_bus_slice_20um + PLACED ( 1272000 4990035 ) N ; - - FILLER_64 sky130_ef_io__com_bus_slice_20um - + PLACED ( 1372000 4990035 ) N ; - - FILLER_63 sky130_ef_io__com_bus_slice_20um - + PLACED ( 1352000 4990035 ) N ; - - FILLER_65 sky130_ef_io__com_bus_slice_10um - + PLACED ( 1392000 4990035 ) N ; - - FILLER_66 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1402000 4990035 ) N ; + - mprj_pads.area2_io_pad\[0\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 1410000 4977035 ) N ; - FILLER_69 sky130_ef_io__com_bus_slice_1um + PLACED ( 1409000 4990035 ) N ; - FILLER_68 sky130_ef_io__com_bus_slice_1um + PLACED ( 1408000 4990035 ) N ; - FILLER_67 sky130_ef_io__com_bus_slice_1um + PLACED ( 1407000 4990035 ) N ; - - mprj_pads.area2_io_pad\[0\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 1410000 4977035 ) N ; + - FILLER_66 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1402000 4990035 ) N ; + - FILLER_65 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1392000 4990035 ) N ; + - FILLER_64 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1372000 4990035 ) N ; + - FILLER_63 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1352000 4990035 ) N ; - FILLER_74 sky130_ef_io__com_bus_slice_20um + PLACED ( 1550000 4990035 ) N ; - FILLER_73 sky130_ef_io__com_bus_slice_20um @@ -3987,22 +17271,22 @@ COMPONENTS 811 ; + PLACED ( 1590000 4990035 ) N ; - FILLER_75 sky130_ef_io__com_bus_slice_20um + PLACED ( 1570000 4990035 ) N ; - - FILLER_78 sky130_ef_io__com_bus_slice_20um - + PLACED ( 1630000 4990035 ) N ; - - FILLER_79 sky130_ef_io__com_bus_slice_10um - + PLACED ( 1650000 4990035 ) N ; - - FILLER_80 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1660000 4990035 ) N ; + - mgmt_vssio_hvclamp_pad\[1\] sky130_ef_io__vssio_hvc_clamped_pad + + PLACED ( 1667000 4990035 ) N ; - FILLER_82 sky130_ef_io__com_bus_slice_1um + PLACED ( 1666000 4990035 ) N ; - FILLER_81 sky130_ef_io__com_bus_slice_1um + PLACED ( 1665000 4990035 ) N ; - - mgmt_vssio_hvclamp_pad\[1\] sky130_ef_io__vssio_hvc_clamped_pad - + PLACED ( 1667000 4990035 ) N ; - - FILLER_SB3 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1747000 4990035 ) N ; + - FILLER_80 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1660000 4990035 ) N ; + - FILLER_79 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1650000 4990035 ) N ; + - FILLER_78 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1630000 4990035 ) N ; - disconnect_vdda_0 sky130_ef_io__disconnect_vdda_slice_5um + PLACED ( 1742000 4990035 ) N ; + - FILLER_SB3 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1747000 4990035 ) N ; - FILLER_87 sky130_ef_io__com_bus_slice_20um + PLACED ( 1772000 4990035 ) N ; - FILLER_86 sky130_ef_io__com_bus_slice_20um @@ -4019,14 +17303,14 @@ COMPONENTS 811 ; + PLACED ( 1872000 4990035 ) N ; - FILLER_93 sky130_ef_io__com_bus_slice_20um + PLACED ( 1892000 4990035 ) N ; - - FILLER_94 sky130_ef_io__com_bus_slice_5um - + PLACED ( 1912000 4990035 ) N ; + - mprj_pads.area1_io_pad\[18\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 1919000 4977035 ) N ; - FILLER_96 sky130_ef_io__com_bus_slice_1um + PLACED ( 1918000 4990035 ) N ; - FILLER_95 sky130_ef_io__com_bus_slice_1um + PLACED ( 1917000 4990035 ) N ; - - mprj_pads.area1_io_pad\[18\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 1919000 4977035 ) N ; + - FILLER_94 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1912000 4990035 ) N ; - FILLER_101 sky130_ef_io__com_bus_slice_20um + PLACED ( 2059000 4990035 ) N ; - FILLER_100 sky130_ef_io__com_bus_slice_20um @@ -4063,6 +17347,8 @@ COMPONENTS 811 ; + PLACED ( 2319000 4990035 ) N ; - FILLER_115 sky130_ef_io__com_bus_slice_20um + PLACED ( 2339000 4990035 ) N ; + - FILLER_116 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2359000 4990035 ) N ; - FILLER_118 sky130_ef_io__com_bus_slice_20um + PLACED ( 2444000 4990035 ) N ; - FILLER_119 sky130_ef_io__com_bus_slice_20um @@ -4073,26 +17359,24 @@ COMPONENTS 811 ; + PLACED ( 2504000 4990035 ) N ; - FILLER_122 sky130_ef_io__com_bus_slice_20um + PLACED ( 2524000 4990035 ) N ; - - FILLER_116 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2359000 4990035 ) N ; - mprj_pads.area1_io_pad\[17\] sky130_ef_io__gpiov2_pad_wrapped + PLACED ( 2364000 4977035 ) N ; + - FILLER_126 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2604000 4990035 ) N ; - FILLER_125 sky130_ef_io__com_bus_slice_20um + PLACED ( 2584000 4990035 ) N ; - FILLER_124 sky130_ef_io__com_bus_slice_20um + PLACED ( 2564000 4990035 ) N ; - FILLER_123 sky130_ef_io__com_bus_slice_20um + PLACED ( 2544000 4990035 ) N ; - - FILLER_126 sky130_ef_io__com_bus_slice_10um - + PLACED ( 2604000 4990035 ) N ; - - FILLER_127 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2614000 4990035 ) N ; + - mprj_pads.area1_io_pad\[16\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 2621000 4977035 ) N ; - FILLER_129 sky130_ef_io__com_bus_slice_1um + PLACED ( 2620000 4990035 ) N ; - FILLER_128 sky130_ef_io__com_bus_slice_1um + PLACED ( 2619000 4990035 ) N ; - - mprj_pads.area1_io_pad\[16\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 2621000 4977035 ) N ; + - FILLER_127 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2614000 4990035 ) N ; - FILLER_133 sky130_ef_io__com_bus_slice_20um + PLACED ( 2741000 4990035 ) N ; - FILLER_132 sky130_ef_io__com_bus_slice_20um @@ -4105,20 +17389,20 @@ COMPONENTS 811 ; + PLACED ( 2781000 4990035 ) N ; - FILLER_134 sky130_ef_io__com_bus_slice_20um + PLACED ( 2761000 4990035 ) N ; - - FILLER_138 sky130_ef_io__com_bus_slice_20um - + PLACED ( 2841000 4990035 ) N ; - - FILLER_137 sky130_ef_io__com_bus_slice_20um - + PLACED ( 2821000 4990035 ) N ; - - FILLER_139 sky130_ef_io__com_bus_slice_10um - + PLACED ( 2861000 4990035 ) N ; - - FILLER_140 sky130_ef_io__com_bus_slice_5um - + PLACED ( 2871000 4990035 ) N ; + - user1_vssa_hvclamp_pad\[0\] sky130_ef_io__vssa_hvc_clamped_pad + + PLACED ( 2878000 4990035 ) N ; - FILLER_142 sky130_ef_io__com_bus_slice_1um + PLACED ( 2877000 4990035 ) N ; - FILLER_141 sky130_ef_io__com_bus_slice_1um + PLACED ( 2876000 4990035 ) N ; - - user1_vssa_hvclamp_pad\[0\] sky130_ef_io__vssa_hvc_clamped_pad - + PLACED ( 2878000 4990035 ) N ; + - FILLER_140 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2871000 4990035 ) N ; + - FILLER_139 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2861000 4990035 ) N ; + - FILLER_138 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2841000 4990035 ) N ; + - FILLER_137 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2821000 4990035 ) N ; - FILLER_144 sky130_ef_io__com_bus_slice_20um + PLACED ( 2953000 4990035 ) N ; - FILLER_148 sky130_ef_io__com_bus_slice_20um @@ -4129,22 +17413,22 @@ COMPONENTS 811 ; + PLACED ( 2993000 4990035 ) N ; - FILLER_145 sky130_ef_io__com_bus_slice_20um + PLACED ( 2973000 4990035 ) N ; + - FILLER_152 sky130_ef_io__com_bus_slice_10um + + PLACED ( 3113000 4990035 ) N ; - FILLER_151 sky130_ef_io__com_bus_slice_20um + PLACED ( 3093000 4990035 ) N ; - FILLER_150 sky130_ef_io__com_bus_slice_20um + PLACED ( 3073000 4990035 ) N ; - FILLER_149 sky130_ef_io__com_bus_slice_20um + PLACED ( 3053000 4990035 ) N ; - - FILLER_152 sky130_ef_io__com_bus_slice_10um - + PLACED ( 3113000 4990035 ) N ; - - FILLER_153 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3123000 4990035 ) N ; + - mprj_pads.area1_io_pad\[15\] sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 3130000 4977035 ) N ; - FILLER_155 sky130_ef_io__com_bus_slice_1um + PLACED ( 3129000 4990035 ) N ; - FILLER_154 sky130_ef_io__com_bus_slice_1um + PLACED ( 3128000 4990035 ) N ; - - mprj_pads.area1_io_pad\[15\] sky130_ef_io__gpiov2_pad_wrapped - + PLACED ( 3130000 4977035 ) N ; + - FILLER_153 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3123000 4990035 ) N ; - FILLER_157 sky130_ef_io__com_bus_slice_20um + PLACED ( 3210000 4990035 ) N ; - FILLER_158 sky130_ef_io__com_bus_slice_20um @@ -4173,25 +17457,25 @@ COMPONENTS 811 ; + PLACED ( 3390035 4878000 ) E ; - FILLER_804 sky130_ef_io__com_bus_slice_20um + PLACED ( 3390035 4858000 ) E ; - - FILLER_809 sky130_ef_io__com_bus_slice_20um - + PLACED ( 3390035 4958000 ) E ; - - FILLER_810 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3390035 4978000 ) E ; - FILLER_811 sky130_ef_io__com_bus_slice_1um + PLACED ( 3390035 4983000 ) E ; + - FILLER_810 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3390035 4978000 ) E ; + - FILLER_809 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4958000 ) E ; - user1_corner sky130_ef_io__corner_pad + PLACED ( 3388000 4984000 ) N ; - - FILLER_166 sky130_ef_io__com_bus_slice_5um - + PLACED ( 3380000 4990035 ) N ; - FILLER_169 sky130_ef_io__com_bus_slice_1um + PLACED ( 3387000 4990035 ) N ; - FILLER_168 sky130_ef_io__com_bus_slice_1um + PLACED ( 3386000 4990035 ) N ; - FILLER_167 sky130_ef_io__com_bus_slice_1um + PLACED ( 3385000 4990035 ) N ; + - FILLER_166 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3380000 4990035 ) N ; END COMPONENTS -PINS 661 ; +PINS 691 ; - clock + NET clock + DIRECTION INPUT + USE SIGNAL @@ -4277,11 +17561,6 @@ PINS 661 ; + USE SIGNAL + PORT + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2356975 209765 ) N ; - - flash_io1_ieb_core + NET flash_io1_ieb_core - + DIRECTION INPUT - + USE SIGNAL - + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2335355 209765 ) N ; - flash_io1_oeb_core + NET flash_io1_oeb_core + DIRECTION INPUT + USE SIGNAL @@ -7367,11 +20646,6 @@ PINS 661 ; + USE SIGNAL + PORT + LAYER met4 ( -480 -1725 ) ( 480 1725 ) + PLACED ( 663480 183340 ) N ; - - vssa + NET vssa - + DIRECTION INOUT - + USE SIGNAL - + PORT - + LAYER met4 ( -37500 -165 ) ( 37500 165 ) + PLACED ( 700500 143430 ) N ; - vccd1_pad + NET vccd1_pad + DIRECTION INOUT + USE SIGNAL @@ -7397,16 +20671,6 @@ PINS 661 ; + USE SIGNAL + PORT + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 3523530 2115530 ) N ; - - vdda1 + NET vdda1 - + DIRECTION INOUT - + USE SIGNAL - + PORT - + LAYER met4 ( -1725 -480 ) ( 1725 480 ) + PLACED ( 3404660 2299480 ) N ; - - vssa1 + NET vssa1 - + DIRECTION INOUT - + USE SIGNAL - + PORT - + LAYER met4 ( -165 -37500 ) ( 165 37500 ) + PLACED ( 3444570 2336500 ) N ; - vssd1_pad + NET vssd1_pad + DIRECTION INOUT + USE SIGNAL @@ -7427,21 +20691,11 @@ PINS 661 ; + USE SIGNAL + PORT + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 64465 4175470 ) N ; - - vccd + NET vccd - + DIRECTION INOUT - + USE SIGNAL - + PORT - + LAYER met4 ( -2725 -635 ) ( 2725 635 ) + PLACED ( 195240 2278365 ) N ; - vdda2 + NET vdda2 + DIRECTION INOUT + USE SIGNAL + PORT + LAYER met4 ( -1725 -480 ) ( 1725 480 ) + PLACED ( 183340 2278515 ) N ; - - vddio + NET vddio - + DIRECTION INOUT - + USE SIGNAL - + PORT - + LAYER met4 ( -1725 -635 ) ( 1725 635 ) + PLACED ( 166390 2278365 ) N ; - vssa2 + NET vssa2 + DIRECTION INOUT + USE SIGNAL @@ -7452,16 +20706,6 @@ PINS 661 ; + USE SIGNAL + PORT + LAYER met5 ( -33630 -27200 ) ( 33630 27200 ) + PLACED ( 64465 2241470 ) N ; - - vssio + NET vssio - + DIRECTION INOUT - + USE SIGNAL - + PORT - + LAYER met4 ( -12090 -1120 ) ( 12090 1120 ) + PLACED ( 12125 2279345 ) N ; - - vssd + NET vssd - + DIRECTION INOUT - + USE SIGNAL - + PORT - + LAYER met4 ( -670 -2280 ) ( 670 2280 ) + PLACED ( 663570 156090 ) N ; - resetb_core_h + NET resetb_core_h + DIRECTION INOUT + USE SIGNAL @@ -7487,1574 +20731,9307 @@ PINS 661 ; + USE SIGNAL + PORT + LAYER met5 ( -5950 -1990 ) ( 5950 1990 ) + PLACED ( 3376560 478320 ) N ; - - flash_clk_ieb_core + NET flash_clk_ieb_core + - mprj_io_one[0] + NET mprj_io_one[0] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 510755 ) N ; + - mprj_io_one[1] + NET mprj_io_one[1] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 736755 ) N ; + - mprj_io_one[2] + NET mprj_io_one[2] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 961755 ) N ; + - mprj_io_one[3] + NET mprj_io_one[3] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1187755 ) N ; + - mprj_io_one[4] + NET mprj_io_one[4] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1412755 ) N ; + - mprj_io_one[5] + NET mprj_io_one[5] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1637755 ) N ; + - mprj_io_one[6] + NET mprj_io_one[6] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1863755 ) N ; + - mprj_io_one[7] + NET mprj_io_one[7] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2749755 ) N ; + - mprj_io_one[8] + NET mprj_io_one[8] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2975755 ) N ; + - mprj_io_one[9] + NET mprj_io_one[9] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3200755 ) N ; + - mprj_io_one[10] + NET mprj_io_one[10] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3426755 ) N ; + - mprj_io_one[11] + NET mprj_io_one[11] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3651755 ) N ; + - mprj_io_one[12] + NET mprj_io_one[12] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3876755 ) N ; + - mprj_io_one[13] + NET mprj_io_one[13] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4322755 ) N ; + - mprj_io_one[14] + NET mprj_io_one[14] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4768755 ) N ; + - mprj_io_one[15] + NET mprj_io_one[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 3199245 4978235 ) N ; + - mprj_io_one[16] + NET mprj_io_one[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2690245 4978235 ) N ; + - mprj_io_one[17] + NET mprj_io_one[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2433245 4978235 ) N ; + - mprj_io_one[18] + NET mprj_io_one[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1988245 4978235 ) N ; + - mprj_io_one[19] + NET mprj_io_one[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1479245 4978235 ) N ; + - mprj_io_one[20] + NET mprj_io_one[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1221245 4978235 ) N ; + - mprj_io_one[21] + NET mprj_io_one[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 964245 4978235 ) N ; + - mprj_io_one[22] + NET mprj_io_one[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 707245 4978235 ) N ; + - mprj_io_one[23] + NET mprj_io_one[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 450245 4978235 ) N ; + - mprj_io_one[24] + NET mprj_io_one[24] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 4840245 ) N ; + - mprj_io_one[25] + NET mprj_io_one[25] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3991245 ) N ; + - mprj_io_one[26] + NET mprj_io_one[26] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3775245 ) N ; + - mprj_io_one[27] + NET mprj_io_one[27] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3559245 ) N ; + - mprj_io_one[28] + NET mprj_io_one[28] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3343245 ) N ; + - mprj_io_one[29] + NET mprj_io_one[29] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3127245 ) N ; + - mprj_io_one[30] + NET mprj_io_one[30] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2911245 ) N ; + - mprj_io_one[31] + NET mprj_io_one[31] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2695245 ) N ; + - mprj_io_one[32] + NET mprj_io_one[32] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2057245 ) N ; + - mprj_io_one[33] + NET mprj_io_one[33] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1841245 ) N ; + - mprj_io_one[34] + NET mprj_io_one[34] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1625245 ) N ; + - mprj_io_one[35] + NET mprj_io_one[35] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1409245 ) N ; + - mprj_io_one[36] + NET mprj_io_one[36] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1193245 ) N ; + - mprj_io_one[37] + NET mprj_io_one[37] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 977245 ) N ; + - flash_io1_ieb_core + NET flash_io1_ieb_core + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER comment ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1788845 210175 ) N ; - - flash_csb_ieb_core + NET flash_csb_ieb_core - + DIRECTION INPUT - + USE SIGNAL + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2335355 209765 ) N ; + - porb_h + NET porb_h + PORT - + LAYER comment ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1514530 210250 ) N ; + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1541415 209765 ) N ; END PINS -SPECIALNETS 0 ; -END SPECIALNETS +NONDEFAULTRULES 97 ; + - met4_width_670 + + LAYER met4 WIDTH 670 ; + - met2_width_205 + + LAYER met2 WIDTH 205 ; + - met3_width_545 + + LAYER met3 WIDTH 545 ; + - met3_width_320 + + LAYER met3 WIDTH 320 ; + - met4_width_830 + + LAYER met4 WIDTH 830 ; + - met3_width_1830 + + LAYER met3 WIDTH 1830 ; + - met4_width_490 + + LAYER met4 WIDTH 490 ; + - met3_width_310 + + LAYER met3 WIDTH 310 ; + - met4_width_650 + + LAYER met4 WIDTH 650 ; + - met4_width_480 + + LAYER met4 WIDTH 480 ; + - met4_width_640 + + LAYER met4 WIDTH 640 ; + - met4_width_470 + + LAYER met4 WIDTH 470 ; + - met3_width_16820 + + LAYER met3 WIDTH 16820 ; + - met4_width_460 + + LAYER met4 WIDTH 460 ; + - met4_width_630 + + LAYER met4 WIDTH 630 ; + - met3_width_505 + + LAYER met3 WIDTH 505 ; + - met2_width_190 + + LAYER met2 WIDTH 190 ; + - met4_width_440 + + LAYER met4 WIDTH 440 ; + - met4_width_610 + + LAYER met4 WIDTH 610 ; + - met2_width_180 + + LAYER met2 WIDTH 180 ; + - met3_width_690 + + LAYER met3 WIDTH 690 ; + - met4_width_600 + + LAYER met4 WIDTH 600 ; + - met3_width_850 + + LAYER met3 WIDTH 850 ; + - met3_width_680 + + LAYER met3 WIDTH 680 ; + - met2_width_330 + + LAYER met2 WIDTH 330 ; + - met2_width_160 + + LAYER met2 WIDTH 160 ; + - met3_width_16600 + + LAYER met3 WIDTH 16600 ; + - met3_width_17890 + + LAYER met3 WIDTH 17890 ; + - met5_width_62450 + + LAYER met5 WIDTH 62450 ; + - met4_width_410 + + LAYER met4 WIDTH 410 ; + - met2_width_375 + + LAYER met2 WIDTH 375 ; + - met2_width_320 + + LAYER met2 WIDTH 320 ; + - met2_width_150 + + LAYER met2 WIDTH 150 ; + - met3_width_660 + + LAYER met3 WIDTH 660 ; + - met4_width_400 + + LAYER met4 WIDTH 400 ; + - met2_width_195 + + LAYER met2 WIDTH 195 ; + - met3_width_650 + + LAYER met3 WIDTH 650 ; + - met3_width_17100 + + LAYER met3 WIDTH 17100 ; + - met2_width_345 + + LAYER met2 WIDTH 345 ; + - met3_width_1210 + + LAYER met3 WIDTH 1210 ; + - met3_width_630 + + LAYER met3 WIDTH 630 ; + - met3_width_16990 + + LAYER met3 WIDTH 16990 ; + - met5_width_54400 + + LAYER met5 WIDTH 54400 ; + - met3_width_450 + + LAYER met3 WIDTH 450 ; + - met4_width_960 + + LAYER met4 WIDTH 960 ; + - met3_width_15350 + + LAYER met3 WIDTH 15350 ; + - met1_width_190 + + LAYER met1 WIDTH 190 ; + - met3_width_610 + + LAYER met3 WIDTH 610 ; + - met5_width_37180 + + LAYER met5 WIDTH 37180 ; + - met3_width_600 + + LAYER met3 WIDTH 600 ; + - met3_width_1010 + + LAYER met3 WIDTH 1010 ; + - met5_width_13000 + + LAYER met5 WIDTH 13000 ; + - met3_width_430 + + LAYER met3 WIDTH 430 ; + - met4_width_770 + + LAYER met4 WIDTH 770 ; + - met3_width_420 + + LAYER met3 WIDTH 420 ; + - met5_width_60820 + + LAYER met5 WIDTH 60820 ; + - met4_width_590 + + LAYER met4 WIDTH 590 ; + - met3_width_635 + + LAYER met3 WIDTH 635 ; + - met4_width_580 + + LAYER met4 WIDTH 580 ; + - met3_width_455 + + LAYER met3 WIDTH 455 ; + - met4_width_740 + + LAYER met4 WIDTH 740 ; + - met4_width_570 + + LAYER met4 WIDTH 570 ; + - met3_width_615 + + LAYER met3 WIDTH 615 ; + - met3_width_16750 + + LAYER met3 WIDTH 16750 ; + - met4_width_730 + + LAYER met4 WIDTH 730 ; + - met4_width_560 + + LAYER met4 WIDTH 560 ; + - met3_width_16570 + + LAYER met3 WIDTH 16570 ; + - met4_width_550 + + LAYER met4 WIDTH 550 ; + - met4_width_540 + + LAYER met4 WIDTH 540 ; + - met2_width_280 + + LAYER met2 WIDTH 280 ; + - met4_width_530 + + LAYER met4 WIDTH 530 ; + - met2_width_270 + + LAYER met2 WIDTH 270 ; + - met4_width_520 + + LAYER met4 WIDTH 520 ; + - met2_width_260 + + LAYER met2 WIDTH 260 ; + - met3_width_16700 + + LAYER met3 WIDTH 16700 ; + - met3_width_17050 + + LAYER met3 WIDTH 17050 ; + - met4_width_510 + + LAYER met4 WIDTH 510 ; + - met4_width_340 + + LAYER met4 WIDTH 340 ; + - met4_width_500 + + LAYER met4 WIDTH 500 ; + - met4_width_330 + + LAYER met4 WIDTH 330 ; + - met3_width_17200 + + LAYER met3 WIDTH 17200 ; + - met3_width_580 + + LAYER met3 WIDTH 580 ; + - met3_width_570 + + LAYER met3 WIDTH 570 ; + - met2_width_275 + + LAYER met2 WIDTH 275 ; + - met2_width_220 + + LAYER met2 WIDTH 220 ; + - met3_width_1140 + + LAYER met3 WIDTH 1140 ; + - met3_width_730 + + LAYER met3 WIDTH 730 ; + - met2_width_210 + + LAYER met2 WIDTH 210 ; + - met2_width_265 + + LAYER met2 WIDTH 265 ; + - met3_width_710 + + LAYER met3 WIDTH 710 ; + - met3_width_585 + + LAYER met3 WIDTH 585 ; + - met3_width_17920 + + LAYER met3 WIDTH 17920 ; + - met3_width_1100 + + LAYER met3 WIDTH 1100 ; + - met3_width_520 + + LAYER met3 WIDTH 520 ; + - met1_width_260 + + LAYER met1 WIDTH 260 ; + - met3_width_350 + + LAYER met3 WIDTH 350 ; + - met1_width_240 + + LAYER met1 WIDTH 240 ; +END NONDEFAULTRULES -NETS 661 ; - - flash_csb_ieb_core ; - - flash_clk_ieb_core ; - - vdda_pad - + ROUTED met5 ( 3121910 64465 ) ( 3181150 * ) ; - - vssio_pad - + ROUTED met5 ( 2852910 64465 ) ( 2912150 * ) ; - - gpio - + ROUTED met5 ( 2578000 64215 ) ( 2639000 * ) ; - - flash_io1 - + ROUTED met5 ( 2304000 64215 ) ( 2365000 * ) ; - - flash_io0 - + ROUTED met5 ( 2030000 64215 ) ( 2091000 * ) ; - - flash_clk - + ROUTED met5 ( 1756000 64215 ) ( 1817000 * ) ; - - flash_csb - + ROUTED met5 ( 1482000 64215 ) ( 1543000 * ) ; - - vssd_pad - + ROUTED met5 ( 1217130 64465 ) ( 1269930 * ) ; - - clock - + ROUTED met5 ( 939000 64215 ) ( 1000000 * ) ; - - resetb - + ROUTED met5 ( 684365 63630 ) ( 719945 * ) ; - - vssa_pad - + ROUTED met5 ( 401910 64465 ) ( 461150 * ) ; - - vccd_pad - + ROUTED met5 ( 31635 377470 ) ( 97295 * ) ; - - mprj_io[0] - + ROUTED met5 ( 3493360 537500 ) ( 3554210 * ) ; - - mprj_io[1] - + ROUTED met5 ( 3493360 763500 ) ( 3554210 * ) ; - - mprj_io[2] - + ROUTED met5 ( 3493360 988500 ) ( 3554210 * ) ; - - mprj_io[3] - + ROUTED met5 ( 3493360 1214500 ) ( 3554210 * ) ; - - mprj_io[4] - + ROUTED met5 ( 3493360 1439500 ) ( 3554210 * ) ; - - mprj_io[5] - + ROUTED met5 ( 3493360 1664500 ) ( 3554210 * ) ; - - mprj_io[6] - + ROUTED met5 ( 3493360 1890500 ) ( 3554210 * ) ; - - vssa1_pad2 - + ROUTED met5 ( 3493920 2115530 ) ( 3553140 * ) ; - - vssd1_pad - + ROUTED met5 ( 3490700 2336530 ) ( 3556360 * ) ; - - vdda1_pad2 - + ROUTED met5 ( 3493920 2556530 ) ( 3553140 * ) ; - - mprj_io[7] - + ROUTED met5 ( 3493360 2776500 ) ( 3554210 * ) ; - - mprj_io[8] - + ROUTED met5 ( 3493360 3002500 ) ( 3554210 * ) ; - - mprj_io[9] - + ROUTED met5 ( 3493360 3227500 ) ( 3554210 * ) ; - - mprj_io[10] - + ROUTED met5 ( 3493360 3453500 ) ( 3554210 * ) ; - - mprj_io[11] - + ROUTED met5 ( 3493360 3678500 ) ( 3554210 * ) ; - - mprj_io[12] - + ROUTED met5 ( 3493360 3903500 ) ( 3554210 * ) ; - - vdda1_pad - + ROUTED met5 ( 3493920 4129530 ) ( 3553140 * ) ; - - mprj_io[13] - + ROUTED met5 ( 3493360 4349500 ) ( 3554210 * ) ; - - vccd1_pad - + ROUTED met5 ( 3490700 4575530 ) ( 3556360 * ) ; - - mprj_io[14] - + ROUTED met5 ( 3493360 4795500 ) ( 3554210 * ) ; - - vddio_pad - + ROUTED met5 ( 34855 588470 ) ( 94075 * ) ; - - mprj_io[37] ; - - mprj_io[36] ; - - mprj_io[35] ; - - mprj_io[34] ; - - mprj_io[33] ; - - mprj_io[32] ; - - vssd2_pad - + ROUTED met5 ( 31635 2241470 ) ( 97295 * ) ; - - vdda2_pad - + ROUTED met5 ( 34855 2452470 ) ( 94075 * ) ; - - mprj_io[31] ; - - mprj_io[30] ; - - mprj_io[29] ; - - mprj_io[28] ; - - mprj_io[27] ; - - mprj_io[26] ; - - mprj_io[25] ; - - vssa2_pad - + ROUTED met5 ( 34855 4175470 ) ( 94075 * ) ; - - vddio_pad2 - + ROUTED met5 ( 34855 4386470 ) ( 94075 * ) ; - - vccd2_pad - + ROUTED met5 ( 31635 4597470 ) ( 97295 * ) ; - - mprj_io[24] ; - - mprj_io[15] ; - - vssa1_pad - + ROUTED met5 ( 2885850 5123530 ) ( 2945090 * ) ; - - mprj_io[16] ; - - mprj_io[17] ; - - mprj_io[18] ; - - vssio_pad2 - + ROUTED met5 ( 1674850 5123530 ) ( 1734090 * ) ; - - mprj_io[19] ; - - mprj_io[20] ; - - mprj_io[21] ; - - mprj_io[22] ; - - mprj_io[23] ; - - vssa - + ROUTED met4 ( 663150 143430 ) ( 737850 * ) ; - - vssd - + ROUTED met4 ( 663050 156090 ) ( 664090 * ) ; - - vdda - + ROUTED met4 ( 663150 183340 ) ( 663810 * ) ; - - vccd - + ROUTED met4 ( 192665 2278365 ) ( 197815 * ) ; - - vdda2 - + ROUTED met4 ( 181765 2278515 ) ( 184915 * ) ; - - vddio - + ROUTED met4 ( 164815 2278365 ) ( 167965 * ) ; - - vssa2 - + ROUTED met4 ( 143415 2241500 ) ( 143445 * ) ; - - vssio - + ROUTED met4 ( 185 2279345 ) ( 24065 * ) ; - - vssa1 - + ROUTED met4 ( 3444555 2336500 ) ( 3444585 * ) ; - - vdda1 - + ROUTED met4 ( 3403085 2299480 ) ( 3406235 * ) ; - - vssd1 - + ROUTED met5 ( 3354900 1387965 ) ( 3366300 * ) - NEW met5 ( 3367300 2311445 ) ( 3366300 * ) - NEW met5 ( 3354900 2311445 ) ( 3353860 * ) - NEW met5 ( 3354900 2336485 ) ( 3366300 * ) - NEW met5 ( 3367270 2361525 ) ( 3366300 * ) - NEW met5 ( 3354900 2361525 ) ( 3353830 * ) - NEW met5 ( 3354900 3468565 ) ( 3366300 * ) - NEW met5 ( 3367370 4575325 ) ( 3366300 * ) - NEW met5 ( 3354900 4575325 ) ( 3354070 * ) - NEW met5 ( 3354900 4774955 ) ( 3366300 * ) - NEW met4 ( 3354280 4586705 ) ( 3367020 * ) - NEW met4 ( 3354280 4575325 ) ( 3354720 * ) - NEW met4 ( 3354280 4564045 ) ( 3367020 * ) - NEW met4 ( 3366720 4575325 ) ( 3367020 * ) - NEW met4 ( 3360720 4575325 ) via4_11700_22030 - NEW met3 ( 3354010 4586695 ) ( 3383470 * ) - NEW met3 ( 3354010 4575325 ) ( 3354720 * ) - NEW met3 ( 3354010 4564025 ) ( 3383470 * ) - NEW met3 ( 3366720 4575325 ) ( 3383470 * ) - NEW met3 ( 3360720 4575325 ) via3_11700_22030 - NEW met4 ( 3354270 2373120 ) ( 3366970 * ) - NEW met4 ( 3354270 2361525 ) ( 3354480 * ) - NEW met4 ( 3354270 2349865 ) ( 3366970 * ) - NEW met4 ( 3366620 2361525 ) ( 3366970 * ) - NEW met4 ( 3360550 2361525 ) via4_11840_22590 - NEW met3 ( 3354120 2373160 ) ( 3384240 * ) - NEW met3 ( 3354120 2361525 ) ( 3354480 * ) - NEW met3 ( 3354120 2349865 ) ( 3384240 * ) - NEW met3 ( 3366620 2361525 ) ( 3384240 * ) - NEW met3 ( 3360550 2361525 ) via3_11840_22590 - NEW met4 ( 3354280 2322990 ) ( 3366980 * ) - NEW met4 ( 3354280 2311445 ) ( 3354510 * ) - NEW met4 ( 3354280 2299735 ) ( 3366980 * ) - NEW met4 ( 3366650 2311445 ) ( 3366980 * ) - NEW met4 ( 3360580 2311445 ) via4_11840_22590 - NEW met3 ( 3354120 2322992.5 ) ( 3384240 * ) - NEW met3 ( 3354120 2311445 ) ( 3354510 * ) - NEW met3 ( 3354120 2299725 ) ( 3384240 * ) - NEW met3 ( 3366650 2311445 ) ( 3384240 * ) - NEW met3 ( 3360580 2311445 ) via3_11840_22590 ; - - vssd2 - + ROUTED met5 ( 205790 1550710 ) ( 217190 * ) - NEW met5 ( 218240 2216450 ) ( 217190 * ) - NEW met5 ( 205790 2216450 ) ( 204810 * ) - NEW met5 ( 205790 2241595 ) ( 217190 * ) - NEW met5 ( 218340 2266740 ) ( 217190 * ) - NEW met5 ( 205790 2266740 ) ( 204910 * ) - NEW met5 ( 205790 3432335 ) ( 217190 * ) - NEW met5 ( 218320 4597540 ) ( 217190 * ) - NEW met5 ( 205790 4597540 ) ( 204680 * ) - NEW met5 ( 205790 4791850 ) ( 217190 * ) - NEW met4 ( 205060 4608950 ) ( 217770 * ) - NEW met4 ( 205060 4597540 ) ( 205330 * ) - NEW met4 ( 205060 4586165 ) ( 217770 * ) - NEW met4 ( 217670 4597540 ) ( 217770 * ) - NEW met4 ( 211500 4597540 ) via4_12040_22280 - NEW met3 ( 204420 4608970 ) ( 233940 * ) - NEW met3 ( 204420 4597540 ) ( 205330 * ) - NEW met3 ( 204420 4586175 ) ( 233940 * ) - NEW met3 ( 217670 4597540 ) ( 233940 * ) - NEW met3 ( 211500 4597540 ) via3_12040_22280 - NEW met4 ( 205190 2278530 ) ( 217940 * ) - NEW met4 ( 205190 2266740 ) ( 205560 * ) - NEW met4 ( 205190 2254980 ) ( 217940 * ) - NEW met4 ( 217690 2266740 ) ( 217940 * ) - NEW met4 ( 211625 2266740 ) via4_11830_23060 - NEW met3 ( 206250 2278485 ) ( 233990 * ) - NEW met3 ( 211625 2266740 ) via3_11830_23060 - NEW met3 ( 206250 2254982.5 ) ( 233990 * ) - NEW met3 ( 217690 2266740 ) ( 233990 * ) - NEW met4 ( 205120 2228250 ) ( 217870 * ) - NEW met4 ( 205120 2216450 ) ( 205460 * ) - NEW met4 ( 205120 2204700 ) ( 217870 * ) - NEW met4 ( 217590 2216450 ) ( 217870 * ) - NEW met4 ( 211525 2216450 ) via4_11830_23060 - NEW met3 ( 206250 2228240 ) ( 233990 * ) - NEW met3 ( 211525 2216450 ) via3_11830_23060 - NEW met3 ( 206250 2204710 ) ( 233990 * ) - NEW met3 ( 217590 2216450 ) ( 233990 * ) ; - - vccd1 - + ROUTED met5 ( 3370900 1400535 ) ( 3382300 * ) - NEW met5 ( 3383360 2336345 ) ( 3382300 * ) - NEW met5 ( 3370900 2336345 ) ( 3369920 * ) - NEW met5 ( 3370900 3443175 ) ( 3382300 * ) - NEW met5 ( 3383320 4550280 ) ( 3382300 * ) - NEW met5 ( 3370900 4550280 ) ( 3370050 * ) - NEW met5 ( 3370900 4575360 ) ( 3382300 * ) - NEW met5 ( 3383280 4600490 ) ( 3382300 * ) - NEW met5 ( 3370900 4600490 ) ( 3369880 * ) - NEW met5 ( 3370900 4787720 ) ( 3382300 * ) - NEW met4 ( 3370200 4612150 ) ( 3382930 * ) - NEW met4 ( 3370200 4600490 ) ( 3370530 * ) - NEW met4 ( 3370200 4588845 ) ( 3382930 * ) - NEW met4 ( 3382630 4600490 ) ( 3382930 * ) - NEW met4 ( 3376580 4600490 ) via4_11800_22760 - NEW met3 ( 3354010 4612185 ) ( 3383470 * ) - NEW met3 ( 3354010 4600490 ) ( 3370530 * ) - NEW met3 ( 3354010 4588805 ) ( 3383470 * ) - NEW met3 ( 3382630 4600490 ) ( 3383470 * ) - NEW met3 ( 3376580 4600490 ) via3_11800_22760 - NEW met4 ( 3370230 4561905 ) ( 3382960 * ) - NEW met4 ( 3370230 4550280 ) ( 3370700 * ) - NEW met4 ( 3370230 4538650 ) ( 3382960 * ) - NEW met4 ( 3382670 4550280 ) ( 3382960 * ) - NEW met4 ( 3376685 4550280 ) via4_11670_22660 - NEW met3 ( 3354010 4561927.5 ) ( 3383470 * ) - NEW met3 ( 3354010 4550280 ) ( 3370700 * ) - NEW met3 ( 3354010 4538625 ) ( 3383470 * ) - NEW met3 ( 3382670 4550280 ) ( 3383470 * ) - NEW met3 ( 3376685 4550280 ) via3_11670_22660 - NEW met4 ( 3370270 2347675 ) ( 3382940 * ) - NEW met4 ( 3370270 2336345 ) ( 3370570 * ) - NEW met4 ( 3370270 2325030 ) ( 3382940 * ) - NEW met4 ( 3382710 2336345 ) ( 3382940 * ) - NEW met4 ( 3376640 2336345 ) via4_11840_22110 - NEW met3 ( 3354120 2347700 ) ( 3384240 * ) - NEW met3 ( 3354120 2336345 ) ( 3370570 * ) - NEW met3 ( 3354120 2325017.5 ) ( 3384240 * ) - NEW met3 ( 3382710 2336345 ) ( 3384240 * ) - NEW met3 ( 3376640 2336345 ) via3_11840_22110 ; - - vccd2 - + ROUTED met5 ( 221790 1563510 ) ( 233190 * ) - NEW met5 ( 234250 2241580 ) ( 233190 * ) - NEW met5 ( 221790 2241580 ) ( 220650 * ) - NEW met5 ( 221790 3406725 ) ( 233190 * ) - NEW met5 ( 234210 4572330 ) ( 233190 * ) - NEW met5 ( 221790 4572330 ) ( 220570 * ) - NEW met5 ( 221790 4597595 ) ( 233190 * ) - NEW met5 ( 234310 4622860 ) ( 233190 * ) - NEW met5 ( 221790 4622860 ) ( 220670 * ) - NEW met5 ( 221790 4804700 ) ( 233190 * ) - NEW met4 ( 221140 4634585 ) ( 233850 * ) - NEW met4 ( 221140 4622860 ) ( 221320 * ) - NEW met4 ( 221140 4611055 ) ( 233850 * ) - NEW met4 ( 233660 4622860 ) ( 233850 * ) - NEW met4 ( 227490 4622860 ) via4_12040_23040 - NEW met3 ( 204420 4634540 ) ( 233940 * ) - NEW met3 ( 204420 4622860 ) ( 221320 * ) - NEW met3 ( 204420 4611047.5 ) ( 233940 * ) - NEW met3 ( 233660 4622860 ) ( 233940 * ) - NEW met3 ( 227490 4622860 ) via3_12040_23040 - NEW met4 ( 221120 4584170 ) ( 233830 * ) - NEW met4 ( 221120 4572330 ) ( 221220 * ) - NEW met4 ( 221120 4560640 ) ( 233830 * ) - NEW met4 ( 233560 4572330 ) ( 233830 * ) - NEW met4 ( 227390 4572330 ) via4_12040_23040 - NEW met3 ( 204420 4584175 ) ( 233940 * ) - NEW met3 ( 204420 4572330 ) ( 221220 * ) - NEW met3 ( 204420 4560655 ) ( 233940 * ) - NEW met3 ( 233560 4572330 ) ( 233940 * ) - NEW met3 ( 227390 4572330 ) via3_12040_23040 - NEW met4 ( 221160 2252910 ) ( 233910 * ) - NEW met4 ( 221160 2241580 ) ( 221300 * ) - NEW met4 ( 221160 2230300 ) ( 233910 * ) - NEW met4 ( 233600 2241580 ) ( 233910 * ) - NEW met4 ( 227450 2241580 ) via4_12000_22120 - NEW met3 ( 206250 2252947.5 ) ( 233990 * ) - NEW met3 ( 206250 2241580 ) ( 221300 * ) - NEW met3 ( 206250 2230260 ) ( 233990 * ) - NEW met3 ( 233600 2241580 ) ( 233990 * ) - NEW met3 ( 227450 2241580 ) via3_12000_22120 ; - - mprj_io_in[0] - + ROUTED met2 ( 3377105 504775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[0] - + ROUTED met2 ( 3377105 513975 ) ( 3379365 * ) ; - - mprj_io_dm[1] - + ROUTED met2 ( 3377105 523175 ) ( 3379365 * ) ; - - mprj_io_analog_en[0] - + ROUTED met2 ( 3377105 529155 ) ( 3379365 * ) ; - - mprj_io_dm[0] - + ROUTED met2 ( 3377105 532375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[0] - + ROUTED met2 ( 3377105 535595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[0] - + ROUTED met2 ( 3377105 538355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[0] - + ROUTED met2 ( 3377105 550775 ) ( 3379365 * ) ; - - mprj_io_dm[2] - + ROUTED met2 ( 3377105 553995 ) ( 3379365 * ) ; - - mprj_io_holdover[0] - + ROUTED met2 ( 3377105 557215 ) ( 3379365 * ) ; - - mprj_io_out[0] - + ROUTED met2 ( 3377105 559975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[0] - + ROUTED met2 ( 3377105 569175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[0] - + ROUTED met2 ( 3377105 572395 ) ( 3379365 * ) ; - - mprj_io_oeb[0] - + ROUTED met2 ( 3377105 575615 ) ( 3379365 * ) ; - - mprj_io_in[1] - + ROUTED met2 ( 3377105 730775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[1] - + ROUTED met2 ( 3377105 739975 ) ( 3379365 * ) ; - - mprj_io_dm[4] - + ROUTED met2 ( 3377105 749175 ) ( 3379365 * ) ; - - mprj_io_analog_en[1] - + ROUTED met2 ( 3377105 755155 ) ( 3379365 * ) ; - - mprj_io_dm[3] - + ROUTED met2 ( 3377105 758375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[1] - + ROUTED met2 ( 3377105 761595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[1] - + ROUTED met2 ( 3377105 764355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[1] - + ROUTED met2 ( 3377105 776775 ) ( 3379365 * ) ; - - mprj_io_dm[5] - + ROUTED met2 ( 3377105 779995 ) ( 3379365 * ) ; - - mprj_io_holdover[1] - + ROUTED met2 ( 3377105 783215 ) ( 3379365 * ) ; - - mprj_io_out[1] - + ROUTED met2 ( 3377105 785975 ) ( 3379365 * ) ; - - gpio_outenb_core - + ROUTED met2 ( 2646545 209765 ) ( 2646685 * ) ; - - gpio_out_core - + ROUTED met2 ( 2630905 209765 ) ( 2631045 * ) ; - - gpio_inenb_core - + ROUTED met2 ( 2609285 209765 ) ( 2609425 * ) ; - - gpio_mode0_core - + ROUTED met2 ( 2603305 209765 ) ( 2603445 * ) ; - - gpio_in_core - + ROUTED met2 ( 2575705 209765 ) ( 2575845 * ) ; - - flash_io1_do_core - + ROUTED met2 ( 2356905 209765 ) ( 2357045 * ) ; - - flash_io1_di_core - + ROUTED met2 ( 2301705 209765 ) ( 2301845 * ) ; - - flash_io0_do_core - + ROUTED met2 ( 2082905 209765 ) ( 2083045 * ) ; - - flash_io0_di_core - + ROUTED met2 ( 2027705 209765 ) ( 2027845 * ) ; - - flash_clk_oeb_core - + ROUTED met2 ( 1824545 209765 ) ( 1824685 * ) ; - - flash_clk_core - + ROUTED met2 ( 1808905 209765 ) ( 1809045 * ) ; - - flash_csb_oeb_core - + ROUTED met2 ( 1550545 209765 ) ( 1550685 * ) ; - - flash_csb_core - + ROUTED met2 ( 1534905 209765 ) ( 1535045 * ) ; - - por - + ROUTED met2 ( 970285 209765 ) ( 970425 * ) ; - - clock_core - + ROUTED met2 ( 936705 209765 ) ( 936845 * ) ; - - resetb_core_h - + ROUTED met2 ( 708405 199835 ) ( 708995 * ) ; - - mprj_io_vtrip_sel[1] - + ROUTED met2 ( 3377105 795175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[1] - + ROUTED met2 ( 3377105 798395 ) ( 3379365 * ) ; - - mprj_io_oeb[1] - + ROUTED met2 ( 3377105 801615 ) ( 3379365 * ) ; - - mprj_io_in[2] - + ROUTED met2 ( 3377105 955775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[2] - + ROUTED met2 ( 3377105 964975 ) ( 3379365 * ) ; - - mprj_io_dm[7] - + ROUTED met2 ( 3377105 974175 ) ( 3379365 * ) ; - - mprj_io_analog_en[2] - + ROUTED met2 ( 3377105 980155 ) ( 3379365 * ) ; - - mprj_io_dm[6] - + ROUTED met2 ( 3377105 983375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[2] - + ROUTED met2 ( 3377105 986595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[2] - + ROUTED met2 ( 3377105 989355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[2] - + ROUTED met2 ( 3377105 1001775 ) ( 3379365 * ) ; - - mprj_io_dm[8] - + ROUTED met2 ( 3377105 1004995 ) ( 3379365 * ) ; - - mprj_io_holdover[2] - + ROUTED met2 ( 3377105 1008215 ) ( 3379365 * ) ; - - mprj_io_out[2] - + ROUTED met2 ( 3377105 1010975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[2] - + ROUTED met2 ( 3377105 1020175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[2] - + ROUTED met2 ( 3377105 1023395 ) ( 3379365 * ) ; - - mprj_io_oeb[2] - + ROUTED met2 ( 3377105 1026615 ) ( 3379365 * ) ; - - mprj_io_in[3] - + ROUTED met2 ( 3377105 1181775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[3] - + ROUTED met2 ( 3377105 1190975 ) ( 3379365 * ) ; - - mprj_io_dm[10] - + ROUTED met2 ( 3377105 1200175 ) ( 3379365 * ) ; - - mprj_io_analog_en[3] - + ROUTED met2 ( 3377105 1206155 ) ( 3379365 * ) ; - - mprj_io_dm[9] - + ROUTED met2 ( 3377105 1209375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[3] - + ROUTED met2 ( 3377105 1212595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[3] - + ROUTED met2 ( 3377105 1215355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[3] - + ROUTED met2 ( 3377105 1227775 ) ( 3379365 * ) ; - - mprj_io_dm[11] - + ROUTED met2 ( 3377105 1230995 ) ( 3379365 * ) ; - - mprj_io_holdover[3] - + ROUTED met2 ( 3377105 1234215 ) ( 3379365 * ) ; - - mprj_io_out[3] - + ROUTED met2 ( 3377105 1236975 ) ( 3379365 * ) ; - - mprj_io_oeb[37] - + ROUTED met2 ( 208635 912385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[37] - + ROUTED met2 ( 208635 915605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[37] - + ROUTED met2 ( 208635 918825 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[3] - + ROUTED met2 ( 3377105 1246175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[3] - + ROUTED met2 ( 3377105 1249395 ) ( 3379365 * ) ; - - mprj_io_oeb[3] - + ROUTED met2 ( 3377105 1252615 ) ( 3379365 * ) ; - - mprj_io_in[4] - + ROUTED met2 ( 3377105 1406775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[4] - + ROUTED met2 ( 3377105 1415975 ) ( 3379365 * ) ; - - mprj_io_dm[13] - + ROUTED met2 ( 3377105 1425175 ) ( 3379365 * ) ; - - mprj_io_analog_en[4] - + ROUTED met2 ( 3377105 1431155 ) ( 3379365 * ) ; - - mprj_io_dm[12] - + ROUTED met2 ( 3377105 1434375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[4] - + ROUTED met2 ( 3377105 1437595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[4] - + ROUTED met2 ( 3377105 1440355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[4] - + ROUTED met2 ( 3377105 1452775 ) ( 3379365 * ) ; - - mprj_io_dm[14] - + ROUTED met2 ( 3377105 1455995 ) ( 3379365 * ) ; - - mprj_io_holdover[4] - + ROUTED met2 ( 3377105 1459215 ) ( 3379365 * ) ; - - mprj_io_out[4] - + ROUTED met2 ( 3377105 1461975 ) ( 3379365 * ) ; - - mprj_io_out[37] - + ROUTED met2 ( 208635 928025 ) ( 210895 * ) ; - - mprj_io_holdover[37] - + ROUTED met2 ( 208635 930785 ) ( 210895 * ) ; - - mprj_io_dm[113] - + ROUTED met2 ( 208635 934005 ) ( 210895 * ) ; - - mprj_io_analog_sel[37] - + ROUTED met2 ( 208635 937225 ) ( 210895 * ) ; - - mprj_io_inp_dis[37] - + ROUTED met2 ( 208635 949645 ) ( 210895 * ) ; - - mprj_io_analog_pol[37] - + ROUTED met2 ( 208635 952405 ) ( 210895 * ) ; - - mprj_io_dm[111] - + ROUTED met2 ( 208635 955625 ) ( 210895 * ) ; - - mprj_io_analog_en[37] - + ROUTED met2 ( 208635 958845 ) ( 210895 * ) ; - - mprj_io_dm[112] - + ROUTED met2 ( 208635 964825 ) ( 210895 * ) ; - - mprj_io_slow_sel[37] - + ROUTED met2 ( 208635 974025 ) ( 210895 * ) ; - - mprj_io_in[37] - + ROUTED met2 ( 208635 983225 ) ( 210895 * ) ; - - mprj_io_oeb[36] - + ROUTED met2 ( 208635 1128385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[36] - + ROUTED met2 ( 208635 1131605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[36] - + ROUTED met2 ( 208635 1134825 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[4] - + ROUTED met2 ( 3377105 1471175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[4] - + ROUTED met2 ( 3377105 1474395 ) ( 3379365 * ) ; - - mprj_io_oeb[4] - + ROUTED met2 ( 3377105 1477615 ) ( 3379365 * ) ; - - mprj_io_in[5] - + ROUTED met2 ( 3377105 1631775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[5] - + ROUTED met2 ( 3377105 1640975 ) ( 3379365 * ) ; - - mprj_io_dm[16] - + ROUTED met2 ( 3377105 1650175 ) ( 3379365 * ) ; - - mprj_io_analog_en[5] - + ROUTED met2 ( 3377105 1656155 ) ( 3379365 * ) ; - - mprj_io_dm[15] - + ROUTED met2 ( 3377105 1659375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[5] - + ROUTED met2 ( 3377105 1662595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[5] - + ROUTED met2 ( 3377105 1665355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[5] - + ROUTED met2 ( 3377105 1677775 ) ( 3379365 * ) ; - - mprj_io_dm[17] - + ROUTED met2 ( 3377105 1680995 ) ( 3379365 * ) ; - - mprj_io_holdover[5] - + ROUTED met2 ( 3377105 1684215 ) ( 3379365 * ) ; - - mprj_io_out[5] - + ROUTED met2 ( 3377105 1686975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[5] - + ROUTED met2 ( 3377105 1696175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[5] - + ROUTED met2 ( 3377105 1699395 ) ( 3379365 * ) ; - - mprj_io_oeb[5] - + ROUTED met2 ( 3377105 1702615 ) ( 3379365 * ) ; - - mprj_io_in[6] - + ROUTED met2 ( 3377105 1857775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[6] - + ROUTED met2 ( 3377105 1866975 ) ( 3379365 * ) ; - - mprj_io_dm[19] - + ROUTED met2 ( 3377105 1876175 ) ( 3379365 * ) ; - - mprj_io_analog_en[6] - + ROUTED met2 ( 3377105 1882155 ) ( 3379365 * ) ; - - mprj_io_dm[18] - + ROUTED met2 ( 3377105 1885375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[6] - + ROUTED met2 ( 3377105 1888595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[6] - + ROUTED met2 ( 3377105 1891355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[6] - + ROUTED met2 ( 3377105 1903775 ) ( 3379365 * ) ; - - mprj_io_dm[20] - + ROUTED met2 ( 3377105 1906995 ) ( 3379365 * ) ; - - mprj_io_holdover[6] - + ROUTED met2 ( 3377105 1910215 ) ( 3379365 * ) ; - - mprj_io_out[6] - + ROUTED met2 ( 3377105 1912975 ) ( 3379365 * ) ; - - mprj_io_out[36] - + ROUTED met2 ( 208635 1144025 ) ( 210895 * ) ; - - mprj_io_holdover[36] - + ROUTED met2 ( 208635 1146785 ) ( 210895 * ) ; - - mprj_io_dm[110] - + ROUTED met2 ( 208635 1150005 ) ( 210895 * ) ; - - mprj_io_analog_sel[36] - + ROUTED met2 ( 208635 1153225 ) ( 210895 * ) ; - - mprj_io_inp_dis[36] - + ROUTED met2 ( 208635 1165645 ) ( 210895 * ) ; - - mprj_io_analog_pol[36] - + ROUTED met2 ( 208635 1168405 ) ( 210895 * ) ; - - mprj_io_dm[108] - + ROUTED met2 ( 208635 1171625 ) ( 210895 * ) ; - - mprj_io_analog_en[36] - + ROUTED met2 ( 208635 1174845 ) ( 210895 * ) ; - - mprj_io_dm[109] - + ROUTED met2 ( 208635 1180825 ) ( 210895 * ) ; - - mprj_io_slow_sel[36] - + ROUTED met2 ( 208635 1190025 ) ( 210895 * ) ; - - mprj_io_in[36] - + ROUTED met2 ( 208635 1199225 ) ( 210895 * ) ; - - mprj_io_oeb[35] - + ROUTED met2 ( 208635 1344385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[35] - + ROUTED met2 ( 208635 1347605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[35] - + ROUTED met2 ( 208635 1350825 ) ( 210895 * ) ; - - mprj_io_out[35] - + ROUTED met2 ( 208635 1360025 ) ( 210895 * ) ; - - mprj_io_holdover[35] - + ROUTED met2 ( 208635 1362785 ) ( 210895 * ) ; - - mprj_io_dm[107] - + ROUTED met2 ( 208635 1366005 ) ( 210895 * ) ; - - mprj_io_analog_sel[35] - + ROUTED met2 ( 208635 1369225 ) ( 210895 * ) ; - - mprj_io_inp_dis[35] - + ROUTED met2 ( 208635 1381645 ) ( 210895 * ) ; - - mprj_io_analog_pol[35] - + ROUTED met2 ( 208635 1384405 ) ( 210895 * ) ; - - mprj_io_dm[105] - + ROUTED met2 ( 208635 1387625 ) ( 210895 * ) ; - - mprj_io_analog_en[35] - + ROUTED met2 ( 208635 1390845 ) ( 210895 * ) ; - - mprj_io_dm[106] - + ROUTED met2 ( 208635 1396825 ) ( 210895 * ) ; - - mprj_analog_io[28] - + ROUTED met2 ( 208635 1402805 ) ( 210895 * ) ; - - mprj_io_slow_sel[35] - + ROUTED met2 ( 208635 1406025 ) ( 210895 * ) ; - - mprj_io_in[35] - + ROUTED met2 ( 208635 1415225 ) ( 210895 * ) ; - - mprj_io_oeb[34] - + ROUTED met2 ( 208635 1560385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[34] - + ROUTED met2 ( 208635 1563605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[34] - + ROUTED met2 ( 208635 1566825 ) ( 210895 * ) ; - - mprj_io_out[34] - + ROUTED met2 ( 208635 1576025 ) ( 210895 * ) ; - - mprj_io_holdover[34] - + ROUTED met2 ( 208635 1578785 ) ( 210895 * ) ; - - mprj_io_dm[104] - + ROUTED met2 ( 208635 1582005 ) ( 210895 * ) ; - - mprj_io_analog_sel[34] - + ROUTED met2 ( 208635 1585225 ) ( 210895 * ) ; - - mprj_io_inp_dis[34] - + ROUTED met2 ( 208635 1597645 ) ( 210895 * ) ; - - mprj_io_analog_pol[34] - + ROUTED met2 ( 208635 1600405 ) ( 210895 * ) ; - - mprj_io_dm[102] - + ROUTED met2 ( 208635 1603625 ) ( 210895 * ) ; - - mprj_io_analog_en[34] - + ROUTED met2 ( 208635 1606845 ) ( 210895 * ) ; - - mprj_io_dm[103] - + ROUTED met2 ( 208635 1612825 ) ( 210895 * ) ; - - mprj_analog_io[27] - + ROUTED met2 ( 208635 1618805 ) ( 210895 * ) ; - - mprj_io_slow_sel[34] - + ROUTED met2 ( 208635 1622025 ) ( 210895 * ) ; - - mprj_io_in[34] - + ROUTED met2 ( 208635 1631225 ) ( 210895 * ) ; - - mprj_io_oeb[33] - + ROUTED met2 ( 208635 1776385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[33] - + ROUTED met2 ( 208635 1779605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[33] - + ROUTED met2 ( 208635 1782825 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[6] - + ROUTED met2 ( 3377105 1922175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[6] - + ROUTED met2 ( 3377105 1925395 ) ( 3379365 * ) ; - - mprj_io_oeb[6] - + ROUTED met2 ( 3377105 1928615 ) ( 3379365 * ) ; - - mprj_io_in[7] - + ROUTED met2 ( 3377105 2743775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[7] - + ROUTED met2 ( 3377105 2752975 ) ( 3379365 * ) ; - - mprj_analog_io[0] - + ROUTED met2 ( 3377105 2756195 ) ( 3379365 * ) ; - - mprj_io_dm[22] - + ROUTED met2 ( 3377105 2762175 ) ( 3379365 * ) ; - - mprj_io_analog_en[7] - + ROUTED met2 ( 3377105 2768155 ) ( 3379365 * ) ; - - mprj_io_dm[21] - + ROUTED met2 ( 3377105 2771375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[7] - + ROUTED met2 ( 3377105 2774595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[7] - + ROUTED met2 ( 3377105 2777355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[7] - + ROUTED met2 ( 3377105 2789775 ) ( 3379365 * ) ; - - mprj_io_dm[23] - + ROUTED met2 ( 3377105 2792995 ) ( 3379365 * ) ; - - mprj_io_holdover[7] - + ROUTED met2 ( 3377105 2796215 ) ( 3379365 * ) ; - - mprj_io_out[7] - + ROUTED met2 ( 3377105 2798975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[7] - + ROUTED met2 ( 3377105 2808175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[7] - + ROUTED met2 ( 3377105 2811395 ) ( 3379365 * ) ; - - mprj_io_oeb[7] - + ROUTED met2 ( 3377105 2814615 ) ( 3379365 * ) ; - - mprj_io_in[8] - + ROUTED met2 ( 3377105 2969775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[8] - + ROUTED met2 ( 3377105 2978975 ) ( 3379365 * ) ; - - mprj_analog_io[1] - + ROUTED met2 ( 3377105 2982195 ) ( 3379365 * ) ; - - mprj_io_dm[25] - + ROUTED met2 ( 3377105 2988175 ) ( 3379365 * ) ; - - mprj_io_analog_en[8] - + ROUTED met2 ( 3377105 2994155 ) ( 3379365 * ) ; - - mprj_io_dm[24] - + ROUTED met2 ( 3377105 2997375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[8] - + ROUTED met2 ( 3377105 3000595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[8] - + ROUTED met2 ( 3377105 3003355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[8] - + ROUTED met2 ( 3377105 3015775 ) ( 3379365 * ) ; - - mprj_io_dm[26] - + ROUTED met2 ( 3377105 3018995 ) ( 3379365 * ) ; - - mprj_io_holdover[8] - + ROUTED met2 ( 3377105 3022215 ) ( 3379365 * ) ; - - mprj_io_out[8] - + ROUTED met2 ( 3377105 3024975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[8] - + ROUTED met2 ( 3377105 3034175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[8] - + ROUTED met2 ( 3377105 3037395 ) ( 3379365 * ) ; - - mprj_io_oeb[8] - + ROUTED met2 ( 3377105 3040615 ) ( 3379365 * ) ; - - mprj_io_in[9] - + ROUTED met2 ( 3377105 3194775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[9] - + ROUTED met2 ( 3377105 3203975 ) ( 3379365 * ) ; - - mprj_analog_io[2] - + ROUTED met2 ( 3377105 3207195 ) ( 3379365 * ) ; - - mprj_io_dm[28] - + ROUTED met2 ( 3377105 3213175 ) ( 3379365 * ) ; - - mprj_io_analog_en[9] - + ROUTED met2 ( 3377105 3219155 ) ( 3379365 * ) ; - - mprj_io_dm[27] - + ROUTED met2 ( 3377105 3222375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[9] - + ROUTED met2 ( 3377105 3225595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[9] - + ROUTED met2 ( 3377105 3228355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[9] - + ROUTED met2 ( 3377105 3240775 ) ( 3379365 * ) ; - - mprj_io_dm[29] - + ROUTED met2 ( 3377105 3243995 ) ( 3379365 * ) ; - - mprj_io_holdover[9] - + ROUTED met2 ( 3377105 3247215 ) ( 3379365 * ) ; - - mprj_io_out[9] - + ROUTED met2 ( 3377105 3249975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[9] - + ROUTED met2 ( 3377105 3259175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[9] - + ROUTED met2 ( 3377105 3262395 ) ( 3379365 * ) ; - - mprj_io_oeb[9] - + ROUTED met2 ( 3377105 3265615 ) ( 3379365 * ) ; - - mprj_io_in[10] - + ROUTED met2 ( 3377105 3420775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[10] - + ROUTED met2 ( 3377105 3429975 ) ( 3379365 * ) ; - - mprj_analog_io[3] - + ROUTED met2 ( 3377105 3433195 ) ( 3379365 * ) ; - - mprj_io_dm[31] - + ROUTED met2 ( 3377105 3439175 ) ( 3379365 * ) ; - - mprj_io_analog_en[10] - + ROUTED met2 ( 3377105 3445155 ) ( 3379365 * ) ; - - mprj_io_dm[30] - + ROUTED met2 ( 3377105 3448375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[10] - + ROUTED met2 ( 3377105 3451595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[10] - + ROUTED met2 ( 3377105 3454355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[10] - + ROUTED met2 ( 3377105 3466775 ) ( 3379365 * ) ; - - mprj_io_dm[32] - + ROUTED met2 ( 3377105 3469995 ) ( 3379365 * ) ; - - mprj_io_holdover[10] - + ROUTED met2 ( 3377105 3473215 ) ( 3379365 * ) ; - - mprj_io_out[10] - + ROUTED met2 ( 3377105 3475975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[10] - + ROUTED met2 ( 3377105 3485175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[10] - + ROUTED met2 ( 3377105 3488395 ) ( 3379365 * ) ; - - mprj_io_oeb[10] - + ROUTED met2 ( 3377105 3491615 ) ( 3379365 * ) ; - - mprj_io_in[11] - + ROUTED met2 ( 3377105 3645775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[11] - + ROUTED met2 ( 3377105 3654975 ) ( 3379365 * ) ; - - mprj_analog_io[4] - + ROUTED met2 ( 3377105 3658195 ) ( 3379365 * ) ; - - mprj_io_dm[34] - + ROUTED met2 ( 3377105 3664175 ) ( 3379365 * ) ; - - mprj_io_analog_en[11] - + ROUTED met2 ( 3377105 3670155 ) ( 3379365 * ) ; - - mprj_io_dm[33] - + ROUTED met2 ( 3377105 3673375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[11] - + ROUTED met2 ( 3377105 3676595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[11] - + ROUTED met2 ( 3377105 3679355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[11] - + ROUTED met2 ( 3377105 3691775 ) ( 3379365 * ) ; - - mprj_io_dm[35] - + ROUTED met2 ( 3377105 3694995 ) ( 3379365 * ) ; - - mprj_io_holdover[11] - + ROUTED met2 ( 3377105 3698215 ) ( 3379365 * ) ; - - mprj_io_out[11] - + ROUTED met2 ( 3377105 3700975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[11] - + ROUTED met2 ( 3377105 3710175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[11] - + ROUTED met2 ( 3377105 3713395 ) ( 3379365 * ) ; - - mprj_io_oeb[11] - + ROUTED met2 ( 3377105 3716615 ) ( 3379365 * ) ; - - mprj_io_in[12] - + ROUTED met2 ( 3377105 3870775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[12] - + ROUTED met2 ( 3377105 3879975 ) ( 3379365 * ) ; - - mprj_analog_io[5] - + ROUTED met2 ( 3377105 3883195 ) ( 3379365 * ) ; - - mprj_io_dm[37] - + ROUTED met2 ( 3377105 3889175 ) ( 3379365 * ) ; - - mprj_io_analog_en[12] - + ROUTED met2 ( 3377105 3895155 ) ( 3379365 * ) ; - - mprj_io_dm[36] - + ROUTED met2 ( 3377105 3898375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[12] - + ROUTED met2 ( 3377105 3901595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[12] - + ROUTED met2 ( 3377105 3904355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[12] - + ROUTED met2 ( 3377105 3916775 ) ( 3379365 * ) ; - - mprj_io_dm[38] - + ROUTED met2 ( 3377105 3919995 ) ( 3379365 * ) ; - - mprj_io_holdover[12] - + ROUTED met2 ( 3377105 3923215 ) ( 3379365 * ) ; - - mprj_io_out[12] - + ROUTED met2 ( 3377105 3925975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[12] - + ROUTED met2 ( 3377105 3935175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[12] - + ROUTED met2 ( 3377105 3938395 ) ( 3379365 * ) ; - - mprj_io_oeb[12] - + ROUTED met2 ( 3377105 3941615 ) ( 3379365 * ) ; - - mprj_io_in[13] - + ROUTED met2 ( 3377105 4316775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[13] - + ROUTED met2 ( 3377105 4325975 ) ( 3379365 * ) ; - - mprj_analog_io[6] - + ROUTED met2 ( 3377105 4329195 ) ( 3379365 * ) ; - - mprj_io_dm[40] - + ROUTED met2 ( 3377105 4335175 ) ( 3379365 * ) ; - - mprj_io_analog_en[13] - + ROUTED met2 ( 3377105 4341155 ) ( 3379365 * ) ; - - mprj_io_dm[39] - + ROUTED met2 ( 3377105 4344375 ) ( 3379365 * ) ; +NETS 1003 ; + - clock_pad/OE_N ( clock_pad OE_N ) ( clock_pad DM[0] ) + ( constant_block_1 one ) ( clock_pad ENABLE_VDDIO ) + + ROUTED met2 ( 1007600 210575 ) via_260_260_hv + NEW met2 ( 1007540 210665 ) ( 1007660 * ) + NEW met1 TAPERRULE met1_width_260 ( 964555 210575 ) ( 1007400 * ) + NEW met1 ( 964355 210575 ) via_260_260_hv ( * 210665 ) + ( 964415 * ) + NEW met1 TAPERRULE met1_width_260 ( 942940 210575 ) ( 964155 * ) + NEW met1 ( 942740 210575 ) via_260_260_hv ( * 210665 ) + ( 942800 * ) + NEW met1 TAPERRULE met1_width_260 ( 932810 210575 ) ( 942540 * ) + NEW met2 ( 942680 210485 ) ( 942800 * ) + NEW met2 ( 964295 210485 ) ( 964415 * ) + NEW met2 ( 1007540 210485 ) ( 1007660 * ) + NEW met1 TAPERRULE met1_width_260 ( 1007800 210575 ) ( 1013715 * ) via_260_260_hv + ( * 210665 ) ( 1013775 * ) + NEW met2 TAPERRULE met2_width_260 ( 1013715 203980 ) ( * 210375 ) + NEW met2 ( 1013635 203840 ) ( 1013795 * ) + NEW met2 ( 1013715 203715 ) via2_300_300_vx + NEW met3 ( 1013690 203740 ) ( 1013740 * ) + NEW met3 ( 1014015 203715 ) ( 1015170 * ) + NEW met3 ( 1013690 203690 ) ( 1013740 * ) + NEW met3 ( 1013690 203715 ) ( 1013415 * ) + NEW met2 ( 1013635 203590 ) ( 1013795 * ) ; + - mprj_io[13] ( mprj_pads.area1_io_pad\[13\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 4319000 ) ( * 4380000 ) ; + - mprj_pads.area1_io_pad\[13\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[13\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[13\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[13\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 4313557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 4314240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 4314380 ) ( * 4352745 ) + NEW met1 ( 3378000 4352885 ) ( 3378120 * ) + NEW met1 ( 3378060 4353275 ) via_260_860_vh + NEW met2 ( 3377105 4353645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 4353570 ) ( 3379365 * ) + NEW met1 ( 3378000 4353665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 4353805 ) ( * 4374365 ) + NEW met1 ( 3378000 4374505 ) ( 3378120 * ) + NEW met1 ( 3378060 4374895 ) via_260_860_vh + NEW met2 ( 3377105 4375265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 4375190 ) ( 3379365 * ) + NEW met1 ( 3378000 4375285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 4375190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 4353570 ) ( 3377860 * ) + NEW met2 ( 3378060 4313850 ) via_260_860_vh ( * 4313460 ) + ( 3378120 * ) + NEW met1 ( 3378010 4313395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 4313557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 4313485 ) ( 3379365 * ) ; + - mprj_io_in[13] ( mprj_pads.area1_io_pad\[13\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4316775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[13\]/HLD_H_N + ( mprj_pads.area1_io_pad\[13\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[13\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 4360085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 4360012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 4360110 ) ( 3377640 * ) + NEW met1 ( 3377580 4359720 ) via_260_860_vh + NEW met1 ( 3377520 4359330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 4320225 ) ( * 4359190 ) + NEW met1 ( 3377520 4320085 ) ( 3377640 * ) + NEW met1 ( 3377580 4319995 ) via_260_260_vh + NEW met2 ( 3377105 4320065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 4319995 ) ( 3379365 * ) + NEW met2 ( 3377105 4319925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 4319995 ) ( 3377380 * ) + NEW met1 ( 3377520 4319905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 4313395 ) ( * 4319765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 4360012.5 ) ( 3377380 * ) ; + - mprj_io_one[13] ( mprj_pads.area1_io_pad\[13\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4322755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[13] ( mprj_pads.area1_io_pad\[13\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4325975 ) ( 3379365 * ) ; + - mprj_analog_io[6] ( mprj_pads.area1_io_pad\[13\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4329195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[13\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[13\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[40] ( mprj_pads.area1_io_pad\[13\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4335175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[13\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[13\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[13] ( mprj_pads.area1_io_pad\[13\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4341155 ) ( 3379365 * ) ; + - mprj_io_dm[39] ( mprj_pads.area1_io_pad\[13\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4344375 ) ( 3379365 * ) ; - mprj_io_analog_pol[13] - + ROUTED met2 ( 3377105 4347595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[13] - + ROUTED met2 ( 3377105 4350355 ) ( 3379365 * ) ; + ( mprj_pads.area1_io_pad\[13\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4347595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[13] ( mprj_pads.area1_io_pad\[13\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4350355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[13\]/ENABLE_H + ( mprj_pads.area1_io_pad\[13\] ENABLE_H ) ; - mprj_io_analog_sel[13] - + ROUTED met2 ( 3377105 4362775 ) ( 3379365 * ) ; - - mprj_io_dm[41] - + ROUTED met2 ( 3377105 4365995 ) ( 3379365 * ) ; - - mprj_io_holdover[13] - + ROUTED met2 ( 3377105 4369215 ) ( 3379365 * ) ; - - mprj_io_out[13] - + ROUTED met2 ( 3377105 4371975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[13] - + ROUTED met2 ( 3377105 4381175 ) ( 3379365 * ) ; + ( mprj_pads.area1_io_pad\[13\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4362775 ) ( 3379365 * ) ; + - mprj_io_dm[41] ( mprj_pads.area1_io_pad\[13\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4365995 ) ( 3379365 * ) ; + - mprj_io_holdover[13] ( mprj_pads.area1_io_pad\[13\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4369215 ) ( 3379365 * ) ; + - mprj_io_out[13] ( mprj_pads.area1_io_pad\[13\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4371975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[13] ( mprj_pads.area1_io_pad\[13\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4381175 ) ( 3379365 * ) ; - mprj_io_ib_mode_sel[13] - + ROUTED met2 ( 3377105 4384395 ) ( 3379365 * ) ; - - mprj_io_oeb[13] - + ROUTED met2 ( 3377105 4387615 ) ( 3379365 * ) ; - - mprj_io_in[14] - + ROUTED met2 ( 3377105 4762775 ) ( 3379365 * ) ; - - mprj_io_slow_sel[14] - + ROUTED met2 ( 3377105 4771975 ) ( 3379365 * ) ; - - mprj_analog_io[7] - + ROUTED met2 ( 3377105 4775195 ) ( 3379365 * ) ; - - mprj_io_dm[43] - + ROUTED met2 ( 3377105 4781175 ) ( 3379365 * ) ; - - mprj_io_analog_en[14] - + ROUTED met2 ( 3377105 4787155 ) ( 3379365 * ) ; - - mprj_io_dm[42] - + ROUTED met2 ( 3377105 4790375 ) ( 3379365 * ) ; - - mprj_io_analog_pol[14] - + ROUTED met2 ( 3377105 4793595 ) ( 3379365 * ) ; - - mprj_io_inp_dis[14] - + ROUTED met2 ( 3377105 4796355 ) ( 3379365 * ) ; - - mprj_io_analog_sel[14] - + ROUTED met2 ( 3377105 4808775 ) ( 3379365 * ) ; - - mprj_io_dm[44] - + ROUTED met2 ( 3377105 4811995 ) ( 3379365 * ) ; - - mprj_io_holdover[14] - + ROUTED met2 ( 3377105 4815215 ) ( 3379365 * ) ; - - mprj_io_out[14] - + ROUTED met2 ( 3377105 4817975 ) ( 3379365 * ) ; - - mprj_io_vtrip_sel[14] - + ROUTED met2 ( 3377105 4827175 ) ( 3379365 * ) ; - - mprj_io_ib_mode_sel[14] - + ROUTED met2 ( 3377105 4830395 ) ( 3379365 * ) ; - - mprj_io_oeb[14] - + ROUTED met2 ( 3377105 4833615 ) ( 3379365 * ) ; - - mprj_io_out[33] - + ROUTED met2 ( 208635 1792025 ) ( 210895 * ) ; - - mprj_io_holdover[33] - + ROUTED met2 ( 208635 1794785 ) ( 210895 * ) ; - - mprj_io_dm[101] - + ROUTED met2 ( 208635 1798005 ) ( 210895 * ) ; - - mprj_io_analog_sel[33] - + ROUTED met2 ( 208635 1801225 ) ( 210895 * ) ; - - mprj_io_inp_dis[33] - + ROUTED met2 ( 208635 1813645 ) ( 210895 * ) ; - - mprj_io_analog_pol[33] - + ROUTED met2 ( 208635 1816405 ) ( 210895 * ) ; - - mprj_io_dm[99] - + ROUTED met2 ( 208635 1819625 ) ( 210895 * ) ; - - mprj_io_analog_en[33] - + ROUTED met2 ( 208635 1822845 ) ( 210895 * ) ; - - mprj_io_dm[100] - + ROUTED met2 ( 208635 1828825 ) ( 210895 * ) ; - - mprj_analog_io[26] - + ROUTED met2 ( 208635 1834805 ) ( 210895 * ) ; - - mprj_io_slow_sel[33] - + ROUTED met2 ( 208635 1838025 ) ( 210895 * ) ; - - mprj_io_in[33] - + ROUTED met2 ( 208635 1847225 ) ( 210895 * ) ; - - mprj_io_oeb[32] - + ROUTED met2 ( 208635 1992385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[32] - + ROUTED met2 ( 208635 1995605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[32] - + ROUTED met2 ( 208635 1998825 ) ( 210895 * ) ; - - mprj_io_out[32] - + ROUTED met2 ( 208635 2008025 ) ( 210895 * ) ; - - mprj_io_holdover[32] - + ROUTED met2 ( 208635 2010785 ) ( 210895 * ) ; - - mprj_io_dm[98] - + ROUTED met2 ( 208635 2014005 ) ( 210895 * ) ; - - mprj_io_analog_sel[32] - + ROUTED met2 ( 208635 2017225 ) ( 210895 * ) ; - - mprj_io_inp_dis[32] - + ROUTED met2 ( 208635 2029645 ) ( 210895 * ) ; - - mprj_io_analog_pol[32] - + ROUTED met2 ( 208635 2032405 ) ( 210895 * ) ; - - mprj_io_dm[96] - + ROUTED met2 ( 208635 2035625 ) ( 210895 * ) ; - - mprj_io_analog_en[32] - + ROUTED met2 ( 208635 2038845 ) ( 210895 * ) ; - - mprj_io_dm[97] - + ROUTED met2 ( 208635 2044825 ) ( 210895 * ) ; - - mprj_analog_io[25] - + ROUTED met2 ( 208635 2050805 ) ( 210895 * ) ; - - mprj_io_slow_sel[32] - + ROUTED met2 ( 208635 2054025 ) ( 210895 * ) ; - - mprj_io_in[32] - + ROUTED met2 ( 208635 2063225 ) ( 210895 * ) ; - - mprj_io_oeb[31] - + ROUTED met2 ( 208635 2630385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[31] - + ROUTED met2 ( 208635 2633605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[31] - + ROUTED met2 ( 208635 2636825 ) ( 210895 * ) ; - - mprj_io_out[31] - + ROUTED met2 ( 208635 2646025 ) ( 210895 * ) ; - - mprj_io_holdover[31] - + ROUTED met2 ( 208635 2648785 ) ( 210895 * ) ; - - mprj_io_dm[95] - + ROUTED met2 ( 208635 2652005 ) ( 210895 * ) ; - - mprj_io_analog_sel[31] - + ROUTED met2 ( 208635 2655225 ) ( 210895 * ) ; - - mprj_io_inp_dis[31] - + ROUTED met2 ( 208635 2667645 ) ( 210895 * ) ; - - mprj_io_analog_pol[31] - + ROUTED met2 ( 208635 2670405 ) ( 210895 * ) ; - - mprj_io_dm[93] - + ROUTED met2 ( 208635 2673625 ) ( 210895 * ) ; - - mprj_io_analog_en[31] - + ROUTED met2 ( 208635 2676845 ) ( 210895 * ) ; - - mprj_io_dm[94] - + ROUTED met2 ( 208635 2682825 ) ( 210895 * ) ; - - mprj_analog_io[24] - + ROUTED met2 ( 208635 2688805 ) ( 210895 * ) ; - - mprj_io_slow_sel[31] - + ROUTED met2 ( 208635 2692025 ) ( 210895 * ) ; - - mprj_io_in[31] - + ROUTED met2 ( 208635 2701225 ) ( 210895 * ) ; - - mprj_io_oeb[30] - + ROUTED met2 ( 208635 2846385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[30] - + ROUTED met2 ( 208635 2849605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[30] - + ROUTED met2 ( 208635 2852825 ) ( 210895 * ) ; - - mprj_io_out[30] - + ROUTED met2 ( 208635 2862025 ) ( 210895 * ) ; - - mprj_io_holdover[30] - + ROUTED met2 ( 208635 2864785 ) ( 210895 * ) ; - - mprj_io_dm[92] - + ROUTED met2 ( 208635 2868005 ) ( 210895 * ) ; - - mprj_io_analog_sel[30] - + ROUTED met2 ( 208635 2871225 ) ( 210895 * ) ; - - mprj_io_inp_dis[30] - + ROUTED met2 ( 208635 2883645 ) ( 210895 * ) ; - - mprj_io_analog_pol[30] - + ROUTED met2 ( 208635 2886405 ) ( 210895 * ) ; - - mprj_io_dm[90] - + ROUTED met2 ( 208635 2889625 ) ( 210895 * ) ; - - mprj_io_analog_en[30] - + ROUTED met2 ( 208635 2892845 ) ( 210895 * ) ; - - mprj_io_dm[91] - + ROUTED met2 ( 208635 2898825 ) ( 210895 * ) ; - - mprj_analog_io[23] - + ROUTED met2 ( 208635 2904805 ) ( 210895 * ) ; - - mprj_io_slow_sel[30] - + ROUTED met2 ( 208635 2908025 ) ( 210895 * ) ; - - mprj_io_in[30] - + ROUTED met2 ( 208635 2917225 ) ( 210895 * ) ; - - mprj_io_oeb[29] - + ROUTED met2 ( 208635 3062385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[29] - + ROUTED met2 ( 208635 3065605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[29] - + ROUTED met2 ( 208635 3068825 ) ( 210895 * ) ; - - mprj_io_out[29] - + ROUTED met2 ( 208635 3078025 ) ( 210895 * ) ; - - mprj_io_holdover[29] - + ROUTED met2 ( 208635 3080785 ) ( 210895 * ) ; - - mprj_io_dm[89] - + ROUTED met2 ( 208635 3084005 ) ( 210895 * ) ; - - mprj_io_analog_sel[29] - + ROUTED met2 ( 208635 3087225 ) ( 210895 * ) ; - - mprj_io_inp_dis[29] - + ROUTED met2 ( 208635 3099645 ) ( 210895 * ) ; - - mprj_io_analog_pol[29] - + ROUTED met2 ( 208635 3102405 ) ( 210895 * ) ; - - mprj_io_dm[87] - + ROUTED met2 ( 208635 3105625 ) ( 210895 * ) ; - - mprj_io_analog_en[29] - + ROUTED met2 ( 208635 3108845 ) ( 210895 * ) ; - - mprj_io_dm[88] - + ROUTED met2 ( 208635 3114825 ) ( 210895 * ) ; - - mprj_analog_io[22] - + ROUTED met2 ( 208635 3120805 ) ( 210895 * ) ; - - mprj_io_slow_sel[29] - + ROUTED met2 ( 208635 3124025 ) ( 210895 * ) ; - - mprj_io_in[29] - + ROUTED met2 ( 208635 3133225 ) ( 210895 * ) ; - - mprj_io_oeb[28] - + ROUTED met2 ( 208635 3278385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[28] - + ROUTED met2 ( 208635 3281605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[28] - + ROUTED met2 ( 208635 3284825 ) ( 210895 * ) ; - - mprj_io_out[28] - + ROUTED met2 ( 208635 3294025 ) ( 210895 * ) ; - - mprj_io_holdover[28] - + ROUTED met2 ( 208635 3296785 ) ( 210895 * ) ; - - mprj_io_dm[86] - + ROUTED met2 ( 208635 3300005 ) ( 210895 * ) ; - - mprj_io_analog_sel[28] - + ROUTED met2 ( 208635 3303225 ) ( 210895 * ) ; - - mprj_io_inp_dis[28] - + ROUTED met2 ( 208635 3315645 ) ( 210895 * ) ; - - mprj_io_analog_pol[28] - + ROUTED met2 ( 208635 3318405 ) ( 210895 * ) ; - - mprj_io_dm[84] - + ROUTED met2 ( 208635 3321625 ) ( 210895 * ) ; - - mprj_io_analog_en[28] - + ROUTED met2 ( 208635 3324845 ) ( 210895 * ) ; - - mprj_io_dm[85] - + ROUTED met2 ( 208635 3330825 ) ( 210895 * ) ; - - mprj_analog_io[21] - + ROUTED met2 ( 208635 3336805 ) ( 210895 * ) ; - - mprj_io_slow_sel[28] - + ROUTED met2 ( 208635 3340025 ) ( 210895 * ) ; - - mprj_io_in[28] - + ROUTED met2 ( 208635 3349225 ) ( 210895 * ) ; - - mprj_io_oeb[27] - + ROUTED met2 ( 208635 3494385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[27] - + ROUTED met2 ( 208635 3497605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[27] - + ROUTED met2 ( 208635 3500825 ) ( 210895 * ) ; - - mprj_io_out[27] - + ROUTED met2 ( 208635 3510025 ) ( 210895 * ) ; - - mprj_io_holdover[27] - + ROUTED met2 ( 208635 3512785 ) ( 210895 * ) ; - - mprj_io_dm[83] - + ROUTED met2 ( 208635 3516005 ) ( 210895 * ) ; - - mprj_io_analog_sel[27] - + ROUTED met2 ( 208635 3519225 ) ( 210895 * ) ; - - mprj_io_inp_dis[27] - + ROUTED met2 ( 208635 3531645 ) ( 210895 * ) ; - - mprj_io_analog_pol[27] - + ROUTED met2 ( 208635 3534405 ) ( 210895 * ) ; - - mprj_io_dm[81] - + ROUTED met2 ( 208635 3537625 ) ( 210895 * ) ; - - mprj_io_analog_en[27] - + ROUTED met2 ( 208635 3540845 ) ( 210895 * ) ; - - mprj_io_dm[82] - + ROUTED met2 ( 208635 3546825 ) ( 210895 * ) ; - - mprj_analog_io[20] - + ROUTED met2 ( 208635 3552805 ) ( 210895 * ) ; - - mprj_io_slow_sel[27] - + ROUTED met2 ( 208635 3556025 ) ( 210895 * ) ; - - mprj_io_in[27] - + ROUTED met2 ( 208635 3565225 ) ( 210895 * ) ; - - mprj_io_oeb[26] - + ROUTED met2 ( 208635 3710385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[26] - + ROUTED met2 ( 208635 3713605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[26] - + ROUTED met2 ( 208635 3716825 ) ( 210895 * ) ; - - mprj_io_out[26] - + ROUTED met2 ( 208635 3726025 ) ( 210895 * ) ; - - mprj_io_holdover[26] - + ROUTED met2 ( 208635 3728785 ) ( 210895 * ) ; - - mprj_io_dm[80] - + ROUTED met2 ( 208635 3732005 ) ( 210895 * ) ; - - mprj_io_analog_sel[26] - + ROUTED met2 ( 208635 3735225 ) ( 210895 * ) ; - - mprj_io_inp_dis[26] - + ROUTED met2 ( 208635 3747645 ) ( 210895 * ) ; - - mprj_io_analog_pol[26] - + ROUTED met2 ( 208635 3750405 ) ( 210895 * ) ; - - mprj_io_dm[78] - + ROUTED met2 ( 208635 3753625 ) ( 210895 * ) ; - - mprj_io_analog_en[26] - + ROUTED met2 ( 208635 3756845 ) ( 210895 * ) ; - - mprj_io_dm[79] - + ROUTED met2 ( 208635 3762825 ) ( 210895 * ) ; - - mprj_analog_io[19] - + ROUTED met2 ( 208635 3768805 ) ( 210895 * ) ; - - mprj_io_slow_sel[26] - + ROUTED met2 ( 208635 3772025 ) ( 210895 * ) ; - - mprj_io_in[26] - + ROUTED met2 ( 208635 3781225 ) ( 210895 * ) ; - - mprj_io_oeb[25] - + ROUTED met2 ( 208635 3926385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[25] - + ROUTED met2 ( 208635 3929605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[25] - + ROUTED met2 ( 208635 3932825 ) ( 210895 * ) ; - - mprj_io_out[25] - + ROUTED met2 ( 208635 3942025 ) ( 210895 * ) ; - - mprj_io_holdover[25] - + ROUTED met2 ( 208635 3944785 ) ( 210895 * ) ; - - mprj_io_dm[77] - + ROUTED met2 ( 208635 3948005 ) ( 210895 * ) ; - - mprj_io_analog_sel[25] - + ROUTED met2 ( 208635 3951225 ) ( 210895 * ) ; - - mprj_io_in[15] - + ROUTED met2 ( 3205155 4978235 ) ( 3205295 * ) ; - - mprj_io_slow_sel[15] - + ROUTED met2 ( 3195955 4978235 ) ( 3196095 * ) ; - - mprj_analog_io[8] - + ROUTED met2 ( 3192735 4978235 ) ( 3192875 * ) ; - - mprj_io_dm[46] - + ROUTED met2 ( 3186755 4978235 ) ( 3186895 * ) ; - - mprj_io_analog_en[15] - + ROUTED met2 ( 3180775 4978235 ) ( 3180915 * ) ; - - mprj_io_dm[45] - + ROUTED met2 ( 3177555 4978235 ) ( 3177695 * ) ; - - mprj_io_analog_pol[15] - + ROUTED met2 ( 3174335 4978235 ) ( 3174475 * ) ; - - mprj_io_inp_dis[15] - + ROUTED met2 ( 3171575 4978235 ) ( 3171715 * ) ; - - mprj_io_analog_sel[15] - + ROUTED met2 ( 3159155 4978235 ) ( 3159295 * ) ; - - mprj_io_dm[47] - + ROUTED met2 ( 3155935 4978235 ) ( 3156075 * ) ; - - mprj_io_holdover[15] - + ROUTED met2 ( 3152715 4978235 ) ( 3152855 * ) ; - - mprj_io_out[15] - + ROUTED met2 ( 3149955 4978235 ) ( 3150095 * ) ; - - mprj_io_vtrip_sel[15] - + ROUTED met2 ( 3140755 4978235 ) ( 3140895 * ) ; - - mprj_io_ib_mode_sel[15] - + ROUTED met2 ( 3137535 4978235 ) ( 3137675 * ) ; - - mprj_io_oeb[15] - + ROUTED met2 ( 3134315 4978235 ) ( 3134455 * ) ; - - mprj_io_in[16] - + ROUTED met2 ( 2696155 4978235 ) ( 2696295 * ) ; - - mprj_io_slow_sel[16] - + ROUTED met2 ( 2686955 4978235 ) ( 2687095 * ) ; - - mprj_analog_io[9] - + ROUTED met2 ( 2683735 4978235 ) ( 2683875 * ) ; - - mprj_io_dm[49] - + ROUTED met2 ( 2677755 4978235 ) ( 2677895 * ) ; - - mprj_io_analog_en[16] - + ROUTED met2 ( 2671775 4978235 ) ( 2671915 * ) ; - - mprj_io_dm[48] - + ROUTED met2 ( 2668555 4978235 ) ( 2668695 * ) ; - - mprj_io_analog_pol[16] - + ROUTED met2 ( 2665335 4978235 ) ( 2665475 * ) ; - - mprj_io_inp_dis[16] - + ROUTED met2 ( 2662575 4978235 ) ( 2662715 * ) ; - - mprj_io_analog_sel[16] - + ROUTED met2 ( 2650155 4978235 ) ( 2650295 * ) ; - - mprj_io_dm[50] - + ROUTED met2 ( 2646935 4978235 ) ( 2647075 * ) ; - - mprj_io_holdover[16] - + ROUTED met2 ( 2643715 4978235 ) ( 2643855 * ) ; - - mprj_io_out[16] - + ROUTED met2 ( 2640955 4978235 ) ( 2641095 * ) ; - - mprj_io_vtrip_sel[16] - + ROUTED met2 ( 2631755 4978235 ) ( 2631895 * ) ; - - mprj_io_ib_mode_sel[16] - + ROUTED met2 ( 2628535 4978235 ) ( 2628675 * ) ; - - mprj_io_oeb[16] - + ROUTED met2 ( 2625315 4978235 ) ( 2625455 * ) ; - - mprj_io_in[17] - + ROUTED met2 ( 2439155 4978235 ) ( 2439295 * ) ; - - mprj_io_slow_sel[17] - + ROUTED met2 ( 2429955 4978235 ) ( 2430095 * ) ; - - mprj_analog_io[10] - + ROUTED met2 ( 2426735 4978235 ) ( 2426875 * ) ; - - mprj_io_dm[52] - + ROUTED met2 ( 2420755 4978235 ) ( 2420895 * ) ; - - mprj_io_analog_en[17] - + ROUTED met2 ( 2414775 4978235 ) ( 2414915 * ) ; - - mprj_io_dm[51] - + ROUTED met2 ( 2411555 4978235 ) ( 2411695 * ) ; - - mprj_io_analog_pol[17] - + ROUTED met2 ( 2408335 4978235 ) ( 2408475 * ) ; - - mprj_io_inp_dis[17] - + ROUTED met2 ( 2405575 4978235 ) ( 2405715 * ) ; - - mprj_io_analog_sel[17] - + ROUTED met2 ( 2393155 4978235 ) ( 2393295 * ) ; - - mprj_io_dm[53] - + ROUTED met2 ( 2389935 4978235 ) ( 2390075 * ) ; - - mprj_io_holdover[17] - + ROUTED met2 ( 2386715 4978235 ) ( 2386855 * ) ; - - mprj_io_out[17] - + ROUTED met2 ( 2383955 4978235 ) ( 2384095 * ) ; - - mprj_io_vtrip_sel[17] - + ROUTED met2 ( 2374755 4978235 ) ( 2374895 * ) ; - - mprj_io_ib_mode_sel[17] - + ROUTED met2 ( 2371535 4978235 ) ( 2371675 * ) ; - - mprj_io_oeb[17] - + ROUTED met2 ( 2368315 4978235 ) ( 2368455 * ) ; - - mprj_io_in[18] - + ROUTED met2 ( 1994155 4978235 ) ( 1994295 * ) ; - - mprj_io_slow_sel[18] - + ROUTED met2 ( 1984955 4978235 ) ( 1985095 * ) ; - - mprj_analog_io[11] - + ROUTED met2 ( 1981735 4978235 ) ( 1981875 * ) ; - - mprj_io_dm[55] - + ROUTED met2 ( 1975755 4978235 ) ( 1975895 * ) ; - - mprj_io_analog_en[18] - + ROUTED met2 ( 1969775 4978235 ) ( 1969915 * ) ; - - mprj_io_dm[54] - + ROUTED met2 ( 1966555 4978235 ) ( 1966695 * ) ; - - mprj_io_analog_pol[18] - + ROUTED met2 ( 1963335 4978235 ) ( 1963475 * ) ; - - mprj_io_inp_dis[18] - + ROUTED met2 ( 1960575 4978235 ) ( 1960715 * ) ; - - mprj_io_analog_sel[18] - + ROUTED met2 ( 1948155 4978235 ) ( 1948295 * ) ; - - mprj_io_dm[56] - + ROUTED met2 ( 1944935 4978235 ) ( 1945075 * ) ; - - mprj_io_holdover[18] - + ROUTED met2 ( 1941715 4978235 ) ( 1941855 * ) ; - - mprj_io_out[18] - + ROUTED met2 ( 1938955 4978235 ) ( 1939095 * ) ; - - mprj_io_vtrip_sel[18] - + ROUTED met2 ( 1929755 4978235 ) ( 1929895 * ) ; - - mprj_io_ib_mode_sel[18] - + ROUTED met2 ( 1926535 4978235 ) ( 1926675 * ) ; - - mprj_io_oeb[18] - + ROUTED met2 ( 1923315 4978235 ) ( 1923455 * ) ; - - mprj_io_in[19] - + ROUTED met2 ( 1485155 4978235 ) ( 1485295 * ) ; - - mprj_io_slow_sel[19] - + ROUTED met2 ( 1475955 4978235 ) ( 1476095 * ) ; - - mprj_analog_io[12] - + ROUTED met2 ( 1472735 4978235 ) ( 1472875 * ) ; - - mprj_io_dm[58] - + ROUTED met2 ( 1466755 4978235 ) ( 1466895 * ) ; - - mprj_io_analog_en[19] - + ROUTED met2 ( 1460775 4978235 ) ( 1460915 * ) ; - - mprj_io_dm[57] - + ROUTED met2 ( 1457555 4978235 ) ( 1457695 * ) ; - - mprj_io_analog_pol[19] - + ROUTED met2 ( 1454335 4978235 ) ( 1454475 * ) ; - - mprj_io_inp_dis[19] - + ROUTED met2 ( 1451575 4978235 ) ( 1451715 * ) ; - - mprj_io_analog_sel[19] - + ROUTED met2 ( 1439155 4978235 ) ( 1439295 * ) ; - - mprj_io_dm[59] - + ROUTED met2 ( 1435935 4978235 ) ( 1436075 * ) ; - - mprj_io_holdover[19] - + ROUTED met2 ( 1432715 4978235 ) ( 1432855 * ) ; - - mprj_io_out[19] - + ROUTED met2 ( 1429955 4978235 ) ( 1430095 * ) ; - - mprj_io_vtrip_sel[19] - + ROUTED met2 ( 1420755 4978235 ) ( 1420895 * ) ; - - mprj_io_ib_mode_sel[19] - + ROUTED met2 ( 1417535 4978235 ) ( 1417675 * ) ; - - mprj_io_oeb[19] - + ROUTED met2 ( 1414315 4978235 ) ( 1414455 * ) ; - - mprj_io_in[20] - + ROUTED met2 ( 1227155 4978235 ) ( 1227295 * ) ; - - mprj_io_slow_sel[20] - + ROUTED met2 ( 1217955 4978235 ) ( 1218095 * ) ; - - mprj_analog_io[13] - + ROUTED met2 ( 1214735 4978235 ) ( 1214875 * ) ; - - mprj_io_dm[61] - + ROUTED met2 ( 1208755 4978235 ) ( 1208895 * ) ; - - mprj_io_analog_en[20] - + ROUTED met2 ( 1202775 4978235 ) ( 1202915 * ) ; - - mprj_io_dm[60] - + ROUTED met2 ( 1199555 4978235 ) ( 1199695 * ) ; - - mprj_io_analog_pol[20] - + ROUTED met2 ( 1196335 4978235 ) ( 1196475 * ) ; - - mprj_io_inp_dis[20] - + ROUTED met2 ( 1193575 4978235 ) ( 1193715 * ) ; - - mprj_io_analog_sel[20] - + ROUTED met2 ( 1181155 4978235 ) ( 1181295 * ) ; - - mprj_io_dm[62] - + ROUTED met2 ( 1177935 4978235 ) ( 1178075 * ) ; - - mprj_io_holdover[20] - + ROUTED met2 ( 1174715 4978235 ) ( 1174855 * ) ; - - mprj_io_out[20] - + ROUTED met2 ( 1171955 4978235 ) ( 1172095 * ) ; - - mprj_io_vtrip_sel[20] - + ROUTED met2 ( 1162755 4978235 ) ( 1162895 * ) ; - - mprj_io_ib_mode_sel[20] - + ROUTED met2 ( 1159535 4978235 ) ( 1159675 * ) ; - - mprj_io_oeb[20] - + ROUTED met2 ( 1156315 4978235 ) ( 1156455 * ) ; - - mprj_io_in[21] - + ROUTED met2 ( 970155 4978235 ) ( 970295 * ) ; - - mprj_io_slow_sel[21] - + ROUTED met2 ( 960955 4978235 ) ( 961095 * ) ; - - mprj_analog_io[14] - + ROUTED met2 ( 957735 4978235 ) ( 957875 * ) ; - - mprj_io_dm[64] - + ROUTED met2 ( 951755 4978235 ) ( 951895 * ) ; - - mprj_io_analog_en[21] - + ROUTED met2 ( 945775 4978235 ) ( 945915 * ) ; - - mprj_io_dm[63] - + ROUTED met2 ( 942555 4978235 ) ( 942695 * ) ; - - mprj_io_analog_pol[21] - + ROUTED met2 ( 939335 4978235 ) ( 939475 * ) ; - - mprj_io_inp_dis[21] - + ROUTED met2 ( 936575 4978235 ) ( 936715 * ) ; - - mprj_io_analog_sel[21] - + ROUTED met2 ( 924155 4978235 ) ( 924295 * ) ; - - mprj_io_dm[65] - + ROUTED met2 ( 920935 4978235 ) ( 921075 * ) ; - - mprj_io_holdover[21] - + ROUTED met2 ( 917715 4978235 ) ( 917855 * ) ; - - mprj_io_out[21] - + ROUTED met2 ( 914955 4978235 ) ( 915095 * ) ; - - mprj_io_vtrip_sel[21] - + ROUTED met2 ( 905755 4978235 ) ( 905895 * ) ; - - mprj_io_ib_mode_sel[21] - + ROUTED met2 ( 902535 4978235 ) ( 902675 * ) ; - - mprj_io_oeb[21] - + ROUTED met2 ( 899315 4978235 ) ( 899455 * ) ; - - mprj_io_in[22] - + ROUTED met2 ( 713155 4978235 ) ( 713295 * ) ; - - mprj_io_slow_sel[22] - + ROUTED met2 ( 703955 4978235 ) ( 704095 * ) ; - - mprj_analog_io[15] - + ROUTED met2 ( 700735 4978235 ) ( 700875 * ) ; - - mprj_io_dm[67] - + ROUTED met2 ( 694755 4978235 ) ( 694895 * ) ; - - mprj_io_analog_en[22] - + ROUTED met2 ( 688775 4978235 ) ( 688915 * ) ; - - mprj_io_dm[66] - + ROUTED met2 ( 685555 4978235 ) ( 685695 * ) ; - - mprj_io_analog_pol[22] - + ROUTED met2 ( 682335 4978235 ) ( 682475 * ) ; - - mprj_io_inp_dis[22] - + ROUTED met2 ( 679575 4978235 ) ( 679715 * ) ; - - mprj_io_analog_sel[22] - + ROUTED met2 ( 667155 4978235 ) ( 667295 * ) ; - - mprj_io_dm[68] - + ROUTED met2 ( 663935 4978235 ) ( 664075 * ) ; - - mprj_io_holdover[22] - + ROUTED met2 ( 660715 4978235 ) ( 660855 * ) ; - - mprj_io_out[22] - + ROUTED met2 ( 657955 4978235 ) ( 658095 * ) ; - - mprj_io_vtrip_sel[22] - + ROUTED met2 ( 648755 4978235 ) ( 648895 * ) ; - - mprj_io_ib_mode_sel[22] - + ROUTED met2 ( 645535 4978235 ) ( 645675 * ) ; - - mprj_io_oeb[22] - + ROUTED met2 ( 642315 4978235 ) ( 642455 * ) ; - - mprj_io_in[23] - + ROUTED met2 ( 456155 4978235 ) ( 456295 * ) ; - - mprj_io_slow_sel[23] - + ROUTED met2 ( 446955 4978235 ) ( 447095 * ) ; - - mprj_analog_io[16] - + ROUTED met2 ( 443735 4978235 ) ( 443875 * ) ; - - mprj_io_dm[70] - + ROUTED met2 ( 437755 4978235 ) ( 437895 * ) ; - - mprj_io_analog_en[23] - + ROUTED met2 ( 431775 4978235 ) ( 431915 * ) ; - - mprj_io_dm[69] - + ROUTED met2 ( 428555 4978235 ) ( 428695 * ) ; - - mprj_io_analog_pol[23] - + ROUTED met2 ( 425335 4978235 ) ( 425475 * ) ; - - mprj_io_inp_dis[23] - + ROUTED met2 ( 422575 4978235 ) ( 422715 * ) ; - - mprj_io_inp_dis[25] - + ROUTED met2 ( 208635 3963645 ) ( 210895 * ) ; - - mprj_io_analog_pol[25] - + ROUTED met2 ( 208635 3966405 ) ( 210895 * ) ; - - mprj_io_dm[75] - + ROUTED met2 ( 208635 3969625 ) ( 210895 * ) ; - - mprj_io_analog_en[25] - + ROUTED met2 ( 208635 3972845 ) ( 210895 * ) ; - - mprj_io_dm[76] - + ROUTED met2 ( 208635 3978825 ) ( 210895 * ) ; - - mprj_analog_io[18] - + ROUTED met2 ( 208635 3984805 ) ( 210895 * ) ; - - mprj_io_slow_sel[25] - + ROUTED met2 ( 208635 3988025 ) ( 210895 * ) ; - - mprj_io_in[25] - + ROUTED met2 ( 208635 3997225 ) ( 210895 * ) ; - - mprj_io_oeb[24] - + ROUTED met2 ( 208635 4775385 ) ( 210895 * ) ; - - mprj_io_ib_mode_sel[24] - + ROUTED met2 ( 208635 4778605 ) ( 210895 * ) ; - - mprj_io_vtrip_sel[24] - + ROUTED met2 ( 208635 4781825 ) ( 210895 * ) ; - - mprj_io_out[24] - + ROUTED met2 ( 208635 4791025 ) ( 210895 * ) ; - - mprj_io_holdover[24] - + ROUTED met2 ( 208635 4793785 ) ( 210895 * ) ; - - mprj_io_dm[74] - + ROUTED met2 ( 208635 4797005 ) ( 210895 * ) ; - - mprj_io_analog_sel[24] - + ROUTED met2 ( 208635 4800225 ) ( 210895 * ) ; - - mprj_io_inp_dis[24] - + ROUTED met2 ( 208635 4812645 ) ( 210895 * ) ; - - mprj_io_analog_pol[24] - + ROUTED met2 ( 208635 4815405 ) ( 210895 * ) ; - - mprj_io_dm[72] - + ROUTED met2 ( 208635 4818625 ) ( 210895 * ) ; - - mprj_io_analog_en[24] - + ROUTED met2 ( 208635 4821845 ) ( 210895 * ) ; - - mprj_io_dm[73] - + ROUTED met2 ( 208635 4827825 ) ( 210895 * ) ; - - mprj_analog_io[17] - + ROUTED met2 ( 208635 4833805 ) ( 210895 * ) ; - - mprj_io_slow_sel[24] - + ROUTED met2 ( 208635 4837025 ) ( 210895 * ) ; - - mprj_io_in[24] - + ROUTED met2 ( 208635 4846225 ) ( 210895 * ) ; - - mprj_io_analog_sel[23] - + ROUTED met2 ( 410155 4978235 ) ( 410295 * ) ; - - mprj_io_dm[71] - + ROUTED met2 ( 406935 4978235 ) ( 407075 * ) ; - - mprj_io_holdover[23] - + ROUTED met2 ( 403715 4978235 ) ( 403855 * ) ; - - mprj_io_out[23] - + ROUTED met2 ( 400955 4978235 ) ( 401095 * ) ; - - mprj_io_vtrip_sel[23] - + ROUTED met2 ( 391755 4978235 ) ( 391895 * ) ; - - mprj_io_ib_mode_sel[23] - + ROUTED met2 ( 388535 4978235 ) ( 388675 * ) ; - - mprj_io_oeb[23] - + ROUTED met2 ( 385315 4978235 ) ( 385455 * ) ; - - flash_io1_ieb_core - + ROUTED met2 ( 2335285 208797.5 ) ( 2335425 * ) - NEW met2 ( 2335285 209070 ) ( 2336110 * ) - NEW met2 ( 2335285 209125 ) ( 2336170 * ) - NEW met2 ( 2335285 209155 ) ( 2335910 * ) - NEW met2 ( 2335285 210067.5 ) ( 2335425 * ) - NEW met2 ( 2336050 209415 ) ( 2336170 * ) - NEW met1 ( 2336020 209370 ) ( 2335910 * ) - NEW met1 ( 2321130 209270 ) ( 2335910 * ) - NEW met1 ( 2320930 209270 ) via_260_260 - NEW met1 ( 2320840 209270 ) ( 2320730 * ) - NEW met1 ( 2321130 209370 ) ( 2321020 * ) - NEW met1 ( 2321130 209170 ) ( 2321020 * ) - NEW met2 ( 2320870 209415 ) ( 2320990 * ) - NEW met2 ( 2320245 209155 ) ( 2320730 * ) - NEW met2 ( 2320245 209125 ) ( 2320990 * ) - NEW met2 ( 2320245 209070 ) ( 2320930 * ) - NEW met1 ( 2336020 209170 ) ( 2336110 * ) ( * 209270 ) - via_260_260 - NEW met1 ( 2336310 209370 ) ( 2336200 * ) - NEW met1 ( 2336310 209270 ) ( 2350170 * ) - NEW met1 ( 2336310 209170 ) ( 2336200 * ) - NEW met1 ( 2350280 209170 ) ( 2350370 * ) ( * 209270 ) - via_260_260 - NEW met1 ( 2350280 209370 ) ( 2350170 * ) - NEW met1 ( 2350570 209270 ) ( 2350460 * ) - NEW met2 ( 2350310 209415 ) ( 2350430 * ) - NEW met2 ( 2350310 209125 ) ( 2350925 * ) - NEW met2 ( 2350370 209070 ) ( 2350925 * ) - NEW met2 ( 2350570 209155 ) ( 2350925 * ) ; - - gpio_mode1_core - + ROUTED met2 ( 2624925 209765 ) ( 2625065 * ) - NEW met2 ( 2624990 211035 ) ( * 211600 ) - NEW met2 ( 2624930 211685 ) ( 2625050 * ) - NEW met2 ( 2624930 211975 ) ( 2625050 * ) - NEW met1 ( 2624900 211930 ) ( 2624790 * ) - NEW met1 ( 2594370 211830 ) ( 2624790 * ) - NEW met1 ( 2594170 211830 ) via_260_260 - NEW met1 ( 2594080 211830 ) ( 2593970 * ) - NEW met1 ( 2594370 211930 ) ( 2594260 * ) - NEW met1 ( 2594370 211730 ) ( 2594260 * ) - NEW met2 ( 2594110 211975 ) ( 2594230 * ) - NEW met2 ( 2594110 211685 ) ( 2594230 * ) - NEW met2 ( 2594170 209170 ) ( * 211600 ) - NEW met1 ( 2624900 211730 ) ( 2624990 * ) ( * 211830 ) - via_260_260 - NEW met1 ( 2625190 211830 ) ( 2625080 * ) ; - - flash_io0_ieb_core - + ROUTED met2 ( 2061285 208832.5 ) ( 2061425 * ) - NEW met2 ( 2061285 210032.5 ) ( 2061490 * ) - NEW met2 ( 2061490 211035 ) ( * 211600 ) - NEW met2 ( 2061430 211685 ) ( 2061550 * ) - NEW met2 ( 2061430 211975 ) ( 2061550 * ) - NEW met1 ( 2061400 211930 ) ( 2061290 * ) + ( mprj_pads.area1_io_pad\[13\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4384395 ) ( 3379365 * ) ; + - mprj_io_oeb[13] ( mprj_pads.area1_io_pad\[13\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4387615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[13\]/IN_H + ( mprj_pads.area1_io_pad\[13\] IN_H ) ; + - vccd1_pad ( user1_vccd_lvclamp_pad VCCD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 3490700 4575530 ) ( 3556360 * ) ; + - flash_clk ( flash_clk_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 1756000 64215 ) ( 1817000 * ) ; + - flash_clk_pad/TIE_LO_ESD ( flash_clk_pad TIE_LO_ESD ) + ( flash_clk_pad ENABLE_VSWITCH_H ) + ( flash_clk_pad ENABLE_INP_H ) + + ROUTED met2 ( 1750560 209315 ) via_260_260_hv + NEW met2 ( 1750500 209405 ) ( 1750620 * ) + NEW met1 TAPERRULE met1_width_260 ( 1749880 209315 ) ( 1750360 * ) + NEW met2 ( 1750500 209225 ) ( 1750620 * ) + NEW met1 TAPERRULE met1_width_260 ( 1750760 209315 ) ( 1790580 * ) via_260_260_hv + ( * 209405 ) ( 1790640 * ) + NEW met2 ( 1790520 209225 ) ( 1790640 * ) + NEW met1 TAPERRULE met1_width_260 ( 1790780 209315 ) ( 1812190 * ) via_260_260_hv + ( * 209405 ) ( 1812250 * ) + NEW met2 ( 1812130 209225 ) ( 1812250 * ) + NEW met1 TAPERRULE met1_width_260 ( 1812390 209315 ) ( 1828065 * ) ; + - flash_clk_pad/IN ( flash_clk_pad IN ) ; + - flash_clk_pad/HLD_H_N ( flash_clk_pad HLD_H_N ) + ( flash_clk_pad TIE_HI_ESD ) + + ROUTED met2 ( 1797000 209735 ) via_260_260_hv + NEW met2 ( 1796940 209825 ) ( 1797060 * ) + NEW met1 TAPERRULE met1_width_260 ( 1757205 209735 ) ( 1796800 * ) + NEW met1 ( 1757005 209735 ) via_260_260_hv ( * 209825 ) + ( 1757065 * ) + NEW met1 TAPERRULE met1_width_260 ( 1749880 209735 ) ( 1756805 * ) + NEW met2 ( 1756945 209645 ) ( 1757065 * ) + NEW met2 ( 1796940 209645 ) ( 1797060 * ) + NEW met1 TAPERRULE met1_width_260 ( 1797200 209735 ) ( 1828065 * ) ; + - flash_clk_pad/SLOW ( flash_clk_pad SLOW ) + ( constant_block_3 zero ) ( flash_clk_pad IB_MODE_SEL ) + ( flash_clk_pad VTRIP_SEL ) ( flash_clk_pad HLD_OVR ) + ( flash_clk_pad ANALOG_SEL ) ( flash_clk_pad INP_DIS ) + ( flash_clk_pad ANALOG_POL ) ( flash_clk_pad DM[0] ) + ( flash_clk_pad ANALOG_EN ) + + ROUTED met2 ( 1762970 210155 ) via_260_260_hv + NEW met2 ( 1762910 210245 ) ( 1763030 * ) + NEW met1 TAPERRULE met1_width_260 ( 1749880 210155 ) ( 1762770 * ) + NEW met2 ( 1762910 210065 ) ( 1763030 * ) + NEW met1 TAPERRULE met1_width_260 ( 1763170 210155 ) ( 1778130 * ) via_260_260_hv + ( * 210245 ) ( 1778190 * ) + NEW met2 ( 1778070 210065 ) ( 1778190 * ) + NEW met1 TAPERRULE met1_width_260 ( 1778330 210155 ) ( 1781360 * ) via_260_260_hv + ( * 210245 ) ( 1781420 * ) + NEW met2 ( 1781300 210065 ) ( 1781420 * ) + NEW met1 TAPERRULE met1_width_260 ( 1781560 210155 ) ( 1784575 * ) via_260_260_hv + ( * 210245 ) ( 1784635 * ) + NEW met2 ( 1784515 210065 ) ( 1784635 * ) + NEW met1 TAPERRULE met1_width_260 ( 1784775 210155 ) ( 1787350 * ) via_260_260_hv + ( * 210245 ) ( 1787410 * ) + NEW met2 ( 1787290 210065 ) ( 1787410 * ) + NEW met1 TAPERRULE met1_width_260 ( 1787550 210155 ) ( 1799770 * ) via_260_260_hv + ( * 210245 ) ( 1799830 * ) + NEW met2 ( 1799710 210065 ) ( 1799830 * ) + NEW met1 TAPERRULE met1_width_260 ( 1799970 210155 ) ( 1806215 * ) via_260_260_hv + ( * 210245 ) ( 1806275 * ) + NEW met2 ( 1806155 210065 ) ( 1806275 * ) + NEW met1 TAPERRULE met1_width_260 ( 1806415 210155 ) ( 1818165 * ) via_260_260_hv + ( * 210245 ) ( 1818225 * ) + NEW met2 ( 1818105 210065 ) ( 1818225 * ) + NEW met1 TAPERRULE met1_width_260 ( 1818365 210155 ) ( 1821390 * ) via_260_260_hv + ( * 210245 ) ( 1821450 * ) + NEW met2 ( 1821330 210065 ) ( 1821450 * ) + NEW met1 TAPERRULE met1_width_260 ( 1821590 210155 ) ( 1829945 * ) via_260_260_hv + ( * 210245 ) ( 1830005 * ) + NEW met2 TAPERRULE met2_width_260 ( 1829945 204845 ) ( * 209955 ) + NEW met2 ( 1829865 204705 ) ( 1830025 * ) + NEW met2 ( 1829945 204580 ) via2_300_300_vx + NEW met3 ( 1829920 204605 ) ( 1829970 * ) + NEW met3 ( 1830245 204580 ) ( 1846200 * ) + NEW met3 ( 1846200 203730 ) ( * 204280 ) + NEW met3 ( 1829920 204555 ) ( 1829970 * ) + NEW met3 ( 1829920 204580 ) ( 1829645 * ) + NEW met2 ( 1829865 204455 ) ( 1830025 * ) ; + - flash_clk_pad/PAD_A_ESD_0_H ( flash_clk_pad PAD_A_ESD_0_H ) ; + - flash_clk_pad/PAD_A_ESD_1_H ( flash_clk_pad PAD_A_ESD_1_H ) ; + - flash_clk_pad/PAD_A_NOESD_H ( flash_clk_pad PAD_A_NOESD_H ) ; + - flash_clk_core ( flash_clk_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1808975 208635 ) ( * 210895 ) ; + - flash_clk_oeb_core ( flash_clk_pad OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1824615 208635 ) ( * 210895 ) ; + - flash_clk_pad/IN_H ( flash_clk_pad IN_H ) ; + - constant_block_0/vssd ( constant_block_0 vssd ) ; + - constant_block_0/zero ( constant_block_0 zero ) ; + - mprj_io[9] ( mprj_pads.area1_io_pad\[9\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 3197000 ) ( * 3258000 ) ; + - mprj_pads.area1_io_pad\[9\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[9\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[9\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[9\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 3191557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 3192240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3192380 ) ( * 3230745 ) + NEW met1 ( 3378000 3230885 ) ( 3378120 * ) + NEW met1 ( 3378060 3231275 ) via_260_860_vh + NEW met2 ( 3377105 3231645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3231570 ) ( 3379365 * ) + NEW met1 ( 3378000 3231665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3231805 ) ( * 3252365 ) + NEW met1 ( 3378000 3252505 ) ( 3378120 * ) + NEW met1 ( 3378060 3252895 ) via_260_860_vh + NEW met2 ( 3377105 3253265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3253190 ) ( 3379365 * ) + NEW met1 ( 3378000 3253285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3253190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3231570 ) ( 3377860 * ) + NEW met2 ( 3378060 3191850 ) via_260_860_vh ( * 3191460 ) + ( 3378120 * ) + NEW met1 ( 3378010 3191395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 3191557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 3191485 ) ( 3379365 * ) ; + - mprj_io_in[9] ( mprj_pads.area1_io_pad\[9\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3194775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[9\]/HLD_H_N + ( mprj_pads.area1_io_pad\[9\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[9\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3238085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3238012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3238110 ) ( 3377640 * ) + NEW met1 ( 3377580 3237720 ) via_260_860_vh + NEW met1 ( 3377520 3237330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3198225 ) ( * 3237190 ) + NEW met1 ( 3377520 3198085 ) ( 3377640 * ) + NEW met1 ( 3377580 3197995 ) via_260_260_vh + NEW met2 ( 3377105 3198065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 3197995 ) ( 3379365 * ) + NEW met2 ( 3377105 3197925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 3197995 ) ( 3377380 * ) + NEW met1 ( 3377520 3197905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3191395 ) ( * 3197765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3238012.5 ) ( 3377380 * ) ; + - mprj_io_one[9] ( mprj_pads.area1_io_pad\[9\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3200755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[9] ( mprj_pads.area1_io_pad\[9\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3203975 ) ( 3379365 * ) ; + - mprj_analog_io[2] ( mprj_pads.area1_io_pad\[9\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3207195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[9\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[9\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[28] ( mprj_pads.area1_io_pad\[9\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3213175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[9\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[9\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[9] ( mprj_pads.area1_io_pad\[9\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3219155 ) ( 3379365 * ) ; + - mprj_io_dm[27] ( mprj_pads.area1_io_pad\[9\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3222375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[9] ( mprj_pads.area1_io_pad\[9\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3225595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[9] ( mprj_pads.area1_io_pad\[9\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3228355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[9\]/ENABLE_H + ( mprj_pads.area1_io_pad\[9\] ENABLE_H ) ; + - mprj_io_analog_sel[9] ( mprj_pads.area1_io_pad\[9\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3240775 ) ( 3379365 * ) ; + - mprj_io_dm[29] ( mprj_pads.area1_io_pad\[9\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3243995 ) ( 3379365 * ) ; + - mprj_io_holdover[9] ( mprj_pads.area1_io_pad\[9\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3247215 ) ( 3379365 * ) ; + - mprj_io_out[9] ( mprj_pads.area1_io_pad\[9\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3249975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[9] ( mprj_pads.area1_io_pad\[9\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3259175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[9] + ( mprj_pads.area1_io_pad\[9\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3262395 ) ( 3379365 * ) ; + - mprj_io_oeb[9] ( mprj_pads.area1_io_pad\[9\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3265615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[9\]/IN_H + ( mprj_pads.area1_io_pad\[9\] IN_H ) ; + - vssa1_pad ( user1_vssa_hvclamp_pad\[0\] VSSA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 2885850 5123530 ) ( 2945090 * ) ; + - gpio_pad/VDDIO_Q ( gpio_pad VDDIO_Q ) ( FILLER_167 VDDIO_Q ) + ( FILLER_168 VDDIO_Q ) ( FILLER_169 VDDIO_Q ) + ( FILLER_166 VDDIO_Q ) ( FILLER_165 VDDIO_Q ) + ( FILLER_164 VDDIO_Q ) ( FILLER_163 VDDIO_Q ) + ( FILLER_162 VDDIO_Q ) ( FILLER_161 VDDIO_Q ) + ( FILLER_160 VDDIO_Q ) ( FILLER_159 VDDIO_Q ) + ( FILLER_158 VDDIO_Q ) ( FILLER_157 VDDIO_Q ) + ( FILLER_153 VDDIO_Q ) ( mprj_pads.area1_io_pad\[15\] VDDIO_Q ) + ( FILLER_154 VDDIO_Q ) ( FILLER_155 VDDIO_Q ) + ( FILLER_149 VDDIO_Q ) ( FILLER_152 VDDIO_Q ) + ( FILLER_151 VDDIO_Q ) ( FILLER_150 VDDIO_Q ) + ( FILLER_145 VDDIO_Q ) ( FILLER_148 VDDIO_Q ) + ( FILLER_147 VDDIO_Q ) ( FILLER_146 VDDIO_Q ) + ( FILLER_144 VDDIO_Q ) ( FILLER_137 VDDIO_Q ) + ( user1_vssa_hvclamp_pad\[0\] VDDIO_Q ) ( FILLER_140 VDDIO_Q ) + ( FILLER_141 VDDIO_Q ) ( FILLER_142 VDDIO_Q ) + ( FILLER_139 VDDIO_Q ) ( FILLER_138 VDDIO_Q ) + ( FILLER_134 VDDIO_Q ) ( FILLER_136 VDDIO_Q ) + ( FILLER_135 VDDIO_Q ) ( FILLER_131 VDDIO_Q ) + ( FILLER_133 VDDIO_Q ) ( FILLER_132 VDDIO_Q ) + ( FILLER_127 VDDIO_Q ) ( FILLER_128 VDDIO_Q ) + ( FILLER_129 VDDIO_Q ) ( mprj_pads.area1_io_pad\[16\] VDDIO_Q ) + ( FILLER_123 VDDIO_Q ) ( FILLER_126 VDDIO_Q ) + ( FILLER_125 VDDIO_Q ) ( FILLER_124 VDDIO_Q ) + ( FILLER_122 VDDIO_Q ) ( FILLER_121 VDDIO_Q ) + ( FILLER_120 VDDIO_Q ) ( FILLER_119 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[17\] VDDIO_Q ) ( FILLER_118 VDDIO_Q ) + ( FILLER_116 VDDIO_Q ) ( FILLER_115 VDDIO_Q ) + ( FILLER_114 VDDIO_Q ) ( FILLER_113 VDDIO_Q ) + ( FILLER_112 VDDIO_Q ) ( FILLER_111 VDDIO_Q ) + ( FILLER_110 VDDIO_Q ) ( FILLER_109 VDDIO_Q ) + ( FILLER_108 VDDIO_Q ) ( FILLER_107 VDDIO_Q ) + ( FILLER_106 VDDIO_Q ) ( FILLER_105 VDDIO_Q ) + ( FILLER_104 VDDIO_Q ) ( FILLER_102 VDDIO_Q ) + ( FILLER_103 VDDIO_Q ) ( FILLER_98 VDDIO_Q ) + ( FILLER_101 VDDIO_Q ) ( FILLER_100 VDDIO_Q ) + ( FILLER_99 VDDIO_Q ) ( FILLER_94 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[18\] VDDIO_Q ) ( FILLER_95 VDDIO_Q ) + ( FILLER_96 VDDIO_Q ) ( FILLER_93 VDDIO_Q ) + ( FILLER_92 VDDIO_Q ) ( FILLER_91 VDDIO_Q ) + ( FILLER_90 VDDIO_Q ) ( FILLER_89 VDDIO_Q ) + ( FILLER_88 VDDIO_Q ) ( FILLER_86 VDDIO_Q ) + ( FILLER_87 VDDIO_Q ) ( FILLER_SB3 VDDIO_Q ) + ( disconnect_vdda_0 VDDIO_Q ) ( FILLER_78 VDDIO_Q ) + ( mgmt_vssio_hvclamp_pad\[1\] VDDIO_Q ) ( FILLER_80 VDDIO_Q ) + ( FILLER_81 VDDIO_Q ) ( FILLER_82 VDDIO_Q ) + ( FILLER_79 VDDIO_Q ) ( FILLER_75 VDDIO_Q ) + ( FILLER_77 VDDIO_Q ) ( FILLER_76 VDDIO_Q ) + ( FILLER_71 VDDIO_Q ) ( FILLER_74 VDDIO_Q ) + ( FILLER_73 VDDIO_Q ) ( FILLER_72 VDDIO_Q ) + ( FILLER_63 VDDIO_Q ) ( FILLER_68 VDDIO_Q ) + ( FILLER_69 VDDIO_Q ) ( mprj_pads.area2_io_pad\[0\] VDDIO_Q ) + ( FILLER_66 VDDIO_Q ) ( FILLER_67 VDDIO_Q ) + ( FILLER_65 VDDIO_Q ) ( FILLER_64 VDDIO_Q ) + ( FILLER_59 VDDIO_Q ) ( FILLER_62 VDDIO_Q ) + ( FILLER_61 VDDIO_Q ) ( FILLER_60 VDDIO_Q ) + ( FILLER_57 VDDIO_Q ) ( FILLER_58 VDDIO_Q ) + ( FILLER_53 VDDIO_Q ) ( FILLER_54 VDDIO_Q ) + ( FILLER_55 VDDIO_Q ) ( mprj_pads.area2_io_pad\[1\] VDDIO_Q ) + ( FILLER_48 VDDIO_Q ) ( FILLER_52 VDDIO_Q ) + ( FILLER_51 VDDIO_Q ) ( FILLER_50 VDDIO_Q ) + ( FILLER_49 VDDIO_Q ) ( FILLER_46 VDDIO_Q ) + ( FILLER_47 VDDIO_Q ) ( FILLER_44 VDDIO_Q ) + ( FILLER_45 VDDIO_Q ) ( FILLER_38 VDDIO_Q ) + ( FILLER_41 VDDIO_Q ) ( FILLER_42 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[2\] VDDIO_Q ) ( FILLER_40 VDDIO_Q ) + ( FILLER_39 VDDIO_Q ) ( FILLER_35 VDDIO_Q ) + ( FILLER_37 VDDIO_Q ) ( FILLER_36 VDDIO_Q ) + ( FILLER_31 VDDIO_Q ) ( FILLER_34 VDDIO_Q ) + ( FILLER_33 VDDIO_Q ) ( FILLER_32 VDDIO_Q ) + ( FILLER_28 VDDIO_Q ) ( mprj_pads.area2_io_pad\[3\] VDDIO_Q ) + ( FILLER_29 VDDIO_Q ) ( FILLER_26 VDDIO_Q ) + ( FILLER_27 VDDIO_Q ) ( FILLER_25 VDDIO_Q ) + ( FILLER_24 VDDIO_Q ) ( FILLER_23 VDDIO_Q ) + ( FILLER_22 VDDIO_Q ) ( FILLER_21 VDDIO_Q ) + ( FILLER_20 VDDIO_Q ) ( FILLER_19 VDDIO_Q ) + ( FILLER_18 VDDIO_Q ) ( FILLER_14 VDDIO_Q ) + ( FILLER_15 VDDIO_Q ) ( FILLER_16 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[4\] VDDIO_Q ) ( FILLER_10 VDDIO_Q ) + ( FILLER_13 VDDIO_Q ) ( FILLER_12 VDDIO_Q ) + ( FILLER_11 VDDIO_Q ) ( FILLER_6 VDDIO_Q ) ( FILLER_9 VDDIO_Q ) + ( FILLER_8 VDDIO_Q ) ( FILLER_7 VDDIO_Q ) ( FILLER_5 VDDIO_Q ) + ( user2_corner VDDIO_Q ) ( user1_corner VDDIO_Q ) + ( FILLER_603 VDDIO_Q ) ( FILLER_604 VDDIO_Q ) + ( FILLER_601 VDDIO_Q ) ( FILLER_810 VDDIO_Q ) + ( FILLER_811 VDDIO_Q ) ( FILLER_602 VDDIO_Q ) + ( FILLER_809 VDDIO_Q ) ( FILLER_596 VDDIO_Q ) + ( FILLER_600 VDDIO_Q ) ( FILLER_808 VDDIO_Q ) + ( FILLER_599 VDDIO_Q ) ( FILLER_807 VDDIO_Q ) + ( FILLER_598 VDDIO_Q ) ( FILLER_806 VDDIO_Q ) + ( FILLER_597 VDDIO_Q ) ( FILLER_805 VDDIO_Q ) + ( FILLER_804 VDDIO_Q ) ( FILLER_595 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[14\] VDDIO_Q ) ( FILLER_803 VDDIO_Q ) + ( FILLER_593 VDDIO_Q ) ( mprj_pads.area2_io_pad\[5\] VDDIO_Q ) + ( FILLER_592 VDDIO_Q ) ( FILLER_801 VDDIO_Q ) + ( FILLER_591 VDDIO_Q ) ( FILLER_800 VDDIO_Q ) + ( FILLER_590 VDDIO_Q ) ( FILLER_799 VDDIO_Q ) + ( FILLER_798 VDDIO_Q ) ( FILLER_589 VDDIO_Q ) + ( FILLER_797 VDDIO_Q ) ( FILLER_588 VDDIO_Q ) + ( FILLER_796 VDDIO_Q ) ( FILLER_587 VDDIO_Q ) + ( FILLER_586 VDDIO_Q ) ( FILLER_585 VDDIO_Q ) + ( FILLER_794 VDDIO_Q ) ( FILLER_795 VDDIO_Q ) + ( FILLER_791 VDDIO_Q ) ( FILLER_583 VDDIO_Q ) + ( user2_vccd_lvclamp_pad VDDIO_Q ) ( FILLER_582 VDDIO_Q ) + ( FILLER_581 VDDIO_Q ) ( FILLER_792 VDDIO_Q ) + ( user1_vccd_lvclamp_pad VDDIO_Q ) ( FILLER_580 VDDIO_Q ) + ( FILLER_576 VDDIO_Q ) ( FILLER_790 VDDIO_Q ) + ( FILLER_579 VDDIO_Q ) ( FILLER_789 VDDIO_Q ) + ( FILLER_578 VDDIO_Q ) ( FILLER_788 VDDIO_Q ) + ( FILLER_577 VDDIO_Q ) ( FILLER_787 VDDIO_Q ) + ( FILLER_786 VDDIO_Q ) ( FILLER_575 VDDIO_Q ) + ( FILLER_785 VDDIO_Q ) ( FILLER_570 VDDIO_Q ) + ( FILLER_784 VDDIO_Q ) ( FILLER_573 VDDIO_Q ) + ( mgmt_vddio_hvclamp_pad\[1\] VDDIO_Q ) ( FILLER_572 VDDIO_Q ) + ( FILLER_571 VDDIO_Q ) ( mprj_pads.area1_io_pad\[13\] VDDIO_Q ) + ( FILLER_782 VDDIO_Q ) ( FILLER_781 VDDIO_Q ) + ( FILLER_569 VDDIO_Q ) ( FILLER_780 VDDIO_Q ) + ( FILLER_568 VDDIO_Q ) ( FILLER_779 VDDIO_Q ) + ( FILLER_567 VDDIO_Q ) ( FILLER_566 VDDIO_Q ) + ( FILLER_778 VDDIO_Q ) ( FILLER_565 VDDIO_Q ) + ( FILLER_777 VDDIO_Q ) ( FILLER_776 VDDIO_Q ) + ( FILLER_560 VDDIO_Q ) ( FILLER_775 VDDIO_Q ) + ( user2_vssa_hvclamp_pad VDDIO_Q ) ( FILLER_562 VDDIO_Q ) + ( FILLER_563 VDDIO_Q ) ( FILLER_561 VDDIO_Q ) + ( user1_vdda_hvclamp_pad\[0\] VDDIO_Q ) ( FILLER_773 VDDIO_Q ) + ( FILLER_772 VDDIO_Q ) ( FILLER_771 VDDIO_Q ) + ( FILLER_559 VDDIO_Q ) ( FILLER_770 VDDIO_Q ) + ( FILLER_558 VDDIO_Q ) ( FILLER_769 VDDIO_Q ) + ( FILLER_557 VDDIO_Q ) ( FILLER_556 VDDIO_Q ) + ( FILLER_555 VDDIO_Q ) ( FILLER_768 VDDIO_Q ) + ( FILLER_766 VDDIO_Q ) ( FILLER_767 VDDIO_Q ) + ( FILLER_765 VDDIO_Q ) ( FILLER_550 VDDIO_Q ) + ( FILLER_553 VDDIO_Q ) ( mprj_pads.area2_io_pad\[6\] VDDIO_Q ) + ( FILLER_552 VDDIO_Q ) ( FILLER_551 VDDIO_Q ) + ( FILLER_546 VDDIO_Q ) ( mprj_pads.area1_io_pad\[12\] VDDIO_Q ) + ( FILLER_549 VDDIO_Q ) ( FILLER_763 VDDIO_Q ) + ( FILLER_548 VDDIO_Q ) ( FILLER_762 VDDIO_Q ) + ( FILLER_547 VDDIO_Q ) ( FILLER_761 VDDIO_Q ) + ( FILLER_760 VDDIO_Q ) ( FILLER_759 VDDIO_Q ) + ( FILLER_545 VDDIO_Q ) ( FILLER_758 VDDIO_Q ) + ( FILLER_757 VDDIO_Q ) ( FILLER_540 VDDIO_Q ) + ( FILLER_756 VDDIO_Q ) ( FILLER_543 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[7\] VDDIO_Q ) ( FILLER_542 VDDIO_Q ) + ( FILLER_541 VDDIO_Q ) ( mprj_pads.area1_io_pad\[11\] VDDIO_Q ) + ( FILLER_539 VDDIO_Q ) ( FILLER_754 VDDIO_Q ) + ( FILLER_753 VDDIO_Q ) ( FILLER_538 VDDIO_Q ) + ( FILLER_752 VDDIO_Q ) ( FILLER_537 VDDIO_Q ) + ( FILLER_536 VDDIO_Q ) ( FILLER_535 VDDIO_Q ) + ( FILLER_751 VDDIO_Q ) ( FILLER_750 VDDIO_Q ) + ( FILLER_747 VDDIO_Q ) ( FILLER_749 VDDIO_Q ) + ( FILLER_748 VDDIO_Q ) ( FILLER_531 VDDIO_Q ) + ( FILLER_533 VDDIO_Q ) ( mprj_pads.area2_io_pad\[8\] VDDIO_Q ) + ( FILLER_532 VDDIO_Q ) ( FILLER_743 VDDIO_Q ) + ( FILLER_530 VDDIO_Q ) ( FILLER_529 VDDIO_Q ) + ( FILLER_744 VDDIO_Q ) ( FILLER_745 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[10\] VDDIO_Q ) ( FILLER_528 VDDIO_Q ) + ( FILLER_527 VDDIO_Q ) ( FILLER_525 VDDIO_Q ) + ( FILLER_742 VDDIO_Q ) ( FILLER_526 VDDIO_Q ) + ( FILLER_740 VDDIO_Q ) ( FILLER_741 VDDIO_Q ) + ( FILLER_737 VDDIO_Q ) ( FILLER_739 VDDIO_Q ) + ( FILLER_738 VDDIO_Q ) ( FILLER_521 VDDIO_Q ) + ( FILLER_523 VDDIO_Q ) ( mprj_pads.area2_io_pad\[9\] VDDIO_Q ) + ( FILLER_522 VDDIO_Q ) ( FILLER_517 VDDIO_Q ) + ( FILLER_520 VDDIO_Q ) ( FILLER_519 VDDIO_Q ) + ( FILLER_518 VDDIO_Q ) ( mprj_pads.area1_io_pad\[9\] VDDIO_Q ) + ( FILLER_735 VDDIO_Q ) ( FILLER_734 VDDIO_Q ) + ( FILLER_515 VDDIO_Q ) ( FILLER_516 VDDIO_Q ) + ( FILLER_733 VDDIO_Q ) ( FILLER_732 VDDIO_Q ) + ( FILLER_728 VDDIO_Q ) ( FILLER_731 VDDIO_Q ) + ( FILLER_730 VDDIO_Q ) ( FILLER_729 VDDIO_Q ) + ( FILLER_513 VDDIO_Q ) ( mprj_pads.area2_io_pad\[10\] VDDIO_Q ) + ( FILLER_512 VDDIO_Q ) ( FILLER_511 VDDIO_Q ) + ( FILLER_507 VDDIO_Q ) ( FILLER_510 VDDIO_Q ) + ( FILLER_509 VDDIO_Q ) ( FILLER_508 VDDIO_Q ) + ( FILLER_726 VDDIO_Q ) ( mprj_pads.area1_io_pad\[8\] VDDIO_Q ) + ( FILLER_725 VDDIO_Q ) ( FILLER_724 VDDIO_Q ) + ( FILLER_506 VDDIO_Q ) ( FILLER_505 VDDIO_Q ) + ( FILLER_723 VDDIO_Q ) ( FILLER_722 VDDIO_Q ) + ( FILLER_721 VDDIO_Q ) ( FILLER_720 VDDIO_Q ) + ( FILLER_719 VDDIO_Q ) ( FILLER_501 VDDIO_Q ) + ( FILLER_502 VDDIO_Q ) ( FILLER_503 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[11\] VDDIO_Q ) ( FILLER_718 VDDIO_Q ) + ( FILLER_497 VDDIO_Q ) ( FILLER_500 VDDIO_Q ) + ( FILLER_499 VDDIO_Q ) ( FILLER_498 VDDIO_Q ) + ( FILLER_495 VDDIO_Q ) ( mprj_pads.area1_io_pad\[7\] VDDIO_Q ) + ( FILLER_716 VDDIO_Q ) ( FILLER_496 VDDIO_Q ) + ( FILLER_715 VDDIO_Q ) ( FILLER_714 VDDIO_Q ) + ( FILLER_492 VDDIO_Q ) ( FILLER_713 VDDIO_Q ) + ( FILLER_712 VDDIO_Q ) ( FILLER_711 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[12\] VDDIO_Q ) ( FILLER_493 VDDIO_Q ) + ( FILLER_710 VDDIO_Q ) ( FILLER_709 VDDIO_Q ) + ( FILLER_491 VDDIO_Q ) ( FILLER_488 VDDIO_Q ) + ( FILLER_490 VDDIO_Q ) ( FILLER_489 VDDIO_Q ) + ( user1_vdda_hvclamp_pad\[1\] VDDIO_Q ) ( FILLER_487 VDDIO_Q ) + ( FILLER_707 VDDIO_Q ) ( FILLER_706 VDDIO_Q ) + ( FILLER_486 VDDIO_Q ) ( FILLER_485 VDDIO_Q ) + ( FILLER_705 VDDIO_Q ) ( FILLER_704 VDDIO_Q ) + ( FILLER_703 VDDIO_Q ) ( FILLER_702 VDDIO_Q ) + ( FILLER_481 VDDIO_Q ) ( FILLER_482 VDDIO_Q ) + ( FILLER_483 VDDIO_Q ) ( user2_vdda_hvclamp_pad VDDIO_Q ) + ( FILLER_701 VDDIO_Q ) ( FILLER_700 VDDIO_Q ) + ( FILLER_478 VDDIO_Q ) ( FILLER_480 VDDIO_Q ) + ( FILLER_479 VDDIO_Q ) ( FILLER_476 VDDIO_Q ) + ( FILLER_477 VDDIO_Q ) ( FILLER_698 VDDIO_Q ) + ( user1_vssd_lvclamp_pad VDDIO_Q ) ( FILLER_697 VDDIO_Q ) + ( FILLER_475 VDDIO_Q ) ( FILLER_693 VDDIO_Q ) + ( FILLER_696 VDDIO_Q ) ( FILLER_695 VDDIO_Q ) + ( FILLER_694 VDDIO_Q ) ( FILLER_472 VDDIO_Q ) + ( FILLER_473 VDDIO_Q ) ( user2_vssd_lvclamp_pad VDDIO_Q ) + ( FILLER_692 VDDIO_Q ) ( FILLER_690 VDDIO_Q ) + ( FILLER_471 VDDIO_Q ) ( FILLER_691 VDDIO_Q ) + ( FILLER_470 VDDIO_Q ) ( FILLER_468 VDDIO_Q ) + ( FILLER_469 VDDIO_Q ) ( user1_vssa_hvclamp_pad\[1\] VDDIO_Q ) + ( FILLER_467 VDDIO_Q ) ( FILLER_466 VDDIO_Q ) + ( FILLER_688 VDDIO_Q ) ( FILLER_465 VDDIO_Q ) + ( FILLER_687 VDDIO_Q ) ( FILLER_686 VDDIO_Q ) + ( FILLER_685 VDDIO_Q ) ( FILLER_684 VDDIO_Q ) + ( FILLER_462 VDDIO_Q ) ( FILLER_463 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[13\] VDDIO_Q ) ( FILLER_683 VDDIO_Q ) + ( FILLER_682 VDDIO_Q ) ( FILLER_461 VDDIO_Q ) + ( FILLER_681 VDDIO_Q ) ( FILLER_460 VDDIO_Q ) + ( FILLER_458 VDDIO_Q ) ( FILLER_459 VDDIO_Q ) + ( FILLER_679 VDDIO_Q ) ( FILLER_457 VDDIO_Q ) + ( FILLER_456 VDDIO_Q ) ( mprj_pads.area1_io_pad\[6\] VDDIO_Q ) + ( FILLER_455 VDDIO_Q ) ( FILLER_675 VDDIO_Q ) + ( FILLER_678 VDDIO_Q ) ( FILLER_677 VDDIO_Q ) + ( FILLER_676 VDDIO_Q ) ( FILLER_453 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[14\] VDDIO_Q ) ( FILLER_674 VDDIO_Q ) + ( FILLER_671 VDDIO_Q ) ( FILLER_452 VDDIO_Q ) + ( FILLER_451 VDDIO_Q ) ( FILLER_673 VDDIO_Q ) + ( FILLER_450 VDDIO_Q ) ( FILLER_672 VDDIO_Q ) + ( FILLER_449 VDDIO_Q ) ( FILLER_448 VDDIO_Q ) + ( FILLER_446 VDDIO_Q ) ( FILLER_447 VDDIO_Q ) + ( FILLER_445 VDDIO_Q ) ( FILLER_666 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[5\] VDDIO_Q ) ( FILLER_669 VDDIO_Q ) + ( FILLER_668 VDDIO_Q ) ( FILLER_667 VDDIO_Q ) + ( FILLER_662 VDDIO_Q ) ( FILLER_443 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[15\] VDDIO_Q ) ( FILLER_442 VDDIO_Q ) + ( FILLER_665 VDDIO_Q ) ( FILLER_441 VDDIO_Q ) + ( FILLER_664 VDDIO_Q ) ( FILLER_440 VDDIO_Q ) + ( FILLER_663 VDDIO_Q ) ( FILLER_439 VDDIO_Q ) + ( FILLER_438 VDDIO_Q ) ( FILLER_436 VDDIO_Q ) + ( FILLER_437 VDDIO_Q ) ( FILLER_435 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[4\] VDDIO_Q ) ( FILLER_660 VDDIO_Q ) + ( FILLER_659 VDDIO_Q ) ( FILLER_658 VDDIO_Q ) + ( FILLER_657 VDDIO_Q ) ( FILLER_433 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[16\] VDDIO_Q ) ( FILLER_656 VDDIO_Q ) + ( FILLER_432 VDDIO_Q ) ( FILLER_431 VDDIO_Q ) + ( FILLER_655 VDDIO_Q ) ( FILLER_430 VDDIO_Q ) + ( FILLER_429 VDDIO_Q ) ( FILLER_654 VDDIO_Q ) + ( FILLER_653 VDDIO_Q ) ( FILLER_428 VDDIO_Q ) + ( FILLER_426 VDDIO_Q ) ( FILLER_427 VDDIO_Q ) + ( FILLER_425 VDDIO_Q ) ( FILLER_649 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[3\] VDDIO_Q ) ( FILLER_650 VDDIO_Q ) + ( FILLER_651 VDDIO_Q ) ( FILLER_645 VDDIO_Q ) + ( FILLER_648 VDDIO_Q ) ( FILLER_423 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[17\] VDDIO_Q ) ( FILLER_422 VDDIO_Q ) + ( FILLER_647 VDDIO_Q ) ( FILLER_421 VDDIO_Q ) + ( FILLER_646 VDDIO_Q ) ( FILLER_420 VDDIO_Q ) + ( FILLER_419 VDDIO_Q ) ( FILLER_643 VDDIO_Q ) + ( FILLER_644 VDDIO_Q ) ( FILLER_418 VDDIO_Q ) + ( FILLER_416 VDDIO_Q ) ( FILLER_417 VDDIO_Q ) + ( FILLER_415 VDDIO_Q ) ( FILLER_640 VDDIO_Q ) + ( FILLER_641 VDDIO_Q ) ( mprj_pads.area1_io_pad\[2\] VDDIO_Q ) + ( FILLER_409 VDDIO_Q ) ( FILLER_639 VDDIO_Q ) + ( FILLER_413 VDDIO_Q ) ( mprj_pads.area2_io_pad\[18\] VDDIO_Q ) + ( FILLER_412 VDDIO_Q ) ( FILLER_411 VDDIO_Q ) + ( FILLER_638 VDDIO_Q ) ( FILLER_410 VDDIO_Q ) + ( FILLER_637 VDDIO_Q ) ( FILLER_636 VDDIO_Q ) + ( FILLER_408 VDDIO_Q ) ( FILLER_634 VDDIO_Q ) + ( FILLER_635 VDDIO_Q ) ( FILLER_407 VDDIO_Q ) + ( FILLER_406 VDDIO_Q ) ( FILLER_405 VDDIO_Q ) + ( FILLER_SB2 VDDIO_Q ) ( FILLER_401 VDDIO_Q ) + ( FILLER_402 VDDIO_Q ) ( disconnect_vdda_2 VDDIO_Q ) + ( FILLER_400 VDDIO_Q ) ( FILLER_399 VDDIO_Q ) + ( FILLER_632 VDDIO_Q ) ( mprj_pads.area1_io_pad\[1\] VDDIO_Q ) + ( FILLER_631 VDDIO_Q ) ( FILLER_398 VDDIO_Q ) + ( FILLER_397 VDDIO_Q ) ( FILLER_630 VDDIO_Q ) + ( FILLER_629 VDDIO_Q ) ( FILLER_396 VDDIO_Q ) + ( FILLER_395 VDDIO_Q ) ( FILLER_628 VDDIO_Q ) + ( FILLER_627 VDDIO_Q ) ( FILLER_394 VDDIO_Q ) + ( FILLER_626 VDDIO_Q ) ( FILLER_625 VDDIO_Q ) + ( FILLER_389 VDDIO_Q ) ( FILLER_624 VDDIO_Q ) + ( FILLER_392 VDDIO_Q ) ( mgmt_vddio_hvclamp_pad\[0\] VDDIO_Q ) + ( FILLER_391 VDDIO_Q ) ( FILLER_390 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[0\] VDDIO_Q ) ( FILLER_622 VDDIO_Q ) + ( FILLER_621 VDDIO_Q ) ( FILLER_388 VDDIO_Q ) + ( FILLER_620 VDDIO_Q ) ( FILLER_387 VDDIO_Q ) + ( FILLER_619 VDDIO_Q ) ( FILLER_386 VDDIO_Q ) + ( FILLER_385 VDDIO_Q ) ( FILLER_618 VDDIO_Q ) + ( FILLER_384 VDDIO_Q ) ( FILLER_617 VDDIO_Q ) + ( FILLER_616 VDDIO_Q ) ( FILLER_615 VDDIO_Q ) + ( FILLER_612 VDDIO_Q ) ( FILLER_SB1 VDDIO_Q ) + ( disconnect_vdda_1 VDDIO_Q ) ( FILLER_611 VDDIO_Q ) + ( FILLER_382 VDDIO_Q ) ( mgmt_vccd_lvclamp_pad VDDIO_Q ) + ( FILLER_381 VDDIO_Q ) ( FILLER_380 VDDIO_Q ) + ( FILLER_379 VDDIO_Q ) ( FILLER_610 VDDIO_Q ) + ( FILLER_609 VDDIO_Q ) ( FILLER_378 VDDIO_Q ) + ( FILLER_608 VDDIO_Q ) ( FILLER_607 VDDIO_Q ) + ( FILLER_377 VDDIO_Q ) ( FILLER_606 VDDIO_Q ) + ( FILLER_376 VDDIO_Q ) ( FILLER_375 VDDIO_Q ) + ( mgmt_corner\[1\] VDDIO_Q ) ( FILLER_374 VDDIO_Q ) + ( FILLER_605 VDDIO_Q ) ( FILLER_373 VDDIO_Q ) + ( FILLER_372 VDDIO_Q ) ( FILLER_371 VDDIO_Q ) + ( FILLER_370 VDDIO_Q ) ( FILLER_369 VDDIO_Q ) + ( FILLER_368 VDDIO_Q ) ( bus_tie_72 VDDIO_Q ) + ( bus_tie_71 VDDIO_Q ) ( bus_tie_70 VDDIO_Q ) + ( bus_tie_69 VDDIO_Q ) ( bus_tie_68 VDDIO_Q ) + ( FILLER_361 VDDIO_Q ) ( bus_tie_67 VDDIO_Q ) + ( FILLER_358 VDDIO_Q ) ( FILLER_360 VDDIO_Q ) + ( FILLER_359 VDDIO_Q ) ( FILLER_357 VDDIO_Q ) + ( FILLER_353 VDDIO_Q ) ( FILLER_354 VDDIO_Q ) + ( FILLER_355 VDDIO_Q ) ( mgmt_vdda_hvclamp_pad VDDIO_Q ) + ( FILLER_351 VDDIO_Q ) ( FILLER_352 VDDIO_Q ) + ( bus_tie_65 VDDIO_Q ) ( bus_tie_66 VDDIO_Q ) + ( FILLER_343 VDDIO_Q ) ( bus_tie_64 VDDIO_Q ) + ( bus_tie_63 VDDIO_Q ) ( bus_tie_62 VDDIO_Q ) + ( FILLER_344 VDDIO_Q ) ( bus_tie_61 VDDIO_Q ) + ( FILLER_340 VDDIO_Q ) ( FILLER_342 VDDIO_Q ) + ( FILLER_341 VDDIO_Q ) ( FILLER_335 VDDIO_Q ) + ( FILLER_337 VDDIO_Q ) ( FILLER_338 VDDIO_Q ) + ( mgmt_vssio_hvclamp_pad\[0\] VDDIO_Q ) ( FILLER_336 VDDIO_Q ) + ( FILLER_334 VDDIO_Q ) ( bus_tie_58 VDDIO_Q ) + ( bus_tie_60 VDDIO_Q ) ( bus_tie_59 VDDIO_Q ) + ( bus_tie_56 VDDIO_Q ) ( bus_tie_57 VDDIO_Q ) + ( FILLER_323 VDDIO_Q ) ( FILLER_326 VDDIO_Q ) + ( FILLER_327 VDDIO_Q ) ( bus_tie_55 VDDIO_Q ) + ( FILLER_325 VDDIO_Q ) ( FILLER_324 VDDIO_Q ) + ( FILLER_317 VDDIO_Q ) ( FILLER_321 VDDIO_Q ) + ( clock_pad VDDIO_Q ) ( FILLER_319 VDDIO_Q ) + ( FILLER_320 VDDIO_Q ) ( FILLER_318 VDDIO_Q ) + ( bus_tie_54 VDDIO_Q ) ( bus_tie_53 VDDIO_Q ) + ( bus_tie_52 VDDIO_Q ) ( bus_tie_51 VDDIO_Q ) + ( bus_tie_50 VDDIO_Q ) ( FILLER_308 VDDIO_Q ) + ( FILLER_309 VDDIO_Q ) ( FILLER_310 VDDIO_Q ) + ( bus_tie_49 VDDIO_Q ) ( FILLER_307 VDDIO_Q ) + ( FILLER_306 VDDIO_Q ) ( FILLER_301 VDDIO_Q ) + ( flash_io1_pad VDDIO_Q ) ( FILLER_302 VDDIO_Q ) + ( FILLER_303 VDDIO_Q ) ( FILLER_304 VDDIO_Q ) + ( FILLER_300 VDDIO_Q ) ( bus_tie_46 VDDIO_Q ) + ( bus_tie_48 VDDIO_Q ) ( bus_tie_47 VDDIO_Q ) + ( FILLER_290 VDDIO_Q ) ( bus_tie_45 VDDIO_Q ) + ( bus_tie_44 VDDIO_Q ) ( FILLER_292 VDDIO_Q ) + ( FILLER_293 VDDIO_Q ) ( bus_tie_43 VDDIO_Q ) + ( FILLER_291 VDDIO_Q ) ( FILLER_289 VDDIO_Q ) + ( FILLER_283 VDDIO_Q ) ( FILLER_286 VDDIO_Q ) + ( FILLER_287 VDDIO_Q ) ( flash_io0_pad VDDIO_Q ) + ( FILLER_285 VDDIO_Q ) ( FILLER_284 VDDIO_Q ) + ( bus_tie_39 VDDIO_Q ) ( bus_tie_42 VDDIO_Q ) + ( bus_tie_41 VDDIO_Q ) ( bus_tie_40 VDDIO_Q ) + ( FILLER_273 VDDIO_Q ) ( bus_tie_38 VDDIO_Q ) + ( FILLER_275 VDDIO_Q ) ( FILLER_276 VDDIO_Q ) + ( bus_tie_37 VDDIO_Q ) ( FILLER_274 VDDIO_Q ) + ( FILLER_272 VDDIO_Q ) ( FILLER_266 VDDIO_Q ) + ( FILLER_269 VDDIO_Q ) ( FILLER_270 VDDIO_Q ) + ( flash_clk_pad VDDIO_Q ) ( FILLER_268 VDDIO_Q ) + ( FILLER_267 VDDIO_Q ) ( bus_tie_36 VDDIO_Q ) + ( bus_tie_35 VDDIO_Q ) ( bus_tie_34 VDDIO_Q ) + ( bus_tie_33 VDDIO_Q ) ( bus_tie_32 VDDIO_Q ) + ( FILLER_257 VDDIO_Q ) ( FILLER_258 VDDIO_Q ) + ( FILLER_259 VDDIO_Q ) ( bus_tie_31 VDDIO_Q ) + ( FILLER_256 VDDIO_Q ) ( FILLER_255 VDDIO_Q ) + ( FILLER_249 VDDIO_Q ) ( FILLER_252 VDDIO_Q ) + ( FILLER_253 VDDIO_Q ) ( flash_csb_pad VDDIO_Q ) + ( FILLER_251 VDDIO_Q ) ( FILLER_250 VDDIO_Q ) + ( bus_tie_27 VDDIO_Q ) ( bus_tie_30 VDDIO_Q ) + ( bus_tie_29 VDDIO_Q ) ( bus_tie_28 VDDIO_Q ) + ( FILLER_238 VDDIO_Q ) ( bus_tie_26 VDDIO_Q ) + ( FILLER_242 VDDIO_Q ) ( bus_tie_25 VDDIO_Q ) + ( FILLER_240 VDDIO_Q ) ( FILLER_241 VDDIO_Q ) + ( FILLER_239 VDDIO_Q ) ( FILLER_232 VDDIO_Q ) + ( FILLER_236 VDDIO_Q ) ( mgmt_vssd_lvclamp_pad VDDIO_Q ) + ( FILLER_234 VDDIO_Q ) ( FILLER_235 VDDIO_Q ) + ( FILLER_233 VDDIO_Q ) ( bus_tie_24 VDDIO_Q ) + ( bus_tie_20 VDDIO_Q ) ( bus_tie_23 VDDIO_Q ) + ( bus_tie_22 VDDIO_Q ) ( bus_tie_21 VDDIO_Q ) + ( FILLER_221 VDDIO_Q ) ( FILLER_224 VDDIO_Q ) + ( FILLER_225 VDDIO_Q ) ( bus_tie_19 VDDIO_Q ) + ( FILLER_223 VDDIO_Q ) ( FILLER_222 VDDIO_Q ) + ( FILLER_217 VDDIO_Q ) ( bus_tie_9 VDDIO_Q ) + ( FILLER_218 VDDIO_Q ) ( FILLER_219 VDDIO_Q ) + ( FILLER_215 VDDIO_Q ) ( FILLER_216 VDDIO_Q ) + ( bus_tie_17 VDDIO_Q ) ( bus_tie_18 VDDIO_Q ) + ( bus_tie_14 VDDIO_Q ) ( bus_tie_16 VDDIO_Q ) + ( bus_tie_15 VDDIO_Q ) ( FILLER_204 VDDIO_Q ) + ( FILLER_207 VDDIO_Q ) ( FILLER_208 VDDIO_Q ) + ( bus_tie_13 VDDIO_Q ) ( FILLER_206 VDDIO_Q ) + ( FILLER_205 VDDIO_Q ) ( FILLER_199 VDDIO_Q ) + ( FILLER_201 VDDIO_Q ) ( FILLER_202 VDDIO_Q ) + ( resetb_pad VDDIO_Q ) ( FILLER_200 VDDIO_Q ) + ( FILLER_198 VDDIO_Q ) ( bus_tie_12 VDDIO_Q ) + ( bus_tie_11 VDDIO_Q ) ( bus_tie_10 VDDIO_Q ) + ( bus_tie_8 VDDIO_Q ) ( bus_tie_7 VDDIO_Q ) + ( FILLER_190 VDDIO_Q ) ( FILLER_191 VDDIO_Q ) + ( bus_tie_6 VDDIO_Q ) ( FILLER_188 VDDIO_Q ) + ( FILLER_189 VDDIO_Q ) ( FILLER_187 VDDIO_Q ) + ( FILLER_182 VDDIO_Q ) ( FILLER_185 VDDIO_Q ) + ( mgmt_vssa_hvclamp_pad VDDIO_Q ) ( FILLER_183 VDDIO_Q ) + ( FILLER_184 VDDIO_Q ) ( FILLER_181 VDDIO_Q ) + ( bus_tie_4 VDDIO_Q ) ( bus_tie_5 VDDIO_Q ) + ( bus_tie_3 VDDIO_Q ) ( FILLER_171 VDDIO_Q ) + ( bus_tie_2 VDDIO_Q ) ( bus_tie_1 VDDIO_Q ) + ( FILLER_173 VDDIO_Q ) ( FILLER_174 VDDIO_Q ) + ( FILLER_172 VDDIO_Q ) ( FILLER_170 VDDIO_Q ) + ( mgmt_corner\[0\] VDDIO_Q ) ; + - gpio_pad/VSSIO_Q ( gpio_pad VSSIO_Q ) ( FILLER_167 VSSIO_Q ) + ( FILLER_168 VSSIO_Q ) ( FILLER_169 VSSIO_Q ) + ( FILLER_166 VSSIO_Q ) ( FILLER_165 VSSIO_Q ) + ( FILLER_164 VSSIO_Q ) ( FILLER_163 VSSIO_Q ) + ( FILLER_162 VSSIO_Q ) ( FILLER_161 VSSIO_Q ) + ( FILLER_160 VSSIO_Q ) ( FILLER_159 VSSIO_Q ) + ( FILLER_158 VSSIO_Q ) ( FILLER_157 VSSIO_Q ) + ( FILLER_153 VSSIO_Q ) ( mprj_pads.area1_io_pad\[15\] VSSIO_Q ) + ( FILLER_154 VSSIO_Q ) ( FILLER_155 VSSIO_Q ) + ( FILLER_149 VSSIO_Q ) ( FILLER_152 VSSIO_Q ) + ( FILLER_151 VSSIO_Q ) ( FILLER_150 VSSIO_Q ) + ( FILLER_145 VSSIO_Q ) ( FILLER_148 VSSIO_Q ) + ( FILLER_147 VSSIO_Q ) ( FILLER_146 VSSIO_Q ) + ( FILLER_144 VSSIO_Q ) ( FILLER_137 VSSIO_Q ) + ( user1_vssa_hvclamp_pad\[0\] VSSIO_Q ) ( FILLER_140 VSSIO_Q ) + ( FILLER_141 VSSIO_Q ) ( FILLER_142 VSSIO_Q ) + ( FILLER_139 VSSIO_Q ) ( FILLER_138 VSSIO_Q ) + ( FILLER_134 VSSIO_Q ) ( FILLER_136 VSSIO_Q ) + ( FILLER_135 VSSIO_Q ) ( FILLER_131 VSSIO_Q ) + ( FILLER_133 VSSIO_Q ) ( FILLER_132 VSSIO_Q ) + ( FILLER_127 VSSIO_Q ) ( FILLER_128 VSSIO_Q ) + ( FILLER_129 VSSIO_Q ) ( mprj_pads.area1_io_pad\[16\] VSSIO_Q ) + ( FILLER_123 VSSIO_Q ) ( FILLER_126 VSSIO_Q ) + ( FILLER_125 VSSIO_Q ) ( FILLER_124 VSSIO_Q ) + ( FILLER_122 VSSIO_Q ) ( FILLER_121 VSSIO_Q ) + ( FILLER_120 VSSIO_Q ) ( FILLER_119 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[17\] VSSIO_Q ) ( FILLER_118 VSSIO_Q ) + ( FILLER_116 VSSIO_Q ) ( FILLER_115 VSSIO_Q ) + ( FILLER_114 VSSIO_Q ) ( FILLER_113 VSSIO_Q ) + ( FILLER_112 VSSIO_Q ) ( FILLER_111 VSSIO_Q ) + ( FILLER_110 VSSIO_Q ) ( FILLER_109 VSSIO_Q ) + ( FILLER_108 VSSIO_Q ) ( FILLER_107 VSSIO_Q ) + ( FILLER_106 VSSIO_Q ) ( FILLER_105 VSSIO_Q ) + ( FILLER_104 VSSIO_Q ) ( FILLER_102 VSSIO_Q ) + ( FILLER_103 VSSIO_Q ) ( FILLER_98 VSSIO_Q ) + ( FILLER_101 VSSIO_Q ) ( FILLER_100 VSSIO_Q ) + ( FILLER_99 VSSIO_Q ) ( FILLER_94 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[18\] VSSIO_Q ) ( FILLER_95 VSSIO_Q ) + ( FILLER_96 VSSIO_Q ) ( FILLER_93 VSSIO_Q ) + ( FILLER_92 VSSIO_Q ) ( FILLER_91 VSSIO_Q ) + ( FILLER_90 VSSIO_Q ) ( FILLER_89 VSSIO_Q ) + ( FILLER_88 VSSIO_Q ) ( FILLER_86 VSSIO_Q ) + ( FILLER_87 VSSIO_Q ) ( FILLER_SB3 VSSIO_Q ) + ( disconnect_vdda_0 VSSIO_Q ) ( FILLER_78 VSSIO_Q ) + ( mgmt_vssio_hvclamp_pad\[1\] VSSIO_Q ) ( FILLER_80 VSSIO_Q ) + ( FILLER_81 VSSIO_Q ) ( FILLER_82 VSSIO_Q ) + ( FILLER_79 VSSIO_Q ) ( FILLER_75 VSSIO_Q ) + ( FILLER_77 VSSIO_Q ) ( FILLER_76 VSSIO_Q ) + ( FILLER_71 VSSIO_Q ) ( FILLER_74 VSSIO_Q ) + ( FILLER_73 VSSIO_Q ) ( FILLER_72 VSSIO_Q ) + ( FILLER_63 VSSIO_Q ) ( FILLER_68 VSSIO_Q ) + ( FILLER_69 VSSIO_Q ) ( mprj_pads.area2_io_pad\[0\] VSSIO_Q ) + ( FILLER_66 VSSIO_Q ) ( FILLER_67 VSSIO_Q ) + ( FILLER_65 VSSIO_Q ) ( FILLER_64 VSSIO_Q ) + ( FILLER_59 VSSIO_Q ) ( FILLER_62 VSSIO_Q ) + ( FILLER_61 VSSIO_Q ) ( FILLER_60 VSSIO_Q ) + ( FILLER_57 VSSIO_Q ) ( FILLER_58 VSSIO_Q ) + ( FILLER_53 VSSIO_Q ) ( FILLER_54 VSSIO_Q ) + ( FILLER_55 VSSIO_Q ) ( mprj_pads.area2_io_pad\[1\] VSSIO_Q ) + ( FILLER_48 VSSIO_Q ) ( FILLER_52 VSSIO_Q ) + ( FILLER_51 VSSIO_Q ) ( FILLER_50 VSSIO_Q ) + ( FILLER_49 VSSIO_Q ) ( FILLER_46 VSSIO_Q ) + ( FILLER_47 VSSIO_Q ) ( FILLER_44 VSSIO_Q ) + ( FILLER_45 VSSIO_Q ) ( FILLER_38 VSSIO_Q ) + ( FILLER_41 VSSIO_Q ) ( FILLER_42 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[2\] VSSIO_Q ) ( FILLER_40 VSSIO_Q ) + ( FILLER_39 VSSIO_Q ) ( FILLER_35 VSSIO_Q ) + ( FILLER_37 VSSIO_Q ) ( FILLER_36 VSSIO_Q ) + ( FILLER_31 VSSIO_Q ) ( FILLER_34 VSSIO_Q ) + ( FILLER_33 VSSIO_Q ) ( FILLER_32 VSSIO_Q ) + ( FILLER_28 VSSIO_Q ) ( mprj_pads.area2_io_pad\[3\] VSSIO_Q ) + ( FILLER_29 VSSIO_Q ) ( FILLER_26 VSSIO_Q ) + ( FILLER_27 VSSIO_Q ) ( FILLER_25 VSSIO_Q ) + ( FILLER_24 VSSIO_Q ) ( FILLER_23 VSSIO_Q ) + ( FILLER_22 VSSIO_Q ) ( FILLER_21 VSSIO_Q ) + ( FILLER_20 VSSIO_Q ) ( FILLER_19 VSSIO_Q ) + ( FILLER_18 VSSIO_Q ) ( FILLER_14 VSSIO_Q ) + ( FILLER_15 VSSIO_Q ) ( FILLER_16 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[4\] VSSIO_Q ) ( FILLER_10 VSSIO_Q ) + ( FILLER_13 VSSIO_Q ) ( FILLER_12 VSSIO_Q ) + ( FILLER_11 VSSIO_Q ) ( FILLER_6 VSSIO_Q ) ( FILLER_9 VSSIO_Q ) + ( FILLER_8 VSSIO_Q ) ( FILLER_7 VSSIO_Q ) ( FILLER_5 VSSIO_Q ) + ( user2_corner VSSIO_Q ) ( user1_corner VSSIO_Q ) + ( FILLER_603 VSSIO_Q ) ( FILLER_604 VSSIO_Q ) + ( FILLER_601 VSSIO_Q ) ( FILLER_810 VSSIO_Q ) + ( FILLER_811 VSSIO_Q ) ( FILLER_602 VSSIO_Q ) + ( FILLER_809 VSSIO_Q ) ( FILLER_596 VSSIO_Q ) + ( FILLER_600 VSSIO_Q ) ( FILLER_808 VSSIO_Q ) + ( FILLER_599 VSSIO_Q ) ( FILLER_807 VSSIO_Q ) + ( FILLER_598 VSSIO_Q ) ( FILLER_806 VSSIO_Q ) + ( FILLER_597 VSSIO_Q ) ( FILLER_805 VSSIO_Q ) + ( FILLER_804 VSSIO_Q ) ( FILLER_595 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[14\] VSSIO_Q ) ( FILLER_803 VSSIO_Q ) + ( FILLER_593 VSSIO_Q ) ( mprj_pads.area2_io_pad\[5\] VSSIO_Q ) + ( FILLER_592 VSSIO_Q ) ( FILLER_801 VSSIO_Q ) + ( FILLER_591 VSSIO_Q ) ( FILLER_800 VSSIO_Q ) + ( FILLER_590 VSSIO_Q ) ( FILLER_799 VSSIO_Q ) + ( FILLER_798 VSSIO_Q ) ( FILLER_589 VSSIO_Q ) + ( FILLER_797 VSSIO_Q ) ( FILLER_588 VSSIO_Q ) + ( FILLER_796 VSSIO_Q ) ( FILLER_587 VSSIO_Q ) + ( FILLER_586 VSSIO_Q ) ( FILLER_585 VSSIO_Q ) + ( FILLER_794 VSSIO_Q ) ( FILLER_795 VSSIO_Q ) + ( FILLER_791 VSSIO_Q ) ( FILLER_583 VSSIO_Q ) + ( user2_vccd_lvclamp_pad VSSIO_Q ) ( FILLER_582 VSSIO_Q ) + ( FILLER_581 VSSIO_Q ) ( FILLER_792 VSSIO_Q ) + ( user1_vccd_lvclamp_pad VSSIO_Q ) ( FILLER_580 VSSIO_Q ) + ( FILLER_576 VSSIO_Q ) ( FILLER_790 VSSIO_Q ) + ( FILLER_579 VSSIO_Q ) ( FILLER_789 VSSIO_Q ) + ( FILLER_578 VSSIO_Q ) ( FILLER_788 VSSIO_Q ) + ( FILLER_577 VSSIO_Q ) ( FILLER_787 VSSIO_Q ) + ( FILLER_786 VSSIO_Q ) ( FILLER_575 VSSIO_Q ) + ( FILLER_785 VSSIO_Q ) ( FILLER_570 VSSIO_Q ) + ( FILLER_784 VSSIO_Q ) ( FILLER_573 VSSIO_Q ) + ( mgmt_vddio_hvclamp_pad\[1\] VSSIO_Q ) ( FILLER_572 VSSIO_Q ) + ( FILLER_571 VSSIO_Q ) ( mprj_pads.area1_io_pad\[13\] VSSIO_Q ) + ( FILLER_782 VSSIO_Q ) ( FILLER_781 VSSIO_Q ) + ( FILLER_569 VSSIO_Q ) ( FILLER_780 VSSIO_Q ) + ( FILLER_568 VSSIO_Q ) ( FILLER_779 VSSIO_Q ) + ( FILLER_567 VSSIO_Q ) ( FILLER_566 VSSIO_Q ) + ( FILLER_778 VSSIO_Q ) ( FILLER_565 VSSIO_Q ) + ( FILLER_777 VSSIO_Q ) ( FILLER_776 VSSIO_Q ) + ( FILLER_560 VSSIO_Q ) ( FILLER_775 VSSIO_Q ) + ( user2_vssa_hvclamp_pad VSSIO_Q ) ( FILLER_562 VSSIO_Q ) + ( FILLER_563 VSSIO_Q ) ( FILLER_561 VSSIO_Q ) + ( user1_vdda_hvclamp_pad\[0\] VSSIO_Q ) ( FILLER_773 VSSIO_Q ) + ( FILLER_772 VSSIO_Q ) ( FILLER_771 VSSIO_Q ) + ( FILLER_559 VSSIO_Q ) ( FILLER_770 VSSIO_Q ) + ( FILLER_558 VSSIO_Q ) ( FILLER_769 VSSIO_Q ) + ( FILLER_557 VSSIO_Q ) ( FILLER_556 VSSIO_Q ) + ( FILLER_555 VSSIO_Q ) ( FILLER_768 VSSIO_Q ) + ( FILLER_766 VSSIO_Q ) ( FILLER_767 VSSIO_Q ) + ( FILLER_765 VSSIO_Q ) ( FILLER_550 VSSIO_Q ) + ( FILLER_553 VSSIO_Q ) ( mprj_pads.area2_io_pad\[6\] VSSIO_Q ) + ( FILLER_552 VSSIO_Q ) ( FILLER_551 VSSIO_Q ) + ( FILLER_546 VSSIO_Q ) ( mprj_pads.area1_io_pad\[12\] VSSIO_Q ) + ( FILLER_549 VSSIO_Q ) ( FILLER_763 VSSIO_Q ) + ( FILLER_548 VSSIO_Q ) ( FILLER_762 VSSIO_Q ) + ( FILLER_547 VSSIO_Q ) ( FILLER_761 VSSIO_Q ) + ( FILLER_760 VSSIO_Q ) ( FILLER_759 VSSIO_Q ) + ( FILLER_545 VSSIO_Q ) ( FILLER_758 VSSIO_Q ) + ( FILLER_757 VSSIO_Q ) ( FILLER_540 VSSIO_Q ) + ( FILLER_756 VSSIO_Q ) ( FILLER_543 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[7\] VSSIO_Q ) ( FILLER_542 VSSIO_Q ) + ( FILLER_541 VSSIO_Q ) ( mprj_pads.area1_io_pad\[11\] VSSIO_Q ) + ( FILLER_539 VSSIO_Q ) ( FILLER_754 VSSIO_Q ) + ( FILLER_753 VSSIO_Q ) ( FILLER_538 VSSIO_Q ) + ( FILLER_752 VSSIO_Q ) ( FILLER_537 VSSIO_Q ) + ( FILLER_536 VSSIO_Q ) ( FILLER_535 VSSIO_Q ) + ( FILLER_751 VSSIO_Q ) ( FILLER_750 VSSIO_Q ) + ( FILLER_747 VSSIO_Q ) ( FILLER_749 VSSIO_Q ) + ( FILLER_748 VSSIO_Q ) ( FILLER_531 VSSIO_Q ) + ( FILLER_533 VSSIO_Q ) ( mprj_pads.area2_io_pad\[8\] VSSIO_Q ) + ( FILLER_532 VSSIO_Q ) ( FILLER_743 VSSIO_Q ) + ( FILLER_530 VSSIO_Q ) ( FILLER_529 VSSIO_Q ) + ( FILLER_744 VSSIO_Q ) ( FILLER_745 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[10\] VSSIO_Q ) ( FILLER_528 VSSIO_Q ) + ( FILLER_527 VSSIO_Q ) ( FILLER_525 VSSIO_Q ) + ( FILLER_742 VSSIO_Q ) ( FILLER_526 VSSIO_Q ) + ( FILLER_740 VSSIO_Q ) ( FILLER_741 VSSIO_Q ) + ( FILLER_737 VSSIO_Q ) ( FILLER_739 VSSIO_Q ) + ( FILLER_738 VSSIO_Q ) ( FILLER_521 VSSIO_Q ) + ( FILLER_523 VSSIO_Q ) ( mprj_pads.area2_io_pad\[9\] VSSIO_Q ) + ( FILLER_522 VSSIO_Q ) ( FILLER_517 VSSIO_Q ) + ( FILLER_520 VSSIO_Q ) ( FILLER_519 VSSIO_Q ) + ( FILLER_518 VSSIO_Q ) ( mprj_pads.area1_io_pad\[9\] VSSIO_Q ) + ( FILLER_735 VSSIO_Q ) ( FILLER_734 VSSIO_Q ) + ( FILLER_515 VSSIO_Q ) ( FILLER_516 VSSIO_Q ) + ( FILLER_733 VSSIO_Q ) ( FILLER_732 VSSIO_Q ) + ( FILLER_728 VSSIO_Q ) ( FILLER_731 VSSIO_Q ) + ( FILLER_730 VSSIO_Q ) ( FILLER_729 VSSIO_Q ) + ( FILLER_513 VSSIO_Q ) ( mprj_pads.area2_io_pad\[10\] VSSIO_Q ) + ( FILLER_512 VSSIO_Q ) ( FILLER_511 VSSIO_Q ) + ( FILLER_507 VSSIO_Q ) ( FILLER_510 VSSIO_Q ) + ( FILLER_509 VSSIO_Q ) ( FILLER_508 VSSIO_Q ) + ( FILLER_726 VSSIO_Q ) ( mprj_pads.area1_io_pad\[8\] VSSIO_Q ) + ( FILLER_725 VSSIO_Q ) ( FILLER_724 VSSIO_Q ) + ( FILLER_506 VSSIO_Q ) ( FILLER_505 VSSIO_Q ) + ( FILLER_723 VSSIO_Q ) ( FILLER_722 VSSIO_Q ) + ( FILLER_721 VSSIO_Q ) ( FILLER_720 VSSIO_Q ) + ( FILLER_719 VSSIO_Q ) ( FILLER_501 VSSIO_Q ) + ( FILLER_502 VSSIO_Q ) ( FILLER_503 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[11\] VSSIO_Q ) ( FILLER_718 VSSIO_Q ) + ( FILLER_497 VSSIO_Q ) ( FILLER_500 VSSIO_Q ) + ( FILLER_499 VSSIO_Q ) ( FILLER_498 VSSIO_Q ) + ( FILLER_495 VSSIO_Q ) ( mprj_pads.area1_io_pad\[7\] VSSIO_Q ) + ( FILLER_716 VSSIO_Q ) ( FILLER_496 VSSIO_Q ) + ( FILLER_715 VSSIO_Q ) ( FILLER_714 VSSIO_Q ) + ( FILLER_492 VSSIO_Q ) ( FILLER_713 VSSIO_Q ) + ( FILLER_712 VSSIO_Q ) ( FILLER_711 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[12\] VSSIO_Q ) ( FILLER_493 VSSIO_Q ) + ( FILLER_710 VSSIO_Q ) ( FILLER_709 VSSIO_Q ) + ( FILLER_491 VSSIO_Q ) ( FILLER_488 VSSIO_Q ) + ( FILLER_490 VSSIO_Q ) ( FILLER_489 VSSIO_Q ) + ( user1_vdda_hvclamp_pad\[1\] VSSIO_Q ) ( FILLER_487 VSSIO_Q ) + ( FILLER_707 VSSIO_Q ) ( FILLER_706 VSSIO_Q ) + ( FILLER_486 VSSIO_Q ) ( FILLER_485 VSSIO_Q ) + ( FILLER_705 VSSIO_Q ) ( FILLER_704 VSSIO_Q ) + ( FILLER_703 VSSIO_Q ) ( FILLER_702 VSSIO_Q ) + ( FILLER_481 VSSIO_Q ) ( FILLER_482 VSSIO_Q ) + ( FILLER_483 VSSIO_Q ) ( user2_vdda_hvclamp_pad VSSIO_Q ) + ( FILLER_701 VSSIO_Q ) ( FILLER_700 VSSIO_Q ) + ( FILLER_478 VSSIO_Q ) ( FILLER_480 VSSIO_Q ) + ( FILLER_479 VSSIO_Q ) ( FILLER_476 VSSIO_Q ) + ( FILLER_477 VSSIO_Q ) ( FILLER_698 VSSIO_Q ) + ( user1_vssd_lvclamp_pad VSSIO_Q ) ( FILLER_697 VSSIO_Q ) + ( FILLER_475 VSSIO_Q ) ( FILLER_693 VSSIO_Q ) + ( FILLER_696 VSSIO_Q ) ( FILLER_695 VSSIO_Q ) + ( FILLER_694 VSSIO_Q ) ( FILLER_472 VSSIO_Q ) + ( FILLER_473 VSSIO_Q ) ( user2_vssd_lvclamp_pad VSSIO_Q ) + ( FILLER_692 VSSIO_Q ) ( FILLER_690 VSSIO_Q ) + ( FILLER_471 VSSIO_Q ) ( FILLER_691 VSSIO_Q ) + ( FILLER_470 VSSIO_Q ) ( FILLER_468 VSSIO_Q ) + ( FILLER_469 VSSIO_Q ) ( user1_vssa_hvclamp_pad\[1\] VSSIO_Q ) + ( FILLER_467 VSSIO_Q ) ( FILLER_466 VSSIO_Q ) + ( FILLER_688 VSSIO_Q ) ( FILLER_465 VSSIO_Q ) + ( FILLER_687 VSSIO_Q ) ( FILLER_686 VSSIO_Q ) + ( FILLER_685 VSSIO_Q ) ( FILLER_684 VSSIO_Q ) + ( FILLER_462 VSSIO_Q ) ( FILLER_463 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[13\] VSSIO_Q ) ( FILLER_683 VSSIO_Q ) + ( FILLER_682 VSSIO_Q ) ( FILLER_461 VSSIO_Q ) + ( FILLER_681 VSSIO_Q ) ( FILLER_460 VSSIO_Q ) + ( FILLER_458 VSSIO_Q ) ( FILLER_459 VSSIO_Q ) + ( FILLER_679 VSSIO_Q ) ( FILLER_457 VSSIO_Q ) + ( FILLER_456 VSSIO_Q ) ( mprj_pads.area1_io_pad\[6\] VSSIO_Q ) + ( FILLER_455 VSSIO_Q ) ( FILLER_675 VSSIO_Q ) + ( FILLER_678 VSSIO_Q ) ( FILLER_677 VSSIO_Q ) + ( FILLER_676 VSSIO_Q ) ( FILLER_453 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[14\] VSSIO_Q ) ( FILLER_674 VSSIO_Q ) + ( FILLER_671 VSSIO_Q ) ( FILLER_452 VSSIO_Q ) + ( FILLER_451 VSSIO_Q ) ( FILLER_673 VSSIO_Q ) + ( FILLER_450 VSSIO_Q ) ( FILLER_672 VSSIO_Q ) + ( FILLER_449 VSSIO_Q ) ( FILLER_448 VSSIO_Q ) + ( FILLER_446 VSSIO_Q ) ( FILLER_447 VSSIO_Q ) + ( FILLER_445 VSSIO_Q ) ( FILLER_666 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[5\] VSSIO_Q ) ( FILLER_669 VSSIO_Q ) + ( FILLER_668 VSSIO_Q ) ( FILLER_667 VSSIO_Q ) + ( FILLER_662 VSSIO_Q ) ( FILLER_443 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[15\] VSSIO_Q ) ( FILLER_442 VSSIO_Q ) + ( FILLER_665 VSSIO_Q ) ( FILLER_441 VSSIO_Q ) + ( FILLER_664 VSSIO_Q ) ( FILLER_440 VSSIO_Q ) + ( FILLER_663 VSSIO_Q ) ( FILLER_439 VSSIO_Q ) + ( FILLER_438 VSSIO_Q ) ( FILLER_436 VSSIO_Q ) + ( FILLER_437 VSSIO_Q ) ( FILLER_435 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[4\] VSSIO_Q ) ( FILLER_660 VSSIO_Q ) + ( FILLER_659 VSSIO_Q ) ( FILLER_658 VSSIO_Q ) + ( FILLER_657 VSSIO_Q ) ( FILLER_433 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[16\] VSSIO_Q ) ( FILLER_656 VSSIO_Q ) + ( FILLER_432 VSSIO_Q ) ( FILLER_431 VSSIO_Q ) + ( FILLER_655 VSSIO_Q ) ( FILLER_430 VSSIO_Q ) + ( FILLER_429 VSSIO_Q ) ( FILLER_654 VSSIO_Q ) + ( FILLER_653 VSSIO_Q ) ( FILLER_428 VSSIO_Q ) + ( FILLER_426 VSSIO_Q ) ( FILLER_427 VSSIO_Q ) + ( FILLER_425 VSSIO_Q ) ( FILLER_649 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[3\] VSSIO_Q ) ( FILLER_650 VSSIO_Q ) + ( FILLER_651 VSSIO_Q ) ( FILLER_645 VSSIO_Q ) + ( FILLER_648 VSSIO_Q ) ( FILLER_423 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[17\] VSSIO_Q ) ( FILLER_422 VSSIO_Q ) + ( FILLER_647 VSSIO_Q ) ( FILLER_421 VSSIO_Q ) + ( FILLER_646 VSSIO_Q ) ( FILLER_420 VSSIO_Q ) + ( FILLER_419 VSSIO_Q ) ( FILLER_643 VSSIO_Q ) + ( FILLER_644 VSSIO_Q ) ( FILLER_418 VSSIO_Q ) + ( FILLER_416 VSSIO_Q ) ( FILLER_417 VSSIO_Q ) + ( FILLER_415 VSSIO_Q ) ( FILLER_640 VSSIO_Q ) + ( FILLER_641 VSSIO_Q ) ( mprj_pads.area1_io_pad\[2\] VSSIO_Q ) + ( FILLER_409 VSSIO_Q ) ( FILLER_639 VSSIO_Q ) + ( FILLER_413 VSSIO_Q ) ( mprj_pads.area2_io_pad\[18\] VSSIO_Q ) + ( FILLER_412 VSSIO_Q ) ( FILLER_411 VSSIO_Q ) + ( FILLER_638 VSSIO_Q ) ( FILLER_410 VSSIO_Q ) + ( FILLER_637 VSSIO_Q ) ( FILLER_636 VSSIO_Q ) + ( FILLER_408 VSSIO_Q ) ( FILLER_634 VSSIO_Q ) + ( FILLER_635 VSSIO_Q ) ( FILLER_407 VSSIO_Q ) + ( FILLER_406 VSSIO_Q ) ( FILLER_405 VSSIO_Q ) + ( FILLER_SB2 VSSIO_Q ) ( FILLER_401 VSSIO_Q ) + ( FILLER_402 VSSIO_Q ) ( disconnect_vdda_2 VSSIO_Q ) + ( FILLER_400 VSSIO_Q ) ( FILLER_399 VSSIO_Q ) + ( FILLER_632 VSSIO_Q ) ( mprj_pads.area1_io_pad\[1\] VSSIO_Q ) + ( FILLER_631 VSSIO_Q ) ( FILLER_398 VSSIO_Q ) + ( FILLER_397 VSSIO_Q ) ( FILLER_630 VSSIO_Q ) + ( FILLER_629 VSSIO_Q ) ( FILLER_396 VSSIO_Q ) + ( FILLER_395 VSSIO_Q ) ( FILLER_628 VSSIO_Q ) + ( FILLER_627 VSSIO_Q ) ( FILLER_394 VSSIO_Q ) + ( FILLER_626 VSSIO_Q ) ( FILLER_625 VSSIO_Q ) + ( FILLER_389 VSSIO_Q ) ( FILLER_624 VSSIO_Q ) + ( FILLER_392 VSSIO_Q ) ( mgmt_vddio_hvclamp_pad\[0\] VSSIO_Q ) + ( FILLER_391 VSSIO_Q ) ( FILLER_390 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[0\] VSSIO_Q ) ( FILLER_622 VSSIO_Q ) + ( FILLER_621 VSSIO_Q ) ( FILLER_388 VSSIO_Q ) + ( FILLER_620 VSSIO_Q ) ( FILLER_387 VSSIO_Q ) + ( FILLER_619 VSSIO_Q ) ( FILLER_386 VSSIO_Q ) + ( FILLER_385 VSSIO_Q ) ( FILLER_618 VSSIO_Q ) + ( FILLER_384 VSSIO_Q ) ( FILLER_617 VSSIO_Q ) + ( FILLER_616 VSSIO_Q ) ( FILLER_615 VSSIO_Q ) + ( FILLER_612 VSSIO_Q ) ( FILLER_SB1 VSSIO_Q ) + ( disconnect_vdda_1 VSSIO_Q ) ( FILLER_611 VSSIO_Q ) + ( FILLER_382 VSSIO_Q ) ( mgmt_vccd_lvclamp_pad VSSIO_Q ) + ( FILLER_381 VSSIO_Q ) ( FILLER_380 VSSIO_Q ) + ( FILLER_379 VSSIO_Q ) ( FILLER_610 VSSIO_Q ) + ( FILLER_609 VSSIO_Q ) ( FILLER_378 VSSIO_Q ) + ( FILLER_608 VSSIO_Q ) ( FILLER_607 VSSIO_Q ) + ( FILLER_377 VSSIO_Q ) ( FILLER_606 VSSIO_Q ) + ( FILLER_376 VSSIO_Q ) ( FILLER_375 VSSIO_Q ) + ( mgmt_corner\[1\] VSSIO_Q ) ( FILLER_374 VSSIO_Q ) + ( FILLER_605 VSSIO_Q ) ( FILLER_373 VSSIO_Q ) + ( FILLER_372 VSSIO_Q ) ( FILLER_371 VSSIO_Q ) + ( FILLER_370 VSSIO_Q ) ( FILLER_369 VSSIO_Q ) + ( FILLER_368 VSSIO_Q ) ( bus_tie_72 VSSIO_Q ) + ( bus_tie_71 VSSIO_Q ) ( bus_tie_70 VSSIO_Q ) + ( bus_tie_69 VSSIO_Q ) ( bus_tie_68 VSSIO_Q ) + ( FILLER_361 VSSIO_Q ) ( bus_tie_67 VSSIO_Q ) + ( FILLER_358 VSSIO_Q ) ( FILLER_360 VSSIO_Q ) + ( FILLER_359 VSSIO_Q ) ( FILLER_357 VSSIO_Q ) + ( FILLER_353 VSSIO_Q ) ( FILLER_354 VSSIO_Q ) + ( FILLER_355 VSSIO_Q ) ( mgmt_vdda_hvclamp_pad VSSIO_Q ) + ( FILLER_351 VSSIO_Q ) ( FILLER_352 VSSIO_Q ) + ( bus_tie_65 VSSIO_Q ) ( bus_tie_66 VSSIO_Q ) + ( FILLER_343 VSSIO_Q ) ( bus_tie_64 VSSIO_Q ) + ( bus_tie_63 VSSIO_Q ) ( bus_tie_62 VSSIO_Q ) + ( FILLER_344 VSSIO_Q ) ( bus_tie_61 VSSIO_Q ) + ( FILLER_340 VSSIO_Q ) ( FILLER_342 VSSIO_Q ) + ( FILLER_341 VSSIO_Q ) ( FILLER_335 VSSIO_Q ) + ( FILLER_337 VSSIO_Q ) ( FILLER_338 VSSIO_Q ) + ( mgmt_vssio_hvclamp_pad\[0\] VSSIO_Q ) ( FILLER_336 VSSIO_Q ) + ( FILLER_334 VSSIO_Q ) ( bus_tie_58 VSSIO_Q ) + ( bus_tie_60 VSSIO_Q ) ( bus_tie_59 VSSIO_Q ) + ( bus_tie_56 VSSIO_Q ) ( bus_tie_57 VSSIO_Q ) + ( FILLER_323 VSSIO_Q ) ( FILLER_326 VSSIO_Q ) + ( FILLER_327 VSSIO_Q ) ( bus_tie_55 VSSIO_Q ) + ( FILLER_325 VSSIO_Q ) ( FILLER_324 VSSIO_Q ) + ( FILLER_317 VSSIO_Q ) ( FILLER_321 VSSIO_Q ) + ( clock_pad VSSIO_Q ) ( FILLER_319 VSSIO_Q ) + ( FILLER_320 VSSIO_Q ) ( FILLER_318 VSSIO_Q ) + ( bus_tie_54 VSSIO_Q ) ( bus_tie_53 VSSIO_Q ) + ( bus_tie_52 VSSIO_Q ) ( bus_tie_51 VSSIO_Q ) + ( bus_tie_50 VSSIO_Q ) ( FILLER_308 VSSIO_Q ) + ( FILLER_309 VSSIO_Q ) ( FILLER_310 VSSIO_Q ) + ( bus_tie_49 VSSIO_Q ) ( FILLER_307 VSSIO_Q ) + ( FILLER_306 VSSIO_Q ) ( FILLER_301 VSSIO_Q ) + ( flash_io1_pad VSSIO_Q ) ( FILLER_302 VSSIO_Q ) + ( FILLER_303 VSSIO_Q ) ( FILLER_304 VSSIO_Q ) + ( FILLER_300 VSSIO_Q ) ( bus_tie_46 VSSIO_Q ) + ( bus_tie_48 VSSIO_Q ) ( bus_tie_47 VSSIO_Q ) + ( FILLER_290 VSSIO_Q ) ( bus_tie_45 VSSIO_Q ) + ( bus_tie_44 VSSIO_Q ) ( FILLER_292 VSSIO_Q ) + ( FILLER_293 VSSIO_Q ) ( bus_tie_43 VSSIO_Q ) + ( FILLER_291 VSSIO_Q ) ( FILLER_289 VSSIO_Q ) + ( FILLER_283 VSSIO_Q ) ( FILLER_286 VSSIO_Q ) + ( FILLER_287 VSSIO_Q ) ( flash_io0_pad VSSIO_Q ) + ( FILLER_285 VSSIO_Q ) ( FILLER_284 VSSIO_Q ) + ( bus_tie_39 VSSIO_Q ) ( bus_tie_42 VSSIO_Q ) + ( bus_tie_41 VSSIO_Q ) ( bus_tie_40 VSSIO_Q ) + ( FILLER_273 VSSIO_Q ) ( bus_tie_38 VSSIO_Q ) + ( FILLER_275 VSSIO_Q ) ( FILLER_276 VSSIO_Q ) + ( bus_tie_37 VSSIO_Q ) ( FILLER_274 VSSIO_Q ) + ( FILLER_272 VSSIO_Q ) ( FILLER_266 VSSIO_Q ) + ( FILLER_269 VSSIO_Q ) ( FILLER_270 VSSIO_Q ) + ( flash_clk_pad VSSIO_Q ) ( FILLER_268 VSSIO_Q ) + ( FILLER_267 VSSIO_Q ) ( bus_tie_36 VSSIO_Q ) + ( bus_tie_35 VSSIO_Q ) ( bus_tie_34 VSSIO_Q ) + ( bus_tie_33 VSSIO_Q ) ( bus_tie_32 VSSIO_Q ) + ( FILLER_257 VSSIO_Q ) ( FILLER_258 VSSIO_Q ) + ( FILLER_259 VSSIO_Q ) ( bus_tie_31 VSSIO_Q ) + ( FILLER_256 VSSIO_Q ) ( FILLER_255 VSSIO_Q ) + ( FILLER_249 VSSIO_Q ) ( FILLER_252 VSSIO_Q ) + ( FILLER_253 VSSIO_Q ) ( flash_csb_pad VSSIO_Q ) + ( FILLER_251 VSSIO_Q ) ( FILLER_250 VSSIO_Q ) + ( bus_tie_27 VSSIO_Q ) ( bus_tie_30 VSSIO_Q ) + ( bus_tie_29 VSSIO_Q ) ( bus_tie_28 VSSIO_Q ) + ( FILLER_238 VSSIO_Q ) ( bus_tie_26 VSSIO_Q ) + ( FILLER_242 VSSIO_Q ) ( bus_tie_25 VSSIO_Q ) + ( FILLER_240 VSSIO_Q ) ( FILLER_241 VSSIO_Q ) + ( FILLER_239 VSSIO_Q ) ( FILLER_232 VSSIO_Q ) + ( FILLER_236 VSSIO_Q ) ( mgmt_vssd_lvclamp_pad VSSIO_Q ) + ( FILLER_234 VSSIO_Q ) ( FILLER_235 VSSIO_Q ) + ( FILLER_233 VSSIO_Q ) ( bus_tie_24 VSSIO_Q ) + ( bus_tie_20 VSSIO_Q ) ( bus_tie_23 VSSIO_Q ) + ( bus_tie_22 VSSIO_Q ) ( bus_tie_21 VSSIO_Q ) + ( FILLER_221 VSSIO_Q ) ( FILLER_224 VSSIO_Q ) + ( FILLER_225 VSSIO_Q ) ( bus_tie_19 VSSIO_Q ) + ( FILLER_223 VSSIO_Q ) ( FILLER_222 VSSIO_Q ) + ( FILLER_217 VSSIO_Q ) ( bus_tie_9 VSSIO_Q ) + ( FILLER_218 VSSIO_Q ) ( FILLER_219 VSSIO_Q ) + ( FILLER_215 VSSIO_Q ) ( FILLER_216 VSSIO_Q ) + ( bus_tie_17 VSSIO_Q ) ( bus_tie_18 VSSIO_Q ) + ( bus_tie_14 VSSIO_Q ) ( bus_tie_16 VSSIO_Q ) + ( bus_tie_15 VSSIO_Q ) ( FILLER_204 VSSIO_Q ) + ( FILLER_207 VSSIO_Q ) ( FILLER_208 VSSIO_Q ) + ( bus_tie_13 VSSIO_Q ) ( FILLER_206 VSSIO_Q ) + ( FILLER_205 VSSIO_Q ) ( FILLER_199 VSSIO_Q ) + ( FILLER_201 VSSIO_Q ) ( FILLER_202 VSSIO_Q ) + ( resetb_pad VSSIO_Q ) ( FILLER_200 VSSIO_Q ) + ( FILLER_198 VSSIO_Q ) ( bus_tie_12 VSSIO_Q ) + ( bus_tie_11 VSSIO_Q ) ( bus_tie_10 VSSIO_Q ) + ( bus_tie_8 VSSIO_Q ) ( bus_tie_7 VSSIO_Q ) + ( FILLER_190 VSSIO_Q ) ( FILLER_191 VSSIO_Q ) + ( bus_tie_6 VSSIO_Q ) ( FILLER_188 VSSIO_Q ) + ( FILLER_189 VSSIO_Q ) ( FILLER_187 VSSIO_Q ) + ( FILLER_182 VSSIO_Q ) ( FILLER_185 VSSIO_Q ) + ( mgmt_vssa_hvclamp_pad VSSIO_Q ) ( FILLER_183 VSSIO_Q ) + ( FILLER_184 VSSIO_Q ) ( FILLER_181 VSSIO_Q ) + ( bus_tie_4 VSSIO_Q ) ( bus_tie_5 VSSIO_Q ) + ( bus_tie_3 VSSIO_Q ) ( FILLER_171 VSSIO_Q ) + ( bus_tie_2 VSSIO_Q ) ( bus_tie_1 VSSIO_Q ) + ( FILLER_173 VSSIO_Q ) ( FILLER_174 VSSIO_Q ) + ( FILLER_172 VSSIO_Q ) ( FILLER_170 VSSIO_Q ) + ( mgmt_corner\[0\] VSSIO_Q ) ; + - gpio_pad/VSSA ( gpio_pad VSSA ) ( FILLER_401 VSSA ) + ( FILLER_402 VSSA ) ( FILLER_400 VSSA ) ( FILLER_399 VSSA ) + ( FILLER_398 VSSA ) ( FILLER_397 VSSA ) ( FILLER_396 VSSA ) + ( FILLER_395 VSSA ) ( FILLER_394 VSSA ) ( FILLER_389 VSSA ) + ( FILLER_392 VSSA ) ( mgmt_vddio_hvclamp_pad\[0\] VSSA ) + ( FILLER_391 VSSA ) ( FILLER_390 VSSA ) ( FILLER_385 VSSA ) + ( FILLER_388 VSSA ) ( FILLER_387 VSSA ) ( FILLER_386 VSSA ) + ( FILLER_384 VSSA ) ( FILLER_612 VSSA ) ( FILLER_611 VSSA ) + ( FILLER_382 VSSA ) ( mgmt_vccd_lvclamp_pad VSSA ) + ( FILLER_381 VSSA ) ( FILLER_380 VSSA ) ( FILLER_379 VSSA ) + ( FILLER_610 VSSA ) ( FILLER_609 VSSA ) ( FILLER_378 VSSA ) + ( FILLER_608 VSSA ) ( FILLER_607 VSSA ) ( FILLER_377 VSSA ) + ( FILLER_606 VSSA ) ( FILLER_376 VSSA ) ( FILLER_375 VSSA ) + ( mgmt_corner\[1\] VSSA ) ( FILLER_374 VSSA ) + ( FILLER_605 VSSA ) ( FILLER_373 VSSA ) ( FILLER_372 VSSA ) + ( FILLER_371 VSSA ) ( FILLER_370 VSSA ) ( FILLER_369 VSSA ) + ( FILLER_368 VSSA ) ( bus_tie_72 VSSA ) ( bus_tie_71 VSSA ) + ( bus_tie_70 VSSA ) ( bus_tie_69 VSSA ) ( bus_tie_68 VSSA ) + ( FILLER_361 VSSA ) ( bus_tie_67 VSSA ) ( FILLER_358 VSSA ) + ( FILLER_360 VSSA ) ( FILLER_359 VSSA ) ( FILLER_357 VSSA ) + ( FILLER_353 VSSA ) ( FILLER_354 VSSA ) ( FILLER_355 VSSA ) + ( mgmt_vdda_hvclamp_pad VSSA ) ( FILLER_351 VSSA ) + ( FILLER_352 VSSA ) ( bus_tie_65 VSSA ) ( bus_tie_66 VSSA ) + ( FILLER_343 VSSA ) ( bus_tie_64 VSSA ) ( bus_tie_63 VSSA ) + ( bus_tie_62 VSSA ) ( FILLER_344 VSSA ) ( bus_tie_61 VSSA ) + ( FILLER_340 VSSA ) ( FILLER_342 VSSA ) ( FILLER_341 VSSA ) + ( FILLER_335 VSSA ) ( FILLER_337 VSSA ) ( FILLER_338 VSSA ) + ( mgmt_vssio_hvclamp_pad\[0\] VSSA ) ( FILLER_336 VSSA ) + ( FILLER_334 VSSA ) ( bus_tie_58 VSSA ) ( bus_tie_60 VSSA ) + ( bus_tie_59 VSSA ) ( bus_tie_56 VSSA ) ( bus_tie_57 VSSA ) + ( FILLER_323 VSSA ) ( FILLER_326 VSSA ) ( FILLER_327 VSSA ) + ( bus_tie_55 VSSA ) ( FILLER_325 VSSA ) ( FILLER_324 VSSA ) + ( FILLER_317 VSSA ) ( FILLER_321 VSSA ) ( clock_pad VSSA ) + ( FILLER_319 VSSA ) ( FILLER_320 VSSA ) ( FILLER_318 VSSA ) + ( bus_tie_54 VSSA ) ( bus_tie_53 VSSA ) ( bus_tie_52 VSSA ) + ( bus_tie_51 VSSA ) ( bus_tie_50 VSSA ) ( FILLER_308 VSSA ) + ( FILLER_309 VSSA ) ( FILLER_310 VSSA ) ( bus_tie_49 VSSA ) + ( FILLER_307 VSSA ) ( FILLER_306 VSSA ) ( FILLER_301 VSSA ) + ( flash_io1_pad VSSA ) ( FILLER_302 VSSA ) ( FILLER_303 VSSA ) + ( FILLER_304 VSSA ) ( FILLER_300 VSSA ) ( bus_tie_46 VSSA ) + ( bus_tie_48 VSSA ) ( bus_tie_47 VSSA ) ( FILLER_290 VSSA ) + ( bus_tie_45 VSSA ) ( bus_tie_44 VSSA ) ( FILLER_292 VSSA ) + ( FILLER_293 VSSA ) ( bus_tie_43 VSSA ) ( FILLER_291 VSSA ) + ( FILLER_289 VSSA ) ( FILLER_283 VSSA ) ( FILLER_286 VSSA ) + ( FILLER_287 VSSA ) ( flash_io0_pad VSSA ) ( FILLER_285 VSSA ) + ( FILLER_284 VSSA ) ( bus_tie_39 VSSA ) ( bus_tie_42 VSSA ) + ( bus_tie_41 VSSA ) ( bus_tie_40 VSSA ) ( FILLER_273 VSSA ) + ( bus_tie_38 VSSA ) ( FILLER_275 VSSA ) ( FILLER_276 VSSA ) + ( bus_tie_37 VSSA ) ( FILLER_274 VSSA ) ( FILLER_272 VSSA ) + ( FILLER_266 VSSA ) ( FILLER_269 VSSA ) ( FILLER_270 VSSA ) + ( flash_clk_pad VSSA ) ( FILLER_268 VSSA ) ( FILLER_267 VSSA ) + ( bus_tie_36 VSSA ) ( bus_tie_35 VSSA ) ( bus_tie_34 VSSA ) + ( bus_tie_33 VSSA ) ( bus_tie_32 VSSA ) ( FILLER_257 VSSA ) + ( FILLER_258 VSSA ) ( FILLER_259 VSSA ) ( bus_tie_31 VSSA ) + ( FILLER_256 VSSA ) ( FILLER_255 VSSA ) ( FILLER_249 VSSA ) + ( FILLER_252 VSSA ) ( FILLER_253 VSSA ) ( flash_csb_pad VSSA ) + ( FILLER_251 VSSA ) ( FILLER_250 VSSA ) ( bus_tie_27 VSSA ) + ( bus_tie_30 VSSA ) ( bus_tie_29 VSSA ) ( bus_tie_28 VSSA ) + ( FILLER_238 VSSA ) ( bus_tie_26 VSSA ) ( FILLER_242 VSSA ) + ( bus_tie_25 VSSA ) ( FILLER_240 VSSA ) ( FILLER_241 VSSA ) + ( FILLER_239 VSSA ) ( FILLER_232 VSSA ) ( FILLER_236 VSSA ) + ( mgmt_vssd_lvclamp_pad VSSA ) ( FILLER_234 VSSA ) + ( FILLER_235 VSSA ) ( FILLER_233 VSSA ) ( bus_tie_24 VSSA ) + ( bus_tie_20 VSSA ) ( bus_tie_23 VSSA ) ( bus_tie_22 VSSA ) + ( bus_tie_21 VSSA ) ( FILLER_221 VSSA ) ( FILLER_224 VSSA ) + ( FILLER_225 VSSA ) ( bus_tie_19 VSSA ) ( FILLER_223 VSSA ) + ( FILLER_222 VSSA ) ( FILLER_217 VSSA ) ( bus_tie_9 VSSA ) + ( FILLER_218 VSSA ) ( FILLER_219 VSSA ) ( FILLER_215 VSSA ) + ( FILLER_216 VSSA ) ( bus_tie_17 VSSA ) ( bus_tie_18 VSSA ) + ( bus_tie_14 VSSA ) ( bus_tie_16 VSSA ) ( bus_tie_15 VSSA ) + ( FILLER_204 VSSA ) ( FILLER_207 VSSA ) ( FILLER_208 VSSA ) + ( bus_tie_13 VSSA ) ( FILLER_206 VSSA ) ( FILLER_205 VSSA ) + ( FILLER_199 VSSA ) ( FILLER_201 VSSA ) ( FILLER_202 VSSA ) + ( resetb_pad VSSA ) ( FILLER_200 VSSA ) ( FILLER_198 VSSA ) + ( bus_tie_12 VSSA ) ( bus_tie_11 VSSA ) ( bus_tie_10 VSSA ) + ( bus_tie_8 VSSA ) ( bus_tie_7 VSSA ) ( FILLER_190 VSSA ) + ( FILLER_191 VSSA ) ( bus_tie_6 VSSA ) ( FILLER_188 VSSA ) + ( FILLER_189 VSSA ) ( FILLER_187 VSSA ) ( FILLER_182 VSSA ) + ( FILLER_185 VSSA ) ( mgmt_vssa_hvclamp_pad VSSA ) + ( FILLER_183 VSSA ) ( FILLER_184 VSSA ) ( FILLER_181 VSSA ) + ( bus_tie_4 VSSA ) ( bus_tie_5 VSSA ) ( bus_tie_3 VSSA ) + ( FILLER_171 VSSA ) ( bus_tie_2 VSSA ) ( bus_tie_1 VSSA ) + ( FILLER_173 VSSA ) ( FILLER_174 VSSA ) ( FILLER_172 VSSA ) + ( FILLER_170 VSSA ) ( mgmt_corner\[0\] VSSA ) ; + - gpio_pad/VSSD ( gpio_pad VSSD ) ( mgmt_corner\[1\] VSSD ) + ( FILLER_373 VSSD ) ( FILLER_372 VSSD ) ( FILLER_371 VSSD ) + ( FILLER_370 VSSD ) ( FILLER_369 VSSD ) ( FILLER_368 VSSD ) + ( bus_tie_72 VSSD ) ( bus_tie_71 VSSD ) ( bus_tie_70 VSSD ) + ( bus_tie_69 VSSD ) ( bus_tie_68 VSSD ) ( FILLER_361 VSSD ) + ( bus_tie_67 VSSD ) ( FILLER_358 VSSD ) ( FILLER_360 VSSD ) + ( FILLER_359 VSSD ) ( FILLER_357 VSSD ) ( FILLER_353 VSSD ) + ( FILLER_354 VSSD ) ( FILLER_355 VSSD ) + ( mgmt_vdda_hvclamp_pad VSSD ) ( FILLER_351 VSSD ) + ( FILLER_352 VSSD ) ( bus_tie_65 VSSD ) ( bus_tie_66 VSSD ) + ( FILLER_343 VSSD ) ( bus_tie_64 VSSD ) ( bus_tie_63 VSSD ) + ( bus_tie_62 VSSD ) ( FILLER_344 VSSD ) ( bus_tie_61 VSSD ) + ( FILLER_340 VSSD ) ( FILLER_342 VSSD ) ( FILLER_341 VSSD ) + ( FILLER_335 VSSD ) ( FILLER_337 VSSD ) ( FILLER_338 VSSD ) + ( mgmt_vssio_hvclamp_pad\[0\] VSSD ) ( FILLER_336 VSSD ) + ( FILLER_334 VSSD ) ( bus_tie_58 VSSD ) ( bus_tie_60 VSSD ) + ( bus_tie_59 VSSD ) ( bus_tie_56 VSSD ) ( bus_tie_57 VSSD ) + ( FILLER_323 VSSD ) ( FILLER_326 VSSD ) ( FILLER_327 VSSD ) + ( bus_tie_55 VSSD ) ( FILLER_325 VSSD ) ( FILLER_324 VSSD ) + ( FILLER_317 VSSD ) ( FILLER_321 VSSD ) ( clock_pad VSSD ) + ( FILLER_319 VSSD ) ( FILLER_320 VSSD ) ( FILLER_318 VSSD ) + ( bus_tie_54 VSSD ) ( bus_tie_53 VSSD ) ( bus_tie_52 VSSD ) + ( bus_tie_51 VSSD ) ( bus_tie_50 VSSD ) ( FILLER_308 VSSD ) + ( FILLER_309 VSSD ) ( FILLER_310 VSSD ) ( bus_tie_49 VSSD ) + ( FILLER_307 VSSD ) ( FILLER_306 VSSD ) ( FILLER_301 VSSD ) + ( flash_io1_pad VSSD ) ( FILLER_302 VSSD ) ( FILLER_303 VSSD ) + ( FILLER_304 VSSD ) ( FILLER_300 VSSD ) ( bus_tie_46 VSSD ) + ( bus_tie_48 VSSD ) ( bus_tie_47 VSSD ) ( FILLER_290 VSSD ) + ( bus_tie_45 VSSD ) ( bus_tie_44 VSSD ) ( FILLER_292 VSSD ) + ( FILLER_293 VSSD ) ( bus_tie_43 VSSD ) ( FILLER_291 VSSD ) + ( FILLER_289 VSSD ) ( FILLER_283 VSSD ) ( FILLER_286 VSSD ) + ( FILLER_287 VSSD ) ( flash_io0_pad VSSD ) ( FILLER_285 VSSD ) + ( FILLER_284 VSSD ) ( bus_tie_39 VSSD ) ( bus_tie_42 VSSD ) + ( bus_tie_41 VSSD ) ( bus_tie_40 VSSD ) ( FILLER_273 VSSD ) + ( bus_tie_38 VSSD ) ( FILLER_275 VSSD ) ( FILLER_276 VSSD ) + ( bus_tie_37 VSSD ) ( FILLER_274 VSSD ) ( FILLER_272 VSSD ) + ( FILLER_266 VSSD ) ( FILLER_269 VSSD ) ( FILLER_270 VSSD ) + ( flash_clk_pad VSSD ) ( FILLER_268 VSSD ) ( FILLER_267 VSSD ) + ( bus_tie_36 VSSD ) ( bus_tie_35 VSSD ) ( bus_tie_34 VSSD ) + ( bus_tie_33 VSSD ) ( bus_tie_32 VSSD ) ( FILLER_257 VSSD ) + ( FILLER_258 VSSD ) ( FILLER_259 VSSD ) ( bus_tie_31 VSSD ) + ( FILLER_256 VSSD ) ( FILLER_255 VSSD ) ( FILLER_249 VSSD ) + ( FILLER_252 VSSD ) ( FILLER_253 VSSD ) ( flash_csb_pad VSSD ) + ( FILLER_251 VSSD ) ( FILLER_250 VSSD ) ( bus_tie_27 VSSD ) + ( bus_tie_30 VSSD ) ( bus_tie_29 VSSD ) ( bus_tie_28 VSSD ) + ( FILLER_238 VSSD ) ( bus_tie_26 VSSD ) ( FILLER_242 VSSD ) + ( bus_tie_25 VSSD ) ( FILLER_240 VSSD ) ( FILLER_241 VSSD ) + ( FILLER_239 VSSD ) ( FILLER_232 VSSD ) ( FILLER_236 VSSD ) + ( mgmt_vssd_lvclamp_pad VSSD ) ( FILLER_234 VSSD ) + ( FILLER_235 VSSD ) ( FILLER_233 VSSD ) ( bus_tie_24 VSSD ) + ( bus_tie_20 VSSD ) ( bus_tie_23 VSSD ) ( bus_tie_22 VSSD ) + ( bus_tie_21 VSSD ) ( FILLER_221 VSSD ) ( FILLER_224 VSSD ) + ( FILLER_225 VSSD ) ( bus_tie_19 VSSD ) ( FILLER_223 VSSD ) + ( FILLER_222 VSSD ) ( FILLER_217 VSSD ) ( bus_tie_9 VSSD ) + ( FILLER_218 VSSD ) ( FILLER_219 VSSD ) ( FILLER_215 VSSD ) + ( FILLER_216 VSSD ) ( bus_tie_17 VSSD ) ( bus_tie_18 VSSD ) + ( bus_tie_14 VSSD ) ( bus_tie_16 VSSD ) ( bus_tie_15 VSSD ) + ( FILLER_204 VSSD ) ( FILLER_207 VSSD ) ( FILLER_208 VSSD ) + ( bus_tie_13 VSSD ) ( FILLER_206 VSSD ) ( FILLER_205 VSSD ) + ( FILLER_199 VSSD ) ( FILLER_201 VSSD ) ( FILLER_202 VSSD ) + ( resetb_pad VSSD ) ( FILLER_200 VSSD ) ( FILLER_198 VSSD ) + ( bus_tie_12 VSSD ) ( bus_tie_11 VSSD ) ( bus_tie_10 VSSD ) + ( bus_tie_8 VSSD ) ( bus_tie_7 VSSD ) ( FILLER_190 VSSD ) + ( FILLER_191 VSSD ) ( bus_tie_6 VSSD ) ( FILLER_188 VSSD ) + ( FILLER_189 VSSD ) ( FILLER_187 VSSD ) ( FILLER_182 VSSD ) + ( FILLER_185 VSSD ) ( mgmt_vssa_hvclamp_pad VSSD ) + ( FILLER_183 VSSD ) ( FILLER_184 VSSD ) ( FILLER_181 VSSD ) + ( bus_tie_4 VSSD ) ( bus_tie_5 VSSD ) ( bus_tie_3 VSSD ) + ( FILLER_171 VSSD ) ( bus_tie_2 VSSD ) ( bus_tie_1 VSSD ) + ( FILLER_173 VSSD ) ( FILLER_174 VSSD ) ( FILLER_172 VSSD ) + ( FILLER_170 VSSD ) ( mgmt_corner\[0\] VSSD ) ; + - gpio_pad/VDDIO ( gpio_pad VDDIO ) ( FILLER_167 VSWITCH ) + ( FILLER_168 VSWITCH ) ( FILLER_169 VSWITCH ) + ( FILLER_166 VSWITCH ) ( FILLER_165 VSWITCH ) + ( FILLER_164 VSWITCH ) ( FILLER_163 VSWITCH ) + ( FILLER_162 VSWITCH ) ( FILLER_161 VSWITCH ) + ( FILLER_160 VSWITCH ) ( FILLER_159 VSWITCH ) + ( FILLER_158 VSWITCH ) ( FILLER_157 VSWITCH ) + ( FILLER_153 VSWITCH ) ( mprj_pads.area1_io_pad\[15\] VSWITCH ) + ( FILLER_154 VSWITCH ) ( FILLER_155 VSWITCH ) + ( FILLER_149 VSWITCH ) ( FILLER_152 VSWITCH ) + ( FILLER_151 VSWITCH ) ( FILLER_150 VSWITCH ) + ( FILLER_145 VSWITCH ) ( FILLER_148 VSWITCH ) + ( FILLER_147 VSWITCH ) ( FILLER_146 VSWITCH ) + ( FILLER_144 VSWITCH ) ( FILLER_137 VSWITCH ) + ( user1_vssa_hvclamp_pad\[0\] VSWITCH ) ( FILLER_140 VSWITCH ) + ( FILLER_141 VSWITCH ) ( FILLER_142 VSWITCH ) + ( FILLER_139 VSWITCH ) ( FILLER_138 VSWITCH ) + ( FILLER_134 VSWITCH ) ( FILLER_136 VSWITCH ) + ( FILLER_135 VSWITCH ) ( FILLER_131 VSWITCH ) + ( FILLER_133 VSWITCH ) ( FILLER_132 VSWITCH ) + ( FILLER_127 VSWITCH ) ( FILLER_128 VSWITCH ) + ( FILLER_129 VSWITCH ) ( mprj_pads.area1_io_pad\[16\] VSWITCH ) + ( FILLER_123 VSWITCH ) ( FILLER_126 VSWITCH ) + ( FILLER_125 VSWITCH ) ( FILLER_124 VSWITCH ) + ( FILLER_122 VSWITCH ) ( FILLER_121 VSWITCH ) + ( FILLER_120 VSWITCH ) ( FILLER_119 VSWITCH ) + ( mprj_pads.area1_io_pad\[17\] VSWITCH ) ( FILLER_118 VSWITCH ) + ( FILLER_116 VSWITCH ) ( FILLER_115 VSWITCH ) + ( FILLER_114 VSWITCH ) ( FILLER_113 VSWITCH ) + ( FILLER_112 VSWITCH ) ( FILLER_111 VSWITCH ) + ( FILLER_110 VSWITCH ) ( FILLER_109 VSWITCH ) + ( FILLER_108 VSWITCH ) ( FILLER_107 VSWITCH ) + ( FILLER_106 VSWITCH ) ( FILLER_105 VSWITCH ) + ( FILLER_104 VSWITCH ) ( FILLER_102 VSWITCH ) + ( FILLER_103 VSWITCH ) ( FILLER_98 VSWITCH ) + ( FILLER_101 VSWITCH ) ( FILLER_100 VSWITCH ) + ( FILLER_99 VSWITCH ) ( FILLER_94 VSWITCH ) + ( mprj_pads.area1_io_pad\[18\] VSWITCH ) ( FILLER_95 VSWITCH ) + ( FILLER_96 VSWITCH ) ( FILLER_93 VSWITCH ) + ( FILLER_92 VSWITCH ) ( FILLER_91 VSWITCH ) + ( FILLER_90 VSWITCH ) ( FILLER_89 VSWITCH ) + ( FILLER_88 VSWITCH ) ( FILLER_86 VSWITCH ) + ( FILLER_87 VSWITCH ) ( FILLER_SB3 VSWITCH ) + ( disconnect_vdda_0 VSWITCH ) ( FILLER_78 VSWITCH ) + ( mgmt_vssio_hvclamp_pad\[1\] VSWITCH ) ( FILLER_80 VSWITCH ) + ( FILLER_81 VSWITCH ) ( FILLER_82 VSWITCH ) + ( FILLER_79 VSWITCH ) ( FILLER_75 VSWITCH ) + ( FILLER_77 VSWITCH ) ( FILLER_76 VSWITCH ) + ( FILLER_71 VSWITCH ) ( FILLER_74 VSWITCH ) + ( FILLER_73 VSWITCH ) ( FILLER_72 VSWITCH ) + ( FILLER_63 VSWITCH ) ( FILLER_68 VSWITCH ) + ( FILLER_69 VSWITCH ) ( mprj_pads.area2_io_pad\[0\] VSWITCH ) + ( FILLER_66 VSWITCH ) ( FILLER_67 VSWITCH ) + ( FILLER_65 VSWITCH ) ( FILLER_64 VSWITCH ) + ( FILLER_59 VSWITCH ) ( FILLER_62 VSWITCH ) + ( FILLER_61 VSWITCH ) ( FILLER_60 VSWITCH ) + ( FILLER_57 VSWITCH ) ( FILLER_58 VSWITCH ) + ( FILLER_53 VSWITCH ) ( FILLER_54 VSWITCH ) + ( FILLER_55 VSWITCH ) ( mprj_pads.area2_io_pad\[1\] VSWITCH ) + ( FILLER_48 VSWITCH ) ( FILLER_52 VSWITCH ) + ( FILLER_51 VSWITCH ) ( FILLER_50 VSWITCH ) + ( FILLER_49 VSWITCH ) ( FILLER_46 VSWITCH ) + ( FILLER_47 VSWITCH ) ( FILLER_44 VSWITCH ) + ( FILLER_45 VSWITCH ) ( FILLER_38 VSWITCH ) + ( FILLER_41 VSWITCH ) ( FILLER_42 VSWITCH ) + ( mprj_pads.area2_io_pad\[2\] VSWITCH ) ( FILLER_40 VSWITCH ) + ( FILLER_39 VSWITCH ) ( FILLER_35 VSWITCH ) + ( FILLER_37 VSWITCH ) ( FILLER_36 VSWITCH ) + ( FILLER_31 VSWITCH ) ( FILLER_34 VSWITCH ) + ( FILLER_33 VSWITCH ) ( FILLER_32 VSWITCH ) + ( FILLER_28 VSWITCH ) ( mprj_pads.area2_io_pad\[3\] VSWITCH ) + ( FILLER_29 VSWITCH ) ( FILLER_26 VSWITCH ) + ( FILLER_27 VSWITCH ) ( FILLER_25 VSWITCH ) + ( FILLER_24 VSWITCH ) ( FILLER_23 VSWITCH ) + ( FILLER_22 VSWITCH ) ( FILLER_21 VSWITCH ) + ( FILLER_20 VSWITCH ) ( FILLER_19 VSWITCH ) + ( FILLER_18 VSWITCH ) ( FILLER_14 VSWITCH ) + ( FILLER_15 VSWITCH ) ( FILLER_16 VSWITCH ) + ( mprj_pads.area2_io_pad\[4\] VSWITCH ) ( FILLER_10 VSWITCH ) + ( FILLER_13 VSWITCH ) ( FILLER_12 VSWITCH ) + ( FILLER_11 VSWITCH ) ( FILLER_6 VSWITCH ) ( FILLER_9 VSWITCH ) + ( FILLER_8 VSWITCH ) ( FILLER_7 VSWITCH ) ( FILLER_5 VSWITCH ) + ( FILLER_167 VDDIO ) ( FILLER_168 VDDIO ) ( FILLER_169 VDDIO ) + ( FILLER_166 VDDIO ) ( FILLER_165 VDDIO ) ( FILLER_164 VDDIO ) + ( FILLER_163 VDDIO ) ( FILLER_162 VDDIO ) ( FILLER_161 VDDIO ) + ( FILLER_160 VDDIO ) ( FILLER_159 VDDIO ) ( FILLER_158 VDDIO ) + ( FILLER_157 VDDIO ) ( FILLER_153 VDDIO ) + ( mprj_pads.area1_io_pad\[15\] VDDIO ) ( FILLER_154 VDDIO ) + ( FILLER_155 VDDIO ) ( FILLER_149 VDDIO ) ( FILLER_152 VDDIO ) + ( FILLER_151 VDDIO ) ( FILLER_150 VDDIO ) ( FILLER_145 VDDIO ) + ( FILLER_148 VDDIO ) ( FILLER_147 VDDIO ) ( FILLER_146 VDDIO ) + ( FILLER_144 VDDIO ) ( FILLER_137 VDDIO ) + ( user1_vssa_hvclamp_pad\[0\] VDDIO ) ( FILLER_140 VDDIO ) + ( FILLER_141 VDDIO ) ( FILLER_142 VDDIO ) ( FILLER_139 VDDIO ) + ( FILLER_138 VDDIO ) ( FILLER_134 VDDIO ) ( FILLER_136 VDDIO ) + ( FILLER_135 VDDIO ) ( FILLER_131 VDDIO ) ( FILLER_133 VDDIO ) + ( FILLER_132 VDDIO ) ( FILLER_127 VDDIO ) ( FILLER_128 VDDIO ) + ( FILLER_129 VDDIO ) ( mprj_pads.area1_io_pad\[16\] VDDIO ) + ( FILLER_123 VDDIO ) ( FILLER_126 VDDIO ) ( FILLER_125 VDDIO ) + ( FILLER_124 VDDIO ) ( FILLER_122 VDDIO ) ( FILLER_121 VDDIO ) + ( FILLER_120 VDDIO ) ( FILLER_119 VDDIO ) + ( mprj_pads.area1_io_pad\[17\] VDDIO ) ( FILLER_118 VDDIO ) + ( FILLER_116 VDDIO ) ( FILLER_115 VDDIO ) ( FILLER_114 VDDIO ) + ( FILLER_113 VDDIO ) ( FILLER_112 VDDIO ) ( FILLER_111 VDDIO ) + ( FILLER_110 VDDIO ) ( FILLER_109 VDDIO ) ( FILLER_108 VDDIO ) + ( FILLER_107 VDDIO ) ( FILLER_106 VDDIO ) ( FILLER_105 VDDIO ) + ( FILLER_104 VDDIO ) ( FILLER_102 VDDIO ) ( FILLER_103 VDDIO ) + ( FILLER_98 VDDIO ) ( FILLER_101 VDDIO ) ( FILLER_100 VDDIO ) + ( FILLER_99 VDDIO ) ( FILLER_94 VDDIO ) + ( mprj_pads.area1_io_pad\[18\] VDDIO ) ( FILLER_95 VDDIO ) + ( FILLER_96 VDDIO ) ( FILLER_93 VDDIO ) ( FILLER_92 VDDIO ) + ( FILLER_91 VDDIO ) ( FILLER_90 VDDIO ) ( FILLER_89 VDDIO ) + ( FILLER_88 VDDIO ) ( FILLER_86 VDDIO ) ( FILLER_87 VDDIO ) + ( FILLER_SB3 VDDIO ) ( disconnect_vdda_0 VDDIO ) + ( FILLER_78 VDDIO ) ( mgmt_vssio_hvclamp_pad\[1\] VDDIO ) + ( FILLER_80 VDDIO ) ( FILLER_81 VDDIO ) ( FILLER_82 VDDIO ) + ( FILLER_79 VDDIO ) ( FILLER_75 VDDIO ) ( FILLER_77 VDDIO ) + ( FILLER_76 VDDIO ) ( FILLER_71 VDDIO ) ( FILLER_74 VDDIO ) + ( FILLER_73 VDDIO ) ( FILLER_72 VDDIO ) ( FILLER_63 VDDIO ) + ( FILLER_68 VDDIO ) ( FILLER_69 VDDIO ) + ( mprj_pads.area2_io_pad\[0\] VDDIO ) ( FILLER_66 VDDIO ) + ( FILLER_67 VDDIO ) ( FILLER_65 VDDIO ) ( FILLER_64 VDDIO ) + ( FILLER_59 VDDIO ) ( FILLER_62 VDDIO ) ( FILLER_61 VDDIO ) + ( FILLER_60 VDDIO ) ( FILLER_57 VDDIO ) ( FILLER_58 VDDIO ) + ( FILLER_53 VDDIO ) ( FILLER_54 VDDIO ) ( FILLER_55 VDDIO ) + ( mprj_pads.area2_io_pad\[1\] VDDIO ) ( FILLER_48 VDDIO ) + ( FILLER_52 VDDIO ) ( FILLER_51 VDDIO ) ( FILLER_50 VDDIO ) + ( FILLER_49 VDDIO ) ( FILLER_46 VDDIO ) ( FILLER_47 VDDIO ) + ( FILLER_44 VDDIO ) ( FILLER_45 VDDIO ) ( FILLER_38 VDDIO ) + ( FILLER_41 VDDIO ) ( FILLER_42 VDDIO ) + ( mprj_pads.area2_io_pad\[2\] VDDIO ) ( FILLER_40 VDDIO ) + ( FILLER_39 VDDIO ) ( FILLER_35 VDDIO ) ( FILLER_37 VDDIO ) + ( FILLER_36 VDDIO ) ( FILLER_31 VDDIO ) ( FILLER_34 VDDIO ) + ( FILLER_33 VDDIO ) ( FILLER_32 VDDIO ) ( FILLER_28 VDDIO ) + ( mprj_pads.area2_io_pad\[3\] VDDIO ) ( FILLER_29 VDDIO ) + ( FILLER_26 VDDIO ) ( FILLER_27 VDDIO ) ( FILLER_25 VDDIO ) + ( FILLER_24 VDDIO ) ( FILLER_23 VDDIO ) ( FILLER_22 VDDIO ) + ( FILLER_21 VDDIO ) ( FILLER_20 VDDIO ) ( FILLER_19 VDDIO ) + ( FILLER_18 VDDIO ) ( FILLER_14 VDDIO ) ( FILLER_15 VDDIO ) + ( FILLER_16 VDDIO ) ( mprj_pads.area2_io_pad\[4\] VDDIO ) + ( FILLER_10 VDDIO ) ( FILLER_13 VDDIO ) ( FILLER_12 VDDIO ) + ( FILLER_11 VDDIO ) ( FILLER_6 VDDIO ) ( FILLER_9 VDDIO ) + ( FILLER_8 VDDIO ) ( FILLER_7 VDDIO ) ( FILLER_5 VDDIO ) + ( user2_corner VSWITCH ) ( user2_corner VDDIO ) + ( FILLER_603 VSWITCH ) ( FILLER_604 VSWITCH ) + ( user1_corner VSWITCH ) ( FILLER_603 VDDIO ) + ( FILLER_604 VDDIO ) ( user1_corner VDDIO ) + ( FILLER_810 VSWITCH ) ( FILLER_811 VSWITCH ) + ( FILLER_601 VSWITCH ) ( FILLER_810 VDDIO ) + ( FILLER_811 VDDIO ) ( FILLER_602 VSWITCH ) + ( FILLER_602 VDDIO ) ( FILLER_601 VDDIO ) + ( FILLER_809 VSWITCH ) ( FILLER_809 VDDIO ) + ( FILLER_596 VSWITCH ) ( FILLER_600 VSWITCH ) + ( FILLER_600 VDDIO ) ( FILLER_808 VSWITCH ) + ( FILLER_808 VDDIO ) ( FILLER_599 VSWITCH ) + ( FILLER_599 VDDIO ) ( FILLER_807 VSWITCH ) + ( FILLER_807 VDDIO ) ( FILLER_598 VSWITCH ) + ( FILLER_598 VDDIO ) ( FILLER_806 VSWITCH ) + ( FILLER_806 VDDIO ) ( FILLER_597 VSWITCH ) + ( FILLER_597 VDDIO ) ( FILLER_805 VSWITCH ) + ( FILLER_805 VDDIO ) ( FILLER_596 VDDIO ) + ( FILLER_804 VSWITCH ) ( FILLER_804 VDDIO ) + ( FILLER_595 VSWITCH ) ( FILLER_595 VDDIO ) + ( mprj_pads.area1_io_pad\[14\] VSWITCH ) ( FILLER_803 VSWITCH ) + ( FILLER_803 VDDIO ) ( FILLER_593 VSWITCH ) + ( mprj_pads.area2_io_pad\[5\] VSWITCH ) ( FILLER_593 VDDIO ) + ( mprj_pads.area2_io_pad\[5\] VDDIO ) ( FILLER_592 VSWITCH ) + ( FILLER_592 VDDIO ) ( mprj_pads.area1_io_pad\[14\] VDDIO ) + ( FILLER_801 VSWITCH ) ( FILLER_591 VSWITCH ) + ( FILLER_591 VDDIO ) ( FILLER_801 VDDIO ) + ( FILLER_800 VSWITCH ) ( FILLER_800 VDDIO ) + ( FILLER_590 VSWITCH ) ( FILLER_590 VDDIO ) + ( FILLER_799 VSWITCH ) ( FILLER_799 VDDIO ) + ( FILLER_798 VSWITCH ) ( FILLER_589 VSWITCH ) + ( FILLER_589 VDDIO ) ( FILLER_798 VDDIO ) + ( FILLER_797 VSWITCH ) ( FILLER_588 VSWITCH ) + ( FILLER_588 VDDIO ) ( FILLER_797 VDDIO ) + ( FILLER_796 VSWITCH ) ( FILLER_587 VSWITCH ) + ( FILLER_587 VDDIO ) ( FILLER_796 VDDIO ) + ( FILLER_586 VSWITCH ) ( FILLER_586 VDDIO ) + ( FILLER_585 VSWITCH ) ( FILLER_585 VDDIO ) + ( FILLER_794 VSWITCH ) ( FILLER_795 VSWITCH ) + ( FILLER_795 VDDIO ) ( FILLER_794 VDDIO ) + ( FILLER_791 VSWITCH ) ( FILLER_583 VSWITCH ) + ( user2_vccd_lvclamp_pad VSWITCH ) ( FILLER_583 VDDIO ) + ( user2_vccd_lvclamp_pad VDDIO ) ( FILLER_582 VSWITCH ) + ( FILLER_582 VDDIO ) ( FILLER_581 VSWITCH ) + ( FILLER_581 VDDIO ) ( FILLER_792 VSWITCH ) + ( user1_vccd_lvclamp_pad VSWITCH ) ( FILLER_792 VDDIO ) + ( user1_vccd_lvclamp_pad VDDIO ) ( FILLER_791 VDDIO ) + ( FILLER_580 VSWITCH ) ( FILLER_580 VDDIO ) + ( FILLER_576 VSWITCH ) ( FILLER_790 VSWITCH ) + ( FILLER_790 VDDIO ) ( FILLER_579 VSWITCH ) + ( FILLER_579 VDDIO ) ( FILLER_789 VSWITCH ) + ( FILLER_789 VDDIO ) ( FILLER_578 VSWITCH ) + ( FILLER_578 VDDIO ) ( FILLER_788 VSWITCH ) + ( FILLER_788 VDDIO ) ( FILLER_577 VSWITCH ) + ( FILLER_577 VDDIO ) ( FILLER_787 VSWITCH ) + ( FILLER_787 VDDIO ) ( FILLER_576 VDDIO ) + ( FILLER_786 VSWITCH ) ( FILLER_786 VDDIO ) + ( FILLER_575 VSWITCH ) ( FILLER_575 VDDIO ) + ( FILLER_785 VSWITCH ) ( FILLER_785 VDDIO ) + ( FILLER_570 VSWITCH ) ( FILLER_784 VSWITCH ) + ( FILLER_784 VDDIO ) ( FILLER_573 VSWITCH ) + ( mgmt_vddio_hvclamp_pad\[1\] VSWITCH ) ( FILLER_573 VDDIO ) + ( mgmt_vddio_hvclamp_pad\[1\] VDDIO ) ( FILLER_572 VSWITCH ) + ( FILLER_572 VDDIO ) ( FILLER_571 VSWITCH ) + ( FILLER_571 VDDIO ) ( FILLER_570 VDDIO ) + ( mprj_pads.area1_io_pad\[13\] VSWITCH ) ( FILLER_782 VSWITCH ) + ( mprj_pads.area1_io_pad\[13\] VDDIO ) ( FILLER_782 VDDIO ) + ( FILLER_781 VSWITCH ) ( FILLER_569 VSWITCH ) + ( FILLER_569 VDDIO ) ( FILLER_781 VDDIO ) + ( FILLER_780 VSWITCH ) ( FILLER_568 VSWITCH ) + ( FILLER_568 VDDIO ) ( FILLER_780 VDDIO ) + ( FILLER_779 VSWITCH ) ( FILLER_567 VSWITCH ) + ( FILLER_567 VDDIO ) ( FILLER_779 VDDIO ) + ( FILLER_566 VSWITCH ) ( FILLER_566 VDDIO ) + ( FILLER_778 VSWITCH ) ( FILLER_778 VDDIO ) + ( FILLER_565 VSWITCH ) ( FILLER_565 VDDIO ) + ( FILLER_777 VSWITCH ) ( FILLER_777 VDDIO ) + ( FILLER_776 VSWITCH ) ( FILLER_776 VDDIO ) + ( FILLER_560 VSWITCH ) ( FILLER_775 VSWITCH ) + ( FILLER_775 VDDIO ) ( user2_vssa_hvclamp_pad VSWITCH ) + ( user2_vssa_hvclamp_pad VDDIO ) ( FILLER_562 VSWITCH ) + ( FILLER_563 VSWITCH ) ( FILLER_562 VDDIO ) + ( FILLER_563 VDDIO ) ( FILLER_561 VSWITCH ) + ( FILLER_561 VDDIO ) ( FILLER_560 VDDIO ) + ( user1_vdda_hvclamp_pad\[0\] VSWITCH ) ( FILLER_773 VSWITCH ) + ( user1_vdda_hvclamp_pad\[0\] VDDIO ) ( FILLER_773 VDDIO ) + ( FILLER_772 VSWITCH ) ( FILLER_772 VDDIO ) + ( FILLER_771 VSWITCH ) ( FILLER_559 VSWITCH ) + ( FILLER_559 VDDIO ) ( FILLER_771 VDDIO ) + ( FILLER_770 VSWITCH ) ( FILLER_558 VSWITCH ) + ( FILLER_558 VDDIO ) ( FILLER_770 VDDIO ) + ( FILLER_769 VSWITCH ) ( FILLER_557 VSWITCH ) + ( FILLER_557 VDDIO ) ( FILLER_769 VDDIO ) + ( FILLER_556 VSWITCH ) ( FILLER_556 VDDIO ) + ( FILLER_555 VSWITCH ) ( FILLER_768 VSWITCH ) + ( FILLER_768 VDDIO ) ( FILLER_555 VDDIO ) + ( FILLER_766 VSWITCH ) ( FILLER_767 VSWITCH ) + ( FILLER_767 VDDIO ) ( FILLER_766 VDDIO ) + ( FILLER_765 VSWITCH ) ( FILLER_765 VDDIO ) + ( FILLER_550 VSWITCH ) ( FILLER_553 VSWITCH ) + ( mprj_pads.area2_io_pad\[6\] VSWITCH ) ( FILLER_553 VDDIO ) + ( mprj_pads.area2_io_pad\[6\] VDDIO ) ( FILLER_552 VSWITCH ) + ( FILLER_552 VDDIO ) ( FILLER_551 VSWITCH ) + ( FILLER_551 VDDIO ) ( FILLER_550 VDDIO ) + ( FILLER_546 VSWITCH ) ( mprj_pads.area1_io_pad\[12\] VSWITCH ) + ( mprj_pads.area1_io_pad\[12\] VDDIO ) ( FILLER_549 VSWITCH ) + ( FILLER_549 VDDIO ) ( FILLER_763 VSWITCH ) + ( FILLER_763 VDDIO ) ( FILLER_548 VSWITCH ) + ( FILLER_548 VDDIO ) ( FILLER_762 VSWITCH ) + ( FILLER_762 VDDIO ) ( FILLER_547 VSWITCH ) + ( FILLER_547 VDDIO ) ( FILLER_761 VSWITCH ) + ( FILLER_761 VDDIO ) ( FILLER_546 VDDIO ) + ( FILLER_760 VSWITCH ) ( FILLER_760 VDDIO ) + ( FILLER_759 VSWITCH ) ( FILLER_759 VDDIO ) + ( FILLER_545 VSWITCH ) ( FILLER_545 VDDIO ) + ( FILLER_758 VSWITCH ) ( FILLER_758 VDDIO ) + ( FILLER_757 VSWITCH ) ( FILLER_757 VDDIO ) + ( FILLER_540 VSWITCH ) ( FILLER_756 VSWITCH ) + ( FILLER_756 VDDIO ) ( FILLER_543 VSWITCH ) + ( mprj_pads.area2_io_pad\[7\] VSWITCH ) ( FILLER_543 VDDIO ) + ( mprj_pads.area2_io_pad\[7\] VDDIO ) ( FILLER_542 VSWITCH ) + ( FILLER_542 VDDIO ) ( FILLER_541 VSWITCH ) + ( FILLER_541 VDDIO ) ( FILLER_540 VDDIO ) + ( mprj_pads.area1_io_pad\[11\] VSWITCH ) ( FILLER_539 VSWITCH ) + ( FILLER_539 VDDIO ) ( mprj_pads.area1_io_pad\[11\] VDDIO ) + ( FILLER_754 VSWITCH ) ( FILLER_754 VDDIO ) + ( FILLER_753 VSWITCH ) ( FILLER_538 VSWITCH ) + ( FILLER_538 VDDIO ) ( FILLER_753 VDDIO ) + ( FILLER_752 VSWITCH ) ( FILLER_537 VSWITCH ) + ( FILLER_537 VDDIO ) ( FILLER_752 VDDIO ) + ( FILLER_536 VSWITCH ) ( FILLER_536 VDDIO ) + ( FILLER_535 VSWITCH ) ( FILLER_751 VSWITCH ) + ( FILLER_751 VDDIO ) ( FILLER_535 VDDIO ) + ( FILLER_750 VSWITCH ) ( FILLER_750 VDDIO ) + ( FILLER_747 VSWITCH ) ( FILLER_749 VSWITCH ) + ( FILLER_749 VDDIO ) ( FILLER_748 VSWITCH ) + ( FILLER_748 VDDIO ) ( FILLER_747 VDDIO ) + ( FILLER_531 VSWITCH ) ( FILLER_533 VSWITCH ) + ( mprj_pads.area2_io_pad\[8\] VSWITCH ) ( FILLER_533 VDDIO ) + ( mprj_pads.area2_io_pad\[8\] VDDIO ) ( FILLER_532 VSWITCH ) + ( FILLER_532 VDDIO ) ( FILLER_531 VDDIO ) + ( FILLER_743 VSWITCH ) ( FILLER_530 VSWITCH ) + ( FILLER_530 VDDIO ) ( FILLER_529 VSWITCH ) + ( FILLER_529 VDDIO ) ( FILLER_744 VSWITCH ) + ( FILLER_745 VSWITCH ) ( mprj_pads.area1_io_pad\[10\] VSWITCH ) + ( FILLER_744 VDDIO ) ( FILLER_745 VDDIO ) + ( mprj_pads.area1_io_pad\[10\] VDDIO ) ( FILLER_528 VSWITCH ) + ( FILLER_528 VDDIO ) ( FILLER_743 VDDIO ) + ( FILLER_527 VSWITCH ) ( FILLER_527 VDDIO ) + ( FILLER_525 VSWITCH ) ( FILLER_742 VSWITCH ) + ( FILLER_742 VDDIO ) ( FILLER_526 VSWITCH ) + ( FILLER_526 VDDIO ) ( FILLER_525 VDDIO ) + ( FILLER_740 VSWITCH ) ( FILLER_741 VSWITCH ) + ( FILLER_741 VDDIO ) ( FILLER_740 VDDIO ) + ( FILLER_737 VSWITCH ) ( FILLER_739 VSWITCH ) + ( FILLER_739 VDDIO ) ( FILLER_738 VSWITCH ) + ( FILLER_738 VDDIO ) ( FILLER_737 VDDIO ) + ( FILLER_521 VSWITCH ) ( FILLER_523 VSWITCH ) + ( mprj_pads.area2_io_pad\[9\] VSWITCH ) ( FILLER_523 VDDIO ) + ( mprj_pads.area2_io_pad\[9\] VDDIO ) ( FILLER_522 VSWITCH ) + ( FILLER_522 VDDIO ) ( FILLER_521 VDDIO ) + ( FILLER_517 VSWITCH ) ( FILLER_520 VSWITCH ) + ( FILLER_520 VDDIO ) ( FILLER_519 VSWITCH ) + ( FILLER_519 VDDIO ) ( FILLER_518 VSWITCH ) + ( FILLER_518 VDDIO ) ( mprj_pads.area1_io_pad\[9\] VSWITCH ) + ( mprj_pads.area1_io_pad\[9\] VDDIO ) ( FILLER_735 VSWITCH ) + ( FILLER_735 VDDIO ) ( FILLER_517 VDDIO ) + ( FILLER_734 VSWITCH ) ( FILLER_734 VDDIO ) + ( FILLER_515 VSWITCH ) ( FILLER_516 VSWITCH ) + ( FILLER_516 VDDIO ) ( FILLER_733 VSWITCH ) + ( FILLER_733 VDDIO ) ( FILLER_515 VDDIO ) + ( FILLER_732 VSWITCH ) ( FILLER_732 VDDIO ) + ( FILLER_728 VSWITCH ) ( FILLER_731 VSWITCH ) + ( FILLER_731 VDDIO ) ( FILLER_730 VSWITCH ) + ( FILLER_730 VDDIO ) ( FILLER_729 VSWITCH ) + ( FILLER_729 VDDIO ) ( FILLER_513 VSWITCH ) + ( mprj_pads.area2_io_pad\[10\] VSWITCH ) ( FILLER_513 VDDIO ) + ( mprj_pads.area2_io_pad\[10\] VDDIO ) ( FILLER_512 VSWITCH ) + ( FILLER_512 VDDIO ) ( FILLER_728 VDDIO ) + ( FILLER_511 VSWITCH ) ( FILLER_511 VDDIO ) + ( FILLER_507 VSWITCH ) ( FILLER_510 VSWITCH ) + ( FILLER_510 VDDIO ) ( FILLER_509 VSWITCH ) + ( FILLER_509 VDDIO ) ( FILLER_508 VSWITCH ) + ( FILLER_508 VDDIO ) ( FILLER_726 VSWITCH ) + ( mprj_pads.area1_io_pad\[8\] VSWITCH ) ( FILLER_726 VDDIO ) + ( mprj_pads.area1_io_pad\[8\] VDDIO ) ( FILLER_507 VDDIO ) + ( FILLER_725 VSWITCH ) ( FILLER_725 VDDIO ) + ( FILLER_724 VSWITCH ) ( FILLER_506 VSWITCH ) + ( FILLER_506 VDDIO ) ( FILLER_724 VDDIO ) + ( FILLER_505 VSWITCH ) ( FILLER_505 VDDIO ) + ( FILLER_723 VSWITCH ) ( FILLER_723 VDDIO ) + ( FILLER_722 VSWITCH ) ( FILLER_722 VDDIO ) + ( FILLER_721 VSWITCH ) ( FILLER_721 VDDIO ) + ( FILLER_720 VSWITCH ) ( FILLER_720 VDDIO ) + ( FILLER_719 VSWITCH ) ( FILLER_719 VDDIO ) + ( FILLER_501 VSWITCH ) ( FILLER_502 VSWITCH ) + ( FILLER_503 VSWITCH ) ( mprj_pads.area2_io_pad\[11\] VSWITCH ) + ( FILLER_502 VDDIO ) ( FILLER_503 VDDIO ) + ( mprj_pads.area2_io_pad\[11\] VDDIO ) ( FILLER_501 VDDIO ) + ( FILLER_718 VSWITCH ) ( FILLER_718 VDDIO ) + ( FILLER_497 VSWITCH ) ( FILLER_500 VSWITCH ) + ( FILLER_500 VDDIO ) ( FILLER_499 VSWITCH ) + ( FILLER_499 VDDIO ) ( FILLER_498 VSWITCH ) + ( FILLER_498 VDDIO ) ( FILLER_497 VDDIO ) + ( FILLER_495 VSWITCH ) ( mprj_pads.area1_io_pad\[7\] VSWITCH ) + ( mprj_pads.area1_io_pad\[7\] VDDIO ) ( FILLER_716 VSWITCH ) + ( FILLER_716 VDDIO ) ( FILLER_496 VSWITCH ) + ( FILLER_496 VDDIO ) ( FILLER_715 VSWITCH ) + ( FILLER_715 VDDIO ) ( FILLER_495 VDDIO ) + ( FILLER_714 VSWITCH ) ( FILLER_714 VDDIO ) + ( FILLER_492 VSWITCH ) ( FILLER_713 VSWITCH ) + ( FILLER_713 VDDIO ) ( FILLER_712 VSWITCH ) + ( FILLER_712 VDDIO ) ( FILLER_711 VSWITCH ) + ( FILLER_711 VDDIO ) ( mprj_pads.area2_io_pad\[12\] VSWITCH ) + ( mprj_pads.area2_io_pad\[12\] VDDIO ) ( FILLER_493 VSWITCH ) + ( FILLER_492 VDDIO ) ( FILLER_493 VDDIO ) + ( FILLER_710 VSWITCH ) ( FILLER_710 VDDIO ) + ( FILLER_709 VSWITCH ) ( FILLER_491 VSWITCH ) + ( FILLER_491 VDDIO ) ( FILLER_709 VDDIO ) + ( FILLER_488 VSWITCH ) ( FILLER_490 VSWITCH ) + ( FILLER_490 VDDIO ) ( FILLER_489 VSWITCH ) + ( FILLER_489 VDDIO ) ( FILLER_488 VDDIO ) + ( user1_vdda_hvclamp_pad\[1\] VSWITCH ) ( FILLER_487 VSWITCH ) + ( FILLER_487 VDDIO ) ( FILLER_707 VSWITCH ) + ( user1_vdda_hvclamp_pad\[1\] VDDIO ) ( FILLER_707 VDDIO ) + ( FILLER_706 VSWITCH ) ( FILLER_486 VSWITCH ) + ( FILLER_486 VDDIO ) ( FILLER_706 VDDIO ) + ( FILLER_485 VSWITCH ) ( FILLER_485 VDDIO ) + ( FILLER_705 VSWITCH ) ( FILLER_705 VDDIO ) + ( FILLER_704 VSWITCH ) ( FILLER_704 VDDIO ) + ( FILLER_703 VSWITCH ) ( FILLER_703 VDDIO ) + ( FILLER_702 VSWITCH ) ( FILLER_702 VDDIO ) + ( FILLER_481 VSWITCH ) ( FILLER_482 VSWITCH ) + ( FILLER_483 VSWITCH ) ( user2_vdda_hvclamp_pad VSWITCH ) + ( FILLER_482 VDDIO ) ( FILLER_483 VDDIO ) + ( user2_vdda_hvclamp_pad VDDIO ) ( FILLER_481 VDDIO ) + ( FILLER_701 VSWITCH ) ( FILLER_701 VDDIO ) + ( FILLER_700 VSWITCH ) ( FILLER_700 VDDIO ) + ( FILLER_478 VSWITCH ) ( FILLER_480 VSWITCH ) + ( FILLER_480 VDDIO ) ( FILLER_479 VSWITCH ) + ( FILLER_479 VDDIO ) ( FILLER_478 VDDIO ) + ( FILLER_476 VSWITCH ) ( FILLER_477 VSWITCH ) + ( FILLER_477 VDDIO ) ( FILLER_698 VSWITCH ) + ( user1_vssd_lvclamp_pad VSWITCH ) ( FILLER_698 VDDIO ) + ( user1_vssd_lvclamp_pad VDDIO ) ( FILLER_476 VDDIO ) + ( FILLER_697 VSWITCH ) ( FILLER_697 VDDIO ) + ( FILLER_475 VSWITCH ) ( FILLER_475 VDDIO ) + ( FILLER_693 VSWITCH ) ( FILLER_696 VSWITCH ) + ( FILLER_696 VDDIO ) ( FILLER_695 VSWITCH ) + ( FILLER_695 VDDIO ) ( FILLER_694 VSWITCH ) + ( FILLER_694 VDDIO ) ( FILLER_693 VDDIO ) + ( FILLER_472 VSWITCH ) ( FILLER_473 VSWITCH ) + ( user2_vssd_lvclamp_pad VSWITCH ) ( FILLER_473 VDDIO ) + ( user2_vssd_lvclamp_pad VDDIO ) ( FILLER_692 VSWITCH ) + ( FILLER_692 VDDIO ) ( FILLER_472 VDDIO ) + ( FILLER_690 VSWITCH ) ( FILLER_471 VSWITCH ) + ( FILLER_471 VDDIO ) ( FILLER_691 VSWITCH ) + ( FILLER_691 VDDIO ) ( FILLER_470 VSWITCH ) + ( FILLER_470 VDDIO ) ( FILLER_690 VDDIO ) + ( FILLER_468 VSWITCH ) ( FILLER_469 VSWITCH ) + ( FILLER_469 VDDIO ) ( FILLER_468 VDDIO ) + ( user1_vssa_hvclamp_pad\[1\] VSWITCH ) ( FILLER_467 VSWITCH ) + ( FILLER_467 VDDIO ) ( FILLER_466 VSWITCH ) + ( FILLER_466 VDDIO ) ( FILLER_688 VSWITCH ) + ( user1_vssa_hvclamp_pad\[1\] VDDIO ) ( FILLER_688 VDDIO ) + ( FILLER_465 VSWITCH ) ( FILLER_465 VDDIO ) + ( FILLER_687 VSWITCH ) ( FILLER_687 VDDIO ) + ( FILLER_686 VSWITCH ) ( FILLER_686 VDDIO ) + ( FILLER_685 VSWITCH ) ( FILLER_685 VDDIO ) + ( FILLER_684 VSWITCH ) ( FILLER_684 VDDIO ) + ( FILLER_462 VSWITCH ) ( FILLER_463 VSWITCH ) + ( mprj_pads.area2_io_pad\[13\] VSWITCH ) ( FILLER_462 VDDIO ) + ( FILLER_463 VDDIO ) ( mprj_pads.area2_io_pad\[13\] VDDIO ) + ( FILLER_683 VSWITCH ) ( FILLER_683 VDDIO ) + ( FILLER_682 VSWITCH ) ( FILLER_461 VSWITCH ) + ( FILLER_461 VDDIO ) ( FILLER_682 VDDIO ) + ( FILLER_681 VSWITCH ) ( FILLER_460 VSWITCH ) + ( FILLER_460 VDDIO ) ( FILLER_681 VDDIO ) + ( FILLER_458 VSWITCH ) ( FILLER_459 VSWITCH ) + ( FILLER_459 VDDIO ) ( FILLER_458 VDDIO ) + ( FILLER_679 VSWITCH ) ( FILLER_457 VSWITCH ) + ( FILLER_457 VDDIO ) ( FILLER_456 VSWITCH ) + ( FILLER_456 VDDIO ) ( mprj_pads.area1_io_pad\[6\] VSWITCH ) + ( FILLER_679 VDDIO ) ( mprj_pads.area1_io_pad\[6\] VDDIO ) + ( FILLER_455 VSWITCH ) ( FILLER_455 VDDIO ) + ( FILLER_675 VSWITCH ) ( FILLER_678 VSWITCH ) + ( FILLER_678 VDDIO ) ( FILLER_677 VSWITCH ) + ( FILLER_677 VDDIO ) ( FILLER_676 VSWITCH ) + ( FILLER_676 VDDIO ) ( FILLER_675 VDDIO ) + ( FILLER_453 VSWITCH ) ( mprj_pads.area2_io_pad\[14\] VSWITCH ) + ( mprj_pads.area2_io_pad\[14\] VDDIO ) ( FILLER_674 VSWITCH ) + ( FILLER_674 VDDIO ) ( FILLER_453 VDDIO ) + ( FILLER_452 VSWITCH ) ( FILLER_671 VSWITCH ) + ( FILLER_452 VDDIO ) ( FILLER_451 VSWITCH ) + ( FILLER_451 VDDIO ) ( FILLER_673 VSWITCH ) + ( FILLER_673 VDDIO ) ( FILLER_450 VSWITCH ) + ( FILLER_450 VDDIO ) ( FILLER_672 VSWITCH ) + ( FILLER_672 VDDIO ) ( FILLER_449 VSWITCH ) + ( FILLER_449 VDDIO ) ( FILLER_671 VDDIO ) + ( FILLER_448 VSWITCH ) ( FILLER_448 VDDIO ) + ( FILLER_446 VSWITCH ) ( FILLER_447 VSWITCH ) + ( FILLER_447 VDDIO ) ( FILLER_446 VDDIO ) + ( FILLER_445 VSWITCH ) ( FILLER_445 VDDIO ) + ( FILLER_666 VSWITCH ) ( mprj_pads.area1_io_pad\[5\] VSWITCH ) + ( mprj_pads.area1_io_pad\[5\] VDDIO ) ( FILLER_669 VSWITCH ) + ( FILLER_669 VDDIO ) ( FILLER_668 VSWITCH ) + ( FILLER_668 VDDIO ) ( FILLER_667 VSWITCH ) + ( FILLER_667 VDDIO ) ( FILLER_666 VDDIO ) + ( FILLER_662 VSWITCH ) ( FILLER_443 VSWITCH ) + ( mprj_pads.area2_io_pad\[15\] VSWITCH ) ( FILLER_443 VDDIO ) + ( mprj_pads.area2_io_pad\[15\] VDDIO ) ( FILLER_442 VSWITCH ) + ( FILLER_442 VDDIO ) ( FILLER_665 VSWITCH ) + ( FILLER_665 VDDIO ) ( FILLER_441 VSWITCH ) + ( FILLER_441 VDDIO ) ( FILLER_664 VSWITCH ) + ( FILLER_664 VDDIO ) ( FILLER_440 VSWITCH ) + ( FILLER_440 VDDIO ) ( FILLER_663 VSWITCH ) + ( FILLER_663 VDDIO ) ( FILLER_439 VSWITCH ) + ( FILLER_439 VDDIO ) ( FILLER_662 VDDIO ) + ( FILLER_438 VSWITCH ) ( FILLER_438 VDDIO ) + ( FILLER_436 VSWITCH ) ( FILLER_437 VSWITCH ) + ( FILLER_437 VDDIO ) ( FILLER_436 VDDIO ) + ( FILLER_435 VSWITCH ) ( FILLER_435 VDDIO ) + ( mprj_pads.area1_io_pad\[4\] VSWITCH ) + ( mprj_pads.area1_io_pad\[4\] VDDIO ) ( FILLER_660 VSWITCH ) + ( FILLER_660 VDDIO ) ( FILLER_659 VSWITCH ) + ( FILLER_659 VDDIO ) ( FILLER_658 VSWITCH ) + ( FILLER_658 VDDIO ) ( FILLER_657 VSWITCH ) + ( FILLER_433 VSWITCH ) ( mprj_pads.area2_io_pad\[16\] VSWITCH ) + ( FILLER_433 VDDIO ) ( mprj_pads.area2_io_pad\[16\] VDDIO ) + ( FILLER_657 VDDIO ) ( FILLER_656 VSWITCH ) + ( FILLER_432 VSWITCH ) ( FILLER_432 VDDIO ) + ( FILLER_431 VSWITCH ) ( FILLER_431 VDDIO ) + ( FILLER_656 VDDIO ) ( FILLER_655 VSWITCH ) + ( FILLER_430 VSWITCH ) ( FILLER_430 VDDIO ) + ( FILLER_655 VDDIO ) ( FILLER_429 VSWITCH ) + ( FILLER_429 VDDIO ) ( FILLER_654 VSWITCH ) + ( FILLER_654 VDDIO ) ( FILLER_653 VSWITCH ) + ( FILLER_428 VSWITCH ) ( FILLER_428 VDDIO ) + ( FILLER_653 VDDIO ) ( FILLER_426 VSWITCH ) + ( FILLER_427 VSWITCH ) ( FILLER_427 VDDIO ) + ( FILLER_426 VDDIO ) ( FILLER_425 VSWITCH ) + ( FILLER_425 VDDIO ) ( FILLER_649 VSWITCH ) + ( mprj_pads.area1_io_pad\[3\] VSWITCH ) + ( mprj_pads.area1_io_pad\[3\] VDDIO ) ( FILLER_650 VSWITCH ) + ( FILLER_651 VSWITCH ) ( FILLER_650 VDDIO ) + ( FILLER_651 VDDIO ) ( FILLER_649 VDDIO ) + ( FILLER_645 VSWITCH ) ( FILLER_648 VSWITCH ) + ( FILLER_648 VDDIO ) ( FILLER_423 VSWITCH ) + ( mprj_pads.area2_io_pad\[17\] VSWITCH ) ( FILLER_423 VDDIO ) + ( mprj_pads.area2_io_pad\[17\] VDDIO ) ( FILLER_422 VSWITCH ) + ( FILLER_422 VDDIO ) ( FILLER_647 VSWITCH ) + ( FILLER_647 VDDIO ) ( FILLER_421 VSWITCH ) + ( FILLER_421 VDDIO ) ( FILLER_646 VSWITCH ) + ( FILLER_646 VDDIO ) ( FILLER_420 VSWITCH ) + ( FILLER_420 VDDIO ) ( FILLER_645 VDDIO ) + ( FILLER_419 VSWITCH ) ( FILLER_419 VDDIO ) + ( FILLER_643 VSWITCH ) ( FILLER_644 VSWITCH ) + ( FILLER_644 VDDIO ) ( FILLER_418 VSWITCH ) + ( FILLER_418 VDDIO ) ( FILLER_643 VDDIO ) + ( FILLER_416 VSWITCH ) ( FILLER_417 VSWITCH ) + ( FILLER_417 VDDIO ) ( FILLER_416 VDDIO ) + ( FILLER_415 VSWITCH ) ( FILLER_415 VDDIO ) + ( FILLER_640 VSWITCH ) ( FILLER_641 VSWITCH ) + ( mprj_pads.area1_io_pad\[2\] VSWITCH ) ( FILLER_641 VDDIO ) + ( mprj_pads.area1_io_pad\[2\] VDDIO ) ( FILLER_640 VDDIO ) + ( FILLER_409 VSWITCH ) ( FILLER_639 VSWITCH ) + ( FILLER_639 VDDIO ) ( FILLER_413 VSWITCH ) + ( mprj_pads.area2_io_pad\[18\] VSWITCH ) ( FILLER_413 VDDIO ) + ( mprj_pads.area2_io_pad\[18\] VDDIO ) ( FILLER_412 VSWITCH ) + ( FILLER_412 VDDIO ) ( FILLER_411 VSWITCH ) + ( FILLER_411 VDDIO ) ( FILLER_638 VSWITCH ) + ( FILLER_638 VDDIO ) ( FILLER_410 VSWITCH ) + ( FILLER_410 VDDIO ) ( FILLER_637 VSWITCH ) + ( FILLER_637 VDDIO ) ( FILLER_409 VDDIO ) + ( FILLER_636 VSWITCH ) ( FILLER_636 VDDIO ) + ( FILLER_408 VSWITCH ) ( FILLER_408 VDDIO ) + ( FILLER_634 VSWITCH ) ( FILLER_635 VSWITCH ) + ( FILLER_635 VDDIO ) ( FILLER_634 VDDIO ) + ( FILLER_407 VSWITCH ) ( FILLER_407 VDDIO ) + ( FILLER_406 VSWITCH ) ( FILLER_406 VDDIO ) + ( FILLER_405 VSWITCH ) ( FILLER_405 VDDIO ) + ( FILLER_SB2 VSWITCH ) ( FILLER_SB2 VDDIO ) + ( FILLER_401 VSWITCH ) ( FILLER_402 VSWITCH ) + ( disconnect_vdda_2 VSWITCH ) ( FILLER_402 VDDIO ) + ( disconnect_vdda_2 VDDIO ) ( FILLER_401 VDDIO ) + ( FILLER_400 VSWITCH ) ( FILLER_400 VDDIO ) + ( FILLER_399 VSWITCH ) ( FILLER_632 VSWITCH ) + ( mprj_pads.area1_io_pad\[1\] VSWITCH ) ( FILLER_632 VDDIO ) + ( mprj_pads.area1_io_pad\[1\] VDDIO ) ( FILLER_399 VDDIO ) + ( FILLER_631 VSWITCH ) ( FILLER_631 VDDIO ) + ( FILLER_398 VSWITCH ) ( FILLER_398 VDDIO ) + ( FILLER_397 VSWITCH ) ( FILLER_630 VSWITCH ) + ( FILLER_630 VDDIO ) ( FILLER_629 VSWITCH ) + ( FILLER_629 VDDIO ) ( FILLER_397 VDDIO ) + ( FILLER_396 VSWITCH ) ( FILLER_396 VDDIO ) + ( FILLER_395 VSWITCH ) ( FILLER_628 VSWITCH ) + ( FILLER_628 VDDIO ) ( FILLER_395 VDDIO ) + ( FILLER_627 VSWITCH ) ( FILLER_627 VDDIO ) + ( FILLER_394 VSWITCH ) ( FILLER_394 VDDIO ) + ( FILLER_626 VSWITCH ) ( FILLER_626 VDDIO ) + ( FILLER_625 VSWITCH ) ( FILLER_625 VDDIO ) + ( FILLER_389 VSWITCH ) ( FILLER_624 VSWITCH ) + ( FILLER_624 VDDIO ) ( FILLER_392 VSWITCH ) + ( mgmt_vddio_hvclamp_pad\[0\] VSWITCH ) ( FILLER_392 VDDIO ) + ( mgmt_vddio_hvclamp_pad\[0\] VDDIO ) ( FILLER_391 VSWITCH ) + ( FILLER_391 VDDIO ) ( FILLER_390 VSWITCH ) + ( FILLER_390 VDDIO ) ( FILLER_389 VDDIO ) + ( mprj_pads.area1_io_pad\[0\] VSWITCH ) + ( mprj_pads.area1_io_pad\[0\] VDDIO ) ( FILLER_622 VSWITCH ) + ( FILLER_622 VDDIO ) ( FILLER_621 VSWITCH ) + ( FILLER_388 VSWITCH ) ( FILLER_388 VDDIO ) + ( FILLER_621 VDDIO ) ( FILLER_620 VSWITCH ) + ( FILLER_387 VSWITCH ) ( FILLER_387 VDDIO ) + ( FILLER_620 VDDIO ) ( FILLER_619 VSWITCH ) + ( FILLER_386 VSWITCH ) ( FILLER_386 VDDIO ) + ( FILLER_619 VDDIO ) ( FILLER_385 VSWITCH ) + ( FILLER_385 VDDIO ) ( FILLER_618 VSWITCH ) + ( FILLER_618 VDDIO ) ( FILLER_384 VSWITCH ) + ( FILLER_384 VDDIO ) ( FILLER_617 VSWITCH ) + ( FILLER_617 VDDIO ) ( FILLER_616 VSWITCH ) + ( FILLER_616 VDDIO ) ( FILLER_615 VSWITCH ) + ( FILLER_615 VDDIO ) ( FILLER_612 VSWITCH ) + ( FILLER_SB1 VSWITCH ) ( disconnect_vdda_1 VSWITCH ) + ( FILLER_SB1 VDDIO ) ( disconnect_vdda_1 VDDIO ) + ( FILLER_612 VDDIO ) ( FILLER_611 VSWITCH ) + ( FILLER_382 VSWITCH ) ( mgmt_vccd_lvclamp_pad VSWITCH ) + ( FILLER_382 VDDIO ) ( mgmt_vccd_lvclamp_pad VDDIO ) + ( FILLER_381 VSWITCH ) ( FILLER_381 VDDIO ) + ( FILLER_380 VSWITCH ) ( FILLER_380 VDDIO ) + ( FILLER_611 VDDIO ) ( FILLER_379 VSWITCH ) + ( FILLER_379 VDDIO ) ( FILLER_610 VSWITCH ) + ( FILLER_610 VDDIO ) ( FILLER_609 VSWITCH ) + ( FILLER_378 VSWITCH ) ( FILLER_378 VDDIO ) + ( FILLER_609 VDDIO ) ( FILLER_608 VSWITCH ) + ( FILLER_608 VDDIO ) ( FILLER_607 VSWITCH ) + ( FILLER_377 VSWITCH ) ( FILLER_377 VDDIO ) + ( FILLER_607 VDDIO ) ( FILLER_606 VSWITCH ) + ( FILLER_376 VSWITCH ) ( FILLER_376 VDDIO ) + ( FILLER_606 VDDIO ) ( FILLER_375 VSWITCH ) + ( FILLER_375 VDDIO ) ( mgmt_corner\[1\] VDDIO ) + ( FILLER_374 VSWITCH ) ( FILLER_374 VDDIO ) + ( FILLER_605 VSWITCH ) ( FILLER_605 VDDIO ) + ( FILLER_373 VDDIO ) ( FILLER_372 VDDIO ) ( FILLER_371 VDDIO ) + ( FILLER_370 VDDIO ) ( FILLER_369 VDDIO ) ( FILLER_368 VDDIO ) + ( bus_tie_72 VDDIO ) ( bus_tie_71 VDDIO ) ( bus_tie_70 VDDIO ) + ( bus_tie_69 VDDIO ) ( bus_tie_68 VDDIO ) ( FILLER_361 VDDIO ) + ( bus_tie_67 VDDIO ) ( FILLER_358 VDDIO ) ( FILLER_360 VDDIO ) + ( FILLER_359 VDDIO ) ( FILLER_357 VDDIO ) ( FILLER_353 VDDIO ) + ( FILLER_354 VDDIO ) ( FILLER_355 VDDIO ) + ( mgmt_vdda_hvclamp_pad VDDIO ) ( FILLER_351 VDDIO ) + ( FILLER_352 VDDIO ) ( bus_tie_65 VDDIO ) ( bus_tie_66 VDDIO ) + ( FILLER_343 VDDIO ) ( bus_tie_64 VDDIO ) ( bus_tie_63 VDDIO ) + ( bus_tie_62 VDDIO ) ( FILLER_344 VDDIO ) ( bus_tie_61 VDDIO ) + ( FILLER_340 VDDIO ) ( FILLER_342 VDDIO ) ( FILLER_341 VDDIO ) + ( FILLER_335 VDDIO ) ( FILLER_337 VDDIO ) ( FILLER_338 VDDIO ) + ( mgmt_vssio_hvclamp_pad\[0\] VDDIO ) ( FILLER_336 VDDIO ) + ( FILLER_334 VDDIO ) ( bus_tie_58 VDDIO ) ( bus_tie_60 VDDIO ) + ( bus_tie_59 VDDIO ) ( bus_tie_56 VDDIO ) ( bus_tie_57 VDDIO ) + ( FILLER_323 VDDIO ) ( FILLER_326 VDDIO ) ( FILLER_327 VDDIO ) + ( bus_tie_55 VDDIO ) ( FILLER_325 VDDIO ) ( FILLER_324 VDDIO ) + ( FILLER_317 VDDIO ) ( FILLER_321 VDDIO ) ( clock_pad VDDIO ) + ( FILLER_319 VDDIO ) ( FILLER_320 VDDIO ) ( FILLER_318 VDDIO ) + ( bus_tie_54 VDDIO ) ( bus_tie_53 VDDIO ) ( bus_tie_52 VDDIO ) + ( bus_tie_51 VDDIO ) ( bus_tie_50 VDDIO ) ( FILLER_308 VDDIO ) + ( FILLER_309 VDDIO ) ( FILLER_310 VDDIO ) ( bus_tie_49 VDDIO ) + ( FILLER_307 VDDIO ) ( FILLER_306 VDDIO ) ( FILLER_301 VDDIO ) + ( flash_io1_pad VDDIO ) ( FILLER_302 VDDIO ) + ( FILLER_303 VDDIO ) ( FILLER_304 VDDIO ) ( FILLER_300 VDDIO ) + ( bus_tie_46 VDDIO ) ( bus_tie_48 VDDIO ) ( bus_tie_47 VDDIO ) + ( FILLER_290 VDDIO ) ( bus_tie_45 VDDIO ) ( bus_tie_44 VDDIO ) + ( FILLER_292 VDDIO ) ( FILLER_293 VDDIO ) ( bus_tie_43 VDDIO ) + ( FILLER_291 VDDIO ) ( FILLER_289 VDDIO ) ( FILLER_283 VDDIO ) + ( FILLER_286 VDDIO ) ( FILLER_287 VDDIO ) + ( flash_io0_pad VDDIO ) ( FILLER_285 VDDIO ) + ( FILLER_284 VDDIO ) ( bus_tie_39 VDDIO ) ( bus_tie_42 VDDIO ) + ( bus_tie_41 VDDIO ) ( bus_tie_40 VDDIO ) ( FILLER_273 VDDIO ) + ( bus_tie_38 VDDIO ) ( FILLER_275 VDDIO ) ( FILLER_276 VDDIO ) + ( bus_tie_37 VDDIO ) ( FILLER_274 VDDIO ) ( FILLER_272 VDDIO ) + ( FILLER_266 VDDIO ) ( FILLER_269 VDDIO ) ( FILLER_270 VDDIO ) + ( flash_clk_pad VDDIO ) ( FILLER_268 VDDIO ) + ( FILLER_267 VDDIO ) ( bus_tie_36 VDDIO ) ( bus_tie_35 VDDIO ) + ( bus_tie_34 VDDIO ) ( bus_tie_33 VDDIO ) ( bus_tie_32 VDDIO ) + ( FILLER_257 VDDIO ) ( FILLER_258 VDDIO ) ( FILLER_259 VDDIO ) + ( bus_tie_31 VDDIO ) ( FILLER_256 VDDIO ) ( FILLER_255 VDDIO ) + ( FILLER_249 VDDIO ) ( FILLER_252 VDDIO ) ( FILLER_253 VDDIO ) + ( flash_csb_pad VDDIO ) ( FILLER_251 VDDIO ) + ( FILLER_250 VDDIO ) ( bus_tie_27 VDDIO ) ( bus_tie_30 VDDIO ) + ( bus_tie_29 VDDIO ) ( bus_tie_28 VDDIO ) ( FILLER_238 VDDIO ) + ( bus_tie_26 VDDIO ) ( FILLER_242 VDDIO ) ( bus_tie_25 VDDIO ) + ( FILLER_240 VDDIO ) ( FILLER_241 VDDIO ) ( FILLER_239 VDDIO ) + ( FILLER_232 VDDIO ) ( FILLER_236 VDDIO ) + ( mgmt_vssd_lvclamp_pad VDDIO ) ( FILLER_234 VDDIO ) + ( FILLER_235 VDDIO ) ( FILLER_233 VDDIO ) ( bus_tie_24 VDDIO ) + ( bus_tie_20 VDDIO ) ( bus_tie_23 VDDIO ) ( bus_tie_22 VDDIO ) + ( bus_tie_21 VDDIO ) ( FILLER_221 VDDIO ) ( FILLER_224 VDDIO ) + ( FILLER_225 VDDIO ) ( bus_tie_19 VDDIO ) ( FILLER_223 VDDIO ) + ( FILLER_222 VDDIO ) ( FILLER_217 VDDIO ) ( bus_tie_9 VDDIO ) + ( FILLER_218 VDDIO ) ( FILLER_219 VDDIO ) ( FILLER_215 VDDIO ) + ( FILLER_216 VDDIO ) ( bus_tie_17 VDDIO ) ( bus_tie_18 VDDIO ) + ( bus_tie_14 VDDIO ) ( bus_tie_16 VDDIO ) ( bus_tie_15 VDDIO ) + ( FILLER_204 VDDIO ) ( FILLER_207 VDDIO ) ( FILLER_208 VDDIO ) + ( bus_tie_13 VDDIO ) ( FILLER_206 VDDIO ) ( FILLER_205 VDDIO ) + ( FILLER_199 VDDIO ) ( FILLER_201 VDDIO ) ( FILLER_202 VDDIO ) + ( resetb_pad VDDIO ) ( FILLER_200 VDDIO ) ( FILLER_198 VDDIO ) + ( bus_tie_12 VDDIO ) ( bus_tie_11 VDDIO ) ( bus_tie_10 VDDIO ) + ( bus_tie_8 VDDIO ) ( bus_tie_7 VDDIO ) ( FILLER_190 VDDIO ) + ( FILLER_191 VDDIO ) ( bus_tie_6 VDDIO ) ( FILLER_188 VDDIO ) + ( FILLER_189 VDDIO ) ( FILLER_187 VDDIO ) ( FILLER_182 VDDIO ) + ( FILLER_185 VDDIO ) ( mgmt_vssa_hvclamp_pad VDDIO ) + ( FILLER_183 VDDIO ) ( FILLER_184 VDDIO ) ( FILLER_181 VDDIO ) + ( bus_tie_4 VDDIO ) ( bus_tie_5 VDDIO ) ( bus_tie_3 VDDIO ) + ( FILLER_171 VDDIO ) ( bus_tie_2 VDDIO ) ( bus_tie_1 VDDIO ) + ( FILLER_173 VDDIO ) ( FILLER_174 VDDIO ) ( gpio_pad VSWITCH ) + ( FILLER_172 VDDIO ) ( mgmt_corner\[0\] VDDIO ) + ( FILLER_170 VDDIO ) ( mgmt_corner\[1\] VSWITCH ) + ( FILLER_373 VSWITCH ) ( FILLER_372 VSWITCH ) + ( FILLER_371 VSWITCH ) ( FILLER_370 VSWITCH ) + ( FILLER_369 VSWITCH ) ( FILLER_368 VSWITCH ) + ( bus_tie_72 VSWITCH ) ( bus_tie_71 VSWITCH ) + ( bus_tie_70 VSWITCH ) ( bus_tie_69 VSWITCH ) + ( bus_tie_68 VSWITCH ) ( FILLER_361 VSWITCH ) + ( bus_tie_67 VSWITCH ) ( FILLER_358 VSWITCH ) + ( FILLER_360 VSWITCH ) ( FILLER_359 VSWITCH ) + ( FILLER_357 VSWITCH ) ( FILLER_353 VSWITCH ) + ( FILLER_354 VSWITCH ) ( FILLER_355 VSWITCH ) + ( mgmt_vdda_hvclamp_pad VSWITCH ) ( FILLER_351 VSWITCH ) + ( FILLER_352 VSWITCH ) ( bus_tie_65 VSWITCH ) + ( bus_tie_66 VSWITCH ) ( FILLER_343 VSWITCH ) + ( bus_tie_64 VSWITCH ) ( bus_tie_63 VSWITCH ) + ( bus_tie_62 VSWITCH ) ( FILLER_344 VSWITCH ) + ( bus_tie_61 VSWITCH ) ( FILLER_340 VSWITCH ) + ( FILLER_342 VSWITCH ) ( FILLER_341 VSWITCH ) + ( FILLER_335 VSWITCH ) ( FILLER_337 VSWITCH ) + ( FILLER_338 VSWITCH ) ( mgmt_vssio_hvclamp_pad\[0\] VSWITCH ) + ( FILLER_336 VSWITCH ) ( FILLER_334 VSWITCH ) + ( bus_tie_58 VSWITCH ) ( bus_tie_60 VSWITCH ) + ( bus_tie_59 VSWITCH ) ( bus_tie_56 VSWITCH ) + ( bus_tie_57 VSWITCH ) ( FILLER_323 VSWITCH ) + ( FILLER_326 VSWITCH ) ( FILLER_327 VSWITCH ) + ( bus_tie_55 VSWITCH ) ( FILLER_325 VSWITCH ) + ( FILLER_324 VSWITCH ) ( FILLER_317 VSWITCH ) + ( FILLER_321 VSWITCH ) ( clock_pad VSWITCH ) + ( FILLER_319 VSWITCH ) ( FILLER_320 VSWITCH ) + ( FILLER_318 VSWITCH ) ( bus_tie_54 VSWITCH ) + ( bus_tie_53 VSWITCH ) ( bus_tie_52 VSWITCH ) + ( bus_tie_51 VSWITCH ) ( bus_tie_50 VSWITCH ) + ( FILLER_308 VSWITCH ) ( FILLER_309 VSWITCH ) + ( FILLER_310 VSWITCH ) ( bus_tie_49 VSWITCH ) + ( FILLER_307 VSWITCH ) ( FILLER_306 VSWITCH ) + ( FILLER_301 VSWITCH ) ( flash_io1_pad VSWITCH ) + ( FILLER_302 VSWITCH ) ( FILLER_303 VSWITCH ) + ( FILLER_304 VSWITCH ) ( FILLER_300 VSWITCH ) + ( bus_tie_46 VSWITCH ) ( bus_tie_48 VSWITCH ) + ( bus_tie_47 VSWITCH ) ( FILLER_290 VSWITCH ) + ( bus_tie_45 VSWITCH ) ( bus_tie_44 VSWITCH ) + ( FILLER_292 VSWITCH ) ( FILLER_293 VSWITCH ) + ( bus_tie_43 VSWITCH ) ( FILLER_291 VSWITCH ) + ( FILLER_289 VSWITCH ) ( FILLER_283 VSWITCH ) + ( FILLER_286 VSWITCH ) ( FILLER_287 VSWITCH ) + ( flash_io0_pad VSWITCH ) ( FILLER_285 VSWITCH ) + ( FILLER_284 VSWITCH ) ( bus_tie_39 VSWITCH ) + ( bus_tie_42 VSWITCH ) ( bus_tie_41 VSWITCH ) + ( bus_tie_40 VSWITCH ) ( FILLER_273 VSWITCH ) + ( bus_tie_38 VSWITCH ) ( FILLER_275 VSWITCH ) + ( FILLER_276 VSWITCH ) ( bus_tie_37 VSWITCH ) + ( FILLER_274 VSWITCH ) ( FILLER_272 VSWITCH ) + ( FILLER_266 VSWITCH ) ( FILLER_269 VSWITCH ) + ( FILLER_270 VSWITCH ) ( flash_clk_pad VSWITCH ) + ( FILLER_268 VSWITCH ) ( FILLER_267 VSWITCH ) + ( bus_tie_36 VSWITCH ) ( bus_tie_35 VSWITCH ) + ( bus_tie_34 VSWITCH ) ( bus_tie_33 VSWITCH ) + ( bus_tie_32 VSWITCH ) ( FILLER_257 VSWITCH ) + ( FILLER_258 VSWITCH ) ( FILLER_259 VSWITCH ) + ( bus_tie_31 VSWITCH ) ( FILLER_256 VSWITCH ) + ( FILLER_255 VSWITCH ) ( FILLER_249 VSWITCH ) + ( FILLER_252 VSWITCH ) ( FILLER_253 VSWITCH ) + ( flash_csb_pad VSWITCH ) ( FILLER_251 VSWITCH ) + ( FILLER_250 VSWITCH ) ( bus_tie_27 VSWITCH ) + ( bus_tie_30 VSWITCH ) ( bus_tie_29 VSWITCH ) + ( bus_tie_28 VSWITCH ) ( FILLER_238 VSWITCH ) + ( bus_tie_26 VSWITCH ) ( FILLER_242 VSWITCH ) + ( bus_tie_25 VSWITCH ) ( FILLER_240 VSWITCH ) + ( FILLER_241 VSWITCH ) ( FILLER_239 VSWITCH ) + ( FILLER_232 VSWITCH ) ( FILLER_236 VSWITCH ) + ( mgmt_vssd_lvclamp_pad VSWITCH ) ( FILLER_234 VSWITCH ) + ( FILLER_235 VSWITCH ) ( FILLER_233 VSWITCH ) + ( bus_tie_24 VSWITCH ) ( bus_tie_20 VSWITCH ) + ( bus_tie_23 VSWITCH ) ( bus_tie_22 VSWITCH ) + ( bus_tie_21 VSWITCH ) ( FILLER_221 VSWITCH ) + ( FILLER_224 VSWITCH ) ( FILLER_225 VSWITCH ) + ( bus_tie_19 VSWITCH ) ( FILLER_223 VSWITCH ) + ( FILLER_222 VSWITCH ) ( FILLER_217 VSWITCH ) + ( bus_tie_9 VSWITCH ) ( FILLER_218 VSWITCH ) + ( FILLER_219 VSWITCH ) ( FILLER_215 VSWITCH ) + ( FILLER_216 VSWITCH ) ( bus_tie_17 VSWITCH ) + ( bus_tie_18 VSWITCH ) ( bus_tie_14 VSWITCH ) + ( bus_tie_16 VSWITCH ) ( bus_tie_15 VSWITCH ) + ( FILLER_204 VSWITCH ) ( FILLER_207 VSWITCH ) + ( FILLER_208 VSWITCH ) ( bus_tie_13 VSWITCH ) + ( FILLER_206 VSWITCH ) ( FILLER_205 VSWITCH ) + ( FILLER_199 VSWITCH ) ( FILLER_201 VSWITCH ) + ( FILLER_202 VSWITCH ) ( resetb_pad VSWITCH ) + ( FILLER_200 VSWITCH ) ( FILLER_198 VSWITCH ) + ( bus_tie_12 VSWITCH ) ( bus_tie_11 VSWITCH ) + ( bus_tie_10 VSWITCH ) ( bus_tie_8 VSWITCH ) + ( bus_tie_7 VSWITCH ) ( FILLER_190 VSWITCH ) + ( FILLER_191 VSWITCH ) ( bus_tie_6 VSWITCH ) + ( FILLER_188 VSWITCH ) ( FILLER_189 VSWITCH ) + ( FILLER_187 VSWITCH ) ( FILLER_182 VSWITCH ) + ( FILLER_185 VSWITCH ) ( mgmt_vssa_hvclamp_pad VSWITCH ) + ( FILLER_183 VSWITCH ) ( FILLER_184 VSWITCH ) + ( FILLER_181 VSWITCH ) ( bus_tie_4 VSWITCH ) + ( bus_tie_5 VSWITCH ) ( bus_tie_3 VSWITCH ) + ( FILLER_171 VSWITCH ) ( bus_tie_2 VSWITCH ) + ( bus_tie_1 VSWITCH ) ( FILLER_173 VSWITCH ) + ( FILLER_174 VSWITCH ) ( FILLER_172 VSWITCH ) + ( FILLER_170 VSWITCH ) ( mgmt_corner\[0\] VSWITCH ) ; + - vdda ( FILLER_401 VDDA ) ( FILLER_402 VDDA ) ( FILLER_400 VDDA ) + ( FILLER_399 VDDA ) ( FILLER_398 VDDA ) ( FILLER_397 VDDA ) + ( FILLER_396 VDDA ) ( FILLER_395 VDDA ) ( FILLER_394 VDDA ) + ( FILLER_389 VDDA ) ( FILLER_392 VDDA ) + ( mgmt_vddio_hvclamp_pad\[0\] VDDA ) ( FILLER_391 VDDA ) + ( FILLER_390 VDDA ) ( FILLER_385 VDDA ) ( FILLER_388 VDDA ) + ( FILLER_387 VDDA ) ( FILLER_386 VDDA ) ( FILLER_384 VDDA ) + ( FILLER_612 VDDA ) ( FILLER_611 VDDA ) ( FILLER_382 VDDA ) + ( mgmt_vccd_lvclamp_pad VDDA ) ( FILLER_381 VDDA ) + ( FILLER_380 VDDA ) ( FILLER_379 VDDA ) ( FILLER_610 VDDA ) + ( FILLER_609 VDDA ) ( FILLER_378 VDDA ) ( FILLER_608 VDDA ) + ( FILLER_607 VDDA ) ( FILLER_377 VDDA ) ( FILLER_606 VDDA ) + ( FILLER_376 VDDA ) ( FILLER_375 VDDA ) + ( mgmt_corner\[1\] VDDA ) ( FILLER_374 VDDA ) + ( FILLER_605 VDDA ) ( FILLER_373 VDDA ) ( FILLER_372 VDDA ) + ( FILLER_371 VDDA ) ( FILLER_370 VDDA ) ( FILLER_369 VDDA ) + ( FILLER_368 VDDA ) ( bus_tie_72 VDDA ) ( bus_tie_71 VDDA ) + ( bus_tie_70 VDDA ) ( bus_tie_69 VDDA ) ( bus_tie_68 VDDA ) + ( FILLER_361 VDDA ) ( bus_tie_67 VDDA ) ( FILLER_358 VDDA ) + ( FILLER_360 VDDA ) ( FILLER_359 VDDA ) ( FILLER_357 VDDA ) + ( FILLER_353 VDDA ) ( FILLER_354 VDDA ) ( FILLER_355 VDDA ) + ( mgmt_vdda_hvclamp_pad VDDA ) ( FILLER_351 VDDA ) + ( FILLER_352 VDDA ) ( bus_tie_65 VDDA ) ( bus_tie_66 VDDA ) + ( FILLER_343 VDDA ) ( bus_tie_64 VDDA ) ( bus_tie_63 VDDA ) + ( bus_tie_62 VDDA ) ( FILLER_344 VDDA ) ( bus_tie_61 VDDA ) + ( FILLER_340 VDDA ) ( FILLER_342 VDDA ) ( FILLER_341 VDDA ) + ( FILLER_335 VDDA ) ( FILLER_337 VDDA ) ( FILLER_338 VDDA ) + ( mgmt_vssio_hvclamp_pad\[0\] VDDA ) ( FILLER_336 VDDA ) + ( FILLER_334 VDDA ) ( bus_tie_58 VDDA ) ( bus_tie_60 VDDA ) + ( bus_tie_59 VDDA ) ( bus_tie_56 VDDA ) ( bus_tie_57 VDDA ) + ( FILLER_323 VDDA ) ( FILLER_326 VDDA ) ( FILLER_327 VDDA ) + ( bus_tie_55 VDDA ) ( FILLER_325 VDDA ) ( FILLER_324 VDDA ) + ( FILLER_317 VDDA ) ( FILLER_321 VDDA ) ( gpio_pad VDDA ) + ( FILLER_319 VDDA ) ( FILLER_320 VDDA ) ( FILLER_318 VDDA ) + ( bus_tie_54 VDDA ) ( bus_tie_53 VDDA ) ( bus_tie_52 VDDA ) + ( bus_tie_51 VDDA ) ( bus_tie_50 VDDA ) ( FILLER_308 VDDA ) + ( FILLER_309 VDDA ) ( FILLER_310 VDDA ) ( bus_tie_49 VDDA ) + ( FILLER_307 VDDA ) ( FILLER_306 VDDA ) ( FILLER_301 VDDA ) + ( flash_io1_pad VDDA ) ( FILLER_302 VDDA ) ( FILLER_303 VDDA ) + ( FILLER_304 VDDA ) ( FILLER_300 VDDA ) ( bus_tie_46 VDDA ) + ( bus_tie_48 VDDA ) ( bus_tie_47 VDDA ) ( FILLER_290 VDDA ) + ( bus_tie_45 VDDA ) ( bus_tie_44 VDDA ) ( FILLER_292 VDDA ) + ( FILLER_293 VDDA ) ( bus_tie_43 VDDA ) ( FILLER_291 VDDA ) + ( FILLER_289 VDDA ) ( FILLER_283 VDDA ) ( FILLER_286 VDDA ) + ( FILLER_287 VDDA ) ( flash_io0_pad VDDA ) ( FILLER_285 VDDA ) + ( FILLER_284 VDDA ) ( bus_tie_39 VDDA ) ( bus_tie_42 VDDA ) + ( bus_tie_41 VDDA ) ( bus_tie_40 VDDA ) ( FILLER_273 VDDA ) + ( bus_tie_38 VDDA ) ( FILLER_275 VDDA ) ( FILLER_276 VDDA ) + ( bus_tie_37 VDDA ) ( FILLER_274 VDDA ) ( FILLER_272 VDDA ) + ( FILLER_266 VDDA ) ( FILLER_269 VDDA ) ( FILLER_270 VDDA ) + ( flash_clk_pad VDDA ) ( FILLER_268 VDDA ) ( FILLER_267 VDDA ) + ( bus_tie_36 VDDA ) ( bus_tie_35 VDDA ) ( bus_tie_34 VDDA ) + ( bus_tie_33 VDDA ) ( bus_tie_32 VDDA ) ( FILLER_257 VDDA ) + ( FILLER_258 VDDA ) ( FILLER_259 VDDA ) ( bus_tie_31 VDDA ) + ( FILLER_256 VDDA ) ( FILLER_255 VDDA ) ( FILLER_249 VDDA ) + ( FILLER_252 VDDA ) ( FILLER_253 VDDA ) ( flash_csb_pad VDDA ) + ( FILLER_251 VDDA ) ( FILLER_250 VDDA ) ( bus_tie_27 VDDA ) + ( bus_tie_30 VDDA ) ( bus_tie_29 VDDA ) ( bus_tie_28 VDDA ) + ( FILLER_238 VDDA ) ( bus_tie_26 VDDA ) ( FILLER_242 VDDA ) + ( bus_tie_25 VDDA ) ( FILLER_240 VDDA ) ( FILLER_241 VDDA ) + ( FILLER_239 VDDA ) ( FILLER_232 VDDA ) ( FILLER_236 VDDA ) + ( mgmt_vssd_lvclamp_pad VDDA ) ( FILLER_234 VDDA ) + ( FILLER_235 VDDA ) ( FILLER_233 VDDA ) ( bus_tie_24 VDDA ) + ( bus_tie_20 VDDA ) ( bus_tie_23 VDDA ) ( bus_tie_22 VDDA ) + ( bus_tie_21 VDDA ) ( FILLER_221 VDDA ) ( FILLER_224 VDDA ) + ( FILLER_225 VDDA ) ( bus_tie_19 VDDA ) ( FILLER_223 VDDA ) + ( FILLER_222 VDDA ) ( FILLER_217 VDDA ) ( clock_pad VDDA ) + ( FILLER_218 VDDA ) ( FILLER_219 VDDA ) ( FILLER_215 VDDA ) + ( FILLER_216 VDDA ) ( bus_tie_17 VDDA ) ( bus_tie_18 VDDA ) + ( bus_tie_14 VDDA ) ( bus_tie_16 VDDA ) ( bus_tie_15 VDDA ) + ( FILLER_204 VDDA ) ( FILLER_207 VDDA ) ( FILLER_208 VDDA ) + ( bus_tie_13 VDDA ) ( FILLER_206 VDDA ) ( FILLER_205 VDDA ) + ( FILLER_199 VDDA ) ( FILLER_201 VDDA ) ( FILLER_202 VDDA ) + ( resetb_pad VDDA ) ( bus_tie_9 VDDA ) ( FILLER_200 VDDA ) + ( FILLER_198 VDDA ) ( bus_tie_12 VDDA ) ( bus_tie_11 VDDA ) + ( bus_tie_10 VDDA ) ( bus_tie_8 VDDA ) ( bus_tie_7 VDDA ) + ( FILLER_190 VDDA ) ( FILLER_191 VDDA ) ( bus_tie_6 VDDA ) + ( FILLER_188 VDDA ) ( FILLER_189 VDDA ) ( FILLER_187 VDDA ) + ( FILLER_182 VDDA ) ( FILLER_185 VDDA ) + ( mgmt_vssa_hvclamp_pad VDDA ) ( FILLER_183 VDDA ) + ( FILLER_184 VDDA ) ( FILLER_181 VDDA ) ( bus_tie_4 VDDA ) + ( bus_tie_5 VDDA ) ( bus_tie_3 VDDA ) ( FILLER_171 VDDA ) + ( bus_tie_2 VDDA ) ( bus_tie_1 VDDA ) ( FILLER_173 VDDA ) + ( FILLER_174 VDDA ) ( FILLER_172 VDDA ) ( FILLER_170 VDDA ) + ( mgmt_corner\[0\] VDDA ) + + ROUTED met4 TAPERRULE met4_width_960 ( 663480 181765 ) ( * 184915 ) ; + - gpio_pad/AMUXBUS_A ( gpio_pad AMUXBUS_A ) + ( FILLER_167 AMUXBUS_A ) ( FILLER_168 AMUXBUS_A ) + ( FILLER_169 AMUXBUS_A ) ( FILLER_166 AMUXBUS_A ) + ( FILLER_165 AMUXBUS_A ) ( FILLER_164 AMUXBUS_A ) + ( FILLER_163 AMUXBUS_A ) ( FILLER_162 AMUXBUS_A ) + ( FILLER_161 AMUXBUS_A ) ( FILLER_160 AMUXBUS_A ) + ( FILLER_159 AMUXBUS_A ) ( FILLER_158 AMUXBUS_A ) + ( FILLER_157 AMUXBUS_A ) ( FILLER_153 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[15\] AMUXBUS_A ) + ( FILLER_154 AMUXBUS_A ) ( FILLER_155 AMUXBUS_A ) + ( FILLER_149 AMUXBUS_A ) ( FILLER_152 AMUXBUS_A ) + ( FILLER_151 AMUXBUS_A ) ( FILLER_150 AMUXBUS_A ) + ( FILLER_145 AMUXBUS_A ) ( FILLER_148 AMUXBUS_A ) + ( FILLER_147 AMUXBUS_A ) ( FILLER_146 AMUXBUS_A ) + ( FILLER_144 AMUXBUS_A ) ( FILLER_137 AMUXBUS_A ) + ( user1_vssa_hvclamp_pad\[0\] AMUXBUS_A ) + ( FILLER_140 AMUXBUS_A ) ( FILLER_141 AMUXBUS_A ) + ( FILLER_142 AMUXBUS_A ) ( FILLER_139 AMUXBUS_A ) + ( FILLER_138 AMUXBUS_A ) ( FILLER_134 AMUXBUS_A ) + ( FILLER_136 AMUXBUS_A ) ( FILLER_135 AMUXBUS_A ) + ( FILLER_131 AMUXBUS_A ) ( FILLER_133 AMUXBUS_A ) + ( FILLER_132 AMUXBUS_A ) ( FILLER_127 AMUXBUS_A ) + ( FILLER_128 AMUXBUS_A ) ( FILLER_129 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[16\] AMUXBUS_A ) + ( FILLER_123 AMUXBUS_A ) ( FILLER_126 AMUXBUS_A ) + ( FILLER_125 AMUXBUS_A ) ( FILLER_124 AMUXBUS_A ) + ( FILLER_122 AMUXBUS_A ) ( FILLER_121 AMUXBUS_A ) + ( FILLER_120 AMUXBUS_A ) ( FILLER_119 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[17\] AMUXBUS_A ) + ( FILLER_118 AMUXBUS_A ) ( FILLER_116 AMUXBUS_A ) + ( FILLER_115 AMUXBUS_A ) ( FILLER_114 AMUXBUS_A ) + ( FILLER_113 AMUXBUS_A ) ( FILLER_112 AMUXBUS_A ) + ( FILLER_111 AMUXBUS_A ) ( FILLER_110 AMUXBUS_A ) + ( FILLER_109 AMUXBUS_A ) ( FILLER_108 AMUXBUS_A ) + ( FILLER_107 AMUXBUS_A ) ( FILLER_106 AMUXBUS_A ) + ( FILLER_105 AMUXBUS_A ) ( FILLER_104 AMUXBUS_A ) + ( FILLER_102 AMUXBUS_A ) ( FILLER_103 AMUXBUS_A ) + ( FILLER_98 AMUXBUS_A ) ( FILLER_101 AMUXBUS_A ) + ( FILLER_100 AMUXBUS_A ) ( FILLER_99 AMUXBUS_A ) + ( FILLER_94 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[18\] AMUXBUS_A ) + ( FILLER_95 AMUXBUS_A ) ( FILLER_96 AMUXBUS_A ) + ( FILLER_93 AMUXBUS_A ) ( FILLER_92 AMUXBUS_A ) + ( FILLER_91 AMUXBUS_A ) ( FILLER_90 AMUXBUS_A ) + ( FILLER_89 AMUXBUS_A ) ( FILLER_88 AMUXBUS_A ) + ( FILLER_86 AMUXBUS_A ) ( FILLER_87 AMUXBUS_A ) + ( FILLER_SB3 AMUXBUS_A ) ( disconnect_vdda_0 AMUXBUS_A ) + ( FILLER_78 AMUXBUS_A ) + ( mgmt_vssio_hvclamp_pad\[1\] AMUXBUS_A ) + ( FILLER_80 AMUXBUS_A ) ( FILLER_81 AMUXBUS_A ) + ( FILLER_82 AMUXBUS_A ) ( FILLER_79 AMUXBUS_A ) + ( FILLER_75 AMUXBUS_A ) ( FILLER_77 AMUXBUS_A ) + ( FILLER_76 AMUXBUS_A ) ( FILLER_71 AMUXBUS_A ) + ( FILLER_74 AMUXBUS_A ) ( FILLER_73 AMUXBUS_A ) + ( FILLER_72 AMUXBUS_A ) ( FILLER_63 AMUXBUS_A ) + ( FILLER_68 AMUXBUS_A ) ( FILLER_69 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[0\] AMUXBUS_A ) + ( FILLER_66 AMUXBUS_A ) ( FILLER_67 AMUXBUS_A ) + ( FILLER_65 AMUXBUS_A ) ( FILLER_64 AMUXBUS_A ) + ( FILLER_59 AMUXBUS_A ) ( FILLER_62 AMUXBUS_A ) + ( FILLER_61 AMUXBUS_A ) ( FILLER_60 AMUXBUS_A ) + ( FILLER_57 AMUXBUS_A ) ( FILLER_58 AMUXBUS_A ) + ( FILLER_53 AMUXBUS_A ) ( FILLER_54 AMUXBUS_A ) + ( FILLER_55 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[1\] AMUXBUS_A ) + ( FILLER_48 AMUXBUS_A ) ( FILLER_52 AMUXBUS_A ) + ( FILLER_51 AMUXBUS_A ) ( FILLER_50 AMUXBUS_A ) + ( FILLER_49 AMUXBUS_A ) ( FILLER_46 AMUXBUS_A ) + ( FILLER_47 AMUXBUS_A ) ( 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AMUXBUS_A ) ( FILLER_396 AMUXBUS_A ) + ( FILLER_395 AMUXBUS_A ) ( FILLER_628 AMUXBUS_A ) + ( FILLER_627 AMUXBUS_A ) ( FILLER_394 AMUXBUS_A ) + ( FILLER_626 AMUXBUS_A ) ( FILLER_625 AMUXBUS_A ) + ( FILLER_389 AMUXBUS_A ) ( FILLER_624 AMUXBUS_A ) + ( FILLER_392 AMUXBUS_A ) + ( mgmt_vddio_hvclamp_pad\[0\] AMUXBUS_A ) + ( FILLER_391 AMUXBUS_A ) ( FILLER_390 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[0\] AMUXBUS_A ) + ( FILLER_622 AMUXBUS_A ) ( FILLER_621 AMUXBUS_A ) + ( FILLER_388 AMUXBUS_A ) ( FILLER_620 AMUXBUS_A ) + ( FILLER_387 AMUXBUS_A ) ( FILLER_619 AMUXBUS_A ) + ( FILLER_386 AMUXBUS_A ) ( FILLER_385 AMUXBUS_A ) + ( FILLER_618 AMUXBUS_A ) ( FILLER_384 AMUXBUS_A ) + ( FILLER_617 AMUXBUS_A ) ( FILLER_616 AMUXBUS_A ) + ( FILLER_615 AMUXBUS_A ) ( FILLER_612 AMUXBUS_A ) + ( FILLER_SB1 AMUXBUS_A ) ( disconnect_vdda_1 AMUXBUS_A ) + ( FILLER_611 AMUXBUS_A ) ( FILLER_382 AMUXBUS_A ) + ( mgmt_vccd_lvclamp_pad AMUXBUS_A ) ( FILLER_381 AMUXBUS_A ) + ( FILLER_380 AMUXBUS_A ) ( FILLER_379 AMUXBUS_A ) + ( FILLER_610 AMUXBUS_A ) ( FILLER_609 AMUXBUS_A ) + ( FILLER_378 AMUXBUS_A ) ( FILLER_608 AMUXBUS_A ) + ( FILLER_607 AMUXBUS_A ) ( FILLER_377 AMUXBUS_A ) + ( FILLER_606 AMUXBUS_A ) ( FILLER_376 AMUXBUS_A ) + ( FILLER_375 AMUXBUS_A ) ( mgmt_corner\[1\] AMUXBUS_A ) + ( FILLER_374 AMUXBUS_A ) ( FILLER_605 AMUXBUS_A ) + ( FILLER_373 AMUXBUS_A ) ( FILLER_372 AMUXBUS_A ) + ( FILLER_371 AMUXBUS_A ) ( FILLER_370 AMUXBUS_A ) + ( FILLER_369 AMUXBUS_A ) ( FILLER_368 AMUXBUS_A ) + ( bus_tie_72 AMUXBUS_A ) ( bus_tie_71 AMUXBUS_A ) + ( bus_tie_70 AMUXBUS_A ) ( bus_tie_69 AMUXBUS_A ) + ( bus_tie_68 AMUXBUS_A ) ( FILLER_361 AMUXBUS_A ) + ( bus_tie_67 AMUXBUS_A ) ( FILLER_358 AMUXBUS_A ) + ( FILLER_360 AMUXBUS_A ) ( FILLER_359 AMUXBUS_A ) + ( FILLER_357 AMUXBUS_A ) ( FILLER_353 AMUXBUS_A ) + ( FILLER_354 AMUXBUS_A ) ( FILLER_355 AMUXBUS_A ) + ( mgmt_vdda_hvclamp_pad AMUXBUS_A ) ( FILLER_351 AMUXBUS_A ) + ( FILLER_352 AMUXBUS_A ) ( bus_tie_65 AMUXBUS_A ) + ( bus_tie_66 AMUXBUS_A ) ( FILLER_343 AMUXBUS_A ) + ( bus_tie_64 AMUXBUS_A ) ( bus_tie_63 AMUXBUS_A ) + ( bus_tie_62 AMUXBUS_A ) ( FILLER_344 AMUXBUS_A ) + ( bus_tie_61 AMUXBUS_A ) ( FILLER_340 AMUXBUS_A ) + ( FILLER_342 AMUXBUS_A ) ( FILLER_341 AMUXBUS_A ) + ( FILLER_335 AMUXBUS_A ) ( FILLER_337 AMUXBUS_A ) + ( FILLER_338 AMUXBUS_A ) + ( mgmt_vssio_hvclamp_pad\[0\] AMUXBUS_A ) + ( FILLER_336 AMUXBUS_A ) ( FILLER_334 AMUXBUS_A ) + ( bus_tie_58 AMUXBUS_A ) ( bus_tie_60 AMUXBUS_A ) + ( bus_tie_59 AMUXBUS_A ) ( bus_tie_56 AMUXBUS_A ) + ( bus_tie_57 AMUXBUS_A ) ( FILLER_323 AMUXBUS_A ) + ( FILLER_326 AMUXBUS_A ) ( FILLER_327 AMUXBUS_A ) + ( bus_tie_55 AMUXBUS_A ) ( FILLER_325 AMUXBUS_A ) + ( FILLER_324 AMUXBUS_A ) ( FILLER_317 AMUXBUS_A ) + ( FILLER_321 AMUXBUS_A ) ( clock_pad AMUXBUS_A ) + ( FILLER_319 AMUXBUS_A ) ( FILLER_320 AMUXBUS_A ) + ( FILLER_318 AMUXBUS_A ) ( bus_tie_54 AMUXBUS_A ) + ( bus_tie_53 AMUXBUS_A ) ( bus_tie_52 AMUXBUS_A ) + ( bus_tie_51 AMUXBUS_A ) ( bus_tie_50 AMUXBUS_A ) + ( FILLER_308 AMUXBUS_A ) ( FILLER_309 AMUXBUS_A ) + ( FILLER_310 AMUXBUS_A ) ( bus_tie_49 AMUXBUS_A ) + ( FILLER_307 AMUXBUS_A ) ( FILLER_306 AMUXBUS_A ) + ( FILLER_301 AMUXBUS_A ) ( flash_io1_pad AMUXBUS_A ) + ( FILLER_302 AMUXBUS_A ) ( FILLER_303 AMUXBUS_A ) + ( FILLER_304 AMUXBUS_A ) ( FILLER_300 AMUXBUS_A ) + ( bus_tie_46 AMUXBUS_A ) ( bus_tie_48 AMUXBUS_A ) + ( bus_tie_47 AMUXBUS_A ) ( FILLER_290 AMUXBUS_A ) + ( bus_tie_45 AMUXBUS_A ) ( bus_tie_44 AMUXBUS_A ) + ( FILLER_292 AMUXBUS_A ) ( FILLER_293 AMUXBUS_A ) + ( bus_tie_43 AMUXBUS_A ) ( FILLER_291 AMUXBUS_A ) + ( FILLER_289 AMUXBUS_A ) ( FILLER_283 AMUXBUS_A ) + ( FILLER_286 AMUXBUS_A ) ( FILLER_287 AMUXBUS_A ) + ( flash_io0_pad AMUXBUS_A ) ( FILLER_285 AMUXBUS_A ) + ( FILLER_284 AMUXBUS_A ) ( bus_tie_39 AMUXBUS_A ) + ( bus_tie_42 AMUXBUS_A ) ( bus_tie_41 AMUXBUS_A ) + ( bus_tie_40 AMUXBUS_A ) ( FILLER_273 AMUXBUS_A ) + ( bus_tie_38 AMUXBUS_A ) ( FILLER_275 AMUXBUS_A ) + ( FILLER_276 AMUXBUS_A ) ( bus_tie_37 AMUXBUS_A ) + ( FILLER_274 AMUXBUS_A ) ( FILLER_272 AMUXBUS_A ) + ( FILLER_266 AMUXBUS_A ) ( FILLER_269 AMUXBUS_A ) + ( FILLER_270 AMUXBUS_A ) ( flash_clk_pad AMUXBUS_A ) + ( FILLER_268 AMUXBUS_A ) ( FILLER_267 AMUXBUS_A ) + ( bus_tie_36 AMUXBUS_A ) ( bus_tie_35 AMUXBUS_A ) + ( bus_tie_34 AMUXBUS_A ) ( bus_tie_33 AMUXBUS_A ) + ( bus_tie_32 AMUXBUS_A ) ( FILLER_257 AMUXBUS_A ) + ( FILLER_258 AMUXBUS_A ) ( FILLER_259 AMUXBUS_A ) + ( bus_tie_31 AMUXBUS_A ) ( FILLER_256 AMUXBUS_A ) + ( FILLER_255 AMUXBUS_A ) ( FILLER_249 AMUXBUS_A ) + ( FILLER_252 AMUXBUS_A ) ( FILLER_253 AMUXBUS_A ) + ( flash_csb_pad AMUXBUS_A ) ( FILLER_251 AMUXBUS_A ) + ( FILLER_250 AMUXBUS_A ) ( bus_tie_27 AMUXBUS_A ) + ( bus_tie_30 AMUXBUS_A ) ( bus_tie_29 AMUXBUS_A ) + ( bus_tie_28 AMUXBUS_A ) ( FILLER_238 AMUXBUS_A ) + ( bus_tie_26 AMUXBUS_A ) ( FILLER_242 AMUXBUS_A ) + ( bus_tie_25 AMUXBUS_A ) ( FILLER_240 AMUXBUS_A ) + ( FILLER_241 AMUXBUS_A ) ( FILLER_239 AMUXBUS_A ) + ( FILLER_232 AMUXBUS_A ) ( FILLER_236 AMUXBUS_A ) + ( mgmt_vssd_lvclamp_pad AMUXBUS_A ) ( FILLER_234 AMUXBUS_A ) + ( FILLER_235 AMUXBUS_A ) ( FILLER_233 AMUXBUS_A ) + ( bus_tie_24 AMUXBUS_A ) ( bus_tie_20 AMUXBUS_A ) + ( bus_tie_23 AMUXBUS_A ) ( bus_tie_22 AMUXBUS_A ) + ( bus_tie_21 AMUXBUS_A ) ( FILLER_221 AMUXBUS_A ) + ( FILLER_224 AMUXBUS_A ) ( FILLER_225 AMUXBUS_A ) + ( bus_tie_19 AMUXBUS_A ) ( FILLER_223 AMUXBUS_A ) + ( FILLER_222 AMUXBUS_A ) ( FILLER_217 AMUXBUS_A ) + ( bus_tie_9 AMUXBUS_A ) ( FILLER_218 AMUXBUS_A ) + ( FILLER_219 AMUXBUS_A ) ( FILLER_215 AMUXBUS_A ) + ( FILLER_216 AMUXBUS_A ) ( bus_tie_17 AMUXBUS_A ) + ( bus_tie_18 AMUXBUS_A ) ( bus_tie_14 AMUXBUS_A ) + ( bus_tie_16 AMUXBUS_A ) ( bus_tie_15 AMUXBUS_A ) + ( FILLER_204 AMUXBUS_A ) ( FILLER_207 AMUXBUS_A ) + ( FILLER_208 AMUXBUS_A ) ( bus_tie_13 AMUXBUS_A ) + ( FILLER_206 AMUXBUS_A ) ( FILLER_205 AMUXBUS_A ) + ( FILLER_199 AMUXBUS_A ) ( FILLER_201 AMUXBUS_A ) + ( FILLER_202 AMUXBUS_A ) ( resetb_pad AMUXBUS_A ) + ( FILLER_200 AMUXBUS_A ) ( FILLER_198 AMUXBUS_A ) + ( bus_tie_12 AMUXBUS_A ) ( bus_tie_11 AMUXBUS_A ) + ( bus_tie_10 AMUXBUS_A ) ( bus_tie_8 AMUXBUS_A ) + ( bus_tie_7 AMUXBUS_A ) ( FILLER_190 AMUXBUS_A ) + ( FILLER_191 AMUXBUS_A ) ( bus_tie_6 AMUXBUS_A ) + ( FILLER_188 AMUXBUS_A ) ( FILLER_189 AMUXBUS_A ) + ( FILLER_187 AMUXBUS_A ) ( FILLER_182 AMUXBUS_A ) + ( FILLER_185 AMUXBUS_A ) ( mgmt_vssa_hvclamp_pad AMUXBUS_A ) + ( FILLER_183 AMUXBUS_A ) ( FILLER_184 AMUXBUS_A ) + ( FILLER_181 AMUXBUS_A ) ( bus_tie_4 AMUXBUS_A ) + ( bus_tie_5 AMUXBUS_A ) ( bus_tie_3 AMUXBUS_A ) + ( FILLER_171 AMUXBUS_A ) ( bus_tie_2 AMUXBUS_A ) + ( bus_tie_1 AMUXBUS_A ) ( FILLER_173 AMUXBUS_A ) + ( FILLER_174 AMUXBUS_A ) ( FILLER_172 AMUXBUS_A ) + ( FILLER_170 AMUXBUS_A ) ( mgmt_corner\[0\] AMUXBUS_A ) ; + - gpio_pad/AMUXBUS_B ( gpio_pad AMUXBUS_B ) + ( FILLER_167 AMUXBUS_B ) ( FILLER_168 AMUXBUS_B ) + ( FILLER_169 AMUXBUS_B ) ( FILLER_166 AMUXBUS_B ) + ( FILLER_165 AMUXBUS_B ) ( FILLER_164 AMUXBUS_B ) + ( FILLER_163 AMUXBUS_B ) ( FILLER_162 AMUXBUS_B ) + ( FILLER_161 AMUXBUS_B ) ( FILLER_160 AMUXBUS_B ) + ( FILLER_159 AMUXBUS_B ) ( FILLER_158 AMUXBUS_B ) + ( FILLER_157 AMUXBUS_B ) ( FILLER_153 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[15\] AMUXBUS_B ) + ( FILLER_154 AMUXBUS_B ) ( FILLER_155 AMUXBUS_B ) + ( FILLER_149 AMUXBUS_B ) ( FILLER_152 AMUXBUS_B ) + ( FILLER_151 AMUXBUS_B ) ( FILLER_150 AMUXBUS_B ) + ( FILLER_145 AMUXBUS_B ) ( FILLER_148 AMUXBUS_B ) + ( FILLER_147 AMUXBUS_B ) ( FILLER_146 AMUXBUS_B ) + ( FILLER_144 AMUXBUS_B ) ( FILLER_137 AMUXBUS_B ) + ( user1_vssa_hvclamp_pad\[0\] AMUXBUS_B ) + ( FILLER_140 AMUXBUS_B ) ( FILLER_141 AMUXBUS_B ) + ( FILLER_142 AMUXBUS_B ) ( FILLER_139 AMUXBUS_B ) + ( FILLER_138 AMUXBUS_B ) ( FILLER_134 AMUXBUS_B ) + ( FILLER_136 AMUXBUS_B ) ( FILLER_135 AMUXBUS_B ) + ( FILLER_131 AMUXBUS_B ) ( FILLER_133 AMUXBUS_B ) + ( FILLER_132 AMUXBUS_B ) ( FILLER_127 AMUXBUS_B ) + ( FILLER_128 AMUXBUS_B ) ( FILLER_129 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[16\] AMUXBUS_B ) + ( FILLER_123 AMUXBUS_B ) ( FILLER_126 AMUXBUS_B ) + ( FILLER_125 AMUXBUS_B ) ( FILLER_124 AMUXBUS_B ) + ( FILLER_122 AMUXBUS_B ) ( FILLER_121 AMUXBUS_B ) + ( FILLER_120 AMUXBUS_B ) ( FILLER_119 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[17\] AMUXBUS_B ) + ( FILLER_118 AMUXBUS_B ) ( FILLER_116 AMUXBUS_B ) + ( FILLER_115 AMUXBUS_B ) ( FILLER_114 AMUXBUS_B ) + ( FILLER_113 AMUXBUS_B ) ( FILLER_112 AMUXBUS_B ) + ( FILLER_111 AMUXBUS_B ) ( FILLER_110 AMUXBUS_B ) + ( FILLER_109 AMUXBUS_B ) ( FILLER_108 AMUXBUS_B ) + ( FILLER_107 AMUXBUS_B ) ( FILLER_106 AMUXBUS_B ) + ( FILLER_105 AMUXBUS_B ) ( FILLER_104 AMUXBUS_B ) + ( FILLER_102 AMUXBUS_B ) ( FILLER_103 AMUXBUS_B ) + ( FILLER_98 AMUXBUS_B ) ( FILLER_101 AMUXBUS_B ) + ( FILLER_100 AMUXBUS_B ) ( FILLER_99 AMUXBUS_B ) + ( FILLER_94 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[18\] AMUXBUS_B ) + ( FILLER_95 AMUXBUS_B ) ( FILLER_96 AMUXBUS_B ) + ( FILLER_93 AMUXBUS_B ) ( FILLER_92 AMUXBUS_B ) + ( FILLER_91 AMUXBUS_B ) ( FILLER_90 AMUXBUS_B ) + ( FILLER_89 AMUXBUS_B ) ( FILLER_88 AMUXBUS_B ) + ( FILLER_86 AMUXBUS_B ) ( FILLER_87 AMUXBUS_B ) + ( FILLER_SB3 AMUXBUS_B ) ( disconnect_vdda_0 AMUXBUS_B ) + ( FILLER_78 AMUXBUS_B ) + ( mgmt_vssio_hvclamp_pad\[1\] AMUXBUS_B ) + ( FILLER_80 AMUXBUS_B ) ( FILLER_81 AMUXBUS_B ) + ( FILLER_82 AMUXBUS_B ) ( FILLER_79 AMUXBUS_B ) + ( FILLER_75 AMUXBUS_B ) ( FILLER_77 AMUXBUS_B ) + ( FILLER_76 AMUXBUS_B ) ( FILLER_71 AMUXBUS_B ) + ( FILLER_74 AMUXBUS_B ) ( FILLER_73 AMUXBUS_B ) + ( FILLER_72 AMUXBUS_B ) ( FILLER_63 AMUXBUS_B ) + ( FILLER_68 AMUXBUS_B ) ( FILLER_69 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[0\] AMUXBUS_B ) + ( FILLER_66 AMUXBUS_B ) ( FILLER_67 AMUXBUS_B ) + ( FILLER_65 AMUXBUS_B ) ( FILLER_64 AMUXBUS_B ) + ( FILLER_59 AMUXBUS_B ) ( FILLER_62 AMUXBUS_B ) + ( FILLER_61 AMUXBUS_B ) ( FILLER_60 AMUXBUS_B ) + ( FILLER_57 AMUXBUS_B ) ( FILLER_58 AMUXBUS_B ) + ( FILLER_53 AMUXBUS_B ) ( FILLER_54 AMUXBUS_B ) + ( FILLER_55 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[1\] AMUXBUS_B ) + ( FILLER_48 AMUXBUS_B ) ( FILLER_52 AMUXBUS_B ) + ( FILLER_51 AMUXBUS_B ) ( FILLER_50 AMUXBUS_B ) + ( FILLER_49 AMUXBUS_B ) ( FILLER_46 AMUXBUS_B ) + ( FILLER_47 AMUXBUS_B ) ( FILLER_44 AMUXBUS_B ) + ( FILLER_45 AMUXBUS_B ) ( FILLER_38 AMUXBUS_B ) + ( FILLER_41 AMUXBUS_B ) ( FILLER_42 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[2\] AMUXBUS_B ) + ( FILLER_40 AMUXBUS_B ) ( FILLER_39 AMUXBUS_B ) + ( FILLER_35 AMUXBUS_B ) ( FILLER_37 AMUXBUS_B ) + ( FILLER_36 AMUXBUS_B ) ( FILLER_31 AMUXBUS_B ) + ( FILLER_34 AMUXBUS_B ) ( FILLER_33 AMUXBUS_B ) + ( FILLER_32 AMUXBUS_B ) ( FILLER_28 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[3\] AMUXBUS_B ) + ( FILLER_29 AMUXBUS_B ) ( FILLER_26 AMUXBUS_B ) + ( FILLER_27 AMUXBUS_B ) ( FILLER_25 AMUXBUS_B ) + ( FILLER_24 AMUXBUS_B ) ( FILLER_23 AMUXBUS_B ) + ( FILLER_22 AMUXBUS_B ) ( FILLER_21 AMUXBUS_B ) + ( FILLER_20 AMUXBUS_B ) ( FILLER_19 AMUXBUS_B ) + ( FILLER_18 AMUXBUS_B ) ( FILLER_14 AMUXBUS_B ) + ( FILLER_15 AMUXBUS_B ) ( FILLER_16 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[4\] AMUXBUS_B ) + ( FILLER_10 AMUXBUS_B ) ( FILLER_13 AMUXBUS_B ) + ( FILLER_12 AMUXBUS_B ) ( FILLER_11 AMUXBUS_B ) + ( FILLER_6 AMUXBUS_B ) ( FILLER_9 AMUXBUS_B ) + ( FILLER_8 AMUXBUS_B ) ( FILLER_7 AMUXBUS_B ) + ( FILLER_5 AMUXBUS_B ) ( user2_corner AMUXBUS_B ) + ( user1_corner AMUXBUS_B ) ( FILLER_603 AMUXBUS_B ) + ( FILLER_604 AMUXBUS_B ) ( FILLER_601 AMUXBUS_B ) + ( FILLER_810 AMUXBUS_B ) ( FILLER_811 AMUXBUS_B ) + ( FILLER_602 AMUXBUS_B ) ( FILLER_809 AMUXBUS_B ) + ( FILLER_596 AMUXBUS_B ) ( FILLER_600 AMUXBUS_B ) + ( FILLER_808 AMUXBUS_B ) ( FILLER_599 AMUXBUS_B ) + ( FILLER_807 AMUXBUS_B ) ( FILLER_598 AMUXBUS_B ) + ( FILLER_806 AMUXBUS_B ) ( FILLER_597 AMUXBUS_B ) + ( FILLER_805 AMUXBUS_B ) ( FILLER_804 AMUXBUS_B ) + ( FILLER_595 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[14\] AMUXBUS_B ) + ( FILLER_803 AMUXBUS_B ) ( FILLER_593 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[5\] AMUXBUS_B ) + ( FILLER_592 AMUXBUS_B ) ( FILLER_801 AMUXBUS_B ) + ( FILLER_591 AMUXBUS_B ) ( FILLER_800 AMUXBUS_B ) + ( FILLER_590 AMUXBUS_B ) ( FILLER_799 AMUXBUS_B ) + ( FILLER_798 AMUXBUS_B ) ( FILLER_589 AMUXBUS_B ) + ( FILLER_797 AMUXBUS_B ) ( FILLER_588 AMUXBUS_B ) + ( FILLER_796 AMUXBUS_B ) ( FILLER_587 AMUXBUS_B ) + ( FILLER_586 AMUXBUS_B ) ( FILLER_585 AMUXBUS_B ) + ( FILLER_794 AMUXBUS_B ) ( FILLER_795 AMUXBUS_B ) + ( FILLER_791 AMUXBUS_B ) ( FILLER_583 AMUXBUS_B ) + ( user2_vccd_lvclamp_pad AMUXBUS_B ) ( FILLER_582 AMUXBUS_B ) + ( FILLER_581 AMUXBUS_B ) ( FILLER_792 AMUXBUS_B ) + ( user1_vccd_lvclamp_pad AMUXBUS_B ) ( FILLER_580 AMUXBUS_B ) + ( FILLER_576 AMUXBUS_B ) ( FILLER_790 AMUXBUS_B ) + ( FILLER_579 AMUXBUS_B ) ( FILLER_789 AMUXBUS_B ) + ( FILLER_578 AMUXBUS_B ) ( FILLER_788 AMUXBUS_B ) + ( FILLER_577 AMUXBUS_B ) ( FILLER_787 AMUXBUS_B ) + ( FILLER_786 AMUXBUS_B ) ( FILLER_575 AMUXBUS_B ) + ( FILLER_785 AMUXBUS_B ) ( FILLER_570 AMUXBUS_B ) + ( FILLER_784 AMUXBUS_B ) ( FILLER_573 AMUXBUS_B ) + ( mgmt_vddio_hvclamp_pad\[1\] AMUXBUS_B ) + ( FILLER_572 AMUXBUS_B ) ( FILLER_571 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[13\] AMUXBUS_B ) + ( FILLER_782 AMUXBUS_B ) ( FILLER_781 AMUXBUS_B ) + ( FILLER_569 AMUXBUS_B ) ( FILLER_780 AMUXBUS_B ) + ( FILLER_568 AMUXBUS_B ) ( FILLER_779 AMUXBUS_B ) + ( FILLER_567 AMUXBUS_B ) ( FILLER_566 AMUXBUS_B ) + ( FILLER_778 AMUXBUS_B ) ( FILLER_565 AMUXBUS_B ) + ( FILLER_777 AMUXBUS_B ) ( FILLER_776 AMUXBUS_B ) + ( FILLER_560 AMUXBUS_B ) ( FILLER_775 AMUXBUS_B ) + ( user2_vssa_hvclamp_pad AMUXBUS_B ) ( FILLER_562 AMUXBUS_B ) + ( FILLER_563 AMUXBUS_B ) ( FILLER_561 AMUXBUS_B ) + ( user1_vdda_hvclamp_pad\[0\] AMUXBUS_B ) + ( FILLER_773 AMUXBUS_B ) ( FILLER_772 AMUXBUS_B ) + ( FILLER_771 AMUXBUS_B ) ( FILLER_559 AMUXBUS_B ) + ( FILLER_770 AMUXBUS_B ) ( FILLER_558 AMUXBUS_B ) + ( FILLER_769 AMUXBUS_B ) ( FILLER_557 AMUXBUS_B ) + ( FILLER_556 AMUXBUS_B ) ( FILLER_555 AMUXBUS_B ) + ( FILLER_768 AMUXBUS_B ) ( FILLER_766 AMUXBUS_B ) + ( FILLER_767 AMUXBUS_B ) ( FILLER_765 AMUXBUS_B ) + ( FILLER_550 AMUXBUS_B ) ( FILLER_553 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[6\] AMUXBUS_B ) + ( FILLER_552 AMUXBUS_B ) ( FILLER_551 AMUXBUS_B ) + ( FILLER_546 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[12\] AMUXBUS_B ) + ( FILLER_549 AMUXBUS_B ) ( FILLER_763 AMUXBUS_B ) + ( FILLER_548 AMUXBUS_B ) ( FILLER_762 AMUXBUS_B ) + ( FILLER_547 AMUXBUS_B ) ( FILLER_761 AMUXBUS_B ) + ( FILLER_760 AMUXBUS_B ) ( FILLER_759 AMUXBUS_B ) + ( FILLER_545 AMUXBUS_B ) ( FILLER_758 AMUXBUS_B ) + ( FILLER_757 AMUXBUS_B ) ( FILLER_540 AMUXBUS_B ) + ( FILLER_756 AMUXBUS_B ) ( FILLER_543 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[7\] AMUXBUS_B ) + ( FILLER_542 AMUXBUS_B ) ( FILLER_541 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[11\] AMUXBUS_B ) + ( FILLER_539 AMUXBUS_B ) ( FILLER_754 AMUXBUS_B ) + ( FILLER_753 AMUXBUS_B ) ( FILLER_538 AMUXBUS_B ) + ( FILLER_752 AMUXBUS_B ) ( FILLER_537 AMUXBUS_B ) + ( FILLER_536 AMUXBUS_B ) ( FILLER_535 AMUXBUS_B ) + ( FILLER_751 AMUXBUS_B ) ( FILLER_750 AMUXBUS_B ) + ( FILLER_747 AMUXBUS_B ) ( FILLER_749 AMUXBUS_B ) + ( FILLER_748 AMUXBUS_B ) ( FILLER_531 AMUXBUS_B ) + ( FILLER_533 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[8\] AMUXBUS_B ) + ( FILLER_532 AMUXBUS_B ) ( FILLER_743 AMUXBUS_B ) + ( FILLER_530 AMUXBUS_B ) ( FILLER_529 AMUXBUS_B ) + ( FILLER_744 AMUXBUS_B ) ( FILLER_745 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[10\] AMUXBUS_B ) + ( FILLER_528 AMUXBUS_B ) ( FILLER_527 AMUXBUS_B ) + ( FILLER_525 AMUXBUS_B ) ( FILLER_742 AMUXBUS_B ) + ( FILLER_526 AMUXBUS_B ) ( FILLER_740 AMUXBUS_B ) + ( FILLER_741 AMUXBUS_B ) ( FILLER_737 AMUXBUS_B ) + ( FILLER_739 AMUXBUS_B ) ( FILLER_738 AMUXBUS_B ) + ( FILLER_521 AMUXBUS_B ) ( FILLER_523 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[9\] AMUXBUS_B ) + ( FILLER_522 AMUXBUS_B ) ( FILLER_517 AMUXBUS_B ) + ( FILLER_520 AMUXBUS_B ) ( FILLER_519 AMUXBUS_B ) + ( FILLER_518 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[9\] AMUXBUS_B ) + ( FILLER_735 AMUXBUS_B ) ( FILLER_734 AMUXBUS_B ) + ( FILLER_515 AMUXBUS_B ) ( FILLER_516 AMUXBUS_B ) + ( FILLER_733 AMUXBUS_B ) ( FILLER_732 AMUXBUS_B ) + ( FILLER_728 AMUXBUS_B ) ( FILLER_731 AMUXBUS_B ) + ( FILLER_730 AMUXBUS_B ) ( FILLER_729 AMUXBUS_B ) + ( FILLER_513 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[10\] AMUXBUS_B ) + ( FILLER_512 AMUXBUS_B ) ( FILLER_511 AMUXBUS_B ) + ( FILLER_507 AMUXBUS_B ) ( FILLER_510 AMUXBUS_B ) + ( FILLER_509 AMUXBUS_B ) ( FILLER_508 AMUXBUS_B ) + ( FILLER_726 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[8\] AMUXBUS_B ) + ( FILLER_725 AMUXBUS_B ) ( FILLER_724 AMUXBUS_B ) + ( FILLER_506 AMUXBUS_B ) ( FILLER_505 AMUXBUS_B ) + ( FILLER_723 AMUXBUS_B ) ( FILLER_722 AMUXBUS_B ) + ( FILLER_721 AMUXBUS_B ) ( FILLER_720 AMUXBUS_B ) + ( FILLER_719 AMUXBUS_B ) ( FILLER_501 AMUXBUS_B ) + ( FILLER_502 AMUXBUS_B ) ( FILLER_503 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[11\] AMUXBUS_B ) + ( FILLER_718 AMUXBUS_B ) ( FILLER_497 AMUXBUS_B ) + ( FILLER_500 AMUXBUS_B ) ( FILLER_499 AMUXBUS_B ) + ( FILLER_498 AMUXBUS_B ) ( FILLER_495 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[7\] AMUXBUS_B ) + ( FILLER_716 AMUXBUS_B ) ( FILLER_496 AMUXBUS_B ) + ( FILLER_715 AMUXBUS_B ) ( FILLER_714 AMUXBUS_B ) + ( FILLER_492 AMUXBUS_B ) ( FILLER_713 AMUXBUS_B ) + ( FILLER_712 AMUXBUS_B ) ( FILLER_711 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[12\] AMUXBUS_B ) + ( FILLER_493 AMUXBUS_B ) ( FILLER_710 AMUXBUS_B ) + ( FILLER_709 AMUXBUS_B ) ( FILLER_491 AMUXBUS_B ) + ( FILLER_488 AMUXBUS_B ) ( FILLER_490 AMUXBUS_B ) + ( FILLER_489 AMUXBUS_B ) + ( user1_vdda_hvclamp_pad\[1\] AMUXBUS_B ) + ( FILLER_487 AMUXBUS_B ) ( FILLER_707 AMUXBUS_B ) + ( FILLER_706 AMUXBUS_B ) ( FILLER_486 AMUXBUS_B ) + ( FILLER_485 AMUXBUS_B ) ( FILLER_705 AMUXBUS_B ) + ( FILLER_704 AMUXBUS_B ) ( FILLER_703 AMUXBUS_B ) + ( FILLER_702 AMUXBUS_B ) ( FILLER_481 AMUXBUS_B ) + ( FILLER_482 AMUXBUS_B ) ( FILLER_483 AMUXBUS_B ) + ( user2_vdda_hvclamp_pad AMUXBUS_B ) ( FILLER_701 AMUXBUS_B ) + ( FILLER_700 AMUXBUS_B ) ( FILLER_478 AMUXBUS_B ) + ( FILLER_480 AMUXBUS_B ) ( FILLER_479 AMUXBUS_B ) + ( FILLER_476 AMUXBUS_B ) ( FILLER_477 AMUXBUS_B ) + ( FILLER_698 AMUXBUS_B ) ( user1_vssd_lvclamp_pad AMUXBUS_B ) + ( FILLER_697 AMUXBUS_B ) ( FILLER_475 AMUXBUS_B ) + ( FILLER_693 AMUXBUS_B ) ( FILLER_696 AMUXBUS_B ) + ( FILLER_695 AMUXBUS_B ) ( FILLER_694 AMUXBUS_B ) + ( FILLER_472 AMUXBUS_B ) ( FILLER_473 AMUXBUS_B ) + ( user2_vssd_lvclamp_pad AMUXBUS_B ) ( FILLER_692 AMUXBUS_B ) + ( FILLER_690 AMUXBUS_B ) ( FILLER_471 AMUXBUS_B ) + ( FILLER_691 AMUXBUS_B ) ( FILLER_470 AMUXBUS_B ) + ( FILLER_468 AMUXBUS_B ) ( FILLER_469 AMUXBUS_B ) + ( user1_vssa_hvclamp_pad\[1\] AMUXBUS_B ) + ( FILLER_467 AMUXBUS_B ) ( FILLER_466 AMUXBUS_B ) + ( FILLER_688 AMUXBUS_B ) ( FILLER_465 AMUXBUS_B ) + ( FILLER_687 AMUXBUS_B ) ( FILLER_686 AMUXBUS_B ) + ( FILLER_685 AMUXBUS_B ) ( FILLER_684 AMUXBUS_B ) + ( FILLER_462 AMUXBUS_B ) ( FILLER_463 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[13\] AMUXBUS_B ) + ( FILLER_683 AMUXBUS_B ) ( FILLER_682 AMUXBUS_B ) + ( FILLER_461 AMUXBUS_B ) ( FILLER_681 AMUXBUS_B ) + ( FILLER_460 AMUXBUS_B ) ( FILLER_458 AMUXBUS_B ) + ( FILLER_459 AMUXBUS_B ) ( FILLER_679 AMUXBUS_B ) + ( FILLER_457 AMUXBUS_B ) ( FILLER_456 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[6\] AMUXBUS_B ) + ( FILLER_455 AMUXBUS_B ) ( FILLER_675 AMUXBUS_B ) + ( FILLER_678 AMUXBUS_B ) ( FILLER_677 AMUXBUS_B ) + ( FILLER_676 AMUXBUS_B ) ( FILLER_453 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[14\] AMUXBUS_B ) + ( FILLER_674 AMUXBUS_B ) ( FILLER_671 AMUXBUS_B ) + ( FILLER_452 AMUXBUS_B ) ( FILLER_451 AMUXBUS_B ) + ( FILLER_673 AMUXBUS_B ) ( FILLER_450 AMUXBUS_B ) + ( FILLER_672 AMUXBUS_B ) ( FILLER_449 AMUXBUS_B ) + ( FILLER_448 AMUXBUS_B ) ( FILLER_446 AMUXBUS_B ) + ( FILLER_447 AMUXBUS_B ) ( FILLER_445 AMUXBUS_B ) + ( FILLER_666 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[5\] AMUXBUS_B ) + ( FILLER_669 AMUXBUS_B ) ( FILLER_668 AMUXBUS_B ) + ( FILLER_667 AMUXBUS_B ) ( FILLER_662 AMUXBUS_B ) + ( FILLER_443 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[15\] AMUXBUS_B ) + ( FILLER_442 AMUXBUS_B ) ( FILLER_665 AMUXBUS_B ) + ( FILLER_441 AMUXBUS_B ) ( FILLER_664 AMUXBUS_B ) + ( FILLER_440 AMUXBUS_B ) ( FILLER_663 AMUXBUS_B ) + ( FILLER_439 AMUXBUS_B ) ( FILLER_438 AMUXBUS_B ) + ( FILLER_436 AMUXBUS_B ) ( FILLER_437 AMUXBUS_B ) + ( FILLER_435 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[4\] AMUXBUS_B ) + ( FILLER_660 AMUXBUS_B ) ( FILLER_659 AMUXBUS_B ) + ( FILLER_658 AMUXBUS_B ) ( FILLER_657 AMUXBUS_B ) + ( FILLER_433 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[16\] AMUXBUS_B ) + ( FILLER_656 AMUXBUS_B ) ( FILLER_432 AMUXBUS_B ) + ( FILLER_431 AMUXBUS_B ) ( FILLER_655 AMUXBUS_B ) + ( FILLER_430 AMUXBUS_B ) ( FILLER_429 AMUXBUS_B ) + ( FILLER_654 AMUXBUS_B ) ( FILLER_653 AMUXBUS_B ) + ( FILLER_428 AMUXBUS_B ) ( FILLER_426 AMUXBUS_B ) + ( FILLER_427 AMUXBUS_B ) ( FILLER_425 AMUXBUS_B ) + ( FILLER_649 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[3\] AMUXBUS_B ) + ( FILLER_650 AMUXBUS_B ) ( FILLER_651 AMUXBUS_B ) + ( FILLER_645 AMUXBUS_B ) ( FILLER_648 AMUXBUS_B ) + ( FILLER_423 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[17\] AMUXBUS_B ) + ( FILLER_422 AMUXBUS_B ) ( FILLER_647 AMUXBUS_B ) + ( FILLER_421 AMUXBUS_B ) ( FILLER_646 AMUXBUS_B ) + ( FILLER_420 AMUXBUS_B ) ( FILLER_419 AMUXBUS_B ) + ( FILLER_643 AMUXBUS_B ) ( FILLER_644 AMUXBUS_B ) + ( FILLER_418 AMUXBUS_B ) ( FILLER_416 AMUXBUS_B ) + ( FILLER_417 AMUXBUS_B ) ( FILLER_415 AMUXBUS_B ) + ( FILLER_640 AMUXBUS_B ) ( FILLER_641 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[2\] AMUXBUS_B ) + ( FILLER_409 AMUXBUS_B ) ( FILLER_639 AMUXBUS_B ) + ( FILLER_413 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[18\] AMUXBUS_B ) + ( FILLER_412 AMUXBUS_B ) ( FILLER_411 AMUXBUS_B ) + ( FILLER_638 AMUXBUS_B ) ( FILLER_410 AMUXBUS_B ) + ( FILLER_637 AMUXBUS_B ) ( FILLER_636 AMUXBUS_B ) + ( FILLER_408 AMUXBUS_B ) ( FILLER_634 AMUXBUS_B ) + ( FILLER_635 AMUXBUS_B ) ( FILLER_407 AMUXBUS_B ) + ( FILLER_406 AMUXBUS_B ) ( FILLER_405 AMUXBUS_B ) + ( FILLER_SB2 AMUXBUS_B ) ( FILLER_401 AMUXBUS_B ) + ( FILLER_402 AMUXBUS_B ) ( disconnect_vdda_2 AMUXBUS_B ) + ( FILLER_400 AMUXBUS_B ) ( FILLER_399 AMUXBUS_B ) + ( FILLER_632 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[1\] AMUXBUS_B ) + ( FILLER_631 AMUXBUS_B ) ( FILLER_398 AMUXBUS_B ) + ( FILLER_397 AMUXBUS_B ) ( FILLER_630 AMUXBUS_B ) + ( FILLER_629 AMUXBUS_B ) ( FILLER_396 AMUXBUS_B ) + ( FILLER_395 AMUXBUS_B ) ( FILLER_628 AMUXBUS_B ) + ( FILLER_627 AMUXBUS_B ) ( FILLER_394 AMUXBUS_B ) + ( FILLER_626 AMUXBUS_B ) ( FILLER_625 AMUXBUS_B ) + ( FILLER_389 AMUXBUS_B ) ( FILLER_624 AMUXBUS_B ) + ( FILLER_392 AMUXBUS_B ) + ( mgmt_vddio_hvclamp_pad\[0\] AMUXBUS_B ) + ( FILLER_391 AMUXBUS_B ) ( FILLER_390 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[0\] AMUXBUS_B ) + ( FILLER_622 AMUXBUS_B ) ( FILLER_621 AMUXBUS_B ) + ( FILLER_388 AMUXBUS_B ) ( FILLER_620 AMUXBUS_B ) + ( FILLER_387 AMUXBUS_B ) ( FILLER_619 AMUXBUS_B ) + ( FILLER_386 AMUXBUS_B ) ( FILLER_385 AMUXBUS_B ) + ( FILLER_618 AMUXBUS_B ) ( FILLER_384 AMUXBUS_B ) + ( FILLER_617 AMUXBUS_B ) ( FILLER_616 AMUXBUS_B ) + ( FILLER_615 AMUXBUS_B ) ( FILLER_612 AMUXBUS_B ) + ( FILLER_SB1 AMUXBUS_B ) ( disconnect_vdda_1 AMUXBUS_B ) + ( FILLER_611 AMUXBUS_B ) ( FILLER_382 AMUXBUS_B ) + ( mgmt_vccd_lvclamp_pad AMUXBUS_B ) ( FILLER_381 AMUXBUS_B ) + ( FILLER_380 AMUXBUS_B ) ( FILLER_379 AMUXBUS_B ) + ( FILLER_610 AMUXBUS_B ) ( FILLER_609 AMUXBUS_B ) + ( FILLER_378 AMUXBUS_B ) ( FILLER_608 AMUXBUS_B ) + ( FILLER_607 AMUXBUS_B ) ( FILLER_377 AMUXBUS_B ) + ( FILLER_606 AMUXBUS_B ) ( FILLER_376 AMUXBUS_B ) + ( FILLER_375 AMUXBUS_B ) ( mgmt_corner\[1\] AMUXBUS_B ) + ( FILLER_374 AMUXBUS_B ) ( FILLER_605 AMUXBUS_B ) + ( FILLER_373 AMUXBUS_B ) ( FILLER_372 AMUXBUS_B ) + ( FILLER_371 AMUXBUS_B ) ( FILLER_370 AMUXBUS_B ) + ( FILLER_369 AMUXBUS_B ) ( FILLER_368 AMUXBUS_B ) + ( bus_tie_72 AMUXBUS_B ) ( bus_tie_71 AMUXBUS_B ) + ( bus_tie_70 AMUXBUS_B ) ( bus_tie_69 AMUXBUS_B ) + ( bus_tie_68 AMUXBUS_B ) ( FILLER_361 AMUXBUS_B ) + ( bus_tie_67 AMUXBUS_B ) ( FILLER_358 AMUXBUS_B ) + ( FILLER_360 AMUXBUS_B ) ( FILLER_359 AMUXBUS_B ) + ( FILLER_357 AMUXBUS_B ) ( FILLER_353 AMUXBUS_B ) + ( FILLER_354 AMUXBUS_B ) ( FILLER_355 AMUXBUS_B ) + ( mgmt_vdda_hvclamp_pad AMUXBUS_B ) ( FILLER_351 AMUXBUS_B ) + ( FILLER_352 AMUXBUS_B ) ( bus_tie_65 AMUXBUS_B ) + ( bus_tie_66 AMUXBUS_B ) ( FILLER_343 AMUXBUS_B ) + ( bus_tie_64 AMUXBUS_B ) ( bus_tie_63 AMUXBUS_B ) + ( bus_tie_62 AMUXBUS_B ) ( FILLER_344 AMUXBUS_B ) + ( bus_tie_61 AMUXBUS_B ) ( FILLER_340 AMUXBUS_B ) + ( FILLER_342 AMUXBUS_B ) ( FILLER_341 AMUXBUS_B ) + ( FILLER_335 AMUXBUS_B ) ( FILLER_337 AMUXBUS_B ) + ( FILLER_338 AMUXBUS_B ) + ( mgmt_vssio_hvclamp_pad\[0\] AMUXBUS_B ) + ( FILLER_336 AMUXBUS_B ) ( FILLER_334 AMUXBUS_B ) + ( bus_tie_58 AMUXBUS_B ) ( bus_tie_60 AMUXBUS_B ) + ( bus_tie_59 AMUXBUS_B ) ( bus_tie_56 AMUXBUS_B ) + ( bus_tie_57 AMUXBUS_B ) ( FILLER_323 AMUXBUS_B ) + ( FILLER_326 AMUXBUS_B ) ( FILLER_327 AMUXBUS_B ) + ( bus_tie_55 AMUXBUS_B ) ( FILLER_325 AMUXBUS_B ) + ( FILLER_324 AMUXBUS_B ) ( FILLER_317 AMUXBUS_B ) + ( FILLER_321 AMUXBUS_B ) ( clock_pad AMUXBUS_B ) + ( FILLER_319 AMUXBUS_B ) ( FILLER_320 AMUXBUS_B ) + ( FILLER_318 AMUXBUS_B ) ( bus_tie_54 AMUXBUS_B ) + ( bus_tie_53 AMUXBUS_B ) ( bus_tie_52 AMUXBUS_B ) + ( bus_tie_51 AMUXBUS_B ) ( bus_tie_50 AMUXBUS_B ) + ( FILLER_308 AMUXBUS_B ) ( FILLER_309 AMUXBUS_B ) + ( FILLER_310 AMUXBUS_B ) ( bus_tie_49 AMUXBUS_B ) + ( FILLER_307 AMUXBUS_B ) ( FILLER_306 AMUXBUS_B ) + ( FILLER_301 AMUXBUS_B ) ( flash_io1_pad AMUXBUS_B ) + ( FILLER_302 AMUXBUS_B ) ( FILLER_303 AMUXBUS_B ) + ( FILLER_304 AMUXBUS_B ) ( FILLER_300 AMUXBUS_B ) + ( bus_tie_46 AMUXBUS_B ) ( bus_tie_48 AMUXBUS_B ) + ( bus_tie_47 AMUXBUS_B ) ( FILLER_290 AMUXBUS_B ) + ( bus_tie_45 AMUXBUS_B ) ( bus_tie_44 AMUXBUS_B ) + ( FILLER_292 AMUXBUS_B ) ( FILLER_293 AMUXBUS_B ) + ( bus_tie_43 AMUXBUS_B ) ( FILLER_291 AMUXBUS_B ) + ( FILLER_289 AMUXBUS_B ) ( FILLER_283 AMUXBUS_B ) + ( FILLER_286 AMUXBUS_B ) ( FILLER_287 AMUXBUS_B ) + ( flash_io0_pad AMUXBUS_B ) ( FILLER_285 AMUXBUS_B ) + ( FILLER_284 AMUXBUS_B ) ( bus_tie_39 AMUXBUS_B ) + ( bus_tie_42 AMUXBUS_B ) ( bus_tie_41 AMUXBUS_B ) + ( bus_tie_40 AMUXBUS_B ) ( FILLER_273 AMUXBUS_B ) + ( bus_tie_38 AMUXBUS_B ) ( FILLER_275 AMUXBUS_B ) + ( FILLER_276 AMUXBUS_B ) ( bus_tie_37 AMUXBUS_B ) + ( FILLER_274 AMUXBUS_B ) ( FILLER_272 AMUXBUS_B ) + ( FILLER_266 AMUXBUS_B ) ( FILLER_269 AMUXBUS_B ) + ( FILLER_270 AMUXBUS_B ) ( flash_clk_pad AMUXBUS_B ) + ( FILLER_268 AMUXBUS_B ) ( FILLER_267 AMUXBUS_B ) + ( bus_tie_36 AMUXBUS_B ) ( bus_tie_35 AMUXBUS_B ) + ( bus_tie_34 AMUXBUS_B ) ( bus_tie_33 AMUXBUS_B ) + ( bus_tie_32 AMUXBUS_B ) ( FILLER_257 AMUXBUS_B ) + ( FILLER_258 AMUXBUS_B ) ( FILLER_259 AMUXBUS_B ) + ( bus_tie_31 AMUXBUS_B ) ( FILLER_256 AMUXBUS_B ) + ( FILLER_255 AMUXBUS_B ) ( FILLER_249 AMUXBUS_B ) + ( FILLER_252 AMUXBUS_B ) ( FILLER_253 AMUXBUS_B ) + ( flash_csb_pad AMUXBUS_B ) ( FILLER_251 AMUXBUS_B ) + ( FILLER_250 AMUXBUS_B ) ( bus_tie_27 AMUXBUS_B ) + ( bus_tie_30 AMUXBUS_B ) ( bus_tie_29 AMUXBUS_B ) + ( bus_tie_28 AMUXBUS_B ) ( FILLER_238 AMUXBUS_B ) + ( bus_tie_26 AMUXBUS_B ) ( FILLER_242 AMUXBUS_B ) + ( bus_tie_25 AMUXBUS_B ) ( FILLER_240 AMUXBUS_B ) + ( FILLER_241 AMUXBUS_B ) ( FILLER_239 AMUXBUS_B ) + ( FILLER_232 AMUXBUS_B ) ( FILLER_236 AMUXBUS_B ) + ( mgmt_vssd_lvclamp_pad AMUXBUS_B ) ( FILLER_234 AMUXBUS_B ) + ( FILLER_235 AMUXBUS_B ) ( FILLER_233 AMUXBUS_B ) + ( bus_tie_24 AMUXBUS_B ) ( bus_tie_20 AMUXBUS_B ) + ( bus_tie_23 AMUXBUS_B ) ( bus_tie_22 AMUXBUS_B ) + ( bus_tie_21 AMUXBUS_B ) ( FILLER_221 AMUXBUS_B ) + ( FILLER_224 AMUXBUS_B ) ( FILLER_225 AMUXBUS_B ) + ( bus_tie_19 AMUXBUS_B ) ( FILLER_223 AMUXBUS_B ) + ( FILLER_222 AMUXBUS_B ) ( FILLER_217 AMUXBUS_B ) + ( bus_tie_9 AMUXBUS_B ) ( FILLER_218 AMUXBUS_B ) + ( FILLER_219 AMUXBUS_B ) ( FILLER_215 AMUXBUS_B ) + ( FILLER_216 AMUXBUS_B ) ( bus_tie_17 AMUXBUS_B ) + ( bus_tie_18 AMUXBUS_B ) ( bus_tie_14 AMUXBUS_B ) + ( bus_tie_16 AMUXBUS_B ) ( bus_tie_15 AMUXBUS_B ) + ( FILLER_204 AMUXBUS_B ) ( FILLER_207 AMUXBUS_B ) + ( FILLER_208 AMUXBUS_B ) ( bus_tie_13 AMUXBUS_B ) + ( FILLER_206 AMUXBUS_B ) ( FILLER_205 AMUXBUS_B ) + ( FILLER_199 AMUXBUS_B ) ( FILLER_201 AMUXBUS_B ) + ( FILLER_202 AMUXBUS_B ) ( resetb_pad AMUXBUS_B ) + ( FILLER_200 AMUXBUS_B ) ( FILLER_198 AMUXBUS_B ) + ( bus_tie_12 AMUXBUS_B ) ( bus_tie_11 AMUXBUS_B ) + ( bus_tie_10 AMUXBUS_B ) ( bus_tie_8 AMUXBUS_B ) + ( bus_tie_7 AMUXBUS_B ) ( FILLER_190 AMUXBUS_B ) + ( FILLER_191 AMUXBUS_B ) ( bus_tie_6 AMUXBUS_B ) + ( FILLER_188 AMUXBUS_B ) ( FILLER_189 AMUXBUS_B ) + ( FILLER_187 AMUXBUS_B ) ( FILLER_182 AMUXBUS_B ) + ( FILLER_185 AMUXBUS_B ) ( mgmt_vssa_hvclamp_pad AMUXBUS_B ) + ( FILLER_183 AMUXBUS_B ) ( FILLER_184 AMUXBUS_B ) + ( FILLER_181 AMUXBUS_B ) ( bus_tie_4 AMUXBUS_B ) + ( bus_tie_5 AMUXBUS_B ) ( bus_tie_3 AMUXBUS_B ) + ( FILLER_171 AMUXBUS_B ) ( bus_tie_2 AMUXBUS_B ) + ( bus_tie_1 AMUXBUS_B ) ( FILLER_173 AMUXBUS_B ) + ( FILLER_174 AMUXBUS_B ) ( FILLER_172 AMUXBUS_B ) + ( FILLER_170 AMUXBUS_B ) ( mgmt_corner\[0\] AMUXBUS_B ) ; + - flash_io0 ( flash_io0_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 2030000 64215 ) ( 2091000 * ) ; + - flash_io0_pad/TIE_LO_ESD ( flash_io0_pad TIE_LO_ESD ) + ( flash_io0_pad ENABLE_VSWITCH_H ) + ( flash_io0_pad ENABLE_INP_H ) + + ROUTED met2 ( 2024515 209315 ) via_260_260_hv + NEW met2 ( 2024455 209405 ) ( 2024575 * ) + NEW met1 TAPERRULE met1_width_260 ( 2023880 209315 ) ( 2024315 * ) + NEW met2 ( 2024455 209225 ) ( 2024575 * ) + NEW met1 TAPERRULE met1_width_260 ( 2024715 209315 ) ( 2064570 * ) via_260_260_hv + ( * 209405 ) ( 2064630 * ) + NEW met2 ( 2064510 209225 ) ( 2064630 * ) + NEW met1 TAPERRULE met1_width_260 ( 2064770 209315 ) ( 2086180 * ) via_260_260_hv + ( * 209405 ) ( 2086240 * ) + NEW met2 ( 2086120 209225 ) ( 2086240 * ) + NEW met1 TAPERRULE met1_width_260 ( 2086380 209315 ) ( 2102065 * ) ; + - flash_io0_di_core ( flash_io0_pad IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2027775 208635 ) ( * 210895 ) ; + - flash_io0_pad/HLD_H_N ( flash_io0_pad HLD_H_N ) + ( flash_io0_pad TIE_HI_ESD ) + + ROUTED met2 ( 2071000 209735 ) via_260_260_hv + NEW met2 ( 2070940 209825 ) ( 2071060 * ) + NEW met1 TAPERRULE met1_width_260 ( 2031180 209735 ) ( 2070800 * ) + NEW met1 ( 2030980 209735 ) via_260_260_hv ( * 209825 ) + ( 2031040 * ) + NEW met1 TAPERRULE met1_width_260 ( 2023880 209735 ) ( 2030780 * ) + NEW met2 ( 2030920 209645 ) ( 2031040 * ) + NEW met2 ( 2070940 209645 ) ( 2071060 * ) + NEW met1 TAPERRULE met1_width_260 ( 2071200 209735 ) ( 2102065 * ) ; + - flash_io0_pad/SLOW ( flash_io0_pad SLOW ) + ( constant_block_4 zero ) ( flash_io0_pad IB_MODE_SEL ) + ( flash_io0_pad VTRIP_SEL ) ( flash_io0_pad HLD_OVR ) + ( flash_io0_pad ANALOG_SEL ) ( flash_io0_pad ANALOG_POL ) + ( flash_io0_pad ANALOG_EN ) + + ROUTED met2 ( 2036965 210155 ) via_260_260_hv + NEW met2 ( 2036905 210245 ) ( 2037025 * ) + NEW met1 TAPERRULE met1_width_260 ( 2023880 210155 ) ( 2036765 * ) + NEW met2 ( 2036905 210065 ) ( 2037025 * ) + NEW met1 TAPERRULE met1_width_260 ( 2037165 210155 ) ( 2052120 * ) via_260_260_hv + ( * 210245 ) ( 2052180 * ) + NEW met2 ( 2052060 210065 ) ( 2052180 * ) + NEW met1 TAPERRULE met1_width_260 ( 2052320 210155 ) ( 2058585 * ) via_260_260_hv + ( * 210245 ) ( 2058645 * ) + NEW met2 ( 2058525 210065 ) ( 2058645 * ) + NEW met1 TAPERRULE met1_width_260 ( 2058785 210155 ) ( 2073755 * ) via_260_260_hv + ( * 210245 ) ( 2073815 * ) + NEW met2 ( 2073695 210065 ) ( 2073815 * ) + NEW met1 TAPERRULE met1_width_260 ( 2073955 210155 ) ( 2080195 * ) via_260_260_hv + ( * 210245 ) ( 2080255 * ) + NEW met2 ( 2080135 210065 ) ( 2080255 * ) + NEW met1 TAPERRULE met1_width_260 ( 2080395 210155 ) ( 2092150 * ) via_260_260_hv + ( * 210245 ) ( 2092210 * ) + NEW met2 ( 2092090 210065 ) ( 2092210 * ) + NEW met1 TAPERRULE met1_width_260 ( 2092350 210155 ) ( 2095355 * ) via_260_260_hv + ( * 210245 ) ( 2095415 * ) + NEW met2 ( 2095295 210065 ) ( 2095415 * ) + NEW met1 TAPERRULE met1_width_260 ( 2095555 210155 ) ( 2103945 * ) via_260_260_hv + ( * 210245 ) ( 2104005 * ) + NEW met2 TAPERRULE met2_width_260 ( 2103945 204845 ) ( * 209955 ) + NEW met2 ( 2103865 204705 ) ( 2104025 * ) + NEW met2 ( 2103945 204580 ) via2_300_300_vx + NEW met3 ( 2103920 204605 ) ( 2103970 * ) + NEW met3 ( 2104245 204580 ) ( 2120150 * ) + NEW met3 ( 2120150 203710 ) ( * 204280 ) + NEW met3 ( 2103920 204555 ) ( 2103970 * ) + NEW met3 ( 2103920 204580 ) ( 2103645 * ) + NEW met2 ( 2103865 204455 ) ( 2104025 * ) ; + - flash_io0_pad/PAD_A_ESD_0_H ( flash_io0_pad PAD_A_ESD_0_H ) ; + - flash_io0_pad/PAD_A_ESD_1_H ( flash_io0_pad PAD_A_ESD_1_H ) ; + - flash_io0_ieb_core ( flash_io0_pad DM[2] ) + ( flash_io0_pad INP_DIS ) ( flash_io0_pad DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2061355 208635 ) ( * 209030 ) ( * 209170 ) + ( * 210895 ) ( * 211035 ) ( * 211600 ) + NEW met2 ( 2061430 211740 ) ( 2061550 * ) + NEW met2 ( 2061490 211830 ) via_260_260_hv + NEW met2 ( 2061430 211920 ) ( 2061550 * ) + NEW met1 ( 2061690 211830 ) ( 2077130 * ) via_260_260_hv + ( * 211920 ) ( 2077190 * ) + NEW met2 ( 2077070 211740 ) ( 2077190 * ) + NEW met2 ( 2077130 209170 ) ( * 211600 ) NEW met1 ( 2046510 211830 ) ( 2061290 * ) - NEW met1 ( 2046310 211830 ) via_260_260 - NEW met1 ( 2046220 211830 ) ( 2046110 * ) - NEW met1 ( 2046510 211930 ) ( 2046400 * ) - NEW met1 ( 2046510 211730 ) ( 2046400 * ) - NEW met2 ( 2046250 211975 ) ( 2046370 * ) - NEW met2 ( 2046250 211685 ) ( 2046370 * ) - NEW met2 ( 2046310 209170 ) ( * 211600 ) - NEW met1 ( 2061400 211730 ) ( 2061490 * ) ( * 211830 ) - via_260_260 - NEW met1 ( 2061690 211930 ) ( 2061580 * ) - NEW met1 ( 2061690 211830 ) ( 2076930 * ) - NEW met1 ( 2061690 211730 ) ( 2061580 * ) - NEW met1 ( 2077040 211730 ) ( 2077130 * ) ( * 211830 ) - via_260_260 - NEW met1 ( 2077040 211930 ) ( 2076930 * ) - NEW met1 ( 2077330 211830 ) ( 2077220 * ) - NEW met2 ( 2077070 211975 ) ( 2077190 * ) - NEW met2 ( 2077070 211685 ) ( 2077190 * ) - NEW met2 ( 2077130 209170 ) ( * 211600 ) ; - - flash_io1_oeb_core - + ROUTED met2 ( 2372545 208797.5 ) ( 2372685 * ) - NEW met2 ( 2372450 209997.5 ) ( 2372685 * ) - NEW met2 ( 2372450 211035 ) ( * 212280 ) - NEW met2 ( 2372390 212365 ) ( 2372510 * ) - NEW met2 ( 2372390 212655 ) ( 2372510 * ) - NEW met1 ( 2372360 212610 ) ( 2372250 * ) + NEW met1 ( 2046310 211830 ) via_260_260_hv ( * 211920 ) + ( 2046370 * ) + NEW met2 ( 2046250 211740 ) ( 2046370 * ) + NEW met2 ( 2046310 209170 ) ( * 211600 ) ; + - flash_io0_pad/PAD_A_NOESD_H ( flash_io0_pad PAD_A_NOESD_H ) ; + - flash_io0_oeb_core ( flash_io0_pad OE_N ) ( flash_io0_pad DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2098615 208635 ) ( * 209030 ) ( * 209170 ) + ( * 210895 ) ( * 211035 ) ( * 212230 ) + NEW met2 ( 2098690 212370 ) ( 2098810 * ) + NEW met2 ( 2098750 212460 ) via_260_260_hv + NEW met2 ( 2098690 212550 ) ( 2098810 * ) + NEW met1 ( 2055710 212460 ) ( 2098550 * ) + NEW met1 ( 2055510 212460 ) via_260_260_hv ( * 212550 ) + ( 2055570 * ) + NEW met2 ( 2055450 212370 ) ( 2055570 * ) + NEW met2 ( 2055510 209170 ) ( * 212230 ) ; + - flash_io0_do_core ( flash_io0_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2082975 208635 ) ( * 210895 ) ; + - flash_io0_pad/IN_H ( flash_io0_pad IN_H ) ; + - mprj_io[28] ( mprj_pads.area2_io_pad\[9\] PAD ) ; + - mprj_io_in[28] ( mprj_pads.area2_io_pad\[9\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3349225 ) ( 210895 * ) ; + - mprj_io_one[28] ( mprj_pads.area2_io_pad\[9\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3343245 ) ( 210895 * ) ; + - mprj_io_slow_sel[28] ( mprj_pads.area2_io_pad\[9\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3340025 ) ( 210895 * ) ; + - mprj_analog_io[21] ( mprj_pads.area2_io_pad\[9\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3336805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[9\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[9\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[85] ( mprj_pads.area2_io_pad\[9\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3330825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[9\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[9\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[28] ( mprj_pads.area2_io_pad\[9\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3324845 ) ( 210895 * ) ; + - mprj_io_dm[84] ( mprj_pads.area2_io_pad\[9\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3321625 ) ( 210895 * ) ; + - mprj_io_analog_pol[28] ( mprj_pads.area2_io_pad\[9\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3318405 ) ( 210895 * ) ; + - mprj_io_inp_dis[28] ( mprj_pads.area2_io_pad\[9\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3315645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[9\]/ENABLE_H + ( mprj_pads.area2_io_pad\[9\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[9\]/HLD_H_N + ( mprj_pads.area2_io_pad\[9\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[9\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3305915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3305987.5 ) ( 210220 * ) + NEW met1 ( 210360 3306670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3306810 ) ( * 3345775 ) + NEW met1 ( 210360 3345915 ) ( 210480 * ) + NEW met1 ( 210420 3346005 ) via_260_260_vh + NEW met2 ( 208635 3346075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3346005 ) ( 210895 * ) + NEW met2 ( 208635 3345935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3346005 ) ( 210220 * ) + NEW met1 ( 210360 3346095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3346235 ) ( * 3352605 ) + NEW met1 ( 210420 3306280 ) via_260_860_vh + NEW met1 ( 210360 3305890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3305987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[28] ( mprj_pads.area2_io_pad\[9\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3303225 ) ( 210895 * ) ; + - mprj_io_dm[86] ( mprj_pads.area2_io_pad\[9\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3300005 ) ( 210895 * ) ; + - mprj_io_holdover[28] ( mprj_pads.area2_io_pad\[9\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3296785 ) ( 210895 * ) ; + - mprj_io_out[28] ( mprj_pads.area2_io_pad\[9\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3294025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[9\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[9\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[9\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[9\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 3352442.5 ) ( 210895 * ) + NEW met2 ( 208635 3352515 ) ( 210895 * ) + NEW met1 ( 209880 3352540 ) ( 210000 * ) + NEW met1 ( 209890 3352605 ) ( 209990 * ) + NEW met1 ( 209940 3352150 ) via_260_860_vh + NEW met1 ( 209880 3351760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3313255 ) ( * 3351620 ) + NEW met1 ( 209880 3313115 ) ( 210000 * ) + NEW met1 ( 209940 3312725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3312430 ) ( 210895 * ) + NEW met2 ( 208635 3312355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3312430 ) ( 209740 * ) + NEW met1 ( 209880 3312335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3291635 ) ( * 3312195 ) + NEW met1 ( 209880 3291495 ) ( 210000 * ) + NEW met1 ( 209940 3291105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3290810 ) ( 210895 * ) + NEW met2 ( 208635 3290735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3290810 ) ( 209740 * ) + NEW met1 ( 209880 3290715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3352442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[28] ( mprj_pads.area2_io_pad\[9\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3284825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[28] + ( mprj_pads.area2_io_pad\[9\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3281605 ) ( 210895 * ) ; + - mprj_io_oeb[28] ( mprj_pads.area2_io_pad\[9\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3278385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[9\]/IN_H + ( mprj_pads.area2_io_pad\[9\] IN_H ) ; + - mprj_io[15] ( mprj_pads.area1_io_pad\[15\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211490 2279070 ) ( * 4585600 ) + NEW met5 TAPERRULE met5_width_13000 ( 211490 4609480 ) ( * 4974220 ) + NEW met4 TAPERRULE met4_width_540 ( 205060 4608950 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_400 ( 217720 4586550 ) ( * 4608530 ) + NEW met4 TAPERRULE met4_width_470 ( 205060 4586165 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_570 ( 205195 4586550 ) ( * 4608530 ) + NEW met4 ( 211500 4597540 ) via4_12040_22280 + NEW met3 TAPERRULE met3_width_580 ( 204420 4608970 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_16570 ( 225805 4586550 ) ( * 4608530 ) + NEW met3 TAPERRULE met3_width_450 ( 204420 4586175 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_1210 ( 204875 4586550 ) ( * 4608530 ) + NEW met3 ( 211500 4597540 ) via3_12040_22280_hx + NEW met5 TAPERRULE met5_width_13000 ( 211490 2228780 ) ( * 2254410 ) + NEW met4 TAPERRULE met4_width_520 ( 205190 2278530 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_550 ( 217815 2255360 ) ( * 2278120 ) + NEW met4 TAPERRULE met4_width_460 ( 205190 2254980 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_670 ( 205375 2255360 ) ( * 2278120 ) + NEW met4 ( 211625 2266740 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_430 ( 206250 2278485 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16600 ( 225840 2255360 ) ( * 2278120 ) + NEW met3 TAPERRULE met3_width_455 ( 206250 2254982.5 ) ( 233990 * ) + NEW met3 ( 211625 2266740 ) via3_11830_23060_vx + NEW met5 TAPERRULE met5_width_13000 ( 211490 897300 ) ( * 2204120 ) + NEW met4 TAPERRULE met4_width_540 ( 205120 2228250 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_580 ( 217730 2205070 ) ( * 2227830 ) + NEW met4 TAPERRULE met4_width_440 ( 205120 2204700 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_640 ( 205290 2205070 ) ( * 2227830 ) + NEW met4 ( 211525 2216450 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_520 ( 206250 2228240 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16700 ( 225790 2205070 ) ( * 2227830 ) + NEW met3 TAPERRULE met3_width_420 ( 206250 2204710 ) ( 233990 * ) + NEW met3 ( 211525 2216450 ) via3_11830_23060_vx ; + - mprj_io_in[15] ( mprj_pads.area1_io_pad\[15\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3205225 4977105 ) ( * 4979365 ) ; + - mprj_io_one[15] ( mprj_pads.area1_io_pad\[15\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3199245 4977105 ) ( * 4979365 ) ; + - mprj_io_slow_sel[15] ( mprj_pads.area1_io_pad\[15\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3196025 4977105 ) ( * 4979365 ) ; + - mprj_analog_io[8] ( mprj_pads.area1_io_pad\[15\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3192805 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[15\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[15\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[46] ( mprj_pads.area1_io_pad\[15\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3186825 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[15\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[15\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[15] ( mprj_pads.area1_io_pad\[15\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3180845 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[45] ( mprj_pads.area1_io_pad\[15\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3177625 4977105 ) ( * 4979365 ) ; + - mprj_io_analog_pol[15] + ( mprj_pads.area1_io_pad\[15\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3174405 4977105 ) ( * 4979365 ) ; + - mprj_io_inp_dis[15] ( mprj_pads.area1_io_pad\[15\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3171645 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[15\]/ENABLE_H + ( mprj_pads.area1_io_pad\[15\] ENABLE_H ) ; + - mprj_pads.area1_io_pad\[15\]/HLD_H_N + ( mprj_pads.area1_io_pad\[15\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[15\] TIE_HI_ESD ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3161985 4977105 ) ( * 4977350 ) + NEW met2 ( 3161915 4977490 ) ( 3162640 * ) + NEW met2 ( 3161915 4977670 ) ( 3162640 * ) + NEW met2 TAPERRULE met2_width_280 ( 3161985 4977810 ) ( * 4979365 ) + NEW met2 ( 3162280 4977580 ) via_860_260_hv + NEW met1 TAPERRULE met1_width_240 ( 3162780 4977580 ) ( 3202005 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 3202005 4977780 ) ( * 4979365 ) + NEW met2 TAPERRULE met2_width_280 ( 3202005 4977105 ) ( * 4977380 ) + NEW met1 TAPERRULE met1_width_240 ( 3202205 4977580 ) ( 3208605 * ) ; + - mprj_io_analog_sel[15] + ( mprj_pads.area1_io_pad\[15\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3159225 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[47] ( mprj_pads.area1_io_pad\[15\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3156005 4977105 ) ( * 4979365 ) ; + - mprj_io_holdover[15] ( mprj_pads.area1_io_pad\[15\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3152785 4977105 ) ( * 4979365 ) ; + - mprj_io_out[15] ( mprj_pads.area1_io_pad\[15\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3150025 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[15\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[15\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[15\] ENABLE_INP_H ) + ( mprj_pads.area1_io_pad\[15\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3208445 4977105 ) ( * 4977830 ) + NEW met2 ( 3207790 4977970 ) ( 3208150 * ) ( * 4978060 ) + via_860_260_hv + NEW met2 ( 3207790 4978150 ) ( 3208515 * ) + NEW met2 TAPERRULE met2_width_280 ( 3208445 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 3169225 4978060 ) ( 3207650 * ) + NEW met1 ( 3168725 4978060 ) via_860_260_hv + NEW met2 ( 3168355 4978150 ) ( 3169085 * ) + NEW met2 TAPERRULE met2_width_280 ( 3168425 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 3147605 4978060 ) ( 3168225 * ) + NEW met1 ( 3147105 4978060 ) via_860_260_hv + NEW met2 ( 3146735 4978150 ) ( 3147465 * ) + NEW met2 TAPERRULE met2_width_280 ( 3146805 4978290 ) ( * 4979365 ) + NEW met2 ( 3146735 4977970 ) ( 3147465 * ) + NEW met2 TAPERRULE met2_width_280 ( 3146805 4977105 ) ( * 4977830 ) + NEW met2 ( 3168355 4977970 ) ( 3169085 * ) + NEW met2 TAPERRULE met2_width_280 ( 3168425 4977105 ) ( * 4977830 ) ; + - mprj_io_vtrip_sel[15] ( mprj_pads.area1_io_pad\[15\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3140825 4977105 ) ( * 4979365 ) ; + - mprj_io_ib_mode_sel[15] + ( mprj_pads.area1_io_pad\[15\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3137605 4977105 ) ( * 4979365 ) ; + - mprj_io_oeb[15] ( mprj_pads.area1_io_pad\[15\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3134385 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[15\]/IN_H + ( mprj_pads.area1_io_pad\[15\] IN_H ) ; + - vdda_pad ( mgmt_vdda_hvclamp_pad VDDA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3121910 64465 ) ( 3181150 * ) ; + - vdda2 ( FILLER_78 VDDA ) ( mgmt_vssio_hvclamp_pad\[1\] VDDA ) + ( FILLER_80 VDDA ) ( FILLER_81 VDDA ) ( FILLER_82 VDDA ) + ( FILLER_79 VDDA ) ( FILLER_75 VDDA ) ( FILLER_77 VDDA ) + ( FILLER_76 VDDA ) ( FILLER_71 VDDA ) ( FILLER_74 VDDA ) + ( FILLER_73 VDDA ) ( FILLER_72 VDDA ) ( FILLER_63 VDDA ) + ( FILLER_68 VDDA ) ( FILLER_69 VDDA ) + ( mprj_pads.area2_io_pad\[0\] VDDA ) ( FILLER_66 VDDA ) + ( FILLER_67 VDDA ) ( FILLER_65 VDDA ) ( FILLER_64 VDDA ) + ( FILLER_59 VDDA ) ( FILLER_62 VDDA ) ( FILLER_61 VDDA ) + ( FILLER_60 VDDA ) ( FILLER_57 VDDA ) ( FILLER_58 VDDA ) + ( FILLER_53 VDDA ) ( FILLER_54 VDDA ) ( FILLER_55 VDDA ) + ( mprj_pads.area2_io_pad\[1\] VDDA ) ( FILLER_48 VDDA ) + ( FILLER_52 VDDA ) ( FILLER_51 VDDA ) ( FILLER_50 VDDA ) + ( FILLER_49 VDDA ) ( FILLER_46 VDDA ) ( FILLER_47 VDDA ) + ( FILLER_44 VDDA ) ( FILLER_45 VDDA ) ( FILLER_38 VDDA ) + ( FILLER_41 VDDA ) ( FILLER_42 VDDA ) + ( mprj_pads.area2_io_pad\[2\] VDDA ) ( FILLER_40 VDDA ) + ( FILLER_39 VDDA ) ( FILLER_35 VDDA ) ( FILLER_37 VDDA ) + ( FILLER_36 VDDA ) ( FILLER_31 VDDA ) ( FILLER_34 VDDA ) + ( FILLER_33 VDDA ) ( FILLER_32 VDDA ) ( FILLER_28 VDDA ) + ( mprj_pads.area2_io_pad\[3\] VDDA ) ( FILLER_29 VDDA ) + ( FILLER_26 VDDA ) ( FILLER_27 VDDA ) ( FILLER_25 VDDA ) + ( FILLER_24 VDDA ) ( FILLER_23 VDDA ) ( FILLER_22 VDDA ) + ( FILLER_21 VDDA ) ( FILLER_20 VDDA ) ( FILLER_19 VDDA ) + ( FILLER_18 VDDA ) ( FILLER_14 VDDA ) ( FILLER_15 VDDA ) + ( FILLER_16 VDDA ) ( mprj_pads.area2_io_pad\[4\] VDDA ) + ( FILLER_10 VDDA ) ( FILLER_13 VDDA ) ( FILLER_12 VDDA ) + ( FILLER_11 VDDA ) ( FILLER_6 VDDA ) ( FILLER_9 VDDA ) + ( FILLER_8 VDDA ) ( FILLER_7 VDDA ) ( FILLER_5 VDDA ) + ( user2_corner VDDA ) ( FILLER_601 VDDA ) ( FILLER_603 VDDA ) + ( FILLER_604 VDDA ) ( FILLER_602 VDDA ) ( FILLER_596 VDDA ) + ( FILLER_600 VDDA ) ( FILLER_599 VDDA ) ( FILLER_598 VDDA ) + ( FILLER_597 VDDA ) ( FILLER_595 VDDA ) ( FILLER_590 VDDA ) + ( FILLER_593 VDDA ) ( mprj_pads.area2_io_pad\[5\] VDDA ) + ( FILLER_592 VDDA ) ( FILLER_591 VDDA ) ( FILLER_586 VDDA ) + ( FILLER_589 VDDA ) ( FILLER_588 VDDA ) ( FILLER_587 VDDA ) + ( FILLER_585 VDDA ) ( FILLER_580 VDDA ) ( FILLER_583 VDDA ) + ( user2_vccd_lvclamp_pad VDDA ) ( FILLER_582 VDDA ) + ( FILLER_581 VDDA ) ( FILLER_576 VDDA ) ( FILLER_579 VDDA ) + ( FILLER_578 VDDA ) ( FILLER_577 VDDA ) ( FILLER_575 VDDA ) + ( FILLER_570 VDDA ) ( FILLER_573 VDDA ) + ( mgmt_vddio_hvclamp_pad\[1\] VDDA ) ( FILLER_572 VDDA ) + ( FILLER_571 VDDA ) ( FILLER_566 VDDA ) ( FILLER_569 VDDA ) + ( FILLER_568 VDDA ) ( FILLER_567 VDDA ) ( FILLER_565 VDDA ) + ( FILLER_560 VDDA ) ( user2_vssa_hvclamp_pad VDDA ) + ( FILLER_562 VDDA ) ( FILLER_563 VDDA ) ( FILLER_561 VDDA ) + ( FILLER_556 VDDA ) ( FILLER_559 VDDA ) ( FILLER_558 VDDA ) + ( FILLER_557 VDDA ) ( FILLER_555 VDDA ) ( FILLER_550 VDDA ) + ( FILLER_553 VDDA ) ( mprj_pads.area2_io_pad\[6\] VDDA ) + ( FILLER_552 VDDA ) ( FILLER_551 VDDA ) ( FILLER_546 VDDA ) + ( FILLER_549 VDDA ) ( FILLER_548 VDDA ) ( FILLER_547 VDDA ) + ( FILLER_545 VDDA ) ( FILLER_540 VDDA ) ( FILLER_543 VDDA ) + ( mprj_pads.area2_io_pad\[7\] VDDA ) ( FILLER_542 VDDA ) + ( FILLER_541 VDDA ) ( FILLER_536 VDDA ) ( FILLER_539 VDDA ) + ( FILLER_538 VDDA ) ( FILLER_537 VDDA ) ( FILLER_535 VDDA ) + ( FILLER_531 VDDA ) ( FILLER_533 VDDA ) + ( mprj_pads.area2_io_pad\[8\] VDDA ) ( FILLER_532 VDDA ) + ( FILLER_527 VDDA ) ( FILLER_530 VDDA ) ( FILLER_529 VDDA ) + ( FILLER_528 VDDA ) ( FILLER_525 VDDA ) ( FILLER_526 VDDA ) + ( FILLER_521 VDDA ) ( FILLER_523 VDDA ) + ( mprj_pads.area2_io_pad\[9\] VDDA ) ( FILLER_522 VDDA ) + ( FILLER_517 VDDA ) ( FILLER_520 VDDA ) ( FILLER_519 VDDA ) + ( FILLER_518 VDDA ) ( FILLER_515 VDDA ) ( FILLER_516 VDDA ) + ( FILLER_511 VDDA ) ( FILLER_513 VDDA ) + ( mprj_pads.area2_io_pad\[10\] VDDA ) ( FILLER_512 VDDA ) + ( FILLER_507 VDDA ) ( FILLER_510 VDDA ) ( FILLER_509 VDDA ) + ( FILLER_508 VDDA ) ( FILLER_505 VDDA ) ( FILLER_506 VDDA ) + ( FILLER_501 VDDA ) ( FILLER_502 VDDA ) ( FILLER_503 VDDA ) + ( mprj_pads.area2_io_pad\[11\] VDDA ) ( FILLER_497 VDDA ) + ( FILLER_500 VDDA ) ( FILLER_499 VDDA ) ( FILLER_498 VDDA ) + ( FILLER_495 VDDA ) ( FILLER_496 VDDA ) ( FILLER_492 VDDA ) + ( mprj_pads.area2_io_pad\[12\] VDDA ) ( FILLER_493 VDDA ) + ( FILLER_488 VDDA ) ( FILLER_491 VDDA ) ( FILLER_490 VDDA ) + ( FILLER_489 VDDA ) ( FILLER_485 VDDA ) ( FILLER_487 VDDA ) + ( FILLER_486 VDDA ) ( FILLER_481 VDDA ) ( FILLER_482 VDDA ) + ( FILLER_483 VDDA ) ( user2_vdda_hvclamp_pad VDDA ) + ( FILLER_478 VDDA ) ( FILLER_480 VDDA ) ( FILLER_479 VDDA ) + ( FILLER_476 VDDA ) ( FILLER_477 VDDA ) ( FILLER_475 VDDA ) + ( FILLER_472 VDDA ) ( FILLER_SB2 VDDA ) ( FILLER_473 VDDA ) + ( user2_vssd_lvclamp_pad VDDA ) ( FILLER_468 VDDA ) + ( FILLER_471 VDDA ) ( FILLER_470 VDDA ) ( FILLER_469 VDDA ) + ( FILLER_465 VDDA ) ( FILLER_467 VDDA ) ( FILLER_466 VDDA ) + ( FILLER_462 VDDA ) ( FILLER_463 VDDA ) + ( mprj_pads.area2_io_pad\[13\] VDDA ) ( FILLER_458 VDDA ) + ( FILLER_461 VDDA ) ( FILLER_460 VDDA ) ( FILLER_459 VDDA ) + ( FILLER_455 VDDA ) ( FILLER_457 VDDA ) ( FILLER_456 VDDA ) + ( FILLER_453 VDDA ) ( mprj_pads.area2_io_pad\[14\] VDDA ) + ( FILLER_448 VDDA ) ( FILLER_452 VDDA ) ( FILLER_451 VDDA ) + ( FILLER_450 VDDA ) ( FILLER_449 VDDA ) ( FILLER_446 VDDA ) + ( FILLER_447 VDDA ) ( FILLER_445 VDDA ) ( FILLER_438 VDDA ) + ( FILLER_443 VDDA ) ( mprj_pads.area2_io_pad\[15\] VDDA ) + ( FILLER_442 VDDA ) ( FILLER_441 VDDA ) ( FILLER_440 VDDA ) + ( FILLER_439 VDDA ) ( FILLER_436 VDDA ) ( FILLER_437 VDDA ) + ( FILLER_435 VDDA ) ( FILLER_429 VDDA ) ( FILLER_433 VDDA ) + ( mprj_pads.area2_io_pad\[16\] VDDA ) ( FILLER_432 VDDA ) + ( FILLER_431 VDDA ) ( FILLER_430 VDDA ) ( FILLER_426 VDDA ) + ( FILLER_428 VDDA ) ( FILLER_427 VDDA ) ( FILLER_425 VDDA ) + ( FILLER_419 VDDA ) ( FILLER_423 VDDA ) + ( mprj_pads.area2_io_pad\[17\] VDDA ) ( FILLER_422 VDDA ) + ( FILLER_421 VDDA ) ( FILLER_420 VDDA ) ( FILLER_416 VDDA ) + ( FILLER_418 VDDA ) ( FILLER_417 VDDA ) ( FILLER_415 VDDA ) + ( FILLER_409 VDDA ) ( FILLER_413 VDDA ) + ( mprj_pads.area2_io_pad\[18\] VDDA ) ( FILLER_412 VDDA ) + ( FILLER_411 VDDA ) ( FILLER_410 VDDA ) ( FILLER_408 VDDA ) + ( FILLER_407 VDDA ) ( FILLER_406 VDDA ) ( FILLER_405 VDDA ) + + ROUTED met4 TAPERRULE met4_width_960 ( 181765 2278515 ) ( 184915 * ) ; + - vssa2 ( FILLER_78 VSSA ) ( mgmt_vssio_hvclamp_pad\[1\] VSSA ) + ( FILLER_80 VSSA ) ( FILLER_81 VSSA ) ( FILLER_82 VSSA ) + ( FILLER_79 VSSA ) ( FILLER_75 VSSA ) ( FILLER_77 VSSA ) + ( FILLER_76 VSSA ) ( FILLER_71 VSSA ) ( FILLER_74 VSSA ) + ( FILLER_73 VSSA ) ( FILLER_72 VSSA ) ( FILLER_63 VSSA ) + ( FILLER_68 VSSA ) ( FILLER_69 VSSA ) + ( mprj_pads.area2_io_pad\[0\] VSSA ) ( FILLER_66 VSSA ) + ( FILLER_67 VSSA ) ( FILLER_65 VSSA ) ( FILLER_64 VSSA ) + ( FILLER_59 VSSA ) ( FILLER_62 VSSA ) ( FILLER_61 VSSA ) + ( FILLER_60 VSSA ) ( FILLER_57 VSSA ) ( FILLER_58 VSSA ) + ( FILLER_53 VSSA ) ( FILLER_54 VSSA ) ( FILLER_55 VSSA ) + ( mprj_pads.area2_io_pad\[1\] VSSA ) ( FILLER_48 VSSA ) + ( FILLER_52 VSSA ) ( FILLER_51 VSSA ) ( FILLER_50 VSSA ) + ( FILLER_49 VSSA ) ( FILLER_46 VSSA ) ( FILLER_47 VSSA ) + ( FILLER_44 VSSA ) ( FILLER_45 VSSA ) ( FILLER_38 VSSA ) + ( FILLER_41 VSSA ) ( FILLER_42 VSSA ) + ( mprj_pads.area2_io_pad\[2\] VSSA ) ( FILLER_40 VSSA ) + ( FILLER_39 VSSA ) ( FILLER_35 VSSA ) ( FILLER_37 VSSA ) + ( FILLER_36 VSSA ) ( FILLER_31 VSSA ) ( FILLER_34 VSSA ) + ( FILLER_33 VSSA ) ( FILLER_32 VSSA ) ( FILLER_28 VSSA ) + ( mprj_pads.area2_io_pad\[3\] VSSA ) ( FILLER_29 VSSA ) + ( FILLER_26 VSSA ) ( FILLER_27 VSSA ) ( FILLER_25 VSSA ) + ( FILLER_24 VSSA ) ( FILLER_23 VSSA ) ( FILLER_22 VSSA ) + ( FILLER_21 VSSA ) ( FILLER_20 VSSA ) ( FILLER_19 VSSA ) + ( FILLER_18 VSSA ) ( FILLER_14 VSSA ) ( FILLER_15 VSSA ) + ( FILLER_16 VSSA ) ( mprj_pads.area2_io_pad\[4\] VSSA ) + ( FILLER_10 VSSA ) ( FILLER_13 VSSA ) ( FILLER_12 VSSA ) + ( FILLER_11 VSSA ) ( FILLER_6 VSSA ) ( FILLER_9 VSSA ) + ( FILLER_8 VSSA ) ( FILLER_7 VSSA ) ( FILLER_5 VSSA ) + ( user2_corner VSSA ) ( FILLER_601 VSSA ) ( FILLER_603 VSSA ) + ( FILLER_604 VSSA ) ( FILLER_602 VSSA ) ( FILLER_596 VSSA ) + ( FILLER_600 VSSA ) ( FILLER_599 VSSA ) ( FILLER_598 VSSA ) + ( FILLER_597 VSSA ) ( FILLER_595 VSSA ) ( FILLER_590 VSSA ) + ( FILLER_593 VSSA ) ( mprj_pads.area2_io_pad\[5\] VSSA ) + ( FILLER_592 VSSA ) ( FILLER_591 VSSA ) ( FILLER_586 VSSA ) + ( FILLER_589 VSSA ) ( FILLER_588 VSSA ) ( FILLER_587 VSSA ) + ( FILLER_585 VSSA ) ( FILLER_580 VSSA ) ( FILLER_583 VSSA ) + ( user2_vccd_lvclamp_pad VSSA ) ( FILLER_582 VSSA ) + ( FILLER_581 VSSA ) ( FILLER_576 VSSA ) ( FILLER_579 VSSA ) + ( FILLER_578 VSSA ) ( FILLER_577 VSSA ) ( FILLER_575 VSSA ) + ( FILLER_570 VSSA ) ( FILLER_573 VSSA ) + ( mgmt_vddio_hvclamp_pad\[1\] VSSA ) ( FILLER_572 VSSA ) + ( FILLER_571 VSSA ) ( FILLER_566 VSSA ) ( FILLER_569 VSSA ) + ( FILLER_568 VSSA ) ( FILLER_567 VSSA ) ( FILLER_565 VSSA ) + ( FILLER_560 VSSA ) ( user2_vssa_hvclamp_pad VSSA ) + ( FILLER_562 VSSA ) ( FILLER_563 VSSA ) ( FILLER_561 VSSA ) + ( FILLER_556 VSSA ) ( FILLER_559 VSSA ) ( FILLER_558 VSSA ) + ( FILLER_557 VSSA ) ( FILLER_555 VSSA ) ( FILLER_550 VSSA ) + ( FILLER_553 VSSA ) ( mprj_pads.area2_io_pad\[6\] VSSA ) + ( FILLER_552 VSSA ) ( FILLER_551 VSSA ) ( FILLER_546 VSSA ) + ( FILLER_549 VSSA ) ( FILLER_548 VSSA ) ( FILLER_547 VSSA ) + ( FILLER_545 VSSA ) ( FILLER_540 VSSA ) ( FILLER_543 VSSA ) + ( mprj_pads.area2_io_pad\[7\] VSSA ) ( FILLER_542 VSSA ) + ( FILLER_541 VSSA ) ( FILLER_536 VSSA ) ( FILLER_539 VSSA ) + ( FILLER_538 VSSA ) ( FILLER_537 VSSA ) ( FILLER_535 VSSA ) + ( FILLER_531 VSSA ) ( FILLER_533 VSSA ) + ( mprj_pads.area2_io_pad\[8\] VSSA ) ( FILLER_532 VSSA ) + ( FILLER_527 VSSA ) ( FILLER_530 VSSA ) ( FILLER_529 VSSA ) + ( FILLER_528 VSSA ) ( FILLER_525 VSSA ) ( FILLER_526 VSSA ) + ( FILLER_521 VSSA ) ( FILLER_523 VSSA ) + ( mprj_pads.area2_io_pad\[9\] VSSA ) ( FILLER_522 VSSA ) + ( FILLER_517 VSSA ) ( FILLER_520 VSSA ) ( FILLER_519 VSSA ) + ( FILLER_518 VSSA ) ( FILLER_515 VSSA ) ( FILLER_516 VSSA ) + ( FILLER_511 VSSA ) ( FILLER_513 VSSA ) + ( mprj_pads.area2_io_pad\[10\] VSSA ) ( FILLER_512 VSSA ) + ( FILLER_507 VSSA ) ( FILLER_510 VSSA ) ( FILLER_509 VSSA ) + ( FILLER_508 VSSA ) ( FILLER_505 VSSA ) ( FILLER_506 VSSA ) + ( FILLER_501 VSSA ) ( FILLER_502 VSSA ) ( FILLER_503 VSSA ) + ( mprj_pads.area2_io_pad\[11\] VSSA ) ( FILLER_497 VSSA ) + ( FILLER_500 VSSA ) ( FILLER_499 VSSA ) ( FILLER_498 VSSA ) + ( FILLER_495 VSSA ) ( FILLER_496 VSSA ) ( FILLER_492 VSSA ) + ( mprj_pads.area2_io_pad\[12\] VSSA ) ( FILLER_493 VSSA ) + ( FILLER_488 VSSA ) ( FILLER_491 VSSA ) ( FILLER_490 VSSA ) + ( FILLER_489 VSSA ) ( FILLER_485 VSSA ) ( FILLER_487 VSSA ) + ( FILLER_486 VSSA ) ( FILLER_481 VSSA ) ( FILLER_482 VSSA ) + ( FILLER_483 VSSA ) ( user2_vdda_hvclamp_pad VSSA ) + ( FILLER_478 VSSA ) ( FILLER_480 VSSA ) ( FILLER_479 VSSA ) + ( FILLER_476 VSSA ) ( FILLER_477 VSSA ) ( FILLER_475 VSSA ) + ( FILLER_472 VSSA ) ( FILLER_473 VSSA ) + ( user2_vssd_lvclamp_pad VSSA ) ( FILLER_SB2 VSSA ) + ( FILLER_468 VSSA ) ( FILLER_471 VSSA ) ( FILLER_470 VSSA ) + ( FILLER_469 VSSA ) ( FILLER_465 VSSA ) ( FILLER_467 VSSA ) + ( FILLER_466 VSSA ) ( FILLER_462 VSSA ) ( FILLER_463 VSSA ) + ( mprj_pads.area2_io_pad\[13\] VSSA ) ( FILLER_458 VSSA ) + ( FILLER_461 VSSA ) ( FILLER_460 VSSA ) ( FILLER_459 VSSA ) + ( FILLER_455 VSSA ) ( FILLER_457 VSSA ) ( FILLER_456 VSSA ) + ( FILLER_453 VSSA ) ( mprj_pads.area2_io_pad\[14\] VSSA ) + ( FILLER_448 VSSA ) ( FILLER_452 VSSA ) ( FILLER_451 VSSA ) + ( FILLER_450 VSSA ) ( FILLER_449 VSSA ) ( FILLER_446 VSSA ) + ( FILLER_447 VSSA ) ( FILLER_445 VSSA ) ( FILLER_438 VSSA ) + ( FILLER_443 VSSA ) ( mprj_pads.area2_io_pad\[15\] VSSA ) + ( FILLER_442 VSSA ) ( FILLER_441 VSSA ) ( FILLER_440 VSSA ) + ( FILLER_439 VSSA ) ( FILLER_436 VSSA ) ( FILLER_437 VSSA ) + ( FILLER_435 VSSA ) ( FILLER_429 VSSA ) ( FILLER_433 VSSA ) + ( mprj_pads.area2_io_pad\[16\] VSSA ) ( FILLER_432 VSSA ) + ( FILLER_431 VSSA ) ( FILLER_430 VSSA ) ( FILLER_426 VSSA ) + ( FILLER_428 VSSA ) ( FILLER_427 VSSA ) ( FILLER_425 VSSA ) + ( FILLER_419 VSSA ) ( FILLER_423 VSSA ) + ( mprj_pads.area2_io_pad\[17\] VSSA ) ( FILLER_422 VSSA ) + ( FILLER_421 VSSA ) ( FILLER_420 VSSA ) ( FILLER_416 VSSA ) + ( FILLER_418 VSSA ) ( FILLER_417 VSSA ) ( FILLER_415 VSSA ) + ( FILLER_409 VSSA ) ( FILLER_413 VSSA ) + ( mprj_pads.area2_io_pad\[18\] VSSA ) ( FILLER_412 VSSA ) + ( FILLER_411 VSSA ) ( FILLER_410 VSSA ) ( FILLER_408 VSSA ) + ( FILLER_407 VSSA ) ( FILLER_406 VSSA ) ( FILLER_405 VSSA ) + + ROUTED met4 TAPERRULE met4_width_330 ( 143430 2204150 ) ( * 2278850 ) ; + - mprj_io[0] ( mprj_pads.area1_io_pad\[0\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 507000 ) ( * 568000 ) ; + - mprj_pads.area1_io_pad\[0\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[0\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[0\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[0\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 501557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 502240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 502380 ) ( * 540745 ) + NEW met1 ( 3378000 540885 ) ( 3378120 * ) + NEW met1 ( 3378060 541275 ) via_260_860_vh + NEW met2 ( 3377105 541645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 541570 ) ( 3379365 * ) + NEW met1 ( 3378000 541665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 541805 ) ( * 562365 ) + NEW met1 ( 3378000 562505 ) ( 3378120 * ) + NEW met1 ( 3378060 562895 ) via_260_860_vh + NEW met2 ( 3377105 563265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 563190 ) ( 3379365 * ) + NEW met1 ( 3378000 563285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 563190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 541570 ) ( 3377860 * ) + NEW met2 ( 3378060 501850 ) via_260_860_vh ( * 501460 ) + ( 3378120 * ) + NEW met1 ( 3378010 501395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 501557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 501485 ) ( 3379365 * ) ; + - mprj_io_in[0] ( mprj_pads.area1_io_pad\[0\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 504775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[0\]/HLD_H_N + ( mprj_pads.area1_io_pad\[0\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[0\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 548085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 548012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 548110 ) ( 3377640 * ) + NEW met1 ( 3377580 547720 ) via_260_860_vh + NEW met1 ( 3377520 547330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 508225 ) ( * 547190 ) + NEW met1 ( 3377520 508085 ) ( 3377640 * ) + NEW met1 ( 3377580 507995 ) via_260_260_vh + NEW met2 ( 3377105 508065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 507995 ) ( 3379365 * ) + NEW met2 ( 3377105 507925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 507995 ) ( 3377380 * ) + NEW met1 ( 3377520 507905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 501395 ) ( * 507765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 548012.5 ) ( 3377380 * ) ; + - mprj_io_one[0] ( mprj_pads.area1_io_pad\[0\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 510755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[0] ( mprj_pads.area1_io_pad\[0\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 513975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[0\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[0\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[0\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[0\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[1] ( mprj_pads.area1_io_pad\[0\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 523175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[0\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[0\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[0] ( mprj_pads.area1_io_pad\[0\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 529155 ) ( 3379365 * ) ; + - mprj_io_dm[0] ( mprj_pads.area1_io_pad\[0\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 532375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[0] ( mprj_pads.area1_io_pad\[0\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 535595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[0] ( mprj_pads.area1_io_pad\[0\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 538355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[0\]/ENABLE_H + ( mprj_pads.area1_io_pad\[0\] ENABLE_H ) ; + - mprj_io_analog_sel[0] ( mprj_pads.area1_io_pad\[0\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 550775 ) ( 3379365 * ) ; + - mprj_io_dm[2] ( mprj_pads.area1_io_pad\[0\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 553995 ) ( 3379365 * ) ; + - mprj_io_holdover[0] ( mprj_pads.area1_io_pad\[0\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 557215 ) ( 3379365 * ) ; + - mprj_io_out[0] ( mprj_pads.area1_io_pad\[0\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 559975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[0] ( mprj_pads.area1_io_pad\[0\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 569175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[0] + ( mprj_pads.area1_io_pad\[0\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 572395 ) ( 3379365 * ) ; + - mprj_io_oeb[0] ( mprj_pads.area1_io_pad\[0\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 575615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[0\]/IN_H + ( mprj_pads.area1_io_pad\[0\] IN_H ) ; + - mprj_io[19] ( mprj_pads.area2_io_pad\[0\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 476580 ) ( * 2324490 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348200 ) ( * 4538150 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562410 ) ( * 4588310 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4612670 ) ( * 4962770 ) + NEW met4 TAPERRULE met4_width_560 ( 3370200 4612150 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_600 ( 3382780 4589260 ) ( * 4611720 ) + NEW met4 TAPERRULE met4_width_530 ( 3370200 4588845 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589260 ) ( * 4611720 ) + NEW met4 ( 3376580 4600490 ) via4_11800_22760 + NEW met3 TAPERRULE met3_width_630 ( 3354010 4612185 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1140 ( 3383050 4589260 ) ( * 4611720 ) + NEW met3 TAPERRULE met3_width_610 ( 3354010 4588805 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16820 ( 3362270 4589260 ) ( * 4611720 ) + NEW met3 ( 3376580 4600490 ) via3_11800_22760_hx + NEW met4 TAPERRULE met4_width_590 ( 3370230 4561905 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_590 ( 3382815 4539100 ) ( * 4561460 ) + NEW met4 TAPERRULE met4_width_600 ( 3370230 4538650 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_770 ( 3370465 4539100 ) ( * 4561460 ) + NEW met4 ( 3376685 4550280 ) via4_11670_22660 + NEW met3 TAPERRULE met3_width_635 ( 3354010 4561927.5 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1100 ( 3383070 4539100 ) ( * 4561460 ) + NEW met3 TAPERRULE met3_width_650 ( 3354010 4538625 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16990 ( 3362355 4539100 ) ( * 4561460 ) + NEW met3 ( 3376685 4550280 ) via3_11670_22660_hx + NEW met4 TAPERRULE met4_width_550 ( 3370270 2347675 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_530 ( 3382825 2325440 ) ( * 2347250 ) + NEW met4 TAPERRULE met4_width_520 ( 3370270 2325030 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370420 2325440 ) ( * 2347250 ) + NEW met4 ( 3376640 2336345 ) via4_11840_22110 + NEW met3 TAPERRULE met3_width_600 ( 3354120 2347700 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_1830 ( 3383475 2325440 ) ( * 2347250 ) + NEW met3 TAPERRULE met3_width_545 ( 3354120 2325017.5 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_16750 ( 3362345 2325440 ) ( * 2347250 ) + NEW met3 ( 3376640 2336345 ) via3_11840_22110_hx ; + - mprj_io_in[19] ( mprj_pads.area2_io_pad\[0\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1485225 4977105 ) ( * 4979365 ) ; + - mprj_io_one[19] ( mprj_pads.area2_io_pad\[0\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1479245 4977105 ) ( * 4979365 ) ; + - mprj_io_slow_sel[19] ( mprj_pads.area2_io_pad\[0\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1476025 4977105 ) ( * 4979365 ) ; + - mprj_analog_io[12] ( mprj_pads.area2_io_pad\[0\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1472805 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[0\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[0\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[58] ( mprj_pads.area2_io_pad\[0\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1466825 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[0\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[0\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[19] ( mprj_pads.area2_io_pad\[0\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1460845 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[57] ( mprj_pads.area2_io_pad\[0\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1457625 4977105 ) ( * 4979365 ) ; + - mprj_io_analog_pol[19] ( mprj_pads.area2_io_pad\[0\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1454405 4977105 ) ( * 4979365 ) ; + - mprj_io_inp_dis[19] ( mprj_pads.area2_io_pad\[0\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1451645 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[0\]/ENABLE_H + ( mprj_pads.area2_io_pad\[0\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[0\]/HLD_H_N + ( mprj_pads.area2_io_pad\[0\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[0\] TIE_HI_ESD ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1441985 4977105 ) ( * 4977350 ) + NEW met2 ( 1441915 4977490 ) ( 1442640 * ) + NEW met2 ( 1441915 4977670 ) ( 1442640 * ) + NEW met2 TAPERRULE met2_width_280 ( 1441985 4977810 ) ( * 4979365 ) + NEW met2 ( 1442280 4977580 ) via_860_260_hv + NEW met1 TAPERRULE met1_width_240 ( 1442780 4977580 ) ( 1482005 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 1482005 4977780 ) ( * 4979365 ) + NEW met2 TAPERRULE met2_width_280 ( 1482005 4977105 ) ( * 4977380 ) + NEW met1 TAPERRULE met1_width_240 ( 1482205 4977580 ) ( 1488605 * ) ; + - mprj_io_analog_sel[19] ( mprj_pads.area2_io_pad\[0\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1439225 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[59] ( mprj_pads.area2_io_pad\[0\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1436005 4977105 ) ( * 4979365 ) ; + - mprj_io_holdover[19] ( mprj_pads.area2_io_pad\[0\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1432785 4977105 ) ( * 4979365 ) ; + - mprj_io_out[19] ( mprj_pads.area2_io_pad\[0\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1430025 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[0\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[0\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[0\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[0\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1488445 4977105 ) ( * 4977830 ) + NEW met2 ( 1487790 4977970 ) ( 1488150 * ) ( * 4978060 ) + via_860_260_hv + NEW met2 ( 1487790 4978150 ) ( 1488515 * ) + NEW met2 TAPERRULE met2_width_280 ( 1488445 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 1449225 4978060 ) ( 1487650 * ) + NEW met1 ( 1448725 4978060 ) via_860_260_hv + NEW met2 ( 1448355 4978150 ) ( 1449085 * ) + NEW met2 TAPERRULE met2_width_280 ( 1448425 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 1427605 4978060 ) ( 1448225 * ) + NEW met1 ( 1427105 4978060 ) via_860_260_hv + NEW met2 ( 1426735 4978150 ) ( 1427465 * ) + NEW met2 TAPERRULE met2_width_280 ( 1426805 4978290 ) ( * 4979365 ) + NEW met2 ( 1426735 4977970 ) ( 1427465 * ) + NEW met2 TAPERRULE met2_width_280 ( 1426805 4977105 ) ( * 4977830 ) + NEW met2 ( 1448355 4977970 ) ( 1449085 * ) + NEW met2 TAPERRULE met2_width_280 ( 1448425 4977105 ) ( * 4977830 ) ; + - mprj_io_vtrip_sel[19] ( mprj_pads.area2_io_pad\[0\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1420825 4977105 ) ( * 4979365 ) ; + - mprj_io_ib_mode_sel[19] + ( mprj_pads.area2_io_pad\[0\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1417605 4977105 ) ( * 4979365 ) ; + - mprj_io_oeb[19] ( mprj_pads.area2_io_pad\[0\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1414385 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[0\]/IN_H + ( mprj_pads.area2_io_pad\[0\] IN_H ) ; + - mprj_io[29] ( mprj_pads.area2_io_pad\[10\] PAD ) ; + - mprj_io_in[29] ( mprj_pads.area2_io_pad\[10\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3133225 ) ( 210895 * ) ; + - mprj_io_one[29] ( mprj_pads.area2_io_pad\[10\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3127245 ) ( 210895 * ) ; + - mprj_io_slow_sel[29] ( mprj_pads.area2_io_pad\[10\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3124025 ) ( 210895 * ) ; + - mprj_analog_io[22] ( mprj_pads.area2_io_pad\[10\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3120805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[10\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[10\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[88] ( mprj_pads.area2_io_pad\[10\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3114825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[10\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[10\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[29] ( mprj_pads.area2_io_pad\[10\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3108845 ) ( 210895 * ) ; + - mprj_io_dm[87] ( mprj_pads.area2_io_pad\[10\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3105625 ) ( 210895 * ) ; + - mprj_io_analog_pol[29] + ( mprj_pads.area2_io_pad\[10\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3102405 ) ( 210895 * ) ; + - mprj_io_inp_dis[29] ( mprj_pads.area2_io_pad\[10\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3099645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[10\]/ENABLE_H + ( mprj_pads.area2_io_pad\[10\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[10\]/HLD_H_N + ( mprj_pads.area2_io_pad\[10\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[10\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3089915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3089987.5 ) ( 210220 * ) + NEW met1 ( 210360 3090670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3090810 ) ( * 3129775 ) + NEW met1 ( 210360 3129915 ) ( 210480 * ) + NEW met1 ( 210420 3130005 ) via_260_260_vh + NEW met2 ( 208635 3130075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3130005 ) ( 210895 * ) + NEW met2 ( 208635 3129935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3130005 ) ( 210220 * ) + NEW met1 ( 210360 3130095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3130235 ) ( * 3136605 ) + NEW met1 ( 210420 3090280 ) via_260_860_vh + NEW met1 ( 210360 3089890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3089987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[29] + ( mprj_pads.area2_io_pad\[10\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3087225 ) ( 210895 * ) ; + - mprj_io_dm[89] ( mprj_pads.area2_io_pad\[10\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3084005 ) ( 210895 * ) ; + - mprj_io_holdover[29] ( mprj_pads.area2_io_pad\[10\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3080785 ) ( 210895 * ) ; + - mprj_io_out[29] ( mprj_pads.area2_io_pad\[10\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3078025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[10\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[10\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[10\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[10\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 3136442.5 ) ( 210895 * ) + NEW met2 ( 208635 3136515 ) ( 210895 * ) + NEW met1 ( 209880 3136540 ) ( 210000 * ) + NEW met1 ( 209890 3136605 ) ( 209990 * ) + NEW met1 ( 209940 3136150 ) via_260_860_vh + NEW met1 ( 209880 3135760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3097255 ) ( * 3135620 ) + NEW met1 ( 209880 3097115 ) ( 210000 * ) + NEW met1 ( 209940 3096725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3096430 ) ( 210895 * ) + NEW met2 ( 208635 3096355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3096430 ) ( 209740 * ) + NEW met1 ( 209880 3096335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3075635 ) ( * 3096195 ) + NEW met1 ( 209880 3075495 ) ( 210000 * ) + NEW met1 ( 209940 3075105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3074810 ) ( 210895 * ) + NEW met2 ( 208635 3074735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3074810 ) ( 209740 * ) + NEW met1 ( 209880 3074715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3136442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[29] ( mprj_pads.area2_io_pad\[10\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3068825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[29] + ( mprj_pads.area2_io_pad\[10\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3065605 ) ( 210895 * ) ; + - mprj_io_oeb[29] ( mprj_pads.area2_io_pad\[10\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3062385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[10\]/IN_H + ( mprj_pads.area2_io_pad\[10\] IN_H ) ; + - vdda1_pad2 ( user1_vdda_hvclamp_pad\[1\] VDDA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3523530 2526910 ) ( * 2586150 ) ; + - mprj_io[17] ( mprj_pads.area1_io_pad\[17\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211490 2279070 ) ( * 4585600 ) + NEW met5 TAPERRULE met5_width_13000 ( 211490 4609480 ) ( * 4974220 ) + NEW met4 TAPERRULE met4_width_540 ( 205060 4608950 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_400 ( 217720 4586550 ) ( * 4608530 ) + NEW met4 TAPERRULE met4_width_470 ( 205060 4586165 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_570 ( 205195 4586550 ) ( * 4608530 ) + NEW met4 ( 211500 4597540 ) via4_12040_22280 + NEW met3 TAPERRULE met3_width_580 ( 204420 4608970 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_16570 ( 225805 4586550 ) ( * 4608530 ) + NEW met3 TAPERRULE met3_width_450 ( 204420 4586175 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_1210 ( 204875 4586550 ) ( * 4608530 ) + NEW met3 ( 211500 4597540 ) via3_12040_22280_hx + NEW met5 TAPERRULE met5_width_13000 ( 211490 2228780 ) ( * 2254410 ) + NEW met4 TAPERRULE met4_width_520 ( 205190 2278530 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_550 ( 217815 2255360 ) ( * 2278120 ) + NEW met4 TAPERRULE met4_width_460 ( 205190 2254980 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_670 ( 205375 2255360 ) ( * 2278120 ) + NEW met4 ( 211625 2266740 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_430 ( 206250 2278485 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16600 ( 225840 2255360 ) ( * 2278120 ) + NEW met3 TAPERRULE met3_width_455 ( 206250 2254982.5 ) ( 233990 * ) + NEW met3 ( 211625 2266740 ) via3_11830_23060_vx + NEW met5 TAPERRULE met5_width_13000 ( 211490 897300 ) ( * 2204120 ) + NEW met4 TAPERRULE met4_width_540 ( 205120 2228250 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_580 ( 217730 2205070 ) ( * 2227830 ) + NEW met4 TAPERRULE met4_width_440 ( 205120 2204700 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_640 ( 205290 2205070 ) ( * 2227830 ) + NEW met4 ( 211525 2216450 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_520 ( 206250 2228240 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16700 ( 225790 2205070 ) ( * 2227830 ) + NEW met3 TAPERRULE met3_width_420 ( 206250 2204710 ) ( 233990 * ) + NEW met3 ( 211525 2216450 ) via3_11830_23060_vx ; + - mprj_io_in[17] ( mprj_pads.area1_io_pad\[17\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2439225 4977105 ) ( * 4979365 ) ; + - mprj_io_one[17] ( mprj_pads.area1_io_pad\[17\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2433245 4977105 ) ( * 4979365 ) ; + - mprj_io_slow_sel[17] ( mprj_pads.area1_io_pad\[17\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2430025 4977105 ) ( * 4979365 ) ; + - mprj_analog_io[10] ( mprj_pads.area1_io_pad\[17\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2426805 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[17\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[17\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[52] ( mprj_pads.area1_io_pad\[17\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2420825 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[17\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[17\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[17] ( mprj_pads.area1_io_pad\[17\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2414845 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[51] ( mprj_pads.area1_io_pad\[17\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2411625 4977105 ) ( * 4979365 ) ; + - mprj_io_analog_pol[17] + ( mprj_pads.area1_io_pad\[17\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2408405 4977105 ) ( * 4979365 ) ; + - mprj_io_inp_dis[17] ( mprj_pads.area1_io_pad\[17\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2405645 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[17\]/ENABLE_H + ( mprj_pads.area1_io_pad\[17\] ENABLE_H ) ; + - mprj_pads.area1_io_pad\[17\]/HLD_H_N + ( mprj_pads.area1_io_pad\[17\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[17\] TIE_HI_ESD ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2395985 4977105 ) ( * 4977350 ) + NEW met2 ( 2395915 4977490 ) ( 2396640 * ) + NEW met2 ( 2395915 4977670 ) ( 2396640 * ) + NEW met2 TAPERRULE met2_width_280 ( 2395985 4977810 ) ( * 4979365 ) + NEW met2 ( 2396280 4977580 ) via_860_260_hv + NEW met1 TAPERRULE met1_width_240 ( 2396780 4977580 ) ( 2436005 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 2436005 4977780 ) ( * 4979365 ) + NEW met2 TAPERRULE met2_width_280 ( 2436005 4977105 ) ( * 4977380 ) + NEW met1 TAPERRULE met1_width_240 ( 2436205 4977580 ) ( 2442605 * ) ; + - mprj_io_analog_sel[17] + ( mprj_pads.area1_io_pad\[17\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2393225 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[53] ( mprj_pads.area1_io_pad\[17\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2390005 4977105 ) ( * 4979365 ) ; + - mprj_io_holdover[17] ( mprj_pads.area1_io_pad\[17\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2386785 4977105 ) ( * 4979365 ) ; + - mprj_io_out[17] ( mprj_pads.area1_io_pad\[17\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2384025 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[17\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[17\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[17\] ENABLE_INP_H ) + ( mprj_pads.area1_io_pad\[17\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2442445 4977105 ) ( * 4977830 ) + NEW met2 ( 2441790 4977970 ) ( 2442150 * ) ( * 4978060 ) + via_860_260_hv + NEW met2 ( 2441790 4978150 ) ( 2442515 * ) + NEW met2 TAPERRULE met2_width_280 ( 2442445 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 2403225 4978060 ) ( 2441650 * ) + NEW met1 ( 2402725 4978060 ) via_860_260_hv + NEW met2 ( 2402355 4978150 ) ( 2403085 * ) + NEW met2 TAPERRULE met2_width_280 ( 2402425 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 2381605 4978060 ) ( 2402225 * ) + NEW met1 ( 2381105 4978060 ) via_860_260_hv + NEW met2 ( 2380735 4978150 ) ( 2381465 * ) + NEW met2 TAPERRULE met2_width_280 ( 2380805 4978290 ) ( * 4979365 ) + NEW met2 ( 2380735 4977970 ) ( 2381465 * ) + NEW met2 TAPERRULE met2_width_280 ( 2380805 4977105 ) ( * 4977830 ) + NEW met2 ( 2402355 4977970 ) ( 2403085 * ) + NEW met2 TAPERRULE met2_width_280 ( 2402425 4977105 ) ( * 4977830 ) ; + - mprj_io_vtrip_sel[17] ( mprj_pads.area1_io_pad\[17\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2374825 4977105 ) ( * 4979365 ) ; + - mprj_io_ib_mode_sel[17] + ( mprj_pads.area1_io_pad\[17\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2371605 4977105 ) ( * 4979365 ) ; + - mprj_io_oeb[17] ( mprj_pads.area1_io_pad\[17\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2368385 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[17\]/IN_H + ( mprj_pads.area1_io_pad\[17\] IN_H ) ; + - FILLER_99/VDDA ( FILLER_99 VDDA ) ( FILLER_166 VDDA ) + ( FILLER_165 VDDA ) ( FILLER_164 VDDA ) ( FILLER_163 VDDA ) + ( FILLER_162 VDDA ) ( FILLER_161 VDDA ) ( FILLER_160 VDDA ) + ( FILLER_159 VDDA ) ( FILLER_158 VDDA ) ( FILLER_157 VDDA ) + ( FILLER_153 VDDA ) ( mprj_pads.area1_io_pad\[15\] VDDA ) + ( FILLER_154 VDDA ) ( FILLER_155 VDDA ) ( FILLER_149 VDDA ) + ( FILLER_152 VDDA ) ( FILLER_151 VDDA ) ( FILLER_150 VDDA ) + ( FILLER_145 VDDA ) ( FILLER_148 VDDA ) ( FILLER_147 VDDA ) + ( FILLER_146 VDDA ) ( FILLER_144 VDDA ) ( FILLER_137 VDDA ) + ( user1_vssa_hvclamp_pad\[0\] VDDA ) ( FILLER_140 VDDA ) + ( FILLER_141 VDDA ) ( FILLER_142 VDDA ) ( FILLER_139 VDDA ) + ( FILLER_138 VDDA ) ( FILLER_134 VDDA ) ( FILLER_136 VDDA ) + ( FILLER_135 VDDA ) ( FILLER_131 VDDA ) ( FILLER_133 VDDA ) + ( FILLER_132 VDDA ) ( FILLER_127 VDDA ) ( FILLER_128 VDDA ) + ( FILLER_129 VDDA ) ( mprj_pads.area1_io_pad\[16\] VDDA ) + ( FILLER_123 VDDA ) ( FILLER_126 VDDA ) ( FILLER_125 VDDA ) + ( FILLER_124 VDDA ) ( FILLER_122 VDDA ) ( FILLER_121 VDDA ) + ( FILLER_120 VDDA ) ( FILLER_119 VDDA ) + ( mprj_pads.area1_io_pad\[17\] VDDA ) ( FILLER_118 VDDA ) + ( FILLER_116 VDDA ) ( FILLER_115 VDDA ) ( FILLER_114 VDDA ) + ( FILLER_113 VDDA ) ( FILLER_112 VDDA ) ( FILLER_111 VDDA ) + ( FILLER_110 VDDA ) ( FILLER_109 VDDA ) ( FILLER_108 VDDA ) + ( FILLER_107 VDDA ) ( FILLER_106 VDDA ) ( FILLER_105 VDDA ) + ( FILLER_104 VDDA ) ( FILLER_102 VDDA ) ( FILLER_103 VDDA ) + ( FILLER_98 VDDA ) ( FILLER_101 VDDA ) ( FILLER_100 VDDA ) + ( FILLER_96 VDDA ) ( FILLER_94 VDDA ) + ( mprj_pads.area1_io_pad\[18\] VDDA ) ( FILLER_95 VDDA ) + ( FILLER_93 VDDA ) ( FILLER_92 VDDA ) ( FILLER_91 VDDA ) + ( FILLER_90 VDDA ) ( FILLER_89 VDDA ) ( FILLER_88 VDDA ) + ( FILLER_87 VDDA ) ( FILLER_86 VDDA ) ( FILLER_SB3 VDDA ) + ( FILLER_SB1 VDDA ) ( FILLER_167 VDDA ) ( FILLER_168 VDDA ) + ( FILLER_169 VDDA ) ( user1_corner VDDA ) ( FILLER_809 VDDA ) + ( FILLER_810 VDDA ) ( FILLER_811 VDDA ) ( FILLER_804 VDDA ) + ( FILLER_808 VDDA ) ( FILLER_807 VDDA ) ( FILLER_806 VDDA ) + ( FILLER_805 VDDA ) ( mprj_pads.area1_io_pad\[14\] VDDA ) + ( FILLER_803 VDDA ) ( FILLER_801 VDDA ) ( FILLER_800 VDDA ) + ( FILLER_799 VDDA ) ( FILLER_798 VDDA ) ( FILLER_797 VDDA ) + ( FILLER_796 VDDA ) ( FILLER_794 VDDA ) ( FILLER_795 VDDA ) + ( FILLER_791 VDDA ) ( FILLER_792 VDDA ) + ( user1_vccd_lvclamp_pad VDDA ) ( FILLER_786 VDDA ) + ( FILLER_790 VDDA ) ( FILLER_789 VDDA ) ( FILLER_788 VDDA ) + ( FILLER_787 VDDA ) ( FILLER_785 VDDA ) + ( mprj_pads.area1_io_pad\[13\] VDDA ) ( FILLER_784 VDDA ) + ( FILLER_782 VDDA ) ( FILLER_781 VDDA ) ( FILLER_780 VDDA ) + ( FILLER_779 VDDA ) ( FILLER_778 VDDA ) ( FILLER_777 VDDA ) + ( FILLER_776 VDDA ) ( user1_vdda_hvclamp_pad\[0\] VDDA ) + ( FILLER_775 VDDA ) ( FILLER_773 VDDA ) ( FILLER_772 VDDA ) + ( FILLER_771 VDDA ) ( FILLER_770 VDDA ) ( FILLER_769 VDDA ) + ( FILLER_766 VDDA ) ( FILLER_768 VDDA ) ( FILLER_767 VDDA ) + ( FILLER_765 VDDA ) ( FILLER_760 VDDA ) + ( mprj_pads.area1_io_pad\[12\] VDDA ) ( FILLER_763 VDDA ) + ( FILLER_762 VDDA ) ( FILLER_761 VDDA ) ( FILLER_759 VDDA ) + ( FILLER_758 VDDA ) ( FILLER_757 VDDA ) + ( mprj_pads.area1_io_pad\[11\] VDDA ) ( FILLER_756 VDDA ) + ( FILLER_754 VDDA ) ( FILLER_753 VDDA ) ( FILLER_752 VDDA ) + ( FILLER_750 VDDA ) ( FILLER_751 VDDA ) ( FILLER_747 VDDA ) + ( FILLER_749 VDDA ) ( FILLER_748 VDDA ) ( FILLER_743 VDDA ) + ( FILLER_744 VDDA ) ( FILLER_745 VDDA ) + ( mprj_pads.area1_io_pad\[10\] VDDA ) ( FILLER_740 VDDA ) + ( FILLER_742 VDDA ) ( FILLER_741 VDDA ) ( FILLER_737 VDDA ) + ( FILLER_739 VDDA ) ( FILLER_738 VDDA ) ( FILLER_734 VDDA ) + ( mprj_pads.area1_io_pad\[9\] VDDA ) ( FILLER_735 VDDA ) + ( FILLER_732 VDDA ) ( FILLER_733 VDDA ) ( FILLER_728 VDDA ) + ( FILLER_731 VDDA ) ( FILLER_730 VDDA ) ( FILLER_729 VDDA ) + ( FILLER_725 VDDA ) ( FILLER_726 VDDA ) + ( mprj_pads.area1_io_pad\[8\] VDDA ) ( FILLER_724 VDDA ) + ( FILLER_723 VDDA ) ( FILLER_722 VDDA ) ( FILLER_721 VDDA ) + ( FILLER_720 VDDA ) ( FILLER_719 VDDA ) ( FILLER_718 VDDA ) + ( FILLER_714 VDDA ) ( mprj_pads.area1_io_pad\[7\] VDDA ) + ( FILLER_716 VDDA ) ( FILLER_715 VDDA ) ( FILLER_710 VDDA ) + ( FILLER_713 VDDA ) ( FILLER_712 VDDA ) ( FILLER_711 VDDA ) + ( FILLER_709 VDDA ) ( user1_vdda_hvclamp_pad\[1\] VDDA ) + ( FILLER_707 VDDA ) ( FILLER_706 VDDA ) ( FILLER_705 VDDA ) + ( FILLER_704 VDDA ) ( FILLER_703 VDDA ) ( FILLER_702 VDDA ) + ( FILLER_701 VDDA ) ( FILLER_700 VDDA ) ( FILLER_697 VDDA ) + ( FILLER_698 VDDA ) ( user1_vssd_lvclamp_pad VDDA ) + ( FILLER_693 VDDA ) ( FILLER_696 VDDA ) ( FILLER_695 VDDA ) + ( FILLER_694 VDDA ) ( FILLER_690 VDDA ) ( FILLER_692 VDDA ) + ( FILLER_691 VDDA ) ( user1_vssa_hvclamp_pad\[1\] VDDA ) + ( FILLER_688 VDDA ) ( FILLER_687 VDDA ) ( FILLER_686 VDDA ) + ( FILLER_685 VDDA ) ( FILLER_684 VDDA ) ( FILLER_683 VDDA ) + ( FILLER_682 VDDA ) ( FILLER_681 VDDA ) ( FILLER_679 VDDA ) + ( mprj_pads.area1_io_pad\[6\] VDDA ) ( FILLER_675 VDDA ) + ( FILLER_678 VDDA ) ( FILLER_677 VDDA ) ( FILLER_676 VDDA ) + ( FILLER_671 VDDA ) ( FILLER_674 VDDA ) ( FILLER_673 VDDA ) + ( FILLER_672 VDDA ) ( FILLER_666 VDDA ) + ( mprj_pads.area1_io_pad\[5\] VDDA ) ( FILLER_669 VDDA ) + ( FILLER_668 VDDA ) ( FILLER_667 VDDA ) ( FILLER_662 VDDA ) + ( FILLER_665 VDDA ) ( FILLER_664 VDDA ) ( FILLER_663 VDDA ) + ( mprj_pads.area1_io_pad\[4\] VDDA ) ( FILLER_660 VDDA ) + ( FILLER_659 VDDA ) ( FILLER_658 VDDA ) ( FILLER_657 VDDA ) + ( FILLER_656 VDDA ) ( FILLER_655 VDDA ) ( FILLER_654 VDDA ) + ( FILLER_653 VDDA ) ( FILLER_649 VDDA ) + ( mprj_pads.area1_io_pad\[3\] VDDA ) ( FILLER_650 VDDA ) + ( FILLER_651 VDDA ) ( FILLER_645 VDDA ) ( FILLER_648 VDDA ) + ( FILLER_647 VDDA ) ( FILLER_646 VDDA ) ( FILLER_643 VDDA ) + ( FILLER_644 VDDA ) ( FILLER_640 VDDA ) ( FILLER_641 VDDA ) + ( mprj_pads.area1_io_pad\[2\] VDDA ) ( FILLER_636 VDDA ) + ( FILLER_639 VDDA ) ( FILLER_638 VDDA ) ( FILLER_637 VDDA ) + ( FILLER_634 VDDA ) ( FILLER_635 VDDA ) ( FILLER_631 VDDA ) + ( FILLER_632 VDDA ) ( mprj_pads.area1_io_pad\[1\] VDDA ) + ( FILLER_627 VDDA ) ( FILLER_630 VDDA ) ( FILLER_629 VDDA ) + ( FILLER_628 VDDA ) ( FILLER_626 VDDA ) ( FILLER_625 VDDA ) + ( mprj_pads.area1_io_pad\[0\] VDDA ) ( FILLER_624 VDDA ) + ( FILLER_622 VDDA ) ( FILLER_621 VDDA ) ( FILLER_620 VDDA ) + ( FILLER_619 VDDA ) ( FILLER_618 VDDA ) ( FILLER_617 VDDA ) + ( FILLER_616 VDDA ) ( FILLER_615 VDDA ) ; + - FILLER_99/VSSA ( FILLER_99 VSSA ) ( FILLER_166 VSSA ) + ( FILLER_165 VSSA ) ( FILLER_164 VSSA ) ( FILLER_163 VSSA ) + ( FILLER_162 VSSA ) ( FILLER_161 VSSA ) ( FILLER_160 VSSA ) + ( FILLER_159 VSSA ) ( FILLER_158 VSSA ) ( FILLER_157 VSSA ) + ( FILLER_153 VSSA ) ( mprj_pads.area1_io_pad\[15\] VSSA ) + ( FILLER_154 VSSA ) ( FILLER_155 VSSA ) ( FILLER_149 VSSA ) + ( FILLER_152 VSSA ) ( FILLER_151 VSSA ) ( FILLER_150 VSSA ) + ( FILLER_145 VSSA ) ( FILLER_148 VSSA ) ( FILLER_147 VSSA ) + ( FILLER_146 VSSA ) ( FILLER_144 VSSA ) ( FILLER_137 VSSA ) + ( user1_vssa_hvclamp_pad\[0\] VSSA ) ( FILLER_140 VSSA ) + ( FILLER_141 VSSA ) ( FILLER_142 VSSA ) ( FILLER_139 VSSA ) + ( FILLER_138 VSSA ) ( FILLER_134 VSSA ) ( FILLER_136 VSSA ) + ( FILLER_135 VSSA ) ( FILLER_131 VSSA ) ( FILLER_133 VSSA ) + ( FILLER_132 VSSA ) ( FILLER_127 VSSA ) ( FILLER_128 VSSA ) + ( FILLER_129 VSSA ) ( mprj_pads.area1_io_pad\[16\] VSSA ) + ( FILLER_123 VSSA ) ( FILLER_126 VSSA ) ( FILLER_125 VSSA ) + ( FILLER_124 VSSA ) ( FILLER_122 VSSA ) ( FILLER_121 VSSA ) + ( FILLER_120 VSSA ) ( FILLER_119 VSSA ) + ( mprj_pads.area1_io_pad\[17\] VSSA ) ( FILLER_118 VSSA ) + ( FILLER_116 VSSA ) ( FILLER_115 VSSA ) ( FILLER_114 VSSA ) + ( FILLER_113 VSSA ) ( FILLER_112 VSSA ) ( FILLER_111 VSSA ) + ( FILLER_110 VSSA ) ( FILLER_109 VSSA ) ( FILLER_108 VSSA ) + ( FILLER_107 VSSA ) ( FILLER_106 VSSA ) ( FILLER_105 VSSA ) + ( FILLER_104 VSSA ) ( FILLER_102 VSSA ) ( FILLER_103 VSSA ) + ( FILLER_98 VSSA ) ( FILLER_101 VSSA ) ( FILLER_100 VSSA ) + ( FILLER_96 VSSA ) ( FILLER_94 VSSA ) + ( mprj_pads.area1_io_pad\[18\] VSSA ) ( FILLER_95 VSSA ) + ( FILLER_93 VSSA ) ( FILLER_92 VSSA ) ( FILLER_91 VSSA ) + ( FILLER_90 VSSA ) ( FILLER_89 VSSA ) ( FILLER_88 VSSA ) + ( FILLER_87 VSSA ) ( FILLER_86 VSSA ) ( FILLER_SB3 VSSA ) + ( FILLER_SB1 VSSA ) ( FILLER_167 VSSA ) ( FILLER_168 VSSA ) + ( FILLER_169 VSSA ) ( user1_corner VSSA ) ( FILLER_809 VSSA ) + ( FILLER_810 VSSA ) ( FILLER_811 VSSA ) ( FILLER_804 VSSA ) + ( FILLER_808 VSSA ) ( FILLER_807 VSSA ) ( FILLER_806 VSSA ) + ( FILLER_805 VSSA ) ( mprj_pads.area1_io_pad\[14\] VSSA ) + ( FILLER_803 VSSA ) ( FILLER_801 VSSA ) ( FILLER_800 VSSA ) + ( FILLER_799 VSSA ) ( FILLER_798 VSSA ) ( FILLER_797 VSSA ) + ( FILLER_796 VSSA ) ( FILLER_794 VSSA ) ( FILLER_795 VSSA ) + ( FILLER_791 VSSA ) ( FILLER_792 VSSA ) + ( user1_vccd_lvclamp_pad VSSA ) ( FILLER_786 VSSA ) + ( FILLER_790 VSSA ) ( FILLER_789 VSSA ) ( FILLER_788 VSSA ) + ( FILLER_787 VSSA ) ( FILLER_785 VSSA ) + ( mprj_pads.area1_io_pad\[13\] VSSA ) ( FILLER_784 VSSA ) + ( FILLER_782 VSSA ) ( FILLER_781 VSSA ) ( FILLER_780 VSSA ) + ( FILLER_779 VSSA ) ( FILLER_778 VSSA ) ( FILLER_777 VSSA ) + ( FILLER_776 VSSA ) ( user1_vdda_hvclamp_pad\[0\] VSSA ) + ( FILLER_775 VSSA ) ( FILLER_773 VSSA ) ( FILLER_772 VSSA ) + ( FILLER_771 VSSA ) ( FILLER_770 VSSA ) ( FILLER_769 VSSA ) + ( FILLER_766 VSSA ) ( FILLER_768 VSSA ) ( FILLER_767 VSSA ) + ( FILLER_765 VSSA ) ( FILLER_760 VSSA ) + ( mprj_pads.area1_io_pad\[12\] VSSA ) ( FILLER_763 VSSA ) + ( FILLER_762 VSSA ) ( FILLER_761 VSSA ) ( FILLER_759 VSSA ) + ( FILLER_758 VSSA ) ( FILLER_757 VSSA ) + ( mprj_pads.area1_io_pad\[11\] VSSA ) ( FILLER_756 VSSA ) + ( FILLER_754 VSSA ) ( FILLER_753 VSSA ) ( FILLER_752 VSSA ) + ( FILLER_750 VSSA ) ( FILLER_751 VSSA ) ( FILLER_747 VSSA ) + ( FILLER_749 VSSA ) ( FILLER_748 VSSA ) ( FILLER_743 VSSA ) + ( FILLER_744 VSSA ) ( FILLER_745 VSSA ) + ( mprj_pads.area1_io_pad\[10\] VSSA ) ( FILLER_740 VSSA ) + ( FILLER_742 VSSA ) ( FILLER_741 VSSA ) ( FILLER_737 VSSA ) + ( FILLER_739 VSSA ) ( FILLER_738 VSSA ) ( FILLER_734 VSSA ) + ( mprj_pads.area1_io_pad\[9\] VSSA ) ( FILLER_735 VSSA ) + ( FILLER_732 VSSA ) ( FILLER_733 VSSA ) ( FILLER_728 VSSA ) + ( FILLER_731 VSSA ) ( FILLER_730 VSSA ) ( FILLER_729 VSSA ) + ( FILLER_725 VSSA ) ( FILLER_726 VSSA ) + ( mprj_pads.area1_io_pad\[8\] VSSA ) ( FILLER_724 VSSA ) + ( FILLER_723 VSSA ) ( FILLER_722 VSSA ) ( FILLER_721 VSSA ) + ( FILLER_720 VSSA ) ( FILLER_719 VSSA ) ( FILLER_718 VSSA ) + ( FILLER_714 VSSA ) ( mprj_pads.area1_io_pad\[7\] VSSA ) + ( FILLER_716 VSSA ) ( FILLER_715 VSSA ) ( FILLER_710 VSSA ) + ( FILLER_713 VSSA ) ( FILLER_712 VSSA ) ( FILLER_711 VSSA ) + ( FILLER_709 VSSA ) ( user1_vdda_hvclamp_pad\[1\] VSSA ) + ( FILLER_707 VSSA ) ( FILLER_706 VSSA ) ( FILLER_705 VSSA ) + ( FILLER_704 VSSA ) ( FILLER_703 VSSA ) ( FILLER_702 VSSA ) + ( FILLER_701 VSSA ) ( FILLER_700 VSSA ) ( FILLER_697 VSSA ) + ( FILLER_698 VSSA ) ( user1_vssd_lvclamp_pad VSSA ) + ( FILLER_693 VSSA ) ( FILLER_696 VSSA ) ( FILLER_695 VSSA ) + ( FILLER_694 VSSA ) ( FILLER_690 VSSA ) ( FILLER_692 VSSA ) + ( FILLER_691 VSSA ) ( user1_vssa_hvclamp_pad\[1\] VSSA ) + ( FILLER_688 VSSA ) ( FILLER_687 VSSA ) ( FILLER_686 VSSA ) + ( FILLER_685 VSSA ) ( FILLER_684 VSSA ) ( FILLER_683 VSSA ) + ( FILLER_682 VSSA ) ( FILLER_681 VSSA ) ( FILLER_679 VSSA ) + ( mprj_pads.area1_io_pad\[6\] VSSA ) ( FILLER_675 VSSA ) + ( FILLER_678 VSSA ) ( FILLER_677 VSSA ) ( FILLER_676 VSSA ) + ( FILLER_671 VSSA ) ( FILLER_674 VSSA ) ( FILLER_673 VSSA ) + ( FILLER_672 VSSA ) ( FILLER_666 VSSA ) + ( mprj_pads.area1_io_pad\[5\] VSSA ) ( FILLER_669 VSSA ) + ( FILLER_668 VSSA ) ( FILLER_667 VSSA ) ( FILLER_662 VSSA ) + ( FILLER_665 VSSA ) ( FILLER_664 VSSA ) ( FILLER_663 VSSA ) + ( mprj_pads.area1_io_pad\[4\] VSSA ) ( FILLER_660 VSSA ) + ( FILLER_659 VSSA ) ( FILLER_658 VSSA ) ( FILLER_657 VSSA ) + ( FILLER_656 VSSA ) ( FILLER_655 VSSA ) ( FILLER_654 VSSA ) + ( FILLER_653 VSSA ) ( FILLER_649 VSSA ) + ( mprj_pads.area1_io_pad\[3\] VSSA ) ( FILLER_650 VSSA ) + ( FILLER_651 VSSA ) ( FILLER_645 VSSA ) ( FILLER_648 VSSA ) + ( FILLER_647 VSSA ) ( FILLER_646 VSSA ) ( FILLER_643 VSSA ) + ( FILLER_644 VSSA ) ( FILLER_640 VSSA ) ( FILLER_641 VSSA ) + ( mprj_pads.area1_io_pad\[2\] VSSA ) ( FILLER_636 VSSA ) + ( FILLER_639 VSSA ) ( FILLER_638 VSSA ) ( FILLER_637 VSSA ) + ( FILLER_634 VSSA ) ( FILLER_635 VSSA ) ( FILLER_631 VSSA ) + ( FILLER_632 VSSA ) ( mprj_pads.area1_io_pad\[1\] VSSA ) + ( FILLER_627 VSSA ) ( FILLER_630 VSSA ) ( FILLER_629 VSSA ) + ( FILLER_628 VSSA ) ( FILLER_626 VSSA ) ( FILLER_625 VSSA ) + ( mprj_pads.area1_io_pad\[0\] VSSA ) ( FILLER_624 VSSA ) + ( FILLER_622 VSSA ) ( FILLER_621 VSSA ) ( FILLER_620 VSSA ) + ( FILLER_619 VSSA ) ( FILLER_618 VSSA ) ( FILLER_617 VSSA ) + ( FILLER_616 VSSA ) ( FILLER_615 VSSA ) ; + - mprj_io[2] ( mprj_pads.area1_io_pad\[2\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 958000 ) ( * 1019000 ) ; + - mprj_pads.area1_io_pad\[2\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[2\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[2\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[2\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 952557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 953240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 953380 ) ( * 991745 ) + NEW met1 ( 3378000 991885 ) ( 3378120 * ) + NEW met1 ( 3378060 992275 ) via_260_860_vh + NEW met2 ( 3377105 992645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 992570 ) ( 3379365 * ) + NEW met1 ( 3378000 992665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 992805 ) ( * 1013365 ) + NEW met1 ( 3378000 1013505 ) ( 3378120 * ) + NEW met1 ( 3378060 1013895 ) via_260_860_vh + NEW met2 ( 3377105 1014265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1014190 ) ( 3379365 * ) + NEW met1 ( 3378000 1014285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1014190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 992570 ) ( 3377860 * ) + NEW met2 ( 3378060 952850 ) via_260_860_vh ( * 952460 ) + ( 3378120 * ) + NEW met1 ( 3378010 952395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 952557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 952485 ) ( 3379365 * ) ; + - mprj_io_in[2] ( mprj_pads.area1_io_pad\[2\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 955775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[2\]/HLD_H_N + ( mprj_pads.area1_io_pad\[2\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[2\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 999085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 999012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 999110 ) ( 3377640 * ) + NEW met1 ( 3377580 998720 ) via_260_860_vh + NEW met1 ( 3377520 998330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 959225 ) ( * 998190 ) + NEW met1 ( 3377520 959085 ) ( 3377640 * ) + NEW met1 ( 3377580 958995 ) via_260_260_vh + NEW met2 ( 3377105 959065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 958995 ) ( 3379365 * ) + NEW met2 ( 3377105 958925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 958995 ) ( 3377380 * ) + NEW met1 ( 3377520 958905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 952395 ) ( * 958765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 999012.5 ) ( 3377380 * ) ; + - mprj_io_one[2] ( mprj_pads.area1_io_pad\[2\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 961755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[2] ( mprj_pads.area1_io_pad\[2\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 964975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[2\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[2\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[2\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[2\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[7] ( mprj_pads.area1_io_pad\[2\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 974175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[2\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[2\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[2] ( mprj_pads.area1_io_pad\[2\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 980155 ) ( 3379365 * ) ; + - mprj_io_dm[6] ( mprj_pads.area1_io_pad\[2\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 983375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[2] ( mprj_pads.area1_io_pad\[2\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 986595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[2] ( mprj_pads.area1_io_pad\[2\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 989355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[2\]/ENABLE_H + ( mprj_pads.area1_io_pad\[2\] ENABLE_H ) ; + - mprj_io_analog_sel[2] ( mprj_pads.area1_io_pad\[2\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1001775 ) ( 3379365 * ) ; + - mprj_io_dm[8] ( mprj_pads.area1_io_pad\[2\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1004995 ) ( 3379365 * ) ; + - mprj_io_holdover[2] ( mprj_pads.area1_io_pad\[2\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1008215 ) ( 3379365 * ) ; + - mprj_io_out[2] ( mprj_pads.area1_io_pad\[2\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1010975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[2] ( mprj_pads.area1_io_pad\[2\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1020175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[2] + ( mprj_pads.area1_io_pad\[2\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1023395 ) ( 3379365 * ) ; + - mprj_io_oeb[2] ( mprj_pads.area1_io_pad\[2\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1026615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[2\]/IN_H + ( mprj_pads.area1_io_pad\[2\] IN_H ) ; + - vssa2_pad ( user2_vssa_hvclamp_pad VSSA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 64465 4145850 ) ( * 4205090 ) ; + - mprj_io[21] ( mprj_pads.area2_io_pad\[2\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 476580 ) ( * 2324490 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348200 ) ( * 4538150 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562410 ) ( * 4588310 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4612670 ) ( * 4962770 ) + NEW met4 TAPERRULE met4_width_560 ( 3370200 4612150 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_600 ( 3382780 4589260 ) ( * 4611720 ) + NEW met4 TAPERRULE met4_width_530 ( 3370200 4588845 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589260 ) ( * 4611720 ) + NEW met4 ( 3376580 4600490 ) via4_11800_22760 + NEW met3 TAPERRULE met3_width_630 ( 3354010 4612185 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1140 ( 3383050 4589260 ) ( * 4611720 ) + NEW met3 TAPERRULE met3_width_610 ( 3354010 4588805 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16820 ( 3362270 4589260 ) ( * 4611720 ) + NEW met3 ( 3376580 4600490 ) via3_11800_22760_hx + NEW met4 TAPERRULE met4_width_590 ( 3370230 4561905 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_590 ( 3382815 4539100 ) ( * 4561460 ) + NEW met4 TAPERRULE met4_width_600 ( 3370230 4538650 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_770 ( 3370465 4539100 ) ( * 4561460 ) + NEW met4 ( 3376685 4550280 ) via4_11670_22660 + NEW met3 TAPERRULE met3_width_635 ( 3354010 4561927.5 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1100 ( 3383070 4539100 ) ( * 4561460 ) + NEW met3 TAPERRULE met3_width_650 ( 3354010 4538625 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16990 ( 3362355 4539100 ) ( * 4561460 ) + NEW met3 ( 3376685 4550280 ) via3_11670_22660_hx + NEW met4 TAPERRULE met4_width_550 ( 3370270 2347675 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_530 ( 3382825 2325440 ) ( * 2347250 ) + NEW met4 TAPERRULE met4_width_520 ( 3370270 2325030 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370420 2325440 ) ( * 2347250 ) + NEW met4 ( 3376640 2336345 ) via4_11840_22110 + NEW met3 TAPERRULE met3_width_600 ( 3354120 2347700 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_1830 ( 3383475 2325440 ) ( * 2347250 ) + NEW met3 TAPERRULE met3_width_545 ( 3354120 2325017.5 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_16750 ( 3362345 2325440 ) ( * 2347250 ) + NEW met3 ( 3376640 2336345 ) via3_11840_22110_hx ; + - mprj_io_in[21] ( mprj_pads.area2_io_pad\[2\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 970225 4977105 ) ( * 4979365 ) ; + - mprj_io_one[21] ( mprj_pads.area2_io_pad\[2\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 964245 4977105 ) ( * 4979365 ) ; + - mprj_io_slow_sel[21] ( mprj_pads.area2_io_pad\[2\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 961025 4977105 ) ( * 4979365 ) ; + - mprj_analog_io[14] ( mprj_pads.area2_io_pad\[2\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 957805 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[2\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[2\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[64] ( mprj_pads.area2_io_pad\[2\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 951825 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[2\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[2\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[21] ( mprj_pads.area2_io_pad\[2\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 945845 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[63] ( mprj_pads.area2_io_pad\[2\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 942625 4977105 ) ( * 4979365 ) ; + - mprj_io_analog_pol[21] ( mprj_pads.area2_io_pad\[2\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 939405 4977105 ) ( * 4979365 ) ; + - mprj_io_inp_dis[21] ( mprj_pads.area2_io_pad\[2\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 936645 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[2\]/ENABLE_H + ( mprj_pads.area2_io_pad\[2\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[2\]/HLD_H_N + ( mprj_pads.area2_io_pad\[2\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[2\] TIE_HI_ESD ) + + ROUTED met2 TAPERRULE met2_width_280 ( 926985 4977105 ) ( * 4977350 ) + NEW met2 ( 926915 4977490 ) ( 927640 * ) + NEW met2 ( 926915 4977670 ) ( 927640 * ) + NEW met2 TAPERRULE met2_width_280 ( 926985 4977810 ) ( * 4979365 ) + NEW met2 ( 927280 4977580 ) via_860_260_hv + NEW met1 TAPERRULE met1_width_240 ( 927780 4977580 ) ( 967005 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 967005 4977780 ) ( * 4979365 ) + NEW met2 TAPERRULE met2_width_280 ( 967005 4977105 ) ( * 4977380 ) + NEW met1 TAPERRULE met1_width_240 ( 967205 4977580 ) ( 973605 * ) ; + - mprj_io_analog_sel[21] ( mprj_pads.area2_io_pad\[2\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 924225 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[65] ( mprj_pads.area2_io_pad\[2\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 921005 4977105 ) ( * 4979365 ) ; + - mprj_io_holdover[21] ( mprj_pads.area2_io_pad\[2\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 917785 4977105 ) ( * 4979365 ) ; + - mprj_io_out[21] ( mprj_pads.area2_io_pad\[2\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 915025 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[2\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[2\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[2\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[2\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 973445 4977105 ) ( * 4977830 ) + NEW met2 ( 972790 4977970 ) ( 973150 * ) ( * 4978060 ) + via_860_260_hv + NEW met2 ( 972790 4978150 ) ( 973515 * ) + NEW met2 TAPERRULE met2_width_280 ( 973445 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 934225 4978060 ) ( 972650 * ) + NEW met1 ( 933725 4978060 ) via_860_260_hv + NEW met2 ( 933355 4978150 ) ( 934085 * ) + NEW met2 TAPERRULE met2_width_280 ( 933425 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 912605 4978060 ) ( 933225 * ) + NEW met1 ( 912105 4978060 ) via_860_260_hv + NEW met2 ( 911735 4978150 ) ( 912465 * ) + NEW met2 TAPERRULE met2_width_280 ( 911805 4978290 ) ( * 4979365 ) + NEW met2 ( 911735 4977970 ) ( 912465 * ) + NEW met2 TAPERRULE met2_width_280 ( 911805 4977105 ) ( * 4977830 ) + NEW met2 ( 933355 4977970 ) ( 934085 * ) + NEW met2 TAPERRULE met2_width_280 ( 933425 4977105 ) ( * 4977830 ) ; + - mprj_io_vtrip_sel[21] ( mprj_pads.area2_io_pad\[2\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 905825 4977105 ) ( * 4979365 ) ; + - mprj_io_ib_mode_sel[21] + ( mprj_pads.area2_io_pad\[2\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 902605 4977105 ) ( * 4979365 ) ; + - mprj_io_oeb[21] ( mprj_pads.area2_io_pad\[2\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 899385 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[2\]/IN_H + ( mprj_pads.area2_io_pad\[2\] IN_H ) ; + - vssio_pad ( mgmt_vssio_hvclamp_pad\[0\] VSSIO_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 2852910 64465 ) ( 2912150 * ) ; + - mprj_io[31] ( mprj_pads.area2_io_pad\[12\] PAD ) ; + - mprj_io_in[31] ( mprj_pads.area2_io_pad\[12\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2701225 ) ( 210895 * ) ; + - mprj_io_one[31] ( mprj_pads.area2_io_pad\[12\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2695245 ) ( 210895 * ) ; + - mprj_io_slow_sel[31] ( mprj_pads.area2_io_pad\[12\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2692025 ) ( 210895 * ) ; + - mprj_analog_io[24] ( mprj_pads.area2_io_pad\[12\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2688805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[12\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[12\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[94] ( mprj_pads.area2_io_pad\[12\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2682825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[12\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[12\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[31] ( mprj_pads.area2_io_pad\[12\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2676845 ) ( 210895 * ) ; + - mprj_io_dm[93] ( mprj_pads.area2_io_pad\[12\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2673625 ) ( 210895 * ) ; + - mprj_io_analog_pol[31] + ( mprj_pads.area2_io_pad\[12\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2670405 ) ( 210895 * ) ; + - mprj_io_inp_dis[31] ( mprj_pads.area2_io_pad\[12\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2667645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[12\]/ENABLE_H + ( mprj_pads.area2_io_pad\[12\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[12\]/HLD_H_N + ( mprj_pads.area2_io_pad\[12\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[12\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 2657915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2657987.5 ) ( 210220 * ) + NEW met1 ( 210360 2658670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2658810 ) ( * 2697775 ) + NEW met1 ( 210360 2697915 ) ( 210480 * ) + NEW met1 ( 210420 2698005 ) via_260_260_vh + NEW met2 ( 208635 2698075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 2698005 ) ( 210895 * ) + NEW met2 ( 208635 2697935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 2698005 ) ( 210220 * ) + NEW met1 ( 210360 2698095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2698235 ) ( * 2704605 ) + NEW met1 ( 210420 2658280 ) via_260_860_vh + NEW met1 ( 210360 2657890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 2657987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[31] + ( mprj_pads.area2_io_pad\[12\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2655225 ) ( 210895 * ) ; + - mprj_io_dm[95] ( mprj_pads.area2_io_pad\[12\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2652005 ) ( 210895 * ) ; + - mprj_io_holdover[31] ( mprj_pads.area2_io_pad\[12\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2648785 ) ( 210895 * ) ; + - mprj_io_out[31] ( mprj_pads.area2_io_pad\[12\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2646025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[12\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[12\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[12\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[12\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 2704442.5 ) ( 210895 * ) + NEW met2 ( 208635 2704515 ) ( 210895 * ) + NEW met1 ( 209880 2704540 ) ( 210000 * ) + NEW met1 ( 209890 2704605 ) ( 209990 * ) + NEW met1 ( 209940 2704150 ) via_260_860_vh + NEW met1 ( 209880 2703760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2665255 ) ( * 2703620 ) + NEW met1 ( 209880 2665115 ) ( 210000 * ) + NEW met1 ( 209940 2664725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2664430 ) ( 210895 * ) + NEW met2 ( 208635 2664355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2664430 ) ( 209740 * ) + NEW met1 ( 209880 2664335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2643635 ) ( * 2664195 ) + NEW met1 ( 209880 2643495 ) ( 210000 * ) + NEW met1 ( 209940 2643105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2642810 ) ( 210895 * ) + NEW met2 ( 208635 2642735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2642810 ) ( 209740 * ) + NEW met1 ( 209880 2642715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2704442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[31] ( mprj_pads.area2_io_pad\[12\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2636825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[31] + ( mprj_pads.area2_io_pad\[12\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2633605 ) ( 210895 * ) ; + - mprj_io_oeb[31] ( mprj_pads.area2_io_pad\[12\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2630385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[12\]/IN_H + ( mprj_pads.area2_io_pad\[12\] IN_H ) ; + - vssd2_pad ( user2_vssd_lvclamp_pad VSSD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 31635 2241470 ) ( 97295 * ) ; + - vssd2 ( user2_vccd_lvclamp_pad VSSD1 ) + ( user2_vssd_lvclamp_pad VSSD1 ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211490 897300 ) ( * 2204120 ) + NEW met5 TAPERRULE met5_width_13000 ( 211490 2228780 ) ( * 2254410 ) + NEW met5 TAPERRULE met5_width_13000 ( 211490 2279070 ) ( * 4585600 ) + NEW met5 TAPERRULE met5_width_13000 ( 211490 4609480 ) ( * 4974220 ) + NEW met4 TAPERRULE met4_width_540 ( 205060 4608950 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_400 ( 217720 4586550 ) ( * 4608530 ) + NEW met4 TAPERRULE met4_width_470 ( 205060 4586165 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_570 ( 205195 4586550 ) ( * 4608530 ) + NEW met4 ( 211500 4597540 ) via4_12040_22280 + NEW met3 TAPERRULE met3_width_580 ( 204420 4608970 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_16570 ( 225805 4586550 ) ( * 4608530 ) + NEW met3 TAPERRULE met3_width_450 ( 204420 4586175 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_1210 ( 204875 4586550 ) ( * 4608530 ) + NEW met3 ( 211500 4597540 ) via3_12040_22280_hx + NEW met4 TAPERRULE met4_width_520 ( 205190 2278530 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_550 ( 217815 2255360 ) ( * 2278120 ) + NEW met4 TAPERRULE met4_width_460 ( 205190 2254980 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_670 ( 205375 2255360 ) ( * 2278120 ) + NEW met4 ( 211625 2266740 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_430 ( 206250 2278485 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16600 ( 225840 2255360 ) ( * 2278120 ) + NEW met3 TAPERRULE met3_width_455 ( 206250 2254982.5 ) ( 233990 * ) + NEW met3 ( 211625 2266740 ) via3_11830_23060_vx + NEW met4 TAPERRULE met4_width_540 ( 205120 2228250 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_580 ( 217730 2205070 ) ( * 2227830 ) + NEW met4 TAPERRULE met4_width_440 ( 205120 2204700 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_640 ( 205290 2205070 ) ( * 2227830 ) + NEW met4 ( 211525 2216450 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_520 ( 206250 2228240 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16700 ( 225790 2205070 ) ( * 2227830 ) + NEW met3 TAPERRULE met3_width_420 ( 206250 2204710 ) ( 233990 * ) + NEW met3 ( 211525 2216450 ) via3_11830_23060_vx ; + - vccd2 ( user2_vccd_lvclamp_pad VCCD1 ) + ( user2_vssd_lvclamp_pad VCCD1 ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 227490 897300 ) ( * 2229720 ) + NEW met5 TAPERRULE met5_width_13000 ( 227490 2253440 ) ( * 4560010 ) + NEW met5 TAPERRULE met5_width_13000 ( 227490 4584650 ) ( * 4610540 ) + NEW met5 TAPERRULE met5_width_13000 ( 227490 4635180 ) ( * 4974220 ) + NEW met4 TAPERRULE met4_width_410 ( 221140 4634585 ) ( 233850 * ) + NEW met4 TAPERRULE met4_width_490 ( 233755 4611490 ) ( * 4634230 ) + NEW met4 TAPERRULE met4_width_570 ( 221140 4611055 ) ( 233850 * ) + NEW met4 TAPERRULE met4_width_480 ( 221230 4611490 ) ( * 4634230 ) + NEW met4 ( 227490 4622860 ) via4_12040_23040 + NEW met3 TAPERRULE met3_width_320 ( 204420 4634540 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_580 ( 233800 4611490 ) ( * 4634230 ) + NEW met3 TAPERRULE met3_width_585 ( 204420 4611047.5 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_17200 ( 212870 4611490 ) ( * 4634230 ) + NEW met3 ( 227490 4622860 ) via3_12040_23040_hx + NEW met4 TAPERRULE met4_width_640 ( 221120 4584170 ) ( 233830 * ) + NEW met4 TAPERRULE met4_width_570 ( 233695 4560960 ) ( * 4583700 ) + NEW met4 TAPERRULE met4_width_340 ( 221120 4560640 ) ( 233830 * ) + NEW met4 TAPERRULE met4_width_400 ( 221170 4560960 ) ( * 4583700 ) + NEW met4 ( 227390 4572330 ) via4_12040_23040 + NEW met3 TAPERRULE met3_width_650 ( 204420 4584175 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_680 ( 233750 4560960 ) ( * 4583700 ) + NEW met3 TAPERRULE met3_width_310 ( 204420 4560655 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_17100 ( 212820 4560960 ) ( * 4583700 ) + NEW met3 ( 227390 4572330 ) via3_12040_23040_hx + NEW met4 TAPERRULE met4_width_540 ( 221160 2252910 ) ( 233910 * ) + NEW met4 TAPERRULE met4_width_610 ( 233755 2230670 ) ( * 2252490 ) + NEW met4 TAPERRULE met4_width_440 ( 221160 2230300 ) ( 233910 * ) + NEW met4 TAPERRULE met4_width_440 ( 221230 2230670 ) ( * 2252490 ) + NEW met4 ( 227450 2241580 ) via4_12000_22120 + NEW met3 TAPERRULE met3_width_615 ( 206250 2252947.5 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_690 ( 233795 2230670 ) ( * 2252490 ) + NEW met3 TAPERRULE met3_width_520 ( 206250 2230260 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_15350 ( 213775 2230670 ) ( * 2252490 ) + NEW met3 ( 227450 2241580 ) via3_12000_22120_hx ; + - mprj_io[4] ( mprj_pads.area1_io_pad\[4\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 1409000 ) ( * 1470000 ) ; + - mprj_pads.area1_io_pad\[4\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[4\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[4\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[4\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 1403557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 1404240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1404380 ) ( * 1442745 ) + NEW met1 ( 3378000 1442885 ) ( 3378120 * ) + NEW met1 ( 3378060 1443275 ) via_260_860_vh + NEW met2 ( 3377105 1443645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1443570 ) ( 3379365 * ) + NEW met1 ( 3378000 1443665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1443805 ) ( * 1464365 ) + NEW met1 ( 3378000 1464505 ) ( 3378120 * ) + NEW met1 ( 3378060 1464895 ) via_260_860_vh + NEW met2 ( 3377105 1465265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1465190 ) ( 3379365 * ) + NEW met1 ( 3378000 1465285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1465190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1443570 ) ( 3377860 * ) + NEW met2 ( 3378060 1403850 ) via_260_860_vh ( * 1403460 ) + ( 3378120 * ) + NEW met1 ( 3378010 1403395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 1403557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 1403485 ) ( 3379365 * ) ; + - mprj_io_in[4] ( mprj_pads.area1_io_pad\[4\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1406775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[4\]/HLD_H_N + ( mprj_pads.area1_io_pad\[4\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[4\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 1450085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 1450012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 1450110 ) ( 3377640 * ) + NEW met1 ( 3377580 1449720 ) via_260_860_vh + NEW met1 ( 3377520 1449330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1410225 ) ( * 1449190 ) + NEW met1 ( 3377520 1410085 ) ( 3377640 * ) + NEW met1 ( 3377580 1409995 ) via_260_260_vh + NEW met2 ( 3377105 1410065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 1409995 ) ( 3379365 * ) + NEW met2 ( 3377105 1409925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 1409995 ) ( 3377380 * ) + NEW met1 ( 3377520 1409905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1403395 ) ( * 1409765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 1450012.5 ) ( 3377380 * ) ; + - mprj_io_one[4] ( mprj_pads.area1_io_pad\[4\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1412755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[4] ( mprj_pads.area1_io_pad\[4\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1415975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[4\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[4\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[4\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[4\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[13] ( mprj_pads.area1_io_pad\[4\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1425175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[4\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[4\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[4] ( mprj_pads.area1_io_pad\[4\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1431155 ) ( 3379365 * ) ; + - mprj_io_dm[12] ( mprj_pads.area1_io_pad\[4\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1434375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[4] ( mprj_pads.area1_io_pad\[4\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1437595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[4] ( mprj_pads.area1_io_pad\[4\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1440355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[4\]/ENABLE_H + ( mprj_pads.area1_io_pad\[4\] ENABLE_H ) ; + - mprj_io_analog_sel[4] ( mprj_pads.area1_io_pad\[4\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1452775 ) ( 3379365 * ) ; + - mprj_io_dm[14] ( mprj_pads.area1_io_pad\[4\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1455995 ) ( 3379365 * ) ; + - mprj_io_holdover[4] ( mprj_pads.area1_io_pad\[4\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1459215 ) ( 3379365 * ) ; + - mprj_io_out[4] ( mprj_pads.area1_io_pad\[4\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1461975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[4] ( mprj_pads.area1_io_pad\[4\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1471175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[4] + ( mprj_pads.area1_io_pad\[4\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1474395 ) ( 3379365 * ) ; + - mprj_io_oeb[4] ( mprj_pads.area1_io_pad\[4\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1477615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[4\]/IN_H + ( mprj_pads.area1_io_pad\[4\] IN_H ) ; + - mprj_io[23] ( mprj_pads.area2_io_pad\[4\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 476580 ) ( * 2324490 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348200 ) ( * 4538150 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562410 ) ( * 4588310 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4612670 ) ( * 4962770 ) + NEW met4 TAPERRULE met4_width_560 ( 3370200 4612150 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_600 ( 3382780 4589260 ) ( * 4611720 ) + NEW met4 TAPERRULE met4_width_530 ( 3370200 4588845 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589260 ) ( * 4611720 ) + NEW met4 ( 3376580 4600490 ) via4_11800_22760 + NEW met3 TAPERRULE met3_width_630 ( 3354010 4612185 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1140 ( 3383050 4589260 ) ( * 4611720 ) + NEW met3 TAPERRULE met3_width_610 ( 3354010 4588805 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16820 ( 3362270 4589260 ) ( * 4611720 ) + NEW met3 ( 3376580 4600490 ) via3_11800_22760_hx + NEW met4 TAPERRULE met4_width_590 ( 3370230 4561905 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_590 ( 3382815 4539100 ) ( * 4561460 ) + NEW met4 TAPERRULE met4_width_600 ( 3370230 4538650 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_770 ( 3370465 4539100 ) ( * 4561460 ) + NEW met4 ( 3376685 4550280 ) via4_11670_22660 + NEW met3 TAPERRULE met3_width_635 ( 3354010 4561927.5 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1100 ( 3383070 4539100 ) ( * 4561460 ) + NEW met3 TAPERRULE met3_width_650 ( 3354010 4538625 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16990 ( 3362355 4539100 ) ( * 4561460 ) + NEW met3 ( 3376685 4550280 ) via3_11670_22660_hx + NEW met4 TAPERRULE met4_width_550 ( 3370270 2347675 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_530 ( 3382825 2325440 ) ( * 2347250 ) + NEW met4 TAPERRULE met4_width_520 ( 3370270 2325030 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370420 2325440 ) ( * 2347250 ) + NEW met4 ( 3376640 2336345 ) via4_11840_22110 + NEW met3 TAPERRULE met3_width_600 ( 3354120 2347700 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_1830 ( 3383475 2325440 ) ( * 2347250 ) + NEW met3 TAPERRULE met3_width_545 ( 3354120 2325017.5 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_16750 ( 3362345 2325440 ) ( * 2347250 ) + NEW met3 ( 3376640 2336345 ) via3_11840_22110_hx ; + - mprj_io_in[23] ( mprj_pads.area2_io_pad\[4\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 456225 4977105 ) ( * 4979365 ) ; + - mprj_io_one[23] ( mprj_pads.area2_io_pad\[4\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 450245 4977105 ) ( * 4979365 ) ; + - mprj_io_slow_sel[23] ( mprj_pads.area2_io_pad\[4\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 447025 4977105 ) ( * 4979365 ) ; + - mprj_analog_io[16] ( mprj_pads.area2_io_pad\[4\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 443805 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[4\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[4\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[70] ( mprj_pads.area2_io_pad\[4\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 437825 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[4\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[4\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[23] ( mprj_pads.area2_io_pad\[4\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 431845 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[69] ( mprj_pads.area2_io_pad\[4\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 428625 4977105 ) ( * 4979365 ) ; + - mprj_io_analog_pol[23] ( mprj_pads.area2_io_pad\[4\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 425405 4977105 ) ( * 4979365 ) ; + - mprj_io_inp_dis[23] ( mprj_pads.area2_io_pad\[4\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 422645 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[4\]/ENABLE_H + ( mprj_pads.area2_io_pad\[4\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[4\]/HLD_H_N + ( mprj_pads.area2_io_pad\[4\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[4\] TIE_HI_ESD ) + + ROUTED met2 TAPERRULE met2_width_280 ( 412985 4977105 ) ( * 4977350 ) + NEW met2 ( 412915 4977490 ) ( 413640 * ) + NEW met2 ( 412915 4977670 ) ( 413640 * ) + NEW met2 TAPERRULE met2_width_280 ( 412985 4977810 ) ( * 4979365 ) + NEW met2 ( 413280 4977580 ) via_860_260_hv + NEW met1 TAPERRULE met1_width_240 ( 413780 4977580 ) ( 453005 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 453005 4977780 ) ( * 4979365 ) + NEW met2 TAPERRULE met2_width_280 ( 453005 4977105 ) ( * 4977380 ) + NEW met1 TAPERRULE met1_width_240 ( 453205 4977580 ) ( 459605 * ) ; + - mprj_io_analog_sel[23] ( mprj_pads.area2_io_pad\[4\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 410225 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[71] ( mprj_pads.area2_io_pad\[4\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 407005 4977105 ) ( * 4979365 ) ; + - mprj_io_holdover[23] ( mprj_pads.area2_io_pad\[4\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 403785 4977105 ) ( * 4979365 ) ; + - mprj_io_out[23] ( mprj_pads.area2_io_pad\[4\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 401025 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[4\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[4\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[4\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[4\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 459445 4977105 ) ( * 4977830 ) + NEW met2 ( 458790 4977970 ) ( 459150 * ) ( * 4978060 ) + via_860_260_hv + NEW met2 ( 458790 4978150 ) ( 459515 * ) + NEW met2 TAPERRULE met2_width_280 ( 459445 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 420225 4978060 ) ( 458650 * ) + NEW met1 ( 419725 4978060 ) via_860_260_hv + NEW met2 ( 419355 4978150 ) ( 420085 * ) + NEW met2 TAPERRULE met2_width_280 ( 419425 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 398605 4978060 ) ( 419225 * ) + NEW met1 ( 398105 4978060 ) via_860_260_hv + NEW met2 ( 397735 4978150 ) ( 398465 * ) + NEW met2 TAPERRULE met2_width_280 ( 397805 4978290 ) ( * 4979365 ) + NEW met2 ( 397735 4977970 ) ( 398465 * ) + NEW met2 TAPERRULE met2_width_280 ( 397805 4977105 ) ( * 4977830 ) + NEW met2 ( 419355 4977970 ) ( 420085 * ) + NEW met2 TAPERRULE met2_width_280 ( 419425 4977105 ) ( * 4977830 ) ; + - mprj_io_vtrip_sel[23] ( mprj_pads.area2_io_pad\[4\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 391825 4977105 ) ( * 4979365 ) ; + - mprj_io_ib_mode_sel[23] + ( mprj_pads.area2_io_pad\[4\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 388605 4977105 ) ( * 4979365 ) ; + - mprj_io_oeb[23] ( mprj_pads.area2_io_pad\[4\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 385385 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[4\]/IN_H + ( mprj_pads.area2_io_pad\[4\] IN_H ) ; + - mprj_io[33] ( mprj_pads.area2_io_pad\[14\] PAD ) ; + - mprj_io_in[33] ( mprj_pads.area2_io_pad\[14\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1847225 ) ( 210895 * ) ; + - mprj_io_one[33] ( mprj_pads.area2_io_pad\[14\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1841245 ) ( 210895 * ) ; + - mprj_io_slow_sel[33] ( mprj_pads.area2_io_pad\[14\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1838025 ) ( 210895 * ) ; + - mprj_analog_io[26] ( mprj_pads.area2_io_pad\[14\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1834805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[14\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[14\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[100] ( mprj_pads.area2_io_pad\[14\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1828825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[14\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[14\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[33] ( mprj_pads.area2_io_pad\[14\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1822845 ) ( 210895 * ) ; + - mprj_io_dm[99] ( mprj_pads.area2_io_pad\[14\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1819625 ) ( 210895 * ) ; + - mprj_io_analog_pol[33] + ( mprj_pads.area2_io_pad\[14\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1816405 ) ( 210895 * ) ; + - mprj_io_inp_dis[33] ( mprj_pads.area2_io_pad\[14\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1813645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[14\]/ENABLE_H + ( mprj_pads.area2_io_pad\[14\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[14\]/HLD_H_N + ( mprj_pads.area2_io_pad\[14\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[14\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 1803915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1803987.5 ) ( 210220 * ) + NEW met1 ( 210360 1804670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1804810 ) ( * 1843775 ) + NEW met1 ( 210360 1843915 ) ( 210480 * ) + NEW met1 ( 210420 1844005 ) via_260_260_vh + NEW met2 ( 208635 1844075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 1844005 ) ( 210895 * ) + NEW met2 ( 208635 1843935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 1844005 ) ( 210220 * ) + NEW met1 ( 210360 1844095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1844235 ) ( * 1850605 ) + NEW met1 ( 210420 1804280 ) via_260_860_vh + NEW met1 ( 210360 1803890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 1803987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[33] + ( mprj_pads.area2_io_pad\[14\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1801225 ) ( 210895 * ) ; + - mprj_io_dm[101] ( mprj_pads.area2_io_pad\[14\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1798005 ) ( 210895 * ) ; + - mprj_io_holdover[33] ( mprj_pads.area2_io_pad\[14\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1794785 ) ( 210895 * ) ; + - mprj_io_out[33] ( mprj_pads.area2_io_pad\[14\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1792025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[14\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[14\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[14\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[14\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 1850442.5 ) ( 210895 * ) + NEW met2 ( 208635 1850515 ) ( 210895 * ) + NEW met1 ( 209880 1850540 ) ( 210000 * ) + NEW met1 ( 209890 1850605 ) ( 209990 * ) + NEW met1 ( 209940 1850150 ) via_260_860_vh + NEW met1 ( 209880 1849760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1811255 ) ( * 1849620 ) + NEW met1 ( 209880 1811115 ) ( 210000 * ) + NEW met1 ( 209940 1810725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1810430 ) ( 210895 * ) + NEW met2 ( 208635 1810355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1810430 ) ( 209740 * ) + NEW met1 ( 209880 1810335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1789635 ) ( * 1810195 ) + NEW met1 ( 209880 1789495 ) ( 210000 * ) + NEW met1 ( 209940 1789105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1788810 ) ( 210895 * ) + NEW met2 ( 208635 1788735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1788810 ) ( 209740 * ) + NEW met1 ( 209880 1788715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1850442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[33] ( mprj_pads.area2_io_pad\[14\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1782825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[33] + ( mprj_pads.area2_io_pad\[14\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1779605 ) ( 210895 * ) ; + - mprj_io_oeb[33] ( mprj_pads.area2_io_pad\[14\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1776385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[14\]/IN_H + ( mprj_pads.area2_io_pad\[14\] IN_H ) ; + - vddio_pad2 ( mgmt_vddio_hvclamp_pad\[1\] VDDIO_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 64465 4356850 ) ( * 4416090 ) ; + - flash_io1 ( flash_io1_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 2304000 64215 ) ( 2365000 * ) ; + - flash_io1_pad/TIE_LO_ESD ( flash_io1_pad TIE_LO_ESD ) + ( flash_io1_pad ENABLE_VSWITCH_H ) + ( flash_io1_pad ENABLE_INP_H ) + + ROUTED met2 ( 2298520 209315 ) via_260_260_hv + NEW met2 ( 2298460 209405 ) ( 2298580 * ) + NEW met1 TAPERRULE met1_width_260 ( 2297880 209315 ) ( 2298320 * ) + NEW met2 ( 2298460 209225 ) ( 2298580 * ) + NEW met1 TAPERRULE met1_width_260 ( 2298720 209315 ) ( 2338550 * ) via_260_260_hv + ( * 209405 ) ( 2338610 * ) + NEW met2 ( 2338490 209225 ) ( 2338610 * ) + NEW met1 TAPERRULE met1_width_260 ( 2338750 209315 ) ( 2360180 * ) via_260_260_hv + ( * 209405 ) ( 2360240 * ) + NEW met2 ( 2360120 209225 ) ( 2360240 * ) + NEW met1 TAPERRULE met1_width_260 ( 2360380 209315 ) ( 2376065 * ) ; + - flash_io1_di_core ( flash_io1_pad IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2301775 208635 ) ( * 210895 ) ; + - flash_io1_pad/HLD_H_N ( flash_io1_pad HLD_H_N ) + ( flash_io1_pad TIE_HI_ESD ) + + ROUTED met2 ( 2344965 209735 ) via_260_260_hv + NEW met2 ( 2344905 209825 ) ( 2345025 * ) + NEW met1 TAPERRULE met1_width_260 ( 2305185 209735 ) ( 2344765 * ) + NEW met1 ( 2304985 209735 ) via_260_260_hv ( * 209825 ) + ( 2305045 * ) + NEW met1 TAPERRULE met1_width_260 ( 2297880 209735 ) ( 2304785 * ) + NEW met2 ( 2304925 209645 ) ( 2305045 * ) + NEW met2 ( 2344905 209645 ) ( 2345025 * ) + NEW met1 TAPERRULE met1_width_260 ( 2345165 209735 ) ( 2376065 * ) ; + - flash_io1_pad/SLOW ( flash_io1_pad SLOW ) + ( constant_block_5 zero ) ( flash_io1_pad IB_MODE_SEL ) + ( flash_io1_pad VTRIP_SEL ) ( flash_io1_pad HLD_OVR ) + ( flash_io1_pad ANALOG_SEL ) ( flash_io1_pad ANALOG_POL ) + ( flash_io1_pad ANALOG_EN ) + + ROUTED met2 ( 2310940 210155 ) via_260_260_hv + NEW met2 ( 2310880 210245 ) ( 2311000 * ) + NEW met1 TAPERRULE met1_width_260 ( 2297880 210155 ) ( 2310740 * ) + NEW met2 ( 2310880 210065 ) ( 2311000 * ) + NEW met1 TAPERRULE met1_width_260 ( 2311140 210155 ) ( 2326135 * ) via_260_260_hv + ( * 210245 ) ( 2326195 * ) + NEW met2 ( 2326075 210065 ) ( 2326195 * ) + NEW met1 TAPERRULE met1_width_260 ( 2326335 210155 ) ( 2332570 * ) via_260_260_hv + ( * 210245 ) ( 2332630 * ) + NEW met2 ( 2332510 210065 ) ( 2332630 * ) + NEW met1 TAPERRULE met1_width_260 ( 2332770 210155 ) ( 2347740 * ) via_260_260_hv + ( * 210245 ) ( 2347800 * ) + NEW met2 ( 2347680 210065 ) ( 2347800 * ) + NEW met1 TAPERRULE met1_width_260 ( 2347940 210155 ) ( 2354180 * ) via_260_260_hv + ( * 210245 ) ( 2354240 * ) + NEW met2 ( 2354120 210065 ) ( 2354240 * ) + NEW met1 TAPERRULE met1_width_260 ( 2354380 210155 ) ( 2366135 * ) via_260_260_hv + ( * 210245 ) ( 2366195 * ) + NEW met2 ( 2366075 210065 ) ( 2366195 * ) + NEW met1 TAPERRULE met1_width_260 ( 2366335 210155 ) ( 2369375 * ) via_260_260_hv + ( * 210245 ) ( 2369435 * ) + NEW met2 ( 2369315 210065 ) ( 2369435 * ) + NEW met1 TAPERRULE met1_width_260 ( 2369575 210155 ) ( 2377945 * ) via_260_260_hv + ( * 210245 ) ( 2378005 * ) + NEW met2 TAPERRULE met2_width_260 ( 2377945 204845 ) ( * 209955 ) + NEW met2 ( 2377865 204705 ) ( 2378025 * ) + NEW met2 ( 2377945 204580 ) via2_300_300_vx + NEW met3 ( 2377920 204605 ) ( 2377970 * ) + NEW met3 ( 2378245 204580 ) ( 2394225 * ) + NEW met3 ( 2394225 203710 ) ( * 204280 ) + NEW met3 ( 2377920 204555 ) ( 2377970 * ) + NEW met3 ( 2377920 204580 ) ( 2377645 * ) + NEW met2 ( 2377865 204455 ) ( 2378025 * ) ; + - flash_io1_pad/PAD_A_ESD_0_H ( flash_io1_pad PAD_A_ESD_0_H ) ; + - flash_io1_pad/PAD_A_ESD_1_H ( flash_io1_pad PAD_A_ESD_1_H ) ; + - flash_io1_pad/PAD_A_NOESD_H ( flash_io1_pad PAD_A_NOESD_H ) ; + - flash_io1_oeb_core ( flash_io1_pad OE_N ) ( flash_io1_pad DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2372615 208635 ) ( * 208960 ) ( * 209100 ) + ( * 210895 ) ( * 211035 ) ( * 212280 ) + NEW met2 ( 2372390 212420 ) ( 2372510 * ) + NEW met2 ( 2372450 212510 ) via_260_260_hv + NEW met2 ( 2372390 212600 ) ( 2372510 * ) NEW met1 ( 2329410 212510 ) ( 2372250 * ) - NEW met1 ( 2329210 212510 ) via_260_260 - NEW met1 ( 2329120 212510 ) ( 2329010 * ) - NEW met1 ( 2329410 212610 ) ( 2329300 * ) - NEW met1 ( 2329410 212410 ) ( 2329300 * ) - NEW met2 ( 2329150 212655 ) ( 2329270 * ) - NEW met2 ( 2329150 212365 ) ( 2329270 * ) + NEW met1 ( 2329210 212510 ) via_260_260_hv ( * 212600 ) + ( 2329270 * ) + NEW met2 ( 2329150 212420 ) ( 2329270 * ) NEW met2 ( 2329210 209240 ) ( * 212280 ) - NEW met2 ( 2329210 209100 ) ( 2329305 * ) - NEW met1 ( 2372360 212410 ) ( 2372450 * ) ( * 212510 ) - via_260_260 - NEW met1 ( 2372650 212510 ) ( 2372540 * ) ; - - flash_io0_oeb_core - + ROUTED met2 ( 2098545 208832.5 ) ( 2098685 * ) - NEW met2 ( 2098545 210032.5 ) ( 2098750 * ) - NEW met2 ( 2098750 211035 ) ( * 213980 ) - NEW met2 ( 2098690 214065 ) ( 2098810 * ) - NEW met2 ( 2098690 214355 ) ( 2098810 * ) - NEW met1 ( 2098660 214310 ) ( 2098550 * ) - NEW met1 ( 2055710 214210 ) ( 2098550 * ) - NEW met1 ( 2055510 214210 ) via_260_260 - NEW met1 ( 2055420 214210 ) ( 2055310 * ) - NEW met1 ( 2055710 214310 ) ( 2055600 * ) - NEW met1 ( 2055710 214110 ) ( 2055600 * ) - NEW met2 ( 2055450 214355 ) ( 2055570 * ) - NEW met2 ( 2055450 214065 ) ( 2055570 * ) - NEW met2 ( 2055510 209170 ) ( * 213980 ) - NEW met1 ( 2098660 214110 ) ( 2098750 * ) ( * 214210 ) - via_260_260 - NEW met1 ( 2098950 214210 ) ( 2098840 * ) ; + NEW met2 ( 2329210 209100 ) ( 2329305 * ) ; + - flash_io1_ieb_core ( flash_io1_pad DM[2] ) + ( flash_io1_pad DM[1] ) ( flash_io1_pad INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2335355 208635 ) ( * 210895 ) ( * 211035 ) + ( * 211770 ) via_260_260_hv + NEW met2 ( 2335300 211860 ) ( 2335420 * ) + NEW met1 ( 2335560 211770 ) ( 2350995 * ) via_260_260_hv + ( * 211860 ) ( 2351055 * ) + NEW met2 TAPERRULE met2_width_260 ( 2350995 210975 ) ( * 211570 ) + NEW met1 ( 2320380 211770 ) ( 2335160 * ) + NEW met1 ( 2320180 211770 ) via_260_260_hv ( * 211860 ) + ( 2320240 * ) + NEW met2 TAPERRULE met2_width_260 ( 2320180 210970 ) ( * 211570 ) ; + - flash_io1_do_core ( flash_io1_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2356975 208635 ) ( * 210895 ) ; + - flash_io1_pad/IN_H ( flash_io1_pad IN_H ) ; + - mprj_io[10] ( mprj_pads.area1_io_pad\[10\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 3423000 ) ( * 3484000 ) ; + - mprj_pads.area1_io_pad\[10\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[10\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[10\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[10\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 3417557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 3418240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3418380 ) ( * 3456745 ) + NEW met1 ( 3378000 3456885 ) ( 3378120 * ) + NEW met1 ( 3378060 3457275 ) via_260_860_vh + NEW met2 ( 3377105 3457645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3457570 ) ( 3379365 * ) + NEW met1 ( 3378000 3457665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3457805 ) ( * 3478365 ) + NEW met1 ( 3378000 3478505 ) ( 3378120 * ) + NEW met1 ( 3378060 3478895 ) via_260_860_vh + NEW met2 ( 3377105 3479265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3479190 ) ( 3379365 * ) + NEW met1 ( 3378000 3479285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3479190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3457570 ) ( 3377860 * ) + NEW met2 ( 3378060 3417850 ) via_260_860_vh ( * 3417460 ) + ( 3378120 * ) + NEW met1 ( 3378010 3417395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 3417557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 3417485 ) ( 3379365 * ) ; + - mprj_io_in[10] ( mprj_pads.area1_io_pad\[10\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3420775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[10\]/HLD_H_N + ( mprj_pads.area1_io_pad\[10\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[10\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3464085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3464012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3464110 ) ( 3377640 * ) + NEW met1 ( 3377580 3463720 ) via_260_860_vh + NEW met1 ( 3377520 3463330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3424225 ) ( * 3463190 ) + NEW met1 ( 3377520 3424085 ) ( 3377640 * ) + NEW met1 ( 3377580 3423995 ) via_260_260_vh + NEW met2 ( 3377105 3424065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 3423995 ) ( 3379365 * ) + NEW met2 ( 3377105 3423925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 3423995 ) ( 3377380 * ) + NEW met1 ( 3377520 3423905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3417395 ) ( * 3423765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3464012.5 ) ( 3377380 * ) ; + - mprj_io_one[10] ( mprj_pads.area1_io_pad\[10\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3426755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[10] ( mprj_pads.area1_io_pad\[10\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3429975 ) ( 3379365 * ) ; + - mprj_analog_io[3] ( mprj_pads.area1_io_pad\[10\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3433195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[10\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[10\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[31] ( mprj_pads.area1_io_pad\[10\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3439175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[10\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[10\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[10] ( mprj_pads.area1_io_pad\[10\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3445155 ) ( 3379365 * ) ; + - mprj_io_dm[30] ( mprj_pads.area1_io_pad\[10\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3448375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[10] + ( mprj_pads.area1_io_pad\[10\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3451595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[10] ( mprj_pads.area1_io_pad\[10\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3454355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[10\]/ENABLE_H + ( mprj_pads.area1_io_pad\[10\] ENABLE_H ) ; + - mprj_io_analog_sel[10] + ( mprj_pads.area1_io_pad\[10\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3466775 ) ( 3379365 * ) ; + - mprj_io_dm[32] ( mprj_pads.area1_io_pad\[10\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3469995 ) ( 3379365 * ) ; + - mprj_io_holdover[10] ( mprj_pads.area1_io_pad\[10\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3473215 ) ( 3379365 * ) ; + - mprj_io_out[10] ( mprj_pads.area1_io_pad\[10\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3475975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[10] ( mprj_pads.area1_io_pad\[10\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3485175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[10] + ( mprj_pads.area1_io_pad\[10\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3488395 ) ( 3379365 * ) ; + - mprj_io_oeb[10] ( mprj_pads.area1_io_pad\[10\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3491615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[10\]/IN_H + ( mprj_pads.area1_io_pad\[10\] IN_H ) ; + - mprj_io[6] ( mprj_pads.area1_io_pad\[6\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 1860000 ) ( * 1921000 ) ; + - mprj_pads.area1_io_pad\[6\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[6\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[6\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[6\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 1854557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 1855240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1855380 ) ( * 1893745 ) + NEW met1 ( 3378000 1893885 ) ( 3378120 * ) + NEW met1 ( 3378060 1894275 ) via_260_860_vh + NEW met2 ( 3377105 1894645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1894570 ) ( 3379365 * ) + NEW met1 ( 3378000 1894665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1894805 ) ( * 1915365 ) + NEW met1 ( 3378000 1915505 ) ( 3378120 * ) + NEW met1 ( 3378060 1915895 ) via_260_860_vh + NEW met2 ( 3377105 1916265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1916190 ) ( 3379365 * ) + NEW met1 ( 3378000 1916285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1916190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1894570 ) ( 3377860 * ) + NEW met2 ( 3378060 1854850 ) via_260_860_vh ( * 1854460 ) + ( 3378120 * ) + NEW met1 ( 3378010 1854395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 1854557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 1854485 ) ( 3379365 * ) ; + - mprj_io_in[6] ( mprj_pads.area1_io_pad\[6\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1857775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[6\]/HLD_H_N + ( mprj_pads.area1_io_pad\[6\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[6\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 1901085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 1901012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 1901110 ) ( 3377640 * ) + NEW met1 ( 3377580 1900720 ) via_260_860_vh + NEW met1 ( 3377520 1900330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1861225 ) ( * 1900190 ) + NEW met1 ( 3377520 1861085 ) ( 3377640 * ) + NEW met1 ( 3377580 1860995 ) via_260_260_vh + NEW met2 ( 3377105 1861065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 1860995 ) ( 3379365 * ) + NEW met2 ( 3377105 1860925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 1860995 ) ( 3377380 * ) + NEW met1 ( 3377520 1860905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1854395 ) ( * 1860765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 1901012.5 ) ( 3377380 * ) ; + - mprj_io_one[6] ( mprj_pads.area1_io_pad\[6\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1863755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[6] ( mprj_pads.area1_io_pad\[6\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1866975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[6\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[6\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[6\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[6\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[19] ( mprj_pads.area1_io_pad\[6\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1876175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[6\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[6\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[6] ( mprj_pads.area1_io_pad\[6\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1882155 ) ( 3379365 * ) ; + - mprj_io_dm[18] ( mprj_pads.area1_io_pad\[6\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1885375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[6] ( mprj_pads.area1_io_pad\[6\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1888595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[6] ( mprj_pads.area1_io_pad\[6\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1891355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[6\]/ENABLE_H + ( mprj_pads.area1_io_pad\[6\] ENABLE_H ) ; + - mprj_io_analog_sel[6] ( mprj_pads.area1_io_pad\[6\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1903775 ) ( 3379365 * ) ; + - mprj_io_dm[20] ( mprj_pads.area1_io_pad\[6\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1906995 ) ( 3379365 * ) ; + - mprj_io_holdover[6] ( mprj_pads.area1_io_pad\[6\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1910215 ) ( 3379365 * ) ; + - mprj_io_out[6] ( mprj_pads.area1_io_pad\[6\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1912975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[6] ( mprj_pads.area1_io_pad\[6\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1922175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[6] + ( mprj_pads.area1_io_pad\[6\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1925395 ) ( 3379365 * ) ; + - mprj_io_oeb[6] ( mprj_pads.area1_io_pad\[6\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1928615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[6\]/IN_H + ( mprj_pads.area1_io_pad\[6\] IN_H ) ; + - flash_csb ( flash_csb_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 1482000 64215 ) ( 1543000 * ) ; + - flash_csb_pad/TIE_LO_ESD ( flash_csb_pad TIE_LO_ESD ) + ( flash_csb_pad ENABLE_VSWITCH_H ) + ( flash_csb_pad ENABLE_INP_H ) + + ROUTED met2 ( 1476545 209315 ) via_260_260_hv + NEW met2 ( 1476485 209405 ) ( 1476605 * ) + NEW met1 TAPERRULE met1_width_260 ( 1475880 209315 ) ( 1476345 * ) + NEW met2 ( 1476485 209225 ) ( 1476605 * ) + NEW met1 TAPERRULE met1_width_260 ( 1476745 209315 ) ( 1516580 * ) via_260_260_hv + ( * 209405 ) ( 1516640 * ) + NEW met2 ( 1516520 209225 ) ( 1516640 * ) + NEW met1 TAPERRULE met1_width_260 ( 1516780 209315 ) ( 1538210 * ) via_260_260_hv + ( * 209405 ) ( 1538270 * ) + NEW met2 ( 1538150 209225 ) ( 1538270 * ) + NEW met1 TAPERRULE met1_width_260 ( 1538410 209315 ) ( 1554065 * ) ; + - flash_csb_pad/IN ( flash_csb_pad IN ) ; + - flash_csb_pad/HLD_H_N ( flash_csb_pad HLD_H_N ) + ( flash_csb_pad TIE_HI_ESD ) + + ROUTED met2 ( 1523015 209735 ) via_260_260_hv + NEW met2 ( 1522955 209825 ) ( 1523075 * ) + NEW met1 TAPERRULE met1_width_260 ( 1483210 209735 ) ( 1522815 * ) + NEW met1 ( 1483010 209735 ) via_260_260_hv ( * 209825 ) + ( 1483070 * ) + NEW met1 TAPERRULE met1_width_260 ( 1475880 209735 ) ( 1482810 * ) + NEW met2 ( 1482950 209645 ) ( 1483070 * ) + NEW met2 ( 1522955 209645 ) ( 1523075 * ) + NEW met1 TAPERRULE met1_width_260 ( 1523215 209735 ) ( 1554065 * ) ; + - flash_csb_pad/SLOW ( flash_csb_pad SLOW ) + ( constant_block_2 zero ) ( flash_csb_pad IB_MODE_SEL ) + ( flash_csb_pad VTRIP_SEL ) ( flash_csb_pad HLD_OVR ) + ( flash_csb_pad ANALOG_SEL ) ( flash_csb_pad INP_DIS ) + ( flash_csb_pad ANALOG_POL ) ( flash_csb_pad DM[0] ) + ( flash_csb_pad ANALOG_EN ) + + ROUTED met2 ( 1488970 210155 ) via_260_260_hv + NEW met2 ( 1488910 210245 ) ( 1489030 * ) + NEW met1 TAPERRULE met1_width_260 ( 1475880 210155 ) ( 1488770 * ) + NEW met2 ( 1488910 210065 ) ( 1489030 * ) + NEW met1 TAPERRULE met1_width_260 ( 1489170 210155 ) ( 1504150 * ) via_260_260_hv + ( * 210245 ) ( 1504210 * ) + NEW met2 ( 1504090 210065 ) ( 1504210 * ) + NEW met1 TAPERRULE met1_width_260 ( 1504350 210155 ) ( 1507385 * ) via_260_260_hv + ( * 210245 ) ( 1507445 * ) + NEW met2 ( 1507325 210065 ) ( 1507445 * ) + NEW met1 TAPERRULE met1_width_260 ( 1507585 210155 ) ( 1510600 * ) via_260_260_hv + ( * 210245 ) ( 1510660 * ) + NEW met2 ( 1510540 210065 ) ( 1510660 * ) + NEW met1 TAPERRULE met1_width_260 ( 1510800 210155 ) ( 1513345 * ) via_260_260_hv + ( * 210245 ) ( 1513405 * ) + NEW met2 ( 1513285 210065 ) ( 1513405 * ) + NEW met1 TAPERRULE met1_width_260 ( 1513545 210155 ) ( 1525795 * ) via_260_260_hv + ( * 210245 ) ( 1525855 * ) + NEW met2 ( 1525735 210065 ) ( 1525855 * ) + NEW met1 TAPERRULE met1_width_260 ( 1525995 210155 ) ( 1532220 * ) via_260_260_hv + ( * 210245 ) ( 1532280 * ) + NEW met2 ( 1532160 210065 ) ( 1532280 * ) + NEW met1 TAPERRULE met1_width_260 ( 1532420 210155 ) ( 1544175 * ) via_260_260_hv + ( * 210245 ) ( 1544235 * ) + NEW met2 ( 1544115 210065 ) ( 1544235 * ) + NEW met1 TAPERRULE met1_width_260 ( 1544375 210155 ) ( 1547390 * ) via_260_260_hv + ( * 210245 ) ( 1547450 * ) + NEW met2 ( 1547330 210065 ) ( 1547450 * ) + NEW met1 TAPERRULE met1_width_260 ( 1547590 210155 ) ( 1555945 * ) via_260_260_hv + ( * 210245 ) ( 1556005 * ) + NEW met2 TAPERRULE met2_width_260 ( 1555945 204845 ) ( * 209955 ) + NEW met2 ( 1555865 204705 ) ( 1556025 * ) + NEW met2 ( 1555945 204580 ) via2_300_300_vx + NEW met3 ( 1555920 204605 ) ( 1555970 * ) + NEW met3 ( 1556245 204580 ) ( 1572215 * ) + NEW met3 ( 1572215 203670 ) ( * 204280 ) + NEW met3 ( 1555920 204555 ) ( 1555970 * ) + NEW met3 ( 1555920 204580 ) ( 1555645 * ) + NEW met2 ( 1555865 204455 ) ( 1556025 * ) ; + - flash_csb_pad/PAD_A_ESD_0_H ( flash_csb_pad PAD_A_ESD_0_H ) ; + - flash_csb_pad/PAD_A_ESD_1_H ( flash_csb_pad PAD_A_ESD_1_H ) ; + - flash_csb_pad/PAD_A_NOESD_H ( flash_csb_pad PAD_A_NOESD_H ) ; + - flash_csb_core ( flash_csb_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1534975 208635 ) ( * 210895 ) ; + - flash_csb_oeb_core ( flash_csb_pad OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1550615 208635 ) ( * 210895 ) ; + - flash_csb_pad/IN_H ( flash_csb_pad IN_H ) ; + - mprj_io[25] ( mprj_pads.area2_io_pad\[6\] PAD ) ; + - mprj_io_in[25] ( mprj_pads.area2_io_pad\[6\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3997225 ) ( 210895 * ) ; + - mprj_io_one[25] ( mprj_pads.area2_io_pad\[6\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3991245 ) ( 210895 * ) ; + - mprj_io_slow_sel[25] ( mprj_pads.area2_io_pad\[6\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3988025 ) ( 210895 * ) ; + - mprj_analog_io[18] ( mprj_pads.area2_io_pad\[6\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3984805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[6\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[6\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[76] ( mprj_pads.area2_io_pad\[6\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3978825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[6\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[6\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[25] ( mprj_pads.area2_io_pad\[6\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3972845 ) ( 210895 * ) ; + - mprj_io_dm[75] ( mprj_pads.area2_io_pad\[6\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3969625 ) ( 210895 * ) ; + - mprj_io_analog_pol[25] ( mprj_pads.area2_io_pad\[6\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3966405 ) ( 210895 * ) ; + - mprj_io_inp_dis[25] ( mprj_pads.area2_io_pad\[6\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3963645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[6\]/ENABLE_H + ( mprj_pads.area2_io_pad\[6\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[6\]/HLD_H_N + ( mprj_pads.area2_io_pad\[6\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[6\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3953915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3953987.5 ) ( 210220 * ) + NEW met1 ( 210360 3954670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3954810 ) ( * 3993775 ) + NEW met1 ( 210360 3993915 ) ( 210480 * ) + NEW met1 ( 210420 3994005 ) via_260_260_vh + NEW met2 ( 208635 3994075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3994005 ) ( 210895 * ) + NEW met2 ( 208635 3993935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3994005 ) ( 210220 * ) + NEW met1 ( 210360 3994095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3994235 ) ( * 4000605 ) + NEW met1 ( 210420 3954280 ) via_260_860_vh + NEW met1 ( 210360 3953890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3953987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[25] ( mprj_pads.area2_io_pad\[6\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3951225 ) ( 210895 * ) ; + - mprj_io_dm[77] ( mprj_pads.area2_io_pad\[6\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3948005 ) ( 210895 * ) ; + - mprj_io_holdover[25] ( mprj_pads.area2_io_pad\[6\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3944785 ) ( 210895 * ) ; + - mprj_io_out[25] ( mprj_pads.area2_io_pad\[6\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3942025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[6\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[6\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[6\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[6\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 4000442.5 ) ( 210895 * ) + NEW met2 ( 208635 4000515 ) ( 210895 * ) + NEW met1 ( 209880 4000540 ) ( 210000 * ) + NEW met1 ( 209890 4000605 ) ( 209990 * ) + NEW met1 ( 209940 4000150 ) via_260_860_vh + NEW met1 ( 209880 3999760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3961255 ) ( * 3999620 ) + NEW met1 ( 209880 3961115 ) ( 210000 * ) + NEW met1 ( 209940 3960725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3960430 ) ( 210895 * ) + NEW met2 ( 208635 3960355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3960430 ) ( 209740 * ) + NEW met1 ( 209880 3960335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3939635 ) ( * 3960195 ) + NEW met1 ( 209880 3939495 ) ( 210000 * ) + NEW met1 ( 209940 3939105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3938810 ) ( 210895 * ) + NEW met2 ( 208635 3938735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3938810 ) ( 209740 * ) + NEW met1 ( 209880 3938715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 4000442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[25] ( mprj_pads.area2_io_pad\[6\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3932825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[25] + ( mprj_pads.area2_io_pad\[6\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3929605 ) ( 210895 * ) ; + - mprj_io_oeb[25] ( mprj_pads.area2_io_pad\[6\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3926385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[6\]/IN_H + ( mprj_pads.area2_io_pad\[6\] IN_H ) ; + - mprj_io[35] ( mprj_pads.area2_io_pad\[16\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211490 2279070 ) ( * 4585600 ) + NEW met5 TAPERRULE met5_width_13000 ( 211490 4609480 ) ( * 4974220 ) + NEW met4 TAPERRULE met4_width_540 ( 205060 4608950 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_400 ( 217720 4586550 ) ( * 4608530 ) + NEW met4 TAPERRULE met4_width_470 ( 205060 4586165 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_570 ( 205195 4586550 ) ( * 4608530 ) + NEW met4 ( 211500 4597540 ) via4_12040_22280 + NEW met3 TAPERRULE met3_width_580 ( 204420 4608970 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_16570 ( 225805 4586550 ) ( * 4608530 ) + NEW met3 TAPERRULE met3_width_450 ( 204420 4586175 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_1210 ( 204875 4586550 ) ( * 4608530 ) + NEW met3 ( 211500 4597540 ) via3_12040_22280_hx + NEW met5 TAPERRULE met5_width_13000 ( 211490 2228780 ) ( * 2254410 ) + NEW met4 TAPERRULE met4_width_520 ( 205190 2278530 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_550 ( 217815 2255360 ) ( * 2278120 ) + NEW met4 TAPERRULE met4_width_460 ( 205190 2254980 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_670 ( 205375 2255360 ) ( * 2278120 ) + NEW met4 ( 211625 2266740 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_430 ( 206250 2278485 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16600 ( 225840 2255360 ) ( * 2278120 ) + NEW met3 TAPERRULE met3_width_455 ( 206250 2254982.5 ) ( 233990 * ) + NEW met3 ( 211625 2266740 ) via3_11830_23060_vx + NEW met5 TAPERRULE met5_width_13000 ( 211490 897300 ) ( * 2204120 ) + NEW met4 TAPERRULE met4_width_540 ( 205120 2228250 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_580 ( 217730 2205070 ) ( * 2227830 ) + NEW met4 TAPERRULE met4_width_440 ( 205120 2204700 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_640 ( 205290 2205070 ) ( * 2227830 ) + NEW met4 ( 211525 2216450 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_520 ( 206250 2228240 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16700 ( 225790 2205070 ) ( * 2227830 ) + NEW met3 TAPERRULE met3_width_420 ( 206250 2204710 ) ( 233990 * ) + NEW met3 ( 211525 2216450 ) via3_11830_23060_vx ; + - mprj_io_in[35] ( mprj_pads.area2_io_pad\[16\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1415225 ) ( 210895 * ) ; + - mprj_io_one[35] ( mprj_pads.area2_io_pad\[16\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1409245 ) ( 210895 * ) ; + - mprj_io_slow_sel[35] ( mprj_pads.area2_io_pad\[16\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1406025 ) ( 210895 * ) ; + - mprj_analog_io[28] ( mprj_pads.area2_io_pad\[16\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1402805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[16\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[16\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[106] ( mprj_pads.area2_io_pad\[16\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1396825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[16\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[16\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[35] ( mprj_pads.area2_io_pad\[16\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1390845 ) ( 210895 * ) ; + - mprj_io_dm[105] ( mprj_pads.area2_io_pad\[16\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1387625 ) ( 210895 * ) ; + - mprj_io_analog_pol[35] + ( mprj_pads.area2_io_pad\[16\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1384405 ) ( 210895 * ) ; + - mprj_io_inp_dis[35] ( mprj_pads.area2_io_pad\[16\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1381645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[16\]/ENABLE_H + ( mprj_pads.area2_io_pad\[16\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[16\]/HLD_H_N + ( mprj_pads.area2_io_pad\[16\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[16\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 1371915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1371987.5 ) ( 210220 * ) + NEW met1 ( 210360 1372670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1372810 ) ( * 1411775 ) + NEW met1 ( 210360 1411915 ) ( 210480 * ) + NEW met1 ( 210420 1412005 ) via_260_260_vh + NEW met2 ( 208635 1412075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 1412005 ) ( 210895 * ) + NEW met2 ( 208635 1411935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 1412005 ) ( 210220 * ) + NEW met1 ( 210360 1412095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1412235 ) ( * 1418605 ) + NEW met1 ( 210420 1372280 ) via_260_860_vh + NEW met1 ( 210360 1371890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 1371987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[35] + ( mprj_pads.area2_io_pad\[16\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1369225 ) ( 210895 * ) ; + - mprj_io_dm[107] ( mprj_pads.area2_io_pad\[16\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1366005 ) ( 210895 * ) ; + - mprj_io_holdover[35] ( mprj_pads.area2_io_pad\[16\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1362785 ) ( 210895 * ) ; + - mprj_io_out[35] ( mprj_pads.area2_io_pad\[16\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1360025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[16\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[16\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[16\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[16\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 1418442.5 ) ( 210895 * ) + NEW met2 ( 208635 1418515 ) ( 210895 * ) + NEW met1 ( 209880 1418540 ) ( 210000 * ) + NEW met1 ( 209890 1418605 ) ( 209990 * ) + NEW met1 ( 209940 1418150 ) via_260_860_vh + NEW met1 ( 209880 1417760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1379255 ) ( * 1417620 ) + NEW met1 ( 209880 1379115 ) ( 210000 * ) + NEW met1 ( 209940 1378725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1378430 ) ( 210895 * ) + NEW met2 ( 208635 1378355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1378430 ) ( 209740 * ) + NEW met1 ( 209880 1378335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1357635 ) ( * 1378195 ) + NEW met1 ( 209880 1357495 ) ( 210000 * ) + NEW met1 ( 209940 1357105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1356810 ) ( 210895 * ) + NEW met2 ( 208635 1356735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1356810 ) ( 209740 * ) + NEW met1 ( 209880 1356715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1418442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[35] ( mprj_pads.area2_io_pad\[16\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1350825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[35] + ( mprj_pads.area2_io_pad\[16\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1347605 ) ( 210895 * ) ; + - mprj_io_oeb[35] ( mprj_pads.area2_io_pad\[16\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1344385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[16\]/IN_H + ( mprj_pads.area2_io_pad\[16\] IN_H ) ; + - mprj_io[12] ( mprj_pads.area1_io_pad\[12\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 3873000 ) ( * 3934000 ) ; + - mprj_pads.area1_io_pad\[12\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[12\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[12\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[12\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 3867557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 3868240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3868380 ) ( * 3906745 ) + NEW met1 ( 3378000 3906885 ) ( 3378120 * ) + NEW met1 ( 3378060 3907275 ) via_260_860_vh + NEW met2 ( 3377105 3907645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3907570 ) ( 3379365 * ) + NEW met1 ( 3378000 3907665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3907805 ) ( * 3928365 ) + NEW met1 ( 3378000 3928505 ) ( 3378120 * ) + NEW met1 ( 3378060 3928895 ) via_260_860_vh + NEW met2 ( 3377105 3929265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3929190 ) ( 3379365 * ) + NEW met1 ( 3378000 3929285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3929190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3907570 ) ( 3377860 * ) + NEW met2 ( 3378060 3867850 ) via_260_860_vh ( * 3867460 ) + ( 3378120 * ) + NEW met1 ( 3378010 3867395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 3867557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 3867485 ) ( 3379365 * ) ; + - mprj_io_in[12] ( mprj_pads.area1_io_pad\[12\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3870775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[12\]/HLD_H_N + ( mprj_pads.area1_io_pad\[12\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[12\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3914085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3914012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3914110 ) ( 3377640 * ) + NEW met1 ( 3377580 3913720 ) via_260_860_vh + NEW met1 ( 3377520 3913330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3874225 ) ( * 3913190 ) + NEW met1 ( 3377520 3874085 ) ( 3377640 * ) + NEW met1 ( 3377580 3873995 ) via_260_260_vh + NEW met2 ( 3377105 3874065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 3873995 ) ( 3379365 * ) + NEW met2 ( 3377105 3873925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 3873995 ) ( 3377380 * ) + NEW met1 ( 3377520 3873905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3867395 ) ( * 3873765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3914012.5 ) ( 3377380 * ) ; + - mprj_io_one[12] ( mprj_pads.area1_io_pad\[12\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3876755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[12] ( mprj_pads.area1_io_pad\[12\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3879975 ) ( 3379365 * ) ; + - mprj_analog_io[5] ( mprj_pads.area1_io_pad\[12\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3883195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[12\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[12\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[37] ( mprj_pads.area1_io_pad\[12\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3889175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[12\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[12\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[12] ( mprj_pads.area1_io_pad\[12\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3895155 ) ( 3379365 * ) ; + - mprj_io_dm[36] ( mprj_pads.area1_io_pad\[12\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3898375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[12] + ( mprj_pads.area1_io_pad\[12\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3901595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[12] ( mprj_pads.area1_io_pad\[12\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3904355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[12\]/ENABLE_H + ( mprj_pads.area1_io_pad\[12\] ENABLE_H ) ; + - mprj_io_analog_sel[12] + ( mprj_pads.area1_io_pad\[12\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3916775 ) ( 3379365 * ) ; + - mprj_io_dm[38] ( mprj_pads.area1_io_pad\[12\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3919995 ) ( 3379365 * ) ; + - mprj_io_holdover[12] ( mprj_pads.area1_io_pad\[12\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3923215 ) ( 3379365 * ) ; + - mprj_io_out[12] ( mprj_pads.area1_io_pad\[12\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3925975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[12] ( mprj_pads.area1_io_pad\[12\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3935175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[12] + ( mprj_pads.area1_io_pad\[12\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3938395 ) ( 3379365 * ) ; + - mprj_io_oeb[12] ( mprj_pads.area1_io_pad\[12\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3941615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[12\]/IN_H + ( mprj_pads.area1_io_pad\[12\] IN_H ) ; + - resetb ( resetb_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_37180 ( 702155 36515 ) ( * 90745 ) ; + - xresloop ( resetb_pad PAD_A_ESD_H ) ( resetb_pad TIE_WEAK_HI_H ) + + ROUTED met3 ( 665620 200070 ) ( * 200640 ) + NEW met3 ( 665620 200940 ) ( 719900 * ) + NEW met3 ( 719900 200070 ) ( * 200640 ) ; + - resetb_core_h ( resetb_pad XRES_H_N ) + + ROUTED met2 TAPERRULE met2_width_330 ( 708405 199835 ) ( 708995 * ) ; + - constant_block_0/one ( constant_block_0 one ) + ( resetb_pad ENABLE_VDDIO ) + + ROUTED met3 ( 729275 203720 ) ( 741110 * ) + NEW met3 ( 729275 203720 ) ( 741110 * ) + NEW met3 ( 729275 203735 ) ( 729305 * ) + NEW met3 ( 729580 203720 ) ( 741110 * ) + NEW met2 ( 729210 203800 ) ( 729370 * ) + NEW met2 ( 729220 203835 ) ( 729370 * ) + NEW met2 ( 729210 203585 ) ( 729370 * ) + NEW met2 ( 729290 203720 ) via2_280_280_vx + NEW met2 TAPERRULE met2_width_180 ( 729350 200740 ) ( * 203445 ) + NEW met2 ( 729335 200520 ) via2_300_300_hx + NEW met3 ( 729310 200590 ) ( 729360 * ) + NEW met3 ( 729635 200520 ) ( 729360 * ) + NEW met3 TAPERRULE met3_width_350 ( 729335 200060 ) ( * 200220 ) + NEW met3 ( 729310 200520 ) ( 729035 * ) + NEW met3 ( 729275 203705 ) ( 729305 * ) ; + - xres_vss_loop ( resetb_pad PULLUP_H ) ( resetb_pad FILT_IN_H ) + ( resetb_pad EN_VDDIO_SIG_H ) ( resetb_pad TIE_LO_ESD ) + ( resetb_pad DISABLE_PULLUP_H ) + + ROUTED met2 ( 705110 200495 ) via_260_260_hv + NEW met2 ( 705050 200585 ) ( 705170 * ) + NEW met2 ( 705050 200405 ) ( 705170 * ) + NEW met2 TAPERRULE met2_width_190 ( 705115 200020 ) ( * 200265 ) + NEW met1 TAPERRULE met1_width_190 ( 705310 200495 ) ( 710090 * ) via_260_260_hv + ( * 200585 ) ( 710150 * ) + NEW met2 TAPERRULE met2_width_320 ( 710090 200060 ) ( * 200295 ) + NEW met1 TAPERRULE met1_width_190 ( 710290 200495 ) ( 715470 * ) via_260_260_hv + ( * 200585 ) ( 715530 * ) + NEW met2 ( 715410 200405 ) ( 715530 * ) + NEW met2 TAPERRULE met2_width_160 ( 715470 200050 ) ( * 200265 ) + NEW met1 TAPERRULE met1_width_190 ( 715670 200495 ) ( 717315 * ) via_560_260_hv + ( * 200585 ) ( 717525 * ) + NEW met3 ( 717160 200325 ) ( 717470 * ) + NEW met3 ( 717185 200335 ) ( 717445 * ) + NEW met3 ( 717160 200110 ) ( 717470 * ) + NEW met3 ( 717315 200310 ) via2_560_280_hx + NEW met1 TAPERRULE met1_width_190 ( 717665 200495 ) ( 723145 * ) via_260_260_hv + ( * 200585 ) ( 723205 * ) + NEW met2 ( 723085 200405 ) ( 723205 * ) + NEW met2 TAPERRULE met2_width_210 ( 723155 200020 ) ( * 200265 ) ; + - resetb_pad/TIE_HI_ESD ( resetb_pad TIE_HI_ESD ) ; + - porb_h ( mprj_pads.area1_io_pad\[15\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[16\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[17\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[18\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[0\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[1\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[2\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[3\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[4\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[14\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[5\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[13\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[6\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[12\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[7\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[11\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[8\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[10\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[9\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[9\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[10\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[8\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[11\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[7\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[12\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[13\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[6\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[14\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[5\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[15\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[4\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[16\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[3\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[17\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[2\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[18\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[1\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[0\] ENABLE_VDDA_H ) + ( gpio_pad ENABLE_VDDA_H ) ( gpio_pad ENABLE_H ) + ( flash_io1_pad ENABLE_VDDA_H ) ( flash_io1_pad ENABLE_H ) + ( flash_io0_pad ENABLE_VDDA_H ) ( flash_io0_pad ENABLE_H ) + ( flash_clk_pad ENABLE_VDDA_H ) ( flash_clk_pad ENABLE_H ) + ( flash_csb_pad ENABLE_H ) ( clock_pad ENABLE_VDDA_H ) + ( clock_pad ENABLE_H ) ( flash_csb_pad ENABLE_VDDA_H ) + ( resetb_pad ENABLE_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1541415 208635 ) ( * 210295 ) + NEW met2 TAPERRULE met2_width_280 ( 1540395 210505 ) ( 1541485 * ) + NEW met2 TAPERRULE met2_width_220 ( 1540395 210755 ) ( 1540535 * ) + NEW met2 ( 1540395 211170 ) ( 1540535 * ) + NEW met1 TAPERRULE met1_width_260 ( 1519975 210995 ) ( 1540460 * ) via_260_260_hv + NEW met1 TAPERRULE met1_width_260 ( 1540660 210995 ) ( 1793790 * ) via_260_260_hv + ( * 211130 ) ( 1793865 * ) + NEW met2 TAPERRULE met2_width_180 ( 1793725 210775 ) ( 1793865 * ) + NEW met1 TAPERRULE met1_width_260 ( 1793990 210995 ) ( 1815395 * ) via_260_260_hv + ( * 211085 ) ( 1815485 * ) + NEW met2 ( 1815345 211130 ) ( 1815485 * ) + NEW met2 ( 1815335 210905 ) ( 1815485 * ) + NEW met2 TAPERRULE met2_width_150 ( 1815345 210760 ) ( 1815485 * ) + NEW met1 TAPERRULE met1_width_260 ( 1815595 210995 ) ( 2067750 * ) via_260_260_hv + ( * 211085 ) ( 2067865 * ) + NEW met2 ( 2067725 211130 ) ( 2067865 * ) + NEW met2 ( 2067690 210905 ) ( 2067865 * ) + NEW met2 TAPERRULE met2_width_160 ( 2067725 210755 ) ( 2067865 * ) + NEW met1 TAPERRULE met1_width_260 ( 2067950 210995 ) ( 2089420 * ) via_260_260_hv + NEW met2 ( 2089345 211110 ) ( 2089485 * ) + NEW met2 TAPERRULE met2_width_180 ( 2089345 210775 ) ( 2089485 * ) + NEW met1 TAPERRULE met1_width_260 ( 2089620 210995 ) ( 2341780 * ) via_260_260_hv + ( * 211085 ) ( 2341865 * ) + NEW met2 ( 2341725 211155 ) ( 2341865 * ) + NEW met2 ( 2341720 210905 ) ( 2341865 * ) + NEW met2 TAPERRULE met2_width_160 ( 2341725 210755 ) ( 2341865 * ) + NEW met1 TAPERRULE met1_width_260 ( 2341980 210995 ) ( 2363410 * ) via_260_260_hv + ( * 211105 ) ( 2363485 * ) + NEW met2 TAPERRULE met2_width_205 ( 2363345 210762.5 ) ( 2363485 * ) + NEW met1 TAPERRULE met1_width_260 ( 2363610 210995 ) ( 2615760 * ) via_260_260_hv + ( * 211085 ) ( 2615865 * ) + NEW met2 ( 2615725 211185 ) ( 2615865 * ) + NEW met2 ( 2615700 210905 ) ( 2615865 * ) + NEW met2 TAPERRULE met2_width_195 ( 2615725 210737.5 ) ( 2615865 * ) + NEW met1 TAPERRULE met1_width_260 ( 2615960 210995 ) ( 2637415 * ) via_260_260_hv + NEW met2 ( 2637345 211175 ) ( 2637485 * ) + NEW met2 TAPERRULE met2_width_265 ( 2637345 210732.5 ) ( 2637485 * ) + NEW met1 TAPERRULE met1_width_260 ( 2637615 210995 ) ( 3378600 * ) + NEW met1 TAPERRULE met1_width_260 ( 3378540 211195 ) ( * 566425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 566925 ) ( * 792425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 792925 ) ( * 1017425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1017925 ) ( * 1243425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1243925 ) ( * 1468425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1468925 ) ( * 1693425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1693925 ) ( * 1919425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1919925 ) ( * 2805425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 2805925 ) ( * 3031425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 3031925 ) ( * 3256425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 3256925 ) ( * 3482425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 3482925 ) ( * 3707425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 3707925 ) ( * 3932425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 3932925 ) ( * 4378425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 4378925 ) ( * 4824425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 4824925 ) ( * 4978340 ) + NEW met1 TAPERRULE met1_width_260 ( 3144075 4978540 ) ( 3378600 * ) + NEW met1 ( 3143575 4978540 ) via_860_260_hv ( * 4978630 ) + ( 3143935 * ) + NEW met2 TAPERRULE met2_width_280 ( 3143585 4978770 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_260 ( 2635075 4978540 ) ( 3143075 * ) + NEW met1 ( 2634575 4978540 ) via_860_260_hv ( * 4978630 ) + ( 2634935 * ) + NEW met2 TAPERRULE met2_width_280 ( 2634585 4978770 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_260 ( 2378075 4978540 ) ( 2634075 * ) + NEW met1 ( 2377575 4978540 ) via_860_260_hv ( * 4978630 ) + ( 2377935 * ) + NEW met2 TAPERRULE met2_width_280 ( 2377585 4978770 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_260 ( 1933075 4978540 ) ( 2377075 * ) + NEW met1 ( 1932575 4978540 ) via_860_260_hv ( * 4978630 ) + ( 1932935 * ) + NEW met2 TAPERRULE met2_width_280 ( 1932585 4978770 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_260 ( 1424075 4978540 ) ( 1932075 * ) + NEW met1 ( 1423575 4978540 ) via_860_260_hv ( * 4978630 ) + ( 1423935 * ) + NEW met2 TAPERRULE met2_width_280 ( 1423585 4978770 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_260 ( 1166075 4978540 ) ( 1423075 * ) + NEW met1 ( 1165575 4978540 ) via_860_260_hv ( * 4978630 ) + ( 1165935 * ) + NEW met2 TAPERRULE met2_width_280 ( 1165585 4978770 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_260 ( 909075 4978540 ) ( 1165075 * ) + NEW met1 ( 908575 4978540 ) via_860_260_hv ( * 4978630 ) + ( 908935 * ) + NEW met2 TAPERRULE met2_width_280 ( 908585 4978770 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_260 ( 652075 4978540 ) ( 908075 * ) + NEW met1 ( 651575 4978540 ) via_860_260_hv ( * 4978630 ) + ( 651935 * ) + NEW met2 TAPERRULE met2_width_280 ( 651585 4978770 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_260 ( 395075 4978540 ) ( 651075 * ) + NEW met1 ( 394575 4978540 ) via_860_260_hv ( * 4978630 ) + ( 394935 * ) + NEW met2 TAPERRULE met2_width_280 ( 394585 4978770 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_260 ( 209400 4978540 ) ( 394075 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 4785075 ) ( * 4978340 ) + NEW met1 ( 209460 4784575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 4784585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 4784585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 3936075 ) ( * 4784075 ) + NEW met1 ( 209460 3935575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 3935585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3935585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 3720075 ) ( * 3935075 ) + NEW met1 ( 209460 3719575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 3719585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3719585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 3504075 ) ( * 3719075 ) + NEW met1 ( 209460 3503575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 3503585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3503585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 3288075 ) ( * 3503075 ) + NEW met1 ( 209460 3287575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 3287585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3287585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 3072075 ) ( * 3287075 ) + NEW met1 ( 209460 3071575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 3071585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3071585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 2856075 ) ( * 3071075 ) + NEW met1 ( 209460 2855575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 2855585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 2855585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 2640075 ) ( * 2855075 ) + NEW met1 ( 209460 2639575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 2639585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 2639585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 2002075 ) ( * 2639075 ) + NEW met1 ( 209460 2001575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 2001585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 2001585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 1786075 ) ( * 2001075 ) + NEW met1 ( 209460 1785575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 1785585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 1785585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 1570075 ) ( * 1785075 ) + NEW met1 ( 209460 1569575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 1569585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 1569585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 1354075 ) ( * 1569075 ) + NEW met1 ( 209460 1353575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 1353585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 1353585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 1138075 ) ( * 1353075 ) + NEW met1 ( 209460 1137575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 1137585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 1137585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 922075 ) ( * 1137075 ) + NEW met1 ( 209460 921575 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_280 ( 209660 921585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 921585 ) ( 209260 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 211195 ) ( * 921075 ) + NEW met1 TAPERRULE met1_width_260 ( 209400 210995 ) ( 725605 * ) via_860_260_hv + ( * 211085 ) ( 725965 * ) + NEW met2 ( 725245 210905 ) ( 725965 * ) + NEW met2 TAPERRULE met2_width_150 ( 725605 200020 ) ( * 210765 ) + NEW met1 TAPERRULE met1_width_260 ( 726105 210995 ) ( 976770 * ) via_260_260_hv + ( * 211085 ) ( 976865 * ) + NEW met2 ( 976725 211140 ) ( 976865 * ) + NEW met2 ( 976710 210905 ) ( 976865 * ) + NEW met2 TAPERRULE met2_width_150 ( 976725 210760 ) ( 976865 * ) + NEW met1 TAPERRULE met1_width_260 ( 976970 210995 ) ( 998395 * ) via_260_260_hv + ( * 211085 ) ( 998485 * ) + NEW met2 ( 998345 211145 ) ( 998485 * ) + NEW met2 ( 998335 210905 ) ( 998485 * ) + NEW met2 TAPERRULE met2_width_150 ( 998345 210760 ) ( 998485 * ) + NEW met1 TAPERRULE met1_width_260 ( 998595 210995 ) ( 1519775 * ) via_260_260_hv + ( * 211085 ) ( 1519865 * ) + NEW met2 ( 1519725 211130 ) ( 1519865 * ) + NEW met2 ( 1519715 210905 ) ( 1519865 * ) + NEW met2 TAPERRULE met2_width_150 ( 1519725 210760 ) ( 1519865 * ) + NEW met2 ( 394215 4978450 ) ( 394935 * ) + NEW met2 TAPERRULE met2_width_280 ( 394585 4977105 ) ( * 4978310 ) + NEW met2 ( 651215 4978450 ) ( 651935 * ) + NEW met2 TAPERRULE met2_width_280 ( 651585 4977105 ) ( * 4978310 ) + NEW met2 ( 908215 4978450 ) ( 908935 * ) + NEW met2 TAPERRULE met2_width_280 ( 908585 4977105 ) ( * 4978310 ) + NEW met2 ( 1165215 4978450 ) ( 1165935 * ) + NEW met2 TAPERRULE met2_width_280 ( 1165585 4977105 ) ( * 4978310 ) + NEW met2 ( 1423215 4978450 ) ( 1423935 * ) + NEW met2 TAPERRULE met2_width_280 ( 1423585 4977105 ) ( * 4978310 ) + NEW met2 ( 1932215 4978450 ) ( 1932935 * ) + NEW met2 TAPERRULE met2_width_280 ( 1932585 4977105 ) ( * 4978310 ) + NEW met2 ( 2377215 4978450 ) ( 2377935 * ) + NEW met2 TAPERRULE met2_width_280 ( 2377585 4977105 ) ( * 4978310 ) + NEW met2 ( 2634215 4978450 ) ( 2634935 * ) + NEW met2 TAPERRULE met2_width_280 ( 2634585 4977105 ) ( * 4978310 ) + NEW met2 ( 3143215 4978450 ) ( 3143935 * ) + NEW met2 TAPERRULE met2_width_280 ( 3143585 4977105 ) ( * 4978310 ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 4824415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 4824415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 4378415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 4378415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3932415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 3932415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3707415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 3707415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3482415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 3482415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3256415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 3256415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3031415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 3031415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 2805415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 2805415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1919415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1919415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1693415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1693415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1468415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1468415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1243415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1243415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1017415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1017415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 792415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 792415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 566415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 566415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 1541415 210715 ) ( * 210895 ) ; + - resetb_pad/INP_SEL_H ( resetb_pad INP_SEL_H ) ; + - mprj_io[8] ( mprj_pads.area1_io_pad\[8\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 2972000 ) ( * 3033000 ) ; + - mprj_pads.area1_io_pad\[8\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[8\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[8\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[8\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 2966557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 2967240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 2967380 ) ( * 3005745 ) + NEW met1 ( 3378000 3005885 ) ( 3378120 * ) + NEW met1 ( 3378060 3006275 ) via_260_860_vh + NEW met2 ( 3377105 3006645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3006570 ) ( 3379365 * ) + NEW met1 ( 3378000 3006665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3006805 ) ( * 3027365 ) + NEW met1 ( 3378000 3027505 ) ( 3378120 * ) + NEW met1 ( 3378060 3027895 ) via_260_860_vh + NEW met2 ( 3377105 3028265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3028190 ) ( 3379365 * ) + NEW met1 ( 3378000 3028285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3028190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3006570 ) ( 3377860 * ) + NEW met2 ( 3378060 2966850 ) via_260_860_vh ( * 2966460 ) + ( 3378120 * ) + NEW met1 ( 3378010 2966395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 2966557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 2966485 ) ( 3379365 * ) ; + - mprj_io_in[8] ( mprj_pads.area1_io_pad\[8\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2969775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[8\]/HLD_H_N + ( mprj_pads.area1_io_pad\[8\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[8\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3013085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3013012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3013110 ) ( 3377640 * ) + NEW met1 ( 3377580 3012720 ) via_260_860_vh + NEW met1 ( 3377520 3012330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 2973225 ) ( * 3012190 ) + NEW met1 ( 3377520 2973085 ) ( 3377640 * ) + NEW met1 ( 3377580 2972995 ) via_260_260_vh + NEW met2 ( 3377105 2973065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 2972995 ) ( 3379365 * ) + NEW met2 ( 3377105 2972925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 2972995 ) ( 3377380 * ) + NEW met1 ( 3377520 2972905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 2966395 ) ( * 2972765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3013012.5 ) ( 3377380 * ) ; + - mprj_io_one[8] ( mprj_pads.area1_io_pad\[8\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2975755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[8] ( mprj_pads.area1_io_pad\[8\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2978975 ) ( 3379365 * ) ; + - mprj_analog_io[1] ( mprj_pads.area1_io_pad\[8\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2982195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[8\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[8\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[25] ( mprj_pads.area1_io_pad\[8\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2988175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[8\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[8\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[8] ( mprj_pads.area1_io_pad\[8\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2994155 ) ( 3379365 * ) ; + - mprj_io_dm[24] ( mprj_pads.area1_io_pad\[8\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2997375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[8] ( mprj_pads.area1_io_pad\[8\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3000595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[8] ( mprj_pads.area1_io_pad\[8\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3003355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[8\]/ENABLE_H + ( mprj_pads.area1_io_pad\[8\] ENABLE_H ) ; + - mprj_io_analog_sel[8] ( mprj_pads.area1_io_pad\[8\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3015775 ) ( 3379365 * ) ; + - mprj_io_dm[26] ( mprj_pads.area1_io_pad\[8\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3018995 ) ( 3379365 * ) ; + - mprj_io_holdover[8] ( mprj_pads.area1_io_pad\[8\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3022215 ) ( 3379365 * ) ; + - mprj_io_out[8] ( mprj_pads.area1_io_pad\[8\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3024975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[8] ( mprj_pads.area1_io_pad\[8\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3034175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[8] + ( mprj_pads.area1_io_pad\[8\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3037395 ) ( 3379365 * ) ; + - mprj_io_oeb[8] ( mprj_pads.area1_io_pad\[8\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3040615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[8\]/IN_H + ( mprj_pads.area1_io_pad\[8\] IN_H ) ; + - mprj_io[27] ( mprj_pads.area2_io_pad\[8\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 2348200 ) ( * 4538150 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562410 ) ( * 4588310 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4612670 ) ( * 4962770 ) + NEW met4 TAPERRULE met4_width_560 ( 3370200 4612150 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_600 ( 3382780 4589260 ) ( * 4611720 ) + NEW met4 TAPERRULE met4_width_530 ( 3370200 4588845 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589260 ) ( * 4611720 ) + NEW met4 ( 3376580 4600490 ) via4_11800_22760 + NEW met3 TAPERRULE met3_width_630 ( 3354010 4612185 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1140 ( 3383050 4589260 ) ( * 4611720 ) + NEW met3 TAPERRULE met3_width_610 ( 3354010 4588805 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16820 ( 3362270 4589260 ) ( * 4611720 ) + NEW met3 ( 3376580 4600490 ) via3_11800_22760_hx + NEW met4 TAPERRULE met4_width_590 ( 3370230 4561905 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_590 ( 3382815 4539100 ) ( * 4561460 ) + NEW met4 TAPERRULE met4_width_600 ( 3370230 4538650 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_770 ( 3370465 4539100 ) ( * 4561460 ) + NEW met4 ( 3376685 4550280 ) via4_11670_22660 + NEW met3 TAPERRULE met3_width_635 ( 3354010 4561927.5 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1100 ( 3383070 4539100 ) ( * 4561460 ) + NEW met3 TAPERRULE met3_width_650 ( 3354010 4538625 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16990 ( 3362355 4539100 ) ( * 4561460 ) + NEW met3 ( 3376685 4550280 ) via3_11670_22660_hx + NEW met5 TAPERRULE met5_width_13000 ( 3376600 476580 ) ( * 2324490 ) + NEW met4 TAPERRULE met4_width_550 ( 3370270 2347675 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_530 ( 3382825 2325440 ) ( * 2347250 ) + NEW met4 TAPERRULE met4_width_520 ( 3370270 2325030 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370420 2325440 ) ( * 2347250 ) + NEW met4 ( 3376640 2336345 ) via4_11840_22110 + NEW met3 TAPERRULE met3_width_600 ( 3354120 2347700 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_1830 ( 3383475 2325440 ) ( * 2347250 ) + NEW met3 TAPERRULE met3_width_545 ( 3354120 2325017.5 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_16750 ( 3362345 2325440 ) ( * 2347250 ) + NEW met3 ( 3376640 2336345 ) via3_11840_22110_hx ; + - mprj_io_in[27] ( mprj_pads.area2_io_pad\[8\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3565225 ) ( 210895 * ) ; + - mprj_io_one[27] ( mprj_pads.area2_io_pad\[8\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3559245 ) ( 210895 * ) ; + - mprj_io_slow_sel[27] ( mprj_pads.area2_io_pad\[8\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3556025 ) ( 210895 * ) ; + - mprj_analog_io[20] ( mprj_pads.area2_io_pad\[8\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3552805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[8\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[8\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[82] ( mprj_pads.area2_io_pad\[8\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3546825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[8\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[8\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[27] ( mprj_pads.area2_io_pad\[8\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3540845 ) ( 210895 * ) ; + - mprj_io_dm[81] ( mprj_pads.area2_io_pad\[8\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3537625 ) ( 210895 * ) ; + - mprj_io_analog_pol[27] ( mprj_pads.area2_io_pad\[8\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3534405 ) ( 210895 * ) ; + - mprj_io_inp_dis[27] ( mprj_pads.area2_io_pad\[8\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3531645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[8\]/ENABLE_H + ( mprj_pads.area2_io_pad\[8\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[8\]/HLD_H_N + ( mprj_pads.area2_io_pad\[8\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[8\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3521915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3521987.5 ) ( 210220 * ) + NEW met1 ( 210360 3522670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3522810 ) ( * 3561775 ) + NEW met1 ( 210360 3561915 ) ( 210480 * ) + NEW met1 ( 210420 3562005 ) via_260_260_vh + NEW met2 ( 208635 3562075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3562005 ) ( 210895 * ) + NEW met2 ( 208635 3561935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3562005 ) ( 210220 * ) + NEW met1 ( 210360 3562095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3562235 ) ( * 3568605 ) + NEW met1 ( 210420 3522280 ) via_260_860_vh + NEW met1 ( 210360 3521890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3521987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[27] ( mprj_pads.area2_io_pad\[8\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3519225 ) ( 210895 * ) ; + - mprj_io_dm[83] ( mprj_pads.area2_io_pad\[8\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3516005 ) ( 210895 * ) ; + - mprj_io_holdover[27] ( mprj_pads.area2_io_pad\[8\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3512785 ) ( 210895 * ) ; + - mprj_io_out[27] ( mprj_pads.area2_io_pad\[8\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3510025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[8\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[8\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[8\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[8\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 3568442.5 ) ( 210895 * ) + NEW met2 ( 208635 3568515 ) ( 210895 * ) + NEW met1 ( 209880 3568540 ) ( 210000 * ) + NEW met1 ( 209890 3568605 ) ( 209990 * ) + NEW met1 ( 209940 3568150 ) via_260_860_vh + NEW met1 ( 209880 3567760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3529255 ) ( * 3567620 ) + NEW met1 ( 209880 3529115 ) ( 210000 * ) + NEW met1 ( 209940 3528725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3528430 ) ( 210895 * ) + NEW met2 ( 208635 3528355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3528430 ) ( 209740 * ) + NEW met1 ( 209880 3528335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3507635 ) ( * 3528195 ) + NEW met1 ( 209880 3507495 ) ( 210000 * ) + NEW met1 ( 209940 3507105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3506810 ) ( 210895 * ) + NEW met2 ( 208635 3506735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3506810 ) ( 209740 * ) + NEW met1 ( 209880 3506715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3568442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[27] ( mprj_pads.area2_io_pad\[8\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3500825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[27] + ( mprj_pads.area2_io_pad\[8\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3497605 ) ( 210895 * ) ; + - mprj_io_oeb[27] ( mprj_pads.area2_io_pad\[8\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3494385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[8\]/IN_H + ( mprj_pads.area2_io_pad\[8\] IN_H ) ; + - mprj_io[37] ( mprj_pads.area2_io_pad\[18\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211490 2279070 ) ( * 4585600 ) + NEW met5 TAPERRULE met5_width_13000 ( 211490 4609480 ) ( * 4974220 ) + NEW met4 TAPERRULE met4_width_540 ( 205060 4608950 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_400 ( 217720 4586550 ) ( * 4608530 ) + NEW met4 TAPERRULE met4_width_470 ( 205060 4586165 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_570 ( 205195 4586550 ) ( * 4608530 ) + NEW met4 ( 211500 4597540 ) via4_12040_22280 + NEW met3 TAPERRULE met3_width_580 ( 204420 4608970 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_16570 ( 225805 4586550 ) ( * 4608530 ) + NEW met3 TAPERRULE met3_width_450 ( 204420 4586175 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_1210 ( 204875 4586550 ) ( * 4608530 ) + NEW met3 ( 211500 4597540 ) via3_12040_22280_hx + NEW met5 TAPERRULE met5_width_13000 ( 211490 2228780 ) ( * 2254410 ) + NEW met4 TAPERRULE met4_width_520 ( 205190 2278530 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_550 ( 217815 2255360 ) ( * 2278120 ) + NEW met4 TAPERRULE met4_width_460 ( 205190 2254980 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_670 ( 205375 2255360 ) ( * 2278120 ) + NEW met4 ( 211625 2266740 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_430 ( 206250 2278485 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16600 ( 225840 2255360 ) ( * 2278120 ) + NEW met3 TAPERRULE met3_width_455 ( 206250 2254982.5 ) ( 233990 * ) + NEW met3 ( 211625 2266740 ) via3_11830_23060_vx + NEW met5 TAPERRULE met5_width_13000 ( 211490 897300 ) ( * 2204120 ) + NEW met4 TAPERRULE met4_width_540 ( 205120 2228250 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_580 ( 217730 2205070 ) ( * 2227830 ) + NEW met4 TAPERRULE met4_width_440 ( 205120 2204700 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_640 ( 205290 2205070 ) ( * 2227830 ) + NEW met4 ( 211525 2216450 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_520 ( 206250 2228240 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16700 ( 225790 2205070 ) ( * 2227830 ) + NEW met3 TAPERRULE met3_width_420 ( 206250 2204710 ) ( 233990 * ) + NEW met3 ( 211525 2216450 ) via3_11830_23060_vx ; + - mprj_io_in[37] ( mprj_pads.area2_io_pad\[18\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 983225 ) ( 210895 * ) ; + - mprj_io_one[37] ( mprj_pads.area2_io_pad\[18\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 977245 ) ( 210895 * ) ; + - mprj_io_slow_sel[37] ( mprj_pads.area2_io_pad\[18\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 974025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[18\]/PAD_A_ESD_0_H + ( mprj_pads.area2_io_pad\[18\] PAD_A_ESD_0_H ) ; + - mprj_pads.area2_io_pad\[18\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[18\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[112] ( mprj_pads.area2_io_pad\[18\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 964825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[18\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[18\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[37] ( mprj_pads.area2_io_pad\[18\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 958845 ) ( 210895 * ) ; + - mprj_io_dm[111] ( mprj_pads.area2_io_pad\[18\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 955625 ) ( 210895 * ) ; + - mprj_io_analog_pol[37] + ( mprj_pads.area2_io_pad\[18\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 952405 ) ( 210895 * ) ; + - mprj_io_inp_dis[37] ( mprj_pads.area2_io_pad\[18\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 949645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[18\]/ENABLE_H + ( mprj_pads.area2_io_pad\[18\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[18\]/HLD_H_N + ( mprj_pads.area2_io_pad\[18\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[18\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 939915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 939987.5 ) ( 210220 * ) + NEW met1 ( 210360 940670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 940810 ) ( * 979775 ) + NEW met1 ( 210360 979915 ) ( 210480 * ) + NEW met1 ( 210420 980005 ) via_260_260_vh + NEW met2 ( 208635 980075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 980005 ) ( 210895 * ) + NEW met2 ( 208635 979935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 980005 ) ( 210220 * ) + NEW met1 ( 210360 980095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 980235 ) ( * 986605 ) + NEW met1 ( 210420 940280 ) via_260_860_vh + NEW met1 ( 210360 939890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 939987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[37] + ( mprj_pads.area2_io_pad\[18\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 937225 ) ( 210895 * ) ; + - mprj_io_dm[113] ( mprj_pads.area2_io_pad\[18\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 934005 ) ( 210895 * ) ; + - mprj_io_holdover[37] ( mprj_pads.area2_io_pad\[18\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 930785 ) ( 210895 * ) ; + - mprj_io_out[37] ( mprj_pads.area2_io_pad\[18\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 928025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[18\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[18\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[18\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[18\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 986442.5 ) ( 210895 * ) + NEW met2 ( 208635 986515 ) ( 210895 * ) + NEW met1 ( 209880 986540 ) ( 210000 * ) + NEW met1 ( 209890 986605 ) ( 209990 * ) + NEW met1 ( 209940 986150 ) via_260_860_vh + NEW met1 ( 209880 985760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 947255 ) ( * 985620 ) + NEW met1 ( 209880 947115 ) ( 210000 * ) + NEW met1 ( 209940 946725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 946430 ) ( 210895 * ) + NEW met2 ( 208635 946355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 946430 ) ( 209740 * ) + NEW met1 ( 209880 946335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 925635 ) ( * 946195 ) + NEW met1 ( 209880 925495 ) ( 210000 * ) + NEW met1 ( 209940 925105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 924810 ) ( 210895 * ) + NEW met2 ( 208635 924735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 924810 ) ( 209740 * ) + NEW met1 ( 209880 924715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 986442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[37] ( mprj_pads.area2_io_pad\[18\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 918825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[37] + ( mprj_pads.area2_io_pad\[18\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 915605 ) ( 210895 * ) ; + - mprj_io_oeb[37] ( mprj_pads.area2_io_pad\[18\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 912385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[18\]/IN_H + ( mprj_pads.area2_io_pad\[18\] IN_H ) ; + - mprj_io[14] ( mprj_pads.area1_io_pad\[14\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 4765000 ) ( * 4826000 ) ; + - mprj_pads.area1_io_pad\[14\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[14\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[14\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[14\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 4759557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 4760240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 4760380 ) ( * 4798745 ) + NEW met1 ( 3378000 4798885 ) ( 3378120 * ) + NEW met1 ( 3378060 4799275 ) via_260_860_vh + NEW met2 ( 3377105 4799645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 4799570 ) ( 3379365 * ) + NEW met1 ( 3378000 4799665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 4799805 ) ( * 4820365 ) + NEW met1 ( 3378000 4820505 ) ( 3378120 * ) + NEW met1 ( 3378060 4820895 ) via_260_860_vh + NEW met2 ( 3377105 4821265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 4821190 ) ( 3379365 * ) + NEW met1 ( 3378000 4821285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 4821190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 4799570 ) ( 3377860 * ) + NEW met2 ( 3378060 4759850 ) via_260_860_vh ( * 4759460 ) + ( 3378120 * ) + NEW met1 ( 3378010 4759395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 4759557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 4759485 ) ( 3379365 * ) ; + - mprj_io_in[14] ( mprj_pads.area1_io_pad\[14\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4762775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[14\]/HLD_H_N + ( mprj_pads.area1_io_pad\[14\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[14\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 4806085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 4806012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 4806110 ) ( 3377640 * ) + NEW met1 ( 3377580 4805720 ) via_260_860_vh + NEW met1 ( 3377520 4805330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 4766225 ) ( * 4805190 ) + NEW met1 ( 3377520 4766085 ) ( 3377640 * ) + NEW met1 ( 3377580 4765995 ) via_260_260_vh + NEW met2 ( 3377105 4766065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 4765995 ) ( 3379365 * ) + NEW met2 ( 3377105 4765925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 4765995 ) ( 3377380 * ) + NEW met1 ( 3377520 4765905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 4759395 ) ( * 4765765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 4806012.5 ) ( 3377380 * ) ; + - mprj_io_one[14] ( mprj_pads.area1_io_pad\[14\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4768755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[14] ( mprj_pads.area1_io_pad\[14\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4771975 ) ( 3379365 * ) ; + - mprj_analog_io[7] ( mprj_pads.area1_io_pad\[14\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4775195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[14\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[14\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[43] ( mprj_pads.area1_io_pad\[14\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4781175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[14\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[14\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[14] ( mprj_pads.area1_io_pad\[14\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4787155 ) ( 3379365 * ) ; + - mprj_io_dm[42] ( mprj_pads.area1_io_pad\[14\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4790375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[14] + ( mprj_pads.area1_io_pad\[14\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4793595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[14] ( mprj_pads.area1_io_pad\[14\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4796355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[14\]/ENABLE_H + ( mprj_pads.area1_io_pad\[14\] ENABLE_H ) ; + - mprj_io_analog_sel[14] + ( mprj_pads.area1_io_pad\[14\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4808775 ) ( 3379365 * ) ; + - mprj_io_dm[44] ( mprj_pads.area1_io_pad\[14\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4811995 ) ( 3379365 * ) ; + - mprj_io_holdover[14] ( mprj_pads.area1_io_pad\[14\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4815215 ) ( 3379365 * ) ; + - mprj_io_out[14] ( mprj_pads.area1_io_pad\[14\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4817975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[14] ( mprj_pads.area1_io_pad\[14\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4827175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[14] + ( mprj_pads.area1_io_pad\[14\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4830395 ) ( 3379365 * ) ; + - mprj_io_oeb[14] ( mprj_pads.area1_io_pad\[14\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4833615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[14\]/IN_H + ( mprj_pads.area1_io_pad\[14\] IN_H ) ; + - vssa1_pad2 ( user1_vssa_hvclamp_pad\[1\] VSSA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3523530 2085910 ) ( * 2145150 ) ; + - gpio_pad/VSSIO ( gpio_pad VSSIO ) ( FILLER_167 VSSIO ) + ( FILLER_168 VSSIO ) ( FILLER_169 VSSIO ) ( FILLER_166 VSSIO ) + ( FILLER_165 VSSIO ) ( FILLER_164 VSSIO ) ( FILLER_163 VSSIO ) + ( FILLER_162 VSSIO ) ( FILLER_161 VSSIO ) ( FILLER_160 VSSIO ) + ( FILLER_159 VSSIO ) ( FILLER_158 VSSIO ) ( FILLER_157 VSSIO ) + ( FILLER_153 VSSIO ) ( mprj_pads.area1_io_pad\[15\] VSSIO ) + ( FILLER_154 VSSIO ) ( FILLER_155 VSSIO ) ( FILLER_149 VSSIO ) + ( FILLER_152 VSSIO ) ( FILLER_151 VSSIO ) ( FILLER_150 VSSIO ) + ( FILLER_145 VSSIO ) ( FILLER_148 VSSIO ) ( FILLER_147 VSSIO ) + ( FILLER_146 VSSIO ) ( FILLER_144 VSSIO ) ( FILLER_137 VSSIO ) + ( user1_vssa_hvclamp_pad\[0\] VSSIO ) ( FILLER_140 VSSIO ) + ( FILLER_141 VSSIO ) ( FILLER_142 VSSIO ) ( FILLER_139 VSSIO ) + ( FILLER_138 VSSIO ) ( FILLER_134 VSSIO ) ( FILLER_136 VSSIO ) + ( FILLER_135 VSSIO ) ( FILLER_131 VSSIO ) ( FILLER_133 VSSIO ) + ( FILLER_132 VSSIO ) ( FILLER_127 VSSIO ) ( FILLER_128 VSSIO ) + ( FILLER_129 VSSIO ) ( mprj_pads.area1_io_pad\[16\] VSSIO ) + ( FILLER_123 VSSIO ) ( FILLER_126 VSSIO ) ( FILLER_125 VSSIO ) + ( FILLER_124 VSSIO ) ( FILLER_122 VSSIO ) ( FILLER_121 VSSIO ) + ( FILLER_120 VSSIO ) ( FILLER_119 VSSIO ) + ( mprj_pads.area1_io_pad\[17\] VSSIO ) ( FILLER_118 VSSIO ) + ( FILLER_116 VSSIO ) ( FILLER_115 VSSIO ) ( FILLER_114 VSSIO ) + ( FILLER_113 VSSIO ) ( FILLER_112 VSSIO ) ( FILLER_111 VSSIO ) + ( FILLER_110 VSSIO ) ( FILLER_109 VSSIO ) ( FILLER_108 VSSIO ) + ( FILLER_107 VSSIO ) ( FILLER_106 VSSIO ) ( FILLER_105 VSSIO ) + ( FILLER_104 VSSIO ) ( FILLER_102 VSSIO ) ( FILLER_103 VSSIO ) + ( FILLER_98 VSSIO ) ( FILLER_101 VSSIO ) ( FILLER_100 VSSIO ) + ( FILLER_99 VSSIO ) ( FILLER_94 VSSIO ) + ( mprj_pads.area1_io_pad\[18\] VSSIO ) ( FILLER_95 VSSIO ) + ( FILLER_96 VSSIO ) ( FILLER_93 VSSIO ) ( FILLER_92 VSSIO ) + ( FILLER_91 VSSIO ) ( FILLER_90 VSSIO ) ( FILLER_89 VSSIO ) + ( FILLER_88 VSSIO ) ( FILLER_86 VSSIO ) ( FILLER_87 VSSIO ) + ( FILLER_SB3 VSSIO ) ( disconnect_vdda_0 VSSIO ) + ( FILLER_78 VSSIO ) ( mgmt_vssio_hvclamp_pad\[1\] VSSIO ) + ( FILLER_80 VSSIO ) ( FILLER_81 VSSIO ) ( FILLER_82 VSSIO ) + ( FILLER_79 VSSIO ) ( FILLER_75 VSSIO ) ( FILLER_77 VSSIO ) + ( FILLER_76 VSSIO ) ( FILLER_71 VSSIO ) ( FILLER_74 VSSIO ) + ( FILLER_73 VSSIO ) ( FILLER_72 VSSIO ) ( FILLER_63 VSSIO ) + ( FILLER_68 VSSIO ) ( FILLER_69 VSSIO ) + ( mprj_pads.area2_io_pad\[0\] VSSIO ) ( FILLER_66 VSSIO ) + ( FILLER_67 VSSIO ) ( FILLER_65 VSSIO ) ( FILLER_64 VSSIO ) + ( FILLER_59 VSSIO ) ( FILLER_62 VSSIO ) ( FILLER_61 VSSIO ) + ( FILLER_60 VSSIO ) ( FILLER_57 VSSIO ) ( FILLER_58 VSSIO ) + ( FILLER_53 VSSIO ) ( FILLER_54 VSSIO ) ( FILLER_55 VSSIO ) + ( mprj_pads.area2_io_pad\[1\] VSSIO ) ( FILLER_48 VSSIO ) + ( FILLER_52 VSSIO ) ( FILLER_51 VSSIO ) ( FILLER_50 VSSIO ) + ( FILLER_49 VSSIO ) ( FILLER_46 VSSIO ) ( FILLER_47 VSSIO ) + ( FILLER_44 VSSIO ) ( FILLER_45 VSSIO ) ( FILLER_38 VSSIO ) + ( FILLER_41 VSSIO ) ( FILLER_42 VSSIO ) + ( mprj_pads.area2_io_pad\[2\] VSSIO ) ( FILLER_40 VSSIO ) + ( FILLER_39 VSSIO ) ( FILLER_35 VSSIO ) ( FILLER_37 VSSIO ) + ( FILLER_36 VSSIO ) ( FILLER_31 VSSIO ) ( FILLER_34 VSSIO ) + ( FILLER_33 VSSIO ) ( FILLER_32 VSSIO ) ( FILLER_28 VSSIO ) + ( mprj_pads.area2_io_pad\[3\] VSSIO ) ( FILLER_29 VSSIO ) + ( FILLER_26 VSSIO ) ( FILLER_27 VSSIO ) ( FILLER_25 VSSIO ) + ( FILLER_24 VSSIO ) ( FILLER_23 VSSIO ) ( FILLER_22 VSSIO ) + ( FILLER_21 VSSIO ) ( FILLER_20 VSSIO ) ( FILLER_19 VSSIO ) + ( FILLER_18 VSSIO ) ( FILLER_14 VSSIO ) ( FILLER_15 VSSIO ) + ( FILLER_16 VSSIO ) ( mprj_pads.area2_io_pad\[4\] VSSIO ) + ( FILLER_10 VSSIO ) ( FILLER_13 VSSIO ) ( FILLER_12 VSSIO ) + ( FILLER_11 VSSIO ) ( FILLER_6 VSSIO ) ( FILLER_9 VSSIO ) + ( FILLER_8 VSSIO ) ( FILLER_7 VSSIO ) ( FILLER_5 VSSIO ) + ( user2_corner VSSIO ) ( user1_corner VSSIO ) + ( FILLER_603 VSSIO ) ( FILLER_604 VSSIO ) ( FILLER_601 VSSIO ) + ( FILLER_810 VSSIO ) ( FILLER_811 VSSIO ) ( FILLER_602 VSSIO ) + ( FILLER_809 VSSIO ) ( FILLER_596 VSSIO ) ( FILLER_600 VSSIO ) + ( FILLER_808 VSSIO ) ( FILLER_599 VSSIO ) ( FILLER_807 VSSIO ) + ( FILLER_598 VSSIO ) ( FILLER_806 VSSIO ) ( FILLER_597 VSSIO ) + ( FILLER_805 VSSIO ) ( FILLER_804 VSSIO ) ( FILLER_595 VSSIO ) + ( mprj_pads.area1_io_pad\[14\] VSSIO ) ( FILLER_803 VSSIO ) + ( mprj_pads.area2_io_pad\[5\] VSSIO ) ( FILLER_593 VSSIO ) + ( FILLER_592 VSSIO ) ( FILLER_801 VSSIO ) ( FILLER_591 VSSIO ) + ( FILLER_800 VSSIO ) ( FILLER_590 VSSIO ) ( FILLER_799 VSSIO ) + ( FILLER_798 VSSIO ) ( FILLER_589 VSSIO ) ( FILLER_797 VSSIO ) + ( FILLER_588 VSSIO ) ( FILLER_796 VSSIO ) ( FILLER_587 VSSIO ) + ( FILLER_586 VSSIO ) ( FILLER_585 VSSIO ) ( FILLER_794 VSSIO ) + ( FILLER_795 VSSIO ) ( FILLER_791 VSSIO ) + ( user2_vccd_lvclamp_pad VSSIO ) ( FILLER_583 VSSIO ) + ( FILLER_582 VSSIO ) ( FILLER_581 VSSIO ) ( FILLER_792 VSSIO ) + ( user1_vccd_lvclamp_pad VSSIO ) ( FILLER_580 VSSIO ) + ( FILLER_576 VSSIO ) ( FILLER_790 VSSIO ) ( FILLER_579 VSSIO ) + ( FILLER_789 VSSIO ) ( FILLER_578 VSSIO ) ( FILLER_788 VSSIO ) + ( FILLER_577 VSSIO ) ( FILLER_787 VSSIO ) ( FILLER_786 VSSIO ) + ( FILLER_575 VSSIO ) ( FILLER_785 VSSIO ) ( FILLER_570 VSSIO ) + ( FILLER_784 VSSIO ) ( mgmt_vddio_hvclamp_pad\[1\] VSSIO ) + ( FILLER_573 VSSIO ) ( FILLER_572 VSSIO ) ( FILLER_571 VSSIO ) + ( mprj_pads.area1_io_pad\[13\] VSSIO ) ( FILLER_782 VSSIO ) + ( FILLER_781 VSSIO ) ( FILLER_569 VSSIO ) ( FILLER_780 VSSIO ) + ( FILLER_568 VSSIO ) ( FILLER_779 VSSIO ) ( FILLER_567 VSSIO ) + ( FILLER_566 VSSIO ) ( FILLER_778 VSSIO ) ( FILLER_565 VSSIO ) + ( FILLER_777 VSSIO ) ( FILLER_776 VSSIO ) ( FILLER_560 VSSIO ) + ( FILLER_775 VSSIO ) ( user2_vssa_hvclamp_pad VSSIO ) + ( FILLER_562 VSSIO ) ( FILLER_563 VSSIO ) ( FILLER_561 VSSIO ) + ( user1_vdda_hvclamp_pad\[0\] VSSIO ) ( FILLER_773 VSSIO ) + ( FILLER_772 VSSIO ) ( FILLER_771 VSSIO ) ( FILLER_559 VSSIO ) + ( FILLER_770 VSSIO ) ( FILLER_558 VSSIO ) ( FILLER_769 VSSIO ) + ( FILLER_557 VSSIO ) ( FILLER_556 VSSIO ) ( FILLER_555 VSSIO ) + ( FILLER_768 VSSIO ) ( FILLER_766 VSSIO ) ( FILLER_767 VSSIO ) + ( FILLER_765 VSSIO ) ( FILLER_550 VSSIO ) + ( mprj_pads.area2_io_pad\[6\] VSSIO ) ( FILLER_553 VSSIO ) + ( FILLER_552 VSSIO ) ( FILLER_551 VSSIO ) ( FILLER_546 VSSIO ) + ( mprj_pads.area1_io_pad\[12\] VSSIO ) ( FILLER_549 VSSIO ) + ( FILLER_763 VSSIO ) ( FILLER_548 VSSIO ) ( FILLER_762 VSSIO ) + ( FILLER_547 VSSIO ) ( FILLER_761 VSSIO ) ( FILLER_760 VSSIO ) + ( FILLER_759 VSSIO ) ( FILLER_545 VSSIO ) ( FILLER_758 VSSIO ) + ( FILLER_757 VSSIO ) ( FILLER_540 VSSIO ) ( FILLER_756 VSSIO ) + ( mprj_pads.area2_io_pad\[7\] VSSIO ) ( FILLER_543 VSSIO ) + ( FILLER_542 VSSIO ) ( FILLER_541 VSSIO ) + ( mprj_pads.area1_io_pad\[11\] VSSIO ) ( FILLER_539 VSSIO ) + ( FILLER_754 VSSIO ) ( FILLER_753 VSSIO ) ( FILLER_538 VSSIO ) + ( FILLER_752 VSSIO ) ( FILLER_537 VSSIO ) ( FILLER_536 VSSIO ) + ( FILLER_535 VSSIO ) ( FILLER_751 VSSIO ) ( FILLER_750 VSSIO ) + ( FILLER_747 VSSIO ) ( FILLER_749 VSSIO ) ( FILLER_748 VSSIO ) + ( FILLER_531 VSSIO ) ( mprj_pads.area2_io_pad\[8\] VSSIO ) + ( FILLER_533 VSSIO ) ( FILLER_532 VSSIO ) ( FILLER_743 VSSIO ) + ( FILLER_530 VSSIO ) ( FILLER_529 VSSIO ) ( FILLER_744 VSSIO ) + ( FILLER_745 VSSIO ) ( mprj_pads.area1_io_pad\[10\] VSSIO ) + ( FILLER_528 VSSIO ) ( FILLER_527 VSSIO ) ( FILLER_525 VSSIO ) + ( FILLER_742 VSSIO ) ( FILLER_526 VSSIO ) ( FILLER_740 VSSIO ) + ( FILLER_741 VSSIO ) ( FILLER_737 VSSIO ) ( FILLER_739 VSSIO ) + ( FILLER_738 VSSIO ) ( FILLER_521 VSSIO ) + ( mprj_pads.area2_io_pad\[9\] VSSIO ) ( FILLER_523 VSSIO ) + ( FILLER_522 VSSIO ) ( FILLER_517 VSSIO ) ( FILLER_520 VSSIO ) + ( FILLER_519 VSSIO ) ( FILLER_518 VSSIO ) + ( mprj_pads.area1_io_pad\[9\] VSSIO ) ( FILLER_735 VSSIO ) + ( FILLER_734 VSSIO ) ( FILLER_515 VSSIO ) ( FILLER_516 VSSIO ) + ( FILLER_733 VSSIO ) ( FILLER_732 VSSIO ) ( FILLER_728 VSSIO ) + ( FILLER_731 VSSIO ) ( FILLER_730 VSSIO ) ( FILLER_729 VSSIO ) + ( mprj_pads.area2_io_pad\[10\] VSSIO ) ( FILLER_513 VSSIO ) + ( FILLER_512 VSSIO ) ( FILLER_511 VSSIO ) ( FILLER_507 VSSIO ) + ( FILLER_510 VSSIO ) ( FILLER_509 VSSIO ) ( FILLER_508 VSSIO ) + ( FILLER_726 VSSIO ) ( mprj_pads.area1_io_pad\[8\] VSSIO ) + ( FILLER_725 VSSIO ) ( FILLER_724 VSSIO ) ( FILLER_506 VSSIO ) + ( FILLER_505 VSSIO ) ( FILLER_723 VSSIO ) ( FILLER_722 VSSIO ) + ( FILLER_721 VSSIO ) ( FILLER_720 VSSIO ) ( FILLER_719 VSSIO ) + ( FILLER_501 VSSIO ) ( mprj_pads.area2_io_pad\[11\] VSSIO ) + ( FILLER_502 VSSIO ) ( FILLER_503 VSSIO ) ( FILLER_718 VSSIO ) + ( FILLER_497 VSSIO ) ( FILLER_500 VSSIO ) ( FILLER_499 VSSIO ) + ( FILLER_498 VSSIO ) ( FILLER_495 VSSIO ) + ( mprj_pads.area1_io_pad\[7\] VSSIO ) ( FILLER_716 VSSIO ) + ( FILLER_496 VSSIO ) ( FILLER_715 VSSIO ) ( FILLER_714 VSSIO ) + ( FILLER_492 VSSIO ) ( FILLER_713 VSSIO ) ( FILLER_712 VSSIO ) + ( FILLER_711 VSSIO ) ( mprj_pads.area2_io_pad\[12\] VSSIO ) + ( FILLER_493 VSSIO ) ( FILLER_710 VSSIO ) ( FILLER_709 VSSIO ) + ( FILLER_491 VSSIO ) ( FILLER_488 VSSIO ) ( FILLER_490 VSSIO ) + ( FILLER_489 VSSIO ) ( user1_vdda_hvclamp_pad\[1\] VSSIO ) + ( FILLER_487 VSSIO ) ( FILLER_707 VSSIO ) ( FILLER_706 VSSIO ) + ( FILLER_486 VSSIO ) ( FILLER_485 VSSIO ) ( FILLER_705 VSSIO ) + ( FILLER_704 VSSIO ) ( FILLER_703 VSSIO ) ( FILLER_702 VSSIO ) + ( FILLER_481 VSSIO ) ( user2_vdda_hvclamp_pad VSSIO ) + ( FILLER_482 VSSIO ) ( FILLER_483 VSSIO ) ( FILLER_701 VSSIO ) + ( FILLER_700 VSSIO ) ( FILLER_478 VSSIO ) ( FILLER_480 VSSIO ) + ( FILLER_479 VSSIO ) ( FILLER_476 VSSIO ) ( FILLER_477 VSSIO ) + ( FILLER_698 VSSIO ) ( user1_vssd_lvclamp_pad VSSIO ) + ( FILLER_697 VSSIO ) ( FILLER_475 VSSIO ) ( FILLER_693 VSSIO ) + ( FILLER_696 VSSIO ) ( FILLER_695 VSSIO ) ( FILLER_694 VSSIO ) + ( FILLER_472 VSSIO ) ( user2_vssd_lvclamp_pad VSSIO ) + ( FILLER_473 VSSIO ) ( FILLER_692 VSSIO ) ( FILLER_690 VSSIO ) + ( FILLER_471 VSSIO ) ( FILLER_691 VSSIO ) ( FILLER_470 VSSIO ) + ( FILLER_468 VSSIO ) ( FILLER_469 VSSIO ) + ( user1_vssa_hvclamp_pad\[1\] VSSIO ) ( FILLER_467 VSSIO ) + ( FILLER_466 VSSIO ) ( FILLER_688 VSSIO ) ( FILLER_465 VSSIO ) + ( FILLER_687 VSSIO ) ( FILLER_686 VSSIO ) ( FILLER_685 VSSIO ) + ( FILLER_684 VSSIO ) ( FILLER_462 VSSIO ) + ( mprj_pads.area2_io_pad\[13\] VSSIO ) ( FILLER_463 VSSIO ) + ( FILLER_683 VSSIO ) ( FILLER_682 VSSIO ) ( FILLER_461 VSSIO ) + ( FILLER_681 VSSIO ) ( FILLER_460 VSSIO ) ( FILLER_458 VSSIO ) + ( FILLER_459 VSSIO ) ( FILLER_679 VSSIO ) ( FILLER_457 VSSIO ) + ( FILLER_456 VSSIO ) ( mprj_pads.area1_io_pad\[6\] VSSIO ) + ( FILLER_455 VSSIO ) ( FILLER_675 VSSIO ) ( FILLER_678 VSSIO ) + ( FILLER_677 VSSIO ) ( FILLER_676 VSSIO ) ( FILLER_453 VSSIO ) + ( mprj_pads.area2_io_pad\[14\] VSSIO ) ( FILLER_674 VSSIO ) + ( FILLER_671 VSSIO ) ( FILLER_452 VSSIO ) ( FILLER_451 VSSIO ) + ( FILLER_673 VSSIO ) ( FILLER_450 VSSIO ) ( FILLER_672 VSSIO ) + ( FILLER_449 VSSIO ) ( FILLER_448 VSSIO ) ( FILLER_446 VSSIO ) + ( FILLER_447 VSSIO ) ( FILLER_445 VSSIO ) ( FILLER_666 VSSIO ) + ( mprj_pads.area1_io_pad\[5\] VSSIO ) ( FILLER_669 VSSIO ) + ( FILLER_668 VSSIO ) ( FILLER_667 VSSIO ) ( FILLER_662 VSSIO ) + ( mprj_pads.area2_io_pad\[15\] VSSIO ) ( FILLER_443 VSSIO ) + ( FILLER_442 VSSIO ) ( FILLER_665 VSSIO ) ( FILLER_441 VSSIO ) + ( FILLER_664 VSSIO ) ( FILLER_440 VSSIO ) ( FILLER_663 VSSIO ) + ( FILLER_439 VSSIO ) ( FILLER_438 VSSIO ) ( FILLER_436 VSSIO ) + ( FILLER_437 VSSIO ) ( FILLER_435 VSSIO ) + ( mprj_pads.area1_io_pad\[4\] VSSIO ) ( FILLER_660 VSSIO ) + ( FILLER_659 VSSIO ) ( FILLER_658 VSSIO ) ( FILLER_657 VSSIO ) + ( mprj_pads.area2_io_pad\[16\] VSSIO ) ( FILLER_433 VSSIO ) + ( FILLER_656 VSSIO ) ( FILLER_432 VSSIO ) ( FILLER_431 VSSIO ) + ( FILLER_655 VSSIO ) ( FILLER_430 VSSIO ) ( FILLER_429 VSSIO ) + ( FILLER_654 VSSIO ) ( FILLER_653 VSSIO ) ( FILLER_428 VSSIO ) + ( FILLER_426 VSSIO ) ( FILLER_427 VSSIO ) ( FILLER_425 VSSIO ) + ( FILLER_649 VSSIO ) ( mprj_pads.area1_io_pad\[3\] VSSIO ) + ( FILLER_650 VSSIO ) ( FILLER_651 VSSIO ) ( FILLER_645 VSSIO ) + ( FILLER_648 VSSIO ) ( mprj_pads.area2_io_pad\[17\] VSSIO ) + ( FILLER_423 VSSIO ) ( FILLER_422 VSSIO ) ( FILLER_647 VSSIO ) + ( FILLER_421 VSSIO ) ( FILLER_646 VSSIO ) ( FILLER_420 VSSIO ) + ( FILLER_419 VSSIO ) ( FILLER_643 VSSIO ) ( FILLER_644 VSSIO ) + ( FILLER_418 VSSIO ) ( FILLER_416 VSSIO ) ( FILLER_417 VSSIO ) + ( FILLER_415 VSSIO ) ( FILLER_640 VSSIO ) ( FILLER_641 VSSIO ) + ( mprj_pads.area1_io_pad\[2\] VSSIO ) ( FILLER_409 VSSIO ) + ( FILLER_639 VSSIO ) ( mprj_pads.area2_io_pad\[18\] VSSIO ) + ( FILLER_413 VSSIO ) ( FILLER_412 VSSIO ) ( FILLER_411 VSSIO ) + ( FILLER_638 VSSIO ) ( FILLER_410 VSSIO ) ( FILLER_637 VSSIO ) + ( FILLER_636 VSSIO ) ( FILLER_408 VSSIO ) ( FILLER_634 VSSIO ) + ( FILLER_635 VSSIO ) ( FILLER_407 VSSIO ) ( FILLER_406 VSSIO ) + ( FILLER_405 VSSIO ) ( FILLER_SB2 VSSIO ) ( FILLER_401 VSSIO ) + ( FILLER_402 VSSIO ) ( disconnect_vdda_2 VSSIO ) + ( FILLER_400 VSSIO ) ( FILLER_399 VSSIO ) ( FILLER_632 VSSIO ) + ( mprj_pads.area1_io_pad\[1\] VSSIO ) ( FILLER_631 VSSIO ) + ( FILLER_398 VSSIO ) ( FILLER_397 VSSIO ) ( FILLER_630 VSSIO ) + ( FILLER_629 VSSIO ) ( FILLER_396 VSSIO ) ( FILLER_395 VSSIO ) + ( FILLER_628 VSSIO ) ( FILLER_627 VSSIO ) ( FILLER_394 VSSIO ) + ( FILLER_626 VSSIO ) ( FILLER_625 VSSIO ) ( FILLER_389 VSSIO ) + ( FILLER_624 VSSIO ) ( mgmt_vddio_hvclamp_pad\[0\] VSSIO ) + ( FILLER_392 VSSIO ) ( FILLER_391 VSSIO ) ( FILLER_390 VSSIO ) + ( mprj_pads.area1_io_pad\[0\] VSSIO ) ( FILLER_622 VSSIO ) + ( FILLER_621 VSSIO ) ( FILLER_388 VSSIO ) ( FILLER_620 VSSIO ) + ( FILLER_387 VSSIO ) ( FILLER_619 VSSIO ) ( FILLER_386 VSSIO ) + ( FILLER_385 VSSIO ) ( FILLER_618 VSSIO ) ( FILLER_384 VSSIO ) + ( FILLER_617 VSSIO ) ( FILLER_616 VSSIO ) ( FILLER_615 VSSIO ) + ( FILLER_612 VSSIO ) ( FILLER_SB1 VSSIO ) + ( disconnect_vdda_1 VSSIO ) ( FILLER_611 VSSIO ) + ( mgmt_vccd_lvclamp_pad VSSIO ) ( FILLER_382 VSSIO ) + ( FILLER_381 VSSIO ) ( FILLER_380 VSSIO ) ( FILLER_379 VSSIO ) + ( FILLER_610 VSSIO ) ( FILLER_609 VSSIO ) ( FILLER_378 VSSIO ) + ( FILLER_608 VSSIO ) ( FILLER_607 VSSIO ) ( FILLER_377 VSSIO ) + ( FILLER_606 VSSIO ) ( FILLER_376 VSSIO ) ( FILLER_375 VSSIO ) + ( mgmt_corner\[1\] VSSIO ) ( FILLER_374 VSSIO ) + ( FILLER_605 VSSIO ) ( FILLER_373 VSSIO ) ( FILLER_372 VSSIO ) + ( FILLER_371 VSSIO ) ( FILLER_370 VSSIO ) ( FILLER_369 VSSIO ) + ( FILLER_368 VSSIO ) ( bus_tie_72 VSSIO ) ( bus_tie_71 VSSIO ) + ( bus_tie_70 VSSIO ) ( bus_tie_69 VSSIO ) ( bus_tie_68 VSSIO ) + ( FILLER_361 VSSIO ) ( bus_tie_67 VSSIO ) ( FILLER_358 VSSIO ) + ( FILLER_360 VSSIO ) ( FILLER_359 VSSIO ) ( FILLER_357 VSSIO ) + ( FILLER_353 VSSIO ) ( mgmt_vdda_hvclamp_pad VSSIO ) + ( FILLER_354 VSSIO ) ( FILLER_355 VSSIO ) ( FILLER_351 VSSIO ) + ( FILLER_352 VSSIO ) ( bus_tie_65 VSSIO ) ( bus_tie_66 VSSIO ) + ( FILLER_343 VSSIO ) ( bus_tie_64 VSSIO ) ( bus_tie_63 VSSIO ) + ( bus_tie_62 VSSIO ) ( FILLER_344 VSSIO ) ( bus_tie_61 VSSIO ) + ( FILLER_340 VSSIO ) ( FILLER_342 VSSIO ) ( FILLER_341 VSSIO ) + ( FILLER_335 VSSIO ) ( mgmt_vssio_hvclamp_pad\[0\] VSSIO ) + ( FILLER_337 VSSIO ) ( FILLER_338 VSSIO ) ( FILLER_336 VSSIO ) + ( FILLER_334 VSSIO ) ( bus_tie_58 VSSIO ) ( bus_tie_60 VSSIO ) + ( bus_tie_59 VSSIO ) ( bus_tie_56 VSSIO ) ( bus_tie_57 VSSIO ) + ( FILLER_323 VSSIO ) ( FILLER_325 VSSIO ) ( FILLER_324 VSSIO ) + ( FILLER_326 VSSIO ) ( FILLER_327 VSSIO ) ( bus_tie_55 VSSIO ) + ( FILLER_317 VSSIO ) ( clock_pad VSSIO ) ( FILLER_321 VSSIO ) + ( FILLER_319 VSSIO ) ( FILLER_320 VSSIO ) ( FILLER_318 VSSIO ) + ( bus_tie_54 VSSIO ) ( bus_tie_53 VSSIO ) ( bus_tie_52 VSSIO ) + ( bus_tie_51 VSSIO ) ( bus_tie_50 VSSIO ) ( FILLER_308 VSSIO ) + ( FILLER_307 VSSIO ) ( FILLER_306 VSSIO ) ( FILLER_309 VSSIO ) + ( FILLER_310 VSSIO ) ( bus_tie_49 VSSIO ) ( FILLER_301 VSSIO ) + ( flash_io1_pad VSSIO ) ( FILLER_302 VSSIO ) + ( FILLER_303 VSSIO ) ( FILLER_304 VSSIO ) ( FILLER_300 VSSIO ) + ( bus_tie_46 VSSIO ) ( bus_tie_48 VSSIO ) ( bus_tie_47 VSSIO ) + ( FILLER_290 VSSIO ) ( bus_tie_45 VSSIO ) ( bus_tie_44 VSSIO ) + ( FILLER_291 VSSIO ) ( FILLER_289 VSSIO ) ( FILLER_292 VSSIO ) + ( FILLER_293 VSSIO ) ( bus_tie_43 VSSIO ) ( FILLER_283 VSSIO ) + ( flash_io0_pad VSSIO ) ( FILLER_286 VSSIO ) + ( FILLER_287 VSSIO ) ( FILLER_285 VSSIO ) ( FILLER_284 VSSIO ) + ( bus_tie_39 VSSIO ) ( bus_tie_42 VSSIO ) ( bus_tie_41 VSSIO ) + ( bus_tie_40 VSSIO ) ( FILLER_273 VSSIO ) ( bus_tie_38 VSSIO ) + ( FILLER_274 VSSIO ) ( FILLER_272 VSSIO ) ( FILLER_275 VSSIO ) + ( FILLER_276 VSSIO ) ( bus_tie_37 VSSIO ) ( FILLER_266 VSSIO ) + ( flash_clk_pad VSSIO ) ( FILLER_269 VSSIO ) + ( FILLER_270 VSSIO ) ( FILLER_268 VSSIO ) ( FILLER_267 VSSIO ) + ( bus_tie_36 VSSIO ) ( bus_tie_35 VSSIO ) ( bus_tie_34 VSSIO ) + ( bus_tie_33 VSSIO ) ( bus_tie_32 VSSIO ) ( FILLER_257 VSSIO ) + ( FILLER_256 VSSIO ) ( FILLER_255 VSSIO ) ( FILLER_258 VSSIO ) + ( FILLER_259 VSSIO ) ( bus_tie_31 VSSIO ) ( FILLER_249 VSSIO ) + ( flash_csb_pad VSSIO ) ( FILLER_252 VSSIO ) + ( FILLER_253 VSSIO ) ( FILLER_251 VSSIO ) ( FILLER_250 VSSIO ) + ( bus_tie_27 VSSIO ) ( bus_tie_30 VSSIO ) ( bus_tie_29 VSSIO ) + ( bus_tie_28 VSSIO ) ( FILLER_238 VSSIO ) ( bus_tie_26 VSSIO ) + ( FILLER_242 VSSIO ) ( bus_tie_25 VSSIO ) ( FILLER_239 VSSIO ) + ( FILLER_240 VSSIO ) ( FILLER_241 VSSIO ) ( FILLER_232 VSSIO ) + ( mgmt_vssd_lvclamp_pad VSSIO ) ( FILLER_236 VSSIO ) + ( FILLER_234 VSSIO ) ( FILLER_235 VSSIO ) ( FILLER_233 VSSIO ) + ( bus_tie_24 VSSIO ) ( bus_tie_20 VSSIO ) ( bus_tie_23 VSSIO ) + ( bus_tie_22 VSSIO ) ( bus_tie_21 VSSIO ) ( FILLER_221 VSSIO ) + ( FILLER_223 VSSIO ) ( FILLER_222 VSSIO ) ( FILLER_224 VSSIO ) + ( FILLER_225 VSSIO ) ( bus_tie_19 VSSIO ) ( FILLER_217 VSSIO ) + ( bus_tie_9 VSSIO ) ( mgmt_corner\[0\] VSSIO ) + ( mgmt_vssa_hvclamp_pad VSSIO ) ( FILLER_182 VSSIO ) + ( FILLER_185 VSSIO ) ( FILLER_183 VSSIO ) ( FILLER_184 VSSIO ) + ( FILLER_181 VSSIO ) ( bus_tie_4 VSSIO ) ( bus_tie_6 VSSIO ) + ( bus_tie_5 VSSIO ) ( FILLER_171 VSSIO ) ( bus_tie_3 VSSIO ) + ( bus_tie_2 VSSIO ) ( FILLER_172 VSSIO ) ( FILLER_170 VSSIO ) + ( FILLER_173 VSSIO ) ( FILLER_174 VSSIO ) ( bus_tie_1 VSSIO ) + ( FILLER_218 VSSIO ) ( FILLER_219 VSSIO ) ( FILLER_215 VSSIO ) + ( FILLER_216 VSSIO ) ( bus_tie_17 VSSIO ) ( bus_tie_18 VSSIO ) + ( bus_tie_14 VSSIO ) ( bus_tie_16 VSSIO ) ( bus_tie_15 VSSIO ) + ( FILLER_204 VSSIO ) ( FILLER_207 VSSIO ) ( FILLER_208 VSSIO ) + ( bus_tie_13 VSSIO ) ( FILLER_206 VSSIO ) ( FILLER_205 VSSIO ) + ( FILLER_199 VSSIO ) ( FILLER_201 VSSIO ) ( FILLER_202 VSSIO ) + ( resetb_pad VSSIO ) ( FILLER_200 VSSIO ) ( FILLER_198 VSSIO ) + ( bus_tie_12 VSSIO ) ( bus_tie_11 VSSIO ) ( bus_tie_10 VSSIO ) + ( bus_tie_8 VSSIO ) ( bus_tie_7 VSSIO ) ( FILLER_190 VSSIO ) + ( FILLER_191 VSSIO ) ( FILLER_189 VSSIO ) ( FILLER_188 VSSIO ) + ( FILLER_187 VSSIO ) ; + - vssa_pad ( mgmt_vssa_hvclamp_pad VSSA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 401910 64465 ) ( 461150 * ) ; + - vccd2_pad ( user2_vccd_lvclamp_pad VCCD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 31635 4597470 ) ( 97295 * ) ; + - vssd_pad ( mgmt_vssd_lvclamp_pad VSSD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 1243530 31635 ) ( * 97295 ) ; + - vdda1_pad ( user1_vdda_hvclamp_pad\[0\] VDDA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3523530 4099910 ) ( * 4159150 ) ; + - mprj_io[16] ( mprj_pads.area1_io_pad\[16\] PAD ) ; + - mprj_io_in[16] ( mprj_pads.area1_io_pad\[16\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2696225 4977105 ) ( * 4979365 ) ; + - mprj_io_one[16] ( mprj_pads.area1_io_pad\[16\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2690245 4977105 ) ( * 4979365 ) ; + - mprj_io_slow_sel[16] ( mprj_pads.area1_io_pad\[16\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2687025 4977105 ) ( * 4979365 ) ; + - mprj_analog_io[9] ( mprj_pads.area1_io_pad\[16\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2683805 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[16\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[16\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[49] ( mprj_pads.area1_io_pad\[16\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2677825 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[16\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[16\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[16] ( mprj_pads.area1_io_pad\[16\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2671845 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[48] ( mprj_pads.area1_io_pad\[16\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2668625 4977105 ) ( * 4979365 ) ; + - mprj_io_analog_pol[16] + ( mprj_pads.area1_io_pad\[16\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2665405 4977105 ) ( * 4979365 ) ; + - mprj_io_inp_dis[16] ( mprj_pads.area1_io_pad\[16\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2662645 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[16\]/ENABLE_H + ( mprj_pads.area1_io_pad\[16\] ENABLE_H ) ; + - mprj_pads.area1_io_pad\[16\]/HLD_H_N + ( mprj_pads.area1_io_pad\[16\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[16\] TIE_HI_ESD ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2652985 4977105 ) ( * 4977350 ) + NEW met2 ( 2652915 4977490 ) ( 2653640 * ) + NEW met2 ( 2652915 4977670 ) ( 2653640 * ) + NEW met2 TAPERRULE met2_width_280 ( 2652985 4977810 ) ( * 4979365 ) + NEW met2 ( 2653280 4977580 ) via_860_260_hv + NEW met1 TAPERRULE met1_width_240 ( 2653780 4977580 ) ( 2693005 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 2693005 4977780 ) ( * 4979365 ) + NEW met2 TAPERRULE met2_width_280 ( 2693005 4977105 ) ( * 4977380 ) + NEW met1 TAPERRULE met1_width_240 ( 2693205 4977580 ) ( 2699605 * ) ; + - mprj_io_analog_sel[16] + ( mprj_pads.area1_io_pad\[16\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2650225 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[50] ( mprj_pads.area1_io_pad\[16\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2647005 4977105 ) ( * 4979365 ) ; + - mprj_io_holdover[16] ( mprj_pads.area1_io_pad\[16\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2643785 4977105 ) ( * 4979365 ) ; + - mprj_io_out[16] ( mprj_pads.area1_io_pad\[16\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2641025 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[16\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[16\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[16\] ENABLE_INP_H ) + ( mprj_pads.area1_io_pad\[16\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2699445 4977105 ) ( * 4977830 ) + NEW met2 ( 2698790 4977970 ) ( 2699150 * ) ( * 4978060 ) + via_860_260_hv + NEW met2 ( 2698790 4978150 ) ( 2699515 * ) + NEW met2 TAPERRULE met2_width_280 ( 2699445 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 2660225 4978060 ) ( 2698650 * ) + NEW met1 ( 2659725 4978060 ) via_860_260_hv + NEW met2 ( 2659355 4978150 ) ( 2660085 * ) + NEW met2 TAPERRULE met2_width_280 ( 2659425 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 2638605 4978060 ) ( 2659225 * ) + NEW met1 ( 2638105 4978060 ) via_860_260_hv + NEW met2 ( 2637735 4978150 ) ( 2638465 * ) + NEW met2 TAPERRULE met2_width_280 ( 2637805 4978290 ) ( * 4979365 ) + NEW met2 ( 2637735 4977970 ) ( 2638465 * ) + NEW met2 TAPERRULE met2_width_280 ( 2637805 4977105 ) ( * 4977830 ) + NEW met2 ( 2659355 4977970 ) ( 2660085 * ) + NEW met2 TAPERRULE met2_width_280 ( 2659425 4977105 ) ( * 4977830 ) ; + - mprj_io_vtrip_sel[16] ( mprj_pads.area1_io_pad\[16\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2631825 4977105 ) ( * 4979365 ) ; + - mprj_io_ib_mode_sel[16] + ( mprj_pads.area1_io_pad\[16\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2628605 4977105 ) ( * 4979365 ) ; + - mprj_io_oeb[16] ( mprj_pads.area1_io_pad\[16\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2625385 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[16\]/IN_H + ( mprj_pads.area1_io_pad\[16\] IN_H ) ; + - gpio ( gpio_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 2578000 64215 ) ( 2639000 * ) ; + - gpio_pad/TIE_LO_ESD ( gpio_pad TIE_LO_ESD ) + ( gpio_pad ENABLE_VSWITCH_H ) ( gpio_pad ENABLE_INP_H ) + + ROUTED met2 ( 2572565 209315 ) via_260_260_hv + NEW met2 ( 2572505 209405 ) ( 2572625 * ) + NEW met1 TAPERRULE met1_width_260 ( 2571880 209315 ) ( 2572365 * ) + NEW met2 ( 2572505 209225 ) ( 2572625 * ) + NEW met1 TAPERRULE met1_width_260 ( 2572765 209315 ) ( 2612560 * ) via_260_260_hv + ( * 209405 ) ( 2612620 * ) + NEW met2 ( 2612500 209225 ) ( 2612620 * ) + NEW met1 TAPERRULE met1_width_260 ( 2612760 209315 ) ( 2634180 * ) via_260_260_hv + ( * 209405 ) ( 2634240 * ) + NEW met2 ( 2634120 209225 ) ( 2634240 * ) + NEW met1 TAPERRULE met1_width_260 ( 2634380 209315 ) ( 2650065 * ) ; + - gpio_in_core ( gpio_pad IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2575775 208635 ) ( * 210895 ) ; + - gpio_pad/HLD_H_N ( gpio_pad HLD_H_N ) ( gpio_pad TIE_HI_ESD ) + + ROUTED met2 ( 2618995 209735 ) via_260_260_hv + NEW met2 ( 2618935 209825 ) ( 2619055 * ) + NEW met1 TAPERRULE met1_width_260 ( 2579190 209735 ) ( 2618795 * ) + NEW met1 ( 2578990 209735 ) via_260_260_hv ( * 209825 ) + ( 2579050 * ) + NEW met1 TAPERRULE met1_width_260 ( 2571880 209735 ) ( 2578790 * ) + NEW met2 ( 2578930 209645 ) ( 2579050 * ) + NEW met2 ( 2618935 209645 ) ( 2619055 * ) + NEW met1 TAPERRULE met1_width_260 ( 2619195 209735 ) ( 2650065 * ) ; + - gpio_pad/SLOW ( gpio_pad SLOW ) ( constant_block_6 zero ) + ( gpio_pad IB_MODE_SEL ) ( gpio_pad VTRIP_SEL ) + ( gpio_pad HLD_OVR ) ( gpio_pad ANALOG_SEL ) + ( gpio_pad ANALOG_POL ) ( gpio_pad ANALOG_EN ) + + ROUTED met2 ( 2584975 210155 ) via_260_260_hv + NEW met2 ( 2584915 210245 ) ( 2585035 * ) + NEW met1 TAPERRULE met1_width_260 ( 2571880 210155 ) ( 2584775 * ) + NEW met2 ( 2584915 210065 ) ( 2585035 * ) + NEW met1 TAPERRULE met1_width_260 ( 2585175 210155 ) ( 2600150 * ) via_260_260_hv + ( * 210245 ) ( 2600210 * ) + NEW met2 ( 2600090 210065 ) ( 2600210 * ) + NEW met1 TAPERRULE met1_width_260 ( 2600350 210155 ) ( 2606595 * ) via_260_260_hv + ( * 210245 ) ( 2606655 * ) + NEW met2 ( 2606535 210065 ) ( 2606655 * ) + NEW met1 TAPERRULE met1_width_260 ( 2606795 210155 ) ( 2621770 * ) via_260_260_hv + ( * 210245 ) ( 2621830 * ) + NEW met2 ( 2621710 210065 ) ( 2621830 * ) + NEW met1 TAPERRULE met1_width_260 ( 2621970 210155 ) ( 2628205 * ) via_260_260_hv + ( * 210245 ) ( 2628265 * ) + NEW met2 ( 2628145 210065 ) ( 2628265 * ) + NEW met1 TAPERRULE met1_width_260 ( 2628405 210155 ) ( 2640175 * ) via_260_260_hv + ( * 210245 ) ( 2640235 * ) + NEW met2 ( 2640115 210065 ) ( 2640235 * ) + NEW met1 TAPERRULE met1_width_260 ( 2640375 210155 ) ( 2643390 * ) via_260_260_hv + ( * 210245 ) ( 2643450 * ) + NEW met2 ( 2643330 210065 ) ( 2643450 * ) + NEW met1 TAPERRULE met1_width_260 ( 2643590 210155 ) ( 2651945 * ) via_260_260_hv + ( * 210245 ) ( 2652005 * ) + NEW met2 TAPERRULE met2_width_260 ( 2651945 204845 ) ( * 209955 ) + NEW met2 ( 2651865 204705 ) ( 2652025 * ) + NEW met2 ( 2651945 204580 ) via2_300_300_vx + NEW met3 ( 2651920 204605 ) ( 2651970 * ) + NEW met3 ( 2652245 204580 ) ( 2668135 * ) + NEW met3 ( 2668135 203710 ) ( * 204280 ) + NEW met3 ( 2651920 204555 ) ( 2651970 * ) + NEW met3 ( 2651920 204580 ) ( 2651645 * ) + NEW met2 ( 2651865 204455 ) ( 2652025 * ) ; + - gpio_pad/PAD_A_ESD_0_H ( gpio_pad PAD_A_ESD_0_H ) ; + - gpio_pad/PAD_A_ESD_1_H ( gpio_pad PAD_A_ESD_1_H ) ; + - gpio_mode1_core ( gpio_pad DM[2] ) ( gpio_pad DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2624995 208635 ) ( * 210895 ) ( * 211035 ) + ( * 211600 ) + NEW met2 ( 2624930 211740 ) ( 2625050 * ) + NEW met2 ( 2624990 211830 ) via_260_260_hv + NEW met2 ( 2624930 211920 ) ( 2625050 * ) + NEW met1 ( 2594370 211830 ) ( 2624790 * ) + NEW met1 ( 2594170 211830 ) via_260_260_hv ( * 211920 ) + ( 2594230 * ) + NEW met2 ( 2594110 211740 ) ( 2594230 * ) + NEW met2 ( 2594170 209170 ) ( * 211600 ) ; + - gpio_pad/PAD_A_NOESD_H ( gpio_pad PAD_A_NOESD_H ) ; + - gpio_mode0_core ( gpio_pad DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2603375 208635 ) ( * 210895 ) ; + - gpio_inenb_core ( gpio_pad INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2609355 208635 ) ( * 210895 ) ; + - gpio_out_core ( gpio_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2630975 208635 ) ( * 210895 ) ; + - gpio_outenb_core ( gpio_pad OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2646615 208635 ) ( * 210895 ) ; + - gpio_pad/IN_H ( gpio_pad IN_H ) ; + - vssd1_pad ( user1_vssd_lvclamp_pad VSSD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 3490700 2336530 ) ( 3556360 * ) ; + - vssd1 ( user1_vccd_lvclamp_pad VSSD1 ) + ( user1_vssd_lvclamp_pad VSSD1 ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3360600 476580 ) ( * 2299350 ) + NEW met5 TAPERRULE met5_width_13000 ( 3360600 2323540 ) ( * 2349430 ) + NEW met5 TAPERRULE met5_width_13000 ( 3360600 2373620 ) ( * 4563510 ) + NEW met5 TAPERRULE met5_width_13000 ( 3360600 4587140 ) ( * 4962770 ) + NEW met4 TAPERRULE met4_width_730 ( 3354280 4586705 ) ( 3367020 * ) + NEW met4 TAPERRULE met4_width_600 ( 3366870 4564460 ) ( * 4586190 ) + NEW met4 TAPERRULE met4_width_530 ( 3354280 4564045 ) ( 3367020 * ) + NEW met4 TAPERRULE met4_width_740 ( 3354500 4564460 ) ( * 4586190 ) + NEW met4 ( 3360720 4575325 ) via4_11700_22030 + NEW met3 TAPERRULE met3_width_710 ( 3354010 4586695 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_17050 ( 3375095 4564460 ) ( * 4586190 ) + NEW met3 TAPERRULE met3_width_570 ( 3354010 4564025 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1010 ( 3354365 4564460 ) ( * 4586190 ) + NEW met3 ( 3360720 4575325 ) via3_11700_22030_hx + NEW met4 TAPERRULE met4_width_600 ( 3354270 2373120 ) ( 3366970 * ) + NEW met4 TAPERRULE met4_width_650 ( 3366795 2350380 ) ( * 2372670 ) + NEW met4 TAPERRULE met4_width_730 ( 3354270 2349865 ) ( 3366970 * ) + NEW met4 TAPERRULE met4_width_510 ( 3354375 2350380 ) ( * 2372670 ) + NEW met4 ( 3360550 2361525 ) via4_11840_22590 + NEW met3 TAPERRULE met3_width_680 ( 3354120 2373160 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_17920 ( 3375430 2350380 ) ( * 2372670 ) + NEW met3 TAPERRULE met3_width_730 ( 3354120 2349865 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_660 ( 3354300 2350380 ) ( * 2372670 ) + NEW met3 ( 3360550 2361525 ) via3_11840_22590_hx + NEW met4 TAPERRULE met4_width_500 ( 3354280 2322990 ) ( 3366980 * ) + NEW met4 TAPERRULE met4_width_630 ( 3366815 2300300 ) ( * 2322590 ) + NEW met4 TAPERRULE met4_width_830 ( 3354280 2299735 ) ( 3366980 * ) + NEW met4 TAPERRULE met4_width_530 ( 3354395 2300300 ) ( * 2322590 ) + NEW met4 ( 3360580 2311445 ) via4_11840_22590 + NEW met3 TAPERRULE met3_width_505 ( 3354120 2322992.5 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_17890 ( 3375445 2300300 ) ( * 2322590 ) + NEW met3 TAPERRULE met3_width_850 ( 3354120 2299725 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_690 ( 3354315 2300300 ) ( * 2322590 ) + NEW met3 ( 3360580 2311445 ) via3_11840_22590_hx ; + - vccd1 ( user1_vccd_lvclamp_pad VCCD1 ) + ( user1_vssd_lvclamp_pad VCCD1 ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 476580 ) ( * 2324490 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348200 ) ( * 4538150 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562410 ) ( * 4588310 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4612670 ) ( * 4962770 ) + NEW met4 TAPERRULE met4_width_560 ( 3370200 4612150 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_600 ( 3382780 4589260 ) ( * 4611720 ) + NEW met4 TAPERRULE met4_width_530 ( 3370200 4588845 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589260 ) ( * 4611720 ) + NEW met4 ( 3376580 4600490 ) via4_11800_22760 + NEW met3 TAPERRULE met3_width_630 ( 3354010 4612185 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1140 ( 3383050 4589260 ) ( * 4611720 ) + NEW met3 TAPERRULE met3_width_610 ( 3354010 4588805 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16820 ( 3362270 4589260 ) ( * 4611720 ) + NEW met3 ( 3376580 4600490 ) via3_11800_22760_hx + NEW met4 TAPERRULE met4_width_590 ( 3370230 4561905 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_590 ( 3382815 4539100 ) ( * 4561460 ) + NEW met4 TAPERRULE met4_width_600 ( 3370230 4538650 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_770 ( 3370465 4539100 ) ( * 4561460 ) + NEW met4 ( 3376685 4550280 ) via4_11670_22660 + NEW met3 TAPERRULE met3_width_635 ( 3354010 4561927.5 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1100 ( 3383070 4539100 ) ( * 4561460 ) + NEW met3 TAPERRULE met3_width_650 ( 3354010 4538625 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16990 ( 3362355 4539100 ) ( * 4561460 ) + NEW met3 ( 3376685 4550280 ) via3_11670_22660_hx + NEW met4 TAPERRULE met4_width_550 ( 3370270 2347675 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_530 ( 3382825 2325440 ) ( * 2347250 ) + NEW met4 TAPERRULE met4_width_520 ( 3370270 2325030 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370420 2325440 ) ( * 2347250 ) + NEW met4 ( 3376640 2336345 ) via4_11840_22110 + NEW met3 TAPERRULE met3_width_600 ( 3354120 2347700 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_1830 ( 3383475 2325440 ) ( * 2347250 ) + NEW met3 TAPERRULE met3_width_545 ( 3354120 2325017.5 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_16750 ( 3362345 2325440 ) ( * 2347250 ) + NEW met3 ( 3376640 2336345 ) via3_11840_22110_hx ; + - mprj_io[1] ( mprj_pads.area1_io_pad\[1\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 733000 ) ( * 794000 ) ; + - mprj_pads.area1_io_pad\[1\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[1\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[1\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[1\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 727557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 728240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 728380 ) ( * 766745 ) + NEW met1 ( 3378000 766885 ) ( 3378120 * ) + NEW met1 ( 3378060 767275 ) via_260_860_vh + NEW met2 ( 3377105 767645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 767570 ) ( 3379365 * ) + NEW met1 ( 3378000 767665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 767805 ) ( * 788365 ) + NEW met1 ( 3378000 788505 ) ( 3378120 * ) + NEW met1 ( 3378060 788895 ) via_260_860_vh + NEW met2 ( 3377105 789265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 789190 ) ( 3379365 * ) + NEW met1 ( 3378000 789285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 789190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 767570 ) ( 3377860 * ) + NEW met2 ( 3378060 727850 ) via_260_860_vh ( * 727460 ) + ( 3378120 * ) + NEW met1 ( 3378010 727395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 727557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 727485 ) ( 3379365 * ) ; + - mprj_io_in[1] ( mprj_pads.area1_io_pad\[1\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 730775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[1\]/HLD_H_N + ( mprj_pads.area1_io_pad\[1\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[1\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 774085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 774012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 774110 ) ( 3377640 * ) + NEW met1 ( 3377580 773720 ) via_260_860_vh + NEW met1 ( 3377520 773330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 734225 ) ( * 773190 ) + NEW met1 ( 3377520 734085 ) ( 3377640 * ) + NEW met1 ( 3377580 733995 ) via_260_260_vh + NEW met2 ( 3377105 734065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 733995 ) ( 3379365 * ) + NEW met2 ( 3377105 733925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 733995 ) ( 3377380 * ) + NEW met1 ( 3377520 733905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 727395 ) ( * 733765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 774012.5 ) ( 3377380 * ) ; + - mprj_io_one[1] ( mprj_pads.area1_io_pad\[1\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 736755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[1] ( mprj_pads.area1_io_pad\[1\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 739975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[1\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[1\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[1\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[1\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[4] ( mprj_pads.area1_io_pad\[1\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 749175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[1\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[1\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[1] ( mprj_pads.area1_io_pad\[1\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 755155 ) ( 3379365 * ) ; + - mprj_io_dm[3] ( mprj_pads.area1_io_pad\[1\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 758375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[1] ( mprj_pads.area1_io_pad\[1\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 761595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[1] ( mprj_pads.area1_io_pad\[1\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 764355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[1\]/ENABLE_H + ( mprj_pads.area1_io_pad\[1\] ENABLE_H ) ; + - mprj_io_analog_sel[1] ( mprj_pads.area1_io_pad\[1\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 776775 ) ( 3379365 * ) ; + - mprj_io_dm[5] ( mprj_pads.area1_io_pad\[1\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 779995 ) ( 3379365 * ) ; + - mprj_io_holdover[1] ( mprj_pads.area1_io_pad\[1\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 783215 ) ( 3379365 * ) ; + - mprj_io_out[1] ( mprj_pads.area1_io_pad\[1\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 785975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[1] ( mprj_pads.area1_io_pad\[1\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 795175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[1] + ( mprj_pads.area1_io_pad\[1\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 798395 ) ( 3379365 * ) ; + - mprj_io_oeb[1] ( mprj_pads.area1_io_pad\[1\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 801615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[1\]/IN_H + ( mprj_pads.area1_io_pad\[1\] IN_H ) ; + - mprj_io[20] ( mprj_pads.area2_io_pad\[1\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 476580 ) ( * 2324490 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348200 ) ( * 4538150 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562410 ) ( * 4588310 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4612670 ) ( * 4962770 ) + NEW met4 TAPERRULE met4_width_560 ( 3370200 4612150 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_600 ( 3382780 4589260 ) ( * 4611720 ) + NEW met4 TAPERRULE met4_width_530 ( 3370200 4588845 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589260 ) ( * 4611720 ) + NEW met4 ( 3376580 4600490 ) via4_11800_22760 + NEW met3 TAPERRULE met3_width_630 ( 3354010 4612185 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1140 ( 3383050 4589260 ) ( * 4611720 ) + NEW met3 TAPERRULE met3_width_610 ( 3354010 4588805 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16820 ( 3362270 4589260 ) ( * 4611720 ) + NEW met3 ( 3376580 4600490 ) via3_11800_22760_hx + NEW met4 TAPERRULE met4_width_590 ( 3370230 4561905 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_590 ( 3382815 4539100 ) ( * 4561460 ) + NEW met4 TAPERRULE met4_width_600 ( 3370230 4538650 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_770 ( 3370465 4539100 ) ( * 4561460 ) + NEW met4 ( 3376685 4550280 ) via4_11670_22660 + NEW met3 TAPERRULE met3_width_635 ( 3354010 4561927.5 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1100 ( 3383070 4539100 ) ( * 4561460 ) + NEW met3 TAPERRULE met3_width_650 ( 3354010 4538625 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16990 ( 3362355 4539100 ) ( * 4561460 ) + NEW met3 ( 3376685 4550280 ) via3_11670_22660_hx + NEW met4 TAPERRULE met4_width_550 ( 3370270 2347675 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_530 ( 3382825 2325440 ) ( * 2347250 ) + NEW met4 TAPERRULE met4_width_520 ( 3370270 2325030 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370420 2325440 ) ( * 2347250 ) + NEW met4 ( 3376640 2336345 ) via4_11840_22110 + NEW met3 TAPERRULE met3_width_600 ( 3354120 2347700 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_1830 ( 3383475 2325440 ) ( * 2347250 ) + NEW met3 TAPERRULE met3_width_545 ( 3354120 2325017.5 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_16750 ( 3362345 2325440 ) ( * 2347250 ) + NEW met3 ( 3376640 2336345 ) via3_11840_22110_hx ; + - mprj_io_in[20] ( mprj_pads.area2_io_pad\[1\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1227225 4977105 ) ( * 4979365 ) ; + - mprj_io_one[20] ( mprj_pads.area2_io_pad\[1\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1221245 4977105 ) ( * 4979365 ) ; + - mprj_io_slow_sel[20] ( mprj_pads.area2_io_pad\[1\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1218025 4977105 ) ( * 4979365 ) ; + - mprj_analog_io[13] ( mprj_pads.area2_io_pad\[1\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1214805 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[1\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[1\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[61] ( mprj_pads.area2_io_pad\[1\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1208825 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[1\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[1\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[20] ( mprj_pads.area2_io_pad\[1\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1202845 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[60] ( mprj_pads.area2_io_pad\[1\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1199625 4977105 ) ( * 4979365 ) ; + - mprj_io_analog_pol[20] ( mprj_pads.area2_io_pad\[1\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1196405 4977105 ) ( * 4979365 ) ; + - mprj_io_inp_dis[20] ( mprj_pads.area2_io_pad\[1\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1193645 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[1\]/ENABLE_H + ( mprj_pads.area2_io_pad\[1\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[1\]/HLD_H_N + ( mprj_pads.area2_io_pad\[1\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[1\] TIE_HI_ESD ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1183985 4977105 ) ( * 4977350 ) + NEW met2 ( 1183915 4977490 ) ( 1184640 * ) + NEW met2 ( 1183915 4977670 ) ( 1184640 * ) + NEW met2 TAPERRULE met2_width_280 ( 1183985 4977810 ) ( * 4979365 ) + NEW met2 ( 1184280 4977580 ) via_860_260_hv + NEW met1 TAPERRULE met1_width_240 ( 1184780 4977580 ) ( 1224005 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 1224005 4977780 ) ( * 4979365 ) + NEW met2 TAPERRULE met2_width_280 ( 1224005 4977105 ) ( * 4977380 ) + NEW met1 TAPERRULE met1_width_240 ( 1224205 4977580 ) ( 1230605 * ) ; + - mprj_io_analog_sel[20] ( mprj_pads.area2_io_pad\[1\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1181225 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[62] ( mprj_pads.area2_io_pad\[1\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1178005 4977105 ) ( * 4979365 ) ; + - mprj_io_holdover[20] ( mprj_pads.area2_io_pad\[1\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1174785 4977105 ) ( * 4979365 ) ; + - mprj_io_out[20] ( mprj_pads.area2_io_pad\[1\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1172025 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[1\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[1\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[1\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[1\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1230445 4977105 ) ( * 4977830 ) + NEW met2 ( 1229790 4977970 ) ( 1230150 * ) ( * 4978060 ) + via_860_260_hv + NEW met2 ( 1229790 4978150 ) ( 1230515 * ) + NEW met2 TAPERRULE met2_width_280 ( 1230445 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 1191225 4978060 ) ( 1229650 * ) + NEW met1 ( 1190725 4978060 ) via_860_260_hv + NEW met2 ( 1190355 4978150 ) ( 1191085 * ) + NEW met2 TAPERRULE met2_width_280 ( 1190425 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 1169605 4978060 ) ( 1190225 * ) + NEW met1 ( 1169105 4978060 ) via_860_260_hv + NEW met2 ( 1168735 4978150 ) ( 1169465 * ) + NEW met2 TAPERRULE met2_width_280 ( 1168805 4978290 ) ( * 4979365 ) + NEW met2 ( 1168735 4977970 ) ( 1169465 * ) + NEW met2 TAPERRULE met2_width_280 ( 1168805 4977105 ) ( * 4977830 ) + NEW met2 ( 1190355 4977970 ) ( 1191085 * ) + NEW met2 TAPERRULE met2_width_280 ( 1190425 4977105 ) ( * 4977830 ) ; + - mprj_io_vtrip_sel[20] ( mprj_pads.area2_io_pad\[1\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1162825 4977105 ) ( * 4979365 ) ; + - mprj_io_ib_mode_sel[20] + ( mprj_pads.area2_io_pad\[1\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1159605 4977105 ) ( * 4979365 ) ; + - mprj_io_oeb[20] ( mprj_pads.area2_io_pad\[1\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1156385 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[1\]/IN_H + ( mprj_pads.area2_io_pad\[1\] IN_H ) ; + - mprj_io[30] ( mprj_pads.area2_io_pad\[11\] PAD ) ; + - mprj_io_in[30] ( mprj_pads.area2_io_pad\[11\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2917225 ) ( 210895 * ) ; + - mprj_io_one[30] ( mprj_pads.area2_io_pad\[11\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2911245 ) ( 210895 * ) ; + - mprj_io_slow_sel[30] ( mprj_pads.area2_io_pad\[11\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2908025 ) ( 210895 * ) ; + - mprj_analog_io[23] ( mprj_pads.area2_io_pad\[11\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2904805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[11\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[11\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[91] ( mprj_pads.area2_io_pad\[11\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2898825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[11\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[11\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[30] ( mprj_pads.area2_io_pad\[11\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2892845 ) ( 210895 * ) ; + - mprj_io_dm[90] ( mprj_pads.area2_io_pad\[11\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2889625 ) ( 210895 * ) ; + - mprj_io_analog_pol[30] + ( mprj_pads.area2_io_pad\[11\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2886405 ) ( 210895 * ) ; + - mprj_io_inp_dis[30] ( mprj_pads.area2_io_pad\[11\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2883645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[11\]/ENABLE_H + ( mprj_pads.area2_io_pad\[11\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[11\]/HLD_H_N + ( mprj_pads.area2_io_pad\[11\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[11\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 2873915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2873987.5 ) ( 210220 * ) + NEW met1 ( 210360 2874670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2874810 ) ( * 2913775 ) + NEW met1 ( 210360 2913915 ) ( 210480 * ) + NEW met1 ( 210420 2914005 ) via_260_260_vh + NEW met2 ( 208635 2914075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 2914005 ) ( 210895 * ) + NEW met2 ( 208635 2913935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 2914005 ) ( 210220 * ) + NEW met1 ( 210360 2914095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2914235 ) ( * 2920605 ) + NEW met1 ( 210420 2874280 ) via_260_860_vh + NEW met1 ( 210360 2873890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 2873987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[30] + ( mprj_pads.area2_io_pad\[11\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2871225 ) ( 210895 * ) ; + - mprj_io_dm[92] ( mprj_pads.area2_io_pad\[11\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2868005 ) ( 210895 * ) ; + - mprj_io_holdover[30] ( mprj_pads.area2_io_pad\[11\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2864785 ) ( 210895 * ) ; + - mprj_io_out[30] ( mprj_pads.area2_io_pad\[11\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2862025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[11\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[11\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[11\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[11\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 2920442.5 ) ( 210895 * ) + NEW met2 ( 208635 2920515 ) ( 210895 * ) + NEW met1 ( 209880 2920540 ) ( 210000 * ) + NEW met1 ( 209890 2920605 ) ( 209990 * ) + NEW met1 ( 209940 2920150 ) via_260_860_vh + NEW met1 ( 209880 2919760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2881255 ) ( * 2919620 ) + NEW met1 ( 209880 2881115 ) ( 210000 * ) + NEW met1 ( 209940 2880725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2880430 ) ( 210895 * ) + NEW met2 ( 208635 2880355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2880430 ) ( 209740 * ) + NEW met1 ( 209880 2880335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2859635 ) ( * 2880195 ) + NEW met1 ( 209880 2859495 ) ( 210000 * ) + NEW met1 ( 209940 2859105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2858810 ) ( 210895 * ) + NEW met2 ( 208635 2858735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2858810 ) ( 209740 * ) + NEW met1 ( 209880 2858715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2920442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[30] ( mprj_pads.area2_io_pad\[11\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2852825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[30] + ( mprj_pads.area2_io_pad\[11\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2849605 ) ( 210895 * ) ; + - mprj_io_oeb[30] ( mprj_pads.area2_io_pad\[11\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2846385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[11\]/IN_H + ( mprj_pads.area2_io_pad\[11\] IN_H ) ; + - FILLER_9/VSSD ( FILLER_9 VSSD ) ( FILLER_167 VSSD ) + ( FILLER_168 VSSD ) ( FILLER_169 VSSD ) ( FILLER_166 VSSD ) + ( FILLER_165 VSSD ) ( FILLER_164 VSSD ) ( FILLER_163 VSSD ) + ( FILLER_162 VSSD ) ( FILLER_161 VSSD ) ( FILLER_160 VSSD ) + ( FILLER_159 VSSD ) ( FILLER_158 VSSD ) ( FILLER_157 VSSD ) + ( FILLER_153 VSSD ) ( mprj_pads.area1_io_pad\[15\] VSSD ) + ( FILLER_154 VSSD ) ( FILLER_155 VSSD ) ( FILLER_149 VSSD ) + ( FILLER_152 VSSD ) ( FILLER_151 VSSD ) ( FILLER_150 VSSD ) + ( FILLER_145 VSSD ) ( FILLER_148 VSSD ) ( FILLER_147 VSSD ) + ( FILLER_146 VSSD ) ( FILLER_144 VSSD ) ( FILLER_137 VSSD ) + ( user1_vssa_hvclamp_pad\[0\] VSSD ) ( FILLER_140 VSSD ) + ( FILLER_141 VSSD ) ( FILLER_142 VSSD ) ( FILLER_139 VSSD ) + ( FILLER_138 VSSD ) ( FILLER_134 VSSD ) ( FILLER_136 VSSD ) + ( FILLER_135 VSSD ) ( FILLER_131 VSSD ) ( FILLER_133 VSSD ) + ( FILLER_132 VSSD ) ( FILLER_127 VSSD ) ( FILLER_128 VSSD ) + ( FILLER_129 VSSD ) ( mprj_pads.area1_io_pad\[16\] VSSD ) + ( FILLER_123 VSSD ) ( FILLER_126 VSSD ) ( FILLER_125 VSSD ) + ( FILLER_124 VSSD ) ( FILLER_122 VSSD ) ( FILLER_121 VSSD ) + ( FILLER_120 VSSD ) ( FILLER_119 VSSD ) + ( mprj_pads.area1_io_pad\[17\] VSSD ) ( FILLER_118 VSSD ) + ( FILLER_116 VSSD ) ( FILLER_115 VSSD ) ( FILLER_114 VSSD ) + ( FILLER_113 VSSD ) ( FILLER_112 VSSD ) ( FILLER_111 VSSD ) + ( FILLER_110 VSSD ) ( FILLER_109 VSSD ) ( FILLER_108 VSSD ) + ( FILLER_107 VSSD ) ( FILLER_106 VSSD ) ( FILLER_105 VSSD ) + ( FILLER_104 VSSD ) ( FILLER_102 VSSD ) ( FILLER_103 VSSD ) + ( FILLER_98 VSSD ) ( FILLER_101 VSSD ) ( FILLER_100 VSSD ) + ( FILLER_99 VSSD ) ( FILLER_94 VSSD ) + ( mprj_pads.area1_io_pad\[18\] VSSD ) ( FILLER_95 VSSD ) + ( FILLER_96 VSSD ) ( FILLER_93 VSSD ) ( FILLER_92 VSSD ) + ( FILLER_91 VSSD ) ( FILLER_90 VSSD ) ( FILLER_89 VSSD ) + ( FILLER_88 VSSD ) ( FILLER_86 VSSD ) ( FILLER_87 VSSD ) + ( FILLER_SB3 VSSD ) ( disconnect_vdda_0 VSSD ) + ( FILLER_78 VSSD ) ( mgmt_vssio_hvclamp_pad\[1\] VSSD ) + ( FILLER_80 VSSD ) ( FILLER_81 VSSD ) ( FILLER_82 VSSD ) + ( FILLER_79 VSSD ) ( FILLER_75 VSSD ) ( FILLER_77 VSSD ) + ( FILLER_76 VSSD ) ( FILLER_71 VSSD ) ( FILLER_74 VSSD ) + ( FILLER_73 VSSD ) ( FILLER_72 VSSD ) ( FILLER_63 VSSD ) + ( FILLER_68 VSSD ) ( FILLER_69 VSSD ) + ( mprj_pads.area2_io_pad\[0\] VSSD ) ( FILLER_66 VSSD ) + ( FILLER_67 VSSD ) ( FILLER_65 VSSD ) ( FILLER_64 VSSD ) + ( FILLER_59 VSSD ) ( FILLER_62 VSSD ) ( FILLER_61 VSSD ) + ( FILLER_60 VSSD ) ( FILLER_57 VSSD ) ( FILLER_58 VSSD ) + ( FILLER_53 VSSD ) ( FILLER_54 VSSD ) ( FILLER_55 VSSD ) + ( mprj_pads.area2_io_pad\[1\] VSSD ) ( FILLER_48 VSSD ) + ( FILLER_52 VSSD ) ( FILLER_51 VSSD ) ( FILLER_50 VSSD ) + ( FILLER_49 VSSD ) ( FILLER_46 VSSD ) ( FILLER_47 VSSD ) + ( FILLER_44 VSSD ) ( FILLER_45 VSSD ) ( FILLER_38 VSSD ) + ( FILLER_41 VSSD ) ( FILLER_42 VSSD ) + ( mprj_pads.area2_io_pad\[2\] VSSD ) ( FILLER_40 VSSD ) + ( FILLER_39 VSSD ) ( FILLER_35 VSSD ) ( FILLER_37 VSSD ) + ( FILLER_36 VSSD ) ( FILLER_31 VSSD ) ( FILLER_34 VSSD ) + ( FILLER_33 VSSD ) ( FILLER_32 VSSD ) ( FILLER_28 VSSD ) + ( mprj_pads.area2_io_pad\[3\] VSSD ) ( FILLER_29 VSSD ) + ( FILLER_26 VSSD ) ( FILLER_27 VSSD ) ( FILLER_25 VSSD ) + ( FILLER_24 VSSD ) ( FILLER_23 VSSD ) ( FILLER_22 VSSD ) + ( FILLER_21 VSSD ) ( FILLER_20 VSSD ) ( FILLER_19 VSSD ) + ( FILLER_18 VSSD ) ( FILLER_14 VSSD ) ( FILLER_15 VSSD ) + ( FILLER_16 VSSD ) ( mprj_pads.area2_io_pad\[4\] VSSD ) + ( FILLER_10 VSSD ) ( FILLER_13 VSSD ) ( FILLER_12 VSSD ) + ( FILLER_11 VSSD ) ( FILLER_6 VSSD ) ( FILLER_8 VSSD ) + ( FILLER_7 VSSD ) ( FILLER_5 VSSD ) ( FILLER_SB2 VSSD ) + ( user2_corner VSSD ) ( user1_corner VSSD ) ( FILLER_603 VSSD ) + ( FILLER_604 VSSD ) ( FILLER_601 VSSD ) ( FILLER_810 VSSD ) + ( FILLER_811 VSSD ) ( FILLER_602 VSSD ) ( FILLER_809 VSSD ) + ( FILLER_596 VSSD ) ( FILLER_600 VSSD ) ( FILLER_808 VSSD ) + ( FILLER_599 VSSD ) ( FILLER_807 VSSD ) ( FILLER_598 VSSD ) + ( FILLER_806 VSSD ) ( FILLER_597 VSSD ) ( FILLER_805 VSSD ) + ( FILLER_804 VSSD ) ( FILLER_595 VSSD ) + ( mprj_pads.area1_io_pad\[14\] VSSD ) ( FILLER_803 VSSD ) + ( FILLER_593 VSSD ) ( mprj_pads.area2_io_pad\[5\] VSSD ) + ( FILLER_592 VSSD ) ( FILLER_801 VSSD ) ( FILLER_591 VSSD ) + ( FILLER_800 VSSD ) ( FILLER_590 VSSD ) ( FILLER_799 VSSD ) + ( FILLER_798 VSSD ) ( FILLER_589 VSSD ) ( FILLER_797 VSSD ) + ( FILLER_588 VSSD ) ( FILLER_796 VSSD ) ( FILLER_587 VSSD ) + ( FILLER_586 VSSD ) ( FILLER_585 VSSD ) ( FILLER_794 VSSD ) + ( FILLER_795 VSSD ) ( FILLER_791 VSSD ) ( FILLER_583 VSSD ) + ( user2_vccd_lvclamp_pad VSSD ) ( FILLER_582 VSSD ) + ( FILLER_581 VSSD ) ( FILLER_792 VSSD ) + ( user1_vccd_lvclamp_pad VSSD ) ( FILLER_580 VSSD ) + ( FILLER_576 VSSD ) ( FILLER_790 VSSD ) ( FILLER_579 VSSD ) + ( FILLER_789 VSSD ) ( FILLER_578 VSSD ) ( FILLER_788 VSSD ) + ( FILLER_577 VSSD ) ( FILLER_787 VSSD ) ( FILLER_786 VSSD ) + ( FILLER_575 VSSD ) ( FILLER_785 VSSD ) ( FILLER_570 VSSD ) + ( FILLER_784 VSSD ) ( FILLER_573 VSSD ) + ( mgmt_vddio_hvclamp_pad\[1\] VSSD ) ( FILLER_572 VSSD ) + ( FILLER_571 VSSD ) ( mprj_pads.area1_io_pad\[13\] VSSD ) + ( FILLER_782 VSSD ) ( FILLER_781 VSSD ) ( FILLER_569 VSSD ) + ( FILLER_780 VSSD ) ( FILLER_568 VSSD ) ( FILLER_779 VSSD ) + ( FILLER_567 VSSD ) ( FILLER_566 VSSD ) ( FILLER_778 VSSD ) + ( FILLER_565 VSSD ) ( FILLER_777 VSSD ) ( FILLER_776 VSSD ) + ( FILLER_560 VSSD ) ( FILLER_775 VSSD ) + ( user2_vssa_hvclamp_pad VSSD ) ( FILLER_562 VSSD ) + ( FILLER_563 VSSD ) ( FILLER_561 VSSD ) + ( user1_vdda_hvclamp_pad\[0\] VSSD ) ( FILLER_773 VSSD ) + ( FILLER_772 VSSD ) ( FILLER_771 VSSD ) ( FILLER_559 VSSD ) + ( FILLER_770 VSSD ) ( FILLER_558 VSSD ) ( FILLER_769 VSSD ) + ( FILLER_557 VSSD ) ( FILLER_556 VSSD ) ( FILLER_555 VSSD ) + ( FILLER_768 VSSD ) ( FILLER_766 VSSD ) ( FILLER_767 VSSD ) + ( FILLER_765 VSSD ) ( FILLER_550 VSSD ) ( FILLER_553 VSSD ) + ( mprj_pads.area2_io_pad\[6\] VSSD ) ( FILLER_552 VSSD ) + ( FILLER_551 VSSD ) ( FILLER_546 VSSD ) + ( mprj_pads.area1_io_pad\[12\] VSSD ) ( FILLER_549 VSSD ) + ( FILLER_763 VSSD ) ( FILLER_548 VSSD ) ( FILLER_762 VSSD ) + ( FILLER_547 VSSD ) ( FILLER_761 VSSD ) ( FILLER_760 VSSD ) + ( FILLER_759 VSSD ) ( FILLER_545 VSSD ) ( FILLER_758 VSSD ) + ( FILLER_757 VSSD ) ( FILLER_540 VSSD ) ( FILLER_756 VSSD ) + ( FILLER_543 VSSD ) ( mprj_pads.area2_io_pad\[7\] VSSD ) + ( FILLER_542 VSSD ) ( FILLER_541 VSSD ) + ( mprj_pads.area1_io_pad\[11\] VSSD ) ( FILLER_539 VSSD ) + ( FILLER_754 VSSD ) ( FILLER_753 VSSD ) ( FILLER_538 VSSD ) + ( FILLER_752 VSSD ) ( FILLER_537 VSSD ) ( FILLER_536 VSSD ) + ( FILLER_535 VSSD ) ( FILLER_751 VSSD ) ( FILLER_750 VSSD ) + ( FILLER_747 VSSD ) ( FILLER_749 VSSD ) ( FILLER_748 VSSD ) + ( FILLER_531 VSSD ) ( FILLER_533 VSSD ) + ( mprj_pads.area2_io_pad\[8\] VSSD ) ( FILLER_532 VSSD ) + ( FILLER_743 VSSD ) ( FILLER_530 VSSD ) ( FILLER_529 VSSD ) + ( FILLER_744 VSSD ) ( FILLER_745 VSSD ) + ( mprj_pads.area1_io_pad\[10\] VSSD ) ( FILLER_528 VSSD ) + ( FILLER_527 VSSD ) ( FILLER_525 VSSD ) ( FILLER_742 VSSD ) + ( FILLER_526 VSSD ) ( FILLER_740 VSSD ) ( FILLER_741 VSSD ) + ( FILLER_737 VSSD ) ( FILLER_739 VSSD ) ( FILLER_738 VSSD ) + ( FILLER_521 VSSD ) ( FILLER_523 VSSD ) + ( mprj_pads.area2_io_pad\[9\] VSSD ) ( FILLER_522 VSSD ) + ( FILLER_517 VSSD ) ( FILLER_520 VSSD ) ( FILLER_519 VSSD ) + ( FILLER_518 VSSD ) ( mprj_pads.area1_io_pad\[9\] VSSD ) + ( FILLER_735 VSSD ) ( FILLER_734 VSSD ) ( FILLER_515 VSSD ) + ( FILLER_516 VSSD ) ( FILLER_733 VSSD ) ( FILLER_732 VSSD ) + ( FILLER_728 VSSD ) ( FILLER_731 VSSD ) ( FILLER_730 VSSD ) + ( FILLER_729 VSSD ) ( FILLER_513 VSSD ) + ( mprj_pads.area2_io_pad\[10\] VSSD ) ( FILLER_512 VSSD ) + ( FILLER_511 VSSD ) ( FILLER_507 VSSD ) ( FILLER_510 VSSD ) + ( FILLER_509 VSSD ) ( FILLER_508 VSSD ) ( FILLER_726 VSSD ) + ( mprj_pads.area1_io_pad\[8\] VSSD ) ( FILLER_725 VSSD ) + ( FILLER_724 VSSD ) ( FILLER_506 VSSD ) ( FILLER_505 VSSD ) + ( FILLER_723 VSSD ) ( FILLER_722 VSSD ) ( FILLER_721 VSSD ) + ( FILLER_720 VSSD ) ( FILLER_719 VSSD ) ( FILLER_501 VSSD ) + ( FILLER_502 VSSD ) ( FILLER_503 VSSD ) + ( mprj_pads.area2_io_pad\[11\] VSSD ) ( FILLER_718 VSSD ) + ( FILLER_497 VSSD ) ( FILLER_500 VSSD ) ( FILLER_499 VSSD ) + ( FILLER_498 VSSD ) ( FILLER_495 VSSD ) + ( mprj_pads.area1_io_pad\[7\] VSSD ) ( FILLER_716 VSSD ) + ( FILLER_496 VSSD ) ( FILLER_715 VSSD ) ( FILLER_714 VSSD ) + ( FILLER_492 VSSD ) ( FILLER_713 VSSD ) ( FILLER_712 VSSD ) + ( FILLER_711 VSSD ) ( mprj_pads.area2_io_pad\[12\] VSSD ) + ( FILLER_493 VSSD ) ( FILLER_710 VSSD ) ( FILLER_709 VSSD ) + ( FILLER_491 VSSD ) ( FILLER_488 VSSD ) ( FILLER_490 VSSD ) + ( FILLER_489 VSSD ) ( user1_vdda_hvclamp_pad\[1\] VSSD ) + ( FILLER_487 VSSD ) ( FILLER_707 VSSD ) ( FILLER_706 VSSD ) + ( FILLER_486 VSSD ) ( FILLER_485 VSSD ) ( FILLER_705 VSSD ) + ( FILLER_704 VSSD ) ( FILLER_703 VSSD ) ( FILLER_702 VSSD ) + ( FILLER_481 VSSD ) ( FILLER_482 VSSD ) ( FILLER_483 VSSD ) + ( user2_vdda_hvclamp_pad VSSD ) ( FILLER_701 VSSD ) + ( FILLER_700 VSSD ) ( FILLER_478 VSSD ) ( FILLER_480 VSSD ) + ( FILLER_479 VSSD ) ( FILLER_476 VSSD ) ( FILLER_477 VSSD ) + ( FILLER_698 VSSD ) ( user1_vssd_lvclamp_pad VSSD ) + ( FILLER_697 VSSD ) ( FILLER_475 VSSD ) ( FILLER_693 VSSD ) + ( FILLER_696 VSSD ) ( FILLER_695 VSSD ) ( FILLER_694 VSSD ) + ( FILLER_472 VSSD ) ( FILLER_473 VSSD ) + ( user2_vssd_lvclamp_pad VSSD ) ( FILLER_692 VSSD ) + ( FILLER_690 VSSD ) ( FILLER_471 VSSD ) ( FILLER_691 VSSD ) + ( FILLER_470 VSSD ) ( FILLER_468 VSSD ) ( FILLER_469 VSSD ) + ( user1_vssa_hvclamp_pad\[1\] VSSD ) ( FILLER_467 VSSD ) + ( FILLER_466 VSSD ) ( FILLER_688 VSSD ) ( FILLER_465 VSSD ) + ( FILLER_687 VSSD ) ( FILLER_686 VSSD ) ( FILLER_685 VSSD ) + ( FILLER_684 VSSD ) ( FILLER_462 VSSD ) ( FILLER_463 VSSD ) + ( mprj_pads.area2_io_pad\[13\] VSSD ) ( FILLER_683 VSSD ) + ( FILLER_682 VSSD ) ( FILLER_461 VSSD ) ( FILLER_681 VSSD ) + ( FILLER_460 VSSD ) ( FILLER_458 VSSD ) ( FILLER_459 VSSD ) + ( FILLER_679 VSSD ) ( FILLER_457 VSSD ) ( FILLER_456 VSSD ) + ( mprj_pads.area1_io_pad\[6\] VSSD ) ( FILLER_455 VSSD ) + ( FILLER_675 VSSD ) ( FILLER_678 VSSD ) ( FILLER_677 VSSD ) + ( FILLER_676 VSSD ) ( FILLER_453 VSSD ) + ( mprj_pads.area2_io_pad\[14\] VSSD ) ( FILLER_674 VSSD ) + ( FILLER_671 VSSD ) ( FILLER_452 VSSD ) ( FILLER_451 VSSD ) + ( FILLER_673 VSSD ) ( FILLER_450 VSSD ) ( FILLER_672 VSSD ) + ( FILLER_449 VSSD ) ( FILLER_448 VSSD ) ( FILLER_446 VSSD ) + ( FILLER_447 VSSD ) ( FILLER_445 VSSD ) ( FILLER_666 VSSD ) + ( mprj_pads.area1_io_pad\[5\] VSSD ) ( FILLER_669 VSSD ) + ( FILLER_668 VSSD ) ( FILLER_667 VSSD ) ( FILLER_662 VSSD ) + ( FILLER_443 VSSD ) ( mprj_pads.area2_io_pad\[15\] VSSD ) + ( FILLER_442 VSSD ) ( FILLER_665 VSSD ) ( FILLER_441 VSSD ) + ( FILLER_664 VSSD ) ( FILLER_440 VSSD ) ( FILLER_663 VSSD ) + ( FILLER_439 VSSD ) ( FILLER_438 VSSD ) ( FILLER_436 VSSD ) + ( FILLER_437 VSSD ) ( FILLER_435 VSSD ) + ( mprj_pads.area1_io_pad\[4\] VSSD ) ( FILLER_660 VSSD ) + ( FILLER_659 VSSD ) ( FILLER_658 VSSD ) ( FILLER_657 VSSD ) + ( FILLER_433 VSSD ) ( mprj_pads.area2_io_pad\[16\] VSSD ) + ( FILLER_656 VSSD ) ( FILLER_432 VSSD ) ( FILLER_431 VSSD ) + ( FILLER_655 VSSD ) ( FILLER_430 VSSD ) ( FILLER_429 VSSD ) + ( FILLER_654 VSSD ) ( FILLER_653 VSSD ) ( FILLER_428 VSSD ) + ( FILLER_426 VSSD ) ( FILLER_427 VSSD ) ( FILLER_425 VSSD ) + ( FILLER_649 VSSD ) ( mprj_pads.area1_io_pad\[3\] VSSD ) + ( FILLER_650 VSSD ) ( FILLER_651 VSSD ) ( FILLER_645 VSSD ) + ( FILLER_648 VSSD ) ( FILLER_423 VSSD ) + ( mprj_pads.area2_io_pad\[17\] VSSD ) ( FILLER_422 VSSD ) + ( FILLER_647 VSSD ) ( FILLER_421 VSSD ) ( FILLER_646 VSSD ) + ( FILLER_420 VSSD ) ( FILLER_419 VSSD ) ( FILLER_643 VSSD ) + ( FILLER_644 VSSD ) ( FILLER_418 VSSD ) ( FILLER_416 VSSD ) + ( FILLER_417 VSSD ) ( FILLER_415 VSSD ) ( FILLER_640 VSSD ) + ( FILLER_641 VSSD ) ( mprj_pads.area1_io_pad\[2\] VSSD ) + ( FILLER_409 VSSD ) ( FILLER_639 VSSD ) ( FILLER_413 VSSD ) + ( mprj_pads.area2_io_pad\[18\] VSSD ) ( FILLER_412 VSSD ) + ( FILLER_411 VSSD ) ( FILLER_638 VSSD ) ( FILLER_410 VSSD ) + ( FILLER_637 VSSD ) ( FILLER_636 VSSD ) ( FILLER_408 VSSD ) + ( FILLER_634 VSSD ) ( FILLER_635 VSSD ) ( FILLER_407 VSSD ) + ( FILLER_406 VSSD ) ( FILLER_405 VSSD ) ( FILLER_SB1 VSSD ) + ( FILLER_401 VSSD ) ( FILLER_402 VSSD ) + ( disconnect_vdda_2 VSSD ) ( FILLER_400 VSSD ) + ( FILLER_399 VSSD ) ( FILLER_632 VSSD ) + ( mprj_pads.area1_io_pad\[1\] VSSD ) ( FILLER_631 VSSD ) + ( FILLER_398 VSSD ) ( FILLER_397 VSSD ) ( FILLER_630 VSSD ) + ( FILLER_629 VSSD ) ( FILLER_396 VSSD ) ( FILLER_395 VSSD ) + ( FILLER_628 VSSD ) ( FILLER_627 VSSD ) ( FILLER_394 VSSD ) + ( FILLER_626 VSSD ) ( FILLER_625 VSSD ) ( FILLER_389 VSSD ) + ( FILLER_624 VSSD ) ( FILLER_392 VSSD ) + ( mgmt_vddio_hvclamp_pad\[0\] VSSD ) ( FILLER_391 VSSD ) + ( FILLER_390 VSSD ) ( mprj_pads.area1_io_pad\[0\] VSSD ) + ( FILLER_622 VSSD ) ( FILLER_621 VSSD ) ( FILLER_388 VSSD ) + ( FILLER_620 VSSD ) ( FILLER_387 VSSD ) ( FILLER_619 VSSD ) + ( FILLER_386 VSSD ) ( FILLER_385 VSSD ) ( FILLER_618 VSSD ) + ( FILLER_384 VSSD ) ( FILLER_617 VSSD ) ( FILLER_616 VSSD ) + ( FILLER_615 VSSD ) ( FILLER_612 VSSD ) ( FILLER_611 VSSD ) + ( disconnect_vdda_1 VSSD ) ( FILLER_610 VSSD ) + ( FILLER_382 VSSD ) ( mgmt_vccd_lvclamp_pad VSSD ) + ( FILLER_381 VSSD ) ( FILLER_380 VSSD ) ( FILLER_379 VSSD ) + ( FILLER_609 VSSD ) ( FILLER_608 VSSD ) ( FILLER_378 VSSD ) + ( FILLER_607 VSSD ) ( FILLER_606 VSSD ) ( FILLER_377 VSSD ) + ( FILLER_376 VSSD ) ( FILLER_375 VSSD ) ; + - mprj_io[18] ( mprj_pads.area1_io_pad\[18\] PAD ) ; + - mprj_io_in[18] ( mprj_pads.area1_io_pad\[18\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1994225 4977105 ) ( * 4979365 ) ; + - mprj_io_one[18] ( mprj_pads.area1_io_pad\[18\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1988245 4977105 ) ( * 4979365 ) ; + - mprj_io_slow_sel[18] ( mprj_pads.area1_io_pad\[18\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1985025 4977105 ) ( * 4979365 ) ; + - mprj_analog_io[11] ( mprj_pads.area1_io_pad\[18\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1981805 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[18\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[18\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[55] ( mprj_pads.area1_io_pad\[18\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1975825 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[18\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[18\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[18] ( mprj_pads.area1_io_pad\[18\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1969845 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[54] ( mprj_pads.area1_io_pad\[18\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1966625 4977105 ) ( * 4979365 ) ; + - mprj_io_analog_pol[18] + ( mprj_pads.area1_io_pad\[18\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1963405 4977105 ) ( * 4979365 ) ; + - mprj_io_inp_dis[18] ( mprj_pads.area1_io_pad\[18\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1960645 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[18\]/ENABLE_H + ( mprj_pads.area1_io_pad\[18\] ENABLE_H ) ; + - mprj_pads.area1_io_pad\[18\]/HLD_H_N + ( mprj_pads.area1_io_pad\[18\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[18\] TIE_HI_ESD ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1950985 4977105 ) ( * 4977350 ) + NEW met2 ( 1950915 4977490 ) ( 1951640 * ) + NEW met2 ( 1950915 4977670 ) ( 1951640 * ) + NEW met2 TAPERRULE met2_width_280 ( 1950985 4977810 ) ( * 4979365 ) + NEW met2 ( 1951280 4977580 ) via_860_260_hv + NEW met1 TAPERRULE met1_width_240 ( 1951780 4977580 ) ( 1991005 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 1991005 4977780 ) ( * 4979365 ) + NEW met2 TAPERRULE met2_width_280 ( 1991005 4977105 ) ( * 4977380 ) + NEW met1 TAPERRULE met1_width_240 ( 1991205 4977580 ) ( 1997605 * ) ; + - mprj_io_analog_sel[18] + ( mprj_pads.area1_io_pad\[18\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1948225 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[56] ( mprj_pads.area1_io_pad\[18\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1945005 4977105 ) ( * 4979365 ) ; + - mprj_io_holdover[18] ( mprj_pads.area1_io_pad\[18\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1941785 4977105 ) ( * 4979365 ) ; + - mprj_io_out[18] ( mprj_pads.area1_io_pad\[18\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1939025 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[18\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[18\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[18\] ENABLE_INP_H ) + ( mprj_pads.area1_io_pad\[18\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1997445 4977105 ) ( * 4977830 ) + NEW met2 ( 1996790 4977970 ) ( 1997150 * ) ( * 4978060 ) + via_860_260_hv + NEW met2 ( 1996790 4978150 ) ( 1997515 * ) + NEW met2 TAPERRULE met2_width_280 ( 1997445 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 1958225 4978060 ) ( 1996650 * ) + NEW met1 ( 1957725 4978060 ) via_860_260_hv + NEW met2 ( 1957355 4978150 ) ( 1958085 * ) + NEW met2 TAPERRULE met2_width_280 ( 1957425 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 1936605 4978060 ) ( 1957225 * ) + NEW met1 ( 1936105 4978060 ) via_860_260_hv + NEW met2 ( 1935735 4978150 ) ( 1936465 * ) + NEW met2 TAPERRULE met2_width_280 ( 1935805 4978290 ) ( * 4979365 ) + NEW met2 ( 1935735 4977970 ) ( 1936465 * ) + NEW met2 TAPERRULE met2_width_280 ( 1935805 4977105 ) ( * 4977830 ) + NEW met2 ( 1957355 4977970 ) ( 1958085 * ) + NEW met2 TAPERRULE met2_width_280 ( 1957425 4977105 ) ( * 4977830 ) ; + - mprj_io_vtrip_sel[18] ( mprj_pads.area1_io_pad\[18\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1929825 4977105 ) ( * 4979365 ) ; + - mprj_io_ib_mode_sel[18] + ( mprj_pads.area1_io_pad\[18\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1926605 4977105 ) ( * 4979365 ) ; + - mprj_io_oeb[18] ( mprj_pads.area1_io_pad\[18\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1923385 4977105 ) ( * 4979365 ) ; + - mprj_pads.area1_io_pad\[18\]/IN_H + ( mprj_pads.area1_io_pad\[18\] IN_H ) ; + - vdda2_pad ( user2_vdda_hvclamp_pad VDDA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 64465 2422850 ) ( * 2482090 ) ; + - mprj_io[3] ( mprj_pads.area1_io_pad\[3\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 1184000 ) ( * 1245000 ) ; + - mprj_pads.area1_io_pad\[3\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[3\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[3\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[3\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 1178557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 1179240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1179380 ) ( * 1217745 ) + NEW met1 ( 3378000 1217885 ) ( 3378120 * ) + NEW met1 ( 3378060 1218275 ) via_260_860_vh + NEW met2 ( 3377105 1218645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1218570 ) ( 3379365 * ) + NEW met1 ( 3378000 1218665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1218805 ) ( * 1239365 ) + NEW met1 ( 3378000 1239505 ) ( 3378120 * ) + NEW met1 ( 3378060 1239895 ) via_260_860_vh + NEW met2 ( 3377105 1240265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1240190 ) ( 3379365 * ) + NEW met1 ( 3378000 1240285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1240190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1218570 ) ( 3377860 * ) + NEW met2 ( 3378060 1178850 ) via_260_860_vh ( * 1178460 ) + ( 3378120 * ) + NEW met1 ( 3378010 1178395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 1178557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 1178485 ) ( 3379365 * ) ; + - mprj_io_in[3] ( mprj_pads.area1_io_pad\[3\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1181775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[3\]/HLD_H_N + ( mprj_pads.area1_io_pad\[3\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[3\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 1225085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 1225012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 1225110 ) ( 3377640 * ) + NEW met1 ( 3377580 1224720 ) via_260_860_vh + NEW met1 ( 3377520 1224330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1185225 ) ( * 1224190 ) + NEW met1 ( 3377520 1185085 ) ( 3377640 * ) + NEW met1 ( 3377580 1184995 ) via_260_260_vh + NEW met2 ( 3377105 1185065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 1184995 ) ( 3379365 * ) + NEW met2 ( 3377105 1184925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 1184995 ) ( 3377380 * ) + NEW met1 ( 3377520 1184905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1178395 ) ( * 1184765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 1225012.5 ) ( 3377380 * ) ; + - mprj_io_one[3] ( mprj_pads.area1_io_pad\[3\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1187755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[3] ( mprj_pads.area1_io_pad\[3\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1190975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[3\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[3\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[3\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[3\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[10] ( mprj_pads.area1_io_pad\[3\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1200175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[3\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[3\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[3] ( mprj_pads.area1_io_pad\[3\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1206155 ) ( 3379365 * ) ; + - mprj_io_dm[9] ( mprj_pads.area1_io_pad\[3\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1209375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[3] ( mprj_pads.area1_io_pad\[3\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1212595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[3] ( mprj_pads.area1_io_pad\[3\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1215355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[3\]/ENABLE_H + ( mprj_pads.area1_io_pad\[3\] ENABLE_H ) ; + - mprj_io_analog_sel[3] ( mprj_pads.area1_io_pad\[3\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1227775 ) ( 3379365 * ) ; + - mprj_io_dm[11] ( mprj_pads.area1_io_pad\[3\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1230995 ) ( 3379365 * ) ; + - mprj_io_holdover[3] ( mprj_pads.area1_io_pad\[3\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1234215 ) ( 3379365 * ) ; + - mprj_io_out[3] ( mprj_pads.area1_io_pad\[3\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1236975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[3] ( mprj_pads.area1_io_pad\[3\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1246175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[3] + ( mprj_pads.area1_io_pad\[3\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1249395 ) ( 3379365 * ) ; + - mprj_io_oeb[3] ( mprj_pads.area1_io_pad\[3\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1252615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[3\]/IN_H + ( mprj_pads.area1_io_pad\[3\] IN_H ) ; + - gpio_pad/VCCD ( gpio_pad VCCD ) ( FILLER_167 VCCD ) + ( FILLER_168 VCCD ) ( FILLER_169 VCCD ) ( FILLER_166 VCCD ) + ( FILLER_165 VCCD ) ( FILLER_164 VCCD ) ( FILLER_163 VCCD ) + ( FILLER_162 VCCD ) ( FILLER_161 VCCD ) ( FILLER_160 VCCD ) + ( FILLER_159 VCCD ) ( FILLER_158 VCCD ) ( FILLER_157 VCCD ) + ( FILLER_153 VCCD ) ( mprj_pads.area1_io_pad\[15\] VCCD ) + ( FILLER_154 VCCD ) ( FILLER_155 VCCD ) ( FILLER_149 VCCD ) + ( FILLER_152 VCCD ) ( FILLER_151 VCCD ) ( FILLER_150 VCCD ) + ( FILLER_145 VCCD ) ( FILLER_148 VCCD ) ( FILLER_147 VCCD ) + ( FILLER_146 VCCD ) ( FILLER_144 VCCD ) ( FILLER_137 VCCD ) + ( user1_vssa_hvclamp_pad\[0\] VCCD ) ( FILLER_140 VCCD ) + ( FILLER_141 VCCD ) ( FILLER_142 VCCD ) ( FILLER_139 VCCD ) + ( FILLER_138 VCCD ) ( FILLER_134 VCCD ) ( FILLER_136 VCCD ) + ( FILLER_135 VCCD ) ( FILLER_131 VCCD ) ( FILLER_133 VCCD ) + ( FILLER_132 VCCD ) ( FILLER_127 VCCD ) ( FILLER_128 VCCD ) + ( FILLER_129 VCCD ) ( mprj_pads.area1_io_pad\[16\] VCCD ) + ( FILLER_123 VCCD ) ( FILLER_126 VCCD ) ( FILLER_125 VCCD ) + ( FILLER_124 VCCD ) ( FILLER_122 VCCD ) ( FILLER_121 VCCD ) + ( FILLER_120 VCCD ) ( FILLER_119 VCCD ) + ( mprj_pads.area1_io_pad\[17\] VCCD ) ( FILLER_118 VCCD ) + ( FILLER_116 VCCD ) ( FILLER_115 VCCD ) ( FILLER_114 VCCD ) + ( FILLER_113 VCCD ) ( FILLER_112 VCCD ) ( FILLER_111 VCCD ) + ( FILLER_110 VCCD ) ( FILLER_109 VCCD ) ( FILLER_108 VCCD ) + ( FILLER_107 VCCD ) ( FILLER_106 VCCD ) ( FILLER_105 VCCD ) + ( FILLER_104 VCCD ) ( FILLER_102 VCCD ) ( FILLER_103 VCCD ) + ( FILLER_98 VCCD ) ( FILLER_101 VCCD ) ( FILLER_100 VCCD ) + ( FILLER_99 VCCD ) ( FILLER_94 VCCD ) + ( mprj_pads.area1_io_pad\[18\] VCCD ) ( FILLER_95 VCCD ) + ( FILLER_96 VCCD ) ( FILLER_93 VCCD ) ( FILLER_92 VCCD ) + ( FILLER_91 VCCD ) ( FILLER_90 VCCD ) ( FILLER_89 VCCD ) + ( FILLER_88 VCCD ) ( FILLER_86 VCCD ) ( FILLER_87 VCCD ) + ( FILLER_SB3 VCCD ) ( disconnect_vdda_0 VCCD ) + ( FILLER_78 VCCD ) ( mgmt_vssio_hvclamp_pad\[1\] VCCD ) + ( FILLER_80 VCCD ) ( FILLER_81 VCCD ) ( FILLER_82 VCCD ) + ( FILLER_79 VCCD ) ( FILLER_75 VCCD ) ( FILLER_77 VCCD ) + ( FILLER_76 VCCD ) ( FILLER_71 VCCD ) ( FILLER_74 VCCD ) + ( FILLER_73 VCCD ) ( FILLER_72 VCCD ) ( FILLER_63 VCCD ) + ( FILLER_68 VCCD ) ( FILLER_69 VCCD ) + ( mprj_pads.area2_io_pad\[0\] VCCD ) ( FILLER_66 VCCD ) + ( FILLER_67 VCCD ) ( FILLER_65 VCCD ) ( FILLER_64 VCCD ) + ( FILLER_59 VCCD ) ( FILLER_62 VCCD ) ( FILLER_61 VCCD ) + ( FILLER_60 VCCD ) ( FILLER_57 VCCD ) ( FILLER_58 VCCD ) + ( FILLER_53 VCCD ) ( FILLER_54 VCCD ) ( FILLER_55 VCCD ) + ( mprj_pads.area2_io_pad\[1\] VCCD ) ( FILLER_48 VCCD ) + ( FILLER_52 VCCD ) ( FILLER_51 VCCD ) ( FILLER_50 VCCD ) + ( FILLER_49 VCCD ) ( FILLER_46 VCCD ) ( FILLER_47 VCCD ) + ( FILLER_44 VCCD ) ( FILLER_45 VCCD ) ( FILLER_38 VCCD ) + ( FILLER_41 VCCD ) ( FILLER_42 VCCD ) + ( mprj_pads.area2_io_pad\[2\] VCCD ) ( FILLER_40 VCCD ) + ( FILLER_39 VCCD ) ( FILLER_35 VCCD ) ( FILLER_37 VCCD ) + ( FILLER_36 VCCD ) ( FILLER_31 VCCD ) ( FILLER_34 VCCD ) + ( FILLER_33 VCCD ) ( FILLER_32 VCCD ) ( FILLER_28 VCCD ) + ( mprj_pads.area2_io_pad\[3\] VCCD ) ( FILLER_29 VCCD ) + ( FILLER_26 VCCD ) ( FILLER_27 VCCD ) ( FILLER_25 VCCD ) + ( FILLER_24 VCCD ) ( FILLER_23 VCCD ) ( FILLER_22 VCCD ) + ( FILLER_21 VCCD ) ( FILLER_20 VCCD ) ( FILLER_19 VCCD ) + ( FILLER_18 VCCD ) ( FILLER_14 VCCD ) ( FILLER_15 VCCD ) + ( FILLER_16 VCCD ) ( mprj_pads.area2_io_pad\[4\] VCCD ) + ( FILLER_10 VCCD ) ( FILLER_13 VCCD ) ( FILLER_12 VCCD ) + ( FILLER_11 VCCD ) ( FILLER_6 VCCD ) ( FILLER_9 VCCD ) + ( FILLER_8 VCCD ) ( FILLER_7 VCCD ) ( FILLER_5 VCCD ) + ( FILLER_167 VCCHIB ) ( FILLER_168 VCCHIB ) + ( FILLER_169 VCCHIB ) ( FILLER_166 VCCHIB ) + ( FILLER_165 VCCHIB ) ( FILLER_164 VCCHIB ) + ( FILLER_163 VCCHIB ) ( FILLER_162 VCCHIB ) + ( FILLER_161 VCCHIB ) ( FILLER_160 VCCHIB ) + ( FILLER_159 VCCHIB ) ( FILLER_158 VCCHIB ) + ( FILLER_157 VCCHIB ) ( FILLER_153 VCCHIB ) + ( mprj_pads.area1_io_pad\[15\] VCCHIB ) ( FILLER_154 VCCHIB ) + ( FILLER_155 VCCHIB ) ( FILLER_149 VCCHIB ) + ( FILLER_152 VCCHIB ) ( FILLER_151 VCCHIB ) + ( FILLER_150 VCCHIB ) ( FILLER_145 VCCHIB ) + ( FILLER_148 VCCHIB ) ( FILLER_147 VCCHIB ) + ( FILLER_146 VCCHIB ) ( FILLER_144 VCCHIB ) + ( FILLER_137 VCCHIB ) ( user1_vssa_hvclamp_pad\[0\] VCCHIB ) + ( FILLER_140 VCCHIB ) ( FILLER_141 VCCHIB ) + ( FILLER_142 VCCHIB ) ( FILLER_139 VCCHIB ) + ( FILLER_138 VCCHIB ) ( FILLER_134 VCCHIB ) + ( FILLER_136 VCCHIB ) ( FILLER_135 VCCHIB ) + ( FILLER_131 VCCHIB ) ( FILLER_133 VCCHIB ) + ( FILLER_132 VCCHIB ) ( FILLER_127 VCCHIB ) + ( FILLER_128 VCCHIB ) ( FILLER_129 VCCHIB ) + ( mprj_pads.area1_io_pad\[16\] VCCHIB ) ( FILLER_123 VCCHIB ) + ( FILLER_126 VCCHIB ) ( FILLER_125 VCCHIB ) + ( FILLER_124 VCCHIB ) ( FILLER_122 VCCHIB ) + ( FILLER_121 VCCHIB ) ( FILLER_120 VCCHIB ) + ( FILLER_119 VCCHIB ) ( mprj_pads.area1_io_pad\[17\] VCCHIB ) + ( FILLER_118 VCCHIB ) ( FILLER_116 VCCHIB ) + ( FILLER_115 VCCHIB ) ( FILLER_114 VCCHIB ) + ( FILLER_113 VCCHIB ) ( FILLER_112 VCCHIB ) + ( FILLER_111 VCCHIB ) ( FILLER_110 VCCHIB ) + ( FILLER_109 VCCHIB ) ( FILLER_108 VCCHIB ) + ( FILLER_107 VCCHIB ) ( FILLER_106 VCCHIB ) + ( FILLER_105 VCCHIB ) ( FILLER_104 VCCHIB ) + ( FILLER_102 VCCHIB ) ( FILLER_103 VCCHIB ) + ( FILLER_98 VCCHIB ) ( FILLER_101 VCCHIB ) + ( FILLER_100 VCCHIB ) ( FILLER_99 VCCHIB ) ( FILLER_94 VCCHIB ) + ( mprj_pads.area1_io_pad\[18\] VCCHIB ) ( FILLER_95 VCCHIB ) + ( FILLER_96 VCCHIB ) ( FILLER_93 VCCHIB ) ( FILLER_92 VCCHIB ) + ( FILLER_91 VCCHIB ) ( FILLER_90 VCCHIB ) ( FILLER_89 VCCHIB ) + ( FILLER_88 VCCHIB ) ( FILLER_86 VCCHIB ) ( FILLER_87 VCCHIB ) + ( FILLER_SB3 VCCHIB ) ( disconnect_vdda_0 VCCHIB ) + ( FILLER_78 VCCHIB ) ( mgmt_vssio_hvclamp_pad\[1\] VCCHIB ) + ( FILLER_80 VCCHIB ) ( FILLER_81 VCCHIB ) ( FILLER_82 VCCHIB ) + ( FILLER_79 VCCHIB ) ( FILLER_75 VCCHIB ) ( FILLER_77 VCCHIB ) + ( FILLER_76 VCCHIB ) ( FILLER_71 VCCHIB ) ( FILLER_74 VCCHIB ) + ( FILLER_73 VCCHIB ) ( FILLER_72 VCCHIB ) ( FILLER_63 VCCHIB ) + ( FILLER_68 VCCHIB ) ( FILLER_69 VCCHIB ) + ( mprj_pads.area2_io_pad\[0\] VCCHIB ) ( FILLER_66 VCCHIB ) + ( FILLER_67 VCCHIB ) ( FILLER_65 VCCHIB ) ( FILLER_64 VCCHIB ) + ( FILLER_59 VCCHIB ) ( FILLER_62 VCCHIB ) ( FILLER_61 VCCHIB ) + ( FILLER_60 VCCHIB ) ( FILLER_57 VCCHIB ) ( FILLER_58 VCCHIB ) + ( FILLER_53 VCCHIB ) ( FILLER_54 VCCHIB ) ( FILLER_55 VCCHIB ) + ( mprj_pads.area2_io_pad\[1\] VCCHIB ) ( FILLER_48 VCCHIB ) + ( FILLER_52 VCCHIB ) ( FILLER_51 VCCHIB ) ( FILLER_50 VCCHIB ) + ( FILLER_49 VCCHIB ) ( FILLER_46 VCCHIB ) ( FILLER_47 VCCHIB ) + ( FILLER_44 VCCHIB ) ( FILLER_45 VCCHIB ) ( FILLER_38 VCCHIB ) + ( FILLER_41 VCCHIB ) ( FILLER_42 VCCHIB ) + ( mprj_pads.area2_io_pad\[2\] VCCHIB ) ( FILLER_40 VCCHIB ) + ( FILLER_39 VCCHIB ) ( FILLER_35 VCCHIB ) ( FILLER_37 VCCHIB ) + ( FILLER_36 VCCHIB ) ( FILLER_31 VCCHIB ) ( FILLER_34 VCCHIB ) + ( FILLER_33 VCCHIB ) ( FILLER_32 VCCHIB ) ( FILLER_28 VCCHIB ) + ( mprj_pads.area2_io_pad\[3\] VCCHIB ) ( FILLER_29 VCCHIB ) + ( FILLER_26 VCCHIB ) ( FILLER_27 VCCHIB ) ( FILLER_25 VCCHIB ) + ( FILLER_24 VCCHIB ) ( FILLER_23 VCCHIB ) ( FILLER_22 VCCHIB ) + ( FILLER_21 VCCHIB ) ( FILLER_20 VCCHIB ) ( FILLER_19 VCCHIB ) + ( FILLER_18 VCCHIB ) ( FILLER_14 VCCHIB ) ( FILLER_15 VCCHIB ) + ( FILLER_16 VCCHIB ) ( mprj_pads.area2_io_pad\[4\] VCCHIB ) + ( FILLER_10 VCCHIB ) ( FILLER_13 VCCHIB ) ( FILLER_12 VCCHIB ) + ( FILLER_11 VCCHIB ) ( FILLER_6 VCCHIB ) ( FILLER_9 VCCHIB ) + ( FILLER_8 VCCHIB ) ( FILLER_7 VCCHIB ) ( FILLER_5 VCCHIB ) + ( user2_corner VCCHIB ) ( user2_corner VCCD ) + ( FILLER_603 VCCHIB ) ( FILLER_604 VCCHIB ) + ( user1_corner VCCD ) ( FILLER_603 VCCD ) ( FILLER_604 VCCD ) + ( user1_corner VCCHIB ) ( FILLER_810 VCCD ) ( FILLER_811 VCCD ) + ( FILLER_601 VCCHIB ) ( FILLER_810 VCCHIB ) + ( FILLER_811 VCCHIB ) ( FILLER_602 VCCHIB ) ( FILLER_602 VCCD ) + ( FILLER_601 VCCD ) ( FILLER_809 VCCD ) ( FILLER_809 VCCHIB ) + ( FILLER_596 VCCHIB ) ( FILLER_600 VCCHIB ) ( FILLER_600 VCCD ) + ( FILLER_808 VCCD ) ( FILLER_808 VCCHIB ) ( FILLER_599 VCCHIB ) + ( FILLER_599 VCCD ) ( FILLER_807 VCCD ) ( FILLER_807 VCCHIB ) + ( FILLER_598 VCCHIB ) ( FILLER_598 VCCD ) ( FILLER_806 VCCD ) + ( FILLER_806 VCCHIB ) ( FILLER_597 VCCHIB ) ( FILLER_597 VCCD ) + ( FILLER_805 VCCD ) ( FILLER_805 VCCHIB ) ( FILLER_596 VCCD ) + ( FILLER_804 VCCD ) ( FILLER_804 VCCHIB ) ( FILLER_595 VCCHIB ) + ( FILLER_595 VCCD ) ( mprj_pads.area1_io_pad\[14\] VCCD ) + ( FILLER_803 VCCD ) ( FILLER_803 VCCHIB ) ( FILLER_593 VCCHIB ) + ( mprj_pads.area2_io_pad\[5\] VCCHIB ) ( FILLER_593 VCCD ) + ( mprj_pads.area2_io_pad\[5\] VCCD ) ( FILLER_592 VCCHIB ) + ( FILLER_592 VCCD ) ( mprj_pads.area1_io_pad\[14\] VCCHIB ) + ( FILLER_801 VCCD ) ( FILLER_591 VCCHIB ) ( FILLER_591 VCCD ) + ( FILLER_801 VCCHIB ) ( FILLER_800 VCCD ) ( FILLER_800 VCCHIB ) + ( FILLER_590 VCCHIB ) ( FILLER_590 VCCD ) ( FILLER_799 VCCD ) + ( FILLER_799 VCCHIB ) ( FILLER_798 VCCD ) ( FILLER_589 VCCHIB ) + ( FILLER_589 VCCD ) ( FILLER_798 VCCHIB ) ( FILLER_797 VCCD ) + ( FILLER_588 VCCHIB ) ( FILLER_588 VCCD ) ( FILLER_797 VCCHIB ) + ( FILLER_796 VCCD ) ( FILLER_587 VCCHIB ) ( FILLER_587 VCCD ) + ( FILLER_796 VCCHIB ) ( FILLER_586 VCCHIB ) ( FILLER_586 VCCD ) + ( FILLER_585 VCCHIB ) ( FILLER_585 VCCD ) ( FILLER_794 VCCD ) + ( FILLER_795 VCCD ) ( FILLER_795 VCCHIB ) ( FILLER_794 VCCHIB ) + ( FILLER_791 VCCD ) ( FILLER_583 VCCHIB ) + ( user2_vccd_lvclamp_pad VCCHIB ) ( FILLER_583 VCCD ) + ( user2_vccd_lvclamp_pad VCCD ) ( FILLER_582 VCCHIB ) + ( FILLER_582 VCCD ) ( FILLER_581 VCCHIB ) ( FILLER_581 VCCD ) + ( FILLER_792 VCCD ) ( user1_vccd_lvclamp_pad VCCD ) + ( FILLER_792 VCCHIB ) ( user1_vccd_lvclamp_pad VCCHIB ) + ( FILLER_791 VCCHIB ) ( FILLER_580 VCCHIB ) ( FILLER_580 VCCD ) + ( FILLER_576 VCCHIB ) ( FILLER_790 VCCD ) ( FILLER_790 VCCHIB ) + ( FILLER_579 VCCHIB ) ( FILLER_579 VCCD ) ( FILLER_789 VCCD ) + ( FILLER_789 VCCHIB ) ( FILLER_578 VCCHIB ) ( FILLER_578 VCCD ) + ( FILLER_788 VCCD ) ( FILLER_788 VCCHIB ) ( FILLER_577 VCCHIB ) + ( FILLER_577 VCCD ) ( FILLER_787 VCCD ) ( FILLER_787 VCCHIB ) + ( FILLER_576 VCCD ) ( FILLER_786 VCCD ) ( FILLER_786 VCCHIB ) + ( FILLER_575 VCCHIB ) ( FILLER_575 VCCD ) ( FILLER_785 VCCD ) + ( FILLER_785 VCCHIB ) ( FILLER_570 VCCHIB ) ( FILLER_784 VCCD ) + ( FILLER_784 VCCHIB ) ( FILLER_573 VCCHIB ) + ( mgmt_vddio_hvclamp_pad\[1\] VCCHIB ) ( FILLER_573 VCCD ) + ( mgmt_vddio_hvclamp_pad\[1\] VCCD ) ( FILLER_572 VCCHIB ) + ( FILLER_572 VCCD ) ( FILLER_571 VCCHIB ) ( FILLER_571 VCCD ) + ( FILLER_570 VCCD ) ( mprj_pads.area1_io_pad\[13\] VCCD ) + ( FILLER_782 VCCD ) ( mprj_pads.area1_io_pad\[13\] VCCHIB ) + ( FILLER_782 VCCHIB ) ( FILLER_781 VCCD ) ( FILLER_569 VCCHIB ) + ( FILLER_569 VCCD ) ( FILLER_781 VCCHIB ) ( FILLER_780 VCCD ) + ( FILLER_568 VCCHIB ) ( FILLER_568 VCCD ) ( FILLER_780 VCCHIB ) + ( FILLER_779 VCCD ) ( FILLER_567 VCCHIB ) ( FILLER_567 VCCD ) + ( FILLER_779 VCCHIB ) ( FILLER_566 VCCHIB ) ( FILLER_566 VCCD ) + ( FILLER_778 VCCD ) ( FILLER_778 VCCHIB ) ( FILLER_565 VCCHIB ) + ( FILLER_565 VCCD ) ( FILLER_777 VCCD ) ( FILLER_777 VCCHIB ) + ( FILLER_776 VCCD ) ( FILLER_776 VCCHIB ) ( FILLER_560 VCCHIB ) + ( FILLER_775 VCCD ) ( FILLER_775 VCCHIB ) + ( user2_vssa_hvclamp_pad VCCHIB ) + ( user2_vssa_hvclamp_pad VCCD ) ( FILLER_562 VCCHIB ) + ( FILLER_563 VCCHIB ) ( FILLER_562 VCCD ) ( FILLER_563 VCCD ) + ( FILLER_561 VCCHIB ) ( FILLER_561 VCCD ) ( FILLER_560 VCCD ) + ( user1_vdda_hvclamp_pad\[0\] VCCD ) ( FILLER_773 VCCD ) + ( user1_vdda_hvclamp_pad\[0\] VCCHIB ) ( FILLER_773 VCCHIB ) + ( FILLER_772 VCCD ) ( FILLER_772 VCCHIB ) ( FILLER_771 VCCD ) + ( FILLER_559 VCCHIB ) ( FILLER_559 VCCD ) ( FILLER_771 VCCHIB ) + ( FILLER_770 VCCD ) ( FILLER_558 VCCHIB ) ( FILLER_558 VCCD ) + ( FILLER_770 VCCHIB ) ( FILLER_769 VCCD ) ( FILLER_557 VCCHIB ) + ( FILLER_557 VCCD ) ( FILLER_769 VCCHIB ) ( FILLER_556 VCCHIB ) + ( FILLER_556 VCCD ) ( FILLER_555 VCCHIB ) ( FILLER_768 VCCD ) + ( FILLER_768 VCCHIB ) ( FILLER_555 VCCD ) ( FILLER_766 VCCD ) + ( FILLER_767 VCCD ) ( FILLER_767 VCCHIB ) ( FILLER_766 VCCHIB ) + ( FILLER_765 VCCD ) ( FILLER_765 VCCHIB ) ( FILLER_550 VCCHIB ) + ( FILLER_553 VCCHIB ) ( mprj_pads.area2_io_pad\[6\] VCCHIB ) + ( FILLER_553 VCCD ) ( mprj_pads.area2_io_pad\[6\] VCCD ) + ( FILLER_552 VCCHIB ) ( FILLER_552 VCCD ) ( FILLER_551 VCCHIB ) + ( FILLER_551 VCCD ) ( FILLER_550 VCCD ) ( FILLER_546 VCCHIB ) + ( mprj_pads.area1_io_pad\[12\] VCCD ) + ( mprj_pads.area1_io_pad\[12\] VCCHIB ) ( FILLER_549 VCCHIB ) + ( FILLER_549 VCCD ) ( FILLER_763 VCCD ) ( FILLER_763 VCCHIB ) + ( FILLER_548 VCCHIB ) ( FILLER_548 VCCD ) ( FILLER_762 VCCD ) + ( FILLER_762 VCCHIB ) ( FILLER_547 VCCHIB ) ( FILLER_547 VCCD ) + ( FILLER_761 VCCD ) ( FILLER_761 VCCHIB ) ( FILLER_546 VCCD ) + ( FILLER_760 VCCD ) ( FILLER_760 VCCHIB ) ( FILLER_759 VCCD ) + ( FILLER_759 VCCHIB ) ( FILLER_545 VCCHIB ) ( FILLER_545 VCCD ) + ( FILLER_758 VCCD ) ( FILLER_758 VCCHIB ) ( FILLER_757 VCCD ) + ( FILLER_757 VCCHIB ) ( FILLER_540 VCCHIB ) ( FILLER_756 VCCD ) + ( FILLER_756 VCCHIB ) ( FILLER_543 VCCHIB ) + ( mprj_pads.area2_io_pad\[7\] VCCHIB ) ( FILLER_543 VCCD ) + ( mprj_pads.area2_io_pad\[7\] VCCD ) ( FILLER_542 VCCHIB ) + ( FILLER_542 VCCD ) ( FILLER_541 VCCHIB ) ( FILLER_541 VCCD ) + ( FILLER_540 VCCD ) ( mprj_pads.area1_io_pad\[11\] VCCD ) + ( FILLER_539 VCCHIB ) ( FILLER_539 VCCD ) + ( mprj_pads.area1_io_pad\[11\] VCCHIB ) ( FILLER_754 VCCD ) + ( FILLER_754 VCCHIB ) ( FILLER_753 VCCD ) ( FILLER_538 VCCHIB ) + ( FILLER_538 VCCD ) ( FILLER_753 VCCHIB ) ( FILLER_752 VCCD ) + ( FILLER_537 VCCHIB ) ( FILLER_537 VCCD ) ( FILLER_752 VCCHIB ) + ( FILLER_536 VCCHIB ) ( FILLER_536 VCCD ) ( FILLER_535 VCCHIB ) + ( FILLER_751 VCCD ) ( FILLER_751 VCCHIB ) ( FILLER_535 VCCD ) + ( FILLER_750 VCCD ) ( FILLER_750 VCCHIB ) ( FILLER_747 VCCD ) + ( FILLER_749 VCCD ) ( FILLER_749 VCCHIB ) ( FILLER_748 VCCD ) + ( FILLER_748 VCCHIB ) ( FILLER_747 VCCHIB ) + ( FILLER_531 VCCHIB ) ( FILLER_533 VCCHIB ) + ( mprj_pads.area2_io_pad\[8\] VCCHIB ) ( FILLER_533 VCCD ) + ( mprj_pads.area2_io_pad\[8\] VCCD ) ( FILLER_532 VCCHIB ) + ( FILLER_532 VCCD ) ( FILLER_531 VCCD ) ( FILLER_743 VCCD ) + ( FILLER_530 VCCHIB ) ( FILLER_530 VCCD ) ( FILLER_529 VCCHIB ) + ( FILLER_529 VCCD ) ( FILLER_744 VCCD ) ( FILLER_745 VCCD ) + ( mprj_pads.area1_io_pad\[10\] VCCD ) ( FILLER_744 VCCHIB ) + ( FILLER_745 VCCHIB ) ( mprj_pads.area1_io_pad\[10\] VCCHIB ) + ( FILLER_528 VCCHIB ) ( FILLER_528 VCCD ) ( FILLER_743 VCCHIB ) + ( FILLER_527 VCCHIB ) ( FILLER_527 VCCD ) ( FILLER_525 VCCHIB ) + ( FILLER_742 VCCD ) ( FILLER_742 VCCHIB ) ( FILLER_526 VCCHIB ) + ( FILLER_526 VCCD ) ( FILLER_525 VCCD ) ( FILLER_740 VCCD ) + ( FILLER_741 VCCD ) ( FILLER_741 VCCHIB ) ( FILLER_740 VCCHIB ) + ( FILLER_737 VCCD ) ( FILLER_739 VCCD ) ( FILLER_739 VCCHIB ) + ( FILLER_738 VCCD ) ( FILLER_738 VCCHIB ) ( FILLER_737 VCCHIB ) + ( FILLER_521 VCCHIB ) ( FILLER_523 VCCHIB ) + ( mprj_pads.area2_io_pad\[9\] VCCHIB ) ( FILLER_523 VCCD ) + ( mprj_pads.area2_io_pad\[9\] VCCD ) ( FILLER_522 VCCHIB ) + ( FILLER_522 VCCD ) ( FILLER_521 VCCD ) ( FILLER_517 VCCHIB ) + ( FILLER_520 VCCHIB ) ( FILLER_520 VCCD ) ( FILLER_519 VCCHIB ) + ( FILLER_519 VCCD ) ( FILLER_518 VCCHIB ) ( FILLER_518 VCCD ) + ( mprj_pads.area1_io_pad\[9\] VCCD ) + ( mprj_pads.area1_io_pad\[9\] VCCHIB ) ( FILLER_735 VCCD ) + ( FILLER_735 VCCHIB ) ( FILLER_517 VCCD ) ( FILLER_734 VCCD ) + ( FILLER_734 VCCHIB ) ( FILLER_515 VCCHIB ) + ( FILLER_516 VCCHIB ) ( FILLER_516 VCCD ) ( FILLER_733 VCCD ) + ( FILLER_733 VCCHIB ) ( FILLER_515 VCCD ) ( FILLER_732 VCCD ) + ( FILLER_732 VCCHIB ) ( FILLER_728 VCCD ) ( FILLER_731 VCCD ) + ( FILLER_731 VCCHIB ) ( FILLER_730 VCCD ) ( FILLER_730 VCCHIB ) + ( FILLER_729 VCCD ) ( FILLER_729 VCCHIB ) ( FILLER_513 VCCHIB ) + ( mprj_pads.area2_io_pad\[10\] VCCHIB ) ( FILLER_513 VCCD ) + ( mprj_pads.area2_io_pad\[10\] VCCD ) ( FILLER_512 VCCHIB ) + ( FILLER_512 VCCD ) ( FILLER_728 VCCHIB ) ( FILLER_511 VCCHIB ) + ( FILLER_511 VCCD ) ( FILLER_507 VCCHIB ) ( FILLER_510 VCCHIB ) + ( FILLER_510 VCCD ) ( FILLER_509 VCCHIB ) ( FILLER_509 VCCD ) + ( FILLER_508 VCCHIB ) ( FILLER_508 VCCD ) ( FILLER_726 VCCD ) + ( mprj_pads.area1_io_pad\[8\] VCCD ) ( FILLER_726 VCCHIB ) + ( mprj_pads.area1_io_pad\[8\] VCCHIB ) ( FILLER_507 VCCD ) + ( FILLER_725 VCCD ) ( FILLER_725 VCCHIB ) ( FILLER_724 VCCD ) + ( FILLER_506 VCCHIB ) ( FILLER_506 VCCD ) ( FILLER_724 VCCHIB ) + ( FILLER_505 VCCHIB ) ( FILLER_505 VCCD ) ( FILLER_723 VCCD ) + ( FILLER_723 VCCHIB ) ( FILLER_722 VCCD ) ( FILLER_722 VCCHIB ) + ( FILLER_721 VCCD ) ( FILLER_721 VCCHIB ) ( FILLER_720 VCCD ) + ( FILLER_720 VCCHIB ) ( FILLER_719 VCCD ) ( FILLER_719 VCCHIB ) + ( FILLER_501 VCCHIB ) ( FILLER_502 VCCHIB ) + ( FILLER_503 VCCHIB ) ( mprj_pads.area2_io_pad\[11\] VCCHIB ) + ( FILLER_502 VCCD ) ( FILLER_503 VCCD ) + ( mprj_pads.area2_io_pad\[11\] VCCD ) ( FILLER_501 VCCD ) + ( FILLER_718 VCCD ) ( FILLER_718 VCCHIB ) ( FILLER_497 VCCHIB ) + ( FILLER_500 VCCHIB ) ( FILLER_500 VCCD ) ( FILLER_499 VCCHIB ) + ( FILLER_499 VCCD ) ( FILLER_498 VCCHIB ) ( FILLER_498 VCCD ) + ( FILLER_497 VCCD ) ( FILLER_495 VCCHIB ) + ( mprj_pads.area1_io_pad\[7\] VCCD ) + ( mprj_pads.area1_io_pad\[7\] VCCHIB ) ( FILLER_716 VCCD ) + ( FILLER_716 VCCHIB ) ( FILLER_496 VCCHIB ) ( FILLER_496 VCCD ) + ( FILLER_715 VCCD ) ( FILLER_715 VCCHIB ) ( FILLER_495 VCCD ) + ( FILLER_714 VCCD ) ( FILLER_714 VCCHIB ) ( FILLER_492 VCCHIB ) + ( FILLER_713 VCCD ) ( FILLER_713 VCCHIB ) ( FILLER_712 VCCD ) + ( FILLER_712 VCCHIB ) ( FILLER_711 VCCD ) ( FILLER_711 VCCHIB ) + ( mprj_pads.area2_io_pad\[12\] VCCHIB ) + ( mprj_pads.area2_io_pad\[12\] VCCD ) ( FILLER_493 VCCHIB ) + ( FILLER_492 VCCD ) ( FILLER_493 VCCD ) ( FILLER_710 VCCD ) + ( FILLER_710 VCCHIB ) ( FILLER_709 VCCD ) ( FILLER_491 VCCHIB ) + ( FILLER_491 VCCD ) ( FILLER_709 VCCHIB ) ( FILLER_488 VCCHIB ) + ( FILLER_490 VCCHIB ) ( FILLER_490 VCCD ) ( FILLER_489 VCCHIB ) + ( FILLER_489 VCCD ) ( FILLER_488 VCCD ) + ( user1_vdda_hvclamp_pad\[1\] VCCD ) ( FILLER_487 VCCHIB ) + ( FILLER_487 VCCD ) ( FILLER_707 VCCD ) + ( user1_vdda_hvclamp_pad\[1\] VCCHIB ) ( FILLER_707 VCCHIB ) + ( FILLER_706 VCCD ) ( FILLER_486 VCCHIB ) ( FILLER_486 VCCD ) + ( FILLER_706 VCCHIB ) ( FILLER_485 VCCHIB ) ( FILLER_485 VCCD ) + ( FILLER_705 VCCD ) ( FILLER_705 VCCHIB ) ( FILLER_704 VCCD ) + ( FILLER_704 VCCHIB ) ( FILLER_703 VCCD ) ( FILLER_703 VCCHIB ) + ( FILLER_702 VCCD ) ( FILLER_702 VCCHIB ) ( FILLER_481 VCCHIB ) + ( FILLER_482 VCCHIB ) ( FILLER_483 VCCHIB ) + ( user2_vdda_hvclamp_pad VCCHIB ) ( FILLER_482 VCCD ) + ( FILLER_483 VCCD ) ( user2_vdda_hvclamp_pad VCCD ) + ( FILLER_481 VCCD ) ( FILLER_701 VCCD ) ( FILLER_701 VCCHIB ) + ( FILLER_700 VCCD ) ( FILLER_700 VCCHIB ) ( FILLER_478 VCCHIB ) + ( FILLER_480 VCCHIB ) ( FILLER_480 VCCD ) ( FILLER_479 VCCHIB ) + ( FILLER_479 VCCD ) ( FILLER_478 VCCD ) ( FILLER_476 VCCHIB ) + ( FILLER_477 VCCHIB ) ( FILLER_477 VCCD ) ( FILLER_698 VCCD ) + ( user1_vssd_lvclamp_pad VCCD ) ( FILLER_698 VCCHIB ) + ( user1_vssd_lvclamp_pad VCCHIB ) ( FILLER_476 VCCD ) + ( FILLER_697 VCCD ) ( FILLER_697 VCCHIB ) ( FILLER_475 VCCHIB ) + ( FILLER_475 VCCD ) ( FILLER_693 VCCD ) ( FILLER_696 VCCD ) + ( FILLER_696 VCCHIB ) ( FILLER_695 VCCD ) ( FILLER_695 VCCHIB ) + ( FILLER_694 VCCD ) ( FILLER_694 VCCHIB ) ( FILLER_693 VCCHIB ) + ( FILLER_472 VCCHIB ) ( FILLER_473 VCCHIB ) + ( user2_vssd_lvclamp_pad VCCHIB ) ( FILLER_473 VCCD ) + ( user2_vssd_lvclamp_pad VCCD ) ( FILLER_692 VCCD ) + ( FILLER_692 VCCHIB ) ( FILLER_472 VCCD ) ( FILLER_690 VCCD ) + ( FILLER_471 VCCHIB ) ( FILLER_471 VCCD ) ( FILLER_691 VCCD ) + ( FILLER_691 VCCHIB ) ( FILLER_470 VCCHIB ) ( FILLER_470 VCCD ) + ( FILLER_690 VCCHIB ) ( FILLER_468 VCCHIB ) + ( FILLER_469 VCCHIB ) ( FILLER_469 VCCD ) ( FILLER_468 VCCD ) + ( user1_vssa_hvclamp_pad\[1\] VCCD ) ( FILLER_467 VCCHIB ) + ( FILLER_467 VCCD ) ( FILLER_466 VCCHIB ) ( FILLER_466 VCCD ) + ( FILLER_688 VCCD ) ( user1_vssa_hvclamp_pad\[1\] VCCHIB ) + ( FILLER_688 VCCHIB ) ( FILLER_465 VCCHIB ) ( FILLER_465 VCCD ) + ( FILLER_687 VCCD ) ( FILLER_687 VCCHIB ) ( FILLER_686 VCCD ) + ( FILLER_686 VCCHIB ) ( FILLER_685 VCCD ) ( FILLER_685 VCCHIB ) + ( FILLER_684 VCCD ) ( FILLER_684 VCCHIB ) ( FILLER_462 VCCHIB ) + ( FILLER_463 VCCHIB ) ( mprj_pads.area2_io_pad\[13\] VCCHIB ) + ( FILLER_462 VCCD ) ( FILLER_463 VCCD ) + ( mprj_pads.area2_io_pad\[13\] VCCD ) ( FILLER_683 VCCD ) + ( FILLER_683 VCCHIB ) ( FILLER_682 VCCD ) ( FILLER_461 VCCHIB ) + ( FILLER_461 VCCD ) ( FILLER_682 VCCHIB ) ( FILLER_681 VCCD ) + ( FILLER_460 VCCHIB ) ( FILLER_460 VCCD ) ( FILLER_681 VCCHIB ) + ( FILLER_458 VCCHIB ) ( FILLER_459 VCCHIB ) ( FILLER_459 VCCD ) + ( FILLER_458 VCCD ) ( FILLER_679 VCCD ) ( FILLER_457 VCCHIB ) + ( FILLER_457 VCCD ) ( FILLER_456 VCCHIB ) ( FILLER_456 VCCD ) + ( mprj_pads.area1_io_pad\[6\] VCCD ) ( FILLER_679 VCCHIB ) + ( mprj_pads.area1_io_pad\[6\] VCCHIB ) ( FILLER_455 VCCHIB ) + ( FILLER_455 VCCD ) ( FILLER_675 VCCD ) ( FILLER_678 VCCD ) + ( FILLER_678 VCCHIB ) ( FILLER_677 VCCD ) ( FILLER_677 VCCHIB ) + ( FILLER_676 VCCD ) ( FILLER_676 VCCHIB ) ( FILLER_675 VCCHIB ) + ( FILLER_453 VCCHIB ) ( mprj_pads.area2_io_pad\[14\] VCCHIB ) + ( mprj_pads.area2_io_pad\[14\] VCCD ) ( FILLER_674 VCCD ) + ( FILLER_674 VCCHIB ) ( FILLER_453 VCCD ) ( FILLER_452 VCCHIB ) + ( FILLER_671 VCCD ) ( FILLER_452 VCCD ) ( FILLER_451 VCCHIB ) + ( FILLER_451 VCCD ) ( FILLER_673 VCCD ) ( FILLER_673 VCCHIB ) + ( FILLER_450 VCCHIB ) ( FILLER_450 VCCD ) ( FILLER_672 VCCD ) + ( FILLER_672 VCCHIB ) ( FILLER_449 VCCHIB ) ( FILLER_449 VCCD ) + ( FILLER_671 VCCHIB ) ( FILLER_448 VCCHIB ) ( FILLER_448 VCCD ) + ( FILLER_446 VCCHIB ) ( FILLER_447 VCCHIB ) ( FILLER_447 VCCD ) + ( FILLER_446 VCCD ) ( FILLER_445 VCCHIB ) ( FILLER_445 VCCD ) + ( FILLER_666 VCCD ) ( mprj_pads.area1_io_pad\[5\] VCCD ) + ( mprj_pads.area1_io_pad\[5\] VCCHIB ) ( FILLER_669 VCCD ) + ( FILLER_669 VCCHIB ) ( FILLER_668 VCCD ) ( FILLER_668 VCCHIB ) + ( FILLER_667 VCCD ) ( FILLER_667 VCCHIB ) ( FILLER_666 VCCHIB ) + ( FILLER_662 VCCD ) ( FILLER_443 VCCHIB ) + ( mprj_pads.area2_io_pad\[15\] VCCHIB ) ( FILLER_443 VCCD ) + ( mprj_pads.area2_io_pad\[15\] VCCD ) ( FILLER_442 VCCHIB ) + ( FILLER_442 VCCD ) ( FILLER_665 VCCD ) ( FILLER_665 VCCHIB ) + ( FILLER_441 VCCHIB ) ( FILLER_441 VCCD ) ( FILLER_664 VCCD ) + ( FILLER_664 VCCHIB ) ( FILLER_440 VCCHIB ) ( FILLER_440 VCCD ) + ( FILLER_663 VCCD ) ( FILLER_663 VCCHIB ) ( FILLER_439 VCCHIB ) + ( FILLER_439 VCCD ) ( FILLER_662 VCCHIB ) ( FILLER_438 VCCHIB ) + ( FILLER_438 VCCD ) ( FILLER_436 VCCHIB ) ( FILLER_437 VCCHIB ) + ( FILLER_437 VCCD ) ( FILLER_436 VCCD ) ( FILLER_435 VCCHIB ) + ( FILLER_435 VCCD ) ( mprj_pads.area1_io_pad\[4\] VCCD ) + ( mprj_pads.area1_io_pad\[4\] VCCHIB ) ( FILLER_660 VCCD ) + ( FILLER_660 VCCHIB ) ( FILLER_659 VCCD ) ( FILLER_659 VCCHIB ) + ( FILLER_658 VCCD ) ( FILLER_658 VCCHIB ) ( FILLER_657 VCCD ) + ( FILLER_433 VCCHIB ) ( mprj_pads.area2_io_pad\[16\] VCCHIB ) + ( FILLER_433 VCCD ) ( mprj_pads.area2_io_pad\[16\] VCCD ) + ( FILLER_657 VCCHIB ) ( FILLER_656 VCCD ) ( FILLER_432 VCCHIB ) + ( FILLER_432 VCCD ) ( FILLER_431 VCCHIB ) ( FILLER_431 VCCD ) + ( FILLER_656 VCCHIB ) ( FILLER_655 VCCD ) ( FILLER_430 VCCHIB ) + ( FILLER_430 VCCD ) ( FILLER_655 VCCHIB ) ( FILLER_429 VCCHIB ) + ( FILLER_429 VCCD ) ( FILLER_654 VCCD ) ( FILLER_654 VCCHIB ) + ( FILLER_653 VCCD ) ( FILLER_428 VCCHIB ) ( FILLER_428 VCCD ) + ( FILLER_653 VCCHIB ) ( FILLER_426 VCCHIB ) + ( FILLER_427 VCCHIB ) ( FILLER_427 VCCD ) ( FILLER_426 VCCD ) + ( FILLER_425 VCCHIB ) ( FILLER_425 VCCD ) ( FILLER_649 VCCD ) + ( mprj_pads.area1_io_pad\[3\] VCCD ) + ( mprj_pads.area1_io_pad\[3\] VCCHIB ) ( FILLER_650 VCCD ) + ( FILLER_651 VCCD ) ( FILLER_650 VCCHIB ) ( FILLER_651 VCCHIB ) + ( FILLER_649 VCCHIB ) ( FILLER_645 VCCD ) ( FILLER_648 VCCD ) + ( FILLER_648 VCCHIB ) ( FILLER_423 VCCHIB ) + ( mprj_pads.area2_io_pad\[17\] VCCHIB ) ( FILLER_423 VCCD ) + ( mprj_pads.area2_io_pad\[17\] VCCD ) ( FILLER_422 VCCHIB ) + ( FILLER_422 VCCD ) ( FILLER_647 VCCD ) ( FILLER_647 VCCHIB ) + ( FILLER_421 VCCHIB ) ( FILLER_421 VCCD ) ( FILLER_646 VCCD ) + ( FILLER_646 VCCHIB ) ( FILLER_420 VCCHIB ) ( FILLER_420 VCCD ) + ( FILLER_645 VCCHIB ) ( FILLER_419 VCCHIB ) ( FILLER_419 VCCD ) + ( FILLER_643 VCCD ) ( FILLER_644 VCCD ) ( FILLER_644 VCCHIB ) + ( FILLER_418 VCCHIB ) ( FILLER_418 VCCD ) ( FILLER_643 VCCHIB ) + ( FILLER_416 VCCHIB ) ( FILLER_417 VCCHIB ) ( FILLER_417 VCCD ) + ( FILLER_416 VCCD ) ( FILLER_415 VCCHIB ) ( FILLER_415 VCCD ) + ( FILLER_640 VCCD ) ( FILLER_641 VCCD ) + ( mprj_pads.area1_io_pad\[2\] VCCD ) ( FILLER_641 VCCHIB ) + ( mprj_pads.area1_io_pad\[2\] VCCHIB ) ( FILLER_640 VCCHIB ) + ( FILLER_409 VCCHIB ) ( FILLER_639 VCCD ) ( FILLER_639 VCCHIB ) + ( FILLER_413 VCCHIB ) ( mprj_pads.area2_io_pad\[18\] VCCHIB ) + ( FILLER_413 VCCD ) ( mprj_pads.area2_io_pad\[18\] VCCD ) + ( FILLER_412 VCCHIB ) ( FILLER_412 VCCD ) ( FILLER_411 VCCHIB ) + ( FILLER_411 VCCD ) ( FILLER_638 VCCD ) ( FILLER_638 VCCHIB ) + ( FILLER_410 VCCHIB ) ( FILLER_410 VCCD ) ( FILLER_637 VCCD ) + ( FILLER_637 VCCHIB ) ( FILLER_409 VCCD ) ( FILLER_636 VCCD ) + ( FILLER_636 VCCHIB ) ( FILLER_408 VCCHIB ) ( FILLER_408 VCCD ) + ( FILLER_634 VCCD ) ( FILLER_635 VCCD ) ( FILLER_635 VCCHIB ) + ( FILLER_634 VCCHIB ) ( FILLER_407 VCCHIB ) ( FILLER_407 VCCD ) + ( FILLER_406 VCCHIB ) ( FILLER_406 VCCD ) ( FILLER_405 VCCHIB ) + ( FILLER_405 VCCD ) ( FILLER_SB2 VCCHIB ) ( FILLER_SB2 VCCD ) + ( FILLER_401 VCCHIB ) ( FILLER_402 VCCHIB ) + ( disconnect_vdda_2 VCCHIB ) ( FILLER_402 VCCD ) + ( disconnect_vdda_2 VCCD ) ( FILLER_401 VCCD ) + ( FILLER_400 VCCHIB ) ( FILLER_400 VCCD ) ( FILLER_399 VCCHIB ) + ( FILLER_632 VCCD ) ( mprj_pads.area1_io_pad\[1\] VCCD ) + ( FILLER_632 VCCHIB ) ( mprj_pads.area1_io_pad\[1\] VCCHIB ) + ( FILLER_399 VCCD ) ( FILLER_631 VCCD ) ( FILLER_631 VCCHIB ) + ( FILLER_398 VCCHIB ) ( FILLER_398 VCCD ) ( FILLER_397 VCCHIB ) + ( FILLER_630 VCCD ) ( FILLER_630 VCCHIB ) ( FILLER_629 VCCD ) + ( FILLER_629 VCCHIB ) ( FILLER_397 VCCD ) ( FILLER_396 VCCHIB ) + ( FILLER_396 VCCD ) ( FILLER_395 VCCHIB ) ( FILLER_628 VCCD ) + ( FILLER_628 VCCHIB ) ( FILLER_395 VCCD ) ( FILLER_627 VCCD ) + ( FILLER_627 VCCHIB ) ( FILLER_394 VCCHIB ) ( FILLER_394 VCCD ) + ( FILLER_626 VCCD ) ( FILLER_626 VCCHIB ) ( FILLER_625 VCCD ) + ( FILLER_625 VCCHIB ) ( FILLER_389 VCCHIB ) ( FILLER_624 VCCD ) + ( FILLER_624 VCCHIB ) ( FILLER_392 VCCHIB ) + ( mgmt_vddio_hvclamp_pad\[0\] VCCHIB ) ( FILLER_392 VCCD ) + ( mgmt_vddio_hvclamp_pad\[0\] VCCD ) ( FILLER_391 VCCHIB ) + ( FILLER_391 VCCD ) ( FILLER_390 VCCHIB ) ( FILLER_390 VCCD ) + ( FILLER_389 VCCD ) ( mprj_pads.area1_io_pad\[0\] VCCD ) + ( mprj_pads.area1_io_pad\[0\] VCCHIB ) ( FILLER_622 VCCD ) + ( FILLER_622 VCCHIB ) ( FILLER_621 VCCD ) ( FILLER_388 VCCHIB ) + ( FILLER_388 VCCD ) ( FILLER_621 VCCHIB ) ( FILLER_620 VCCD ) + ( FILLER_387 VCCHIB ) ( FILLER_387 VCCD ) ( FILLER_620 VCCHIB ) + ( FILLER_619 VCCD ) ( FILLER_386 VCCHIB ) ( FILLER_386 VCCD ) + ( FILLER_619 VCCHIB ) ( FILLER_385 VCCHIB ) ( FILLER_385 VCCD ) + ( FILLER_618 VCCD ) ( FILLER_618 VCCHIB ) ( FILLER_384 VCCHIB ) + ( FILLER_384 VCCD ) ( FILLER_617 VCCD ) ( FILLER_617 VCCHIB ) + ( FILLER_616 VCCD ) ( FILLER_616 VCCHIB ) ( FILLER_615 VCCD ) + ( FILLER_615 VCCHIB ) ( FILLER_612 VCCD ) ( FILLER_SB1 VCCD ) + ( disconnect_vdda_1 VCCD ) ( FILLER_SB1 VCCHIB ) + ( disconnect_vdda_1 VCCHIB ) ( FILLER_612 VCCHIB ) + ( FILLER_611 VCCD ) ( FILLER_382 VCCHIB ) + ( mgmt_vccd_lvclamp_pad VCCHIB ) ( FILLER_382 VCCD ) + ( mgmt_vccd_lvclamp_pad VCCD ) ( FILLER_381 VCCHIB ) + ( FILLER_381 VCCD ) ( FILLER_380 VCCHIB ) ( FILLER_380 VCCD ) + ( FILLER_611 VCCHIB ) ( FILLER_379 VCCHIB ) ( FILLER_379 VCCD ) + ( FILLER_610 VCCD ) ( FILLER_610 VCCHIB ) ( FILLER_609 VCCD ) + ( FILLER_378 VCCHIB ) ( FILLER_378 VCCD ) ( FILLER_609 VCCHIB ) + ( FILLER_608 VCCD ) ( FILLER_608 VCCHIB ) ( FILLER_607 VCCD ) + ( FILLER_377 VCCHIB ) ( FILLER_377 VCCD ) ( FILLER_607 VCCHIB ) + ( FILLER_606 VCCD ) ( FILLER_376 VCCHIB ) ( FILLER_376 VCCD ) + ( FILLER_606 VCCHIB ) ( FILLER_375 VCCHIB ) ( FILLER_375 VCCD ) + ( constant_block_6 vccd ) ( FILLER_374 VCCHIB ) + ( FILLER_374 VCCD ) ( FILLER_605 VCCD ) ( FILLER_605 VCCHIB ) + ( constant_block_5 vccd ) ( constant_block_4 vccd ) + ( constant_block_3 vccd ) ( constant_block_2 vccd ) + ( constant_block_1 vccd ) ( constant_block_0 vccd ) + ( mgmt_corner\[1\] VCCHIB ) ( FILLER_373 VCCHIB ) + ( FILLER_372 VCCHIB ) ( FILLER_371 VCCHIB ) + ( FILLER_370 VCCHIB ) ( FILLER_369 VCCHIB ) + ( FILLER_368 VCCHIB ) ( FILLER_361 VCCHIB ) + ( FILLER_358 VCCHIB ) ( FILLER_360 VCCHIB ) + ( FILLER_359 VCCHIB ) ( FILLER_357 VCCHIB ) + ( FILLER_353 VCCHIB ) ( FILLER_354 VCCHIB ) + ( FILLER_355 VCCHIB ) ( mgmt_vdda_hvclamp_pad VCCHIB ) + ( FILLER_351 VCCHIB ) ( FILLER_352 VCCHIB ) + ( FILLER_343 VCCHIB ) ( FILLER_344 VCCHIB ) + ( FILLER_340 VCCHIB ) ( FILLER_342 VCCHIB ) + ( FILLER_341 VCCHIB ) ( FILLER_335 VCCHIB ) + ( FILLER_337 VCCHIB ) ( FILLER_338 VCCHIB ) + ( mgmt_vssio_hvclamp_pad\[0\] VCCHIB ) ( FILLER_336 VCCHIB ) + ( FILLER_334 VCCHIB ) ( FILLER_326 VCCHIB ) + ( FILLER_327 VCCHIB ) ( FILLER_323 VCCHIB ) + ( FILLER_325 VCCHIB ) ( FILLER_324 VCCHIB ) + ( FILLER_317 VCCHIB ) ( FILLER_321 VCCHIB ) ( gpio_pad VCCHIB ) + ( FILLER_319 VCCHIB ) ( FILLER_320 VCCHIB ) + ( FILLER_318 VCCHIB ) ( FILLER_309 VCCHIB ) + ( FILLER_310 VCCHIB ) ( FILLER_308 VCCHIB ) + ( FILLER_307 VCCHIB ) ( FILLER_306 VCCHIB ) + ( FILLER_301 VCCHIB ) ( flash_io1_pad VCCHIB ) + ( FILLER_302 VCCHIB ) ( FILLER_303 VCCHIB ) + ( FILLER_304 VCCHIB ) ( FILLER_300 VCCHIB ) + ( FILLER_292 VCCHIB ) ( FILLER_293 VCCHIB ) + ( FILLER_290 VCCHIB ) ( FILLER_291 VCCHIB ) + ( FILLER_289 VCCHIB ) ( FILLER_283 VCCHIB ) + ( FILLER_286 VCCHIB ) ( FILLER_287 VCCHIB ) + ( flash_io0_pad VCCHIB ) ( FILLER_285 VCCHIB ) + ( FILLER_284 VCCHIB ) ( FILLER_275 VCCHIB ) + ( FILLER_276 VCCHIB ) ( FILLER_273 VCCHIB ) + ( FILLER_274 VCCHIB ) ( FILLER_272 VCCHIB ) + ( FILLER_266 VCCHIB ) ( FILLER_269 VCCHIB ) + ( FILLER_270 VCCHIB ) ( flash_clk_pad VCCHIB ) + ( FILLER_268 VCCHIB ) ( FILLER_267 VCCHIB ) + ( FILLER_258 VCCHIB ) ( FILLER_259 VCCHIB ) + ( FILLER_257 VCCHIB ) ( FILLER_256 VCCHIB ) + ( FILLER_255 VCCHIB ) ( FILLER_249 VCCHIB ) + ( FILLER_252 VCCHIB ) ( FILLER_253 VCCHIB ) + ( flash_csb_pad VCCHIB ) ( FILLER_251 VCCHIB ) + ( FILLER_250 VCCHIB ) ( FILLER_242 VCCHIB ) + ( FILLER_238 VCCHIB ) ( FILLER_240 VCCHIB ) + ( FILLER_241 VCCHIB ) ( FILLER_239 VCCHIB ) + ( FILLER_232 VCCHIB ) ( FILLER_236 VCCHIB ) + ( mgmt_vssd_lvclamp_pad VCCHIB ) ( FILLER_234 VCCHIB ) + ( FILLER_235 VCCHIB ) ( FILLER_233 VCCHIB ) + ( FILLER_224 VCCHIB ) ( FILLER_225 VCCHIB ) + ( FILLER_221 VCCHIB ) ( FILLER_223 VCCHIB ) + ( FILLER_222 VCCHIB ) ( FILLER_217 VCCHIB ) + ( clock_pad VCCHIB ) ( FILLER_218 VCCHIB ) + ( FILLER_219 VCCHIB ) ( FILLER_215 VCCHIB ) + ( FILLER_216 VCCHIB ) ( FILLER_207 VCCHIB ) + ( FILLER_208 VCCHIB ) ( FILLER_204 VCCHIB ) + ( FILLER_206 VCCHIB ) ( FILLER_205 VCCHIB ) + ( FILLER_199 VCCHIB ) ( FILLER_201 VCCHIB ) + ( FILLER_202 VCCHIB ) ( resetb_pad VCCHIB ) + ( FILLER_200 VCCHIB ) ( FILLER_198 VCCHIB ) + ( FILLER_191 VCCHIB ) ( FILLER_190 VCCHIB ) + ( FILLER_188 VCCHIB ) ( FILLER_189 VCCHIB ) + ( FILLER_187 VCCHIB ) ( FILLER_182 VCCHIB ) + ( FILLER_185 VCCHIB ) ( mgmt_vssa_hvclamp_pad VCCHIB ) + ( FILLER_183 VCCHIB ) ( FILLER_184 VCCHIB ) + ( FILLER_181 VCCHIB ) ( FILLER_171 VCCHIB ) + ( FILLER_172 VCCHIB ) ( mgmt_corner\[0\] VCCHIB ) + ( FILLER_170 VCCHIB ) ( FILLER_173 VCCHIB ) + ( FILLER_174 VCCHIB ) ( mgmt_corner\[1\] VCCD ) + ( FILLER_373 VCCD ) ( FILLER_372 VCCD ) ( FILLER_371 VCCD ) + ( FILLER_370 VCCD ) ( FILLER_369 VCCD ) ( FILLER_368 VCCD ) + ( bus_tie_72 VCCHIB ) ( bus_tie_72 VCCD ) ( bus_tie_71 VCCHIB ) + ( bus_tie_71 VCCD ) ( bus_tie_70 VCCHIB ) ( bus_tie_70 VCCD ) + ( bus_tie_69 VCCHIB ) ( bus_tie_69 VCCD ) ( bus_tie_68 VCCHIB ) + ( bus_tie_68 VCCD ) ( FILLER_361 VCCD ) ( bus_tie_67 VCCHIB ) + ( bus_tie_67 VCCD ) ( FILLER_358 VCCD ) ( FILLER_360 VCCD ) + ( FILLER_359 VCCD ) ( FILLER_357 VCCD ) ( FILLER_353 VCCD ) + ( FILLER_354 VCCD ) ( FILLER_355 VCCD ) + ( mgmt_vdda_hvclamp_pad VCCD ) ( FILLER_351 VCCD ) + ( FILLER_352 VCCD ) ( bus_tie_65 VCCHIB ) ( bus_tie_66 VCCHIB ) + ( bus_tie_66 VCCD ) ( bus_tie_65 VCCD ) ( FILLER_343 VCCD ) + ( bus_tie_64 VCCHIB ) ( bus_tie_64 VCCD ) ( bus_tie_63 VCCHIB ) + ( bus_tie_63 VCCD ) ( bus_tie_62 VCCHIB ) ( bus_tie_62 VCCD ) + ( FILLER_344 VCCD ) ( bus_tie_61 VCCHIB ) ( bus_tie_61 VCCD ) + ( FILLER_340 VCCD ) ( FILLER_342 VCCD ) ( FILLER_341 VCCD ) + ( FILLER_335 VCCD ) ( FILLER_337 VCCD ) ( FILLER_338 VCCD ) + ( mgmt_vssio_hvclamp_pad\[0\] VCCD ) ( FILLER_336 VCCD ) + ( FILLER_334 VCCD ) ( bus_tie_58 VCCHIB ) ( bus_tie_60 VCCHIB ) + ( bus_tie_60 VCCD ) ( bus_tie_59 VCCHIB ) ( bus_tie_59 VCCD ) + ( bus_tie_58 VCCD ) ( bus_tie_56 VCCHIB ) ( bus_tie_57 VCCHIB ) + ( bus_tie_57 VCCD ) ( bus_tie_56 VCCD ) ( FILLER_323 VCCD ) + ( FILLER_326 VCCD ) ( FILLER_327 VCCD ) ( bus_tie_55 VCCHIB ) + ( bus_tie_55 VCCD ) ( FILLER_325 VCCD ) ( FILLER_324 VCCD ) + ( FILLER_317 VCCD ) ( FILLER_321 VCCD ) ( clock_pad VCCD ) + ( FILLER_319 VCCD ) ( FILLER_320 VCCD ) ( FILLER_318 VCCD ) + ( bus_tie_54 VCCHIB ) ( bus_tie_54 VCCD ) ( bus_tie_53 VCCHIB ) + ( bus_tie_53 VCCD ) ( bus_tie_52 VCCHIB ) ( bus_tie_52 VCCD ) + ( bus_tie_51 VCCHIB ) ( bus_tie_51 VCCD ) ( bus_tie_50 VCCHIB ) + ( bus_tie_50 VCCD ) ( FILLER_308 VCCD ) ( FILLER_309 VCCD ) + ( FILLER_310 VCCD ) ( bus_tie_49 VCCHIB ) ( bus_tie_49 VCCD ) + ( FILLER_307 VCCD ) ( FILLER_306 VCCD ) ( FILLER_301 VCCD ) + ( flash_io1_pad VCCD ) ( FILLER_302 VCCD ) ( FILLER_303 VCCD ) + ( FILLER_304 VCCD ) ( FILLER_300 VCCD ) ( bus_tie_46 VCCHIB ) + ( bus_tie_48 VCCHIB ) ( bus_tie_48 VCCD ) ( bus_tie_47 VCCHIB ) + ( bus_tie_47 VCCD ) ( bus_tie_46 VCCD ) ( FILLER_290 VCCD ) + ( bus_tie_45 VCCHIB ) ( bus_tie_45 VCCD ) ( bus_tie_44 VCCHIB ) + ( bus_tie_44 VCCD ) ( FILLER_292 VCCD ) ( FILLER_293 VCCD ) + ( bus_tie_43 VCCHIB ) ( bus_tie_43 VCCD ) ( FILLER_291 VCCD ) + ( FILLER_289 VCCD ) ( FILLER_283 VCCD ) ( FILLER_286 VCCD ) + ( FILLER_287 VCCD ) ( flash_io0_pad VCCD ) ( FILLER_285 VCCD ) + ( FILLER_284 VCCD ) ( bus_tie_39 VCCHIB ) ( bus_tie_42 VCCHIB ) + ( bus_tie_42 VCCD ) ( bus_tie_41 VCCHIB ) ( bus_tie_41 VCCD ) + ( bus_tie_40 VCCHIB ) ( bus_tie_40 VCCD ) ( bus_tie_39 VCCD ) + ( FILLER_273 VCCD ) ( bus_tie_38 VCCHIB ) ( bus_tie_38 VCCD ) + ( FILLER_275 VCCD ) ( FILLER_276 VCCD ) ( bus_tie_37 VCCHIB ) + ( bus_tie_37 VCCD ) ( FILLER_274 VCCD ) ( FILLER_272 VCCD ) + ( FILLER_266 VCCD ) ( FILLER_269 VCCD ) ( FILLER_270 VCCD ) + ( flash_clk_pad VCCD ) ( FILLER_268 VCCD ) ( FILLER_267 VCCD ) + ( bus_tie_36 VCCHIB ) ( bus_tie_36 VCCD ) ( bus_tie_35 VCCHIB ) + ( bus_tie_35 VCCD ) ( bus_tie_34 VCCHIB ) ( bus_tie_34 VCCD ) + ( bus_tie_33 VCCHIB ) ( bus_tie_33 VCCD ) ( bus_tie_32 VCCHIB ) + ( bus_tie_32 VCCD ) ( FILLER_257 VCCD ) ( FILLER_258 VCCD ) + ( FILLER_259 VCCD ) ( bus_tie_31 VCCHIB ) ( bus_tie_31 VCCD ) + ( FILLER_256 VCCD ) ( FILLER_255 VCCD ) ( FILLER_249 VCCD ) + ( FILLER_252 VCCD ) ( FILLER_253 VCCD ) ( flash_csb_pad VCCD ) + ( FILLER_251 VCCD ) ( FILLER_250 VCCD ) ( bus_tie_27 VCCHIB ) + ( bus_tie_30 VCCHIB ) ( bus_tie_30 VCCD ) ( bus_tie_29 VCCHIB ) + ( bus_tie_29 VCCD ) ( bus_tie_28 VCCHIB ) ( bus_tie_28 VCCD ) + ( bus_tie_27 VCCD ) ( FILLER_238 VCCD ) ( bus_tie_26 VCCHIB ) + ( bus_tie_26 VCCD ) ( FILLER_242 VCCD ) ( bus_tie_25 VCCHIB ) + ( bus_tie_25 VCCD ) ( FILLER_240 VCCD ) ( FILLER_241 VCCD ) + ( FILLER_239 VCCD ) ( FILLER_232 VCCD ) ( FILLER_236 VCCD ) + ( mgmt_vssd_lvclamp_pad VCCD ) ( FILLER_234 VCCD ) + ( FILLER_235 VCCD ) ( FILLER_233 VCCD ) ( bus_tie_24 VCCHIB ) + ( bus_tie_24 VCCD ) ( bus_tie_20 VCCHIB ) ( bus_tie_23 VCCHIB ) + ( bus_tie_23 VCCD ) ( bus_tie_22 VCCHIB ) ( bus_tie_22 VCCD ) + ( bus_tie_21 VCCHIB ) ( bus_tie_21 VCCD ) ( bus_tie_20 VCCD ) + ( FILLER_221 VCCD ) ( FILLER_224 VCCD ) ( FILLER_225 VCCD ) + ( bus_tie_19 VCCHIB ) ( bus_tie_19 VCCD ) ( FILLER_223 VCCD ) + ( FILLER_222 VCCD ) ( FILLER_217 VCCD ) ( bus_tie_9 VCCD ) + ( FILLER_218 VCCD ) ( FILLER_219 VCCD ) ( FILLER_215 VCCD ) + ( FILLER_216 VCCD ) ( bus_tie_17 VCCHIB ) ( bus_tie_18 VCCHIB ) + ( bus_tie_18 VCCD ) ( bus_tie_17 VCCD ) ( bus_tie_14 VCCHIB ) + ( bus_tie_16 VCCHIB ) ( bus_tie_16 VCCD ) ( bus_tie_15 VCCHIB ) + ( bus_tie_15 VCCD ) ( bus_tie_14 VCCD ) ( FILLER_204 VCCD ) + ( FILLER_207 VCCD ) ( FILLER_208 VCCD ) ( bus_tie_13 VCCHIB ) + ( bus_tie_13 VCCD ) ( FILLER_206 VCCD ) ( FILLER_205 VCCD ) + ( FILLER_199 VCCD ) ( FILLER_201 VCCD ) ( FILLER_202 VCCD ) + ( resetb_pad VCCD ) ( FILLER_200 VCCD ) ( FILLER_198 VCCD ) + ( bus_tie_12 VCCHIB ) ( bus_tie_12 VCCD ) ( bus_tie_11 VCCHIB ) + ( bus_tie_11 VCCD ) ( bus_tie_10 VCCHIB ) ( bus_tie_10 VCCD ) + ( bus_tie_9 VCCHIB ) ( bus_tie_8 VCCD ) ( bus_tie_8 VCCHIB ) + ( bus_tie_7 VCCD ) ( FILLER_190 VCCD ) ( FILLER_191 VCCD ) + ( bus_tie_7 VCCHIB ) ( bus_tie_6 VCCD ) ( FILLER_188 VCCD ) + ( FILLER_189 VCCD ) ( FILLER_187 VCCD ) ( FILLER_182 VCCD ) + ( FILLER_185 VCCD ) ( mgmt_vssa_hvclamp_pad VCCD ) + ( FILLER_183 VCCD ) ( FILLER_184 VCCD ) ( FILLER_181 VCCD ) + ( bus_tie_4 VCCHIB ) ( bus_tie_6 VCCHIB ) ( bus_tie_5 VCCD ) + ( bus_tie_5 VCCHIB ) ( bus_tie_4 VCCD ) ( bus_tie_3 VCCD ) + ( FILLER_171 VCCD ) ( bus_tie_3 VCCHIB ) ( bus_tie_2 VCCD ) + ( bus_tie_2 VCCHIB ) ( bus_tie_1 VCCD ) ( FILLER_172 VCCD ) + ( mgmt_corner\[0\] VCCD ) ( FILLER_170 VCCD ) + ( FILLER_173 VCCD ) ( FILLER_174 VCCD ) ( bus_tie_1 VCCHIB ) ; + - FILLER_605/VSSD ( FILLER_605 VSSD ) ( FILLER_374 VSSD ) ; + - mprj_io[22] ( mprj_pads.area2_io_pad\[3\] PAD ) ; + - mprj_io_in[22] ( mprj_pads.area2_io_pad\[3\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 713225 4977105 ) ( * 4979365 ) ; + - mprj_io_one[22] ( mprj_pads.area2_io_pad\[3\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 707245 4977105 ) ( * 4979365 ) ; + - mprj_io_slow_sel[22] ( mprj_pads.area2_io_pad\[3\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 704025 4977105 ) ( * 4979365 ) ; + - mprj_analog_io[15] ( mprj_pads.area2_io_pad\[3\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 700805 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[3\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[3\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[67] ( mprj_pads.area2_io_pad\[3\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 694825 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[3\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[3\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[22] ( mprj_pads.area2_io_pad\[3\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 688845 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[66] ( mprj_pads.area2_io_pad\[3\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 685625 4977105 ) ( * 4979365 ) ; + - mprj_io_analog_pol[22] ( mprj_pads.area2_io_pad\[3\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 682405 4977105 ) ( * 4979365 ) ; + - mprj_io_inp_dis[22] ( mprj_pads.area2_io_pad\[3\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 679645 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[3\]/ENABLE_H + ( mprj_pads.area2_io_pad\[3\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[3\]/HLD_H_N + ( mprj_pads.area2_io_pad\[3\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[3\] TIE_HI_ESD ) + + ROUTED met2 TAPERRULE met2_width_280 ( 669985 4977105 ) ( * 4977350 ) + NEW met2 ( 669915 4977490 ) ( 670640 * ) + NEW met2 ( 669915 4977670 ) ( 670640 * ) + NEW met2 TAPERRULE met2_width_280 ( 669985 4977810 ) ( * 4979365 ) + NEW met2 ( 670280 4977580 ) via_860_260_hv + NEW met1 TAPERRULE met1_width_240 ( 670780 4977580 ) ( 710005 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 710005 4977780 ) ( * 4979365 ) + NEW met2 TAPERRULE met2_width_280 ( 710005 4977105 ) ( * 4977380 ) + NEW met1 TAPERRULE met1_width_240 ( 710205 4977580 ) ( 716605 * ) ; + - mprj_io_analog_sel[22] ( mprj_pads.area2_io_pad\[3\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 667225 4977105 ) ( * 4979365 ) ; + - mprj_io_dm[68] ( mprj_pads.area2_io_pad\[3\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 664005 4977105 ) ( * 4979365 ) ; + - mprj_io_holdover[22] ( mprj_pads.area2_io_pad\[3\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 660785 4977105 ) ( * 4979365 ) ; + - mprj_io_out[22] ( mprj_pads.area2_io_pad\[3\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 658025 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[3\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[3\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[3\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[3\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 716445 4977105 ) ( * 4977830 ) + NEW met2 ( 715790 4977970 ) ( 716150 * ) ( * 4978060 ) + via_860_260_hv + NEW met2 ( 715790 4978150 ) ( 716515 * ) + NEW met2 TAPERRULE met2_width_280 ( 716445 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 677225 4978060 ) ( 715650 * ) + NEW met1 ( 676725 4978060 ) via_860_260_hv + NEW met2 ( 676355 4978150 ) ( 677085 * ) + NEW met2 TAPERRULE met2_width_280 ( 676425 4978290 ) ( * 4979365 ) + NEW met1 TAPERRULE met1_width_240 ( 655605 4978060 ) ( 676225 * ) + NEW met1 ( 655105 4978060 ) via_860_260_hv + NEW met2 ( 654735 4978150 ) ( 655465 * ) + NEW met2 TAPERRULE met2_width_280 ( 654805 4978290 ) ( * 4979365 ) + NEW met2 ( 654735 4977970 ) ( 655465 * ) + NEW met2 TAPERRULE met2_width_280 ( 654805 4977105 ) ( * 4977830 ) + NEW met2 ( 676355 4977970 ) ( 677085 * ) + NEW met2 TAPERRULE met2_width_280 ( 676425 4977105 ) ( * 4977830 ) ; + - mprj_io_vtrip_sel[22] ( mprj_pads.area2_io_pad\[3\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 648825 4977105 ) ( * 4979365 ) ; + - mprj_io_ib_mode_sel[22] + ( mprj_pads.area2_io_pad\[3\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 645605 4977105 ) ( * 4979365 ) ; + - mprj_io_oeb[22] ( mprj_pads.area2_io_pad\[3\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 642385 4977105 ) ( * 4979365 ) ; + - mprj_pads.area2_io_pad\[3\]/IN_H + ( mprj_pads.area2_io_pad\[3\] IN_H ) ; + - vssio_pad2 ( mgmt_vssio_hvclamp_pad\[1\] VSSIO_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 1674850 5123530 ) ( 1734090 * ) ; + - mprj_io[32] ( mprj_pads.area2_io_pad\[13\] PAD ) ; + - mprj_io_in[32] ( mprj_pads.area2_io_pad\[13\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2063225 ) ( 210895 * ) ; + - mprj_io_one[32] ( mprj_pads.area2_io_pad\[13\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2057245 ) ( 210895 * ) ; + - mprj_io_slow_sel[32] ( mprj_pads.area2_io_pad\[13\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2054025 ) ( 210895 * ) ; + - mprj_analog_io[25] ( mprj_pads.area2_io_pad\[13\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2050805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[13\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[13\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[97] ( mprj_pads.area2_io_pad\[13\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2044825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[13\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[13\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[32] ( mprj_pads.area2_io_pad\[13\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2038845 ) ( 210895 * ) ; + - mprj_io_dm[96] ( mprj_pads.area2_io_pad\[13\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2035625 ) ( 210895 * ) ; + - mprj_io_analog_pol[32] + ( mprj_pads.area2_io_pad\[13\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2032405 ) ( 210895 * ) ; + - mprj_io_inp_dis[32] ( mprj_pads.area2_io_pad\[13\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2029645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[13\]/ENABLE_H + ( mprj_pads.area2_io_pad\[13\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[13\]/HLD_H_N + ( mprj_pads.area2_io_pad\[13\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[13\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 2019915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2019987.5 ) ( 210220 * ) + NEW met1 ( 210360 2020670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2020810 ) ( * 2059775 ) + NEW met1 ( 210360 2059915 ) ( 210480 * ) + NEW met1 ( 210420 2060005 ) via_260_260_vh + NEW met2 ( 208635 2060075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 2060005 ) ( 210895 * ) + NEW met2 ( 208635 2059935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 2060005 ) ( 210220 * ) + NEW met1 ( 210360 2060095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2060235 ) ( * 2066605 ) + NEW met1 ( 210420 2020280 ) via_260_860_vh + NEW met1 ( 210360 2019890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 2019987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[32] + ( mprj_pads.area2_io_pad\[13\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2017225 ) ( 210895 * ) ; + - mprj_io_dm[98] ( mprj_pads.area2_io_pad\[13\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2014005 ) ( 210895 * ) ; + - mprj_io_holdover[32] ( mprj_pads.area2_io_pad\[13\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2010785 ) ( 210895 * ) ; + - mprj_io_out[32] ( mprj_pads.area2_io_pad\[13\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2008025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[13\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[13\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[13\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[13\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 2066442.5 ) ( 210895 * ) + NEW met2 ( 208635 2066515 ) ( 210895 * ) + NEW met1 ( 209880 2066540 ) ( 210000 * ) + NEW met1 ( 209890 2066605 ) ( 209990 * ) + NEW met1 ( 209940 2066150 ) via_260_860_vh + NEW met1 ( 209880 2065760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2027255 ) ( * 2065620 ) + NEW met1 ( 209880 2027115 ) ( 210000 * ) + NEW met1 ( 209940 2026725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2026430 ) ( 210895 * ) + NEW met2 ( 208635 2026355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2026430 ) ( 209740 * ) + NEW met1 ( 209880 2026335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2005635 ) ( * 2026195 ) + NEW met1 ( 209880 2005495 ) ( 210000 * ) + NEW met1 ( 209940 2005105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2004810 ) ( 210895 * ) + NEW met2 ( 208635 2004735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2004810 ) ( 209740 * ) + NEW met1 ( 209880 2004715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2066442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[32] ( mprj_pads.area2_io_pad\[13\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1998825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[32] + ( mprj_pads.area2_io_pad\[13\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1995605 ) ( 210895 * ) ; + - mprj_io_oeb[32] ( mprj_pads.area2_io_pad\[13\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1992385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[13\]/IN_H + ( mprj_pads.area2_io_pad\[13\] IN_H ) ; + - vddio_pad ( mgmt_vddio_hvclamp_pad\[0\] VDDIO_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 64465 558850 ) ( * 618090 ) ; + - constant_block_6/vssd ( constant_block_6 vssd ) ; + - constant_block_6/one ( constant_block_6 one ) + ( gpio_pad ENABLE_VDDIO ) + + ROUTED met3 ( 2653015 203715 ) ( 2659130 * ) + NEW met3 ( 2652690 203740 ) ( 2652740 * ) + NEW met2 ( 2652635 203840 ) ( 2652795 * ) + NEW met2 TAPERRULE met2_width_260 ( 2652715 203980 ) ( * 210375 ) + NEW met1 TAPERRULE met1_width_260 ( 2581930 210575 ) ( 2652715 * ) via_260_260_hv + ( * 210665 ) ( 2652775 * ) + NEW met2 ( 2581730 210575 ) via_260_260_hv + NEW met2 ( 2581670 210665 ) ( 2581790 * ) + NEW met1 TAPERRULE met1_width_260 ( 2571880 210575 ) ( 2581530 * ) + NEW met2 ( 2581670 210485 ) ( 2581790 * ) + NEW met2 ( 2652715 203715 ) via2_300_300_vx + NEW met2 ( 2652635 203590 ) ( 2652795 * ) + NEW met3 ( 2652690 203690 ) ( 2652740 * ) + NEW met3 ( 2652690 203715 ) ( 2652415 * ) ; + - mprj_io[5] ( mprj_pads.area1_io_pad\[5\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 1634000 ) ( * 1695000 ) ; + - mprj_pads.area1_io_pad\[5\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[5\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[5\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[5\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 1628557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 1629240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1629380 ) ( * 1667745 ) + NEW met1 ( 3378000 1667885 ) ( 3378120 * ) + NEW met1 ( 3378060 1668275 ) via_260_860_vh + NEW met2 ( 3377105 1668645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1668570 ) ( 3379365 * ) + NEW met1 ( 3378000 1668665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1668805 ) ( * 1689365 ) + NEW met1 ( 3378000 1689505 ) ( 3378120 * ) + NEW met1 ( 3378060 1689895 ) via_260_860_vh + NEW met2 ( 3377105 1690265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1690190 ) ( 3379365 * ) + NEW met1 ( 3378000 1690285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1690190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1668570 ) ( 3377860 * ) + NEW met2 ( 3378060 1628850 ) via_260_860_vh ( * 1628460 ) + ( 3378120 * ) + NEW met1 ( 3378010 1628395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 1628557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 1628485 ) ( 3379365 * ) ; + - mprj_io_in[5] ( mprj_pads.area1_io_pad\[5\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1631775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[5\]/HLD_H_N + ( mprj_pads.area1_io_pad\[5\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[5\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 1675085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 1675012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 1675110 ) ( 3377640 * ) + NEW met1 ( 3377580 1674720 ) via_260_860_vh + NEW met1 ( 3377520 1674330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1635225 ) ( * 1674190 ) + NEW met1 ( 3377520 1635085 ) ( 3377640 * ) + NEW met1 ( 3377580 1634995 ) via_260_260_vh + NEW met2 ( 3377105 1635065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 1634995 ) ( 3379365 * ) + NEW met2 ( 3377105 1634925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 1634995 ) ( 3377380 * ) + NEW met1 ( 3377520 1634905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1628395 ) ( * 1634765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 1675012.5 ) ( 3377380 * ) ; + - mprj_io_one[5] ( mprj_pads.area1_io_pad\[5\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1637755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[5] ( mprj_pads.area1_io_pad\[5\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1640975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[5\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[5\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[5\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[5\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[16] ( mprj_pads.area1_io_pad\[5\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1650175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[5\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[5\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[5] ( mprj_pads.area1_io_pad\[5\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1656155 ) ( 3379365 * ) ; + - mprj_io_dm[15] ( mprj_pads.area1_io_pad\[5\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1659375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[5] ( mprj_pads.area1_io_pad\[5\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1662595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[5] ( mprj_pads.area1_io_pad\[5\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1665355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[5\]/ENABLE_H + ( mprj_pads.area1_io_pad\[5\] ENABLE_H ) ; + - mprj_io_analog_sel[5] ( mprj_pads.area1_io_pad\[5\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1677775 ) ( 3379365 * ) ; + - mprj_io_dm[17] ( mprj_pads.area1_io_pad\[5\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1680995 ) ( 3379365 * ) ; + - mprj_io_holdover[5] ( mprj_pads.area1_io_pad\[5\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1684215 ) ( 3379365 * ) ; + - mprj_io_out[5] ( mprj_pads.area1_io_pad\[5\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1686975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[5] ( mprj_pads.area1_io_pad\[5\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1696175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[5] + ( mprj_pads.area1_io_pad\[5\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1699395 ) ( 3379365 * ) ; + - mprj_io_oeb[5] ( mprj_pads.area1_io_pad\[5\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1702615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[5\]/IN_H + ( mprj_pads.area1_io_pad\[5\] IN_H ) ; + - mprj_io[24] ( mprj_pads.area2_io_pad\[5\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 476580 ) ( * 2324490 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348200 ) ( * 4538150 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562410 ) ( * 4588310 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4612670 ) ( * 4962770 ) + NEW met4 TAPERRULE met4_width_560 ( 3370200 4612150 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_600 ( 3382780 4589260 ) ( * 4611720 ) + NEW met4 TAPERRULE met4_width_530 ( 3370200 4588845 ) ( 3382930 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589260 ) ( * 4611720 ) + NEW met4 ( 3376580 4600490 ) via4_11800_22760 + NEW met3 TAPERRULE met3_width_630 ( 3354010 4612185 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1140 ( 3383050 4589260 ) ( * 4611720 ) + NEW met3 TAPERRULE met3_width_610 ( 3354010 4588805 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16820 ( 3362270 4589260 ) ( * 4611720 ) + NEW met3 ( 3376580 4600490 ) via3_11800_22760_hx + NEW met4 TAPERRULE met4_width_590 ( 3370230 4561905 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_590 ( 3382815 4539100 ) ( * 4561460 ) + NEW met4 TAPERRULE met4_width_600 ( 3370230 4538650 ) ( 3382960 * ) + NEW met4 TAPERRULE met4_width_770 ( 3370465 4539100 ) ( * 4561460 ) + NEW met4 ( 3376685 4550280 ) via4_11670_22660 + NEW met3 TAPERRULE met3_width_635 ( 3354010 4561927.5 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_1100 ( 3383070 4539100 ) ( * 4561460 ) + NEW met3 TAPERRULE met3_width_650 ( 3354010 4538625 ) ( 3383470 * ) + NEW met3 TAPERRULE met3_width_16990 ( 3362355 4539100 ) ( * 4561460 ) + NEW met3 ( 3376685 4550280 ) via3_11670_22660_hx + NEW met4 TAPERRULE met4_width_550 ( 3370270 2347675 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_530 ( 3382825 2325440 ) ( * 2347250 ) + NEW met4 TAPERRULE met4_width_520 ( 3370270 2325030 ) ( 3382940 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370420 2325440 ) ( * 2347250 ) + NEW met4 ( 3376640 2336345 ) via4_11840_22110 + NEW met3 TAPERRULE met3_width_600 ( 3354120 2347700 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_1830 ( 3383475 2325440 ) ( * 2347250 ) + NEW met3 TAPERRULE met3_width_545 ( 3354120 2325017.5 ) ( 3384240 * ) + NEW met3 TAPERRULE met3_width_16750 ( 3362345 2325440 ) ( * 2347250 ) + NEW met3 ( 3376640 2336345 ) via3_11840_22110_hx ; + - mprj_io_in[24] ( mprj_pads.area2_io_pad\[5\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4846225 ) ( 210895 * ) ; + - mprj_io_one[24] ( mprj_pads.area2_io_pad\[5\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4840245 ) ( 210895 * ) ; + - mprj_io_slow_sel[24] ( mprj_pads.area2_io_pad\[5\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4837025 ) ( 210895 * ) ; + - mprj_analog_io[17] ( mprj_pads.area2_io_pad\[5\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4833805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[5\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[5\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[73] ( mprj_pads.area2_io_pad\[5\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4827825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[5\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[5\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[24] ( mprj_pads.area2_io_pad\[5\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4821845 ) ( 210895 * ) ; + - mprj_io_dm[72] ( mprj_pads.area2_io_pad\[5\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4818625 ) ( 210895 * ) ; + - mprj_io_analog_pol[24] ( mprj_pads.area2_io_pad\[5\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4815405 ) ( 210895 * ) ; + - mprj_io_inp_dis[24] ( mprj_pads.area2_io_pad\[5\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4812645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[5\]/ENABLE_H + ( mprj_pads.area2_io_pad\[5\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[5\]/HLD_H_N + ( mprj_pads.area2_io_pad\[5\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[5\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 4802915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 4802987.5 ) ( 210220 * ) + NEW met1 ( 210360 4803670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 4803810 ) ( * 4842775 ) + NEW met1 ( 210360 4842915 ) ( 210480 * ) + NEW met1 ( 210420 4843005 ) via_260_260_vh + NEW met2 ( 208635 4843075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 4843005 ) ( 210895 * ) + NEW met2 ( 208635 4842935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 4843005 ) ( 210220 * ) + NEW met1 ( 210360 4843095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 4843235 ) ( * 4849605 ) + NEW met1 ( 210420 4803280 ) via_260_860_vh + NEW met1 ( 210360 4802890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 4802987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[24] ( mprj_pads.area2_io_pad\[5\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4800225 ) ( 210895 * ) ; + - mprj_io_dm[74] ( mprj_pads.area2_io_pad\[5\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4797005 ) ( 210895 * ) ; + - mprj_io_holdover[24] ( mprj_pads.area2_io_pad\[5\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4793785 ) ( 210895 * ) ; + - mprj_io_out[24] ( mprj_pads.area2_io_pad\[5\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4791025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[5\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[5\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[5\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[5\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 4849442.5 ) ( 210895 * ) + NEW met2 ( 208635 4849515 ) ( 210895 * ) + NEW met1 ( 209880 4849540 ) ( 210000 * ) + NEW met1 ( 209890 4849605 ) ( 209990 * ) + NEW met1 ( 209940 4849150 ) via_260_860_vh + NEW met1 ( 209880 4848760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 4810255 ) ( * 4848620 ) + NEW met1 ( 209880 4810115 ) ( 210000 * ) + NEW met1 ( 209940 4809725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 4809430 ) ( 210895 * ) + NEW met2 ( 208635 4809355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 4809430 ) ( 209740 * ) + NEW met1 ( 209880 4809335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 4788635 ) ( * 4809195 ) + NEW met1 ( 209880 4788495 ) ( 210000 * ) + NEW met1 ( 209940 4788105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 4787810 ) ( 210895 * ) + NEW met2 ( 208635 4787735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 4787810 ) ( 209740 * ) + NEW met1 ( 209880 4787715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 4849442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[24] ( mprj_pads.area2_io_pad\[5\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4781825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[24] + ( mprj_pads.area2_io_pad\[5\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4778605 ) ( 210895 * ) ; + - mprj_io_oeb[24] ( mprj_pads.area2_io_pad\[5\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 4775385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[5\]/IN_H + ( mprj_pads.area2_io_pad\[5\] IN_H ) ; + - constant_block_5/vssd ( constant_block_5 vssd ) ; + - constant_block_5/one ( constant_block_5 one ) + ( flash_io1_pad ENABLE_VDDIO ) + + ROUTED met3 ( 2379015 203715 ) ( 2385125 * ) + NEW met3 ( 2378690 203740 ) ( 2378740 * ) + NEW met2 ( 2378635 203840 ) ( 2378795 * ) + NEW met2 TAPERRULE met2_width_260 ( 2378715 203980 ) ( * 210375 ) + NEW met1 TAPERRULE met1_width_260 ( 2307950 210575 ) ( 2378715 * ) via_260_260_hv + ( * 210665 ) ( 2378775 * ) + NEW met2 ( 2307750 210575 ) via_260_260_hv + NEW met2 ( 2307690 210665 ) ( 2307810 * ) + NEW met1 TAPERRULE met1_width_260 ( 2297880 210575 ) ( 2307550 * ) + NEW met2 ( 2307690 210485 ) ( 2307810 * ) + NEW met2 ( 2378715 203715 ) via2_300_300_vx + NEW met2 ( 2378635 203590 ) ( 2378795 * ) + NEW met3 ( 2378690 203690 ) ( 2378740 * ) + NEW met3 ( 2378690 203715 ) ( 2378415 * ) ; + - mprj_io[34] ( mprj_pads.area2_io_pad\[15\] PAD ) ; + - mprj_io_in[34] ( mprj_pads.area2_io_pad\[15\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1631225 ) ( 210895 * ) ; + - mprj_io_one[34] ( mprj_pads.area2_io_pad\[15\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1625245 ) ( 210895 * ) ; + - mprj_io_slow_sel[34] ( mprj_pads.area2_io_pad\[15\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1622025 ) ( 210895 * ) ; + - mprj_analog_io[27] ( mprj_pads.area2_io_pad\[15\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1618805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[15\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[15\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[103] ( mprj_pads.area2_io_pad\[15\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1612825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[15\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[15\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[34] ( mprj_pads.area2_io_pad\[15\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1606845 ) ( 210895 * ) ; + - mprj_io_dm[102] ( mprj_pads.area2_io_pad\[15\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1603625 ) ( 210895 * ) ; + - mprj_io_analog_pol[34] + ( mprj_pads.area2_io_pad\[15\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1600405 ) ( 210895 * ) ; + - mprj_io_inp_dis[34] ( mprj_pads.area2_io_pad\[15\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1597645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[15\]/ENABLE_H + ( mprj_pads.area2_io_pad\[15\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[15\]/HLD_H_N + ( mprj_pads.area2_io_pad\[15\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[15\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 1587915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1587987.5 ) ( 210220 * ) + NEW met1 ( 210360 1588670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1588810 ) ( * 1627775 ) + NEW met1 ( 210360 1627915 ) ( 210480 * ) + NEW met1 ( 210420 1628005 ) via_260_260_vh + NEW met2 ( 208635 1628075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 1628005 ) ( 210895 * ) + NEW met2 ( 208635 1627935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 1628005 ) ( 210220 * ) + NEW met1 ( 210360 1628095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1628235 ) ( * 1634605 ) + NEW met1 ( 210420 1588280 ) via_260_860_vh + NEW met1 ( 210360 1587890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 1587987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[34] + ( mprj_pads.area2_io_pad\[15\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1585225 ) ( 210895 * ) ; + - mprj_io_dm[104] ( mprj_pads.area2_io_pad\[15\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1582005 ) ( 210895 * ) ; + - mprj_io_holdover[34] ( mprj_pads.area2_io_pad\[15\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1578785 ) ( 210895 * ) ; + - mprj_io_out[34] ( mprj_pads.area2_io_pad\[15\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1576025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[15\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[15\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[15\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[15\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 1634442.5 ) ( 210895 * ) + NEW met2 ( 208635 1634515 ) ( 210895 * ) + NEW met1 ( 209880 1634540 ) ( 210000 * ) + NEW met1 ( 209890 1634605 ) ( 209990 * ) + NEW met1 ( 209940 1634150 ) via_260_860_vh + NEW met1 ( 209880 1633760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1595255 ) ( * 1633620 ) + NEW met1 ( 209880 1595115 ) ( 210000 * ) + NEW met1 ( 209940 1594725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1594430 ) ( 210895 * ) + NEW met2 ( 208635 1594355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1594430 ) ( 209740 * ) + NEW met1 ( 209880 1594335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1573635 ) ( * 1594195 ) + NEW met1 ( 209880 1573495 ) ( 210000 * ) + NEW met1 ( 209940 1573105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1572810 ) ( 210895 * ) + NEW met2 ( 208635 1572735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1572810 ) ( 209740 * ) + NEW met1 ( 209880 1572715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1634442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[34] ( mprj_pads.area2_io_pad\[15\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1566825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[34] + ( mprj_pads.area2_io_pad\[15\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1563605 ) ( 210895 * ) ; + - mprj_io_oeb[34] ( mprj_pads.area2_io_pad\[15\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1560385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[15\]/IN_H + ( mprj_pads.area2_io_pad\[15\] IN_H ) ; + - constant_block_4/vssd ( constant_block_4 vssd ) ; + - constant_block_4/one ( constant_block_4 one ) + ( flash_io0_pad ENABLE_VDDIO ) + + ROUTED met3 ( 2105015 203715 ) ( 2111160 * ) + NEW met3 ( 2104690 203740 ) ( 2104740 * ) + NEW met2 ( 2104635 203840 ) ( 2104795 * ) + NEW met2 TAPERRULE met2_width_260 ( 2104715 203980 ) ( * 210375 ) + NEW met1 TAPERRULE met1_width_260 ( 2033925 210575 ) ( 2104715 * ) via_260_260_hv + ( * 210665 ) ( 2104775 * ) + NEW met2 ( 2033725 210575 ) via_260_260_hv + NEW met2 ( 2033665 210665 ) ( 2033785 * ) + NEW met1 TAPERRULE met1_width_260 ( 2023880 210575 ) ( 2033525 * ) + NEW met2 ( 2033665 210485 ) ( 2033785 * ) + NEW met2 ( 2104715 203715 ) via2_300_300_vx + NEW met2 ( 2104635 203590 ) ( 2104795 * ) + NEW met3 ( 2104690 203690 ) ( 2104740 * ) + NEW met3 ( 2104690 203715 ) ( 2104415 * ) ; + - mprj_io[11] ( mprj_pads.area1_io_pad\[11\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 3648000 ) ( * 3709000 ) ; + - mprj_pads.area1_io_pad\[11\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[11\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[11\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[11\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 3642557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 3643240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3643380 ) ( * 3681745 ) + NEW met1 ( 3378000 3681885 ) ( 3378120 * ) + NEW met1 ( 3378060 3682275 ) via_260_860_vh + NEW met2 ( 3377105 3682645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3682570 ) ( 3379365 * ) + NEW met1 ( 3378000 3682665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3682805 ) ( * 3703365 ) + NEW met1 ( 3378000 3703505 ) ( 3378120 * ) + NEW met1 ( 3378060 3703895 ) via_260_860_vh + NEW met2 ( 3377105 3704265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3704190 ) ( 3379365 * ) + NEW met1 ( 3378000 3704285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3704190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3682570 ) ( 3377860 * ) + NEW met2 ( 3378060 3642850 ) via_260_860_vh ( * 3642460 ) + ( 3378120 * ) + NEW met1 ( 3378010 3642395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 3642557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 3642485 ) ( 3379365 * ) ; + - mprj_io_in[11] ( mprj_pads.area1_io_pad\[11\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3645775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[11\]/HLD_H_N + ( mprj_pads.area1_io_pad\[11\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[11\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3689085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3689012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3689110 ) ( 3377640 * ) + NEW met1 ( 3377580 3688720 ) via_260_860_vh + NEW met1 ( 3377520 3688330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3649225 ) ( * 3688190 ) + NEW met1 ( 3377520 3649085 ) ( 3377640 * ) + NEW met1 ( 3377580 3648995 ) via_260_260_vh + NEW met2 ( 3377105 3649065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 3648995 ) ( 3379365 * ) + NEW met2 ( 3377105 3648925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 3648995 ) ( 3377380 * ) + NEW met1 ( 3377520 3648905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3642395 ) ( * 3648765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3689012.5 ) ( 3377380 * ) ; + - mprj_io_one[11] ( mprj_pads.area1_io_pad\[11\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3651755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[11] ( mprj_pads.area1_io_pad\[11\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3654975 ) ( 3379365 * ) ; + - mprj_analog_io[4] ( mprj_pads.area1_io_pad\[11\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3658195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[11\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[11\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[34] ( mprj_pads.area1_io_pad\[11\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3664175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[11\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[11\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[11] ( mprj_pads.area1_io_pad\[11\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3670155 ) ( 3379365 * ) ; + - mprj_io_dm[33] ( mprj_pads.area1_io_pad\[11\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3673375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[11] + ( mprj_pads.area1_io_pad\[11\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3676595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[11] ( mprj_pads.area1_io_pad\[11\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3679355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[11\]/ENABLE_H + ( mprj_pads.area1_io_pad\[11\] ENABLE_H ) ; + - mprj_io_analog_sel[11] + ( mprj_pads.area1_io_pad\[11\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3691775 ) ( 3379365 * ) ; + - mprj_io_dm[35] ( mprj_pads.area1_io_pad\[11\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3694995 ) ( 3379365 * ) ; + - mprj_io_holdover[11] ( mprj_pads.area1_io_pad\[11\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3698215 ) ( 3379365 * ) ; + - mprj_io_out[11] ( mprj_pads.area1_io_pad\[11\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3700975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[11] ( mprj_pads.area1_io_pad\[11\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3710175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[11] + ( mprj_pads.area1_io_pad\[11\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3713395 ) ( 3379365 * ) ; + - mprj_io_oeb[11] ( mprj_pads.area1_io_pad\[11\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3716615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[11\]/IN_H + ( mprj_pads.area1_io_pad\[11\] IN_H ) ; + - constant_block_3/vssd ( constant_block_3 vssd ) ; + - flash_clk_pad/DM[2] ( flash_clk_pad DM[2] ) + ( flash_clk_pad DM[1] ) ( constant_block_3 one ) + ( flash_clk_pad ENABLE_VDDIO ) + + ROUTED met2 ( 1802980 210575 ) via_260_260_hv + NEW met2 ( 1802920 210665 ) ( 1803040 * ) + NEW met1 TAPERRULE met1_width_260 ( 1772360 210575 ) ( 1802780 * ) + NEW met1 ( 1772160 210575 ) via_260_260_hv ( * 210665 ) + ( 1772220 * ) + NEW met1 TAPERRULE met1_width_260 ( 1759955 210575 ) ( 1771960 * ) + NEW met1 ( 1759755 210575 ) via_260_260_hv ( * 210665 ) + ( 1759815 * ) + NEW met1 TAPERRULE met1_width_260 ( 1749880 210575 ) ( 1759555 * ) + NEW met2 ( 1759695 210485 ) ( 1759815 * ) + NEW met2 ( 1772100 210485 ) ( 1772220 * ) + NEW met2 ( 1802920 210485 ) ( 1803040 * ) + NEW met1 TAPERRULE met1_width_260 ( 1803180 210575 ) ( 1830715 * ) via_260_260_hv + ( * 210665 ) ( 1830775 * ) + NEW met2 TAPERRULE met2_width_260 ( 1830715 203980 ) ( * 210375 ) + NEW met2 ( 1830635 203840 ) ( 1830795 * ) + NEW met2 ( 1830715 203715 ) via2_300_300_vx + NEW met3 ( 1830690 203740 ) ( 1830740 * ) + NEW met3 ( 1831015 203715 ) ( 1837270 * ) + NEW met3 ( 1830690 203690 ) ( 1830740 * ) + NEW met3 ( 1830690 203715 ) ( 1830415 * ) + NEW met2 ( 1830635 203590 ) ( 1830795 * ) ; + - mprj_io[7] ( mprj_pads.area1_io_pad\[7\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 2746000 ) ( * 2807000 ) ; + - mprj_pads.area1_io_pad\[7\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[7\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[7\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[7\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 2740557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 2741240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 2741380 ) ( * 2779745 ) + NEW met1 ( 3378000 2779885 ) ( 3378120 * ) + NEW met1 ( 3378060 2780275 ) via_260_860_vh + NEW met2 ( 3377105 2780645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 2780570 ) ( 3379365 * ) + NEW met1 ( 3378000 2780665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 2780805 ) ( * 2801365 ) + NEW met1 ( 3378000 2801505 ) ( 3378120 * ) + NEW met1 ( 3378060 2801895 ) via_260_860_vh + NEW met2 ( 3377105 2802265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 2802190 ) ( 3379365 * ) + NEW met1 ( 3378000 2802285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 2802190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 2780570 ) ( 3377860 * ) + NEW met2 ( 3378060 2740850 ) via_260_860_vh ( * 2740460 ) + ( 3378120 * ) + NEW met1 ( 3378010 2740395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 2740557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 2740485 ) ( 3379365 * ) ; + - mprj_io_in[7] ( mprj_pads.area1_io_pad\[7\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2743775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[7\]/HLD_H_N + ( mprj_pads.area1_io_pad\[7\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[7\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 2787085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 2787012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 2787110 ) ( 3377640 * ) + NEW met1 ( 3377580 2786720 ) via_260_860_vh + NEW met1 ( 3377520 2786330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 2747225 ) ( * 2786190 ) + NEW met1 ( 3377520 2747085 ) ( 3377640 * ) + NEW met1 ( 3377580 2746995 ) via_260_260_vh + NEW met2 ( 3377105 2747065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 2746995 ) ( 3379365 * ) + NEW met2 ( 3377105 2746925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 2746995 ) ( 3377380 * ) + NEW met1 ( 3377520 2746905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 2740395 ) ( * 2746765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 2787012.5 ) ( 3377380 * ) ; + - mprj_io_one[7] ( mprj_pads.area1_io_pad\[7\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2749755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[7] ( mprj_pads.area1_io_pad\[7\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2752975 ) ( 3379365 * ) ; + - mprj_analog_io[0] ( mprj_pads.area1_io_pad\[7\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2756195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[7\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[7\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[22] ( mprj_pads.area1_io_pad\[7\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2762175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[7\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[7\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[7] ( mprj_pads.area1_io_pad\[7\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2768155 ) ( 3379365 * ) ; + - mprj_io_dm[21] ( mprj_pads.area1_io_pad\[7\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2771375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[7] ( mprj_pads.area1_io_pad\[7\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2774595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[7] ( mprj_pads.area1_io_pad\[7\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2777355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[7\]/ENABLE_H + ( mprj_pads.area1_io_pad\[7\] ENABLE_H ) ; + - mprj_io_analog_sel[7] ( mprj_pads.area1_io_pad\[7\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2789775 ) ( 3379365 * ) ; + - mprj_io_dm[23] ( mprj_pads.area1_io_pad\[7\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2792995 ) ( 3379365 * ) ; + - mprj_io_holdover[7] ( mprj_pads.area1_io_pad\[7\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2796215 ) ( 3379365 * ) ; + - mprj_io_out[7] ( mprj_pads.area1_io_pad\[7\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2798975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[7] ( mprj_pads.area1_io_pad\[7\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2808175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[7] + ( mprj_pads.area1_io_pad\[7\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2811395 ) ( 3379365 * ) ; + - mprj_io_oeb[7] ( mprj_pads.area1_io_pad\[7\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2814615 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[7\]/IN_H + ( mprj_pads.area1_io_pad\[7\] IN_H ) ; + - constant_block_2/vssd ( constant_block_2 vssd ) + ( constant_block_1 vssd ) ; + - flash_csb_pad/DM[2] ( flash_csb_pad DM[2] ) + ( flash_csb_pad DM[1] ) ( constant_block_2 one ) + ( flash_csb_pad ENABLE_VDDIO ) + + ROUTED met2 ( 1529000 210575 ) via_260_260_hv + NEW met2 ( 1528940 210665 ) ( 1529060 * ) + NEW met1 TAPERRULE met1_width_260 ( 1498365 210575 ) ( 1528800 * ) + NEW met1 ( 1498165 210575 ) via_260_260_hv ( * 210665 ) + ( 1498225 * ) + NEW met1 TAPERRULE met1_width_260 ( 1485955 210575 ) ( 1497965 * ) + NEW met1 ( 1485755 210575 ) via_260_260_hv ( * 210665 ) + ( 1485815 * ) + NEW met1 TAPERRULE met1_width_260 ( 1475880 210575 ) ( 1485555 * ) + NEW met2 ( 1485695 210485 ) ( 1485815 * ) + NEW met2 ( 1498105 210485 ) ( 1498225 * ) + NEW met2 ( 1528940 210485 ) ( 1529060 * ) + NEW met1 TAPERRULE met1_width_260 ( 1529200 210575 ) ( 1556715 * ) via_260_260_hv + ( * 210665 ) ( 1556775 * ) + NEW met2 TAPERRULE met2_width_260 ( 1556715 203980 ) ( * 210375 ) + NEW met2 ( 1556635 203840 ) ( 1556795 * ) + NEW met2 ( 1556715 203715 ) via2_300_300_vx + NEW met3 ( 1556690 203740 ) ( 1556740 * ) + NEW met3 ( 1557015 203715 ) ( 1563270 * ) + NEW met3 ( 1556690 203690 ) ( 1556740 * ) + NEW met3 ( 1556690 203715 ) ( 1556415 * ) + NEW met2 ( 1556635 203590 ) ( 1556795 * ) ; + - mprj_io[26] ( mprj_pads.area2_io_pad\[7\] PAD ) ; + - mprj_io_in[26] ( mprj_pads.area2_io_pad\[7\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3781225 ) ( 210895 * ) ; + - mprj_io_one[26] ( mprj_pads.area2_io_pad\[7\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3775245 ) ( 210895 * ) ; + - mprj_io_slow_sel[26] ( mprj_pads.area2_io_pad\[7\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3772025 ) ( 210895 * ) ; + - mprj_analog_io[19] ( mprj_pads.area2_io_pad\[7\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3768805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[7\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[7\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[79] ( mprj_pads.area2_io_pad\[7\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3762825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[7\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[7\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[26] ( mprj_pads.area2_io_pad\[7\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3756845 ) ( 210895 * ) ; + - mprj_io_dm[78] ( mprj_pads.area2_io_pad\[7\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3753625 ) ( 210895 * ) ; + - mprj_io_analog_pol[26] ( mprj_pads.area2_io_pad\[7\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3750405 ) ( 210895 * ) ; + - mprj_io_inp_dis[26] ( mprj_pads.area2_io_pad\[7\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3747645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[7\]/ENABLE_H + ( mprj_pads.area2_io_pad\[7\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[7\]/HLD_H_N + ( mprj_pads.area2_io_pad\[7\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[7\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3737915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3737987.5 ) ( 210220 * ) + NEW met1 ( 210360 3738670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3738810 ) ( * 3777775 ) + NEW met1 ( 210360 3777915 ) ( 210480 * ) + NEW met1 ( 210420 3778005 ) via_260_260_vh + NEW met2 ( 208635 3778075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3778005 ) ( 210895 * ) + NEW met2 ( 208635 3777935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3778005 ) ( 210220 * ) + NEW met1 ( 210360 3778095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3778235 ) ( * 3784605 ) + NEW met1 ( 210420 3738280 ) via_260_860_vh + NEW met1 ( 210360 3737890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3737987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[26] ( mprj_pads.area2_io_pad\[7\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3735225 ) ( 210895 * ) ; + - mprj_io_dm[80] ( mprj_pads.area2_io_pad\[7\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3732005 ) ( 210895 * ) ; + - mprj_io_holdover[26] ( mprj_pads.area2_io_pad\[7\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3728785 ) ( 210895 * ) ; + - mprj_io_out[26] ( mprj_pads.area2_io_pad\[7\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3726025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[7\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[7\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[7\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[7\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 3784442.5 ) ( 210895 * ) + NEW met2 ( 208635 3784515 ) ( 210895 * ) + NEW met1 ( 209880 3784540 ) ( 210000 * ) + NEW met1 ( 209890 3784605 ) ( 209990 * ) + NEW met1 ( 209940 3784150 ) via_260_860_vh + NEW met1 ( 209880 3783760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3745255 ) ( * 3783620 ) + NEW met1 ( 209880 3745115 ) ( 210000 * ) + NEW met1 ( 209940 3744725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3744430 ) ( 210895 * ) + NEW met2 ( 208635 3744355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3744430 ) ( 209740 * ) + NEW met1 ( 209880 3744335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3723635 ) ( * 3744195 ) + NEW met1 ( 209880 3723495 ) ( 210000 * ) + NEW met1 ( 209940 3723105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3722810 ) ( 210895 * ) + NEW met2 ( 208635 3722735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3722810 ) ( 209740 * ) + NEW met1 ( 209880 3722715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3784442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[26] ( mprj_pads.area2_io_pad\[7\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3716825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[26] + ( mprj_pads.area2_io_pad\[7\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3713605 ) ( 210895 * ) ; + - mprj_io_oeb[26] ( mprj_pads.area2_io_pad\[7\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3710385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[7\]/IN_H + ( mprj_pads.area2_io_pad\[7\] IN_H ) ; + - vccd_pad ( mgmt_vccd_lvclamp_pad VCCD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 31635 377470 ) ( 97295 * ) ; + - mprj_io[36] ( mprj_pads.area2_io_pad\[17\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211490 2279070 ) ( * 4585600 ) + NEW met5 TAPERRULE met5_width_13000 ( 211490 4609480 ) ( * 4974220 ) + NEW met4 TAPERRULE met4_width_540 ( 205060 4608950 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_400 ( 217720 4586550 ) ( * 4608530 ) + NEW met4 TAPERRULE met4_width_470 ( 205060 4586165 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_570 ( 205195 4586550 ) ( * 4608530 ) + NEW met4 ( 211500 4597540 ) via4_12040_22280 + NEW met3 TAPERRULE met3_width_580 ( 204420 4608970 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_16570 ( 225805 4586550 ) ( * 4608530 ) + NEW met3 TAPERRULE met3_width_450 ( 204420 4586175 ) ( 233940 * ) + NEW met3 TAPERRULE met3_width_1210 ( 204875 4586550 ) ( * 4608530 ) + NEW met3 ( 211500 4597540 ) via3_12040_22280_hx + NEW met5 TAPERRULE met5_width_13000 ( 211490 2228780 ) ( * 2254410 ) + NEW met4 TAPERRULE met4_width_520 ( 205190 2278530 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_550 ( 217815 2255360 ) ( * 2278120 ) + NEW met4 TAPERRULE met4_width_460 ( 205190 2254980 ) ( 217940 * ) + NEW met4 TAPERRULE met4_width_670 ( 205375 2255360 ) ( * 2278120 ) + NEW met4 ( 211625 2266740 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_430 ( 206250 2278485 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16600 ( 225840 2255360 ) ( * 2278120 ) + NEW met3 TAPERRULE met3_width_455 ( 206250 2254982.5 ) ( 233990 * ) + NEW met3 ( 211625 2266740 ) via3_11830_23060_vx + NEW met5 TAPERRULE met5_width_13000 ( 211490 897300 ) ( * 2204120 ) + NEW met4 TAPERRULE met4_width_540 ( 205120 2228250 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_580 ( 217730 2205070 ) ( * 2227830 ) + NEW met4 TAPERRULE met4_width_440 ( 205120 2204700 ) ( 217870 * ) + NEW met4 TAPERRULE met4_width_640 ( 205290 2205070 ) ( * 2227830 ) + NEW met4 ( 211525 2216450 ) via4_11830_23060 + NEW met3 TAPERRULE met3_width_520 ( 206250 2228240 ) ( 233990 * ) + NEW met3 TAPERRULE met3_width_16700 ( 225790 2205070 ) ( * 2227830 ) + NEW met3 TAPERRULE met3_width_420 ( 206250 2204710 ) ( 233990 * ) + NEW met3 ( 211525 2216450 ) via3_11830_23060_vx ; + - mprj_io_in[36] ( mprj_pads.area2_io_pad\[17\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1199225 ) ( 210895 * ) ; + - mprj_io_one[36] ( mprj_pads.area2_io_pad\[17\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1193245 ) ( 210895 * ) ; + - mprj_io_slow_sel[36] ( mprj_pads.area2_io_pad\[17\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1190025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[17\]/PAD_A_ESD_0_H + ( mprj_pads.area2_io_pad\[17\] PAD_A_ESD_0_H ) ; + - mprj_pads.area2_io_pad\[17\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[17\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[109] ( mprj_pads.area2_io_pad\[17\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1180825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[17\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[17\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[36] ( mprj_pads.area2_io_pad\[17\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1174845 ) ( 210895 * ) ; + - mprj_io_dm[108] ( mprj_pads.area2_io_pad\[17\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1171625 ) ( 210895 * ) ; + - mprj_io_analog_pol[36] + ( mprj_pads.area2_io_pad\[17\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1168405 ) ( 210895 * ) ; + - mprj_io_inp_dis[36] ( mprj_pads.area2_io_pad\[17\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1165645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[17\]/ENABLE_H + ( mprj_pads.area2_io_pad\[17\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[17\]/HLD_H_N + ( mprj_pads.area2_io_pad\[17\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[17\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 1155915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1155987.5 ) ( 210220 * ) + NEW met1 ( 210360 1156670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1156810 ) ( * 1195775 ) + NEW met1 ( 210360 1195915 ) ( 210480 * ) + NEW met1 ( 210420 1196005 ) via_260_260_vh + NEW met2 ( 208635 1196075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 1196005 ) ( 210895 * ) + NEW met2 ( 208635 1195935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 1196005 ) ( 210220 * ) + NEW met1 ( 210360 1196095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1196235 ) ( * 1202605 ) + NEW met1 ( 210420 1156280 ) via_260_860_vh + NEW met1 ( 210360 1155890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 1155987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[36] + ( mprj_pads.area2_io_pad\[17\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1153225 ) ( 210895 * ) ; + - mprj_io_dm[110] ( mprj_pads.area2_io_pad\[17\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1150005 ) ( 210895 * ) ; + - mprj_io_holdover[36] ( mprj_pads.area2_io_pad\[17\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1146785 ) ( 210895 * ) ; + - mprj_io_out[36] ( mprj_pads.area2_io_pad\[17\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1144025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[17\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[17\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[17\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[17\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 1202442.5 ) ( 210895 * ) + NEW met2 ( 208635 1202515 ) ( 210895 * ) + NEW met1 ( 209880 1202540 ) ( 210000 * ) + NEW met1 ( 209890 1202605 ) ( 209990 * ) + NEW met1 ( 209940 1202150 ) via_260_860_vh + NEW met1 ( 209880 1201760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1163255 ) ( * 1201620 ) + NEW met1 ( 209880 1163115 ) ( 210000 * ) + NEW met1 ( 209940 1162725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1162430 ) ( 210895 * ) + NEW met2 ( 208635 1162355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1162430 ) ( 209740 * ) + NEW met1 ( 209880 1162335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1141635 ) ( * 1162195 ) + NEW met1 ( 209880 1141495 ) ( 210000 * ) + NEW met1 ( 209940 1141105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1140810 ) ( 210895 * ) + NEW met2 ( 208635 1140735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1140810 ) ( 209740 * ) + NEW met1 ( 209880 1140715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1202442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[36] ( mprj_pads.area2_io_pad\[17\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1134825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[36] + ( mprj_pads.area2_io_pad\[17\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1131605 ) ( 210895 * ) ; + - mprj_io_oeb[36] ( mprj_pads.area2_io_pad\[17\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1128385 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[17\]/IN_H + ( mprj_pads.area2_io_pad\[17\] IN_H ) ; + - clock ( clock_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 939000 64215 ) ( 1000000 * ) ; + - clock_pad/TIE_LO_ESD ( clock_pad TIE_LO_ESD ) + ( clock_pad ENABLE_VSWITCH_H ) ( clock_pad ENABLE_INP_H ) + + ROUTED met2 ( 933545 209315 ) via_260_260_hv + NEW met2 ( 933485 209405 ) ( 933605 * ) + NEW met1 TAPERRULE met1_width_260 ( 932810 209315 ) ( 933345 * ) + NEW met2 ( 933485 209225 ) ( 933605 * ) + NEW met1 TAPERRULE met1_width_260 ( 933745 209315 ) ( 973570 * ) via_260_260_hv + ( * 209405 ) ( 973630 * ) + NEW met2 ( 973510 209225 ) ( 973630 * ) + NEW met1 TAPERRULE met1_width_260 ( 973770 209315 ) ( 995190 * ) via_260_260_hv + ( * 209405 ) ( 995250 * ) + NEW met2 ( 995130 209225 ) ( 995250 * ) + NEW met1 TAPERRULE met1_width_260 ( 995390 209315 ) ( 1010740 * ) ; + - clock_core ( clock_pad IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 936775 208635 ) ( * 210895 ) ; + - clock_pad/HLD_H_N ( clock_pad HLD_H_N ) ( clock_pad TIE_HI_ESD ) + + ROUTED met2 ( 979995 209735 ) via_260_260_hv + NEW met2 ( 979935 209825 ) ( 980055 * ) + NEW met1 TAPERRULE met1_width_260 ( 940170 209735 ) ( 979795 * ) + NEW met1 ( 939970 209735 ) via_260_260_hv ( * 209825 ) + ( 940030 * ) + NEW met1 TAPERRULE met1_width_260 ( 932810 209735 ) ( 939770 * ) + NEW met2 ( 939910 209645 ) ( 940030 * ) + NEW met2 ( 979935 209645 ) ( 980055 * ) + NEW met1 TAPERRULE met1_width_260 ( 980195 209735 ) ( 1010740 * ) ; + - clock_pad/OUT ( clock_pad OUT ) ( constant_block_1 zero ) + ( clock_pad IB_MODE_SEL ) ( clock_pad VTRIP_SEL ) + ( clock_pad SLOW ) ( clock_pad HLD_OVR ) ( clock_pad DM[2] ) + ( clock_pad ANALOG_SEL ) ( clock_pad ANALOG_POL ) + ( clock_pad ANALOG_EN ) ( clock_pad DM[1] ) + + ROUTED met2 ( 991970 210155 ) via_260_260_hv + NEW met2 ( 991910 210245 ) ( 992030 * ) + NEW met1 TAPERRULE met1_width_260 ( 989395 210155 ) ( 991770 * ) + NEW met1 ( 989195 210155 ) via_260_260_hv ( * 210245 ) + ( 989255 * ) + NEW met1 TAPERRULE met1_width_260 ( 986180 210155 ) ( 988995 * ) + NEW met1 ( 985980 210155 ) via_260_260_hv ( * 210245 ) + ( 986040 * ) + NEW met1 TAPERRULE met1_width_260 ( 982970 210155 ) ( 985780 * ) + NEW met1 ( 982770 210155 ) via_260_260_hv ( * 210245 ) + ( 982830 * ) + NEW met1 TAPERRULE met1_width_260 ( 967775 210155 ) ( 982570 * ) + NEW met1 ( 967575 210155 ) via_260_260_hv ( * 210245 ) + ( 967635 * ) + NEW met1 TAPERRULE met1_width_260 ( 961340 210155 ) ( 967375 * ) + NEW met1 ( 961140 210155 ) via_260_260_hv ( * 210245 ) + ( 961200 * ) + NEW met1 TAPERRULE met1_width_260 ( 955345 210155 ) ( 960940 * ) + NEW met1 ( 955145 210155 ) via_260_260_hv ( * 210245 ) + ( 955205 * ) + NEW met1 TAPERRULE met1_width_260 ( 946145 210155 ) ( 954945 * ) + NEW met1 ( 945945 210155 ) via_260_260_hv ( * 210245 ) + ( 946005 * ) + NEW met1 TAPERRULE met1_width_260 ( 932810 210155 ) ( 945745 * ) + NEW met2 ( 945885 210065 ) ( 946005 * ) + NEW met2 ( 955085 210065 ) ( 955205 * ) + NEW met2 ( 961080 210065 ) ( 961200 * ) + NEW met2 ( 967515 210065 ) ( 967635 * ) + NEW met2 ( 982710 210065 ) ( 982830 * ) + NEW met2 ( 985920 210065 ) ( 986040 * ) + NEW met2 ( 989135 210065 ) ( 989255 * ) + NEW met2 ( 991910 210065 ) ( 992030 * ) + NEW met1 TAPERRULE met1_width_260 ( 992170 210155 ) ( 1001160 * ) via_260_260_hv + ( * 210245 ) ( 1001220 * ) + NEW met2 ( 1001100 210065 ) ( 1001220 * ) + NEW met1 TAPERRULE met1_width_260 ( 1001360 210155 ) ( 1004415 * ) via_260_260_hv + ( * 210245 ) ( 1004475 * ) + NEW met2 ( 1004355 210065 ) ( 1004475 * ) + NEW met1 TAPERRULE met1_width_260 ( 1004615 210155 ) ( 1012945 * ) via_260_260_hv + ( * 210245 ) ( 1013005 * ) + NEW met2 TAPERRULE met2_width_260 ( 1012945 204845 ) ( * 209955 ) + NEW met2 ( 1012865 204705 ) ( 1013025 * ) + NEW met2 ( 1012945 204580 ) via2_300_300_vx + NEW met3 ( 1012920 204605 ) ( 1012970 * ) + NEW met3 ( 1013245 204580 ) ( 1024240 * ) + NEW met3 ( 1024240 203715 ) ( * 204280 ) + NEW met3 ( 1012920 204555 ) ( 1012970 * ) + NEW met3 ( 1012920 204580 ) ( 1012645 * ) + NEW met2 ( 1012865 204455 ) ( 1013025 * ) ; + - clock_pad/PAD_A_ESD_0_H ( clock_pad PAD_A_ESD_0_H ) ; + - clock_pad/PAD_A_ESD_1_H ( clock_pad PAD_A_ESD_1_H ) ; + - clock_pad/PAD_A_NOESD_H ( clock_pad PAD_A_NOESD_H ) ; + - por ( clock_pad INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 970355 208635 ) ( * 210895 ) ; + - clock_pad/IN_H ( clock_pad IN_H ) ; END NETS END DESIGN diff --git a/def/chip_io_alt.def b/def/chip_io_alt.def new file mode 100644 index 00000000..1bab03f5 --- /dev/null +++ b/def/chip_io_alt.def @@ -0,0 +1,28371 @@ +VERSION 5.7 ; + NAMESCASESENSITIVE ON ; + DIVIDERCHAR "/" ; + BUSBITCHARS "()" ; + DESIGN chip_io_alt ; + TECHNOLOGY sky130A ; + UNITS DISTANCE MICRONS 1000 ; + DIEAREA ( 0 0 ) ( 3588000 5188000 ) ; + +VIAS 31 ; + - via4_11630_22770 + + RECT met4 ( -5815 -11385 ) ( 5815 11385 ) + + RECT met5 ( -5935 -11505 ) ( 5935 11505 ) + + RECT via4 ( -5200 -10800 ) ( -4400 -10000 ) + + RECT via4 ( -3600 -10800 ) ( -2800 -10000 ) + + RECT via4 ( -2000 -10800 ) ( -1200 -10000 ) + + RECT via4 ( -400 -10800 ) ( 400 -10000 ) + + RECT via4 ( 1200 -10800 ) ( 2000 -10000 ) + + RECT via4 ( 2800 -10800 ) ( 3600 -10000 ) + + RECT via4 ( 4400 -10800 ) ( 5200 -10000 ) + + RECT via4 ( -5200 -9200 ) ( -4400 -8400 ) + + RECT via4 ( -3600 -9200 ) ( -2800 -8400 ) + + RECT via4 ( -2000 -9200 ) ( -1200 -8400 ) + + RECT via4 ( -400 -9200 ) ( 400 -8400 ) + + RECT via4 ( 1200 -9200 ) ( 2000 -8400 ) + + RECT via4 ( 2800 -9200 ) ( 3600 -8400 ) + + RECT via4 ( 4400 -9200 ) ( 5200 -8400 ) + + RECT via4 ( -5200 -7600 ) ( -4400 -6800 ) + + RECT via4 ( -3600 -7600 ) ( -2800 -6800 ) + + RECT via4 ( -2000 -7600 ) ( -1200 -6800 ) + + RECT via4 ( -400 -7600 ) ( 400 -6800 ) + + RECT via4 ( 1200 -7600 ) ( 2000 -6800 ) + + RECT via4 ( 2800 -7600 ) ( 3600 -6800 ) + + RECT via4 ( 4400 -7600 ) ( 5200 -6800 ) + + RECT via4 ( -5200 -6000 ) ( -4400 -5200 ) + + RECT via4 ( -3600 -6000 ) ( -2800 -5200 ) + + RECT via4 ( -2000 -6000 ) ( -1200 -5200 ) + + RECT via4 ( -400 -6000 ) ( 400 -5200 ) + + RECT via4 ( 1200 -6000 ) ( 2000 -5200 ) + + RECT via4 ( 2800 -6000 ) ( 3600 -5200 ) + + RECT via4 ( 4400 -6000 ) ( 5200 -5200 ) + + RECT via4 ( -5200 -4400 ) ( -4400 -3600 ) + + RECT via4 ( -3600 -4400 ) ( -2800 -3600 ) + + RECT via4 ( -2000 -4400 ) ( -1200 -3600 ) + + RECT via4 ( -400 -4400 ) ( 400 -3600 ) + + RECT via4 ( 1200 -4400 ) ( 2000 -3600 ) + + RECT via4 ( 2800 -4400 ) ( 3600 -3600 ) + + RECT via4 ( 4400 -4400 ) ( 5200 -3600 ) + + RECT via4 ( -5200 -2800 ) ( -4400 -2000 ) + + RECT via4 ( -3600 -2800 ) ( -2800 -2000 ) + + RECT via4 ( -2000 -2800 ) ( -1200 -2000 ) + + RECT via4 ( -400 -2800 ) ( 400 -2000 ) + + RECT via4 ( 1200 -2800 ) ( 2000 -2000 ) + + RECT via4 ( 2800 -2800 ) ( 3600 -2000 ) + + RECT via4 ( 4400 -2800 ) ( 5200 -2000 ) + + RECT via4 ( -5200 -1200 ) ( -4400 -400 ) + + RECT via4 ( -3600 -1200 ) ( -2800 -400 ) + + RECT via4 ( -2000 -1200 ) ( -1200 -400 ) + + RECT via4 ( -400 -1200 ) ( 400 -400 ) + + RECT via4 ( 1200 -1200 ) ( 2000 -400 ) + + RECT via4 ( 2800 -1200 ) ( 3600 -400 ) + + RECT via4 ( 4400 -1200 ) ( 5200 -400 ) + + RECT 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( -500 8300 ) ( -300 8500 ) + + RECT via3 ( -100 8300 ) ( 100 8500 ) + + RECT via3 ( 300 8300 ) ( 500 8500 ) + + RECT via3 ( 700 8300 ) ( 900 8500 ) + + RECT via3 ( 1100 8300 ) ( 1300 8500 ) + + RECT via3 ( 1500 8300 ) ( 1700 8500 ) + + RECT via3 ( 1900 8300 ) ( 2100 8500 ) + + RECT via3 ( 2300 8300 ) ( 2500 8500 ) + + RECT via3 ( 2700 8300 ) ( 2900 8500 ) + + RECT via3 ( 3100 8300 ) ( 3300 8500 ) + + RECT via3 ( 3500 8300 ) ( 3700 8500 ) + + RECT via3 ( 3900 8300 ) ( 4100 8500 ) + + RECT via3 ( 4300 8300 ) ( 4500 8500 ) + + RECT via3 ( 4700 8300 ) ( 4900 8500 ) + + RECT via3 ( 5100 8300 ) ( 5300 8500 ) + + RECT via3 ( 5500 8300 ) ( 5700 8500 ) + + RECT via3 ( -5700 8700 ) ( -5500 8900 ) + + RECT via3 ( -5300 8700 ) ( -5100 8900 ) + + RECT via3 ( -4900 8700 ) ( -4700 8900 ) + + RECT via3 ( -4500 8700 ) ( -4300 8900 ) + + RECT via3 ( -4100 8700 ) ( -3900 8900 ) + + RECT via3 ( -3700 8700 ) ( -3500 8900 ) + + RECT via3 ( -3300 8700 ) ( -3100 8900 ) + + RECT via3 ( -2900 8700 ) ( -2700 8900 ) + + RECT via3 ( -2500 8700 ) ( -2300 8900 ) + + RECT via3 ( -2100 8700 ) ( -1900 8900 ) + + RECT via3 ( -1700 8700 ) ( -1500 8900 ) + + RECT via3 ( -1300 8700 ) ( -1100 8900 ) + + RECT via3 ( -900 8700 ) ( -700 8900 ) + + RECT via3 ( -500 8700 ) ( -300 8900 ) + + RECT via3 ( -100 8700 ) ( 100 8900 ) + + RECT via3 ( 300 8700 ) ( 500 8900 ) + + RECT via3 ( 700 8700 ) ( 900 8900 ) + + RECT via3 ( 1100 8700 ) ( 1300 8900 ) + + RECT via3 ( 1500 8700 ) ( 1700 8900 ) + + RECT via3 ( 1900 8700 ) ( 2100 8900 ) + + RECT via3 ( 2300 8700 ) ( 2500 8900 ) + + RECT via3 ( 2700 8700 ) ( 2900 8900 ) + + RECT via3 ( 3100 8700 ) ( 3300 8900 ) + + RECT via3 ( 3500 8700 ) ( 3700 8900 ) + + RECT via3 ( 3900 8700 ) ( 4100 8900 ) + + RECT via3 ( 4300 8700 ) ( 4500 8900 ) + + RECT via3 ( 4700 8700 ) ( 4900 8900 ) + + RECT via3 ( 5100 8700 ) ( 5300 8900 ) + + RECT via3 ( 5500 8700 ) ( 5700 8900 ) + + RECT via3 ( -5700 9100 ) ( -5500 9300 ) + + RECT via3 ( -5300 9100 ) ( -5100 9300 ) + + RECT via3 ( -4900 9100 ) ( -4700 9300 ) + + RECT via3 ( -4500 9100 ) ( -4300 9300 ) + + RECT via3 ( -4100 9100 ) ( -3900 9300 ) + + RECT via3 ( -3700 9100 ) ( -3500 9300 ) + + RECT via3 ( -3300 9100 ) ( -3100 9300 ) + + RECT via3 ( -2900 9100 ) ( -2700 9300 ) + + RECT via3 ( -2500 9100 ) ( -2300 9300 ) + + RECT via3 ( -2100 9100 ) ( -1900 9300 ) + + RECT via3 ( -1700 9100 ) ( -1500 9300 ) + + RECT via3 ( -1300 9100 ) ( -1100 9300 ) + + RECT via3 ( -900 9100 ) ( -700 9300 ) + + RECT via3 ( -500 9100 ) ( -300 9300 ) + + RECT via3 ( -100 9100 ) ( 100 9300 ) + + RECT via3 ( 300 9100 ) ( 500 9300 ) + + RECT via3 ( 700 9100 ) ( 900 9300 ) + + RECT via3 ( 1100 9100 ) ( 1300 9300 ) + + RECT via3 ( 1500 9100 ) ( 1700 9300 ) + + RECT via3 ( 1900 9100 ) ( 2100 9300 ) + + RECT via3 ( 2300 9100 ) ( 2500 9300 ) + + RECT via3 ( 2700 9100 ) ( 2900 9300 ) + + RECT via3 ( 3100 9100 ) ( 3300 9300 ) + + RECT via3 ( 3500 9100 ) ( 3700 9300 ) + + RECT via3 ( 3900 9100 ) ( 4100 9300 ) + + RECT via3 ( 4300 9100 ) ( 4500 9300 ) + + RECT via3 ( 4700 9100 ) ( 4900 9300 ) + + RECT via3 ( 5100 9100 ) ( 5300 9300 ) + + RECT via3 ( 5500 9100 ) ( 5700 9300 ) + + RECT via3 ( -5700 9500 ) ( -5500 9700 ) + + RECT via3 ( -5300 9500 ) ( -5100 9700 ) + + RECT via3 ( -4900 9500 ) ( -4700 9700 ) + + RECT via3 ( -4500 9500 ) ( -4300 9700 ) + + RECT via3 ( -4100 9500 ) ( -3900 9700 ) + + RECT via3 ( -3700 9500 ) ( -3500 9700 ) + + RECT via3 ( -3300 9500 ) ( -3100 9700 ) + + RECT via3 ( -2900 9500 ) ( -2700 9700 ) + + RECT via3 ( -2500 9500 ) ( -2300 9700 ) + + RECT via3 ( -2100 9500 ) ( -1900 9700 ) + + RECT via3 ( -1700 9500 ) ( -1500 9700 ) + + RECT via3 ( -1300 9500 ) ( -1100 9700 ) + + RECT via3 ( -900 9500 ) ( -700 9700 ) + + RECT via3 ( -500 9500 ) ( -300 9700 ) + + RECT via3 ( -100 9500 ) ( 100 9700 ) + + RECT via3 ( 300 9500 ) ( 500 9700 ) + + RECT via3 ( 700 9500 ) ( 900 9700 ) + + RECT via3 ( 1100 9500 ) ( 1300 9700 ) + + RECT via3 ( 1500 9500 ) ( 1700 9700 ) + + RECT via3 ( 1900 9500 ) ( 2100 9700 ) + + RECT via3 ( 2300 9500 ) ( 2500 9700 ) + + RECT via3 ( 2700 9500 ) ( 2900 9700 ) + + RECT via3 ( 3100 9500 ) ( 3300 9700 ) + + RECT via3 ( 3500 9500 ) ( 3700 9700 ) + + RECT via3 ( 3900 9500 ) ( 4100 9700 ) + + RECT via3 ( 4300 9500 ) ( 4500 9700 ) + + RECT via3 ( 4700 9500 ) ( 4900 9700 ) + + RECT via3 ( 5100 9500 ) ( 5300 9700 ) + + RECT via3 ( 5500 9500 ) ( 5700 9700 ) + + RECT via3 ( -5700 9900 ) ( -5500 10100 ) + + RECT via3 ( -5300 9900 ) ( -5100 10100 ) + + RECT via3 ( -4900 9900 ) ( -4700 10100 ) + + RECT via3 ( -4500 9900 ) ( -4300 10100 ) + + RECT via3 ( -4100 9900 ) ( -3900 10100 ) + + RECT via3 ( -3700 9900 ) ( -3500 10100 ) + + RECT via3 ( -3300 9900 ) ( -3100 10100 ) + + RECT via3 ( -2900 9900 ) ( -2700 10100 ) + + RECT via3 ( -2500 9900 ) ( -2300 10100 ) + + RECT via3 ( -2100 9900 ) ( -1900 10100 ) + + RECT via3 ( -1700 9900 ) ( -1500 10100 ) + + RECT via3 ( -1300 9900 ) ( -1100 10100 ) + + RECT via3 ( -900 9900 ) ( -700 10100 ) + + RECT via3 ( -500 9900 ) ( -300 10100 ) + + RECT via3 ( -100 9900 ) ( 100 10100 ) + + RECT via3 ( 300 9900 ) ( 500 10100 ) + + RECT via3 ( 700 9900 ) ( 900 10100 ) + + RECT via3 ( 1100 9900 ) ( 1300 10100 ) + + RECT via3 ( 1500 9900 ) ( 1700 10100 ) + + RECT via3 ( 1900 9900 ) ( 2100 10100 ) + + RECT via3 ( 2300 9900 ) ( 2500 10100 ) + + RECT via3 ( 2700 9900 ) ( 2900 10100 ) + + RECT via3 ( 3100 9900 ) ( 3300 10100 ) + + RECT via3 ( 3500 9900 ) ( 3700 10100 ) + + RECT via3 ( 3900 9900 ) ( 4100 10100 ) + + RECT via3 ( 4300 9900 ) ( 4500 10100 ) + + RECT via3 ( 4700 9900 ) ( 4900 10100 ) + + RECT via3 ( 5100 9900 ) ( 5300 10100 ) + + RECT via3 ( 5500 9900 ) ( 5700 10100 ) + + RECT via3 ( -5700 10300 ) ( -5500 10500 ) + + RECT via3 ( -5300 10300 ) ( -5100 10500 ) + + RECT via3 ( -4900 10300 ) ( -4700 10500 ) + + RECT via3 ( -4500 10300 ) ( -4300 10500 ) + + RECT via3 ( -4100 10300 ) ( -3900 10500 ) + + RECT via3 ( -3700 10300 ) ( -3500 10500 ) + + RECT via3 ( -3300 10300 ) ( -3100 10500 ) + + RECT via3 ( -2900 10300 ) ( -2700 10500 ) + + RECT via3 ( -2500 10300 ) ( -2300 10500 ) + + RECT via3 ( -2100 10300 ) ( -1900 10500 ) + + RECT via3 ( -1700 10300 ) ( -1500 10500 ) + + RECT via3 ( -1300 10300 ) ( -1100 10500 ) + + RECT via3 ( -900 10300 ) ( -700 10500 ) + + RECT via3 ( -500 10300 ) ( -300 10500 ) + + RECT via3 ( -100 10300 ) ( 100 10500 ) + + RECT via3 ( 300 10300 ) ( 500 10500 ) + + RECT via3 ( 700 10300 ) ( 900 10500 ) + + RECT via3 ( 1100 10300 ) ( 1300 10500 ) + + RECT via3 ( 1500 10300 ) ( 1700 10500 ) + + RECT via3 ( 1900 10300 ) ( 2100 10500 ) + + RECT via3 ( 2300 10300 ) ( 2500 10500 ) + + RECT via3 ( 2700 10300 ) ( 2900 10500 ) + + RECT via3 ( 3100 10300 ) ( 3300 10500 ) + + RECT via3 ( 3500 10300 ) ( 3700 10500 ) + + RECT via3 ( 3900 10300 ) ( 4100 10500 ) + + RECT via3 ( 4300 10300 ) ( 4500 10500 ) + + RECT via3 ( 4700 10300 ) ( 4900 10500 ) + + RECT via3 ( 5100 10300 ) ( 5300 10500 ) + + RECT via3 ( 5500 10300 ) ( 5700 10500 ) + + RECT via3 ( -5700 10700 ) ( -5500 10900 ) + + RECT via3 ( -5300 10700 ) ( -5100 10900 ) + + RECT via3 ( -4900 10700 ) ( -4700 10900 ) + + RECT via3 ( -4500 10700 ) ( -4300 10900 ) + + RECT via3 ( -4100 10700 ) ( -3900 10900 ) + + RECT via3 ( -3700 10700 ) ( -3500 10900 ) + + RECT via3 ( -3300 10700 ) ( -3100 10900 ) + + RECT via3 ( -2900 10700 ) ( -2700 10900 ) + + RECT via3 ( -2500 10700 ) ( -2300 10900 ) + + RECT via3 ( -2100 10700 ) ( -1900 10900 ) + + RECT via3 ( -1700 10700 ) ( -1500 10900 ) + + RECT via3 ( -1300 10700 ) ( -1100 10900 ) + + RECT via3 ( -900 10700 ) ( -700 10900 ) + + RECT via3 ( -500 10700 ) ( -300 10900 ) + + RECT via3 ( -100 10700 ) ( 100 10900 ) + + RECT via3 ( 300 10700 ) ( 500 10900 ) + + RECT via3 ( 700 10700 ) ( 900 10900 ) + + RECT via3 ( 1100 10700 ) ( 1300 10900 ) + + RECT via3 ( 1500 10700 ) ( 1700 10900 ) + + RECT via3 ( 1900 10700 ) ( 2100 10900 ) + + RECT via3 ( 2300 10700 ) ( 2500 10900 ) + + RECT via3 ( 2700 10700 ) ( 2900 10900 ) + + RECT via3 ( 3100 10700 ) ( 3300 10900 ) + + RECT via3 ( 3500 10700 ) ( 3700 10900 ) + + RECT via3 ( 3900 10700 ) ( 4100 10900 ) + + RECT via3 ( 4300 10700 ) ( 4500 10900 ) + + RECT via3 ( 4700 10700 ) ( 4900 10900 ) + + RECT via3 ( 5100 10700 ) ( 5300 10900 ) + + RECT via3 ( 5500 10700 ) ( 5700 10900 ) + + RECT via3 ( -5700 11100 ) ( -5500 11300 ) + + RECT via3 ( -5300 11100 ) ( -5100 11300 ) + + RECT via3 ( -4900 11100 ) ( -4700 11300 ) + + RECT via3 ( -4500 11100 ) ( -4300 11300 ) + + RECT via3 ( -4100 11100 ) ( -3900 11300 ) + + RECT via3 ( -3700 11100 ) ( -3500 11300 ) + + RECT via3 ( -3300 11100 ) ( -3100 11300 ) + + RECT via3 ( -2900 11100 ) ( -2700 11300 ) + + RECT via3 ( -2500 11100 ) ( -2300 11300 ) + + RECT via3 ( -2100 11100 ) ( -1900 11300 ) + + RECT via3 ( -1700 11100 ) ( -1500 11300 ) + + RECT via3 ( -1300 11100 ) ( -1100 11300 ) + + RECT via3 ( -900 11100 ) ( -700 11300 ) + + RECT via3 ( -500 11100 ) ( -300 11300 ) + + RECT via3 ( -100 11100 ) ( 100 11300 ) + + RECT via3 ( 300 11100 ) ( 500 11300 ) + + RECT via3 ( 700 11100 ) ( 900 11300 ) + + RECT via3 ( 1100 11100 ) ( 1300 11300 ) + + RECT via3 ( 1500 11100 ) ( 1700 11300 ) + + RECT via3 ( 1900 11100 ) ( 2100 11300 ) + + RECT via3 ( 2300 11100 ) ( 2500 11300 ) + + RECT via3 ( 2700 11100 ) ( 2900 11300 ) + + RECT via3 ( 3100 11100 ) ( 3300 11300 ) + + RECT via3 ( 3500 11100 ) ( 3700 11300 ) + + RECT via3 ( 3900 11100 ) ( 4100 11300 ) + + RECT via3 ( 4300 11100 ) ( 4500 11300 ) + + RECT via3 ( 4700 11100 ) ( 4900 11300 ) + + RECT via3 ( 5100 11100 ) ( 5300 11300 ) + + RECT via3 ( 5500 11100 ) ( 5700 11300 ) ; + - via4_11790_23020 + + RECT met4 ( -5895 -11510 ) ( 5895 11510 ) + + RECT met5 ( -6015 -11630 ) ( 6015 11630 ) + + RECT via4 ( -5200 -10800 ) ( -4400 -10000 ) + + RECT via4 ( -3600 -10800 ) ( -2800 -10000 ) + + RECT via4 ( -2000 -10800 ) ( -1200 -10000 ) + + RECT via4 ( -400 -10800 ) ( 400 -10000 ) + + RECT via4 ( 1200 -10800 ) ( 2000 -10000 ) + + RECT via4 ( 2800 -10800 ) ( 3600 -10000 ) + + RECT via4 ( 4400 -10800 ) ( 5200 -10000 ) + + RECT via4 ( -5200 -9200 ) ( -4400 -8400 ) + + RECT via4 ( -3600 -9200 ) ( -2800 -8400 ) + + RECT via4 ( -2000 -9200 ) ( -1200 -8400 ) + + RECT via4 ( -400 -9200 ) ( 400 -8400 ) + + RECT via4 ( 1200 -9200 ) ( 2000 -8400 ) + + RECT via4 ( 2800 -9200 ) ( 3600 -8400 ) + + RECT via4 ( 4400 -9200 ) ( 5200 -8400 ) + + RECT via4 ( -5200 -7600 ) ( -4400 -6800 ) + + RECT via4 ( -3600 -7600 ) ( -2800 -6800 ) + + RECT via4 ( -2000 -7600 ) ( -1200 -6800 ) + + RECT via4 ( -400 -7600 ) ( 400 -6800 ) + + RECT via4 ( 1200 -7600 ) ( 2000 -6800 ) + + RECT via4 ( 2800 -7600 ) ( 3600 -6800 ) + + RECT via4 ( 4400 -7600 ) ( 5200 -6800 ) + + RECT via4 ( -5200 -6000 ) ( -4400 -5200 ) + + RECT via4 ( -3600 -6000 ) ( -2800 -5200 ) + + RECT via4 ( -2000 -6000 ) ( -1200 -5200 ) + + RECT via4 ( -400 -6000 ) ( 400 -5200 ) + + RECT via4 ( 1200 -6000 ) ( 2000 -5200 ) + + RECT via4 ( 2800 -6000 ) ( 3600 -5200 ) + + RECT via4 ( 4400 -6000 ) ( 5200 -5200 ) + + RECT via4 ( -5200 -4400 ) ( -4400 -3600 ) + + RECT via4 ( -3600 -4400 ) ( -2800 -3600 ) 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400 1200 ) + + RECT via4 ( 1200 400 ) ( 2000 1200 ) + + RECT via4 ( 2800 400 ) ( 3600 1200 ) + + RECT via4 ( 4400 400 ) ( 5200 1200 ) + + RECT via4 ( -5200 2000 ) ( -4400 2800 ) + + RECT via4 ( -3600 2000 ) ( -2800 2800 ) + + RECT via4 ( -2000 2000 ) ( -1200 2800 ) + + RECT via4 ( -400 2000 ) ( 400 2800 ) + + RECT via4 ( 1200 2000 ) ( 2000 2800 ) + + RECT via4 ( 2800 2000 ) ( 3600 2800 ) + + RECT via4 ( 4400 2000 ) ( 5200 2800 ) + + RECT via4 ( -5200 3600 ) ( -4400 4400 ) + + RECT via4 ( -3600 3600 ) ( -2800 4400 ) + + RECT via4 ( -2000 3600 ) ( -1200 4400 ) + + RECT via4 ( -400 3600 ) ( 400 4400 ) + + RECT via4 ( 1200 3600 ) ( 2000 4400 ) + + RECT via4 ( 2800 3600 ) ( 3600 4400 ) + + RECT via4 ( 4400 3600 ) ( 5200 4400 ) + + RECT via4 ( -5200 5200 ) ( -4400 6000 ) + + RECT via4 ( -3600 5200 ) ( -2800 6000 ) + + RECT via4 ( -2000 5200 ) ( -1200 6000 ) + + RECT via4 ( -400 5200 ) ( 400 6000 ) + + RECT via4 ( 1200 5200 ) ( 2000 6000 ) + + RECT via4 ( 2800 5200 ) ( 3600 6000 ) + + RECT via4 ( 4400 5200 ) ( 5200 6000 ) + + RECT via4 ( -5200 6800 ) ( -4400 7600 ) + + RECT via4 ( -3600 6800 ) ( -2800 7600 ) + + RECT via4 ( -2000 6800 ) ( -1200 7600 ) + + RECT via4 ( -400 6800 ) ( 400 7600 ) + + RECT via4 ( 1200 6800 ) ( 2000 7600 ) + + RECT via4 ( 2800 6800 ) ( 3600 7600 ) + + RECT via4 ( 4400 6800 ) ( 5200 7600 ) + + RECT via4 ( -5200 8400 ) ( -4400 9200 ) + + RECT via4 ( -3600 8400 ) ( -2800 9200 ) + + RECT via4 ( -2000 8400 ) ( -1200 9200 ) + + RECT via4 ( -400 8400 ) ( 400 9200 ) + + RECT via4 ( 1200 8400 ) ( 2000 9200 ) + + RECT via4 ( 2800 8400 ) ( 3600 9200 ) + + RECT via4 ( 4400 8400 ) ( 5200 9200 ) + + RECT via4 ( -5200 10000 ) ( -4400 10800 ) + + RECT via4 ( -3600 10000 ) ( -2800 10800 ) + + RECT via4 ( -2000 10000 ) ( -1200 10800 ) + + RECT via4 ( -400 10000 ) ( 400 10800 ) + + RECT via4 ( 1200 10000 ) ( 2000 10800 ) + + RECT via4 ( 2800 10000 ) ( 3600 10800 ) + + RECT via4 ( 4400 10000 ) ( 5200 10800 ) ; + - via3_1825_3785_hx + + RECT met3 ( -942.5 -1892.5 ) ( 942.5 1892.5 ) + + RECT met4 ( -917.5 -1897.5 ) ( 917.5 1897.5 ) + + RECT via3 ( -700 -1700 ) ( -500 -1500 ) + + RECT via3 ( -300 -1700 ) ( -100 -1500 ) + + RECT via3 ( 100 -1700 ) ( 300 -1500 ) + + RECT via3 ( 500 -1700 ) ( 700 -1500 ) + + RECT via3 ( -700 -1300 ) ( -500 -1100 ) + + RECT via3 ( -300 -1300 ) ( -100 -1100 ) + + RECT via3 ( 100 -1300 ) ( 300 -1100 ) + + RECT via3 ( 500 -1300 ) ( 700 -1100 ) + + RECT via3 ( -700 -900 ) ( -500 -700 ) + + RECT via3 ( -300 -900 ) ( -100 -700 ) + + RECT via3 ( 100 -900 ) ( 300 -700 ) + + RECT via3 ( 500 -900 ) ( 700 -700 ) + + RECT via3 ( -700 -500 ) ( -500 -300 ) + + RECT via3 ( -300 -500 ) ( -100 -300 ) + + RECT via3 ( 100 -500 ) ( 300 -300 ) + + RECT via3 ( 500 -500 ) ( 700 -300 ) + + RECT via3 ( -700 -100 ) ( -500 100 ) + + RECT via3 ( -300 -100 ) ( -100 100 ) + + RECT via3 ( 100 -100 ) ( 300 100 ) + + RECT via3 ( 500 -100 ) ( 700 100 ) + + RECT via3 ( -700 300 ) ( -500 500 ) + + RECT via3 ( -300 300 ) ( -100 500 ) + + RECT via3 ( 100 300 ) ( 300 500 ) + + RECT via3 ( 500 300 ) ( 700 500 ) + + RECT via3 ( -700 700 ) ( -500 900 ) + + RECT via3 ( -300 700 ) ( -100 900 ) + + RECT via3 ( 100 700 ) ( 300 900 ) + + RECT via3 ( 500 700 ) ( 700 900 ) + + RECT via3 ( -700 1100 ) ( -500 1300 ) + + RECT via3 ( -300 1100 ) ( -100 1300 ) + + RECT via3 ( 100 1100 ) ( 300 1300 ) + + RECT via3 ( 500 1100 ) ( 700 1300 ) + + RECT via3 ( -700 1500 ) ( -500 1700 ) + + RECT via3 ( -300 1500 ) ( -100 1700 ) + + RECT via3 ( 100 1500 ) ( 300 1700 ) + + RECT via3 ( 500 1500 ) ( 700 1700 ) ; + - via3_1640_3905_hx + + RECT met3 ( -850 -1952.5 ) ( 850 1952.5 ) + + RECT met4 ( -825 -1957.5 ) ( 825 1957.5 ) + + RECT via3 ( -700 -1700 ) ( -500 -1500 ) + + RECT via3 ( -300 -1700 ) ( -100 -1500 ) + + RECT via3 ( 100 -1700 ) ( 300 -1500 ) + + RECT via3 ( 500 -1700 ) ( 700 -1500 ) + + RECT via3 ( -700 -1300 ) ( -500 -1100 ) + + RECT via3 ( -300 -1300 ) ( -100 -1100 ) + + RECT via3 ( 100 -1300 ) ( 300 -1100 ) + + RECT via3 ( 500 -1300 ) ( 700 -1100 ) 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1700 ) + + RECT via3 ( -300 1500 ) ( -100 1700 ) + + RECT via3 ( 100 1500 ) ( 300 1700 ) + + RECT via3 ( 500 1500 ) ( 700 1700 ) ; + - via_260_260_hv + + RECT met1 ( -160 -130 ) ( 160 130 ) + + RECT met2 ( -130 -160 ) ( 130 160 ) + + RECT via ( -75 -75 ) ( 75 75 ) ; + - via2_300_300_hx + + RECT met2 ( -195 -150 ) ( 195 150 ) + + RECT met3 ( -175 -175 ) ( 175 175 ) + + RECT via2 ( -100 -100 ) ( 100 100 ) ; + - via4_11820_22030 + + RECT met4 ( -5910 -11015 ) ( 5910 11015 ) + + RECT met5 ( -6030 -11135 ) ( 6030 11135 ) + + RECT via4 ( -5200 -10800 ) ( -4400 -10000 ) + + RECT via4 ( -3600 -10800 ) ( -2800 -10000 ) + + RECT via4 ( -2000 -10800 ) ( -1200 -10000 ) + + RECT via4 ( -400 -10800 ) ( 400 -10000 ) + + RECT via4 ( 1200 -10800 ) ( 2000 -10000 ) + + RECT via4 ( 2800 -10800 ) ( 3600 -10000 ) + + RECT via4 ( 4400 -10800 ) ( 5200 -10000 ) + + RECT via4 ( -5200 -9200 ) ( -4400 -8400 ) + + RECT via4 ( -3600 -9200 ) ( -2800 -8400 ) + + RECT via4 ( -2000 -9200 ) ( -1200 -8400 ) + + RECT via4 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-11050 ) ( 5925 11050 ) + + RECT met5 ( -6045 -11170 ) ( 6045 11170 ) + + RECT via4 ( -5200 -10800 ) ( -4400 -10000 ) + + RECT via4 ( -3600 -10800 ) ( -2800 -10000 ) + + RECT via4 ( -2000 -10800 ) ( -1200 -10000 ) + + RECT via4 ( -400 -10800 ) ( 400 -10000 ) + + RECT via4 ( 1200 -10800 ) ( 2000 -10000 ) + + RECT via4 ( 2800 -10800 ) ( 3600 -10000 ) + + RECT via4 ( 4400 -10800 ) ( 5200 -10000 ) + + RECT via4 ( -5200 -9200 ) ( -4400 -8400 ) + + RECT via4 ( -3600 -9200 ) ( -2800 -8400 ) + + RECT via4 ( -2000 -9200 ) ( -1200 -8400 ) + + RECT via4 ( -400 -9200 ) ( 400 -8400 ) + + RECT via4 ( 1200 -9200 ) ( 2000 -8400 ) + + RECT via4 ( 2800 -9200 ) ( 3600 -8400 ) + + RECT via4 ( 4400 -9200 ) ( 5200 -8400 ) + + RECT via4 ( -5200 -7600 ) ( -4400 -6800 ) + + RECT via4 ( -3600 -7600 ) ( -2800 -6800 ) + + RECT via4 ( -2000 -7600 ) ( -1200 -6800 ) + + RECT via4 ( -400 -7600 ) ( 400 -6800 ) + + RECT via4 ( 1200 -7600 ) ( 2000 -6800 ) + + RECT via4 ( 2800 -7600 ) ( 3600 -6800 ) + + RECT via4 ( 4400 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RECT via3 ( 4700 8300 ) ( 4900 8500 ) + + RECT via3 ( 5100 8300 ) ( 5300 8500 ) + + RECT via3 ( 5500 8300 ) ( 5700 8500 ) + + RECT via3 ( -5700 8700 ) ( -5500 8900 ) + + RECT via3 ( -5300 8700 ) ( -5100 8900 ) + + RECT via3 ( -4900 8700 ) ( -4700 8900 ) + + RECT via3 ( -4500 8700 ) ( -4300 8900 ) + + RECT via3 ( -4100 8700 ) ( -3900 8900 ) + + RECT via3 ( -3700 8700 ) ( -3500 8900 ) + + RECT via3 ( -3300 8700 ) ( -3100 8900 ) + + RECT via3 ( -2900 8700 ) ( -2700 8900 ) + + RECT via3 ( -2500 8700 ) ( -2300 8900 ) + + RECT via3 ( -2100 8700 ) ( -1900 8900 ) + + RECT via3 ( -1700 8700 ) ( -1500 8900 ) + + RECT via3 ( -1300 8700 ) ( -1100 8900 ) + + RECT via3 ( -900 8700 ) ( -700 8900 ) + + RECT via3 ( -500 8700 ) ( -300 8900 ) + + RECT via3 ( -100 8700 ) ( 100 8900 ) + + RECT via3 ( 300 8700 ) ( 500 8900 ) + + RECT via3 ( 700 8700 ) ( 900 8900 ) + + RECT via3 ( 1100 8700 ) ( 1300 8900 ) + + RECT via3 ( 1500 8700 ) ( 1700 8900 ) + + RECT via3 ( 1900 8700 ) ( 2100 8900 ) + + RECT via3 ( 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9300 ) ( 500 9500 ) + + RECT via3 ( 700 9300 ) ( 900 9500 ) + + RECT via3 ( 1100 9300 ) ( 1300 9500 ) + + RECT via3 ( 1500 9300 ) ( 1700 9500 ) + + RECT via3 ( 1900 9300 ) ( 2100 9500 ) + + RECT via3 ( 2300 9300 ) ( 2500 9500 ) + + RECT via3 ( 2700 9300 ) ( 2900 9500 ) + + RECT via3 ( 3100 9300 ) ( 3300 9500 ) + + RECT via3 ( 3500 9300 ) ( 3700 9500 ) + + RECT via3 ( 3900 9300 ) ( 4100 9500 ) + + RECT via3 ( 4300 9300 ) ( 4500 9500 ) + + RECT via3 ( 4700 9300 ) ( 4900 9500 ) + + RECT via3 ( 5100 9300 ) ( 5300 9500 ) + + RECT via3 ( 5500 9300 ) ( 5700 9500 ) + + RECT via3 ( -5700 9700 ) ( -5500 9900 ) + + RECT via3 ( -5300 9700 ) ( -5100 9900 ) + + RECT via3 ( -4900 9700 ) ( -4700 9900 ) + + RECT via3 ( -4500 9700 ) ( -4300 9900 ) + + RECT via3 ( -4100 9700 ) ( -3900 9900 ) + + RECT via3 ( -3700 9700 ) ( -3500 9900 ) + + RECT via3 ( -3300 9700 ) ( -3100 9900 ) + + RECT via3 ( -2900 9700 ) ( -2700 9900 ) + + RECT via3 ( -2500 9700 ) ( -2300 9900 ) + + RECT via3 ( -2100 9700 ) ( -1900 9900 ) + + RECT via3 ( -1700 9700 ) ( -1500 9900 ) + + RECT via3 ( -1300 9700 ) ( -1100 9900 ) + + RECT via3 ( -900 9700 ) ( -700 9900 ) + + RECT via3 ( -500 9700 ) ( -300 9900 ) + + RECT via3 ( -100 9700 ) ( 100 9900 ) + + RECT via3 ( 300 9700 ) ( 500 9900 ) + + RECT via3 ( 700 9700 ) ( 900 9900 ) + + RECT via3 ( 1100 9700 ) ( 1300 9900 ) + + RECT via3 ( 1500 9700 ) ( 1700 9900 ) + + RECT via3 ( 1900 9700 ) ( 2100 9900 ) + + RECT via3 ( 2300 9700 ) ( 2500 9900 ) + + RECT via3 ( 2700 9700 ) ( 2900 9900 ) + + RECT via3 ( 3100 9700 ) ( 3300 9900 ) + + RECT via3 ( 3500 9700 ) ( 3700 9900 ) + + RECT via3 ( 3900 9700 ) ( 4100 9900 ) + + RECT via3 ( 4300 9700 ) ( 4500 9900 ) + + RECT via3 ( 4700 9700 ) ( 4900 9900 ) + + RECT via3 ( 5100 9700 ) ( 5300 9900 ) + + RECT via3 ( 5500 9700 ) ( 5700 9900 ) + + RECT via3 ( -5700 10100 ) ( -5500 10300 ) + + RECT via3 ( -5300 10100 ) ( -5100 10300 ) + + RECT via3 ( -4900 10100 ) ( -4700 10300 ) + + RECT via3 ( -4500 10100 ) ( -4300 10300 ) + + RECT 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4900 10300 ) + + RECT via3 ( 5100 10100 ) ( 5300 10300 ) + + RECT via3 ( 5500 10100 ) ( 5700 10300 ) + + RECT via3 ( -5700 10500 ) ( -5500 10700 ) + + RECT via3 ( -5300 10500 ) ( -5100 10700 ) + + RECT via3 ( -4900 10500 ) ( -4700 10700 ) + + RECT via3 ( -4500 10500 ) ( -4300 10700 ) + + RECT via3 ( -4100 10500 ) ( -3900 10700 ) + + RECT via3 ( -3700 10500 ) ( -3500 10700 ) + + RECT via3 ( -3300 10500 ) ( -3100 10700 ) + + RECT via3 ( -2900 10500 ) ( -2700 10700 ) + + RECT via3 ( -2500 10500 ) ( -2300 10700 ) + + RECT via3 ( -2100 10500 ) ( -1900 10700 ) + + RECT via3 ( -1700 10500 ) ( -1500 10700 ) + + RECT via3 ( -1300 10500 ) ( -1100 10700 ) + + RECT via3 ( -900 10500 ) ( -700 10700 ) + + RECT via3 ( -500 10500 ) ( -300 10700 ) + + RECT via3 ( -100 10500 ) ( 100 10700 ) + + RECT via3 ( 300 10500 ) ( 500 10700 ) + + RECT via3 ( 700 10500 ) ( 900 10700 ) + + RECT via3 ( 1100 10500 ) ( 1300 10700 ) + + RECT via3 ( 1500 10500 ) ( 1700 10700 ) + + RECT via3 ( 1900 10500 ) ( 2100 10700 ) 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-400 ) + + RECT via4 ( -5200 400 ) ( -4400 1200 ) + + RECT via4 ( -3600 400 ) ( -2800 1200 ) + + RECT via4 ( -2000 400 ) ( -1200 1200 ) + + RECT via4 ( -400 400 ) ( 400 1200 ) + + RECT via4 ( 1200 400 ) ( 2000 1200 ) + + RECT via4 ( 2800 400 ) ( 3600 1200 ) + + RECT via4 ( 4400 400 ) ( 5200 1200 ) + + RECT via4 ( -5200 2000 ) ( -4400 2800 ) + + RECT via4 ( -3600 2000 ) ( -2800 2800 ) + + RECT via4 ( -2000 2000 ) ( -1200 2800 ) + + RECT via4 ( -400 2000 ) ( 400 2800 ) + + RECT via4 ( 1200 2000 ) ( 2000 2800 ) + + RECT via4 ( 2800 2000 ) ( 3600 2800 ) + + RECT via4 ( 4400 2000 ) ( 5200 2800 ) + + RECT via4 ( -5200 3600 ) ( -4400 4400 ) + + RECT via4 ( -3600 3600 ) ( -2800 4400 ) + + RECT via4 ( -2000 3600 ) ( -1200 4400 ) + + RECT via4 ( -400 3600 ) ( 400 4400 ) + + RECT via4 ( 1200 3600 ) ( 2000 4400 ) + + RECT via4 ( 2800 3600 ) ( 3600 4400 ) + + RECT via4 ( 4400 3600 ) ( 5200 4400 ) + + RECT via4 ( -5200 5200 ) ( -4400 6000 ) + + RECT via4 ( -3600 5200 ) ( -2800 6000 ) + + RECT via4 ( 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) + + RECT via3 ( 5500 6700 ) ( 5700 6900 ) + + RECT via3 ( -5700 7100 ) ( -5500 7300 ) + + RECT via3 ( -5300 7100 ) ( -5100 7300 ) + + RECT via3 ( -4900 7100 ) ( -4700 7300 ) + + RECT via3 ( -4500 7100 ) ( -4300 7300 ) + + RECT via3 ( -4100 7100 ) ( -3900 7300 ) + + RECT via3 ( -3700 7100 ) ( -3500 7300 ) + + RECT via3 ( -3300 7100 ) ( -3100 7300 ) + + RECT via3 ( -2900 7100 ) ( -2700 7300 ) + + RECT via3 ( -2500 7100 ) ( -2300 7300 ) + + RECT via3 ( -2100 7100 ) ( -1900 7300 ) + + RECT via3 ( -1700 7100 ) ( -1500 7300 ) + + RECT via3 ( -1300 7100 ) ( -1100 7300 ) + + RECT via3 ( -900 7100 ) ( -700 7300 ) + + RECT via3 ( -500 7100 ) ( -300 7300 ) + + RECT via3 ( -100 7100 ) ( 100 7300 ) + + RECT via3 ( 300 7100 ) ( 500 7300 ) + + RECT via3 ( 700 7100 ) ( 900 7300 ) + + RECT via3 ( 1100 7100 ) ( 1300 7300 ) + + RECT via3 ( 1500 7100 ) ( 1700 7300 ) + + RECT via3 ( 1900 7100 ) ( 2100 7300 ) + + RECT via3 ( 2300 7100 ) ( 2500 7300 ) + + RECT via3 ( 2700 7100 ) ( 2900 7300 ) + + RECT via3 ( 3100 7100 ) ( 3300 7300 ) + + RECT via3 ( 3500 7100 ) ( 3700 7300 ) + + RECT via3 ( 3900 7100 ) ( 4100 7300 ) + + RECT via3 ( 4300 7100 ) ( 4500 7300 ) + + RECT via3 ( 4700 7100 ) ( 4900 7300 ) + + RECT via3 ( 5100 7100 ) ( 5300 7300 ) + + RECT via3 ( 5500 7100 ) ( 5700 7300 ) + + RECT via3 ( -5700 7500 ) ( -5500 7700 ) + + RECT via3 ( -5300 7500 ) ( -5100 7700 ) + + RECT via3 ( -4900 7500 ) ( -4700 7700 ) + + RECT via3 ( -4500 7500 ) ( -4300 7700 ) + + RECT via3 ( -4100 7500 ) ( -3900 7700 ) + + RECT via3 ( -3700 7500 ) ( -3500 7700 ) + + RECT via3 ( -3300 7500 ) ( -3100 7700 ) + + RECT via3 ( -2900 7500 ) ( -2700 7700 ) + + RECT via3 ( -2500 7500 ) ( -2300 7700 ) + + RECT via3 ( -2100 7500 ) ( -1900 7700 ) + + RECT via3 ( -1700 7500 ) ( -1500 7700 ) + + RECT via3 ( -1300 7500 ) ( -1100 7700 ) + + RECT via3 ( -900 7500 ) ( -700 7700 ) + + RECT via3 ( -500 7500 ) ( -300 7700 ) + + RECT via3 ( -100 7500 ) ( 100 7700 ) + + RECT via3 ( 300 7500 ) ( 500 7700 ) + + RECT via3 ( 700 7500 ) ( 900 7700 ) + + RECT via3 ( 1100 7500 ) ( 1300 7700 ) + + RECT via3 ( 1500 7500 ) ( 1700 7700 ) + + RECT via3 ( 1900 7500 ) ( 2100 7700 ) + + RECT via3 ( 2300 7500 ) ( 2500 7700 ) + + RECT via3 ( 2700 7500 ) ( 2900 7700 ) + + RECT via3 ( 3100 7500 ) ( 3300 7700 ) + + RECT via3 ( 3500 7500 ) ( 3700 7700 ) + + RECT via3 ( 3900 7500 ) ( 4100 7700 ) + + RECT via3 ( 4300 7500 ) ( 4500 7700 ) + + RECT via3 ( 4700 7500 ) ( 4900 7700 ) + + RECT via3 ( 5100 7500 ) ( 5300 7700 ) + + RECT via3 ( 5500 7500 ) ( 5700 7700 ) + + RECT via3 ( -5700 7900 ) ( -5500 8100 ) + + RECT via3 ( -5300 7900 ) ( -5100 8100 ) + + RECT via3 ( -4900 7900 ) ( -4700 8100 ) + + RECT via3 ( -4500 7900 ) ( -4300 8100 ) + + RECT via3 ( -4100 7900 ) ( -3900 8100 ) + + RECT via3 ( -3700 7900 ) ( -3500 8100 ) + + RECT via3 ( -3300 7900 ) ( -3100 8100 ) + + RECT via3 ( -2900 7900 ) ( -2700 8100 ) + + RECT via3 ( -2500 7900 ) ( -2300 8100 ) + + RECT via3 ( -2100 7900 ) ( -1900 8100 ) + + RECT via3 ( -1700 7900 ) ( -1500 8100 ) + + RECT via3 ( -1300 7900 ) ( -1100 8100 ) + + RECT via3 ( -900 7900 ) ( -700 8100 ) + + RECT via3 ( -500 7900 ) ( -300 8100 ) + + RECT via3 ( -100 7900 ) ( 100 8100 ) + + RECT via3 ( 300 7900 ) ( 500 8100 ) + + RECT via3 ( 700 7900 ) ( 900 8100 ) + + RECT via3 ( 1100 7900 ) ( 1300 8100 ) + + RECT via3 ( 1500 7900 ) ( 1700 8100 ) + + RECT via3 ( 1900 7900 ) ( 2100 8100 ) + + RECT via3 ( 2300 7900 ) ( 2500 8100 ) + + RECT via3 ( 2700 7900 ) ( 2900 8100 ) + + RECT via3 ( 3100 7900 ) ( 3300 8100 ) + + RECT via3 ( 3500 7900 ) ( 3700 8100 ) + + RECT via3 ( 3900 7900 ) ( 4100 8100 ) + + RECT via3 ( 4300 7900 ) ( 4500 8100 ) + + RECT via3 ( 4700 7900 ) ( 4900 8100 ) + + RECT via3 ( 5100 7900 ) ( 5300 8100 ) + + RECT via3 ( 5500 7900 ) ( 5700 8100 ) + + RECT via3 ( -5700 8300 ) ( -5500 8500 ) + + RECT via3 ( -5300 8300 ) ( -5100 8500 ) + + RECT via3 ( -4900 8300 ) ( -4700 8500 ) + + RECT via3 ( -4500 8300 ) ( -4300 8500 ) + + RECT via3 ( -4100 8300 ) ( -3900 8500 ) + + RECT via3 ( -3700 8300 ) ( -3500 8500 ) + + RECT via3 ( -3300 8300 ) ( -3100 8500 ) + + RECT via3 ( -2900 8300 ) ( -2700 8500 ) + + RECT via3 ( -2500 8300 ) ( -2300 8500 ) + + RECT via3 ( -2100 8300 ) ( -1900 8500 ) + + RECT via3 ( -1700 8300 ) ( -1500 8500 ) + + RECT via3 ( -1300 8300 ) ( -1100 8500 ) + + RECT via3 ( -900 8300 ) ( -700 8500 ) + + RECT via3 ( -500 8300 ) ( -300 8500 ) + + RECT via3 ( -100 8300 ) ( 100 8500 ) + + RECT via3 ( 300 8300 ) ( 500 8500 ) + + RECT via3 ( 700 8300 ) ( 900 8500 ) + + RECT via3 ( 1100 8300 ) ( 1300 8500 ) + + RECT via3 ( 1500 8300 ) ( 1700 8500 ) + + RECT via3 ( 1900 8300 ) ( 2100 8500 ) + + RECT via3 ( 2300 8300 ) ( 2500 8500 ) + + RECT via3 ( 2700 8300 ) ( 2900 8500 ) + + RECT via3 ( 3100 8300 ) ( 3300 8500 ) + + RECT via3 ( 3500 8300 ) ( 3700 8500 ) + + RECT via3 ( 3900 8300 ) ( 4100 8500 ) + + RECT via3 ( 4300 8300 ) ( 4500 8500 ) + + RECT via3 ( 4700 8300 ) ( 4900 8500 ) + + RECT via3 ( 5100 8300 ) ( 5300 8500 ) + + RECT via3 ( 5500 8300 ) ( 5700 8500 ) + + RECT via3 ( -5700 8700 ) ( -5500 8900 ) + + RECT via3 ( -5300 8700 ) ( -5100 8900 ) + + RECT via3 ( -4900 8700 ) ( -4700 8900 ) + + RECT via3 ( -4500 8700 ) ( -4300 8900 ) + + RECT via3 ( -4100 8700 ) ( -3900 8900 ) + + RECT via3 ( -3700 8700 ) ( -3500 8900 ) + + RECT via3 ( -3300 8700 ) ( -3100 8900 ) + + RECT via3 ( -2900 8700 ) ( -2700 8900 ) + + RECT via3 ( -2500 8700 ) ( -2300 8900 ) + + RECT via3 ( -2100 8700 ) ( -1900 8900 ) + + RECT via3 ( -1700 8700 ) ( -1500 8900 ) + + RECT via3 ( -1300 8700 ) ( -1100 8900 ) + + RECT via3 ( -900 8700 ) ( -700 8900 ) + + RECT via3 ( -500 8700 ) ( -300 8900 ) + + RECT via3 ( -100 8700 ) ( 100 8900 ) + + RECT via3 ( 300 8700 ) ( 500 8900 ) + + RECT via3 ( 700 8700 ) ( 900 8900 ) + + RECT via3 ( 1100 8700 ) ( 1300 8900 ) + + RECT via3 ( 1500 8700 ) ( 1700 8900 ) + + RECT via3 ( 1900 8700 ) ( 2100 8900 ) + + RECT via3 ( 2300 8700 ) ( 2500 8900 ) + + RECT via3 ( 2700 8700 ) ( 2900 8900 ) + + RECT via3 ( 3100 8700 ) ( 3300 8900 ) + + RECT via3 ( 3500 8700 ) ( 3700 8900 ) + + RECT via3 ( 3900 8700 ) ( 4100 8900 ) + + RECT via3 ( 4300 8700 ) ( 4500 8900 ) + + RECT via3 ( 4700 8700 ) ( 4900 8900 ) + + RECT via3 ( 5100 8700 ) ( 5300 8900 ) + + RECT via3 ( 5500 8700 ) ( 5700 8900 ) + + RECT via3 ( -5700 9100 ) ( -5500 9300 ) + + RECT via3 ( -5300 9100 ) ( -5100 9300 ) + + RECT via3 ( -4900 9100 ) ( -4700 9300 ) + + RECT via3 ( -4500 9100 ) ( -4300 9300 ) + + RECT via3 ( -4100 9100 ) ( -3900 9300 ) + + RECT via3 ( -3700 9100 ) ( -3500 9300 ) + + RECT via3 ( -3300 9100 ) ( -3100 9300 ) + + RECT via3 ( -2900 9100 ) ( -2700 9300 ) + + RECT via3 ( -2500 9100 ) ( -2300 9300 ) + + RECT via3 ( -2100 9100 ) ( -1900 9300 ) + + RECT via3 ( -1700 9100 ) ( -1500 9300 ) + + RECT via3 ( -1300 9100 ) ( -1100 9300 ) + + RECT via3 ( -900 9100 ) ( -700 9300 ) + + RECT via3 ( -500 9100 ) ( -300 9300 ) + + RECT via3 ( -100 9100 ) ( 100 9300 ) + + RECT via3 ( 300 9100 ) ( 500 9300 ) + + RECT via3 ( 700 9100 ) ( 900 9300 ) + + RECT via3 ( 1100 9100 ) ( 1300 9300 ) + + RECT via3 ( 1500 9100 ) ( 1700 9300 ) + + RECT via3 ( 1900 9100 ) ( 2100 9300 ) + + RECT via3 ( 2300 9100 ) ( 2500 9300 ) + + RECT via3 ( 2700 9100 ) ( 2900 9300 ) + + RECT via3 ( 3100 9100 ) ( 3300 9300 ) + + RECT via3 ( 3500 9100 ) ( 3700 9300 ) + + RECT via3 ( 3900 9100 ) ( 4100 9300 ) + + RECT via3 ( 4300 9100 ) ( 4500 9300 ) + + RECT via3 ( 4700 9100 ) ( 4900 9300 ) + + RECT via3 ( 5100 9100 ) ( 5300 9300 ) + + RECT via3 ( 5500 9100 ) ( 5700 9300 ) + + RECT via3 ( -5700 9500 ) ( -5500 9700 ) + + RECT via3 ( -5300 9500 ) ( -5100 9700 ) + + RECT via3 ( -4900 9500 ) ( -4700 9700 ) + + RECT via3 ( -4500 9500 ) ( -4300 9700 ) + + RECT via3 ( -4100 9500 ) ( -3900 9700 ) + + RECT via3 ( -3700 9500 ) ( -3500 9700 ) + + RECT via3 ( -3300 9500 ) ( -3100 9700 ) + + RECT via3 ( -2900 9500 ) ( -2700 9700 ) + + RECT via3 ( -2500 9500 ) ( -2300 9700 ) + + RECT via3 ( -2100 9500 ) ( -1900 9700 ) + + RECT via3 ( -1700 9500 ) ( -1500 9700 ) + + RECT via3 ( -1300 9500 ) ( -1100 9700 ) + + RECT via3 ( -900 9500 ) ( -700 9700 ) + + RECT via3 ( -500 9500 ) ( -300 9700 ) + + RECT via3 ( -100 9500 ) ( 100 9700 ) + + RECT via3 ( 300 9500 ) ( 500 9700 ) + + RECT via3 ( 700 9500 ) ( 900 9700 ) + + RECT via3 ( 1100 9500 ) ( 1300 9700 ) + + RECT via3 ( 1500 9500 ) ( 1700 9700 ) + + RECT via3 ( 1900 9500 ) ( 2100 9700 ) + + RECT via3 ( 2300 9500 ) ( 2500 9700 ) + + RECT via3 ( 2700 9500 ) ( 2900 9700 ) + + RECT via3 ( 3100 9500 ) ( 3300 9700 ) + + RECT via3 ( 3500 9500 ) ( 3700 9700 ) + + RECT via3 ( 3900 9500 ) ( 4100 9700 ) + + RECT via3 ( 4300 9500 ) ( 4500 9700 ) + + RECT via3 ( 4700 9500 ) ( 4900 9700 ) + + RECT via3 ( 5100 9500 ) ( 5300 9700 ) + + RECT via3 ( 5500 9500 ) ( 5700 9700 ) + + RECT via3 ( -5700 9900 ) ( -5500 10100 ) + + RECT via3 ( -5300 9900 ) ( -5100 10100 ) + + RECT via3 ( -4900 9900 ) ( -4700 10100 ) + + RECT via3 ( -4500 9900 ) ( -4300 10100 ) + + RECT via3 ( -4100 9900 ) ( -3900 10100 ) + + RECT via3 ( -3700 9900 ) ( -3500 10100 ) + + RECT via3 ( -3300 9900 ) ( -3100 10100 ) + + RECT via3 ( -2900 9900 ) ( -2700 10100 ) + + RECT via3 ( -2500 9900 ) ( -2300 10100 ) + + RECT via3 ( -2100 9900 ) ( -1900 10100 ) + + RECT via3 ( -1700 9900 ) ( -1500 10100 ) + + RECT via3 ( -1300 9900 ) ( -1100 10100 ) + + RECT via3 ( -900 9900 ) ( -700 10100 ) + + RECT via3 ( -500 9900 ) ( -300 10100 ) + + RECT via3 ( -100 9900 ) ( 100 10100 ) + + RECT via3 ( 300 9900 ) ( 500 10100 ) + + RECT via3 ( 700 9900 ) ( 900 10100 ) + + RECT via3 ( 1100 9900 ) ( 1300 10100 ) + + RECT via3 ( 1500 9900 ) ( 1700 10100 ) + + RECT via3 ( 1900 9900 ) ( 2100 10100 ) + + RECT via3 ( 2300 9900 ) ( 2500 10100 ) + + RECT via3 ( 2700 9900 ) ( 2900 10100 ) + + RECT via3 ( 3100 9900 ) ( 3300 10100 ) + + RECT via3 ( 3500 9900 ) ( 3700 10100 ) + + RECT via3 ( 3900 9900 ) ( 4100 10100 ) + + RECT via3 ( 4300 9900 ) ( 4500 10100 ) + + RECT via3 ( 4700 9900 ) ( 4900 10100 ) + + RECT via3 ( 5100 9900 ) ( 5300 10100 ) + + RECT via3 ( 5500 9900 ) ( 5700 10100 ) + + RECT via3 ( -5700 10300 ) ( -5500 10500 ) + + RECT via3 ( -5300 10300 ) ( -5100 10500 ) + + RECT via3 ( -4900 10300 ) ( -4700 10500 ) + + RECT via3 ( -4500 10300 ) ( -4300 10500 ) + + RECT via3 ( -4100 10300 ) ( -3900 10500 ) + + RECT via3 ( -3700 10300 ) ( -3500 10500 ) + + RECT via3 ( -3300 10300 ) ( -3100 10500 ) + + RECT via3 ( -2900 10300 ) ( -2700 10500 ) + + RECT via3 ( -2500 10300 ) ( -2300 10500 ) + + RECT via3 ( -2100 10300 ) ( -1900 10500 ) + + RECT via3 ( -1700 10300 ) ( -1500 10500 ) + + RECT via3 ( -1300 10300 ) ( -1100 10500 ) + + RECT via3 ( -900 10300 ) ( -700 10500 ) + + RECT via3 ( -500 10300 ) ( -300 10500 ) + + RECT via3 ( -100 10300 ) ( 100 10500 ) + + RECT via3 ( 300 10300 ) ( 500 10500 ) + + RECT via3 ( 700 10300 ) ( 900 10500 ) + + RECT via3 ( 1100 10300 ) ( 1300 10500 ) + + RECT via3 ( 1500 10300 ) ( 1700 10500 ) + + RECT via3 ( 1900 10300 ) ( 2100 10500 ) + + RECT via3 ( 2300 10300 ) ( 2500 10500 ) + + RECT via3 ( 2700 10300 ) ( 2900 10500 ) + + RECT via3 ( 3100 10300 ) ( 3300 10500 ) + + RECT via3 ( 3500 10300 ) ( 3700 10500 ) + + RECT via3 ( 3900 10300 ) ( 4100 10500 ) + + RECT via3 ( 4300 10300 ) ( 4500 10500 ) + + RECT via3 ( 4700 10300 ) ( 4900 10500 ) + + RECT via3 ( 5100 10300 ) ( 5300 10500 ) + + RECT via3 ( 5500 10300 ) ( 5700 10500 ) + + RECT via3 ( -5700 10700 ) ( -5500 10900 ) + + RECT via3 ( -5300 10700 ) ( -5100 10900 ) + + RECT via3 ( -4900 10700 ) ( -4700 10900 ) + + RECT via3 ( -4500 10700 ) ( -4300 10900 ) + + RECT via3 ( -4100 10700 ) ( -3900 10900 ) + + RECT via3 ( -3700 10700 ) ( -3500 10900 ) + + RECT via3 ( -3300 10700 ) ( -3100 10900 ) + + RECT via3 ( -2900 10700 ) ( -2700 10900 ) + + RECT via3 ( -2500 10700 ) ( -2300 10900 ) + + RECT via3 ( -2100 10700 ) ( -1900 10900 ) + + RECT via3 ( -1700 10700 ) ( -1500 10900 ) + + RECT via3 ( -1300 10700 ) ( -1100 10900 ) + + RECT via3 ( -900 10700 ) ( -700 10900 ) + + RECT via3 ( -500 10700 ) ( -300 10900 ) + + RECT via3 ( -100 10700 ) ( 100 10900 ) + + RECT via3 ( 300 10700 ) ( 500 10900 ) + + RECT via3 ( 700 10700 ) ( 900 10900 ) + + RECT via3 ( 1100 10700 ) ( 1300 10900 ) + + RECT via3 ( 1500 10700 ) ( 1700 10900 ) + + RECT via3 ( 1900 10700 ) ( 2100 10900 ) + + RECT via3 ( 2300 10700 ) ( 2500 10900 ) + + RECT via3 ( 2700 10700 ) ( 2900 10900 ) + + RECT via3 ( 3100 10700 ) ( 3300 10900 ) + + RECT via3 ( 3500 10700 ) ( 3700 10900 ) + + RECT via3 ( 3900 10700 ) ( 4100 10900 ) + + RECT via3 ( 4300 10700 ) ( 4500 10900 ) + + RECT via3 ( 4700 10700 ) ( 4900 10900 ) + + RECT via3 ( 5100 10700 ) ( 5300 10900 ) + + RECT via3 ( 5500 10700 ) ( 5700 10900 ) ; + - via3_900_1725_hx + + RECT met3 ( -480 -862.5 ) ( 480 862.5 ) + + RECT met4 ( -455 -867.5 ) ( 455 867.5 ) + + RECT via3 ( -300 -700 ) ( -100 -500 ) + + RECT via3 ( 100 -700 ) ( 300 -500 ) + + RECT via3 ( -300 -300 ) ( -100 -100 ) + + RECT via3 ( 100 -300 ) ( 300 -100 ) + + RECT via3 ( -300 100 ) ( -100 300 ) + + RECT via3 ( 100 100 ) ( 300 300 ) + + RECT via3 ( -300 500 ) ( -100 700 ) + + RECT via3 ( 100 500 ) ( 300 700 ) ; +END VIAS + +COMPONENTS 797 ; + - FILLER_148 sky130_ef_io__com_bus_slice_20um + + PLACED ( 200000 0 ) S ; + - FILLER_352 sky130_ef_io__com_bus_slice_20um + + PLACED ( 0 204000 ) W ; + - mgmt_corner\[0\] sky130_ef_io__corner_pad + + PLACED ( 0 0 ) S ; + - bus_tie_3 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 277000 0 ) S ; + - bus_tie_2 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 257000 0 ) S ; + - bus_tie_1 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 237000 0 ) S ; + - FILLER_152 sky130_ef_io__com_bus_slice_1um + + PLACED ( 236000 0 ) S ; + - FILLER_151 sky130_ef_io__com_bus_slice_1um + + PLACED ( 235000 0 ) S ; + - FILLER_150 sky130_ef_io__com_bus_slice_5um + + PLACED ( 230000 0 ) S ; + - FILLER_149 sky130_ef_io__com_bus_slice_10um + + PLACED ( 220000 0 ) S ; + - bus_tie_6 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 337000 0 ) S ; + - bus_tie_5 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 317000 0 ) S ; + - bus_tie_4 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 297000 0 ) S ; + - FILLER_159 sky130_ef_io__com_bus_slice_20um + + PLACED ( 357000 0 ) S ; + - mgmt_vssa_hvclamp_pad sky130_ef_io__vssa_hvc_clamped_pad + + PLACED ( 394000 0 ) S ; + - FILLER_163 sky130_ef_io__com_bus_slice_1um + + PLACED ( 393000 0 ) S ; + - FILLER_162 sky130_ef_io__com_bus_slice_1um + + PLACED ( 392000 0 ) S ; + - FILLER_161 sky130_ef_io__com_bus_slice_5um + + PLACED ( 387000 0 ) S ; + - FILLER_160 sky130_ef_io__com_bus_slice_10um + + PLACED ( 377000 0 ) S ; + - FILLER_165 sky130_ef_io__com_bus_slice_20um + + PLACED ( 469000 0 ) S ; + - FILLER_167 sky130_ef_io__com_bus_slice_5um + + PLACED ( 499000 0 ) S ; + - FILLER_166 sky130_ef_io__com_bus_slice_10um + + PLACED ( 489000 0 ) S ; + - bus_tie_7 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 506000 0 ) S ; + - FILLER_169 sky130_ef_io__com_bus_slice_1um + + PLACED ( 505000 0 ) S ; + - FILLER_168 sky130_ef_io__com_bus_slice_1um + + PLACED ( 504000 0 ) S ; + - bus_tie_8 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 526000 0 ) S ; + - bus_tie_9 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 546000 0 ) S ; + - bus_tie_10 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 566000 0 ) S ; + - bus_tie_11 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 586000 0 ) S ; + - bus_tie_12 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 606000 0 ) S ; + - FILLER_176 sky130_ef_io__com_bus_slice_20um + + PLACED ( 626000 0 ) S ; + - resetb_pad sky130_fd_io__top_xres4v2 + + PLACED ( 663000 0 ) S ; + - FILLER_180 sky130_ef_io__com_bus_slice_1um + + PLACED ( 662000 0 ) S ; + - FILLER_179 sky130_ef_io__com_bus_slice_1um + + PLACED ( 661000 0 ) S ; + - FILLER_178 sky130_ef_io__com_bus_slice_5um + + PLACED ( 656000 0 ) S ; + - FILLER_177 sky130_ef_io__com_bus_slice_10um + + PLACED ( 646000 0 ) S ; + - constant_block_0 constant_block + + PLACED ( 741080 197040 ) FN ; + - bus_tie_13 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 775000 0 ) S ; + - FILLER_186 sky130_ef_io__com_bus_slice_1um + + PLACED ( 774000 0 ) S ; + - FILLER_185 sky130_ef_io__com_bus_slice_1um + + PLACED ( 773000 0 ) S ; + - FILLER_184 sky130_ef_io__com_bus_slice_5um + + PLACED ( 768000 0 ) S ; + - FILLER_183 sky130_ef_io__com_bus_slice_10um + + PLACED ( 758000 0 ) S ; + - FILLER_182 sky130_ef_io__com_bus_slice_20um + + PLACED ( 738000 0 ) S ; + - bus_tie_16 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 835000 0 ) S ; + - bus_tie_15 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 815000 0 ) S ; + - bus_tie_14 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 795000 0 ) S ; + - bus_tie_18 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 875000 0 ) S ; + - bus_tie_17 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 855000 0 ) S ; + - FILLER_194 sky130_ef_io__com_bus_slice_10um + + PLACED ( 915000 0 ) S ; + - FILLER_193 sky130_ef_io__com_bus_slice_20um + + PLACED ( 895000 0 ) S ; + - clock_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 932000 0 ) S ; + - FILLER_197 sky130_ef_io__com_bus_slice_1um + + PLACED ( 931000 0 ) S ; + - FILLER_196 sky130_ef_io__com_bus_slice_1um + + PLACED ( 930000 0 ) S ; + - FILLER_195 sky130_ef_io__com_bus_slice_5um + + PLACED ( 925000 0 ) S ; + - constant_block_1 constant_block + + PLACED ( 1015080 197040 ) FN ; + - bus_tie_19 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1049000 0 ) S ; + - FILLER_203 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1048000 0 ) S ; + - FILLER_202 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1047000 0 ) S ; + - FILLER_201 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1042000 0 ) S ; + - FILLER_200 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1032000 0 ) S ; + - FILLER_199 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1012000 0 ) S ; + - bus_tie_23 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1129000 0 ) S ; + - bus_tie_22 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1109000 0 ) S ; + - bus_tie_21 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1089000 0 ) S ; + - bus_tie_20 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1069000 0 ) S ; + - mgmt_vssd_lvclamp_pad sky130_ef_io__vssd_lvc_clamped_pad + + PLACED ( 1206000 0 ) S ; + - bus_tie_24 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1149000 0 ) S ; + - FILLER_214 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1205000 0 ) S ; + - FILLER_213 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1204000 0 ) S ; + - FILLER_212 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1199000 0 ) S ; + - FILLER_211 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1189000 0 ) S ; + - FILLER_210 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1169000 0 ) S ; + - bus_tie_26 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1338000 0 ) S ; + - bus_tie_25 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1318000 0 ) S ; + - FILLER_220 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1317000 0 ) S ; + - FILLER_219 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1316000 0 ) S ; + - FILLER_218 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1311000 0 ) S ; + - FILLER_217 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1301000 0 ) S ; + - FILLER_216 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1281000 0 ) S ; + - bus_tie_30 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1418000 0 ) S ; + - bus_tie_29 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1398000 0 ) S ; + - bus_tie_28 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1378000 0 ) S ; + - bus_tie_27 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1358000 0 ) S ; + - flash_csb_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 1475000 0 ) S ; + - FILLER_231 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1474000 0 ) S ; + - FILLER_230 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1473000 0 ) S ; + - FILLER_229 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1468000 0 ) S ; + - FILLER_228 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1458000 0 ) S ; + - FILLER_227 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1438000 0 ) S ; + - FILLER_233 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1555000 0 ) S ; + - constant_block_2 constant_block + + PLACED ( 1563080 197040 ) FN ; + - FILLER_234 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1575000 0 ) S ; + - bus_tie_31 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1592000 0 ) S ; + - FILLER_237 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1591000 0 ) S ; + - FILLER_236 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1590000 0 ) S ; + - FILLER_235 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1585000 0 ) S ; + - bus_tie_32 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1612000 0 ) S ; + - bus_tie_33 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1632000 0 ) S ; + - bus_tie_34 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1652000 0 ) S ; + - bus_tie_35 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1672000 0 ) S ; + - flash_clk_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 1749000 0 ) S ; + - bus_tie_36 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1692000 0 ) S ; + - FILLER_248 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1748000 0 ) S ; + - FILLER_247 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1747000 0 ) S ; + - FILLER_246 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1742000 0 ) S ; + - FILLER_245 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1732000 0 ) S ; + - FILLER_244 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1712000 0 ) S ; + - constant_block_3 constant_block + + PLACED ( 1837080 197040 ) FN ; + - FILLER_250 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1829000 0 ) S ; + - bus_tie_38 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1886000 0 ) S ; + - bus_tie_37 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1866000 0 ) S ; + - FILLER_254 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1865000 0 ) S ; + - FILLER_253 sky130_ef_io__com_bus_slice_1um + + PLACED ( 1864000 0 ) S ; + - FILLER_252 sky130_ef_io__com_bus_slice_5um + + PLACED ( 1859000 0 ) S ; + - FILLER_251 sky130_ef_io__com_bus_slice_10um + + PLACED ( 1849000 0 ) S ; + - bus_tie_42 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1966000 0 ) S ; + - bus_tie_41 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1946000 0 ) S ; + - bus_tie_40 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1926000 0 ) S ; + - bus_tie_39 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 1906000 0 ) S ; + - flash_io0_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 2023000 0 ) S ; + - FILLER_265 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2022000 0 ) S ; + - FILLER_264 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2021000 0 ) S ; + - FILLER_263 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2016000 0 ) S ; + - FILLER_262 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2006000 0 ) S ; + - FILLER_261 sky130_ef_io__com_bus_slice_20um + + PLACED ( 1986000 0 ) S ; + - FILLER_267 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2103000 0 ) S ; + - constant_block_4 constant_block + + PLACED ( 2111080 197040 ) FN ; + - bus_tie_45 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2180000 0 ) S ; + - bus_tie_44 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2160000 0 ) S ; + - bus_tie_43 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2140000 0 ) S ; + - FILLER_271 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2139000 0 ) S ; + - FILLER_270 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2138000 0 ) S ; + - FILLER_269 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2133000 0 ) S ; + - FILLER_268 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2123000 0 ) S ; + - bus_tie_48 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2240000 0 ) S ; + - bus_tie_47 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2220000 0 ) S ; + - bus_tie_46 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2200000 0 ) S ; + - FILLER_278 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2260000 0 ) S ; + - flash_io1_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 2297000 0 ) S ; + - FILLER_282 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2296000 0 ) S ; + - FILLER_281 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2295000 0 ) S ; + - FILLER_280 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2290000 0 ) S ; + - FILLER_279 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2280000 0 ) S ; + - FILLER_284 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2377000 0 ) S ; + - constant_block_5 constant_block + + PLACED ( 2385080 197040 ) FN ; + - FILLER_285 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2397000 0 ) S ; + - bus_tie_49 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2414000 0 ) S ; + - FILLER_288 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2413000 0 ) S ; + - FILLER_287 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2412000 0 ) S ; + - FILLER_286 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2407000 0 ) S ; + - bus_tie_50 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2434000 0 ) S ; + - bus_tie_51 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2454000 0 ) S ; + - bus_tie_52 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2474000 0 ) S ; + - bus_tie_53 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2494000 0 ) S ; + - bus_tie_54 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2514000 0 ) S ; + - gpio_pad sky130_ef_io__gpiov2_pad_wrapped + + PLACED ( 2571000 0 ) S ; + - FILLER_299 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2570000 0 ) S ; + - FILLER_298 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2569000 0 ) S ; + - FILLER_297 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2564000 0 ) S ; + - FILLER_296 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2554000 0 ) S ; + - FILLER_295 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2534000 0 ) S ; + - constant_block_6 constant_block + + PLACED ( 2659080 197040 ) FN ; + - bus_tie_55 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2688000 0 ) S ; + - FILLER_305 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2687000 0 ) S ; + - FILLER_304 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2686000 0 ) S ; + - FILLER_303 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2681000 0 ) S ; + - FILLER_302 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2671000 0 ) S ; + - FILLER_301 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2651000 0 ) S ; + - bus_tie_57 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2728000 0 ) S ; + - bus_tie_56 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2708000 0 ) S ; + - bus_tie_60 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2788000 0 ) S ; + - bus_tie_59 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2768000 0 ) S ; + - bus_tie_58 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2748000 0 ) S ; + - FILLER_312 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2808000 0 ) S ; + - mgmt_vssio_hvclamp_pad\[0\] sky130_ef_io__vssio_hvc_clamped_pad + + PLACED ( 2845000 0 ) S ; + - FILLER_316 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2844000 0 ) S ; + - FILLER_315 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2843000 0 ) S ; + - FILLER_314 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2838000 0 ) S ; + - FILLER_313 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2828000 0 ) S ; + - FILLER_320 sky130_ef_io__com_bus_slice_5um + + PLACED ( 2950000 0 ) S ; + - FILLER_319 sky130_ef_io__com_bus_slice_10um + + PLACED ( 2940000 0 ) S ; + - FILLER_318 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2920000 0 ) S ; + - bus_tie_64 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 3017000 0 ) S ; + - bus_tie_63 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2997000 0 ) S ; + - bus_tie_62 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2977000 0 ) S ; + - bus_tie_61 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 2957000 0 ) S ; + - FILLER_322 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2956000 0 ) S ; + - FILLER_321 sky130_ef_io__com_bus_slice_1um + + PLACED ( 2955000 0 ) S ; + - bus_tie_66 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 3057000 0 ) S ; + - bus_tie_65 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 3037000 0 ) S ; + - FILLER_330 sky130_ef_io__com_bus_slice_10um + + PLACED ( 3097000 0 ) S ; + - FILLER_329 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3077000 0 ) S ; + - mgmt_vdda_hvclamp_pad sky130_ef_io__vdda_hvc_clamped_pad + + PLACED ( 3114000 0 ) S ; + - FILLER_333 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3113000 0 ) S ; + - FILLER_332 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3112000 0 ) S ; + - FILLER_331 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3107000 0 ) S ; + - FILLER_335 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3189000 0 ) S ; + - FILLER_338 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3224000 0 ) S ; + - FILLER_337 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3219000 0 ) S ; + - FILLER_336 sky130_ef_io__com_bus_slice_10um + + PLACED ( 3209000 0 ) S ; + - bus_tie_67 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 3226000 0 ) S ; + - FILLER_339 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3225000 0 ) S ; + - bus_tie_68 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 3246000 0 ) S ; + - bus_tie_69 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 3266000 0 ) S ; + - bus_tie_70 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 3286000 0 ) S ; + - bus_tie_71 sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um + + PLACED ( 3306000 0 ) S ; + - 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4990035 ) N ; + - FILLER_126 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3013000 4990035 ) N ; + - FILLER_125 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2993000 4990035 ) N ; + - FILLER_124 sky130_ef_io__com_bus_slice_20um + + PLACED ( 2973000 4990035 ) N ; + - FILLER_130 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3093000 4990035 ) N ; + - FILLER_129 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3073000 4990035 ) N ; + - FILLER_128 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3053000 4990035 ) N ; + - FILLER_127 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3033000 4990035 ) N ; + - user1_analog_pad\[0\] sky130_ef_io__analog_pad + + PLACED ( 3135000 4988000 ) N ; + - FILLER_133 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3134000 4990035 ) N ; + - FILLER_132 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3133000 4990035 ) N ; + - FILLER_131 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3113000 4990035 ) N ; + - FILLER_135 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3210000 4990035 ) N ; + - FILLER_136 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3230000 4990035 ) N ; + - FILLER_137 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3250000 4990035 ) N ; + - FILLER_138 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3270000 4990035 ) N ; + - FILLER_139 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3290000 4990035 ) N ; + - FILLER_140 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3310000 4990035 ) N ; + - FILLER_141 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3330000 4990035 ) N ; + - FILLER_142 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3350000 4990035 ) N ; + - FILLER_143 sky130_ef_io__com_bus_slice_10um + + PLACED ( 3370000 4990035 ) N ; + - FILLER_784 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4943000 ) E ; + - FILLER_783 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4923000 ) E ; + - FILLER_782 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4903000 ) E ; + - FILLER_781 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4883000 ) E ; + - FILLER_780 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4863000 ) E ; + - FILLER_786 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3390035 4983000 ) E ; + - FILLER_785 sky130_ef_io__com_bus_slice_20um + + PLACED ( 3390035 4963000 ) E ; + - user1_corner sky130_ef_io__corner_pad + + PLACED ( 3388000 4984000 ) N ; + - FILLER_147 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3387000 4990035 ) N ; + - FILLER_146 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3386000 4990035 ) N ; + - FILLER_145 sky130_ef_io__com_bus_slice_1um + + PLACED ( 3385000 4990035 ) N ; + - FILLER_144 sky130_ef_io__com_bus_slice_5um + + PLACED ( 3380000 4990035 ) N ; +END COMPONENTS + +PINS 579 ; + - clock + NET clock + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31350 -31225 ) ( 31350 31225 ) + PLACED ( 969550 64215 ) N ; + - flash_clk + NET flash_clk + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31350 -31225 ) ( 31350 31225 ) + PLACED ( 1786550 64215 ) N ; + - flash_csb + NET flash_csb + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31350 -31225 ) ( 31350 31225 ) + PLACED ( 1512550 64215 ) N ; + - flash_io0 + NET flash_io0 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31350 -31225 ) ( 31350 31225 ) + PLACED ( 2060550 64215 ) N ; + - flash_io1 + NET flash_io1 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31350 -31225 ) ( 31350 31225 ) + PLACED ( 2334550 64215 ) N ; + - gpio + NET gpio + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31350 -31225 ) ( 31350 31225 ) + PLACED ( 2608550 64215 ) N ; + - vccd_pad + NET vccd_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -33630 -27200 ) ( 33630 27200 ) + PLACED ( 64465 377470 ) N ; + - vdda_pad + NET vdda_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 3151530 64465 ) N ; + - vddio_pad + NET vddio_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 64465 588470 ) N ; + - vddio_pad2 + NET vddio_pad2 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 64465 4386470 ) N ; + - vssa_pad + NET vssa_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 431530 64465 ) N ; + - vssd_pad + NET vssd_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -27200 -33630 ) ( 27200 33630 ) + PLACED ( 1243530 64465 ) N ; + - vssio_pad + NET vssio_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 2882530 64465 ) N ; + - vssio_pad2 + NET vssio_pad2 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 1704470 5123530 ) N ; + - mprj_io[0] + NET mprj_io[0] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 537550 ) N ; + - mprj_io_analog_en[0] + NET mprj_io_analog_en[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 529155 ) N ; + - mprj_io_analog_pol[0] + NET mprj_io_analog_pol[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 535595 ) N ; + - mprj_io_analog_sel[0] + NET mprj_io_analog_sel[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 550775 ) N ; + - mprj_io_dm[0] + NET mprj_io_dm[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 532375 ) N ; + - mprj_io_dm[1] + NET mprj_io_dm[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 523175 ) N ; + - mprj_io_dm[2] + NET mprj_io_dm[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 553995 ) N ; + - mprj_io_holdover[0] + NET mprj_io_holdover[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 557215 ) N ; + - mprj_io_ib_mode_sel[0] + NET mprj_io_ib_mode_sel[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 572395 ) N ; + - mprj_io_inp_dis[0] + NET mprj_io_inp_dis[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 538355 ) N ; + - mprj_io_oeb[0] + NET mprj_io_oeb[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 575615 ) N ; + - mprj_io_out[0] + NET mprj_io_out[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 559975 ) N ; + - mprj_io_slow_sel[0] + NET mprj_io_slow_sel[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 513975 ) N ; + - mprj_io_vtrip_sel[0] + NET mprj_io_vtrip_sel[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 569175 ) N ; + - mprj_io_in[0] + NET mprj_io_in[0] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 504775 ) N ; + - mprj_io_in_3v3[0] + NET mprj_io_in_3v3[0] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 578375 ) N ; + - mprj_gpio_analog[3] + NET mprj_gpio_analog[3] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3433195 ) N ; + - mprj_gpio_noesd[3] + NET mprj_gpio_noesd[3] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3442395 ) N ; + - mprj_io[10] + NET mprj_io[10] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 3453550 ) N ; + - mprj_io_analog_en[10] + NET mprj_io_analog_en[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3445155 ) N ; + - mprj_io_analog_pol[10] + NET mprj_io_analog_pol[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3451595 ) N ; + - mprj_io_analog_sel[10] + NET mprj_io_analog_sel[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3466775 ) N ; + - mprj_io_dm[30] + NET mprj_io_dm[30] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3448375 ) N ; + - mprj_io_dm[31] + NET mprj_io_dm[31] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3439175 ) N ; + - mprj_io_dm[32] + NET mprj_io_dm[32] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3469995 ) N ; + - mprj_io_holdover[10] + NET mprj_io_holdover[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3473215 ) N ; + - mprj_io_ib_mode_sel[10] + NET mprj_io_ib_mode_sel[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3488395 ) N ; + - mprj_io_inp_dis[10] + NET mprj_io_inp_dis[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3454355 ) N ; + - mprj_io_oeb[10] + NET mprj_io_oeb[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3491615 ) N ; + - mprj_io_out[10] + NET mprj_io_out[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3475975 ) N ; + - mprj_io_slow_sel[10] + NET mprj_io_slow_sel[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3429975 ) N ; + - mprj_io_vtrip_sel[10] + NET mprj_io_vtrip_sel[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3485175 ) N ; + - mprj_io_in[10] + NET mprj_io_in[10] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3420775 ) N ; + - mprj_io_in_3v3[10] + NET mprj_io_in_3v3[10] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3494375 ) N ; + - mprj_gpio_analog[4] + NET mprj_gpio_analog[4] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3658195 ) N ; + - mprj_gpio_noesd[4] + NET mprj_gpio_noesd[4] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3667395 ) N ; + - mprj_io[11] + NET mprj_io[11] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 3678550 ) N ; + - mprj_io_analog_en[11] + NET mprj_io_analog_en[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3670155 ) N ; + - mprj_io_analog_pol[11] + NET mprj_io_analog_pol[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3676595 ) N ; + - mprj_io_analog_sel[11] + NET mprj_io_analog_sel[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3691775 ) N ; + - mprj_io_dm[33] + NET mprj_io_dm[33] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3673375 ) N ; + - mprj_io_dm[34] + NET mprj_io_dm[34] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3664175 ) N ; + - mprj_io_dm[35] + NET mprj_io_dm[35] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3694995 ) N ; + - mprj_io_holdover[11] + NET mprj_io_holdover[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3698215 ) N ; + - mprj_io_ib_mode_sel[11] + NET mprj_io_ib_mode_sel[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3713395 ) N ; + - mprj_io_inp_dis[11] + NET mprj_io_inp_dis[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3679355 ) N ; + - mprj_io_oeb[11] + NET mprj_io_oeb[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3716615 ) N ; + - mprj_io_out[11] + NET mprj_io_out[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3700975 ) N ; + - mprj_io_slow_sel[11] + NET mprj_io_slow_sel[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3654975 ) N ; + - mprj_io_vtrip_sel[11] + NET mprj_io_vtrip_sel[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3710175 ) N ; + - mprj_io_in[11] + NET mprj_io_in[11] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3645775 ) N ; + - mprj_io_in_3v3[11] + NET mprj_io_in_3v3[11] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3719375 ) N ; + - mprj_gpio_analog[5] + NET mprj_gpio_analog[5] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3883195 ) N ; + - mprj_gpio_noesd[5] + NET mprj_gpio_noesd[5] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3892395 ) N ; + - mprj_io[12] + NET mprj_io[12] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 3903550 ) N ; + - mprj_io_analog_en[12] + NET mprj_io_analog_en[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3895155 ) N ; + - mprj_io_analog_pol[12] + NET mprj_io_analog_pol[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3901595 ) N ; + - mprj_io_analog_sel[12] + NET mprj_io_analog_sel[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3916775 ) N ; + - mprj_io_dm[36] + NET mprj_io_dm[36] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3898375 ) N ; + - mprj_io_dm[37] + NET mprj_io_dm[37] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3889175 ) N ; + - mprj_io_dm[38] + NET mprj_io_dm[38] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3919995 ) N ; + - mprj_io_holdover[12] + NET mprj_io_holdover[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3923215 ) N ; + - mprj_io_ib_mode_sel[12] + NET mprj_io_ib_mode_sel[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3938395 ) N ; + - mprj_io_inp_dis[12] + NET mprj_io_inp_dis[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3904355 ) N ; + - mprj_io_oeb[12] + NET mprj_io_oeb[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3941615 ) N ; + - mprj_io_out[12] + NET mprj_io_out[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3925975 ) N ; + - mprj_io_slow_sel[12] + NET mprj_io_slow_sel[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3879975 ) N ; + - mprj_io_vtrip_sel[12] + NET mprj_io_vtrip_sel[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3935175 ) N ; + - mprj_io_in[12] + NET mprj_io_in[12] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3870775 ) N ; + - mprj_io_in_3v3[12] + NET mprj_io_in_3v3[12] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3944375 ) N ; + - mprj_gpio_analog[6] + NET mprj_gpio_analog[6] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4329195 ) N ; + - mprj_gpio_noesd[6] + NET mprj_gpio_noesd[6] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4338395 ) N ; + - mprj_io[13] + NET mprj_io[13] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 4349550 ) N ; + - mprj_io_analog_en[13] + NET mprj_io_analog_en[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4341155 ) N ; + - mprj_io_analog_pol[13] + NET mprj_io_analog_pol[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4347595 ) N ; + - mprj_io_analog_sel[13] + NET mprj_io_analog_sel[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4362775 ) N ; + - mprj_io_dm[39] + NET mprj_io_dm[39] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4344375 ) N ; + - mprj_io_dm[40] + NET mprj_io_dm[40] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4335175 ) N ; + - mprj_io_dm[41] + NET mprj_io_dm[41] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4365995 ) N ; + - mprj_io_holdover[13] + NET mprj_io_holdover[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4369215 ) N ; + - mprj_io_ib_mode_sel[13] + NET mprj_io_ib_mode_sel[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4384395 ) N ; + - mprj_io_inp_dis[13] + NET mprj_io_inp_dis[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4350355 ) N ; + - mprj_io_oeb[13] + NET mprj_io_oeb[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4387615 ) N ; + - mprj_io_out[13] + NET mprj_io_out[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4371975 ) N ; + - mprj_io_slow_sel[13] + NET mprj_io_slow_sel[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4325975 ) N ; + - mprj_io_vtrip_sel[13] + NET mprj_io_vtrip_sel[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4381175 ) N ; + - mprj_io_in[13] + NET mprj_io_in[13] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4316775 ) N ; + - mprj_io_in_3v3[13] + NET mprj_io_in_3v3[13] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4390375 ) N ; + - mprj_io[1] + NET mprj_io[1] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 763550 ) N ; + - mprj_io_analog_en[1] + NET mprj_io_analog_en[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 755155 ) N ; + - mprj_io_analog_pol[1] + NET mprj_io_analog_pol[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 761595 ) N ; + - mprj_io_analog_sel[1] + NET mprj_io_analog_sel[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 776775 ) N ; + - mprj_io_dm[3] + NET mprj_io_dm[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 758375 ) N ; + - mprj_io_dm[4] + NET mprj_io_dm[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 749175 ) N ; + - mprj_io_dm[5] + NET mprj_io_dm[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 779995 ) N ; + - mprj_io_holdover[1] + NET mprj_io_holdover[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 783215 ) N ; + - mprj_io_ib_mode_sel[1] + NET mprj_io_ib_mode_sel[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 798395 ) N ; + - mprj_io_inp_dis[1] + NET mprj_io_inp_dis[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 764355 ) N ; + - mprj_io_oeb[1] + NET mprj_io_oeb[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 801615 ) N ; + - mprj_io_out[1] + NET mprj_io_out[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 785975 ) N ; + - mprj_io_slow_sel[1] + NET mprj_io_slow_sel[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 739975 ) N ; + - mprj_io_vtrip_sel[1] + NET mprj_io_vtrip_sel[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 795175 ) N ; + - mprj_io_in[1] + NET mprj_io_in[1] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 730775 ) N ; + - mprj_io_in_3v3[1] + NET mprj_io_in_3v3[1] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 804375 ) N ; + - mprj_io[2] + NET mprj_io[2] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 988550 ) N ; + - mprj_io_analog_en[2] + NET mprj_io_analog_en[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 980155 ) N ; + - mprj_io_analog_pol[2] + NET mprj_io_analog_pol[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 986595 ) N ; + - mprj_io_analog_sel[2] + NET mprj_io_analog_sel[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1001775 ) N ; + - mprj_io_dm[6] + NET mprj_io_dm[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 983375 ) N ; + - mprj_io_dm[7] + NET mprj_io_dm[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 974175 ) N ; + - mprj_io_dm[8] + NET mprj_io_dm[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1004995 ) N ; + - mprj_io_holdover[2] + NET mprj_io_holdover[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1008215 ) N ; + - mprj_io_ib_mode_sel[2] + NET mprj_io_ib_mode_sel[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1023395 ) N ; + - mprj_io_inp_dis[2] + NET mprj_io_inp_dis[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 989355 ) N ; + - mprj_io_oeb[2] + NET mprj_io_oeb[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1026615 ) N ; + - mprj_io_out[2] + NET mprj_io_out[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1010975 ) N ; + - mprj_io_slow_sel[2] + NET mprj_io_slow_sel[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 964975 ) N ; + - mprj_io_vtrip_sel[2] + NET mprj_io_vtrip_sel[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1020175 ) N ; + - mprj_io_in[2] + NET mprj_io_in[2] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 955775 ) N ; + - mprj_io_in_3v3[2] + NET mprj_io_in_3v3[2] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1029375 ) N ; + - mprj_io[3] + NET mprj_io[3] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 1214550 ) N ; + - mprj_io_analog_en[3] + NET mprj_io_analog_en[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1206155 ) N ; + - mprj_io_analog_pol[3] + NET mprj_io_analog_pol[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1212595 ) N ; + - mprj_io_analog_sel[3] + NET mprj_io_analog_sel[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1227775 ) N ; + - mprj_io_dm[10] + NET mprj_io_dm[10] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1200175 ) N ; + - mprj_io_dm[11] + NET mprj_io_dm[11] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1230995 ) N ; + - mprj_io_dm[9] + NET mprj_io_dm[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1209375 ) N ; + - mprj_io_holdover[3] + NET mprj_io_holdover[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1234215 ) N ; + - mprj_io_ib_mode_sel[3] + NET mprj_io_ib_mode_sel[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1249395 ) N ; + - mprj_io_inp_dis[3] + NET mprj_io_inp_dis[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1215355 ) N ; + - mprj_io_oeb[3] + NET mprj_io_oeb[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1252615 ) N ; + - mprj_io_out[3] + NET mprj_io_out[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1236975 ) N ; + - mprj_io_slow_sel[3] + NET mprj_io_slow_sel[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1190975 ) N ; + - mprj_io_vtrip_sel[3] + NET mprj_io_vtrip_sel[3] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1246175 ) N ; + - mprj_io_in[3] + NET mprj_io_in[3] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1181775 ) N ; + - mprj_io_in_3v3[3] + NET mprj_io_in_3v3[3] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1255375 ) N ; + - mprj_io[4] + NET mprj_io[4] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 1439550 ) N ; + - mprj_io_analog_en[4] + NET mprj_io_analog_en[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1431155 ) N ; + - mprj_io_analog_pol[4] + NET mprj_io_analog_pol[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1437595 ) N ; + - mprj_io_analog_sel[4] + NET mprj_io_analog_sel[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1452775 ) N ; + - mprj_io_dm[12] + NET mprj_io_dm[12] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1434375 ) N ; + - mprj_io_dm[13] + NET mprj_io_dm[13] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1425175 ) N ; + - mprj_io_dm[14] + NET mprj_io_dm[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1455995 ) N ; + - mprj_io_holdover[4] + NET mprj_io_holdover[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1459215 ) N ; + - mprj_io_ib_mode_sel[4] + NET mprj_io_ib_mode_sel[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1474395 ) N ; + - mprj_io_inp_dis[4] + NET mprj_io_inp_dis[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1440355 ) N ; + - mprj_io_oeb[4] + NET mprj_io_oeb[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1477615 ) N ; + - mprj_io_out[4] + NET mprj_io_out[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1461975 ) N ; + - mprj_io_slow_sel[4] + NET mprj_io_slow_sel[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1415975 ) N ; + - mprj_io_vtrip_sel[4] + NET mprj_io_vtrip_sel[4] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1471175 ) N ; + - mprj_io_in[4] + NET mprj_io_in[4] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1406775 ) N ; + - mprj_io_in_3v3[4] + NET mprj_io_in_3v3[4] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1480375 ) N ; + - mprj_io[5] + NET mprj_io[5] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 1664550 ) N ; + - mprj_io_analog_en[5] + NET mprj_io_analog_en[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1656155 ) N ; + - mprj_io_analog_pol[5] + NET mprj_io_analog_pol[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1662595 ) N ; + - mprj_io_analog_sel[5] + NET mprj_io_analog_sel[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1677775 ) N ; + - mprj_io_dm[15] + NET mprj_io_dm[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1659375 ) N ; + - mprj_io_dm[16] + NET mprj_io_dm[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1650175 ) N ; + - mprj_io_dm[17] + NET mprj_io_dm[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1680995 ) N ; + - mprj_io_holdover[5] + NET mprj_io_holdover[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1684215 ) N ; + - mprj_io_ib_mode_sel[5] + NET mprj_io_ib_mode_sel[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1699395 ) N ; + - mprj_io_inp_dis[5] + NET mprj_io_inp_dis[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1665355 ) N ; + - mprj_io_oeb[5] + NET mprj_io_oeb[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1702615 ) N ; + - mprj_io_out[5] + NET mprj_io_out[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1686975 ) N ; + - mprj_io_slow_sel[5] + NET mprj_io_slow_sel[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1640975 ) N ; + - mprj_io_vtrip_sel[5] + NET mprj_io_vtrip_sel[5] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1696175 ) N ; + - mprj_io_in[5] + NET mprj_io_in[5] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1631775 ) N ; + - mprj_io_in_3v3[5] + NET mprj_io_in_3v3[5] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1705375 ) N ; + - mprj_io[6] + NET mprj_io[6] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 1890550 ) N ; + - mprj_io_analog_en[6] + NET mprj_io_analog_en[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1882155 ) N ; + - mprj_io_analog_pol[6] + NET mprj_io_analog_pol[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1888595 ) N ; + - mprj_io_analog_sel[6] + NET mprj_io_analog_sel[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1903775 ) N ; + - mprj_io_dm[18] + NET mprj_io_dm[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1885375 ) N ; + - mprj_io_dm[19] + NET mprj_io_dm[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1876175 ) N ; + - mprj_io_dm[20] + NET mprj_io_dm[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1906995 ) N ; + - mprj_io_holdover[6] + NET mprj_io_holdover[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1910215 ) N ; + - mprj_io_ib_mode_sel[6] + NET mprj_io_ib_mode_sel[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1925395 ) N ; + - mprj_io_inp_dis[6] + NET mprj_io_inp_dis[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1891355 ) N ; + - mprj_io_oeb[6] + NET mprj_io_oeb[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1928615 ) N ; + - mprj_io_out[6] + NET mprj_io_out[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1912975 ) N ; + - mprj_io_slow_sel[6] + NET mprj_io_slow_sel[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1866975 ) N ; + - mprj_io_vtrip_sel[6] + NET mprj_io_vtrip_sel[6] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1922175 ) N ; + - mprj_io_in[6] + NET mprj_io_in[6] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1857775 ) N ; + - mprj_io_in_3v3[6] + NET mprj_io_in_3v3[6] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1931375 ) N ; + - mprj_gpio_analog[0] + NET mprj_gpio_analog[0] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2756195 ) N ; + - mprj_gpio_noesd[0] + NET mprj_gpio_noesd[0] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2765395 ) N ; + - mprj_io[7] + NET mprj_io[7] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 2776550 ) N ; + - mprj_io_analog_en[7] + NET mprj_io_analog_en[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2768155 ) N ; + - mprj_io_analog_pol[7] + NET mprj_io_analog_pol[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2774595 ) N ; + - mprj_io_analog_sel[7] + NET mprj_io_analog_sel[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2789775 ) N ; + - mprj_io_dm[21] + NET mprj_io_dm[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2771375 ) N ; + - mprj_io_dm[22] + NET mprj_io_dm[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2762175 ) N ; + - mprj_io_dm[23] + NET mprj_io_dm[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2792995 ) N ; + - mprj_io_holdover[7] + NET mprj_io_holdover[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2796215 ) N ; + - mprj_io_ib_mode_sel[7] + NET mprj_io_ib_mode_sel[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2811395 ) N ; + - mprj_io_inp_dis[7] + NET mprj_io_inp_dis[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2777355 ) N ; + - mprj_io_oeb[7] + NET mprj_io_oeb[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2814615 ) N ; + - mprj_io_out[7] + NET mprj_io_out[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2798975 ) N ; + - mprj_io_slow_sel[7] + NET mprj_io_slow_sel[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2752975 ) N ; + - mprj_io_vtrip_sel[7] + NET mprj_io_vtrip_sel[7] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2808175 ) N ; + - mprj_io_in[7] + NET mprj_io_in[7] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2743775 ) N ; + - mprj_io_in_3v3[7] + NET mprj_io_in_3v3[7] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2817375 ) N ; + - mprj_gpio_analog[1] + NET mprj_gpio_analog[1] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2982195 ) N ; + - mprj_gpio_noesd[1] + NET mprj_gpio_noesd[1] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2991395 ) N ; + - mprj_io[8] + NET mprj_io[8] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 3002550 ) N ; + - mprj_io_analog_en[8] + NET mprj_io_analog_en[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2994155 ) N ; + - mprj_io_analog_pol[8] + NET mprj_io_analog_pol[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3000595 ) N ; + - mprj_io_analog_sel[8] + NET mprj_io_analog_sel[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3015775 ) N ; + - mprj_io_dm[24] + NET mprj_io_dm[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2997375 ) N ; + - mprj_io_dm[25] + NET mprj_io_dm[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2988175 ) N ; + - mprj_io_dm[26] + NET mprj_io_dm[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3018995 ) N ; + - mprj_io_holdover[8] + NET mprj_io_holdover[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3022215 ) N ; + - mprj_io_ib_mode_sel[8] + NET mprj_io_ib_mode_sel[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3037395 ) N ; + - mprj_io_inp_dis[8] + NET mprj_io_inp_dis[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3003355 ) N ; + - mprj_io_oeb[8] + NET mprj_io_oeb[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3040615 ) N ; + - mprj_io_out[8] + NET mprj_io_out[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3024975 ) N ; + - mprj_io_slow_sel[8] + NET mprj_io_slow_sel[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2978975 ) N ; + - mprj_io_vtrip_sel[8] + NET mprj_io_vtrip_sel[8] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3034175 ) N ; + - mprj_io_in[8] + NET mprj_io_in[8] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2969775 ) N ; + - mprj_io_in_3v3[8] + NET mprj_io_in_3v3[8] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3043375 ) N ; + - mprj_gpio_analog[2] + NET mprj_gpio_analog[2] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3207195 ) N ; + - mprj_gpio_noesd[2] + NET mprj_gpio_noesd[2] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3216395 ) N ; + - mprj_io[9] + NET mprj_io[9] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 3523785 3227550 ) N ; + - mprj_io_analog_en[9] + NET mprj_io_analog_en[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3219155 ) N ; + - mprj_io_analog_pol[9] + NET mprj_io_analog_pol[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3225595 ) N ; + - mprj_io_analog_sel[9] + NET mprj_io_analog_sel[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3240775 ) N ; + - mprj_io_dm[27] + NET mprj_io_dm[27] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3222375 ) N ; + - mprj_io_dm[28] + NET mprj_io_dm[28] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3213175 ) N ; + - mprj_io_dm[29] + NET mprj_io_dm[29] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3243995 ) N ; + - mprj_io_holdover[9] + NET mprj_io_holdover[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3247215 ) N ; + - mprj_io_ib_mode_sel[9] + NET mprj_io_ib_mode_sel[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3262395 ) N ; + - mprj_io_inp_dis[9] + NET mprj_io_inp_dis[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3228355 ) N ; + - mprj_io_oeb[9] + NET mprj_io_oeb[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3265615 ) N ; + - mprj_io_out[9] + NET mprj_io_out[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3249975 ) N ; + - mprj_io_slow_sel[9] + NET mprj_io_slow_sel[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3203975 ) N ; + - mprj_io_vtrip_sel[9] + NET mprj_io_vtrip_sel[9] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3259175 ) N ; + - mprj_io_in[9] + NET mprj_io_in[9] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3194775 ) N ; + - mprj_io_in_3v3[9] + NET mprj_io_in_3v3[9] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3268375 ) N ; + - mprj_gpio_analog[7] + NET mprj_gpio_analog[7] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3984805 ) N ; + - mprj_gpio_noesd[7] + NET mprj_gpio_noesd[7] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3975605 ) N ; + - mprj_io[25] + NET mprj_io[25] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 3964450 ) N ; + - mprj_io_analog_en[14] + NET mprj_io_analog_en[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3972845 ) N ; + - mprj_io_analog_pol[14] + NET mprj_io_analog_pol[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3966405 ) N ; + - mprj_io_analog_sel[14] + NET mprj_io_analog_sel[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3951225 ) N ; + - mprj_io_dm[42] + NET mprj_io_dm[42] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3969625 ) N ; + - mprj_io_dm[43] + NET mprj_io_dm[43] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3978825 ) N ; + - mprj_io_dm[44] + NET mprj_io_dm[44] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3948005 ) N ; + - mprj_io_holdover[14] + NET mprj_io_holdover[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3944785 ) N ; + - mprj_io_ib_mode_sel[14] + NET mprj_io_ib_mode_sel[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3929605 ) N ; + - mprj_io_inp_dis[14] + NET mprj_io_inp_dis[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3963645 ) N ; + - mprj_io_oeb[14] + NET mprj_io_oeb[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3926385 ) N ; + - mprj_io_out[14] + NET mprj_io_out[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3942025 ) N ; + - mprj_io_slow_sel[14] + NET mprj_io_slow_sel[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3988025 ) N ; + - mprj_io_vtrip_sel[14] + NET mprj_io_vtrip_sel[14] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3932825 ) N ; + - mprj_io_in[14] + NET mprj_io_in[14] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3997225 ) N ; + - mprj_io_in_3v3[14] + NET mprj_io_in_3v3[14] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3923625 ) N ; + - mprj_gpio_analog[17] + NET mprj_gpio_analog[17] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1402805 ) N ; + - mprj_gpio_noesd[17] + NET mprj_gpio_noesd[17] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1393605 ) N ; + - mprj_io[35] + NET mprj_io[35] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 1382450 ) N ; + - mprj_io_analog_en[24] + NET mprj_io_analog_en[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1390845 ) N ; + - mprj_io_analog_pol[24] + NET mprj_io_analog_pol[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1384405 ) N ; + - mprj_io_analog_sel[24] + NET mprj_io_analog_sel[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1369225 ) N ; + - mprj_io_dm[72] + NET mprj_io_dm[72] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1387625 ) N ; + - mprj_io_dm[73] + NET mprj_io_dm[73] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1396825 ) N ; + - mprj_io_dm[74] + NET mprj_io_dm[74] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1366005 ) N ; + - mprj_io_holdover[24] + NET mprj_io_holdover[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1362785 ) N ; + - mprj_io_ib_mode_sel[24] + NET mprj_io_ib_mode_sel[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1347605 ) N ; + - mprj_io_inp_dis[24] + NET mprj_io_inp_dis[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1381645 ) N ; + - mprj_io_oeb[24] + NET mprj_io_oeb[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1344385 ) N ; + - mprj_io_out[24] + NET mprj_io_out[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1360025 ) N ; + - mprj_io_slow_sel[24] + NET mprj_io_slow_sel[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1406025 ) N ; + - mprj_io_vtrip_sel[24] + NET mprj_io_vtrip_sel[24] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1350825 ) N ; + - mprj_io_in[24] + NET mprj_io_in[24] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1415225 ) N ; + - mprj_io_in_3v3[24] + NET mprj_io_in_3v3[24] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1341625 ) N ; + - mprj_io[36] + NET mprj_io[36] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 1166450 ) N ; + - mprj_io_analog_en[25] + NET mprj_io_analog_en[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1174845 ) N ; + - mprj_io_analog_pol[25] + NET mprj_io_analog_pol[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1168405 ) N ; + - mprj_io_analog_sel[25] + NET mprj_io_analog_sel[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1153225 ) N ; + - mprj_io_dm[75] + NET mprj_io_dm[75] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1171625 ) N ; + - mprj_io_dm[76] + NET mprj_io_dm[76] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1180825 ) N ; + - mprj_io_dm[77] + NET mprj_io_dm[77] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1150005 ) N ; + - mprj_io_holdover[25] + NET mprj_io_holdover[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1146785 ) N ; + - mprj_io_ib_mode_sel[25] + NET mprj_io_ib_mode_sel[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1131605 ) N ; + - mprj_io_inp_dis[25] + NET mprj_io_inp_dis[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1165645 ) N ; + - mprj_io_oeb[25] + NET mprj_io_oeb[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1128385 ) N ; + - mprj_io_out[25] + NET mprj_io_out[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1144025 ) N ; + - mprj_io_slow_sel[25] + NET mprj_io_slow_sel[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1190025 ) N ; + - mprj_io_vtrip_sel[25] + NET mprj_io_vtrip_sel[25] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1134825 ) N ; + - mprj_io_in[25] + NET mprj_io_in[25] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1199225 ) N ; + - mprj_io_in_3v3[25] + NET mprj_io_in_3v3[25] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1125625 ) N ; + - mprj_io[37] + NET mprj_io[37] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 950450 ) N ; + - mprj_io_analog_en[26] + NET mprj_io_analog_en[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 958845 ) N ; + - mprj_io_analog_pol[26] + NET mprj_io_analog_pol[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 952405 ) N ; + - mprj_io_analog_sel[26] + NET mprj_io_analog_sel[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 937225 ) N ; + - mprj_io_dm[78] + NET mprj_io_dm[78] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 955625 ) N ; + - mprj_io_dm[79] + NET mprj_io_dm[79] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 964825 ) N ; + - mprj_io_dm[80] + NET mprj_io_dm[80] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 934005 ) N ; + - mprj_io_holdover[26] + NET mprj_io_holdover[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 930785 ) N ; + - mprj_io_ib_mode_sel[26] + NET mprj_io_ib_mode_sel[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 915605 ) N ; + - mprj_io_inp_dis[26] + NET mprj_io_inp_dis[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 949645 ) N ; + - mprj_io_oeb[26] + NET mprj_io_oeb[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 912385 ) N ; + - mprj_io_out[26] + NET mprj_io_out[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 928025 ) N ; + - mprj_io_slow_sel[26] + NET mprj_io_slow_sel[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 974025 ) N ; + - mprj_io_vtrip_sel[26] + NET mprj_io_vtrip_sel[26] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 918825 ) N ; + - mprj_io_in[26] + NET mprj_io_in[26] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 983225 ) N ; + - mprj_io_in_3v3[26] + NET mprj_io_in_3v3[26] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 909625 ) N ; + - mprj_gpio_analog[8] + NET mprj_gpio_analog[8] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3768805 ) N ; + - mprj_gpio_noesd[8] + NET mprj_gpio_noesd[8] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3759605 ) N ; + - mprj_io[26] + NET mprj_io[26] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 3748450 ) N ; + - mprj_io_analog_en[15] + NET mprj_io_analog_en[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3756845 ) N ; + - mprj_io_analog_pol[15] + NET mprj_io_analog_pol[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3750405 ) N ; + - mprj_io_analog_sel[15] + NET mprj_io_analog_sel[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3735225 ) N ; + - mprj_io_dm[45] + NET mprj_io_dm[45] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3753625 ) N ; + - mprj_io_dm[46] + NET mprj_io_dm[46] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3762825 ) N ; + - mprj_io_dm[47] + NET mprj_io_dm[47] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3732005 ) N ; + - mprj_io_holdover[15] + NET mprj_io_holdover[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3728785 ) N ; + - mprj_io_ib_mode_sel[15] + NET mprj_io_ib_mode_sel[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3713605 ) N ; + - mprj_io_inp_dis[15] + NET mprj_io_inp_dis[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3747645 ) N ; + - mprj_io_oeb[15] + NET mprj_io_oeb[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3710385 ) N ; + - mprj_io_out[15] + NET mprj_io_out[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3726025 ) N ; + - mprj_io_slow_sel[15] + NET mprj_io_slow_sel[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3772025 ) N ; + - mprj_io_vtrip_sel[15] + NET mprj_io_vtrip_sel[15] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3716825 ) N ; + - mprj_io_in[15] + NET mprj_io_in[15] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3781225 ) N ; + - mprj_io_in_3v3[15] + NET mprj_io_in_3v3[15] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3707625 ) N ; + - mprj_gpio_analog[9] + NET mprj_gpio_analog[9] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3552805 ) N ; + - mprj_gpio_noesd[9] + NET mprj_gpio_noesd[9] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3543605 ) N ; + - mprj_io[27] + NET mprj_io[27] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 3532450 ) N ; + - mprj_io_analog_en[16] + NET mprj_io_analog_en[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3540845 ) N ; + - mprj_io_analog_pol[16] + NET mprj_io_analog_pol[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3534405 ) N ; + - mprj_io_analog_sel[16] + NET mprj_io_analog_sel[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3519225 ) N ; + - mprj_io_dm[48] + NET mprj_io_dm[48] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3537625 ) N ; + - mprj_io_dm[49] + NET mprj_io_dm[49] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3546825 ) N ; + - mprj_io_dm[50] + NET mprj_io_dm[50] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3516005 ) N ; + - mprj_io_holdover[16] + NET mprj_io_holdover[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3512785 ) N ; + - mprj_io_ib_mode_sel[16] + NET mprj_io_ib_mode_sel[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3497605 ) N ; + - mprj_io_inp_dis[16] + NET mprj_io_inp_dis[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3531645 ) N ; + - mprj_io_oeb[16] + NET mprj_io_oeb[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3494385 ) N ; + - mprj_io_out[16] + NET mprj_io_out[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3510025 ) N ; + - mprj_io_slow_sel[16] + NET mprj_io_slow_sel[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3556025 ) N ; + - mprj_io_vtrip_sel[16] + NET mprj_io_vtrip_sel[16] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3500825 ) N ; + - mprj_io_in[16] + NET mprj_io_in[16] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3565225 ) N ; + - mprj_io_in_3v3[16] + NET mprj_io_in_3v3[16] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3491625 ) N ; + - mprj_gpio_analog[10] + NET mprj_gpio_analog[10] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3336805 ) N ; + - mprj_gpio_noesd[10] + NET mprj_gpio_noesd[10] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3327605 ) N ; + - mprj_io[28] + NET mprj_io[28] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 3316450 ) N ; + - mprj_io_analog_en[17] + NET mprj_io_analog_en[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3324845 ) N ; + - mprj_io_analog_pol[17] + NET mprj_io_analog_pol[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3318405 ) N ; + - mprj_io_analog_sel[17] + NET mprj_io_analog_sel[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3303225 ) N ; + - mprj_io_dm[51] + NET mprj_io_dm[51] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3321625 ) N ; + - mprj_io_dm[52] + NET mprj_io_dm[52] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3330825 ) N ; + - mprj_io_dm[53] + NET mprj_io_dm[53] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3300005 ) N ; + - mprj_io_holdover[17] + NET mprj_io_holdover[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3296785 ) N ; + - mprj_io_ib_mode_sel[17] + NET mprj_io_ib_mode_sel[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3281605 ) N ; + - mprj_io_inp_dis[17] + NET mprj_io_inp_dis[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3315645 ) N ; + - mprj_io_oeb[17] + NET mprj_io_oeb[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3278385 ) N ; + - mprj_io_out[17] + NET mprj_io_out[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3294025 ) N ; + - mprj_io_slow_sel[17] + NET mprj_io_slow_sel[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3340025 ) N ; + - mprj_io_vtrip_sel[17] + NET mprj_io_vtrip_sel[17] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3284825 ) N ; + - mprj_io_in[17] + NET mprj_io_in[17] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3349225 ) N ; + - mprj_io_in_3v3[17] + NET mprj_io_in_3v3[17] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3275625 ) N ; + - mprj_gpio_analog[11] + NET mprj_gpio_analog[11] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3120805 ) N ; + - mprj_gpio_noesd[11] + NET mprj_gpio_noesd[11] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3111605 ) N ; + - mprj_io[29] + NET mprj_io[29] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 3100450 ) N ; + - mprj_io_analog_en[18] + NET mprj_io_analog_en[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3108845 ) N ; + - mprj_io_analog_pol[18] + NET mprj_io_analog_pol[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3102405 ) N ; + - mprj_io_analog_sel[18] + NET mprj_io_analog_sel[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3087225 ) N ; + - mprj_io_dm[54] + NET mprj_io_dm[54] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3105625 ) N ; + - mprj_io_dm[55] + NET mprj_io_dm[55] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3114825 ) N ; + - mprj_io_dm[56] + NET mprj_io_dm[56] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3084005 ) N ; + - mprj_io_holdover[18] + NET mprj_io_holdover[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3080785 ) N ; + - mprj_io_ib_mode_sel[18] + NET mprj_io_ib_mode_sel[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3065605 ) N ; + - mprj_io_inp_dis[18] + NET mprj_io_inp_dis[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3099645 ) N ; + - mprj_io_oeb[18] + NET mprj_io_oeb[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3062385 ) N ; + - mprj_io_out[18] + NET mprj_io_out[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3078025 ) N ; + - mprj_io_slow_sel[18] + NET mprj_io_slow_sel[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3124025 ) N ; + - mprj_io_vtrip_sel[18] + NET mprj_io_vtrip_sel[18] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3068825 ) N ; + - mprj_io_in[18] + NET mprj_io_in[18] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3133225 ) N ; + - mprj_io_in_3v3[18] + NET mprj_io_in_3v3[18] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3059625 ) N ; + - mprj_gpio_analog[12] + NET mprj_gpio_analog[12] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2904805 ) N ; + - mprj_gpio_noesd[12] + NET mprj_gpio_noesd[12] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2895605 ) N ; + - mprj_io[30] + NET mprj_io[30] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 2884450 ) N ; + - mprj_io_analog_en[19] + NET mprj_io_analog_en[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2892845 ) N ; + - mprj_io_analog_pol[19] + NET mprj_io_analog_pol[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2886405 ) N ; + - mprj_io_analog_sel[19] + NET mprj_io_analog_sel[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2871225 ) N ; + - mprj_io_dm[57] + NET mprj_io_dm[57] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2889625 ) N ; + - mprj_io_dm[58] + NET mprj_io_dm[58] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2898825 ) N ; + - mprj_io_dm[59] + NET mprj_io_dm[59] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2868005 ) N ; + - mprj_io_holdover[19] + NET mprj_io_holdover[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2864785 ) N ; + - mprj_io_ib_mode_sel[19] + NET mprj_io_ib_mode_sel[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2849605 ) N ; + - mprj_io_inp_dis[19] + NET mprj_io_inp_dis[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2883645 ) N ; + - mprj_io_oeb[19] + NET mprj_io_oeb[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2846385 ) N ; + - mprj_io_out[19] + NET mprj_io_out[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2862025 ) N ; + - mprj_io_slow_sel[19] + NET mprj_io_slow_sel[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2908025 ) N ; + - mprj_io_vtrip_sel[19] + NET mprj_io_vtrip_sel[19] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2852825 ) N ; + - mprj_io_in[19] + NET mprj_io_in[19] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2917225 ) N ; + - mprj_io_in_3v3[19] + NET mprj_io_in_3v3[19] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2843625 ) N ; + - mprj_gpio_analog[13] + NET mprj_gpio_analog[13] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2688805 ) N ; + - mprj_gpio_noesd[13] + NET mprj_gpio_noesd[13] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2679605 ) N ; + - mprj_io[31] + NET mprj_io[31] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 2668450 ) N ; + - mprj_io_analog_en[20] + NET mprj_io_analog_en[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2676845 ) N ; + - mprj_io_analog_pol[20] + NET mprj_io_analog_pol[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2670405 ) N ; + - mprj_io_analog_sel[20] + NET mprj_io_analog_sel[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2655225 ) N ; + - mprj_io_dm[60] + NET mprj_io_dm[60] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2673625 ) N ; + - mprj_io_dm[61] + NET mprj_io_dm[61] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2682825 ) N ; + - mprj_io_dm[62] + NET mprj_io_dm[62] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2652005 ) N ; + - mprj_io_holdover[20] + NET mprj_io_holdover[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2648785 ) N ; + - mprj_io_ib_mode_sel[20] + NET mprj_io_ib_mode_sel[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2633605 ) N ; + - mprj_io_inp_dis[20] + NET mprj_io_inp_dis[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2667645 ) N ; + - mprj_io_oeb[20] + NET mprj_io_oeb[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2630385 ) N ; + - mprj_io_out[20] + NET mprj_io_out[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2646025 ) N ; + - mprj_io_slow_sel[20] + NET mprj_io_slow_sel[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2692025 ) N ; + - mprj_io_vtrip_sel[20] + NET mprj_io_vtrip_sel[20] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2636825 ) N ; + - mprj_io_in[20] + NET mprj_io_in[20] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2701225 ) N ; + - mprj_io_in_3v3[20] + NET mprj_io_in_3v3[20] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2627625 ) N ; + - mprj_gpio_analog[14] + NET mprj_gpio_analog[14] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2050805 ) N ; + - mprj_gpio_noesd[14] + NET mprj_gpio_noesd[14] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2041605 ) N ; + - mprj_io[32] + NET mprj_io[32] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 2030450 ) N ; + - mprj_io_analog_en[21] + NET mprj_io_analog_en[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2038845 ) N ; + - mprj_io_analog_pol[21] + NET mprj_io_analog_pol[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2032405 ) N ; + - mprj_io_analog_sel[21] + NET mprj_io_analog_sel[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2017225 ) N ; + - mprj_io_dm[63] + NET mprj_io_dm[63] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2035625 ) N ; + - mprj_io_dm[64] + NET mprj_io_dm[64] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2044825 ) N ; + - mprj_io_dm[65] + NET mprj_io_dm[65] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2014005 ) N ; + - mprj_io_holdover[21] + NET mprj_io_holdover[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2010785 ) N ; + - mprj_io_ib_mode_sel[21] + NET mprj_io_ib_mode_sel[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1995605 ) N ; + - mprj_io_inp_dis[21] + NET mprj_io_inp_dis[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2029645 ) N ; + - mprj_io_oeb[21] + NET mprj_io_oeb[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1992385 ) N ; + - mprj_io_out[21] + NET mprj_io_out[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2008025 ) N ; + - mprj_io_slow_sel[21] + NET mprj_io_slow_sel[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2054025 ) N ; + - mprj_io_vtrip_sel[21] + NET mprj_io_vtrip_sel[21] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1998825 ) N ; + - mprj_io_in[21] + NET mprj_io_in[21] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2063225 ) N ; + - mprj_io_in_3v3[21] + NET mprj_io_in_3v3[21] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1989625 ) N ; + - mprj_gpio_analog[15] + NET mprj_gpio_analog[15] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1834805 ) N ; + - mprj_gpio_noesd[15] + NET mprj_gpio_noesd[15] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1825605 ) N ; + - mprj_io[33] + NET mprj_io[33] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 1814450 ) N ; + - mprj_io_analog_en[22] + NET mprj_io_analog_en[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1822845 ) N ; + - mprj_io_analog_pol[22] + NET mprj_io_analog_pol[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1816405 ) N ; + - mprj_io_analog_sel[22] + NET mprj_io_analog_sel[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1801225 ) N ; + - mprj_io_dm[66] + NET mprj_io_dm[66] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1819625 ) N ; + - mprj_io_dm[67] + NET mprj_io_dm[67] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1828825 ) N ; + - mprj_io_dm[68] + NET mprj_io_dm[68] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1798005 ) N ; + - mprj_io_holdover[22] + NET mprj_io_holdover[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1794785 ) N ; + - mprj_io_ib_mode_sel[22] + NET mprj_io_ib_mode_sel[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1779605 ) N ; + - mprj_io_inp_dis[22] + NET mprj_io_inp_dis[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1813645 ) N ; + - mprj_io_oeb[22] + NET mprj_io_oeb[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1776385 ) N ; + - mprj_io_out[22] + NET mprj_io_out[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1792025 ) N ; + - mprj_io_slow_sel[22] + NET mprj_io_slow_sel[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1838025 ) N ; + - mprj_io_vtrip_sel[22] + NET mprj_io_vtrip_sel[22] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1782825 ) N ; + - mprj_io_in[22] + NET mprj_io_in[22] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1847225 ) N ; + - mprj_io_in_3v3[22] + NET mprj_io_in_3v3[22] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1773625 ) N ; + - mprj_gpio_analog[16] + NET mprj_gpio_analog[16] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1618805 ) N ; + - mprj_gpio_noesd[16] + NET mprj_gpio_noesd[16] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1609605 ) N ; + - mprj_io[34] + NET mprj_io[34] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -31225 -31350 ) ( 31225 31350 ) + PLACED ( 64215 1598450 ) N ; + - mprj_io_analog_en[23] + NET mprj_io_analog_en[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1606845 ) N ; + - mprj_io_analog_pol[23] + NET mprj_io_analog_pol[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1600405 ) N ; + - mprj_io_analog_sel[23] + NET mprj_io_analog_sel[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1585225 ) N ; + - mprj_io_dm[69] + NET mprj_io_dm[69] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1603625 ) N ; + - mprj_io_dm[70] + NET mprj_io_dm[70] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1612825 ) N ; + - mprj_io_dm[71] + NET mprj_io_dm[71] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1582005 ) N ; + - mprj_io_holdover[23] + NET mprj_io_holdover[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1578785 ) N ; + - mprj_io_ib_mode_sel[23] + NET mprj_io_ib_mode_sel[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1563605 ) N ; + - mprj_io_inp_dis[23] + NET mprj_io_inp_dis[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1597645 ) N ; + - mprj_io_oeb[23] + NET mprj_io_oeb[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1560385 ) N ; + - mprj_io_out[23] + NET mprj_io_out[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1576025 ) N ; + - mprj_io_slow_sel[23] + NET mprj_io_slow_sel[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1622025 ) N ; + - mprj_io_vtrip_sel[23] + NET mprj_io_vtrip_sel[23] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1566825 ) N ; + - mprj_io_in[23] + NET mprj_io_in[23] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1631225 ) N ; + - mprj_io_in_3v3[23] + NET mprj_io_in_3v3[23] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1557625 ) N ; + - resetb + NET resetb + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met5 ( -18590 -27915 ) ( 18590 27915 ) + PLACED ( 702155 63630 ) N ; + - vdda + NET vdda + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met4 ( -480 -1725 ) ( 480 1725 ) + PLACED ( 663480 183340 ) N ; + - mprj_io[15] + NET mprj_io[15] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 3172470 5123530 ) N ; + - mprj_io[16] + NET mprj_io[16] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 2663470 5123530 ) N ; + - mprj_io[17] + NET mprj_io[17] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 2406470 5123530 ) N ; + - vccd1_pad + NET vccd1_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -33630 -27200 ) ( 33630 27200 ) + PLACED ( 3523530 4575530 ) N ; + - vdda1_pad + NET vdda1_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 3523530 4129530 ) N ; + - vdda1_pad2 + NET vdda1_pad2 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 3523530 2556530 ) N ; + - vssa1_pad + NET vssa1_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 2915470 5123530 ) N ; + - vssa1_pad2 + NET vssa1_pad2 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 3523530 2115530 ) N ; + - vdda1 + NET vdda1 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met4 ( -1725 -480 ) ( 1725 480 ) + PLACED ( 3404660 2299480 ) N ; + - vssa1 + NET vssa1 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met4 ( -165 -37500 ) ( 165 37500 ) + PLACED ( 3444570 2336500 ) N ; + - vssd1_pad + NET vssd1_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -33630 -27200 ) ( 33630 27200 ) + PLACED ( 3523530 2336530 ) N ; + - mprj_analog[7] + NET mprj_analog[7] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -12500 -41175 ) ( 12500 41175 ) + PLACED ( 937220 5029175 ) N ; + - mprj_io[21] + NET mprj_io[21] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 937470 5123530 ) N ; + - mprj_analog[8] + NET mprj_analog[8] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -12500 -41175 ) ( 12500 41175 ) + PLACED ( 680220 5029175 ) N ; + - mprj_io[22] + NET mprj_io[22] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 680470 5123530 ) N ; + - mprj_analog[9] + NET mprj_analog[9] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -12500 -41175 ) ( 12500 41175 ) + PLACED ( 423220 5029175 ) N ; + - mprj_io[23] + NET mprj_io[23] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 423470 5123530 ) N ; + - mprj_analog[10] + NET mprj_analog[10] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -41175 -12500 ) ( 41175 12500 ) + PLACED ( 158825 4813220 ) N ; + - mprj_io[24] + NET mprj_io[24] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 64465 4813470 ) N ; + - mprj_analog[6] + NET mprj_analog[6] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -35805 -7840 ) ( 35805 7840 ) + PLACED ( 1238195 4995840 ) N ; + - mprj_clamp_high[2] + NET mprj_clamp_high[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -11950 -12830 ) ( 11950 12830 ) + PLACED ( 1214340 5000830 ) N ; + - mprj_clamp_low[2] + NET mprj_clamp_low[2] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -11950 -1025 ) ( 11950 1025 ) + PLACED ( 1164445 4989025 ) N ; + - mprj_io[20] + NET mprj_io[20] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 1189470 5123530 ) N ; + - vccd2_pad + NET vccd2_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -33630 -27200 ) ( 33630 27200 ) + PLACED ( 64465 4597470 ) N ; + - vdda2_pad + NET vdda2_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 64465 2452470 ) N ; + - vssa2_pad + NET vssa2_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 64465 4175470 ) N ; + - vdda2 + NET vdda2 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met4 ( -1725 -480 ) ( 1725 480 ) + PLACED ( 183340 2278515 ) N ; + - vssa2 + NET vssa2 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met4 ( -165 -37500 ) ( 165 37500 ) + PLACED ( 143430 2241500 ) N ; + - vssd2_pad + NET vssd2_pad + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -33630 -27200 ) ( 33630 27200 ) + PLACED ( 64465 2241470 ) N ; + - mprj_io[18] + NET mprj_io[18] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 1961470 5123530 ) N ; + - mprj_io[19] + NET mprj_io[19] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30420 -30410 ) ( 30420 30410 ) + PLACED ( 1452470 5123530 ) N ; + - mprj_io[14] + NET mprj_io[14] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -30410 -30420 ) ( 30410 30420 ) + PLACED ( 3523530 4795530 ) N ; + - mprj_analog[5] + NET mprj_analog[5] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -35805 -7840 ) ( 35805 7840 ) + PLACED ( 1501195 4995840 ) N ; + - mprj_clamp_high[1] + NET mprj_clamp_high[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -11950 -12830 ) ( 11950 12830 ) + PLACED ( 1477340 5000830 ) N ; + - mprj_clamp_low[1] + NET mprj_clamp_low[1] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -11950 -1025 ) ( 11950 1025 ) + PLACED ( 1427445 4989025 ) N ; + - mprj_analog[4] + NET mprj_analog[4] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -35805 -7840 ) ( 35805 7840 ) + PLACED ( 2010195 4995840 ) N ; + - mprj_clamp_high[0] + NET mprj_clamp_high[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -11950 -12830 ) ( 11950 12830 ) + PLACED ( 1986340 5000830 ) N ; + - mprj_clamp_low[0] + NET mprj_clamp_low[0] + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -11950 -1025 ) ( 11950 1025 ) + PLACED ( 1936445 4989025 ) N ; + - resetb_core_h + NET resetb_core_h + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -365 -165 ) ( 365 165 ) + PLACED ( 708700 199835 ) N ; + - vccd2 + NET vccd2 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -6090 -1880 ) ( 6090 1880 ) + PLACED ( 227470 894390 ) N ; + - vssd2 + NET vssd2 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -6090 -1880 ) ( 6090 1880 ) + PLACED ( 211370 894390 ) N ; + - vccd1 + NET vccd1 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -5910 -1740 ) ( 5910 1740 ) + PLACED ( 3376660 675090 ) N ; + - vssd1 + NET vssd1 + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met5 ( -5910 -1740 ) ( 5910 1740 ) + PLACED ( 3360590 675690 ) N ; + - mprj_analog[0] + NET mprj_analog[0] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -41175 -12500 ) ( 41175 12500 ) + PLACED ( 3429175 4795780 ) N ; + - mprj_analog[1] + NET mprj_analog[1] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -12500 -41175 ) ( 12500 41175 ) + PLACED ( 3172220 5029175 ) N ; + - mprj_analog[2] + NET mprj_analog[2] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -12500 -41175 ) ( 12500 41175 ) + PLACED ( 2663220 5029175 ) N ; + - mprj_analog[3] + NET mprj_analog[3] + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met3 ( -12500 -41175 ) ( 12500 41175 ) + PLACED ( 2406220 5029175 ) N ; + - gpio_inenb_core + NET gpio_inenb_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2609355 209765 ) N ; + - flash_csb_oeb_core + NET flash_csb_oeb_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1550615 209765 ) N ; + - flash_clk_core + NET flash_clk_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1808975 209765 ) N ; + - flash_clk_oeb_core + NET flash_clk_oeb_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1824615 209765 ) N ; + - flash_csb_core + NET flash_csb_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1534975 209765 ) N ; + - gpio_outenb_core + NET gpio_outenb_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2646615 209765 ) N ; + - gpio_out_core + NET gpio_out_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2630975 209765 ) N ; + - gpio_mode0_core + NET gpio_mode0_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2603375 209765 ) N ; + - gpio_in_core + NET gpio_in_core + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2575775 209765 ) N ; + - flash_io1_oeb_core + NET flash_io1_oeb_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2372615 209765 ) N ; + - flash_io1_ieb_core + NET flash_io1_ieb_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2335355 209765 ) N ; + - flash_io1_do_core + NET flash_io1_do_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2356975 209765 ) N ; + - flash_io1_di_core + NET flash_io1_di_core + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2301775 209765 ) N ; + - flash_io0_oeb_core + NET flash_io0_oeb_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2098615 209765 ) N ; + - flash_io0_ieb_core + NET flash_io0_ieb_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2061355 209765 ) N ; + - flash_io0_do_core + NET flash_io0_do_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2082975 209765 ) N ; + - flash_io0_di_core + NET flash_io0_di_core + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2027775 209765 ) N ; + - por + NET por + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 970355 209765 ) N ; + - clock_core + NET clock_core + + DIRECTION INOUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 936775 209765 ) N ; + - gpio_mode1_core + NET gpio_mode1_core + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2624995 209930 ) N ; + - mprj_io_one[0] + NET mprj_io_one[0] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 510755 ) N ; + - mprj_io_one[1] + NET mprj_io_one[1] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 736755 ) N ; + - mprj_io_one[2] + NET mprj_io_one[2] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 961755 ) N ; + - mprj_io_one[3] + NET mprj_io_one[3] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1187755 ) N ; + - mprj_io_one[4] + NET mprj_io_one[4] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1412755 ) N ; + - mprj_io_one[5] + NET mprj_io_one[5] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1637755 ) N ; + - mprj_io_one[6] + NET mprj_io_one[6] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 1863755 ) N ; + - mprj_io_one[7] + NET mprj_io_one[7] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2749755 ) N ; + - mprj_io_one[8] + NET mprj_io_one[8] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 2975755 ) N ; + - mprj_io_one[9] + NET mprj_io_one[9] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3200755 ) N ; + - mprj_io_one[10] + NET mprj_io_one[10] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3426755 ) N ; + - mprj_io_one[11] + NET mprj_io_one[11] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3651755 ) N ; + - mprj_io_one[12] + NET mprj_io_one[12] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 3876755 ) N ; + - mprj_io_one[13] + NET mprj_io_one[13] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 3378235 4322755 ) N ; + - mprj_io_one[14] + NET mprj_io_one[14] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3991245 ) N ; + - mprj_io_one[15] + NET mprj_io_one[15] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3775245 ) N ; + - mprj_io_one[16] + NET mprj_io_one[16] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3559245 ) N ; + - mprj_io_one[17] + NET mprj_io_one[17] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3343245 ) N ; + - mprj_io_one[18] + NET mprj_io_one[18] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 3127245 ) N ; + - mprj_io_one[19] + NET mprj_io_one[19] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2911245 ) N ; + - mprj_io_one[20] + NET mprj_io_one[20] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2695245 ) N ; + - mprj_io_one[21] + NET mprj_io_one[21] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 2057245 ) N ; + - mprj_io_one[22] + NET mprj_io_one[22] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1841245 ) N ; + - mprj_io_one[23] + NET mprj_io_one[23] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1625245 ) N ; + - mprj_io_one[24] + NET mprj_io_one[24] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1409245 ) N ; + - mprj_io_one[25] + NET mprj_io_one[25] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 1193245 ) N ; + - mprj_io_one[26] + NET mprj_io_one[26] + + PORT + + LAYER met2 ( -1200 -140 ) ( 1200 140 ) + PLACED ( 209765 977245 ) N ; + - porb_h + NET porb_h + + DIRECTION INPUT + + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1541415 209930 ) N ; +END PINS + +NONDEFAULTRULES 99 ; + - met2_width_205 + + LAYER met2 WIDTH 205 ; + - met4_width_670 + + LAYER met4 WIDTH 670 ; + - met3_width_545 + + LAYER met3 WIDTH 545 ; + - met4_width_490 + + LAYER met4 WIDTH 490 ; + - met4_width_650 + + LAYER met4 WIDTH 650 ; + - met4_width_480 + + LAYER met4 WIDTH 480 ; + - met4_width_640 + + LAYER met4 WIDTH 640 ; + - met4_width_470 + + LAYER met4 WIDTH 470 ; + - met3_width_16650 + + LAYER met3 WIDTH 16650 ; + - met4_width_460 + + LAYER met4 WIDTH 460 ; + - met4_width_630 + + LAYER met4 WIDTH 630 ; + - met4_width_620 + + LAYER met4 WIDTH 620 ; + - met4_width_450 + + LAYER met4 WIDTH 450 ; + - met3_width_18010 + + LAYER met3 WIDTH 18010 ; + - met2_width_180 + + LAYER met2 WIDTH 180 ; + - met4_width_600 + + LAYER met4 WIDTH 600 ; + - met2_width_330 + + LAYER met2 WIDTH 330 ; + - met2_width_160 + + LAYER met2 WIDTH 160 ; + - met3_width_16600 + + LAYER met3 WIDTH 16600 ; + - met3_width_840 + + LAYER met3 WIDTH 840 ; + - met3_width_670 + + LAYER met3 WIDTH 670 ; + - met5_width_62450 + + LAYER met5 WIDTH 62450 ; + - met2_width_375 + + LAYER met2 WIDTH 375 ; + - met2_width_320 + + LAYER met2 WIDTH 320 ; + - met2_width_150 + + LAYER met2 WIDTH 150 ; + - met3_width_660 + + LAYER met3 WIDTH 660 ; + - met2_width_195 + + LAYER met2 WIDTH 195 ; + - met3_width_650 + + LAYER met3 WIDTH 650 ; + - met2_width_23900 + + LAYER met2 WIDTH 23900 ; + - met3_width_470 + + LAYER met3 WIDTH 470 ; + - met2_width_345 + + LAYER met2 WIDTH 345 ; + - met3_width_800 + + LAYER met3 WIDTH 800 ; + - met3_width_630 + + LAYER met3 WIDTH 630 ; + - met5_width_54400 + + LAYER met5 WIDTH 54400 ; + - met3_width_620 + + LAYER met3 WIDTH 620 ; + - met4_width_960 + + LAYER met4 WIDTH 960 ; + - met1_width_190 + + LAYER met1 WIDTH 190 ; + - met4_width_790 + + LAYER met4 WIDTH 790 ; + - met5_width_37180 + + LAYER met5 WIDTH 37180 ; + - met5_width_13000 + + LAYER met5 WIDTH 13000 ; + - met5_width_60820 + + LAYER met5 WIDTH 60820 ; + - met4_width_590 + + LAYER met4 WIDTH 590 ; + - met5_width_2040 + + LAYER met5 WIDTH 2040 ; + - met4_width_580 + + LAYER met4 WIDTH 580 ; + - met4_width_740 + + LAYER met4 WIDTH 740 ; + - met4_width_570 + + LAYER met4 WIDTH 570 ; + - met3_width_16750 + + LAYER met3 WIDTH 16750 ; + - met4_width_730 + + LAYER met4 WIDTH 730 ; + - met3_width_605 + + LAYER met3 WIDTH 605 ; + - met4_width_560 + + LAYER met4 WIDTH 560 ; + - met4_width_550 + + LAYER met4 WIDTH 550 ; + - met4_width_710 + + LAYER met4 WIDTH 710 ; + - met4_width_540 + + LAYER met4 WIDTH 540 ; + - met2_width_280 + + LAYER met2 WIDTH 280 ; + - met3_width_960 + + LAYER met3 WIDTH 960 ; + - met3_width_16550 + + LAYER met3 WIDTH 16550 ; + - met4_width_530 + + LAYER met4 WIDTH 530 ; + - met4_width_700 + + LAYER met4 WIDTH 700 ; + - met3_width_16380 + + LAYER met3 WIDTH 16380 ; + - met2_width_270 + + LAYER met2 WIDTH 270 ; + - met3_width_16710 + + LAYER met3 WIDTH 16710 ; + - met3_width_15680 + + LAYER met3 WIDTH 15680 ; + - met4_width_520 + + LAYER met4 WIDTH 520 ; + - met3_width_2040 + + LAYER met3 WIDTH 2040 ; + - met2_width_260 + + LAYER met2 WIDTH 260 ; + - met3_width_940 + + LAYER met3 WIDTH 940 ; + - met3_width_17050 + + LAYER met3 WIDTH 17050 ; + - met3_width_16190 + + LAYER met3 WIDTH 16190 ; + - met3_width_590 + + LAYER met3 WIDTH 590 ; + - met4_width_500 + + LAYER met4 WIDTH 500 ; + - met4_width_330 + + LAYER met4 WIDTH 330 ; + - met3_width_1160 + + LAYER met3 WIDTH 1160 ; + - met2_width_2050 + + LAYER met2 WIDTH 2050 ; + - met3_width_740 + + LAYER met3 WIDTH 740 ; + - met3_width_570 + + LAYER met3 WIDTH 570 ; + - met3_width_17020 + + LAYER met3 WIDTH 17020 ; + - met2_width_275 + + LAYER met2 WIDTH 275 ; + - met2_width_220 + + LAYER met2 WIDTH 220 ; + - met3_width_730 + + LAYER met3 WIDTH 730 ; + - met3_width_560 + + LAYER met3 WIDTH 560 ; + - met2_width_265 + + LAYER met2 WIDTH 265 ; + - met3_width_25000 + + LAYER met3 WIDTH 25000 ; + - met3_width_710 + + LAYER met3 WIDTH 710 ; + - met3_width_595 + + LAYER met3 WIDTH 595 ; + - met2_width_245 + + LAYER met2 WIDTH 245 ; + - met3_width_585 + + LAYER met3 WIDTH 585 ; + - met3_width_700 + + LAYER met3 WIDTH 700 ; + - met3_width_360 + + LAYER met3 WIDTH 360 ; + - met3_width_520 + + LAYER met3 WIDTH 520 ; + - met1_width_260 + + LAYER met1 WIDTH 260 ; + - met3_width_16880 + + LAYER met3 WIDTH 16880 ; + - met3_width_350 + + LAYER met3 WIDTH 350 ; + - met4_width_690 + + LAYER met4 WIDTH 690 ; + - met3_width_565 + + LAYER met3 WIDTH 565 ; + - met3_width_510 + + LAYER met3 WIDTH 510 ; + - met4_width_680 + + LAYER met4 WIDTH 680 ; + - met3_width_500 + + LAYER met3 WIDTH 500 ; + - met3_width_16690 + + LAYER met3 WIDTH 16690 ; + - met1_width_240 + + LAYER met1 WIDTH 240 ; +END NONDEFAULTRULES + +NETS 785 ; + - vssd2 ( user2_vccd_lvclamp_pad VSSD1 ) + ( user2_vssd_lvclamp_pad VSSD1 ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211480 892940 ) ( * 2204270 ) + NEW met5 TAPERRULE met5_width_13000 ( 211480 2228670 ) ( * 2254540 ) + NEW met5 TAPERRULE met5_width_13000 ( 211480 2278940 ) ( * 4585710 ) + NEW met5 TAPERRULE met5_width_13000 ( 211480 4609410 ) ( * 4635320 ) + NEW met4 TAPERRULE met4_width_620 ( 205170 4608920 ) ( 217860 * ) + NEW met4 TAPERRULE met4_width_650 ( 217685 4586660 ) ( * 4608460 ) + NEW met4 TAPERRULE met4_width_460 ( 205170 4586280 ) ( 217860 * ) + NEW met4 TAPERRULE met4_width_490 ( 205265 4586660 ) ( * 4608460 ) + NEW met4 ( 211435 4597560 ) via4_11850_22100 + NEW met3 TAPERRULE met3_width_650 ( 203620 4608935 ) ( 233760 * ) + NEW met3 TAPERRULE met3_width_16550 ( 225635 4586660 ) ( * 4608460 ) + NEW met3 TAPERRULE met3_width_560 ( 203620 4586230 ) ( 233760 * ) + NEW met3 TAPERRULE met3_width_2040 ( 204490 4586660 ) ( * 4608460 ) + NEW met3 ( 211435 4597560 ) via3_11850_22100_hx + NEW met4 TAPERRULE met4_width_480 ( 205140 2278380 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_450 ( 217695 2255490 ) ( * 2277990 ) + NEW met4 TAPERRULE met4_width_600 ( 205140 2255040 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_550 ( 205265 2255490 ) ( * 2277990 ) + NEW met4 ( 211505 2266740 ) via4_11930_22800 + NEW met3 TAPERRULE met3_width_560 ( 204850 2278420 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_16650 ( 225795 2255490 ) ( * 2277990 ) + NEW met3 TAPERRULE met3_width_585 ( 204850 2255047.5 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_840 ( 205120 2255490 ) ( * 2277990 ) + NEW met3 ( 211505 2266740 ) via3_11930_22800_hx + NEW met4 TAPERRULE met4_width_580 ( 205110 2228160 ) ( 217740 * ) + NEW met4 TAPERRULE met4_width_460 ( 217660 2205220 ) ( * 2227720 ) + NEW met4 TAPERRULE met4_width_500 ( 205110 2204820 ) ( 217740 * ) + NEW met4 TAPERRULE met4_width_540 ( 205230 2205220 ) ( * 2227720 ) + NEW met4 ( 211465 2216470 ) via4_11930_22800 + NEW met3 TAPERRULE met3_width_630 ( 204850 2228185 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_16690 ( 225775 2205220 ) ( * 2227720 ) + NEW met3 TAPERRULE met3_width_570 ( 204850 2204785 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_800 ( 205100 2205220 ) ( * 2227720 ) + NEW met3 ( 211465 2216470 ) via3_11930_22800_hx ; + - clock_pad/OE_N ( clock_pad OE_N ) ( clock_pad DM[0] ) + ( constant_block_1 one ) ( clock_pad ENABLE_VDDIO ) + + ROUTED met2 ( 1007600 210355 ) via_260_260_hv + NEW met2 ( 1007540 210445 ) ( 1007660 * ) + NEW met1 TAPERRULE met1_width_260 ( 964555 210355 ) ( 1007400 * ) + NEW met1 ( 964355 210355 ) via_260_260_hv ( * 210445 ) + ( 964415 * ) + NEW met1 TAPERRULE met1_width_260 ( 942940 210355 ) ( 964155 * ) + NEW met1 ( 942740 210355 ) via_260_260_hv ( * 210445 ) + ( 942800 * ) + NEW met1 TAPERRULE met1_width_260 ( 932810 210355 ) ( 942540 * ) + NEW met2 ( 942680 210265 ) ( 942800 * ) + NEW met2 ( 964295 210265 ) ( 964415 * ) + NEW met2 ( 1007540 210265 ) ( 1007660 * ) + NEW met1 TAPERRULE met1_width_260 ( 1007800 210355 ) ( 1013715 * ) via_260_260_hv + ( * 210445 ) ( 1013775 * ) + NEW met2 TAPERRULE met2_width_260 ( 1013715 203760 ) ( * 210155 ) + NEW met2 ( 1013635 203620 ) ( 1013795 * ) + NEW met2 ( 1013715 203495 ) via2_300_300_vx + NEW met3 ( 1013690 203520 ) ( 1013740 * ) + NEW met3 ( 1014015 203495 ) ( 1015170 * ) + NEW met3 ( 1013690 203470 ) ( 1013740 * ) + NEW met3 ( 1013690 203495 ) ( 1013415 * ) + NEW met2 ( 1013635 203370 ) ( 1013795 * ) ; + - mprj_io[13] ( mprj_pads.area1_io_pad\[13\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 4319000 ) ( * 4380000 ) ; + - mprj_pads.area1_io_pad\[13\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[13\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[13\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[13\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 4313557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 4314240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 4314380 ) ( * 4352745 ) + NEW met1 ( 3378000 4352885 ) ( 3378120 * ) + NEW met1 ( 3378060 4353275 ) via_260_860_vh + NEW met2 ( 3377105 4353645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 4353570 ) ( 3379365 * ) + NEW met1 ( 3378000 4353665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 4353805 ) ( * 4374365 ) + NEW met1 ( 3378000 4374505 ) ( 3378120 * ) + NEW met1 ( 3378060 4374895 ) via_260_860_vh + NEW met2 ( 3377105 4375265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 4375190 ) ( 3379365 * ) + NEW met1 ( 3378000 4375285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 4375190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 4353570 ) ( 3377860 * ) + NEW met2 ( 3378060 4313850 ) via_260_860_vh ( * 4313460 ) + ( 3378120 * ) + NEW met1 ( 3378010 4313395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 4313557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 4313485 ) ( 3379365 * ) ; + - mprj_io_in[13] ( mprj_pads.area1_io_pad\[13\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4316775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[13\]/HLD_H_N + ( mprj_pads.area1_io_pad\[13\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[13\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 4360085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 4360012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 4360110 ) ( 3377640 * ) + NEW met1 ( 3377580 4359720 ) via_260_860_vh + NEW met1 ( 3377520 4359330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 4320225 ) ( * 4359190 ) + NEW met1 ( 3377520 4320085 ) ( 3377640 * ) + NEW met1 ( 3377580 4319995 ) via_260_260_vh + NEW met2 ( 3377105 4320065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 4319995 ) ( 3379365 * ) + NEW met2 ( 3377105 4319925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 4319995 ) ( 3377380 * ) + NEW met1 ( 3377520 4319905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 4313395 ) ( * 4319765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 4360012.5 ) ( 3377380 * ) ; + - mprj_io_one[13] ( mprj_pads.area1_io_pad\[13\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4322755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[13] ( mprj_pads.area1_io_pad\[13\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4325975 ) ( 3379365 * ) ; + - mprj_gpio_analog[6] + ( mprj_pads.area1_io_pad\[13\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4329195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[13\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[13\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[40] ( mprj_pads.area1_io_pad\[13\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4335175 ) ( 3379365 * ) ; + - mprj_gpio_noesd[6] ( mprj_pads.area1_io_pad\[13\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4338395 ) ( 3379365 * ) ; + - mprj_io_analog_en[13] ( mprj_pads.area1_io_pad\[13\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4341155 ) ( 3379365 * ) ; + - mprj_io_dm[39] ( mprj_pads.area1_io_pad\[13\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4344375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[13] + ( mprj_pads.area1_io_pad\[13\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4347595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[13] ( mprj_pads.area1_io_pad\[13\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4350355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[13\]/ENABLE_H + ( mprj_pads.area1_io_pad\[13\] ENABLE_H ) ; + - mprj_io_analog_sel[13] + ( mprj_pads.area1_io_pad\[13\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4362775 ) ( 3379365 * ) ; + - mprj_io_dm[41] ( mprj_pads.area1_io_pad\[13\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4365995 ) ( 3379365 * ) ; + - mprj_io_holdover[13] ( mprj_pads.area1_io_pad\[13\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4369215 ) ( 3379365 * ) ; + - mprj_io_out[13] ( mprj_pads.area1_io_pad\[13\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4371975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[13\]/ENABLE_VDDA_H + ( mprj_pads.area1_io_pad\[13\] ENABLE_VDDA_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4378415 ) ( 3378340 * ) + NEW met1 TAPERRULE met1_width_260 ( 3378540 4378925 ) ( * 4390475 ) + NEW met1 ( 3378540 4378425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 4311550 ) ( * 4377925 ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 4378415 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[13] ( mprj_pads.area1_io_pad\[13\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4381175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[13] + ( mprj_pads.area1_io_pad\[13\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4384395 ) ( 3379365 * ) ; + - mprj_io_oeb[13] ( mprj_pads.area1_io_pad\[13\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4387615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[13] ( mprj_pads.area1_io_pad\[13\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 4390375 ) ( 3379365 * ) ; + - vccd1_pad ( user1_vccd_lvclamp_pad VCCD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 3490700 4575530 ) ( 3556360 * ) ; + - flash_clk ( flash_clk_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 1756000 64215 ) ( 1817000 * ) ; + - flash_clk_pad/TIE_LO_ESD ( flash_clk_pad TIE_LO_ESD ) + ( flash_clk_pad ENABLE_VSWITCH_H ) + ( flash_clk_pad ENABLE_INP_H ) + + ROUTED met2 ( 1750560 209095 ) via_260_260_hv + NEW met2 ( 1750500 209185 ) ( 1750620 * ) + NEW met1 TAPERRULE met1_width_260 ( 1749880 209095 ) ( 1750360 * ) + NEW met2 ( 1750500 209005 ) ( 1750620 * ) + NEW met1 TAPERRULE met1_width_260 ( 1750760 209095 ) ( 1790580 * ) via_260_260_hv + ( * 209185 ) ( 1790640 * ) + NEW met2 ( 1790520 209005 ) ( 1790640 * ) + NEW met1 TAPERRULE met1_width_260 ( 1790780 209095 ) ( 1812190 * ) via_260_260_hv + ( * 209185 ) ( 1812250 * ) + NEW met2 ( 1812130 209005 ) ( 1812250 * ) + NEW met1 TAPERRULE met1_width_260 ( 1812390 209095 ) ( 1828065 * ) ; + - flash_clk_pad/IN ( flash_clk_pad IN ) ; + - flash_clk_pad/HLD_H_N ( flash_clk_pad HLD_H_N ) + ( flash_clk_pad TIE_HI_ESD ) + + ROUTED met2 ( 1797000 209515 ) via_260_260_hv + NEW met2 ( 1796940 209605 ) ( 1797060 * ) + NEW met1 TAPERRULE met1_width_260 ( 1757205 209515 ) ( 1796800 * ) + NEW met1 ( 1757005 209515 ) via_260_260_hv ( * 209605 ) + ( 1757065 * ) + NEW met1 TAPERRULE met1_width_260 ( 1749880 209515 ) ( 1756805 * ) + NEW met2 ( 1756945 209425 ) ( 1757065 * ) + NEW met2 ( 1796940 209425 ) ( 1797060 * ) + NEW met1 TAPERRULE met1_width_260 ( 1797200 209515 ) ( 1828065 * ) ; + - flash_clk_pad/SLOW ( flash_clk_pad SLOW ) + ( constant_block_3 zero ) ( flash_clk_pad IB_MODE_SEL ) + ( flash_clk_pad VTRIP_SEL ) ( flash_clk_pad HLD_OVR ) + ( flash_clk_pad ANALOG_SEL ) ( flash_clk_pad INP_DIS ) + ( flash_clk_pad ANALOG_POL ) ( flash_clk_pad DM[0] ) + ( flash_clk_pad ANALOG_EN ) + + ROUTED met2 ( 1762970 209935 ) via_260_260_hv + NEW met2 ( 1762910 210025 ) ( 1763030 * ) + NEW met1 TAPERRULE met1_width_260 ( 1749880 209935 ) ( 1762770 * ) + NEW met2 ( 1762910 209845 ) ( 1763030 * ) + NEW met1 TAPERRULE met1_width_260 ( 1763170 209935 ) ( 1778130 * ) via_260_260_hv + ( * 210025 ) ( 1778190 * ) + NEW met2 ( 1778070 209845 ) ( 1778190 * ) + NEW met1 TAPERRULE met1_width_260 ( 1778330 209935 ) ( 1781360 * ) via_260_260_hv + ( * 210025 ) ( 1781420 * ) + NEW met2 ( 1781300 209845 ) ( 1781420 * ) + NEW met1 TAPERRULE met1_width_260 ( 1781560 209935 ) ( 1784575 * ) via_260_260_hv + ( * 210025 ) ( 1784635 * ) + NEW met2 ( 1784515 209845 ) ( 1784635 * ) + NEW met1 TAPERRULE met1_width_260 ( 1784775 209935 ) ( 1787350 * ) via_260_260_hv + ( * 210025 ) ( 1787410 * ) + NEW met2 ( 1787290 209845 ) ( 1787410 * ) + NEW met1 TAPERRULE met1_width_260 ( 1787550 209935 ) ( 1799770 * ) via_260_260_hv + ( * 210025 ) ( 1799830 * ) + NEW met2 ( 1799710 209845 ) ( 1799830 * ) + NEW met1 TAPERRULE met1_width_260 ( 1799970 209935 ) ( 1806215 * ) via_260_260_hv + ( * 210025 ) ( 1806275 * ) + NEW met2 ( 1806155 209845 ) ( 1806275 * ) + NEW met1 TAPERRULE met1_width_260 ( 1806415 209935 ) ( 1818165 * ) via_260_260_hv + ( * 210025 ) ( 1818225 * ) + NEW met2 ( 1818105 209845 ) ( 1818225 * ) + NEW met1 TAPERRULE met1_width_260 ( 1818365 209935 ) ( 1821390 * ) via_260_260_hv + ( * 210025 ) ( 1821450 * ) + NEW met2 ( 1821330 209845 ) ( 1821450 * ) + NEW met1 TAPERRULE met1_width_260 ( 1821590 209935 ) ( 1829945 * ) via_260_260_hv + ( * 210025 ) ( 1830005 * ) + NEW met2 TAPERRULE met2_width_260 ( 1829945 204625 ) ( * 209735 ) + NEW met2 ( 1829865 204485 ) ( 1830025 * ) + NEW met2 ( 1829945 204360 ) via2_300_300_vx + NEW met3 ( 1829920 204385 ) ( 1829970 * ) + NEW met3 ( 1830245 204360 ) ( 1846200 * ) + NEW met3 ( 1846200 203510 ) ( * 204060 ) + NEW met3 ( 1829920 204335 ) ( 1829970 * ) + NEW met3 ( 1829920 204360 ) ( 1829645 * ) + NEW met2 ( 1829865 204235 ) ( 1830025 * ) ; + - flash_clk_pad/PAD_A_ESD_0_H ( flash_clk_pad PAD_A_ESD_0_H ) ; + - flash_clk_pad/PAD_A_ESD_1_H ( flash_clk_pad PAD_A_ESD_1_H ) ; + - flash_clk_pad/PAD_A_NOESD_H ( flash_clk_pad PAD_A_NOESD_H ) ; + - flash_clk_core ( flash_clk_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1808975 208635 ) ( * 210895 ) ; + - flash_clk_oeb_core ( flash_clk_pad OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1824615 208635 ) ( * 210895 ) ; + - flash_clk_pad/IN_H ( flash_clk_pad IN_H ) ; + - constant_block_0/vssd ( constant_block_0 vssd ) ; + - constant_block_0/zero ( constant_block_0 zero ) ; + - mprj_io[9] ( mprj_pads.area1_io_pad\[9\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 3197000 ) ( * 3258000 ) ; + - mprj_pads.area1_io_pad\[9\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[9\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[9\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[9\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 3191557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 3192240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3192380 ) ( * 3230745 ) + NEW met1 ( 3378000 3230885 ) ( 3378120 * ) + NEW met1 ( 3378060 3231275 ) via_260_860_vh + NEW met2 ( 3377105 3231645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3231570 ) ( 3379365 * ) + NEW met1 ( 3378000 3231665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3231805 ) ( * 3252365 ) + NEW met1 ( 3378000 3252505 ) ( 3378120 * ) + NEW met1 ( 3378060 3252895 ) via_260_860_vh + NEW met2 ( 3377105 3253265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3253190 ) ( 3379365 * ) + NEW met1 ( 3378000 3253285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3253190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3231570 ) ( 3377860 * ) + NEW met2 ( 3378060 3191850 ) via_260_860_vh ( * 3191460 ) + ( 3378120 * ) + NEW met1 ( 3378010 3191395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 3191557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 3191485 ) ( 3379365 * ) ; + - mprj_io_in[9] ( mprj_pads.area1_io_pad\[9\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3194775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[9\]/HLD_H_N + ( mprj_pads.area1_io_pad\[9\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[9\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3238085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3238012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3238110 ) ( 3377640 * ) + NEW met1 ( 3377580 3237720 ) via_260_860_vh + NEW met1 ( 3377520 3237330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3198225 ) ( * 3237190 ) + NEW met1 ( 3377520 3198085 ) ( 3377640 * ) + NEW met1 ( 3377580 3197995 ) via_260_260_vh + NEW met2 ( 3377105 3198065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 3197995 ) ( 3379365 * ) + NEW met2 ( 3377105 3197925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 3197995 ) ( 3377380 * ) + NEW met1 ( 3377520 3197905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3191395 ) ( * 3197765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3238012.5 ) ( 3377380 * ) ; + - mprj_io_one[9] ( mprj_pads.area1_io_pad\[9\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3200755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[9] ( mprj_pads.area1_io_pad\[9\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3203975 ) ( 3379365 * ) ; + - mprj_gpio_analog[2] ( mprj_pads.area1_io_pad\[9\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3207195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[9\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[9\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[28] ( mprj_pads.area1_io_pad\[9\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3213175 ) ( 3379365 * ) ; + - mprj_gpio_noesd[2] ( mprj_pads.area1_io_pad\[9\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3216395 ) ( 3379365 * ) ; + - mprj_io_analog_en[9] ( mprj_pads.area1_io_pad\[9\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3219155 ) ( 3379365 * ) ; + - mprj_io_dm[27] ( mprj_pads.area1_io_pad\[9\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3222375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[9] ( mprj_pads.area1_io_pad\[9\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3225595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[9] ( mprj_pads.area1_io_pad\[9\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3228355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[9\]/ENABLE_H + ( mprj_pads.area1_io_pad\[9\] ENABLE_H ) ; + - mprj_io_analog_sel[9] ( mprj_pads.area1_io_pad\[9\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3240775 ) ( 3379365 * ) ; + - mprj_io_dm[29] ( mprj_pads.area1_io_pad\[9\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3243995 ) ( 3379365 * ) ; + - mprj_io_holdover[9] ( mprj_pads.area1_io_pad\[9\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3247215 ) ( 3379365 * ) ; + - mprj_io_out[9] ( mprj_pads.area1_io_pad\[9\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3249975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[9\]/ENABLE_VDDA_H + ( mprj_pads.area1_io_pad\[9\] ENABLE_VDDA_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3256415 ) ( 3378340 * ) + NEW met1 TAPERRULE met1_width_260 ( 3378540 3256925 ) ( * 3268475 ) + NEW met1 ( 3378540 3256425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 3189550 ) ( * 3255925 ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3256415 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[9] ( mprj_pads.area1_io_pad\[9\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3259175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[9] + ( mprj_pads.area1_io_pad\[9\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3262395 ) ( 3379365 * ) ; + - mprj_io_oeb[9] ( mprj_pads.area1_io_pad\[9\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3265615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[9] ( mprj_pads.area1_io_pad\[9\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3268375 ) ( 3379365 * ) ; + - vssa1_pad ( user1_vssa_hvclamp_pad\[0\] VSSA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 2885850 5123530 ) ( 2945090 * ) ; + - vdda1 ( FILLER_144 VDDA ) ( FILLER_143 VDDA ) ( FILLER_142 VDDA ) + ( FILLER_141 VDDA ) ( FILLER_140 VDDA ) ( FILLER_139 VDDA ) + ( FILLER_138 VDDA ) ( FILLER_137 VDDA ) ( FILLER_136 VDDA ) + ( FILLER_135 VDDA ) ( FILLER_131 VDDA ) ( FILLER_132 VDDA ) + ( FILLER_133 VDDA ) ( user1_analog_pad\[0\] VDDA ) + ( FILLER_127 VDDA ) ( FILLER_130 VDDA ) ( FILLER_129 VDDA ) + ( FILLER_128 VDDA ) ( FILLER_124 VDDA ) ( FILLER_126 VDDA ) + ( FILLER_125 VDDA ) ( FILLER_123 VDDA ) ( FILLER_116 VDDA ) + ( user1_vssa_hvclamp_pad\[0\] VDDA ) ( FILLER_119 VDDA ) + ( FILLER_120 VDDA ) ( FILLER_121 VDDA ) ( FILLER_118 VDDA ) + ( FILLER_117 VDDA ) ( FILLER_113 VDDA ) ( FILLER_115 VDDA ) + ( FILLER_114 VDDA ) ( FILLER_110 VDDA ) ( FILLER_112 VDDA ) + ( FILLER_111 VDDA ) ( FILLER_107 VDDA ) + ( user1_analog_pad\[1\] VDDA ) ( FILLER_108 VDDA ) + ( FILLER_103 VDDA ) ( FILLER_106 VDDA ) ( FILLER_105 VDDA ) + ( FILLER_104 VDDA ) ( FILLER_100 VDDA ) ( FILLER_102 VDDA ) + ( FILLER_101 VDDA ) ( FILLER_98 VDDA ) ( FILLER_99 VDDA ) + ( FILLER_91 VDDA ) ( FILLER_95 VDDA ) ( FILLER_96 VDDA ) + ( user1_analog_pad\[2\] VDDA ) ( FILLER_93 VDDA ) + ( FILLER_94 VDDA ) ( FILLER_92 VDDA ) ( FILLER_90 VDDA ) + ( FILLER_89 VDDA ) ( FILLER_88 VDDA ) ( FILLER_87 VDDA ) + ( FILLER_86 VDDA ) ( FILLER_85 VDDA ) ( FILLER_84 VDDA ) + ( FILLER_83 VDDA ) ( FILLER_82 VDDA ) ( FILLER_81 VDDA ) + ( FILLER_80 VDDA ) ( FILLER_79 VDDA ) + ( sky130_ef_io__com_bus_slice_10um_0 VDDA ) ( FILLER_78 VDDA ) + ( sky130_ef_io__com_bus_slice_5um_1 VDDA ) + ( user1_analog_pad_with_clamp VDDA ) ( FILLER_SB3 VDDA ) + ( sky130_ef_io__com_bus_slice_5um_0 VDDA ) ( FILLER_145 VDDA ) + ( FILLER_146 VDDA ) ( FILLER_147 VDDA ) ( user1_corner VDDA ) + ( FILLER_785 VDDA ) ( FILLER_786 VDDA ) ( FILLER_780 VDDA ) + ( FILLER_784 VDDA ) ( FILLER_783 VDDA ) ( FILLER_782 VDDA ) + ( FILLER_781 VDDA ) ( FILLER_779 VDDA ) + ( user1_analog_pad\[3\] VDDA ) ( FILLER_776 VDDA ) + ( FILLER_777 VDDA ) ( FILLER_775 VDDA ) ( FILLER_774 VDDA ) + ( FILLER_773 VDDA ) ( FILLER_772 VDDA ) ( FILLER_771 VDDA ) + ( FILLER_769 VDDA ) ( FILLER_770 VDDA ) ( FILLER_766 VDDA ) + ( FILLER_767 VDDA ) ( user1_vccd_lvclamp_pad VDDA ) + ( FILLER_761 VDDA ) ( FILLER_765 VDDA ) ( FILLER_764 VDDA ) + ( FILLER_763 VDDA ) ( FILLER_762 VDDA ) ( FILLER_760 VDDA ) + ( mprj_pads.area1_io_pad\[13\] VDDA ) ( FILLER_759 VDDA ) + ( FILLER_757 VDDA ) ( FILLER_756 VDDA ) ( FILLER_755 VDDA ) + ( FILLER_754 VDDA ) ( FILLER_753 VDDA ) ( FILLER_752 VDDA ) + ( FILLER_751 VDDA ) ( user1_vdda_hvclamp_pad\[0\] VDDA ) + ( FILLER_750 VDDA ) ( FILLER_748 VDDA ) ( FILLER_747 VDDA ) + ( FILLER_746 VDDA ) ( FILLER_745 VDDA ) ( FILLER_744 VDDA ) + ( FILLER_741 VDDA ) ( FILLER_743 VDDA ) ( FILLER_742 VDDA ) + ( FILLER_740 VDDA ) ( FILLER_735 VDDA ) + ( mprj_pads.area1_io_pad\[12\] VDDA ) ( FILLER_738 VDDA ) + ( FILLER_737 VDDA ) ( FILLER_736 VDDA ) ( FILLER_734 VDDA ) + ( FILLER_733 VDDA ) ( FILLER_732 VDDA ) + ( mprj_pads.area1_io_pad\[11\] VDDA ) ( FILLER_731 VDDA ) + ( FILLER_729 VDDA ) ( FILLER_728 VDDA ) ( FILLER_727 VDDA ) + ( FILLER_725 VDDA ) ( FILLER_726 VDDA ) ( FILLER_722 VDDA ) + ( FILLER_724 VDDA ) ( FILLER_723 VDDA ) ( FILLER_718 VDDA ) + ( FILLER_719 VDDA ) ( FILLER_720 VDDA ) + ( mprj_pads.area1_io_pad\[10\] VDDA ) ( FILLER_715 VDDA ) + ( FILLER_717 VDDA ) ( FILLER_716 VDDA ) ( FILLER_712 VDDA ) + ( FILLER_714 VDDA ) ( FILLER_713 VDDA ) ( FILLER_709 VDDA ) + ( mprj_pads.area1_io_pad\[9\] VDDA ) ( FILLER_710 VDDA ) + ( FILLER_707 VDDA ) ( FILLER_708 VDDA ) ( FILLER_703 VDDA ) + ( FILLER_706 VDDA ) ( FILLER_705 VDDA ) ( FILLER_704 VDDA ) + ( FILLER_700 VDDA ) ( FILLER_701 VDDA ) + ( mprj_pads.area1_io_pad\[8\] VDDA ) ( FILLER_699 VDDA ) + ( FILLER_698 VDDA ) ( FILLER_697 VDDA ) ( FILLER_696 VDDA ) + ( FILLER_695 VDDA ) ( FILLER_694 VDDA ) ( FILLER_693 VDDA ) + ( FILLER_689 VDDA ) ( mprj_pads.area1_io_pad\[7\] VDDA ) + ( FILLER_691 VDDA ) ( FILLER_690 VDDA ) ( FILLER_685 VDDA ) + ( FILLER_688 VDDA ) ( FILLER_687 VDDA ) ( FILLER_686 VDDA ) + ( FILLER_684 VDDA ) ( user1_vdda_hvclamp_pad\[1\] VDDA ) + ( FILLER_682 VDDA ) ( FILLER_681 VDDA ) ( FILLER_680 VDDA ) + ( FILLER_679 VDDA ) ( FILLER_678 VDDA ) ( FILLER_677 VDDA ) + ( FILLER_676 VDDA ) ( FILLER_675 VDDA ) ( FILLER_672 VDDA ) + ( FILLER_673 VDDA ) ( user1_vssd_lvclamp_pad VDDA ) + ( FILLER_SB1 VDDA ) ( FILLER_668 VDDA ) ( FILLER_671 VDDA ) + ( FILLER_670 VDDA ) ( FILLER_669 VDDA ) ( FILLER_665 VDDA ) + ( FILLER_667 VDDA ) ( FILLER_666 VDDA ) + ( user1_vssa_hvclamp_pad\[1\] VDDA ) ( FILLER_663 VDDA ) + ( FILLER_662 VDDA ) ( FILLER_661 VDDA ) ( FILLER_660 VDDA ) + ( FILLER_659 VDDA ) ( FILLER_658 VDDA ) ( FILLER_657 VDDA ) + ( FILLER_656 VDDA ) ( FILLER_654 VDDA ) + ( mprj_pads.area1_io_pad\[6\] VDDA ) ( FILLER_650 VDDA ) + ( FILLER_653 VDDA ) ( FILLER_652 VDDA ) ( FILLER_651 VDDA ) + ( FILLER_646 VDDA ) ( FILLER_649 VDDA ) ( FILLER_648 VDDA ) + ( FILLER_647 VDDA ) ( FILLER_641 VDDA ) + ( mprj_pads.area1_io_pad\[5\] VDDA ) ( FILLER_644 VDDA ) + ( FILLER_643 VDDA ) ( FILLER_642 VDDA ) ( FILLER_637 VDDA ) + ( FILLER_640 VDDA ) ( FILLER_639 VDDA ) ( FILLER_638 VDDA ) + ( mprj_pads.area1_io_pad\[4\] VDDA ) ( FILLER_635 VDDA ) + ( FILLER_634 VDDA ) ( FILLER_633 VDDA ) ( FILLER_632 VDDA ) + ( FILLER_631 VDDA ) ( FILLER_630 VDDA ) ( FILLER_629 VDDA ) + ( FILLER_628 VDDA ) ( FILLER_624 VDDA ) + ( mprj_pads.area1_io_pad\[3\] VDDA ) ( FILLER_625 VDDA ) + ( FILLER_626 VDDA ) ( FILLER_620 VDDA ) ( FILLER_623 VDDA ) + ( FILLER_622 VDDA ) ( FILLER_621 VDDA ) ( FILLER_618 VDDA ) + ( FILLER_619 VDDA ) ( FILLER_615 VDDA ) ( FILLER_616 VDDA ) + ( mprj_pads.area1_io_pad\[2\] VDDA ) ( FILLER_611 VDDA ) + ( FILLER_614 VDDA ) ( FILLER_613 VDDA ) ( FILLER_612 VDDA ) + ( FILLER_609 VDDA ) ( FILLER_610 VDDA ) ( FILLER_606 VDDA ) + ( FILLER_607 VDDA ) ( mprj_pads.area1_io_pad\[1\] VDDA ) + ( FILLER_602 VDDA ) ( FILLER_605 VDDA ) ( FILLER_604 VDDA ) + ( FILLER_603 VDDA ) ( FILLER_601 VDDA ) ( FILLER_600 VDDA ) + ( mprj_pads.area1_io_pad\[0\] VDDA ) ( FILLER_599 VDDA ) + ( FILLER_597 VDDA ) ( FILLER_596 VDDA ) ( FILLER_595 VDDA ) + ( FILLER_594 VDDA ) ( FILLER_593 VDDA ) ( FILLER_592 VDDA ) + ( FILLER_591 VDDA ) ( FILLER_590 VDDA ) + + ROUTED met4 TAPERRULE met4_width_960 ( 3403085 2299480 ) ( 3406235 * ) ; + - vssa1 ( FILLER_144 VSSA ) ( FILLER_143 VSSA ) ( FILLER_142 VSSA ) + ( FILLER_141 VSSA ) ( FILLER_140 VSSA ) ( FILLER_139 VSSA ) + ( FILLER_138 VSSA ) ( FILLER_137 VSSA ) ( FILLER_136 VSSA ) + ( FILLER_135 VSSA ) ( FILLER_131 VSSA ) ( FILLER_132 VSSA ) + ( FILLER_133 VSSA ) ( user1_analog_pad\[0\] VSSA ) + ( FILLER_127 VSSA ) ( FILLER_130 VSSA ) ( FILLER_129 VSSA ) + ( FILLER_128 VSSA ) ( FILLER_124 VSSA ) ( FILLER_126 VSSA ) + ( FILLER_125 VSSA ) ( FILLER_123 VSSA ) ( FILLER_116 VSSA ) + ( user1_vssa_hvclamp_pad\[0\] VSSA ) ( FILLER_119 VSSA ) + ( FILLER_120 VSSA ) ( FILLER_121 VSSA ) ( FILLER_118 VSSA ) + ( FILLER_117 VSSA ) ( FILLER_113 VSSA ) ( FILLER_115 VSSA ) + ( FILLER_114 VSSA ) ( FILLER_110 VSSA ) ( FILLER_112 VSSA ) + ( FILLER_111 VSSA ) ( FILLER_107 VSSA ) + ( user1_analog_pad\[1\] VSSA ) ( FILLER_108 VSSA ) + ( FILLER_103 VSSA ) ( FILLER_106 VSSA ) ( FILLER_105 VSSA ) + ( FILLER_104 VSSA ) ( FILLER_100 VSSA ) ( FILLER_102 VSSA ) + ( FILLER_101 VSSA ) ( FILLER_98 VSSA ) ( FILLER_99 VSSA ) + ( FILLER_91 VSSA ) ( FILLER_95 VSSA ) ( FILLER_96 VSSA ) + ( user1_analog_pad\[2\] VSSA ) ( FILLER_93 VSSA ) + ( FILLER_94 VSSA ) ( FILLER_92 VSSA ) ( FILLER_90 VSSA ) + ( FILLER_89 VSSA ) ( FILLER_88 VSSA ) ( FILLER_87 VSSA ) + ( FILLER_86 VSSA ) ( FILLER_85 VSSA ) ( FILLER_84 VSSA ) + ( FILLER_83 VSSA ) ( FILLER_82 VSSA ) ( FILLER_81 VSSA ) + ( FILLER_80 VSSA ) ( FILLER_79 VSSA ) + ( sky130_ef_io__com_bus_slice_10um_0 VSSA ) ( FILLER_78 VSSA ) + ( sky130_ef_io__com_bus_slice_5um_1 VSSA ) + ( user1_analog_pad_with_clamp VSSA ) ( FILLER_SB3 VSSA ) + ( sky130_ef_io__com_bus_slice_5um_0 VSSA ) ( FILLER_145 VSSA ) + ( FILLER_146 VSSA ) ( FILLER_147 VSSA ) ( user1_corner VSSA ) + ( FILLER_785 VSSA ) ( FILLER_786 VSSA ) ( FILLER_780 VSSA ) + ( FILLER_784 VSSA ) ( FILLER_783 VSSA ) ( FILLER_782 VSSA ) + ( FILLER_781 VSSA ) ( FILLER_779 VSSA ) + ( user1_analog_pad\[3\] VSSA ) ( FILLER_776 VSSA ) + ( FILLER_777 VSSA ) ( FILLER_775 VSSA ) ( FILLER_774 VSSA ) + ( FILLER_773 VSSA ) ( FILLER_772 VSSA ) ( FILLER_771 VSSA ) + ( FILLER_769 VSSA ) ( FILLER_770 VSSA ) ( FILLER_766 VSSA ) + ( FILLER_767 VSSA ) ( user1_vccd_lvclamp_pad VSSA ) + ( FILLER_761 VSSA ) ( FILLER_765 VSSA ) ( FILLER_764 VSSA ) + ( FILLER_763 VSSA ) ( FILLER_762 VSSA ) ( FILLER_760 VSSA ) + ( mprj_pads.area1_io_pad\[13\] VSSA ) ( FILLER_759 VSSA ) + ( FILLER_757 VSSA ) ( FILLER_756 VSSA ) ( FILLER_755 VSSA ) + ( FILLER_754 VSSA ) ( FILLER_753 VSSA ) ( FILLER_752 VSSA ) + ( FILLER_751 VSSA ) ( user1_vdda_hvclamp_pad\[0\] VSSA ) + ( FILLER_750 VSSA ) ( FILLER_748 VSSA ) ( FILLER_747 VSSA ) + ( FILLER_746 VSSA ) ( FILLER_745 VSSA ) ( FILLER_744 VSSA ) + ( FILLER_741 VSSA ) ( FILLER_743 VSSA ) ( FILLER_742 VSSA ) + ( FILLER_740 VSSA ) ( FILLER_735 VSSA ) + ( mprj_pads.area1_io_pad\[12\] VSSA ) ( FILLER_738 VSSA ) + ( FILLER_737 VSSA ) ( FILLER_736 VSSA ) ( FILLER_734 VSSA ) + ( FILLER_733 VSSA ) ( FILLER_732 VSSA ) + ( mprj_pads.area1_io_pad\[11\] VSSA ) ( FILLER_731 VSSA ) + ( FILLER_729 VSSA ) ( FILLER_728 VSSA ) ( FILLER_727 VSSA ) + ( FILLER_725 VSSA ) ( FILLER_726 VSSA ) ( FILLER_722 VSSA ) + ( FILLER_724 VSSA ) ( FILLER_723 VSSA ) ( FILLER_718 VSSA ) + ( FILLER_719 VSSA ) ( FILLER_720 VSSA ) + ( mprj_pads.area1_io_pad\[10\] VSSA ) ( FILLER_715 VSSA ) + ( FILLER_717 VSSA ) ( FILLER_716 VSSA ) ( FILLER_712 VSSA ) + ( FILLER_714 VSSA ) ( FILLER_713 VSSA ) ( FILLER_709 VSSA ) + ( mprj_pads.area1_io_pad\[9\] VSSA ) ( FILLER_710 VSSA ) + ( FILLER_707 VSSA ) ( FILLER_708 VSSA ) ( FILLER_703 VSSA ) + ( FILLER_706 VSSA ) ( FILLER_705 VSSA ) ( FILLER_704 VSSA ) + ( FILLER_700 VSSA ) ( FILLER_701 VSSA ) + ( mprj_pads.area1_io_pad\[8\] VSSA ) ( FILLER_699 VSSA ) + ( FILLER_698 VSSA ) ( FILLER_697 VSSA ) ( FILLER_696 VSSA ) + ( FILLER_695 VSSA ) ( FILLER_694 VSSA ) ( FILLER_693 VSSA ) + ( FILLER_689 VSSA ) ( mprj_pads.area1_io_pad\[7\] VSSA ) + ( FILLER_691 VSSA ) ( FILLER_690 VSSA ) ( FILLER_685 VSSA ) + ( FILLER_688 VSSA ) ( FILLER_687 VSSA ) ( FILLER_686 VSSA ) + ( FILLER_684 VSSA ) ( user1_vdda_hvclamp_pad\[1\] VSSA ) + ( FILLER_682 VSSA ) ( FILLER_681 VSSA ) ( FILLER_680 VSSA ) + ( FILLER_679 VSSA ) ( FILLER_678 VSSA ) ( FILLER_677 VSSA ) + ( FILLER_676 VSSA ) ( FILLER_675 VSSA ) ( FILLER_672 VSSA ) + ( FILLER_SB1 VSSA ) ( FILLER_673 VSSA ) + ( user1_vssd_lvclamp_pad VSSA ) ( FILLER_668 VSSA ) + ( FILLER_671 VSSA ) ( FILLER_670 VSSA ) ( FILLER_669 VSSA ) + ( FILLER_665 VSSA ) ( FILLER_667 VSSA ) ( FILLER_666 VSSA ) + ( user1_vssa_hvclamp_pad\[1\] VSSA ) ( FILLER_663 VSSA ) + ( FILLER_662 VSSA ) ( FILLER_661 VSSA ) ( FILLER_660 VSSA ) + ( FILLER_659 VSSA ) ( FILLER_658 VSSA ) ( FILLER_657 VSSA ) + ( FILLER_656 VSSA ) ( FILLER_654 VSSA ) + ( mprj_pads.area1_io_pad\[6\] VSSA ) ( FILLER_650 VSSA ) + ( FILLER_653 VSSA ) ( FILLER_652 VSSA ) ( FILLER_651 VSSA ) + ( FILLER_646 VSSA ) ( FILLER_649 VSSA ) ( FILLER_648 VSSA ) + ( FILLER_647 VSSA ) ( FILLER_641 VSSA ) + ( mprj_pads.area1_io_pad\[5\] VSSA ) ( FILLER_644 VSSA ) + ( FILLER_643 VSSA ) ( FILLER_642 VSSA ) ( FILLER_637 VSSA ) + ( FILLER_640 VSSA ) ( FILLER_639 VSSA ) ( FILLER_638 VSSA ) + ( mprj_pads.area1_io_pad\[4\] VSSA ) ( FILLER_635 VSSA ) + ( FILLER_634 VSSA ) ( FILLER_633 VSSA ) ( FILLER_632 VSSA ) + ( FILLER_631 VSSA ) ( FILLER_630 VSSA ) ( FILLER_629 VSSA ) + ( FILLER_628 VSSA ) ( FILLER_624 VSSA ) + ( mprj_pads.area1_io_pad\[3\] VSSA ) ( FILLER_625 VSSA ) + ( FILLER_626 VSSA ) ( FILLER_620 VSSA ) ( FILLER_623 VSSA ) + ( FILLER_622 VSSA ) ( FILLER_621 VSSA ) ( FILLER_618 VSSA ) + ( FILLER_619 VSSA ) ( FILLER_615 VSSA ) ( FILLER_616 VSSA ) + ( mprj_pads.area1_io_pad\[2\] VSSA ) ( FILLER_611 VSSA ) + ( FILLER_614 VSSA ) ( FILLER_613 VSSA ) ( FILLER_612 VSSA ) + ( FILLER_609 VSSA ) ( FILLER_610 VSSA ) ( FILLER_606 VSSA ) + ( FILLER_607 VSSA ) ( mprj_pads.area1_io_pad\[1\] VSSA ) + ( FILLER_602 VSSA ) ( FILLER_605 VSSA ) ( FILLER_604 VSSA ) + ( FILLER_603 VSSA ) ( FILLER_601 VSSA ) ( FILLER_600 VSSA ) + ( mprj_pads.area1_io_pad\[0\] VSSA ) ( FILLER_599 VSSA ) + ( FILLER_597 VSSA ) ( FILLER_596 VSSA ) ( FILLER_595 VSSA ) + ( FILLER_594 VSSA ) ( FILLER_593 VSSA ) ( FILLER_592 VSSA ) + ( FILLER_591 VSSA ) ( FILLER_590 VSSA ) + + ROUTED met4 TAPERRULE met4_width_330 ( 3444570 2299150 ) ( * 2373850 ) ; + - gpio_pad/VDDIO_Q ( gpio_pad VDDIO_Q ) ( FILLER_145 VDDIO_Q ) + ( FILLER_146 VDDIO_Q ) ( FILLER_147 VDDIO_Q ) + ( FILLER_144 VDDIO_Q ) ( FILLER_143 VDDIO_Q ) + ( FILLER_142 VDDIO_Q ) ( FILLER_141 VDDIO_Q ) + ( FILLER_140 VDDIO_Q ) ( FILLER_139 VDDIO_Q ) + ( FILLER_138 VDDIO_Q ) ( FILLER_137 VDDIO_Q ) + ( FILLER_136 VDDIO_Q ) ( FILLER_135 VDDIO_Q ) + ( FILLER_131 VDDIO_Q ) ( FILLER_132 VDDIO_Q ) + ( FILLER_133 VDDIO_Q ) ( user1_analog_pad\[0\] VDDIO_Q ) + ( FILLER_127 VDDIO_Q ) ( FILLER_130 VDDIO_Q ) + ( FILLER_129 VDDIO_Q ) ( FILLER_128 VDDIO_Q ) + ( FILLER_124 VDDIO_Q ) ( FILLER_126 VDDIO_Q ) + ( FILLER_125 VDDIO_Q ) ( FILLER_123 VDDIO_Q ) + ( FILLER_116 VDDIO_Q ) ( user1_vssa_hvclamp_pad\[0\] VDDIO_Q ) + ( FILLER_119 VDDIO_Q ) ( FILLER_120 VDDIO_Q ) + ( FILLER_121 VDDIO_Q ) ( FILLER_118 VDDIO_Q ) + ( FILLER_117 VDDIO_Q ) ( FILLER_113 VDDIO_Q ) + ( FILLER_115 VDDIO_Q ) ( FILLER_114 VDDIO_Q ) + ( FILLER_110 VDDIO_Q ) ( FILLER_112 VDDIO_Q ) + ( FILLER_111 VDDIO_Q ) ( FILLER_107 VDDIO_Q ) + ( user1_analog_pad\[1\] VDDIO_Q ) ( FILLER_108 VDDIO_Q ) + ( FILLER_103 VDDIO_Q ) ( FILLER_106 VDDIO_Q ) + ( FILLER_105 VDDIO_Q ) ( FILLER_104 VDDIO_Q ) + ( FILLER_100 VDDIO_Q ) ( FILLER_102 VDDIO_Q ) + ( FILLER_101 VDDIO_Q ) ( FILLER_98 VDDIO_Q ) + ( FILLER_99 VDDIO_Q ) ( FILLER_91 VDDIO_Q ) + ( FILLER_95 VDDIO_Q ) ( FILLER_96 VDDIO_Q ) + ( user1_analog_pad\[2\] VDDIO_Q ) ( FILLER_93 VDDIO_Q ) + ( FILLER_94 VDDIO_Q ) ( FILLER_92 VDDIO_Q ) + ( FILLER_90 VDDIO_Q ) ( FILLER_89 VDDIO_Q ) + ( FILLER_88 VDDIO_Q ) ( FILLER_87 VDDIO_Q ) + ( FILLER_86 VDDIO_Q ) ( FILLER_85 VDDIO_Q ) + ( FILLER_84 VDDIO_Q ) ( FILLER_83 VDDIO_Q ) + ( FILLER_82 VDDIO_Q ) ( FILLER_81 VDDIO_Q ) + ( FILLER_80 VDDIO_Q ) ( FILLER_79 VDDIO_Q ) + ( sky130_ef_io__com_bus_slice_10um_0 VDDIO_Q ) + ( FILLER_78 VDDIO_Q ) + ( sky130_ef_io__com_bus_slice_5um_1 VDDIO_Q ) + ( user1_analog_pad_with_clamp VDDIO_Q ) ( FILLER_SB3 VDDIO_Q ) + ( sky130_ef_io__com_bus_slice_5um_0 VDDIO_Q ) + ( FILLER_71 VDDIO_Q ) ( disconnect_vdda_0 VDDIO_Q ) + ( FILLER_73 VDDIO_Q ) ( FILLER_72 VDDIO_Q ) + ( FILLER_68 VDDIO_Q ) ( FILLER_70 VDDIO_Q ) + ( FILLER_69 VDDIO_Q ) ( FILLER_64 VDDIO_Q ) + ( mgmt_vssio_hvclamp_pad\[1\] VDDIO_Q ) ( FILLER_66 VDDIO_Q ) + ( FILLER_65 VDDIO_Q ) ( FILLER_60 VDDIO_Q ) + ( FILLER_63 VDDIO_Q ) ( FILLER_62 VDDIO_Q ) + ( FILLER_61 VDDIO_Q ) + ( sky130_ef_io__com_bus_slice_5um_3 VDDIO_Q ) + ( sky130_ef_io__com_bus_slice_10um_1 VDDIO_Q ) + ( user2_analog_pad_with_clamp\[0\] VDDIO_Q ) + ( sky130_ef_io__com_bus_slice_5um_2 VDDIO_Q ) + ( FILLER_57 VDDIO_Q ) ( FILLER_56 VDDIO_Q ) + ( FILLER_55 VDDIO_Q ) ( FILLER_54 VDDIO_Q ) + ( FILLER_53 VDDIO_Q ) ( FILLER_52 VDDIO_Q ) + ( FILLER_51 VDDIO_Q ) ( FILLER_50 VDDIO_Q ) + ( FILLER_49 VDDIO_Q ) + ( user2_analog_pad_with_clamp\[1\] VDDIO_Q ) + ( FILLER_47 VDDIO_Q ) ( FILLER_46 VDDIO_Q ) + ( FILLER_45 VDDIO_Q ) ( FILLER_44 VDDIO_Q ) + ( FILLER_43 VDDIO_Q ) ( FILLER_42 VDDIO_Q ) + ( user2_analog_pad\[0\] VDDIO_Q ) ( FILLER_41 VDDIO_Q ) + ( FILLER_39 VDDIO_Q ) ( FILLER_38 VDDIO_Q ) + ( FILLER_37 VDDIO_Q ) ( FILLER_36 VDDIO_Q ) + ( FILLER_33 VDDIO_Q ) ( FILLER_35 VDDIO_Q ) + ( FILLER_34 VDDIO_Q ) ( FILLER_29 VDDIO_Q ) + ( FILLER_32 VDDIO_Q ) ( FILLER_31 VDDIO_Q ) + ( FILLER_30 VDDIO_Q ) ( FILLER_26 VDDIO_Q ) + ( FILLER_27 VDDIO_Q ) ( user2_analog_pad\[1\] VDDIO_Q ) + ( FILLER_25 VDDIO_Q ) ( FILLER_24 VDDIO_Q ) + ( FILLER_23 VDDIO_Q ) ( FILLER_22 VDDIO_Q ) + ( FILLER_21 VDDIO_Q ) ( FILLER_20 VDDIO_Q ) + ( FILLER_19 VDDIO_Q ) ( FILLER_18 VDDIO_Q ) + ( FILLER_17 VDDIO_Q ) ( FILLER_13 VDDIO_Q ) + ( user2_analog_pad\[2\] VDDIO_Q ) ( FILLER_14 VDDIO_Q ) + ( FILLER_15 VDDIO_Q ) ( FILLER_10 VDDIO_Q ) + ( FILLER_12 VDDIO_Q ) ( FILLER_11 VDDIO_Q ) + ( FILLER_6 VDDIO_Q ) ( FILLER_9 VDDIO_Q ) ( FILLER_8 VDDIO_Q ) + ( FILLER_7 VDDIO_Q ) ( FILLER_5 VDDIO_Q ) + ( user2_corner VDDIO_Q ) ( user1_corner VDDIO_Q ) + ( FILLER_578 VDDIO_Q ) ( FILLER_579 VDDIO_Q ) + ( FILLER_576 VDDIO_Q ) ( FILLER_786 VDDIO_Q ) + ( FILLER_577 VDDIO_Q ) ( FILLER_785 VDDIO_Q ) + ( FILLER_571 VDDIO_Q ) ( FILLER_575 VDDIO_Q ) + ( FILLER_784 VDDIO_Q ) ( FILLER_574 VDDIO_Q ) + ( FILLER_783 VDDIO_Q ) ( FILLER_573 VDDIO_Q ) + ( FILLER_782 VDDIO_Q ) ( FILLER_572 VDDIO_Q ) + ( FILLER_781 VDDIO_Q ) ( FILLER_780 VDDIO_Q ) + ( FILLER_779 VDDIO_Q ) ( FILLER_570 VDDIO_Q ) + ( user2_analog_pad\[3\] VDDIO_Q ) ( FILLER_776 VDDIO_Q ) + ( FILLER_568 VDDIO_Q ) ( user1_analog_pad\[3\] VDDIO_Q ) + ( FILLER_567 VDDIO_Q ) ( FILLER_777 VDDIO_Q ) + ( FILLER_775 VDDIO_Q ) ( FILLER_566 VDDIO_Q ) + ( FILLER_774 VDDIO_Q ) ( FILLER_565 VDDIO_Q ) + ( FILLER_773 VDDIO_Q ) ( FILLER_564 VDDIO_Q ) + ( FILLER_772 VDDIO_Q ) ( FILLER_563 VDDIO_Q ) + ( FILLER_771 VDDIO_Q ) ( FILLER_562 VDDIO_Q ) + ( FILLER_561 VDDIO_Q ) ( FILLER_769 VDDIO_Q ) + ( FILLER_770 VDDIO_Q ) ( FILLER_766 VDDIO_Q ) + ( FILLER_559 VDDIO_Q ) ( user2_vccd_lvclamp_pad VDDIO_Q ) + ( FILLER_558 VDDIO_Q ) ( FILLER_557 VDDIO_Q ) + ( FILLER_767 VDDIO_Q ) ( user1_vccd_lvclamp_pad VDDIO_Q ) + ( FILLER_556 VDDIO_Q ) ( FILLER_552 VDDIO_Q ) + ( FILLER_765 VDDIO_Q ) ( FILLER_555 VDDIO_Q ) + ( FILLER_764 VDDIO_Q ) ( FILLER_554 VDDIO_Q ) + ( FILLER_763 VDDIO_Q ) ( FILLER_553 VDDIO_Q ) + ( FILLER_762 VDDIO_Q ) ( FILLER_761 VDDIO_Q ) + ( FILLER_551 VDDIO_Q ) ( FILLER_760 VDDIO_Q ) + ( FILLER_546 VDDIO_Q ) ( FILLER_759 VDDIO_Q ) + ( FILLER_549 VDDIO_Q ) ( mgmt_vddio_hvclamp_pad\[1\] VDDIO_Q ) + ( FILLER_548 VDDIO_Q ) ( FILLER_547 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[13\] VDDIO_Q ) ( FILLER_757 VDDIO_Q ) + ( FILLER_756 VDDIO_Q ) ( FILLER_545 VDDIO_Q ) + ( FILLER_755 VDDIO_Q ) ( FILLER_544 VDDIO_Q ) + ( FILLER_754 VDDIO_Q ) ( FILLER_543 VDDIO_Q ) + ( FILLER_542 VDDIO_Q ) ( FILLER_753 VDDIO_Q ) + ( FILLER_541 VDDIO_Q ) ( FILLER_752 VDDIO_Q ) + ( FILLER_751 VDDIO_Q ) ( FILLER_536 VDDIO_Q ) + ( FILLER_750 VDDIO_Q ) ( user2_vssa_hvclamp_pad VDDIO_Q ) + ( FILLER_538 VDDIO_Q ) ( FILLER_539 VDDIO_Q ) + ( FILLER_537 VDDIO_Q ) ( user1_vdda_hvclamp_pad\[0\] VDDIO_Q ) + ( FILLER_748 VDDIO_Q ) ( FILLER_747 VDDIO_Q ) + ( FILLER_746 VDDIO_Q ) ( FILLER_535 VDDIO_Q ) + ( FILLER_745 VDDIO_Q ) ( FILLER_534 VDDIO_Q ) + ( FILLER_744 VDDIO_Q ) ( FILLER_533 VDDIO_Q ) + ( FILLER_532 VDDIO_Q ) ( FILLER_531 VDDIO_Q ) + ( FILLER_743 VDDIO_Q ) ( FILLER_741 VDDIO_Q ) + ( FILLER_742 VDDIO_Q ) ( FILLER_740 VDDIO_Q ) + ( FILLER_526 VDDIO_Q ) ( FILLER_529 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[0\] VDDIO_Q ) ( FILLER_528 VDDIO_Q ) + ( FILLER_527 VDDIO_Q ) ( FILLER_522 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[12\] VDDIO_Q ) ( FILLER_525 VDDIO_Q ) + ( FILLER_738 VDDIO_Q ) ( FILLER_524 VDDIO_Q ) + ( FILLER_737 VDDIO_Q ) ( FILLER_523 VDDIO_Q ) + ( FILLER_736 VDDIO_Q ) ( FILLER_735 VDDIO_Q ) + ( FILLER_734 VDDIO_Q ) ( FILLER_521 VDDIO_Q ) + ( FILLER_733 VDDIO_Q ) ( FILLER_732 VDDIO_Q ) + ( FILLER_516 VDDIO_Q ) ( FILLER_731 VDDIO_Q ) + ( FILLER_519 VDDIO_Q ) ( mprj_pads.area2_io_pad\[1\] VDDIO_Q ) + ( FILLER_518 VDDIO_Q ) ( FILLER_517 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[11\] VDDIO_Q ) ( FILLER_515 VDDIO_Q ) + ( FILLER_729 VDDIO_Q ) ( FILLER_728 VDDIO_Q ) + ( FILLER_514 VDDIO_Q ) ( FILLER_727 VDDIO_Q ) + ( FILLER_513 VDDIO_Q ) ( FILLER_512 VDDIO_Q ) + ( FILLER_511 VDDIO_Q ) ( FILLER_726 VDDIO_Q ) + ( FILLER_725 VDDIO_Q ) ( FILLER_722 VDDIO_Q ) + ( FILLER_724 VDDIO_Q ) ( FILLER_723 VDDIO_Q ) + ( FILLER_507 VDDIO_Q ) ( FILLER_509 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[2\] VDDIO_Q ) ( FILLER_508 VDDIO_Q ) + ( FILLER_718 VDDIO_Q ) ( FILLER_506 VDDIO_Q ) + ( FILLER_505 VDDIO_Q ) ( FILLER_719 VDDIO_Q ) + ( FILLER_720 VDDIO_Q ) ( mprj_pads.area1_io_pad\[10\] VDDIO_Q ) + ( FILLER_504 VDDIO_Q ) ( FILLER_503 VDDIO_Q ) + ( FILLER_501 VDDIO_Q ) ( FILLER_717 VDDIO_Q ) + ( FILLER_502 VDDIO_Q ) ( FILLER_715 VDDIO_Q ) + ( FILLER_716 VDDIO_Q ) ( FILLER_712 VDDIO_Q ) + ( FILLER_714 VDDIO_Q ) ( FILLER_713 VDDIO_Q ) + ( FILLER_497 VDDIO_Q ) ( FILLER_499 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[3\] VDDIO_Q ) ( FILLER_498 VDDIO_Q ) + ( FILLER_493 VDDIO_Q ) ( FILLER_496 VDDIO_Q ) + ( FILLER_495 VDDIO_Q ) ( FILLER_494 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[9\] VDDIO_Q ) ( FILLER_710 VDDIO_Q ) + ( FILLER_709 VDDIO_Q ) ( FILLER_491 VDDIO_Q ) + ( FILLER_492 VDDIO_Q ) ( FILLER_708 VDDIO_Q ) + ( FILLER_707 VDDIO_Q ) ( FILLER_703 VDDIO_Q ) + ( FILLER_706 VDDIO_Q ) ( FILLER_705 VDDIO_Q ) + ( FILLER_704 VDDIO_Q ) ( FILLER_489 VDDIO_Q ) + ( mprj_pads.area2_io_pad\[4\] VDDIO_Q ) ( FILLER_488 VDDIO_Q ) + ( FILLER_487 VDDIO_Q ) ( FILLER_483 VDDIO_Q ) + ( FILLER_486 VDDIO_Q ) ( FILLER_485 VDDIO_Q ) + ( FILLER_484 VDDIO_Q ) ( FILLER_701 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[8\] VDDIO_Q ) ( FILLER_700 VDDIO_Q ) + ( FILLER_699 VDDIO_Q ) ( FILLER_482 VDDIO_Q ) + ( FILLER_481 VDDIO_Q ) ( FILLER_698 VDDIO_Q ) + ( FILLER_697 VDDIO_Q ) ( FILLER_696 VDDIO_Q ) + ( FILLER_695 VDDIO_Q ) ( FILLER_694 VDDIO_Q ) + ( FILLER_477 VDDIO_Q ) ( FILLER_478 VDDIO_Q ) + ( FILLER_479 VDDIO_Q ) ( mprj_pads.area2_io_pad\[5\] VDDIO_Q ) + ( FILLER_693 VDDIO_Q ) ( FILLER_473 VDDIO_Q ) + ( FILLER_476 VDDIO_Q ) ( FILLER_475 VDDIO_Q ) + ( FILLER_474 VDDIO_Q ) ( FILLER_471 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[7\] VDDIO_Q ) ( FILLER_691 VDDIO_Q ) + ( FILLER_472 VDDIO_Q ) ( FILLER_690 VDDIO_Q ) + ( FILLER_689 VDDIO_Q ) ( FILLER_468 VDDIO_Q ) + ( FILLER_688 VDDIO_Q ) ( FILLER_687 VDDIO_Q ) + ( FILLER_686 VDDIO_Q ) ( mprj_pads.area2_io_pad\[6\] VDDIO_Q ) + ( FILLER_469 VDDIO_Q ) ( FILLER_685 VDDIO_Q ) + ( FILLER_684 VDDIO_Q ) ( FILLER_467 VDDIO_Q ) + ( FILLER_464 VDDIO_Q ) ( FILLER_466 VDDIO_Q ) + ( FILLER_465 VDDIO_Q ) ( user1_vdda_hvclamp_pad\[1\] VDDIO_Q ) + ( FILLER_463 VDDIO_Q ) ( FILLER_682 VDDIO_Q ) + ( FILLER_681 VDDIO_Q ) ( FILLER_462 VDDIO_Q ) + ( FILLER_461 VDDIO_Q ) ( FILLER_680 VDDIO_Q ) + ( FILLER_679 VDDIO_Q ) ( FILLER_678 VDDIO_Q ) + ( FILLER_677 VDDIO_Q ) ( FILLER_457 VDDIO_Q ) + ( FILLER_458 VDDIO_Q ) ( FILLER_459 VDDIO_Q ) + ( user2_vdda_hvclamp_pad VDDIO_Q ) ( FILLER_676 VDDIO_Q ) + ( FILLER_675 VDDIO_Q ) ( FILLER_454 VDDIO_Q ) + ( FILLER_456 VDDIO_Q ) ( FILLER_455 VDDIO_Q ) + ( FILLER_452 VDDIO_Q ) ( FILLER_453 VDDIO_Q ) + ( FILLER_673 VDDIO_Q ) ( user1_vssd_lvclamp_pad VDDIO_Q ) + ( FILLER_672 VDDIO_Q ) ( FILLER_451 VDDIO_Q ) + ( FILLER_668 VDDIO_Q ) ( FILLER_671 VDDIO_Q ) + ( FILLER_670 VDDIO_Q ) ( FILLER_669 VDDIO_Q ) + ( FILLER_448 VDDIO_Q ) ( FILLER_449 VDDIO_Q ) + ( user2_vssd_lvclamp_pad VDDIO_Q ) ( FILLER_667 VDDIO_Q ) + ( FILLER_665 VDDIO_Q ) ( FILLER_447 VDDIO_Q ) + ( FILLER_666 VDDIO_Q ) ( FILLER_446 VDDIO_Q ) + ( FILLER_444 VDDIO_Q ) ( FILLER_445 VDDIO_Q ) + ( user1_vssa_hvclamp_pad\[1\] VDDIO_Q ) ( FILLER_443 VDDIO_Q ) + ( FILLER_442 VDDIO_Q ) ( FILLER_663 VDDIO_Q ) + ( FILLER_441 VDDIO_Q ) ( FILLER_662 VDDIO_Q ) + ( FILLER_661 VDDIO_Q ) ( FILLER_660 VDDIO_Q ) + ( FILLER_659 VDDIO_Q ) ( FILLER_438 VDDIO_Q ) + ( FILLER_439 VDDIO_Q ) ( mprj_pads.area2_io_pad\[7\] VDDIO_Q ) + ( FILLER_658 VDDIO_Q ) ( FILLER_657 VDDIO_Q ) + ( FILLER_437 VDDIO_Q ) ( FILLER_656 VDDIO_Q ) + ( FILLER_436 VDDIO_Q ) ( FILLER_434 VDDIO_Q ) + ( FILLER_435 VDDIO_Q ) ( FILLER_654 VDDIO_Q ) + ( FILLER_433 VDDIO_Q ) ( FILLER_432 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[6\] VDDIO_Q ) ( FILLER_431 VDDIO_Q ) + ( FILLER_650 VDDIO_Q ) ( FILLER_653 VDDIO_Q ) + ( FILLER_652 VDDIO_Q ) ( FILLER_651 VDDIO_Q ) + ( FILLER_429 VDDIO_Q ) ( mprj_pads.area2_io_pad\[8\] VDDIO_Q ) + ( FILLER_649 VDDIO_Q ) ( FILLER_646 VDDIO_Q ) + ( FILLER_428 VDDIO_Q ) ( FILLER_427 VDDIO_Q ) + ( FILLER_648 VDDIO_Q ) ( FILLER_426 VDDIO_Q ) + ( FILLER_647 VDDIO_Q ) ( FILLER_425 VDDIO_Q ) + ( FILLER_424 VDDIO_Q ) ( FILLER_422 VDDIO_Q ) + ( FILLER_423 VDDIO_Q ) ( FILLER_421 VDDIO_Q ) + ( FILLER_641 VDDIO_Q ) ( mprj_pads.area1_io_pad\[5\] VDDIO_Q ) + ( FILLER_644 VDDIO_Q ) ( FILLER_643 VDDIO_Q ) + ( FILLER_642 VDDIO_Q ) ( FILLER_637 VDDIO_Q ) + ( FILLER_419 VDDIO_Q ) ( mprj_pads.area2_io_pad\[9\] VDDIO_Q ) + ( FILLER_418 VDDIO_Q ) ( FILLER_640 VDDIO_Q ) + ( FILLER_417 VDDIO_Q ) ( FILLER_639 VDDIO_Q ) + ( FILLER_416 VDDIO_Q ) ( FILLER_638 VDDIO_Q ) + ( FILLER_415 VDDIO_Q ) ( FILLER_414 VDDIO_Q ) + ( FILLER_412 VDDIO_Q ) ( FILLER_413 VDDIO_Q ) + ( FILLER_411 VDDIO_Q ) ( mprj_pads.area1_io_pad\[4\] VDDIO_Q ) + ( FILLER_635 VDDIO_Q ) ( FILLER_634 VDDIO_Q ) + ( FILLER_633 VDDIO_Q ) ( FILLER_632 VDDIO_Q ) + ( FILLER_409 VDDIO_Q ) ( mprj_pads.area2_io_pad\[10\] VDDIO_Q ) + ( FILLER_631 VDDIO_Q ) ( FILLER_408 VDDIO_Q ) + ( FILLER_407 VDDIO_Q ) ( FILLER_630 VDDIO_Q ) + ( FILLER_406 VDDIO_Q ) ( FILLER_405 VDDIO_Q ) + ( FILLER_629 VDDIO_Q ) ( FILLER_628 VDDIO_Q ) + ( FILLER_404 VDDIO_Q ) ( FILLER_402 VDDIO_Q ) + ( FILLER_403 VDDIO_Q ) ( FILLER_401 VDDIO_Q ) + ( FILLER_624 VDDIO_Q ) ( mprj_pads.area1_io_pad\[3\] VDDIO_Q ) + ( FILLER_625 VDDIO_Q ) ( FILLER_626 VDDIO_Q ) + ( FILLER_620 VDDIO_Q ) ( FILLER_623 VDDIO_Q ) + ( FILLER_399 VDDIO_Q ) ( mprj_pads.area2_io_pad\[11\] VDDIO_Q ) + ( FILLER_398 VDDIO_Q ) ( FILLER_622 VDDIO_Q ) + ( FILLER_397 VDDIO_Q ) ( FILLER_621 VDDIO_Q ) + ( FILLER_396 VDDIO_Q ) ( FILLER_395 VDDIO_Q ) + ( FILLER_618 VDDIO_Q ) ( FILLER_619 VDDIO_Q ) + ( FILLER_394 VDDIO_Q ) ( FILLER_392 VDDIO_Q ) + ( FILLER_393 VDDIO_Q ) ( FILLER_391 VDDIO_Q ) + ( FILLER_615 VDDIO_Q ) ( FILLER_616 VDDIO_Q ) + ( mprj_pads.area1_io_pad\[2\] VDDIO_Q ) ( FILLER_385 VDDIO_Q ) + ( FILLER_614 VDDIO_Q ) ( FILLER_388 VDDIO_Q ) + ( FILLER_389 VDDIO_Q ) ( mprj_pads.area2_io_pad\[12\] VDDIO_Q ) + ( FILLER_387 VDDIO_Q ) ( FILLER_613 VDDIO_Q ) + ( FILLER_386 VDDIO_Q ) ( FILLER_612 VDDIO_Q ) + ( FILLER_611 VDDIO_Q ) ( FILLER_384 VDDIO_Q ) + ( FILLER_383 VDDIO_Q ) ( FILLER_610 VDDIO_Q ) + ( FILLER_609 VDDIO_Q ) ( FILLER_382 VDDIO_Q ) + ( FILLER_381 VDDIO_Q ) ( FILLER_380 VDDIO_Q ) + ( FILLER_379 VDDIO_Q ) ( FILLER_606 VDDIO_Q ) + ( FILLER_607 VDDIO_Q ) ( mprj_pads.area1_io_pad\[1\] VDDIO_Q ) + ( FILLER_378 VDDIO_Q ) ( FILLER_377 VDDIO_Q ) + ( FILLER_605 VDDIO_Q ) ( FILLER_376 VDDIO_Q ) + ( FILLER_604 VDDIO_Q ) ( FILLER_375 VDDIO_Q ) + ( FILLER_603 VDDIO_Q ) ( FILLER_602 VDDIO_Q ) + ( FILLER_374 VDDIO_Q ) ( FILLER_SB2 VDDIO_Q ) + ( disconnect_vdda_2 VDDIO_Q ) ( FILLER_601 VDDIO_Q ) + ( FILLER_600 VDDIO_Q ) ( FILLER_367 VDDIO_Q ) + ( FILLER_599 VDDIO_Q ) ( FILLER_370 VDDIO_Q ) + ( mgmt_vddio_hvclamp_pad\[0\] VDDIO_Q ) ( FILLER_369 VDDIO_Q ) + ( FILLER_368 VDDIO_Q ) ( mprj_pads.area1_io_pad\[0\] VDDIO_Q ) + ( FILLER_597 VDDIO_Q ) ( FILLER_596 VDDIO_Q ) + ( FILLER_366 VDDIO_Q ) ( FILLER_595 VDDIO_Q ) + ( FILLER_365 VDDIO_Q ) ( FILLER_594 VDDIO_Q ) + ( FILLER_364 VDDIO_Q ) ( FILLER_363 VDDIO_Q ) + ( FILLER_593 VDDIO_Q ) ( FILLER_362 VDDIO_Q ) + ( FILLER_592 VDDIO_Q ) ( FILLER_591 VDDIO_Q ) + ( FILLER_590 VDDIO_Q ) ( FILLER_587 VDDIO_Q ) + ( FILLER_SB1 VDDIO_Q ) ( disconnect_vdda_1 VDDIO_Q ) + ( FILLER_586 VDDIO_Q ) ( FILLER_360 VDDIO_Q ) + ( mgmt_vccd_lvclamp_pad VDDIO_Q ) ( FILLER_359 VDDIO_Q ) + ( FILLER_358 VDDIO_Q ) ( FILLER_357 VDDIO_Q ) + ( FILLER_585 VDDIO_Q ) ( FILLER_584 VDDIO_Q ) + ( FILLER_356 VDDIO_Q ) ( FILLER_583 VDDIO_Q ) + ( FILLER_582 VDDIO_Q ) ( FILLER_355 VDDIO_Q ) + ( FILLER_581 VDDIO_Q ) ( FILLER_354 VDDIO_Q ) + ( FILLER_353 VDDIO_Q ) ( mgmt_corner\[1\] VDDIO_Q ) + ( FILLER_352 VDDIO_Q ) ( FILLER_580 VDDIO_Q ) + ( FILLER_351 VDDIO_Q ) ( FILLER_350 VDDIO_Q ) + ( FILLER_349 VDDIO_Q ) ( FILLER_348 VDDIO_Q ) + ( FILLER_347 VDDIO_Q ) ( FILLER_346 VDDIO_Q ) + ( bus_tie_72 VDDIO_Q ) ( bus_tie_71 VDDIO_Q ) + ( bus_tie_70 VDDIO_Q ) ( bus_tie_69 VDDIO_Q ) + ( bus_tie_68 VDDIO_Q ) ( FILLER_339 VDDIO_Q ) + ( bus_tie_67 VDDIO_Q ) ( FILLER_336 VDDIO_Q ) + ( FILLER_338 VDDIO_Q ) ( FILLER_337 VDDIO_Q ) + ( FILLER_335 VDDIO_Q ) ( FILLER_331 VDDIO_Q ) + ( FILLER_332 VDDIO_Q ) ( FILLER_333 VDDIO_Q ) + ( mgmt_vdda_hvclamp_pad VDDIO_Q ) ( FILLER_329 VDDIO_Q ) + ( FILLER_330 VDDIO_Q ) ( bus_tie_65 VDDIO_Q ) + ( bus_tie_66 VDDIO_Q ) ( FILLER_321 VDDIO_Q ) + ( bus_tie_64 VDDIO_Q ) ( bus_tie_63 VDDIO_Q ) + ( bus_tie_62 VDDIO_Q ) ( FILLER_322 VDDIO_Q ) + ( bus_tie_61 VDDIO_Q ) ( FILLER_318 VDDIO_Q ) + ( FILLER_320 VDDIO_Q ) ( FILLER_319 VDDIO_Q ) + ( FILLER_313 VDDIO_Q ) ( FILLER_315 VDDIO_Q ) + ( FILLER_316 VDDIO_Q ) ( mgmt_vssio_hvclamp_pad\[0\] VDDIO_Q ) + ( FILLER_314 VDDIO_Q ) ( FILLER_312 VDDIO_Q ) + ( bus_tie_58 VDDIO_Q ) ( bus_tie_60 VDDIO_Q ) + ( bus_tie_59 VDDIO_Q ) ( bus_tie_56 VDDIO_Q ) + ( bus_tie_57 VDDIO_Q ) ( FILLER_301 VDDIO_Q ) + ( FILLER_304 VDDIO_Q ) ( FILLER_305 VDDIO_Q ) + ( bus_tie_55 VDDIO_Q ) ( FILLER_303 VDDIO_Q ) + ( FILLER_302 VDDIO_Q ) ( FILLER_295 VDDIO_Q ) + ( FILLER_299 VDDIO_Q ) ( clock_pad VDDIO_Q ) + ( FILLER_297 VDDIO_Q ) ( FILLER_298 VDDIO_Q ) + ( FILLER_296 VDDIO_Q ) ( bus_tie_54 VDDIO_Q ) + ( bus_tie_53 VDDIO_Q ) ( bus_tie_52 VDDIO_Q ) + ( bus_tie_51 VDDIO_Q ) ( bus_tie_50 VDDIO_Q ) + ( FILLER_286 VDDIO_Q ) ( FILLER_287 VDDIO_Q ) + ( FILLER_288 VDDIO_Q ) ( bus_tie_49 VDDIO_Q ) + ( FILLER_285 VDDIO_Q ) ( FILLER_284 VDDIO_Q ) + ( FILLER_279 VDDIO_Q ) ( flash_io1_pad VDDIO_Q ) + ( FILLER_280 VDDIO_Q ) ( FILLER_281 VDDIO_Q ) + ( FILLER_282 VDDIO_Q ) ( FILLER_278 VDDIO_Q ) + ( bus_tie_46 VDDIO_Q ) ( bus_tie_48 VDDIO_Q ) + ( bus_tie_47 VDDIO_Q ) ( FILLER_268 VDDIO_Q ) + ( bus_tie_45 VDDIO_Q ) ( bus_tie_44 VDDIO_Q ) + ( FILLER_270 VDDIO_Q ) ( FILLER_271 VDDIO_Q ) + ( bus_tie_43 VDDIO_Q ) ( FILLER_269 VDDIO_Q ) + ( FILLER_267 VDDIO_Q ) ( FILLER_261 VDDIO_Q ) + ( FILLER_264 VDDIO_Q ) ( FILLER_265 VDDIO_Q ) + ( flash_io0_pad VDDIO_Q ) ( FILLER_263 VDDIO_Q ) + ( FILLER_262 VDDIO_Q ) ( bus_tie_39 VDDIO_Q ) + ( bus_tie_42 VDDIO_Q ) ( bus_tie_41 VDDIO_Q ) + ( bus_tie_40 VDDIO_Q ) ( FILLER_251 VDDIO_Q ) + ( bus_tie_38 VDDIO_Q ) ( FILLER_253 VDDIO_Q ) + ( FILLER_254 VDDIO_Q ) ( bus_tie_37 VDDIO_Q ) + ( FILLER_252 VDDIO_Q ) ( FILLER_250 VDDIO_Q ) + ( FILLER_244 VDDIO_Q ) ( FILLER_247 VDDIO_Q ) + ( FILLER_248 VDDIO_Q ) ( flash_clk_pad VDDIO_Q ) + ( FILLER_246 VDDIO_Q ) ( FILLER_245 VDDIO_Q ) + ( bus_tie_36 VDDIO_Q ) ( bus_tie_35 VDDIO_Q ) + ( bus_tie_34 VDDIO_Q ) ( bus_tie_33 VDDIO_Q ) + ( bus_tie_32 VDDIO_Q ) ( FILLER_235 VDDIO_Q ) + ( FILLER_236 VDDIO_Q ) ( FILLER_237 VDDIO_Q ) + ( bus_tie_31 VDDIO_Q ) ( FILLER_234 VDDIO_Q ) + ( FILLER_233 VDDIO_Q ) ( FILLER_227 VDDIO_Q ) + ( FILLER_230 VDDIO_Q ) ( FILLER_231 VDDIO_Q ) + ( flash_csb_pad VDDIO_Q ) ( FILLER_229 VDDIO_Q ) + ( FILLER_228 VDDIO_Q ) ( bus_tie_27 VDDIO_Q ) + ( bus_tie_30 VDDIO_Q ) ( bus_tie_29 VDDIO_Q ) + ( bus_tie_28 VDDIO_Q ) ( FILLER_216 VDDIO_Q ) + ( bus_tie_26 VDDIO_Q ) ( FILLER_220 VDDIO_Q ) + ( bus_tie_25 VDDIO_Q ) ( FILLER_218 VDDIO_Q ) + ( FILLER_219 VDDIO_Q ) ( FILLER_217 VDDIO_Q ) + ( FILLER_210 VDDIO_Q ) ( FILLER_214 VDDIO_Q ) + ( mgmt_vssd_lvclamp_pad VDDIO_Q ) ( FILLER_212 VDDIO_Q ) + ( FILLER_213 VDDIO_Q ) ( FILLER_211 VDDIO_Q ) + ( bus_tie_24 VDDIO_Q ) ( bus_tie_20 VDDIO_Q ) + ( bus_tie_23 VDDIO_Q ) ( bus_tie_22 VDDIO_Q ) + ( bus_tie_21 VDDIO_Q ) ( FILLER_199 VDDIO_Q ) + ( FILLER_202 VDDIO_Q ) ( FILLER_203 VDDIO_Q ) + ( bus_tie_19 VDDIO_Q ) ( FILLER_201 VDDIO_Q ) + ( FILLER_200 VDDIO_Q ) ( FILLER_195 VDDIO_Q ) + ( bus_tie_9 VDDIO_Q ) ( FILLER_196 VDDIO_Q ) + ( FILLER_197 VDDIO_Q ) ( FILLER_193 VDDIO_Q ) + ( FILLER_194 VDDIO_Q ) ( bus_tie_17 VDDIO_Q ) + ( bus_tie_18 VDDIO_Q ) ( bus_tie_14 VDDIO_Q ) + ( bus_tie_16 VDDIO_Q ) ( bus_tie_15 VDDIO_Q ) + ( FILLER_182 VDDIO_Q ) ( FILLER_185 VDDIO_Q ) + ( FILLER_186 VDDIO_Q ) ( bus_tie_13 VDDIO_Q ) + ( FILLER_184 VDDIO_Q ) ( FILLER_183 VDDIO_Q ) + ( FILLER_177 VDDIO_Q ) ( FILLER_179 VDDIO_Q ) + ( FILLER_180 VDDIO_Q ) ( resetb_pad VDDIO_Q ) + ( FILLER_178 VDDIO_Q ) ( FILLER_176 VDDIO_Q ) + ( bus_tie_12 VDDIO_Q ) ( bus_tie_11 VDDIO_Q ) + ( bus_tie_10 VDDIO_Q ) ( bus_tie_8 VDDIO_Q ) + ( bus_tie_7 VDDIO_Q ) ( FILLER_168 VDDIO_Q ) + ( FILLER_169 VDDIO_Q ) ( bus_tie_6 VDDIO_Q ) + ( FILLER_166 VDDIO_Q ) ( FILLER_167 VDDIO_Q ) + ( FILLER_165 VDDIO_Q ) ( FILLER_160 VDDIO_Q ) + ( FILLER_163 VDDIO_Q ) ( mgmt_vssa_hvclamp_pad VDDIO_Q ) + ( FILLER_161 VDDIO_Q ) ( FILLER_162 VDDIO_Q ) + ( FILLER_159 VDDIO_Q ) ( bus_tie_4 VDDIO_Q ) + ( bus_tie_5 VDDIO_Q ) ( bus_tie_3 VDDIO_Q ) + ( FILLER_149 VDDIO_Q ) ( bus_tie_2 VDDIO_Q ) + ( bus_tie_1 VDDIO_Q ) ( FILLER_151 VDDIO_Q ) + ( FILLER_152 VDDIO_Q ) ( FILLER_150 VDDIO_Q ) + ( FILLER_148 VDDIO_Q ) ( mgmt_corner\[0\] VDDIO_Q ) ; + - gpio_pad/VSSIO_Q ( gpio_pad VSSIO_Q ) ( FILLER_145 VSSIO_Q ) + ( FILLER_146 VSSIO_Q ) ( FILLER_147 VSSIO_Q ) + ( FILLER_144 VSSIO_Q ) ( FILLER_143 VSSIO_Q ) + ( FILLER_142 VSSIO_Q ) ( FILLER_141 VSSIO_Q ) + ( FILLER_140 VSSIO_Q ) ( FILLER_139 VSSIO_Q ) + ( FILLER_138 VSSIO_Q ) ( FILLER_137 VSSIO_Q ) + ( FILLER_136 VSSIO_Q ) ( FILLER_135 VSSIO_Q ) + ( FILLER_131 VSSIO_Q ) ( FILLER_132 VSSIO_Q ) + ( FILLER_133 VSSIO_Q ) ( user1_analog_pad\[0\] VSSIO_Q ) + ( FILLER_127 VSSIO_Q ) ( FILLER_130 VSSIO_Q ) + ( FILLER_129 VSSIO_Q ) ( FILLER_128 VSSIO_Q ) + ( FILLER_124 VSSIO_Q ) ( FILLER_126 VSSIO_Q ) + ( FILLER_125 VSSIO_Q ) ( FILLER_123 VSSIO_Q ) + ( FILLER_116 VSSIO_Q ) ( user1_vssa_hvclamp_pad\[0\] VSSIO_Q ) + ( FILLER_119 VSSIO_Q ) ( FILLER_120 VSSIO_Q ) + ( FILLER_121 VSSIO_Q ) ( FILLER_118 VSSIO_Q ) + ( FILLER_117 VSSIO_Q ) ( FILLER_113 VSSIO_Q ) + ( FILLER_115 VSSIO_Q ) ( FILLER_114 VSSIO_Q ) + ( FILLER_110 VSSIO_Q ) ( FILLER_112 VSSIO_Q ) + ( FILLER_111 VSSIO_Q ) ( FILLER_107 VSSIO_Q ) + ( user1_analog_pad\[1\] VSSIO_Q ) ( FILLER_108 VSSIO_Q ) + ( FILLER_103 VSSIO_Q ) ( FILLER_106 VSSIO_Q ) + ( FILLER_105 VSSIO_Q ) ( FILLER_104 VSSIO_Q ) + ( FILLER_100 VSSIO_Q ) ( FILLER_102 VSSIO_Q ) + ( FILLER_101 VSSIO_Q ) ( FILLER_98 VSSIO_Q ) + ( FILLER_99 VSSIO_Q ) ( FILLER_91 VSSIO_Q ) + ( FILLER_95 VSSIO_Q ) ( FILLER_96 VSSIO_Q ) + ( user1_analog_pad\[2\] VSSIO_Q ) ( FILLER_93 VSSIO_Q ) + ( FILLER_94 VSSIO_Q ) ( FILLER_92 VSSIO_Q ) + ( FILLER_90 VSSIO_Q ) ( FILLER_89 VSSIO_Q ) + ( FILLER_88 VSSIO_Q ) ( FILLER_87 VSSIO_Q ) + ( FILLER_86 VSSIO_Q ) ( FILLER_85 VSSIO_Q ) + ( FILLER_84 VSSIO_Q ) ( FILLER_83 VSSIO_Q ) + ( FILLER_82 VSSIO_Q ) ( FILLER_81 VSSIO_Q ) + ( FILLER_80 VSSIO_Q ) ( FILLER_79 VSSIO_Q ) + ( sky130_ef_io__com_bus_slice_10um_0 VSSIO_Q ) + ( FILLER_78 VSSIO_Q ) + ( sky130_ef_io__com_bus_slice_5um_1 VSSIO_Q ) + ( user1_analog_pad_with_clamp VSSIO_Q ) ( FILLER_SB3 VSSIO_Q ) + ( sky130_ef_io__com_bus_slice_5um_0 VSSIO_Q ) + ( FILLER_71 VSSIO_Q ) ( disconnect_vdda_0 VSSIO_Q ) + ( FILLER_73 VSSIO_Q ) ( FILLER_72 VSSIO_Q ) + ( FILLER_68 VSSIO_Q ) ( FILLER_70 VSSIO_Q ) + ( FILLER_69 VSSIO_Q ) ( FILLER_64 VSSIO_Q ) + ( mgmt_vssio_hvclamp_pad\[1\] VSSIO_Q ) ( FILLER_66 VSSIO_Q ) + ( FILLER_65 VSSIO_Q ) ( FILLER_60 VSSIO_Q ) + ( FILLER_63 VSSIO_Q ) ( FILLER_62 VSSIO_Q ) + ( FILLER_61 VSSIO_Q ) + ( sky130_ef_io__com_bus_slice_5um_3 VSSIO_Q ) + ( sky130_ef_io__com_bus_slice_10um_1 VSSIO_Q ) + ( user2_analog_pad_with_clamp\[0\] VSSIO_Q ) + ( sky130_ef_io__com_bus_slice_5um_2 VSSIO_Q ) + ( FILLER_57 VSSIO_Q ) ( FILLER_56 VSSIO_Q ) + ( FILLER_55 VSSIO_Q ) ( FILLER_54 VSSIO_Q ) + ( FILLER_53 VSSIO_Q ) ( FILLER_52 VSSIO_Q ) + ( FILLER_51 VSSIO_Q ) ( FILLER_50 VSSIO_Q ) + ( FILLER_49 VSSIO_Q ) + ( user2_analog_pad_with_clamp\[1\] VSSIO_Q ) + ( FILLER_47 VSSIO_Q ) ( FILLER_46 VSSIO_Q ) + ( FILLER_45 VSSIO_Q ) ( FILLER_44 VSSIO_Q ) + ( FILLER_43 VSSIO_Q ) ( FILLER_42 VSSIO_Q ) + ( user2_analog_pad\[0\] VSSIO_Q ) ( FILLER_41 VSSIO_Q ) + ( FILLER_39 VSSIO_Q ) ( FILLER_38 VSSIO_Q ) + ( FILLER_37 VSSIO_Q ) ( FILLER_36 VSSIO_Q ) + ( FILLER_33 VSSIO_Q ) ( FILLER_35 VSSIO_Q ) + ( FILLER_34 VSSIO_Q ) ( FILLER_29 VSSIO_Q ) + ( FILLER_32 VSSIO_Q ) ( FILLER_31 VSSIO_Q ) + ( FILLER_30 VSSIO_Q ) ( FILLER_26 VSSIO_Q ) + ( FILLER_27 VSSIO_Q ) ( user2_analog_pad\[1\] VSSIO_Q ) + ( FILLER_25 VSSIO_Q ) ( FILLER_24 VSSIO_Q ) + ( FILLER_23 VSSIO_Q ) ( FILLER_22 VSSIO_Q ) + ( FILLER_21 VSSIO_Q ) ( FILLER_20 VSSIO_Q ) + ( FILLER_19 VSSIO_Q ) ( FILLER_18 VSSIO_Q ) + ( FILLER_17 VSSIO_Q ) ( FILLER_13 VSSIO_Q ) + ( user2_analog_pad\[2\] VSSIO_Q ) ( FILLER_14 VSSIO_Q ) + ( FILLER_15 VSSIO_Q ) ( FILLER_10 VSSIO_Q ) + ( FILLER_12 VSSIO_Q ) ( FILLER_11 VSSIO_Q ) + ( FILLER_6 VSSIO_Q ) ( FILLER_9 VSSIO_Q ) ( FILLER_8 VSSIO_Q ) + ( FILLER_7 VSSIO_Q ) ( FILLER_5 VSSIO_Q ) + ( user2_corner VSSIO_Q ) ( user1_corner VSSIO_Q ) + ( FILLER_578 VSSIO_Q ) ( FILLER_579 VSSIO_Q ) + ( FILLER_576 VSSIO_Q ) ( FILLER_786 VSSIO_Q ) + ( FILLER_577 VSSIO_Q ) ( FILLER_785 VSSIO_Q ) + ( FILLER_571 VSSIO_Q ) ( FILLER_575 VSSIO_Q ) + ( FILLER_784 VSSIO_Q ) ( FILLER_574 VSSIO_Q ) + ( FILLER_783 VSSIO_Q ) ( FILLER_573 VSSIO_Q ) + ( FILLER_782 VSSIO_Q ) ( FILLER_572 VSSIO_Q ) + ( FILLER_781 VSSIO_Q ) ( FILLER_780 VSSIO_Q ) + ( FILLER_779 VSSIO_Q ) ( FILLER_570 VSSIO_Q ) + ( user2_analog_pad\[3\] VSSIO_Q ) ( FILLER_776 VSSIO_Q ) + ( FILLER_568 VSSIO_Q ) ( user1_analog_pad\[3\] VSSIO_Q ) + ( FILLER_567 VSSIO_Q ) ( FILLER_777 VSSIO_Q ) + ( FILLER_775 VSSIO_Q ) ( FILLER_566 VSSIO_Q ) + ( FILLER_774 VSSIO_Q ) ( FILLER_565 VSSIO_Q ) + ( FILLER_773 VSSIO_Q ) ( FILLER_564 VSSIO_Q ) + ( FILLER_772 VSSIO_Q ) ( FILLER_563 VSSIO_Q ) + ( FILLER_771 VSSIO_Q ) ( FILLER_562 VSSIO_Q ) + ( FILLER_561 VSSIO_Q ) ( FILLER_769 VSSIO_Q ) + ( FILLER_770 VSSIO_Q ) ( FILLER_766 VSSIO_Q ) + ( FILLER_559 VSSIO_Q ) ( user2_vccd_lvclamp_pad VSSIO_Q ) + ( FILLER_558 VSSIO_Q ) ( FILLER_557 VSSIO_Q ) + ( FILLER_767 VSSIO_Q ) ( user1_vccd_lvclamp_pad VSSIO_Q ) + ( FILLER_556 VSSIO_Q ) ( FILLER_552 VSSIO_Q ) + ( FILLER_765 VSSIO_Q ) ( FILLER_555 VSSIO_Q ) + ( FILLER_764 VSSIO_Q ) ( FILLER_554 VSSIO_Q ) + ( FILLER_763 VSSIO_Q ) ( FILLER_553 VSSIO_Q ) + ( FILLER_762 VSSIO_Q ) ( FILLER_761 VSSIO_Q ) + ( FILLER_551 VSSIO_Q ) ( FILLER_760 VSSIO_Q ) + ( FILLER_546 VSSIO_Q ) ( FILLER_759 VSSIO_Q ) + ( FILLER_549 VSSIO_Q ) ( mgmt_vddio_hvclamp_pad\[1\] VSSIO_Q ) + ( FILLER_548 VSSIO_Q ) ( FILLER_547 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[13\] VSSIO_Q ) ( FILLER_757 VSSIO_Q ) + ( FILLER_756 VSSIO_Q ) ( FILLER_545 VSSIO_Q ) + ( FILLER_755 VSSIO_Q ) ( FILLER_544 VSSIO_Q ) + ( FILLER_754 VSSIO_Q ) ( FILLER_543 VSSIO_Q ) + ( FILLER_542 VSSIO_Q ) ( FILLER_753 VSSIO_Q ) + ( FILLER_541 VSSIO_Q ) ( FILLER_752 VSSIO_Q ) + ( FILLER_751 VSSIO_Q ) ( FILLER_536 VSSIO_Q ) + ( FILLER_750 VSSIO_Q ) ( user2_vssa_hvclamp_pad VSSIO_Q ) + ( FILLER_538 VSSIO_Q ) ( FILLER_539 VSSIO_Q ) + ( FILLER_537 VSSIO_Q ) ( user1_vdda_hvclamp_pad\[0\] VSSIO_Q ) + ( FILLER_748 VSSIO_Q ) ( FILLER_747 VSSIO_Q ) + ( FILLER_746 VSSIO_Q ) ( FILLER_535 VSSIO_Q ) + ( FILLER_745 VSSIO_Q ) ( FILLER_534 VSSIO_Q ) + ( FILLER_744 VSSIO_Q ) ( FILLER_533 VSSIO_Q ) + ( FILLER_532 VSSIO_Q ) ( FILLER_531 VSSIO_Q ) + ( FILLER_743 VSSIO_Q ) ( FILLER_741 VSSIO_Q ) + ( FILLER_742 VSSIO_Q ) ( FILLER_740 VSSIO_Q ) + ( FILLER_526 VSSIO_Q ) ( FILLER_529 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[0\] VSSIO_Q ) ( FILLER_528 VSSIO_Q ) + ( FILLER_527 VSSIO_Q ) ( FILLER_522 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[12\] VSSIO_Q ) ( FILLER_525 VSSIO_Q ) + ( FILLER_738 VSSIO_Q ) ( FILLER_524 VSSIO_Q ) + ( FILLER_737 VSSIO_Q ) ( FILLER_523 VSSIO_Q ) + ( FILLER_736 VSSIO_Q ) ( FILLER_735 VSSIO_Q ) + ( FILLER_734 VSSIO_Q ) ( FILLER_521 VSSIO_Q ) + ( FILLER_733 VSSIO_Q ) ( FILLER_732 VSSIO_Q ) + ( FILLER_516 VSSIO_Q ) ( FILLER_731 VSSIO_Q ) + ( FILLER_519 VSSIO_Q ) ( mprj_pads.area2_io_pad\[1\] VSSIO_Q ) + ( FILLER_518 VSSIO_Q ) ( FILLER_517 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[11\] VSSIO_Q ) ( FILLER_515 VSSIO_Q ) + ( FILLER_729 VSSIO_Q ) ( FILLER_728 VSSIO_Q ) + ( FILLER_514 VSSIO_Q ) ( FILLER_727 VSSIO_Q ) + ( FILLER_513 VSSIO_Q ) ( FILLER_512 VSSIO_Q ) + ( FILLER_511 VSSIO_Q ) ( FILLER_726 VSSIO_Q ) + ( FILLER_725 VSSIO_Q ) ( FILLER_722 VSSIO_Q ) + ( FILLER_724 VSSIO_Q ) ( FILLER_723 VSSIO_Q ) + ( FILLER_507 VSSIO_Q ) ( FILLER_509 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[2\] VSSIO_Q ) ( FILLER_508 VSSIO_Q ) + ( FILLER_718 VSSIO_Q ) ( FILLER_506 VSSIO_Q ) + ( FILLER_505 VSSIO_Q ) ( FILLER_719 VSSIO_Q ) + ( FILLER_720 VSSIO_Q ) ( mprj_pads.area1_io_pad\[10\] VSSIO_Q ) + ( FILLER_504 VSSIO_Q ) ( FILLER_503 VSSIO_Q ) + ( FILLER_501 VSSIO_Q ) ( FILLER_717 VSSIO_Q ) + ( FILLER_502 VSSIO_Q ) ( FILLER_715 VSSIO_Q ) + ( FILLER_716 VSSIO_Q ) ( FILLER_712 VSSIO_Q ) + ( FILLER_714 VSSIO_Q ) ( FILLER_713 VSSIO_Q ) + ( FILLER_497 VSSIO_Q ) ( FILLER_499 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[3\] VSSIO_Q ) ( FILLER_498 VSSIO_Q ) + ( FILLER_493 VSSIO_Q ) ( FILLER_496 VSSIO_Q ) + ( FILLER_495 VSSIO_Q ) ( FILLER_494 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[9\] VSSIO_Q ) ( FILLER_710 VSSIO_Q ) + ( FILLER_709 VSSIO_Q ) ( FILLER_491 VSSIO_Q ) + ( FILLER_492 VSSIO_Q ) ( FILLER_708 VSSIO_Q ) + ( FILLER_707 VSSIO_Q ) ( FILLER_703 VSSIO_Q ) + ( FILLER_706 VSSIO_Q ) ( FILLER_705 VSSIO_Q ) + ( FILLER_704 VSSIO_Q ) ( FILLER_489 VSSIO_Q ) + ( mprj_pads.area2_io_pad\[4\] VSSIO_Q ) ( FILLER_488 VSSIO_Q ) + ( FILLER_487 VSSIO_Q ) ( FILLER_483 VSSIO_Q ) + ( FILLER_486 VSSIO_Q ) ( FILLER_485 VSSIO_Q ) + ( FILLER_484 VSSIO_Q ) ( FILLER_701 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[8\] VSSIO_Q ) ( FILLER_700 VSSIO_Q ) + ( FILLER_699 VSSIO_Q ) ( FILLER_482 VSSIO_Q ) + ( FILLER_481 VSSIO_Q ) ( FILLER_698 VSSIO_Q ) + ( FILLER_697 VSSIO_Q ) ( FILLER_696 VSSIO_Q ) + ( FILLER_695 VSSIO_Q ) ( FILLER_694 VSSIO_Q ) + ( FILLER_477 VSSIO_Q ) ( FILLER_478 VSSIO_Q ) + ( FILLER_479 VSSIO_Q ) ( mprj_pads.area2_io_pad\[5\] VSSIO_Q ) + ( FILLER_693 VSSIO_Q ) ( FILLER_473 VSSIO_Q ) + ( FILLER_476 VSSIO_Q ) ( FILLER_475 VSSIO_Q ) + ( FILLER_474 VSSIO_Q ) ( FILLER_471 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[7\] VSSIO_Q ) ( FILLER_691 VSSIO_Q ) + ( FILLER_472 VSSIO_Q ) ( FILLER_690 VSSIO_Q ) + ( FILLER_689 VSSIO_Q ) ( FILLER_468 VSSIO_Q ) + ( FILLER_688 VSSIO_Q ) ( FILLER_687 VSSIO_Q ) + ( FILLER_686 VSSIO_Q ) ( mprj_pads.area2_io_pad\[6\] VSSIO_Q ) + ( FILLER_469 VSSIO_Q ) ( FILLER_685 VSSIO_Q ) + ( FILLER_684 VSSIO_Q ) ( FILLER_467 VSSIO_Q ) + ( FILLER_464 VSSIO_Q ) ( FILLER_466 VSSIO_Q ) + ( FILLER_465 VSSIO_Q ) ( user1_vdda_hvclamp_pad\[1\] VSSIO_Q ) + ( FILLER_463 VSSIO_Q ) ( FILLER_682 VSSIO_Q ) + ( FILLER_681 VSSIO_Q ) ( FILLER_462 VSSIO_Q ) + ( FILLER_461 VSSIO_Q ) ( FILLER_680 VSSIO_Q ) + ( FILLER_679 VSSIO_Q ) ( FILLER_678 VSSIO_Q ) + ( FILLER_677 VSSIO_Q ) ( FILLER_457 VSSIO_Q ) + ( FILLER_458 VSSIO_Q ) ( FILLER_459 VSSIO_Q ) + ( user2_vdda_hvclamp_pad VSSIO_Q ) ( FILLER_676 VSSIO_Q ) + ( FILLER_675 VSSIO_Q ) ( FILLER_454 VSSIO_Q ) + ( FILLER_456 VSSIO_Q ) ( FILLER_455 VSSIO_Q ) + ( FILLER_452 VSSIO_Q ) ( FILLER_453 VSSIO_Q ) + ( FILLER_673 VSSIO_Q ) ( user1_vssd_lvclamp_pad VSSIO_Q ) + ( FILLER_672 VSSIO_Q ) ( FILLER_451 VSSIO_Q ) + ( FILLER_668 VSSIO_Q ) ( FILLER_671 VSSIO_Q ) + ( FILLER_670 VSSIO_Q ) ( FILLER_669 VSSIO_Q ) + ( FILLER_448 VSSIO_Q ) ( FILLER_449 VSSIO_Q ) + ( user2_vssd_lvclamp_pad VSSIO_Q ) ( FILLER_667 VSSIO_Q ) + ( FILLER_665 VSSIO_Q ) ( FILLER_447 VSSIO_Q ) + ( FILLER_666 VSSIO_Q ) ( FILLER_446 VSSIO_Q ) + ( FILLER_444 VSSIO_Q ) ( FILLER_445 VSSIO_Q ) + ( user1_vssa_hvclamp_pad\[1\] VSSIO_Q ) ( FILLER_443 VSSIO_Q ) + ( FILLER_442 VSSIO_Q ) ( FILLER_663 VSSIO_Q ) + ( FILLER_441 VSSIO_Q ) ( FILLER_662 VSSIO_Q ) + ( FILLER_661 VSSIO_Q ) ( FILLER_660 VSSIO_Q ) + ( FILLER_659 VSSIO_Q ) ( FILLER_438 VSSIO_Q ) + ( FILLER_439 VSSIO_Q ) ( mprj_pads.area2_io_pad\[7\] VSSIO_Q ) + ( FILLER_658 VSSIO_Q ) ( FILLER_657 VSSIO_Q ) + ( FILLER_437 VSSIO_Q ) ( FILLER_656 VSSIO_Q ) + ( FILLER_436 VSSIO_Q ) ( FILLER_434 VSSIO_Q ) + ( FILLER_435 VSSIO_Q ) ( FILLER_654 VSSIO_Q ) + ( FILLER_433 VSSIO_Q ) ( FILLER_432 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[6\] VSSIO_Q ) ( FILLER_431 VSSIO_Q ) + ( FILLER_650 VSSIO_Q ) ( FILLER_653 VSSIO_Q ) + ( FILLER_652 VSSIO_Q ) ( FILLER_651 VSSIO_Q ) + ( FILLER_429 VSSIO_Q ) ( mprj_pads.area2_io_pad\[8\] VSSIO_Q ) + ( FILLER_649 VSSIO_Q ) ( FILLER_646 VSSIO_Q ) + ( FILLER_428 VSSIO_Q ) ( FILLER_427 VSSIO_Q ) + ( FILLER_648 VSSIO_Q ) ( FILLER_426 VSSIO_Q ) + ( FILLER_647 VSSIO_Q ) ( FILLER_425 VSSIO_Q ) + ( FILLER_424 VSSIO_Q ) ( FILLER_422 VSSIO_Q ) + ( FILLER_423 VSSIO_Q ) ( FILLER_421 VSSIO_Q ) + ( FILLER_641 VSSIO_Q ) ( mprj_pads.area1_io_pad\[5\] VSSIO_Q ) + ( FILLER_644 VSSIO_Q ) ( FILLER_643 VSSIO_Q ) + ( FILLER_642 VSSIO_Q ) ( FILLER_637 VSSIO_Q ) + ( FILLER_419 VSSIO_Q ) ( mprj_pads.area2_io_pad\[9\] VSSIO_Q ) + ( FILLER_418 VSSIO_Q ) ( FILLER_640 VSSIO_Q ) + ( FILLER_417 VSSIO_Q ) ( FILLER_639 VSSIO_Q ) + ( FILLER_416 VSSIO_Q ) ( FILLER_638 VSSIO_Q ) + ( FILLER_415 VSSIO_Q ) ( FILLER_414 VSSIO_Q ) + ( FILLER_412 VSSIO_Q ) ( FILLER_413 VSSIO_Q ) + ( FILLER_411 VSSIO_Q ) ( mprj_pads.area1_io_pad\[4\] VSSIO_Q ) + ( FILLER_635 VSSIO_Q ) ( FILLER_634 VSSIO_Q ) + ( FILLER_633 VSSIO_Q ) ( FILLER_632 VSSIO_Q ) + ( FILLER_409 VSSIO_Q ) ( mprj_pads.area2_io_pad\[10\] VSSIO_Q ) + ( FILLER_631 VSSIO_Q ) ( FILLER_408 VSSIO_Q ) + ( FILLER_407 VSSIO_Q ) ( FILLER_630 VSSIO_Q ) + ( FILLER_406 VSSIO_Q ) ( FILLER_405 VSSIO_Q ) + ( FILLER_629 VSSIO_Q ) ( FILLER_628 VSSIO_Q ) + ( FILLER_404 VSSIO_Q ) ( FILLER_402 VSSIO_Q ) + ( FILLER_403 VSSIO_Q ) ( FILLER_401 VSSIO_Q ) + ( FILLER_624 VSSIO_Q ) ( mprj_pads.area1_io_pad\[3\] VSSIO_Q ) + ( FILLER_625 VSSIO_Q ) ( FILLER_626 VSSIO_Q ) + ( FILLER_620 VSSIO_Q ) ( FILLER_623 VSSIO_Q ) + ( FILLER_399 VSSIO_Q ) ( mprj_pads.area2_io_pad\[11\] VSSIO_Q ) + ( FILLER_398 VSSIO_Q ) ( FILLER_622 VSSIO_Q ) + ( FILLER_397 VSSIO_Q ) ( FILLER_621 VSSIO_Q ) + ( FILLER_396 VSSIO_Q ) ( FILLER_395 VSSIO_Q ) + ( FILLER_618 VSSIO_Q ) ( FILLER_619 VSSIO_Q ) + ( FILLER_394 VSSIO_Q ) ( FILLER_392 VSSIO_Q ) + ( FILLER_393 VSSIO_Q ) ( FILLER_391 VSSIO_Q ) + ( FILLER_615 VSSIO_Q ) ( FILLER_616 VSSIO_Q ) + ( mprj_pads.area1_io_pad\[2\] VSSIO_Q ) ( FILLER_385 VSSIO_Q ) + ( FILLER_614 VSSIO_Q ) ( FILLER_388 VSSIO_Q ) + ( FILLER_389 VSSIO_Q ) ( mprj_pads.area2_io_pad\[12\] VSSIO_Q ) + ( FILLER_387 VSSIO_Q ) ( FILLER_613 VSSIO_Q ) + ( FILLER_386 VSSIO_Q ) ( FILLER_612 VSSIO_Q ) + ( FILLER_611 VSSIO_Q ) ( FILLER_384 VSSIO_Q ) + ( FILLER_383 VSSIO_Q ) ( FILLER_610 VSSIO_Q ) + ( FILLER_609 VSSIO_Q ) ( FILLER_382 VSSIO_Q ) + ( FILLER_381 VSSIO_Q ) ( FILLER_380 VSSIO_Q ) + ( FILLER_379 VSSIO_Q ) ( FILLER_606 VSSIO_Q ) + ( FILLER_607 VSSIO_Q ) ( mprj_pads.area1_io_pad\[1\] VSSIO_Q ) + ( FILLER_378 VSSIO_Q ) ( FILLER_377 VSSIO_Q ) + ( FILLER_605 VSSIO_Q ) ( FILLER_376 VSSIO_Q ) + ( FILLER_604 VSSIO_Q ) ( FILLER_375 VSSIO_Q ) + ( FILLER_603 VSSIO_Q ) ( FILLER_602 VSSIO_Q ) + ( FILLER_374 VSSIO_Q ) ( FILLER_SB2 VSSIO_Q ) + ( disconnect_vdda_2 VSSIO_Q ) ( FILLER_601 VSSIO_Q ) + ( FILLER_600 VSSIO_Q ) ( FILLER_367 VSSIO_Q ) + ( FILLER_599 VSSIO_Q ) ( FILLER_370 VSSIO_Q ) + ( mgmt_vddio_hvclamp_pad\[0\] VSSIO_Q ) ( FILLER_369 VSSIO_Q ) + ( FILLER_368 VSSIO_Q ) ( mprj_pads.area1_io_pad\[0\] VSSIO_Q ) + ( FILLER_597 VSSIO_Q ) ( FILLER_596 VSSIO_Q ) + ( FILLER_366 VSSIO_Q ) ( FILLER_595 VSSIO_Q ) + ( FILLER_365 VSSIO_Q ) ( FILLER_594 VSSIO_Q ) + ( FILLER_364 VSSIO_Q ) ( FILLER_363 VSSIO_Q ) + ( FILLER_593 VSSIO_Q ) ( FILLER_362 VSSIO_Q ) + ( FILLER_592 VSSIO_Q ) ( FILLER_591 VSSIO_Q ) + ( FILLER_590 VSSIO_Q ) ( FILLER_587 VSSIO_Q ) + ( FILLER_SB1 VSSIO_Q ) ( disconnect_vdda_1 VSSIO_Q ) + ( FILLER_586 VSSIO_Q ) ( FILLER_360 VSSIO_Q ) + ( mgmt_vccd_lvclamp_pad VSSIO_Q ) ( FILLER_359 VSSIO_Q ) + ( FILLER_358 VSSIO_Q ) ( FILLER_357 VSSIO_Q ) + ( FILLER_585 VSSIO_Q ) ( FILLER_584 VSSIO_Q ) + ( FILLER_356 VSSIO_Q ) ( FILLER_583 VSSIO_Q ) + ( FILLER_582 VSSIO_Q ) ( FILLER_355 VSSIO_Q ) + ( FILLER_581 VSSIO_Q ) ( FILLER_354 VSSIO_Q ) + ( FILLER_353 VSSIO_Q ) ( mgmt_corner\[1\] VSSIO_Q ) + ( FILLER_352 VSSIO_Q ) ( FILLER_580 VSSIO_Q ) + ( FILLER_351 VSSIO_Q ) ( FILLER_350 VSSIO_Q ) + ( FILLER_349 VSSIO_Q ) ( FILLER_348 VSSIO_Q ) + ( FILLER_347 VSSIO_Q ) ( FILLER_346 VSSIO_Q ) + ( bus_tie_72 VSSIO_Q ) ( bus_tie_71 VSSIO_Q ) + ( bus_tie_70 VSSIO_Q ) ( bus_tie_69 VSSIO_Q ) + ( bus_tie_68 VSSIO_Q ) ( FILLER_339 VSSIO_Q ) + ( bus_tie_67 VSSIO_Q ) ( FILLER_336 VSSIO_Q ) + ( FILLER_338 VSSIO_Q ) ( FILLER_337 VSSIO_Q ) + ( FILLER_335 VSSIO_Q ) ( FILLER_331 VSSIO_Q ) + ( FILLER_332 VSSIO_Q ) ( FILLER_333 VSSIO_Q ) + ( mgmt_vdda_hvclamp_pad VSSIO_Q ) ( FILLER_329 VSSIO_Q ) + ( FILLER_330 VSSIO_Q ) ( bus_tie_65 VSSIO_Q ) + ( bus_tie_66 VSSIO_Q ) ( FILLER_321 VSSIO_Q ) + ( bus_tie_64 VSSIO_Q ) ( bus_tie_63 VSSIO_Q ) + ( bus_tie_62 VSSIO_Q ) ( FILLER_322 VSSIO_Q ) + ( bus_tie_61 VSSIO_Q ) ( FILLER_318 VSSIO_Q ) + ( FILLER_320 VSSIO_Q ) ( FILLER_319 VSSIO_Q ) + ( FILLER_313 VSSIO_Q ) ( FILLER_315 VSSIO_Q ) + ( FILLER_316 VSSIO_Q ) ( mgmt_vssio_hvclamp_pad\[0\] VSSIO_Q ) + ( FILLER_314 VSSIO_Q ) ( FILLER_312 VSSIO_Q ) + ( bus_tie_58 VSSIO_Q ) ( bus_tie_60 VSSIO_Q ) + ( bus_tie_59 VSSIO_Q ) ( bus_tie_56 VSSIO_Q ) + ( bus_tie_57 VSSIO_Q ) ( FILLER_301 VSSIO_Q ) + ( FILLER_304 VSSIO_Q ) ( FILLER_305 VSSIO_Q ) + ( bus_tie_55 VSSIO_Q ) ( FILLER_303 VSSIO_Q ) + ( FILLER_302 VSSIO_Q ) ( FILLER_295 VSSIO_Q ) + ( FILLER_299 VSSIO_Q ) ( clock_pad VSSIO_Q ) + ( FILLER_297 VSSIO_Q ) ( FILLER_298 VSSIO_Q ) + ( FILLER_296 VSSIO_Q ) ( bus_tie_54 VSSIO_Q ) + ( bus_tie_53 VSSIO_Q ) ( bus_tie_52 VSSIO_Q ) + ( bus_tie_51 VSSIO_Q ) ( bus_tie_50 VSSIO_Q ) + ( FILLER_286 VSSIO_Q ) ( FILLER_287 VSSIO_Q ) + ( FILLER_288 VSSIO_Q ) ( bus_tie_49 VSSIO_Q ) + ( FILLER_285 VSSIO_Q ) ( FILLER_284 VSSIO_Q ) + ( FILLER_279 VSSIO_Q ) ( flash_io1_pad VSSIO_Q ) + ( FILLER_280 VSSIO_Q ) ( FILLER_281 VSSIO_Q ) + ( FILLER_282 VSSIO_Q ) ( FILLER_278 VSSIO_Q ) + ( bus_tie_46 VSSIO_Q ) ( bus_tie_48 VSSIO_Q ) + ( bus_tie_47 VSSIO_Q ) ( FILLER_268 VSSIO_Q ) + ( bus_tie_45 VSSIO_Q ) ( bus_tie_44 VSSIO_Q ) + ( FILLER_270 VSSIO_Q ) ( FILLER_271 VSSIO_Q ) + ( bus_tie_43 VSSIO_Q ) ( FILLER_269 VSSIO_Q ) + ( FILLER_267 VSSIO_Q ) ( FILLER_261 VSSIO_Q ) + ( FILLER_264 VSSIO_Q ) ( FILLER_265 VSSIO_Q ) + ( flash_io0_pad VSSIO_Q ) ( FILLER_263 VSSIO_Q ) + ( FILLER_262 VSSIO_Q ) ( bus_tie_39 VSSIO_Q ) + ( bus_tie_42 VSSIO_Q ) ( bus_tie_41 VSSIO_Q ) + ( bus_tie_40 VSSIO_Q ) ( FILLER_251 VSSIO_Q ) + ( bus_tie_38 VSSIO_Q ) ( FILLER_253 VSSIO_Q ) + ( FILLER_254 VSSIO_Q ) ( bus_tie_37 VSSIO_Q ) + ( FILLER_252 VSSIO_Q ) ( FILLER_250 VSSIO_Q ) + ( FILLER_244 VSSIO_Q ) ( FILLER_247 VSSIO_Q ) + ( FILLER_248 VSSIO_Q ) ( flash_clk_pad VSSIO_Q ) + ( FILLER_246 VSSIO_Q ) ( FILLER_245 VSSIO_Q ) + ( bus_tie_36 VSSIO_Q ) ( bus_tie_35 VSSIO_Q ) + ( bus_tie_34 VSSIO_Q ) ( bus_tie_33 VSSIO_Q ) + ( bus_tie_32 VSSIO_Q ) ( FILLER_235 VSSIO_Q ) + ( FILLER_236 VSSIO_Q ) ( FILLER_237 VSSIO_Q ) + ( bus_tie_31 VSSIO_Q ) ( FILLER_234 VSSIO_Q ) + ( FILLER_233 VSSIO_Q ) ( FILLER_227 VSSIO_Q ) + ( FILLER_230 VSSIO_Q ) ( FILLER_231 VSSIO_Q ) + ( flash_csb_pad VSSIO_Q ) ( FILLER_229 VSSIO_Q ) + ( FILLER_228 VSSIO_Q ) ( bus_tie_27 VSSIO_Q ) + ( bus_tie_30 VSSIO_Q ) ( bus_tie_29 VSSIO_Q ) + ( bus_tie_28 VSSIO_Q ) ( FILLER_216 VSSIO_Q ) + ( bus_tie_26 VSSIO_Q ) ( FILLER_220 VSSIO_Q ) + ( bus_tie_25 VSSIO_Q ) ( FILLER_218 VSSIO_Q ) + ( FILLER_219 VSSIO_Q ) ( FILLER_217 VSSIO_Q ) + ( FILLER_210 VSSIO_Q ) ( FILLER_214 VSSIO_Q ) + ( mgmt_vssd_lvclamp_pad VSSIO_Q ) ( FILLER_212 VSSIO_Q ) + ( FILLER_213 VSSIO_Q ) ( FILLER_211 VSSIO_Q ) + ( bus_tie_24 VSSIO_Q ) ( bus_tie_20 VSSIO_Q ) + ( bus_tie_23 VSSIO_Q ) ( bus_tie_22 VSSIO_Q ) + ( bus_tie_21 VSSIO_Q ) ( FILLER_199 VSSIO_Q ) + ( FILLER_202 VSSIO_Q ) ( FILLER_203 VSSIO_Q ) + ( bus_tie_19 VSSIO_Q ) ( FILLER_201 VSSIO_Q ) + ( FILLER_200 VSSIO_Q ) ( FILLER_195 VSSIO_Q ) + ( bus_tie_9 VSSIO_Q ) ( FILLER_196 VSSIO_Q ) + ( FILLER_197 VSSIO_Q ) ( FILLER_193 VSSIO_Q ) + ( FILLER_194 VSSIO_Q ) ( bus_tie_17 VSSIO_Q ) + ( bus_tie_18 VSSIO_Q ) ( bus_tie_14 VSSIO_Q ) + ( bus_tie_16 VSSIO_Q ) ( bus_tie_15 VSSIO_Q ) + ( FILLER_182 VSSIO_Q ) ( FILLER_185 VSSIO_Q ) + ( FILLER_186 VSSIO_Q ) ( bus_tie_13 VSSIO_Q ) + ( FILLER_184 VSSIO_Q ) ( FILLER_183 VSSIO_Q ) + ( FILLER_177 VSSIO_Q ) ( FILLER_179 VSSIO_Q ) + ( FILLER_180 VSSIO_Q ) ( resetb_pad VSSIO_Q ) + ( FILLER_178 VSSIO_Q ) ( FILLER_176 VSSIO_Q ) + ( bus_tie_12 VSSIO_Q ) ( bus_tie_11 VSSIO_Q ) + ( bus_tie_10 VSSIO_Q ) ( bus_tie_8 VSSIO_Q ) + ( bus_tie_7 VSSIO_Q ) ( FILLER_168 VSSIO_Q ) + ( FILLER_169 VSSIO_Q ) ( bus_tie_6 VSSIO_Q ) + ( FILLER_166 VSSIO_Q ) ( FILLER_167 VSSIO_Q ) + ( FILLER_165 VSSIO_Q ) ( FILLER_160 VSSIO_Q ) + ( FILLER_163 VSSIO_Q ) ( mgmt_vssa_hvclamp_pad VSSIO_Q ) + ( FILLER_161 VSSIO_Q ) ( FILLER_162 VSSIO_Q ) + ( FILLER_159 VSSIO_Q ) ( bus_tie_4 VSSIO_Q ) + ( bus_tie_5 VSSIO_Q ) ( bus_tie_3 VSSIO_Q ) + ( FILLER_149 VSSIO_Q ) ( bus_tie_2 VSSIO_Q ) + ( bus_tie_1 VSSIO_Q ) ( FILLER_151 VSSIO_Q ) + ( FILLER_152 VSSIO_Q ) ( FILLER_150 VSSIO_Q ) + ( FILLER_148 VSSIO_Q ) ( mgmt_corner\[0\] VSSIO_Q ) ; + - gpio_pad/VSSA ( gpio_pad VSSA ) ( FILLER_367 VSSA ) + ( FILLER_370 VSSA ) ( mgmt_vddio_hvclamp_pad\[0\] VSSA ) + ( FILLER_369 VSSA ) ( FILLER_368 VSSA ) ( FILLER_363 VSSA ) + ( FILLER_366 VSSA ) ( FILLER_365 VSSA ) ( FILLER_364 VSSA ) + ( FILLER_362 VSSA ) ( FILLER_587 VSSA ) ( FILLER_586 VSSA ) + ( FILLER_360 VSSA ) ( mgmt_vccd_lvclamp_pad VSSA ) + ( FILLER_359 VSSA ) ( FILLER_358 VSSA ) ( FILLER_357 VSSA ) + ( FILLER_585 VSSA ) ( FILLER_584 VSSA ) ( FILLER_356 VSSA ) + ( FILLER_583 VSSA ) ( FILLER_582 VSSA ) ( FILLER_355 VSSA ) + ( FILLER_581 VSSA ) ( FILLER_354 VSSA ) ( FILLER_353 VSSA ) + ( mgmt_corner\[1\] VSSA ) ( FILLER_352 VSSA ) + ( FILLER_580 VSSA ) ( FILLER_351 VSSA ) ( FILLER_350 VSSA ) + ( FILLER_349 VSSA ) ( FILLER_348 VSSA ) ( FILLER_347 VSSA ) + ( FILLER_346 VSSA ) ( bus_tie_72 VSSA ) ( bus_tie_71 VSSA ) + ( bus_tie_70 VSSA ) ( bus_tie_69 VSSA ) ( bus_tie_68 VSSA ) + ( FILLER_339 VSSA ) ( bus_tie_67 VSSA ) ( FILLER_336 VSSA ) + ( FILLER_338 VSSA ) ( FILLER_337 VSSA ) ( FILLER_335 VSSA ) + ( FILLER_331 VSSA ) ( FILLER_332 VSSA ) ( FILLER_333 VSSA ) + ( mgmt_vdda_hvclamp_pad VSSA ) ( FILLER_329 VSSA ) + ( FILLER_330 VSSA ) ( bus_tie_65 VSSA ) ( bus_tie_66 VSSA ) + ( FILLER_321 VSSA ) ( bus_tie_64 VSSA ) ( bus_tie_63 VSSA ) + ( bus_tie_62 VSSA ) ( FILLER_322 VSSA ) ( bus_tie_61 VSSA ) + ( FILLER_318 VSSA ) ( FILLER_320 VSSA ) ( FILLER_319 VSSA ) + ( FILLER_313 VSSA ) ( FILLER_315 VSSA ) ( FILLER_316 VSSA ) + ( mgmt_vssio_hvclamp_pad\[0\] VSSA ) ( FILLER_314 VSSA ) + ( FILLER_312 VSSA ) ( bus_tie_58 VSSA ) ( bus_tie_60 VSSA ) + ( bus_tie_59 VSSA ) ( bus_tie_56 VSSA ) ( bus_tie_57 VSSA ) + ( FILLER_301 VSSA ) ( FILLER_304 VSSA ) ( FILLER_305 VSSA ) + ( bus_tie_55 VSSA ) ( FILLER_303 VSSA ) ( FILLER_302 VSSA ) + ( FILLER_295 VSSA ) ( FILLER_299 VSSA ) ( clock_pad VSSA ) + ( FILLER_297 VSSA ) ( FILLER_298 VSSA ) ( FILLER_296 VSSA ) + ( bus_tie_54 VSSA ) ( bus_tie_53 VSSA ) ( bus_tie_52 VSSA ) + ( bus_tie_51 VSSA ) ( bus_tie_50 VSSA ) ( FILLER_286 VSSA ) + ( FILLER_287 VSSA ) ( FILLER_288 VSSA ) ( bus_tie_49 VSSA ) + ( FILLER_285 VSSA ) ( FILLER_284 VSSA ) ( FILLER_279 VSSA ) + ( flash_io1_pad VSSA ) ( FILLER_280 VSSA ) ( FILLER_281 VSSA ) + ( FILLER_282 VSSA ) ( FILLER_278 VSSA ) ( bus_tie_46 VSSA ) + ( bus_tie_48 VSSA ) ( bus_tie_47 VSSA ) ( FILLER_268 VSSA ) + ( bus_tie_45 VSSA ) ( bus_tie_44 VSSA ) ( FILLER_270 VSSA ) + ( FILLER_271 VSSA ) ( bus_tie_43 VSSA ) ( FILLER_269 VSSA ) + ( FILLER_267 VSSA ) ( FILLER_261 VSSA ) ( FILLER_264 VSSA ) + ( FILLER_265 VSSA ) ( flash_io0_pad VSSA ) ( FILLER_263 VSSA ) + ( FILLER_262 VSSA ) ( bus_tie_39 VSSA ) ( bus_tie_42 VSSA ) + ( bus_tie_41 VSSA ) ( bus_tie_40 VSSA ) ( FILLER_251 VSSA ) + ( bus_tie_38 VSSA ) ( FILLER_253 VSSA ) ( FILLER_254 VSSA ) + ( bus_tie_37 VSSA ) ( FILLER_252 VSSA ) ( FILLER_250 VSSA ) + ( FILLER_244 VSSA ) ( FILLER_247 VSSA ) ( FILLER_248 VSSA ) + ( flash_clk_pad VSSA ) ( FILLER_246 VSSA ) ( FILLER_245 VSSA ) + ( bus_tie_36 VSSA ) ( bus_tie_35 VSSA ) ( bus_tie_34 VSSA ) + ( bus_tie_33 VSSA ) ( bus_tie_32 VSSA ) ( FILLER_235 VSSA ) + ( FILLER_236 VSSA ) ( FILLER_237 VSSA ) ( bus_tie_31 VSSA ) + ( FILLER_234 VSSA ) ( FILLER_233 VSSA ) ( FILLER_227 VSSA ) + ( FILLER_230 VSSA ) ( FILLER_231 VSSA ) ( flash_csb_pad VSSA ) + ( FILLER_229 VSSA ) ( FILLER_228 VSSA ) ( bus_tie_27 VSSA ) + ( bus_tie_30 VSSA ) ( bus_tie_29 VSSA ) ( bus_tie_28 VSSA ) + ( FILLER_216 VSSA ) ( bus_tie_26 VSSA ) ( FILLER_220 VSSA ) + ( bus_tie_25 VSSA ) ( FILLER_218 VSSA ) ( FILLER_219 VSSA ) + ( FILLER_217 VSSA ) ( FILLER_210 VSSA ) ( FILLER_214 VSSA ) + ( mgmt_vssd_lvclamp_pad VSSA ) ( FILLER_212 VSSA ) + ( FILLER_213 VSSA ) ( FILLER_211 VSSA ) ( bus_tie_24 VSSA ) + ( bus_tie_20 VSSA ) ( bus_tie_23 VSSA ) ( bus_tie_22 VSSA ) + ( bus_tie_21 VSSA ) ( FILLER_199 VSSA ) ( FILLER_202 VSSA ) + ( FILLER_203 VSSA ) ( bus_tie_19 VSSA ) ( FILLER_201 VSSA ) + ( FILLER_200 VSSA ) ( FILLER_195 VSSA ) ( bus_tie_9 VSSA ) + ( FILLER_196 VSSA ) ( FILLER_197 VSSA ) ( FILLER_193 VSSA ) + ( FILLER_194 VSSA ) ( bus_tie_17 VSSA ) ( bus_tie_18 VSSA ) + ( bus_tie_14 VSSA ) ( bus_tie_16 VSSA ) ( bus_tie_15 VSSA ) + ( FILLER_182 VSSA ) ( FILLER_185 VSSA ) ( FILLER_186 VSSA ) + ( bus_tie_13 VSSA ) ( FILLER_184 VSSA ) ( FILLER_183 VSSA ) + ( FILLER_177 VSSA ) ( FILLER_179 VSSA ) ( FILLER_180 VSSA ) + ( resetb_pad VSSA ) ( FILLER_178 VSSA ) ( FILLER_176 VSSA ) + ( bus_tie_12 VSSA ) ( bus_tie_11 VSSA ) ( bus_tie_10 VSSA ) + ( bus_tie_8 VSSA ) ( bus_tie_7 VSSA ) ( FILLER_168 VSSA ) + ( FILLER_169 VSSA ) ( bus_tie_6 VSSA ) ( FILLER_166 VSSA ) + ( FILLER_167 VSSA ) ( FILLER_165 VSSA ) ( FILLER_160 VSSA ) + ( FILLER_163 VSSA ) ( mgmt_vssa_hvclamp_pad VSSA ) + ( FILLER_161 VSSA ) ( FILLER_162 VSSA ) ( FILLER_159 VSSA ) + ( bus_tie_4 VSSA ) ( bus_tie_5 VSSA ) ( bus_tie_3 VSSA ) + ( FILLER_149 VSSA ) ( bus_tie_2 VSSA ) ( bus_tie_1 VSSA ) + ( FILLER_151 VSSA ) ( FILLER_152 VSSA ) ( FILLER_150 VSSA ) + ( FILLER_148 VSSA ) ( mgmt_corner\[0\] VSSA ) ; + - gpio_pad/VSSD ( gpio_pad VSSD ) ( mgmt_corner\[1\] VSSD ) + ( FILLER_351 VSSD ) ( FILLER_350 VSSD ) ( FILLER_349 VSSD ) + ( FILLER_348 VSSD ) ( FILLER_347 VSSD ) ( FILLER_346 VSSD ) + ( bus_tie_72 VSSD ) ( bus_tie_71 VSSD ) ( bus_tie_70 VSSD ) + ( bus_tie_69 VSSD ) ( bus_tie_68 VSSD ) ( FILLER_339 VSSD ) + ( bus_tie_67 VSSD ) ( FILLER_336 VSSD ) ( FILLER_338 VSSD ) + ( FILLER_337 VSSD ) ( FILLER_335 VSSD ) ( FILLER_331 VSSD ) + ( FILLER_332 VSSD ) ( FILLER_333 VSSD ) + ( mgmt_vdda_hvclamp_pad VSSD ) ( FILLER_329 VSSD ) + ( FILLER_330 VSSD ) ( bus_tie_65 VSSD ) ( bus_tie_66 VSSD ) + ( FILLER_321 VSSD ) ( bus_tie_64 VSSD ) ( bus_tie_63 VSSD ) + ( bus_tie_62 VSSD ) ( FILLER_322 VSSD ) ( bus_tie_61 VSSD ) + ( FILLER_318 VSSD ) ( FILLER_320 VSSD ) ( FILLER_319 VSSD ) + ( FILLER_313 VSSD ) ( FILLER_315 VSSD ) ( FILLER_316 VSSD ) + ( mgmt_vssio_hvclamp_pad\[0\] VSSD ) ( FILLER_314 VSSD ) + ( FILLER_312 VSSD ) ( bus_tie_58 VSSD ) ( bus_tie_60 VSSD ) + ( bus_tie_59 VSSD ) ( bus_tie_56 VSSD ) ( bus_tie_57 VSSD ) + ( FILLER_301 VSSD ) ( FILLER_304 VSSD ) ( FILLER_305 VSSD ) + ( bus_tie_55 VSSD ) ( FILLER_303 VSSD ) ( FILLER_302 VSSD ) + ( FILLER_295 VSSD ) ( FILLER_299 VSSD ) ( clock_pad VSSD ) + ( FILLER_297 VSSD ) ( FILLER_298 VSSD ) ( FILLER_296 VSSD ) + ( bus_tie_54 VSSD ) ( bus_tie_53 VSSD ) ( bus_tie_52 VSSD ) + ( bus_tie_51 VSSD ) ( bus_tie_50 VSSD ) ( FILLER_286 VSSD ) + ( FILLER_287 VSSD ) ( FILLER_288 VSSD ) ( bus_tie_49 VSSD ) + ( FILLER_285 VSSD ) ( FILLER_284 VSSD ) ( FILLER_279 VSSD ) + ( flash_io1_pad VSSD ) ( FILLER_280 VSSD ) ( FILLER_281 VSSD ) + ( FILLER_282 VSSD ) ( FILLER_278 VSSD ) ( bus_tie_46 VSSD ) + ( bus_tie_48 VSSD ) ( bus_tie_47 VSSD ) ( FILLER_268 VSSD ) + ( bus_tie_45 VSSD ) ( bus_tie_44 VSSD ) ( FILLER_270 VSSD ) + ( FILLER_271 VSSD ) ( bus_tie_43 VSSD ) ( FILLER_269 VSSD ) + ( FILLER_267 VSSD ) ( FILLER_261 VSSD ) ( FILLER_264 VSSD ) + ( FILLER_265 VSSD ) ( flash_io0_pad VSSD ) ( FILLER_263 VSSD ) + ( FILLER_262 VSSD ) ( bus_tie_39 VSSD ) ( bus_tie_42 VSSD ) + ( bus_tie_41 VSSD ) ( bus_tie_40 VSSD ) ( FILLER_251 VSSD ) + ( bus_tie_38 VSSD ) ( FILLER_253 VSSD ) ( FILLER_254 VSSD ) + ( bus_tie_37 VSSD ) ( FILLER_252 VSSD ) ( FILLER_250 VSSD ) + ( FILLER_244 VSSD ) ( FILLER_247 VSSD ) ( FILLER_248 VSSD ) + ( flash_clk_pad VSSD ) ( FILLER_246 VSSD ) ( FILLER_245 VSSD ) + ( bus_tie_36 VSSD ) ( bus_tie_35 VSSD ) ( bus_tie_34 VSSD ) + ( bus_tie_33 VSSD ) ( bus_tie_32 VSSD ) ( FILLER_235 VSSD ) + ( FILLER_236 VSSD ) ( FILLER_237 VSSD ) ( bus_tie_31 VSSD ) + ( FILLER_234 VSSD ) ( FILLER_233 VSSD ) ( FILLER_227 VSSD ) + ( FILLER_230 VSSD ) ( FILLER_231 VSSD ) ( flash_csb_pad VSSD ) + ( FILLER_229 VSSD ) ( FILLER_228 VSSD ) ( bus_tie_27 VSSD ) + ( bus_tie_30 VSSD ) ( bus_tie_29 VSSD ) ( bus_tie_28 VSSD ) + ( FILLER_216 VSSD ) ( bus_tie_26 VSSD ) ( FILLER_220 VSSD ) + ( bus_tie_25 VSSD ) ( FILLER_218 VSSD ) ( FILLER_219 VSSD ) + ( FILLER_217 VSSD ) ( FILLER_210 VSSD ) ( FILLER_214 VSSD ) + ( mgmt_vssd_lvclamp_pad VSSD ) ( FILLER_212 VSSD ) + ( FILLER_213 VSSD ) ( FILLER_211 VSSD ) ( bus_tie_24 VSSD ) + ( bus_tie_20 VSSD ) ( bus_tie_23 VSSD ) ( bus_tie_22 VSSD ) + ( bus_tie_21 VSSD ) ( FILLER_199 VSSD ) ( FILLER_202 VSSD ) + ( FILLER_203 VSSD ) ( bus_tie_19 VSSD ) ( FILLER_201 VSSD ) + ( FILLER_200 VSSD ) ( FILLER_195 VSSD ) ( bus_tie_9 VSSD ) + ( FILLER_196 VSSD ) ( FILLER_197 VSSD ) ( FILLER_193 VSSD ) + ( FILLER_194 VSSD ) ( bus_tie_17 VSSD ) ( bus_tie_18 VSSD ) + ( bus_tie_14 VSSD ) ( bus_tie_16 VSSD ) ( bus_tie_15 VSSD ) + ( FILLER_182 VSSD ) ( FILLER_185 VSSD ) ( FILLER_186 VSSD ) + ( bus_tie_13 VSSD ) ( FILLER_184 VSSD ) ( FILLER_183 VSSD ) + ( FILLER_177 VSSD ) ( FILLER_179 VSSD ) ( FILLER_180 VSSD ) + ( resetb_pad VSSD ) ( FILLER_178 VSSD ) ( FILLER_176 VSSD ) + ( bus_tie_12 VSSD ) ( bus_tie_11 VSSD ) ( bus_tie_10 VSSD ) + ( bus_tie_8 VSSD ) ( bus_tie_7 VSSD ) ( FILLER_168 VSSD ) + ( FILLER_169 VSSD ) ( bus_tie_6 VSSD ) ( FILLER_166 VSSD ) + ( FILLER_167 VSSD ) ( FILLER_165 VSSD ) ( FILLER_160 VSSD ) + ( FILLER_163 VSSD ) ( mgmt_vssa_hvclamp_pad VSSD ) + ( FILLER_161 VSSD ) ( FILLER_162 VSSD ) ( FILLER_159 VSSD ) + ( bus_tie_4 VSSD ) ( bus_tie_5 VSSD ) ( bus_tie_3 VSSD ) + ( FILLER_149 VSSD ) ( bus_tie_2 VSSD ) ( bus_tie_1 VSSD ) + ( FILLER_151 VSSD ) ( FILLER_152 VSSD ) ( FILLER_150 VSSD ) + ( FILLER_148 VSSD ) ( mgmt_corner\[0\] VSSD ) ; + - gpio_pad/VDDIO ( gpio_pad VDDIO ) ( FILLER_145 VSWITCH ) + ( FILLER_146 VSWITCH ) ( FILLER_147 VSWITCH ) + ( FILLER_144 VSWITCH ) ( FILLER_143 VSWITCH ) + ( FILLER_142 VSWITCH ) ( FILLER_141 VSWITCH ) + ( FILLER_140 VSWITCH ) ( FILLER_139 VSWITCH ) + ( FILLER_138 VSWITCH ) ( FILLER_137 VSWITCH ) + ( FILLER_136 VSWITCH ) ( FILLER_135 VSWITCH ) + ( FILLER_131 VSWITCH ) ( FILLER_132 VSWITCH ) + ( FILLER_133 VSWITCH ) ( user1_analog_pad\[0\] VSWITCH ) + ( FILLER_127 VSWITCH ) ( FILLER_130 VSWITCH ) + ( FILLER_129 VSWITCH ) ( FILLER_128 VSWITCH ) + ( FILLER_124 VSWITCH ) ( FILLER_126 VSWITCH ) + ( FILLER_125 VSWITCH ) ( FILLER_123 VSWITCH ) + ( FILLER_116 VSWITCH ) ( user1_vssa_hvclamp_pad\[0\] VSWITCH ) + ( FILLER_119 VSWITCH ) ( FILLER_120 VSWITCH ) + ( FILLER_121 VSWITCH ) ( FILLER_118 VSWITCH ) + ( FILLER_117 VSWITCH ) ( FILLER_113 VSWITCH ) + ( FILLER_115 VSWITCH ) ( FILLER_114 VSWITCH ) + ( FILLER_110 VSWITCH ) ( FILLER_112 VSWITCH ) + ( FILLER_111 VSWITCH ) ( FILLER_107 VSWITCH ) + ( user1_analog_pad\[1\] VSWITCH ) ( FILLER_108 VSWITCH ) + ( FILLER_103 VSWITCH ) ( FILLER_106 VSWITCH ) + ( FILLER_105 VSWITCH ) ( FILLER_104 VSWITCH ) + ( FILLER_100 VSWITCH ) ( FILLER_102 VSWITCH ) + ( FILLER_101 VSWITCH ) ( FILLER_98 VSWITCH ) + ( FILLER_99 VSWITCH ) ( FILLER_91 VSWITCH ) + ( FILLER_95 VSWITCH ) ( FILLER_96 VSWITCH ) + ( user1_analog_pad\[2\] VSWITCH ) ( FILLER_93 VSWITCH ) + ( FILLER_94 VSWITCH ) ( FILLER_92 VSWITCH ) + ( FILLER_90 VSWITCH ) ( FILLER_89 VSWITCH ) + ( FILLER_88 VSWITCH ) ( FILLER_87 VSWITCH ) + ( FILLER_86 VSWITCH ) ( FILLER_85 VSWITCH ) + ( FILLER_84 VSWITCH ) ( FILLER_83 VSWITCH ) + ( FILLER_82 VSWITCH ) ( FILLER_81 VSWITCH ) + ( FILLER_80 VSWITCH ) ( FILLER_79 VSWITCH ) + ( sky130_ef_io__com_bus_slice_10um_0 VSWITCH ) + ( FILLER_78 VSWITCH ) + ( sky130_ef_io__com_bus_slice_5um_1 VSWITCH ) + ( user1_analog_pad_with_clamp VSWITCH ) ( FILLER_SB3 VSWITCH ) + ( sky130_ef_io__com_bus_slice_5um_0 VSWITCH ) + ( FILLER_71 VSWITCH ) ( disconnect_vdda_0 VSWITCH ) + ( FILLER_73 VSWITCH ) ( FILLER_72 VSWITCH ) + ( FILLER_68 VSWITCH ) ( FILLER_70 VSWITCH ) + ( FILLER_69 VSWITCH ) ( FILLER_64 VSWITCH ) + ( mgmt_vssio_hvclamp_pad\[1\] VSWITCH ) ( FILLER_66 VSWITCH ) + ( FILLER_65 VSWITCH ) ( FILLER_60 VSWITCH ) + ( FILLER_63 VSWITCH ) ( FILLER_62 VSWITCH ) + ( FILLER_61 VSWITCH ) + ( sky130_ef_io__com_bus_slice_5um_3 VSWITCH ) + ( sky130_ef_io__com_bus_slice_10um_1 VSWITCH ) + ( user2_analog_pad_with_clamp\[0\] VSWITCH ) + ( sky130_ef_io__com_bus_slice_5um_2 VSWITCH ) + ( FILLER_57 VSWITCH ) ( FILLER_56 VSWITCH ) + ( FILLER_55 VSWITCH ) ( FILLER_54 VSWITCH ) + ( FILLER_53 VSWITCH ) ( FILLER_52 VSWITCH ) + ( FILLER_51 VSWITCH ) ( FILLER_50 VSWITCH ) + ( FILLER_49 VSWITCH ) + ( user2_analog_pad_with_clamp\[1\] VSWITCH ) + ( FILLER_47 VSWITCH ) ( FILLER_46 VSWITCH ) + ( FILLER_45 VSWITCH ) ( FILLER_44 VSWITCH ) + ( FILLER_43 VSWITCH ) ( FILLER_42 VSWITCH ) + ( user2_analog_pad\[0\] VSWITCH ) ( FILLER_41 VSWITCH ) + ( FILLER_39 VSWITCH ) ( FILLER_38 VSWITCH ) + ( FILLER_37 VSWITCH ) ( FILLER_36 VSWITCH ) + ( FILLER_33 VSWITCH ) ( FILLER_35 VSWITCH ) + ( FILLER_34 VSWITCH ) ( FILLER_29 VSWITCH ) + ( FILLER_32 VSWITCH ) ( FILLER_31 VSWITCH ) + ( FILLER_30 VSWITCH ) ( FILLER_26 VSWITCH ) + ( FILLER_27 VSWITCH ) ( user2_analog_pad\[1\] VSWITCH ) + ( FILLER_25 VSWITCH ) ( FILLER_24 VSWITCH ) + ( FILLER_23 VSWITCH ) ( FILLER_22 VSWITCH ) + ( FILLER_21 VSWITCH ) ( FILLER_20 VSWITCH ) + ( FILLER_19 VSWITCH ) ( FILLER_18 VSWITCH ) + ( FILLER_17 VSWITCH ) ( FILLER_13 VSWITCH ) + ( user2_analog_pad\[2\] VSWITCH ) ( FILLER_14 VSWITCH ) + ( FILLER_15 VSWITCH ) ( FILLER_10 VSWITCH ) + ( FILLER_12 VSWITCH ) ( FILLER_11 VSWITCH ) + ( FILLER_6 VSWITCH ) ( FILLER_9 VSWITCH ) ( FILLER_8 VSWITCH ) + ( FILLER_7 VSWITCH ) ( FILLER_5 VSWITCH ) ( FILLER_145 VDDIO ) + ( FILLER_146 VDDIO ) ( FILLER_147 VDDIO ) ( FILLER_144 VDDIO ) + ( FILLER_143 VDDIO ) ( FILLER_142 VDDIO ) ( FILLER_141 VDDIO ) + ( FILLER_140 VDDIO ) ( FILLER_139 VDDIO ) ( FILLER_138 VDDIO ) + ( FILLER_137 VDDIO ) ( FILLER_136 VDDIO ) ( FILLER_135 VDDIO ) + ( FILLER_131 VDDIO ) ( FILLER_132 VDDIO ) ( FILLER_133 VDDIO ) + ( user1_analog_pad\[0\] VDDIO ) ( FILLER_127 VDDIO ) + ( FILLER_130 VDDIO ) ( FILLER_129 VDDIO ) ( FILLER_128 VDDIO ) + ( FILLER_124 VDDIO ) ( FILLER_126 VDDIO ) ( FILLER_125 VDDIO ) + ( FILLER_123 VDDIO ) ( FILLER_116 VDDIO ) + ( user1_vssa_hvclamp_pad\[0\] VDDIO ) ( FILLER_119 VDDIO ) + ( FILLER_120 VDDIO ) ( FILLER_121 VDDIO ) ( FILLER_118 VDDIO ) + ( FILLER_117 VDDIO ) ( FILLER_113 VDDIO ) ( FILLER_115 VDDIO ) + ( FILLER_114 VDDIO ) ( FILLER_110 VDDIO ) ( FILLER_112 VDDIO ) + ( FILLER_111 VDDIO ) ( FILLER_107 VDDIO ) + ( user1_analog_pad\[1\] VDDIO ) ( FILLER_108 VDDIO ) + ( FILLER_103 VDDIO ) ( FILLER_106 VDDIO ) ( FILLER_105 VDDIO ) + ( FILLER_104 VDDIO ) ( FILLER_100 VDDIO ) ( FILLER_102 VDDIO ) + ( FILLER_101 VDDIO ) ( FILLER_98 VDDIO ) ( FILLER_99 VDDIO ) + ( FILLER_91 VDDIO ) ( FILLER_95 VDDIO ) ( FILLER_96 VDDIO ) + ( user1_analog_pad\[2\] VDDIO ) ( FILLER_93 VDDIO ) + ( FILLER_94 VDDIO ) ( FILLER_92 VDDIO ) ( FILLER_90 VDDIO ) + ( FILLER_89 VDDIO ) ( FILLER_88 VDDIO ) ( FILLER_87 VDDIO ) + ( FILLER_86 VDDIO ) ( FILLER_85 VDDIO ) ( FILLER_84 VDDIO ) + ( FILLER_83 VDDIO ) ( FILLER_82 VDDIO ) ( FILLER_81 VDDIO ) + ( FILLER_80 VDDIO ) ( FILLER_79 VDDIO ) + ( sky130_ef_io__com_bus_slice_10um_0 VDDIO ) + ( FILLER_78 VDDIO ) ( sky130_ef_io__com_bus_slice_5um_1 VDDIO ) + ( user1_analog_pad_with_clamp VDDIO ) ( FILLER_SB3 VDDIO ) + ( sky130_ef_io__com_bus_slice_5um_0 VDDIO ) ( FILLER_71 VDDIO ) + ( disconnect_vdda_0 VDDIO ) ( FILLER_73 VDDIO ) + ( FILLER_72 VDDIO ) ( FILLER_68 VDDIO ) ( FILLER_70 VDDIO ) + ( FILLER_69 VDDIO ) ( FILLER_64 VDDIO ) + ( mgmt_vssio_hvclamp_pad\[1\] VDDIO ) ( FILLER_66 VDDIO ) + ( FILLER_65 VDDIO ) ( FILLER_60 VDDIO ) ( FILLER_63 VDDIO ) + ( FILLER_62 VDDIO ) ( FILLER_61 VDDIO ) + ( sky130_ef_io__com_bus_slice_5um_3 VDDIO ) + ( sky130_ef_io__com_bus_slice_10um_1 VDDIO ) + ( user2_analog_pad_with_clamp\[0\] VDDIO ) + ( sky130_ef_io__com_bus_slice_5um_2 VDDIO ) ( FILLER_57 VDDIO ) + ( FILLER_56 VDDIO ) ( FILLER_55 VDDIO ) ( FILLER_54 VDDIO ) + ( FILLER_53 VDDIO ) ( FILLER_52 VDDIO ) ( FILLER_51 VDDIO ) + ( FILLER_50 VDDIO ) ( FILLER_49 VDDIO ) + ( user2_analog_pad_with_clamp\[1\] VDDIO ) ( FILLER_47 VDDIO ) + ( FILLER_46 VDDIO ) ( FILLER_45 VDDIO ) ( FILLER_44 VDDIO ) + ( FILLER_43 VDDIO ) ( FILLER_42 VDDIO ) + ( user2_analog_pad\[0\] VDDIO ) ( FILLER_41 VDDIO ) + ( FILLER_39 VDDIO ) ( FILLER_38 VDDIO ) ( FILLER_37 VDDIO ) + ( FILLER_36 VDDIO ) ( FILLER_33 VDDIO ) ( FILLER_35 VDDIO ) + ( FILLER_34 VDDIO ) ( FILLER_29 VDDIO ) ( FILLER_32 VDDIO ) + ( FILLER_31 VDDIO ) ( FILLER_30 VDDIO ) ( FILLER_26 VDDIO ) + ( FILLER_27 VDDIO ) ( user2_analog_pad\[1\] VDDIO ) + ( FILLER_25 VDDIO ) ( FILLER_24 VDDIO ) ( FILLER_23 VDDIO ) + ( FILLER_22 VDDIO ) ( FILLER_21 VDDIO ) ( FILLER_20 VDDIO ) + ( FILLER_19 VDDIO ) ( FILLER_18 VDDIO ) ( FILLER_17 VDDIO ) + ( FILLER_13 VDDIO ) ( user2_analog_pad\[2\] VDDIO ) + ( FILLER_14 VDDIO ) ( FILLER_15 VDDIO ) ( FILLER_10 VDDIO ) + ( FILLER_12 VDDIO ) ( FILLER_11 VDDIO ) ( FILLER_6 VDDIO ) + ( FILLER_9 VDDIO ) ( FILLER_8 VDDIO ) ( FILLER_7 VDDIO ) + ( FILLER_5 VDDIO ) ( user2_corner VSWITCH ) + ( user2_corner VDDIO ) ( FILLER_578 VSWITCH ) + ( FILLER_579 VSWITCH ) ( user1_corner VSWITCH ) + ( FILLER_578 VDDIO ) ( FILLER_579 VDDIO ) + ( user1_corner VDDIO ) ( FILLER_786 VSWITCH ) + ( FILLER_576 VSWITCH ) ( FILLER_786 VDDIO ) + ( FILLER_577 VSWITCH ) ( FILLER_577 VDDIO ) + ( FILLER_576 VDDIO ) ( FILLER_785 VSWITCH ) + ( FILLER_785 VDDIO ) ( FILLER_571 VSWITCH ) + ( FILLER_575 VSWITCH ) ( FILLER_575 VDDIO ) + ( FILLER_784 VSWITCH ) ( FILLER_784 VDDIO ) + ( FILLER_574 VSWITCH ) ( FILLER_574 VDDIO ) + ( FILLER_783 VSWITCH ) ( FILLER_783 VDDIO ) + ( FILLER_573 VSWITCH ) ( FILLER_573 VDDIO ) + ( FILLER_782 VSWITCH ) ( FILLER_782 VDDIO ) + ( FILLER_572 VSWITCH ) ( FILLER_572 VDDIO ) + ( FILLER_781 VSWITCH ) ( FILLER_781 VDDIO ) + ( FILLER_571 VDDIO ) ( FILLER_780 VSWITCH ) + ( FILLER_780 VDDIO ) ( FILLER_779 VSWITCH ) + ( FILLER_570 VSWITCH ) ( FILLER_570 VDDIO ) + ( FILLER_779 VDDIO ) ( user2_analog_pad\[3\] VSWITCH ) + ( FILLER_776 VSWITCH ) ( FILLER_776 VDDIO ) + ( FILLER_568 VSWITCH ) ( user2_analog_pad\[3\] VDDIO ) + ( FILLER_568 VDDIO ) ( user1_analog_pad\[3\] VSWITCH ) + ( user1_analog_pad\[3\] VDDIO ) ( FILLER_567 VSWITCH ) + ( FILLER_567 VDDIO ) ( FILLER_777 VSWITCH ) + ( FILLER_777 VDDIO ) ( FILLER_775 VSWITCH ) + ( FILLER_775 VDDIO ) ( FILLER_566 VSWITCH ) + ( FILLER_566 VDDIO ) ( FILLER_774 VSWITCH ) + ( FILLER_774 VDDIO ) ( FILLER_565 VSWITCH ) + ( FILLER_565 VDDIO ) ( FILLER_773 VSWITCH ) + ( FILLER_773 VDDIO ) ( FILLER_564 VSWITCH ) + ( FILLER_564 VDDIO ) ( FILLER_772 VSWITCH ) + ( FILLER_772 VDDIO ) ( FILLER_563 VSWITCH ) + ( FILLER_563 VDDIO ) ( FILLER_771 VSWITCH ) + ( FILLER_771 VDDIO ) ( FILLER_562 VSWITCH ) + ( FILLER_562 VDDIO ) ( FILLER_561 VSWITCH ) + ( FILLER_561 VDDIO ) ( FILLER_769 VSWITCH ) + ( FILLER_770 VSWITCH ) ( FILLER_770 VDDIO ) + ( FILLER_769 VDDIO ) ( FILLER_766 VSWITCH ) + ( FILLER_559 VSWITCH ) ( user2_vccd_lvclamp_pad VSWITCH ) + ( FILLER_559 VDDIO ) ( user2_vccd_lvclamp_pad VDDIO ) + ( FILLER_558 VSWITCH ) ( FILLER_558 VDDIO ) + ( FILLER_557 VSWITCH ) ( FILLER_557 VDDIO ) + ( FILLER_767 VSWITCH ) ( user1_vccd_lvclamp_pad VSWITCH ) + ( FILLER_767 VDDIO ) ( user1_vccd_lvclamp_pad VDDIO ) + ( FILLER_766 VDDIO ) ( FILLER_556 VSWITCH ) + ( FILLER_556 VDDIO ) ( FILLER_552 VSWITCH ) + ( FILLER_765 VSWITCH ) ( FILLER_765 VDDIO ) + ( FILLER_555 VSWITCH ) ( FILLER_555 VDDIO ) + ( FILLER_764 VSWITCH ) ( FILLER_764 VDDIO ) + ( FILLER_554 VSWITCH ) ( FILLER_554 VDDIO ) + ( FILLER_763 VSWITCH ) ( FILLER_763 VDDIO ) + ( FILLER_553 VSWITCH ) ( FILLER_553 VDDIO ) + ( FILLER_762 VSWITCH ) ( FILLER_762 VDDIO ) + ( FILLER_552 VDDIO ) ( FILLER_761 VSWITCH ) + ( FILLER_761 VDDIO ) ( FILLER_551 VSWITCH ) + ( FILLER_551 VDDIO ) ( FILLER_760 VSWITCH ) + ( FILLER_760 VDDIO ) ( FILLER_546 VSWITCH ) + ( FILLER_759 VSWITCH ) ( FILLER_759 VDDIO ) + ( FILLER_549 VSWITCH ) ( mgmt_vddio_hvclamp_pad\[1\] VSWITCH ) + ( FILLER_549 VDDIO ) ( mgmt_vddio_hvclamp_pad\[1\] VDDIO ) + ( FILLER_548 VSWITCH ) ( FILLER_548 VDDIO ) + ( FILLER_547 VSWITCH ) ( FILLER_547 VDDIO ) + ( FILLER_546 VDDIO ) ( mprj_pads.area1_io_pad\[13\] VSWITCH ) + ( FILLER_757 VSWITCH ) ( mprj_pads.area1_io_pad\[13\] VDDIO ) + ( FILLER_757 VDDIO ) ( FILLER_756 VSWITCH ) + ( FILLER_545 VSWITCH ) ( FILLER_545 VDDIO ) + ( FILLER_756 VDDIO ) ( FILLER_755 VSWITCH ) + ( FILLER_544 VSWITCH ) ( FILLER_544 VDDIO ) + ( FILLER_755 VDDIO ) ( FILLER_754 VSWITCH ) + ( FILLER_543 VSWITCH ) ( FILLER_543 VDDIO ) + ( FILLER_754 VDDIO ) ( FILLER_542 VSWITCH ) + ( FILLER_542 VDDIO ) ( FILLER_753 VSWITCH ) + ( FILLER_753 VDDIO ) ( FILLER_541 VSWITCH ) + ( FILLER_541 VDDIO ) ( FILLER_752 VSWITCH ) + ( FILLER_752 VDDIO ) ( FILLER_751 VSWITCH ) + ( FILLER_751 VDDIO ) ( FILLER_536 VSWITCH ) + ( FILLER_750 VSWITCH ) ( FILLER_750 VDDIO ) + ( user2_vssa_hvclamp_pad VSWITCH ) + ( user2_vssa_hvclamp_pad VDDIO ) ( FILLER_538 VSWITCH ) + ( FILLER_539 VSWITCH ) ( FILLER_538 VDDIO ) + ( FILLER_539 VDDIO ) ( FILLER_537 VSWITCH ) + ( FILLER_537 VDDIO ) ( FILLER_536 VDDIO ) + ( user1_vdda_hvclamp_pad\[0\] VSWITCH ) ( FILLER_748 VSWITCH ) + ( user1_vdda_hvclamp_pad\[0\] VDDIO ) ( FILLER_748 VDDIO ) + ( FILLER_747 VSWITCH ) ( FILLER_747 VDDIO ) + ( FILLER_746 VSWITCH ) ( FILLER_535 VSWITCH ) + ( FILLER_535 VDDIO ) ( FILLER_746 VDDIO ) + ( FILLER_745 VSWITCH ) ( FILLER_534 VSWITCH ) + ( FILLER_534 VDDIO ) ( FILLER_745 VDDIO ) + ( FILLER_744 VSWITCH ) ( FILLER_533 VSWITCH ) + ( FILLER_533 VDDIO ) ( FILLER_744 VDDIO ) + ( FILLER_532 VSWITCH ) ( FILLER_532 VDDIO ) + ( FILLER_531 VSWITCH ) ( FILLER_743 VSWITCH ) + ( FILLER_743 VDDIO ) ( FILLER_531 VDDIO ) + ( FILLER_741 VSWITCH ) ( FILLER_742 VSWITCH ) + ( FILLER_742 VDDIO ) ( FILLER_741 VDDIO ) + ( FILLER_740 VSWITCH ) ( FILLER_740 VDDIO ) + ( FILLER_526 VSWITCH ) ( FILLER_529 VSWITCH ) + ( mprj_pads.area2_io_pad\[0\] VSWITCH ) ( FILLER_529 VDDIO ) + ( mprj_pads.area2_io_pad\[0\] VDDIO ) ( FILLER_528 VSWITCH ) + ( FILLER_528 VDDIO ) ( FILLER_527 VSWITCH ) + ( FILLER_527 VDDIO ) ( FILLER_526 VDDIO ) + ( FILLER_522 VSWITCH ) ( mprj_pads.area1_io_pad\[12\] VSWITCH ) + ( mprj_pads.area1_io_pad\[12\] VDDIO ) ( FILLER_525 VSWITCH ) + ( FILLER_525 VDDIO ) ( FILLER_738 VSWITCH ) + ( FILLER_738 VDDIO ) ( FILLER_524 VSWITCH ) + ( FILLER_524 VDDIO ) ( FILLER_737 VSWITCH ) + ( FILLER_737 VDDIO ) ( FILLER_523 VSWITCH ) + ( FILLER_523 VDDIO ) ( FILLER_736 VSWITCH ) + ( FILLER_736 VDDIO ) ( FILLER_522 VDDIO ) + ( FILLER_735 VSWITCH ) ( FILLER_735 VDDIO ) + ( FILLER_734 VSWITCH ) ( FILLER_734 VDDIO ) + ( FILLER_521 VSWITCH ) ( FILLER_521 VDDIO ) + ( FILLER_733 VSWITCH ) ( FILLER_733 VDDIO ) + ( FILLER_732 VSWITCH ) ( FILLER_732 VDDIO ) + ( FILLER_516 VSWITCH ) ( FILLER_731 VSWITCH ) + ( FILLER_731 VDDIO ) ( FILLER_519 VSWITCH ) + ( mprj_pads.area2_io_pad\[1\] VSWITCH ) ( FILLER_519 VDDIO ) + ( mprj_pads.area2_io_pad\[1\] VDDIO ) ( FILLER_518 VSWITCH ) + ( FILLER_518 VDDIO ) ( FILLER_517 VSWITCH ) + ( FILLER_517 VDDIO ) ( FILLER_516 VDDIO ) + ( mprj_pads.area1_io_pad\[11\] VSWITCH ) ( FILLER_515 VSWITCH ) + ( FILLER_515 VDDIO ) ( mprj_pads.area1_io_pad\[11\] VDDIO ) + ( FILLER_729 VSWITCH ) ( FILLER_729 VDDIO ) + ( FILLER_728 VSWITCH ) ( FILLER_514 VSWITCH ) + ( FILLER_514 VDDIO ) ( FILLER_728 VDDIO ) + ( FILLER_727 VSWITCH ) ( FILLER_513 VSWITCH ) + ( FILLER_513 VDDIO ) ( FILLER_727 VDDIO ) + ( FILLER_512 VSWITCH ) ( FILLER_512 VDDIO ) + ( FILLER_511 VSWITCH ) ( FILLER_726 VSWITCH ) + ( FILLER_726 VDDIO ) ( FILLER_511 VDDIO ) + ( FILLER_725 VSWITCH ) ( FILLER_725 VDDIO ) + ( FILLER_722 VSWITCH ) ( FILLER_724 VSWITCH ) + ( FILLER_724 VDDIO ) ( FILLER_723 VSWITCH ) + ( FILLER_723 VDDIO ) ( FILLER_722 VDDIO ) + ( FILLER_507 VSWITCH ) ( FILLER_509 VSWITCH ) + ( mprj_pads.area2_io_pad\[2\] VSWITCH ) ( FILLER_509 VDDIO ) + ( mprj_pads.area2_io_pad\[2\] VDDIO ) ( FILLER_508 VSWITCH ) + ( FILLER_508 VDDIO ) ( FILLER_507 VDDIO ) + ( FILLER_718 VSWITCH ) ( FILLER_506 VSWITCH ) + ( FILLER_506 VDDIO ) ( FILLER_505 VSWITCH ) + ( FILLER_505 VDDIO ) ( FILLER_719 VSWITCH ) + ( FILLER_720 VSWITCH ) ( mprj_pads.area1_io_pad\[10\] VSWITCH ) + ( FILLER_719 VDDIO ) ( FILLER_720 VDDIO ) + ( mprj_pads.area1_io_pad\[10\] VDDIO ) ( FILLER_504 VSWITCH ) + ( FILLER_504 VDDIO ) ( FILLER_718 VDDIO ) + ( FILLER_503 VSWITCH ) ( FILLER_503 VDDIO ) + ( FILLER_501 VSWITCH ) ( FILLER_717 VSWITCH ) + ( FILLER_717 VDDIO ) ( FILLER_502 VSWITCH ) + ( FILLER_502 VDDIO ) ( FILLER_501 VDDIO ) + ( FILLER_715 VSWITCH ) ( FILLER_716 VSWITCH ) + ( FILLER_716 VDDIO ) ( FILLER_715 VDDIO ) + ( FILLER_712 VSWITCH ) ( FILLER_714 VSWITCH ) + ( FILLER_714 VDDIO ) ( FILLER_713 VSWITCH ) + ( FILLER_713 VDDIO ) ( FILLER_712 VDDIO ) + ( FILLER_497 VSWITCH ) ( FILLER_499 VSWITCH ) + ( mprj_pads.area2_io_pad\[3\] VSWITCH ) ( FILLER_499 VDDIO ) + ( mprj_pads.area2_io_pad\[3\] VDDIO ) ( FILLER_498 VSWITCH ) + ( FILLER_498 VDDIO ) ( FILLER_497 VDDIO ) + ( FILLER_493 VSWITCH ) ( FILLER_496 VSWITCH ) + ( FILLER_496 VDDIO ) ( FILLER_495 VSWITCH ) + ( FILLER_495 VDDIO ) ( FILLER_494 VSWITCH ) + ( FILLER_494 VDDIO ) ( mprj_pads.area1_io_pad\[9\] VSWITCH ) + ( mprj_pads.area1_io_pad\[9\] VDDIO ) ( FILLER_710 VSWITCH ) + ( FILLER_710 VDDIO ) ( FILLER_493 VDDIO ) + ( FILLER_709 VSWITCH ) ( FILLER_709 VDDIO ) + ( FILLER_491 VSWITCH ) ( FILLER_492 VSWITCH ) + ( FILLER_492 VDDIO ) ( FILLER_708 VSWITCH ) + ( FILLER_708 VDDIO ) ( FILLER_491 VDDIO ) + ( FILLER_707 VSWITCH ) ( FILLER_707 VDDIO ) + ( FILLER_703 VSWITCH ) ( FILLER_706 VSWITCH ) + ( FILLER_706 VDDIO ) ( FILLER_705 VSWITCH ) + ( FILLER_705 VDDIO ) ( FILLER_704 VSWITCH ) + ( FILLER_704 VDDIO ) ( FILLER_489 VSWITCH ) + ( mprj_pads.area2_io_pad\[4\] VSWITCH ) ( FILLER_489 VDDIO ) + ( mprj_pads.area2_io_pad\[4\] VDDIO ) ( FILLER_488 VSWITCH ) + ( FILLER_488 VDDIO ) ( FILLER_703 VDDIO ) + ( FILLER_487 VSWITCH ) ( FILLER_487 VDDIO ) + ( FILLER_483 VSWITCH ) ( FILLER_486 VSWITCH ) + ( FILLER_486 VDDIO ) ( FILLER_485 VSWITCH ) + ( FILLER_485 VDDIO ) ( FILLER_484 VSWITCH ) + ( FILLER_484 VDDIO ) ( FILLER_701 VSWITCH ) + ( mprj_pads.area1_io_pad\[8\] VSWITCH ) ( FILLER_701 VDDIO ) + ( mprj_pads.area1_io_pad\[8\] VDDIO ) ( FILLER_483 VDDIO ) + ( FILLER_700 VSWITCH ) ( FILLER_700 VDDIO ) + ( FILLER_699 VSWITCH ) ( FILLER_482 VSWITCH ) + ( FILLER_482 VDDIO ) ( FILLER_699 VDDIO ) + ( FILLER_481 VSWITCH ) ( FILLER_481 VDDIO ) + ( FILLER_698 VSWITCH ) ( FILLER_698 VDDIO ) + ( FILLER_697 VSWITCH ) ( FILLER_697 VDDIO ) + ( FILLER_696 VSWITCH ) ( FILLER_696 VDDIO ) + ( FILLER_695 VSWITCH ) ( FILLER_695 VDDIO ) + ( FILLER_694 VSWITCH ) ( FILLER_694 VDDIO ) + ( FILLER_477 VSWITCH ) ( FILLER_478 VSWITCH ) + ( FILLER_479 VSWITCH ) ( mprj_pads.area2_io_pad\[5\] VSWITCH ) + ( FILLER_478 VDDIO ) ( FILLER_479 VDDIO ) + ( mprj_pads.area2_io_pad\[5\] VDDIO ) ( FILLER_477 VDDIO ) + ( FILLER_693 VSWITCH ) ( FILLER_693 VDDIO ) + ( FILLER_473 VSWITCH ) ( FILLER_476 VSWITCH ) + ( FILLER_476 VDDIO ) ( FILLER_475 VSWITCH ) + ( FILLER_475 VDDIO ) ( FILLER_474 VSWITCH ) + ( FILLER_474 VDDIO ) ( FILLER_473 VDDIO ) + ( FILLER_471 VSWITCH ) ( mprj_pads.area1_io_pad\[7\] VSWITCH ) + ( mprj_pads.area1_io_pad\[7\] VDDIO ) ( FILLER_691 VSWITCH ) + ( FILLER_691 VDDIO ) ( FILLER_472 VSWITCH ) + ( FILLER_472 VDDIO ) ( FILLER_690 VSWITCH ) + ( FILLER_690 VDDIO ) ( FILLER_471 VDDIO ) + ( FILLER_689 VSWITCH ) ( FILLER_689 VDDIO ) + ( FILLER_468 VSWITCH ) ( FILLER_688 VSWITCH ) + ( FILLER_688 VDDIO ) ( FILLER_687 VSWITCH ) + ( FILLER_687 VDDIO ) ( FILLER_686 VSWITCH ) + ( FILLER_686 VDDIO ) ( mprj_pads.area2_io_pad\[6\] VSWITCH ) + ( mprj_pads.area2_io_pad\[6\] VDDIO ) ( FILLER_469 VSWITCH ) + ( FILLER_468 VDDIO ) ( FILLER_469 VDDIO ) + ( FILLER_685 VSWITCH ) ( FILLER_685 VDDIO ) + ( FILLER_684 VSWITCH ) ( FILLER_467 VSWITCH ) + ( FILLER_467 VDDIO ) ( FILLER_684 VDDIO ) + ( FILLER_464 VSWITCH ) ( FILLER_466 VSWITCH ) + ( FILLER_466 VDDIO ) ( FILLER_465 VSWITCH ) + ( FILLER_465 VDDIO ) ( FILLER_464 VDDIO ) + ( user1_vdda_hvclamp_pad\[1\] VSWITCH ) ( FILLER_463 VSWITCH ) + ( FILLER_463 VDDIO ) ( FILLER_682 VSWITCH ) + ( user1_vdda_hvclamp_pad\[1\] VDDIO ) ( FILLER_682 VDDIO ) + ( FILLER_681 VSWITCH ) ( FILLER_462 VSWITCH ) + ( FILLER_462 VDDIO ) ( FILLER_681 VDDIO ) + ( FILLER_461 VSWITCH ) ( FILLER_461 VDDIO ) + ( FILLER_680 VSWITCH ) ( FILLER_680 VDDIO ) + ( FILLER_679 VSWITCH ) ( FILLER_679 VDDIO ) + ( FILLER_678 VSWITCH ) ( FILLER_678 VDDIO ) + ( FILLER_677 VSWITCH ) ( FILLER_677 VDDIO ) + ( FILLER_457 VSWITCH ) ( FILLER_458 VSWITCH ) + ( FILLER_459 VSWITCH ) ( user2_vdda_hvclamp_pad VSWITCH ) + ( FILLER_458 VDDIO ) ( FILLER_459 VDDIO ) + ( user2_vdda_hvclamp_pad VDDIO ) ( FILLER_457 VDDIO ) + ( FILLER_676 VSWITCH ) ( FILLER_676 VDDIO ) + ( FILLER_675 VSWITCH ) ( FILLER_675 VDDIO ) + ( FILLER_454 VSWITCH ) ( FILLER_456 VSWITCH ) + ( FILLER_456 VDDIO ) ( FILLER_455 VSWITCH ) + ( FILLER_455 VDDIO ) ( FILLER_454 VDDIO ) + ( FILLER_452 VSWITCH ) ( FILLER_453 VSWITCH ) + ( FILLER_453 VDDIO ) ( FILLER_673 VSWITCH ) + ( user1_vssd_lvclamp_pad VSWITCH ) ( FILLER_673 VDDIO ) + ( user1_vssd_lvclamp_pad VDDIO ) ( FILLER_452 VDDIO ) + ( FILLER_672 VSWITCH ) ( FILLER_672 VDDIO ) + ( FILLER_451 VSWITCH ) ( FILLER_451 VDDIO ) + ( FILLER_668 VSWITCH ) ( FILLER_671 VSWITCH ) + ( FILLER_671 VDDIO ) ( FILLER_670 VSWITCH ) + ( FILLER_670 VDDIO ) ( FILLER_669 VSWITCH ) + ( FILLER_669 VDDIO ) ( FILLER_668 VDDIO ) + ( FILLER_448 VSWITCH ) ( FILLER_449 VSWITCH ) + ( user2_vssd_lvclamp_pad VSWITCH ) ( FILLER_449 VDDIO ) + ( user2_vssd_lvclamp_pad VDDIO ) ( FILLER_667 VSWITCH ) + ( FILLER_667 VDDIO ) ( FILLER_448 VDDIO ) + ( FILLER_665 VSWITCH ) ( FILLER_447 VSWITCH ) + ( FILLER_447 VDDIO ) ( FILLER_666 VSWITCH ) + ( FILLER_666 VDDIO ) ( FILLER_446 VSWITCH ) + ( FILLER_446 VDDIO ) ( FILLER_665 VDDIO ) + ( FILLER_444 VSWITCH ) ( FILLER_445 VSWITCH ) + ( FILLER_445 VDDIO ) ( FILLER_444 VDDIO ) + ( user1_vssa_hvclamp_pad\[1\] VSWITCH ) ( FILLER_443 VSWITCH ) + ( FILLER_443 VDDIO ) ( FILLER_442 VSWITCH ) + ( FILLER_442 VDDIO ) ( FILLER_663 VSWITCH ) + ( user1_vssa_hvclamp_pad\[1\] VDDIO ) ( FILLER_663 VDDIO ) + ( FILLER_441 VSWITCH ) ( FILLER_441 VDDIO ) + ( FILLER_662 VSWITCH ) ( FILLER_662 VDDIO ) + ( FILLER_661 VSWITCH ) ( FILLER_661 VDDIO ) + ( FILLER_660 VSWITCH ) ( FILLER_660 VDDIO ) + ( FILLER_659 VSWITCH ) ( FILLER_659 VDDIO ) + ( FILLER_438 VSWITCH ) ( FILLER_439 VSWITCH ) + ( mprj_pads.area2_io_pad\[7\] VSWITCH ) ( FILLER_438 VDDIO ) + ( FILLER_439 VDDIO ) ( mprj_pads.area2_io_pad\[7\] VDDIO ) + ( FILLER_658 VSWITCH ) ( FILLER_658 VDDIO ) + ( FILLER_657 VSWITCH ) ( FILLER_437 VSWITCH ) + ( FILLER_437 VDDIO ) ( FILLER_657 VDDIO ) + ( FILLER_656 VSWITCH ) ( FILLER_436 VSWITCH ) + ( FILLER_436 VDDIO ) ( FILLER_656 VDDIO ) + ( FILLER_434 VSWITCH ) ( FILLER_435 VSWITCH ) + ( FILLER_435 VDDIO ) ( FILLER_434 VDDIO ) + ( FILLER_654 VSWITCH ) ( FILLER_433 VSWITCH ) + ( FILLER_433 VDDIO ) ( FILLER_432 VSWITCH ) + ( FILLER_432 VDDIO ) ( mprj_pads.area1_io_pad\[6\] VSWITCH ) + ( FILLER_654 VDDIO ) ( mprj_pads.area1_io_pad\[6\] VDDIO ) + ( FILLER_431 VSWITCH ) ( FILLER_431 VDDIO ) + ( FILLER_650 VSWITCH ) ( FILLER_653 VSWITCH ) + ( FILLER_653 VDDIO ) ( FILLER_652 VSWITCH ) + ( FILLER_652 VDDIO ) ( FILLER_651 VSWITCH ) + ( FILLER_651 VDDIO ) ( FILLER_650 VDDIO ) + ( FILLER_429 VSWITCH ) ( mprj_pads.area2_io_pad\[8\] VSWITCH ) + ( mprj_pads.area2_io_pad\[8\] VDDIO ) ( FILLER_649 VSWITCH ) + ( FILLER_649 VDDIO ) ( FILLER_429 VDDIO ) + ( FILLER_428 VSWITCH ) ( FILLER_646 VSWITCH ) + ( FILLER_428 VDDIO ) ( FILLER_427 VSWITCH ) + ( FILLER_427 VDDIO ) ( FILLER_648 VSWITCH ) + ( FILLER_648 VDDIO ) ( FILLER_426 VSWITCH ) + ( FILLER_426 VDDIO ) ( FILLER_647 VSWITCH ) + ( FILLER_647 VDDIO ) ( FILLER_425 VSWITCH ) + ( FILLER_425 VDDIO ) ( FILLER_646 VDDIO ) + ( FILLER_424 VSWITCH ) ( FILLER_424 VDDIO ) + ( FILLER_422 VSWITCH ) ( FILLER_423 VSWITCH ) + ( FILLER_423 VDDIO ) ( FILLER_422 VDDIO ) + ( FILLER_421 VSWITCH ) ( FILLER_421 VDDIO ) + ( FILLER_641 VSWITCH ) ( mprj_pads.area1_io_pad\[5\] VSWITCH ) + ( mprj_pads.area1_io_pad\[5\] VDDIO ) ( FILLER_644 VSWITCH ) + ( FILLER_644 VDDIO ) ( FILLER_643 VSWITCH ) + ( FILLER_643 VDDIO ) ( FILLER_642 VSWITCH ) + ( FILLER_642 VDDIO ) ( FILLER_641 VDDIO ) + ( FILLER_637 VSWITCH ) ( FILLER_419 VSWITCH ) + ( mprj_pads.area2_io_pad\[9\] VSWITCH ) ( FILLER_419 VDDIO ) + ( mprj_pads.area2_io_pad\[9\] VDDIO ) ( FILLER_418 VSWITCH ) + ( FILLER_418 VDDIO ) ( FILLER_640 VSWITCH ) + ( FILLER_640 VDDIO ) ( FILLER_417 VSWITCH ) + ( FILLER_417 VDDIO ) ( FILLER_639 VSWITCH ) + ( FILLER_639 VDDIO ) ( FILLER_416 VSWITCH ) + ( FILLER_416 VDDIO ) ( FILLER_638 VSWITCH ) + ( FILLER_638 VDDIO ) ( FILLER_415 VSWITCH ) + ( FILLER_415 VDDIO ) ( FILLER_637 VDDIO ) + ( FILLER_414 VSWITCH ) ( FILLER_414 VDDIO ) + ( FILLER_412 VSWITCH ) ( FILLER_413 VSWITCH ) + ( FILLER_413 VDDIO ) ( FILLER_412 VDDIO ) + ( FILLER_411 VSWITCH ) ( FILLER_411 VDDIO ) + ( mprj_pads.area1_io_pad\[4\] VSWITCH ) + ( mprj_pads.area1_io_pad\[4\] VDDIO ) ( FILLER_635 VSWITCH ) + ( FILLER_635 VDDIO ) ( FILLER_634 VSWITCH ) + ( FILLER_634 VDDIO ) ( FILLER_633 VSWITCH ) + ( FILLER_633 VDDIO ) ( FILLER_632 VSWITCH ) + ( FILLER_409 VSWITCH ) ( mprj_pads.area2_io_pad\[10\] VSWITCH ) + ( FILLER_409 VDDIO ) ( mprj_pads.area2_io_pad\[10\] VDDIO ) + ( FILLER_632 VDDIO ) ( FILLER_631 VSWITCH ) + ( FILLER_408 VSWITCH ) ( FILLER_408 VDDIO ) + ( FILLER_407 VSWITCH ) ( FILLER_407 VDDIO ) + ( FILLER_631 VDDIO ) ( FILLER_630 VSWITCH ) + ( FILLER_406 VSWITCH ) ( FILLER_406 VDDIO ) + ( FILLER_630 VDDIO ) ( FILLER_405 VSWITCH ) + ( FILLER_405 VDDIO ) ( FILLER_629 VSWITCH ) + ( FILLER_629 VDDIO ) ( FILLER_628 VSWITCH ) + ( FILLER_404 VSWITCH ) ( FILLER_404 VDDIO ) + ( FILLER_628 VDDIO ) ( FILLER_402 VSWITCH ) + ( FILLER_403 VSWITCH ) ( FILLER_403 VDDIO ) + ( FILLER_402 VDDIO ) ( FILLER_401 VSWITCH ) + ( FILLER_401 VDDIO ) ( FILLER_624 VSWITCH ) + ( mprj_pads.area1_io_pad\[3\] VSWITCH ) + ( mprj_pads.area1_io_pad\[3\] VDDIO ) ( FILLER_625 VSWITCH ) + ( FILLER_626 VSWITCH ) ( FILLER_625 VDDIO ) + ( FILLER_626 VDDIO ) ( FILLER_624 VDDIO ) + ( FILLER_620 VSWITCH ) ( FILLER_623 VSWITCH ) + ( FILLER_623 VDDIO ) ( FILLER_399 VSWITCH ) + ( mprj_pads.area2_io_pad\[11\] VSWITCH ) ( FILLER_399 VDDIO ) + ( mprj_pads.area2_io_pad\[11\] VDDIO ) ( FILLER_398 VSWITCH ) + ( FILLER_398 VDDIO ) ( FILLER_622 VSWITCH ) + ( FILLER_622 VDDIO ) ( FILLER_397 VSWITCH ) + ( FILLER_397 VDDIO ) ( FILLER_621 VSWITCH ) + ( FILLER_621 VDDIO ) ( FILLER_396 VSWITCH ) + ( FILLER_396 VDDIO ) ( FILLER_620 VDDIO ) + ( FILLER_395 VSWITCH ) ( FILLER_395 VDDIO ) + ( FILLER_618 VSWITCH ) ( FILLER_619 VSWITCH ) + ( FILLER_619 VDDIO ) ( FILLER_394 VSWITCH ) + ( FILLER_394 VDDIO ) ( FILLER_618 VDDIO ) + ( FILLER_392 VSWITCH ) ( FILLER_393 VSWITCH ) + ( FILLER_393 VDDIO ) ( FILLER_392 VDDIO ) + ( FILLER_391 VSWITCH ) ( FILLER_391 VDDIO ) + ( FILLER_615 VSWITCH ) ( FILLER_616 VSWITCH ) + ( mprj_pads.area1_io_pad\[2\] VSWITCH ) ( FILLER_616 VDDIO ) + ( mprj_pads.area1_io_pad\[2\] VDDIO ) ( FILLER_615 VDDIO ) + ( FILLER_385 VSWITCH ) ( FILLER_614 VSWITCH ) + ( FILLER_614 VDDIO ) ( FILLER_388 VSWITCH ) + ( FILLER_389 VSWITCH ) ( mprj_pads.area2_io_pad\[12\] VSWITCH ) + ( FILLER_388 VDDIO ) ( FILLER_389 VDDIO ) + ( mprj_pads.area2_io_pad\[12\] VDDIO ) ( FILLER_387 VSWITCH ) + ( FILLER_387 VDDIO ) ( FILLER_613 VSWITCH ) + ( FILLER_613 VDDIO ) ( FILLER_386 VSWITCH ) + ( FILLER_386 VDDIO ) ( FILLER_612 VSWITCH ) + ( FILLER_612 VDDIO ) ( FILLER_385 VDDIO ) + ( FILLER_611 VSWITCH ) ( FILLER_611 VDDIO ) + ( FILLER_384 VSWITCH ) ( FILLER_384 VDDIO ) + ( FILLER_383 VSWITCH ) ( FILLER_610 VSWITCH ) + ( FILLER_610 VDDIO ) ( FILLER_383 VDDIO ) + ( FILLER_609 VSWITCH ) ( FILLER_609 VDDIO ) + ( FILLER_382 VSWITCH ) ( FILLER_382 VDDIO ) + ( FILLER_381 VSWITCH ) ( FILLER_381 VDDIO ) + ( FILLER_380 VSWITCH ) ( FILLER_380 VDDIO ) + ( FILLER_379 VSWITCH ) ( FILLER_379 VDDIO ) + ( FILLER_606 VSWITCH ) ( FILLER_607 VSWITCH ) + ( mprj_pads.area1_io_pad\[1\] VSWITCH ) ( FILLER_607 VDDIO ) + ( mprj_pads.area1_io_pad\[1\] VDDIO ) ( FILLER_606 VDDIO ) + ( FILLER_378 VSWITCH ) ( FILLER_378 VDDIO ) + ( FILLER_377 VSWITCH ) ( FILLER_605 VSWITCH ) + ( FILLER_605 VDDIO ) ( FILLER_377 VDDIO ) + ( FILLER_376 VSWITCH ) ( FILLER_604 VSWITCH ) + ( FILLER_604 VDDIO ) ( FILLER_376 VDDIO ) + ( FILLER_375 VSWITCH ) ( FILLER_603 VSWITCH ) + ( FILLER_603 VDDIO ) ( FILLER_375 VDDIO ) + ( FILLER_602 VSWITCH ) ( FILLER_602 VDDIO ) + ( FILLER_374 VSWITCH ) ( FILLER_SB2 VSWITCH ) + ( FILLER_374 VDDIO ) ( FILLER_SB2 VDDIO ) + ( disconnect_vdda_2 VSWITCH ) ( disconnect_vdda_2 VDDIO ) + ( FILLER_601 VSWITCH ) ( FILLER_601 VDDIO ) + ( FILLER_600 VSWITCH ) ( FILLER_600 VDDIO ) + ( FILLER_367 VSWITCH ) ( FILLER_599 VSWITCH ) + ( FILLER_599 VDDIO ) ( FILLER_370 VSWITCH ) + ( mgmt_vddio_hvclamp_pad\[0\] VSWITCH ) ( FILLER_370 VDDIO ) + ( mgmt_vddio_hvclamp_pad\[0\] VDDIO ) ( FILLER_369 VSWITCH ) + ( FILLER_369 VDDIO ) ( FILLER_368 VSWITCH ) + ( FILLER_368 VDDIO ) ( FILLER_367 VDDIO ) + ( mprj_pads.area1_io_pad\[0\] VSWITCH ) + ( mprj_pads.area1_io_pad\[0\] VDDIO ) ( FILLER_597 VSWITCH ) + ( FILLER_597 VDDIO ) ( FILLER_596 VSWITCH ) + ( FILLER_366 VSWITCH ) ( FILLER_366 VDDIO ) + ( FILLER_596 VDDIO ) ( FILLER_595 VSWITCH ) + ( FILLER_365 VSWITCH ) ( FILLER_365 VDDIO ) + ( FILLER_595 VDDIO ) ( FILLER_594 VSWITCH ) + ( FILLER_364 VSWITCH ) ( FILLER_364 VDDIO ) + ( FILLER_594 VDDIO ) ( FILLER_363 VSWITCH ) + ( FILLER_363 VDDIO ) ( FILLER_593 VSWITCH ) + ( FILLER_593 VDDIO ) ( FILLER_362 VSWITCH ) + ( FILLER_362 VDDIO ) ( FILLER_592 VSWITCH ) + ( FILLER_592 VDDIO ) ( FILLER_591 VSWITCH ) + ( FILLER_591 VDDIO ) ( FILLER_590 VSWITCH ) + ( FILLER_590 VDDIO ) ( FILLER_587 VSWITCH ) + ( FILLER_SB1 VSWITCH ) ( disconnect_vdda_1 VSWITCH ) + ( FILLER_SB1 VDDIO ) ( disconnect_vdda_1 VDDIO ) + ( FILLER_587 VDDIO ) ( FILLER_586 VSWITCH ) + ( FILLER_360 VSWITCH ) ( mgmt_vccd_lvclamp_pad VSWITCH ) + ( FILLER_360 VDDIO ) ( mgmt_vccd_lvclamp_pad VDDIO ) + ( FILLER_359 VSWITCH ) ( FILLER_359 VDDIO ) + ( FILLER_358 VSWITCH ) ( FILLER_358 VDDIO ) + ( FILLER_586 VDDIO ) ( FILLER_357 VSWITCH ) + ( FILLER_357 VDDIO ) ( FILLER_585 VSWITCH ) + ( FILLER_585 VDDIO ) ( FILLER_584 VSWITCH ) + ( FILLER_356 VSWITCH ) ( FILLER_356 VDDIO ) + ( FILLER_584 VDDIO ) ( FILLER_583 VSWITCH ) + ( FILLER_583 VDDIO ) ( FILLER_582 VSWITCH ) + ( FILLER_355 VSWITCH ) ( FILLER_355 VDDIO ) + ( FILLER_582 VDDIO ) ( FILLER_581 VSWITCH ) + ( FILLER_354 VSWITCH ) ( FILLER_354 VDDIO ) + ( FILLER_581 VDDIO ) ( FILLER_353 VSWITCH ) + ( FILLER_353 VDDIO ) ( mgmt_corner\[1\] VDDIO ) + ( FILLER_352 VSWITCH ) ( FILLER_352 VDDIO ) + ( FILLER_580 VSWITCH ) ( FILLER_580 VDDIO ) + ( FILLER_351 VDDIO ) ( FILLER_350 VDDIO ) ( FILLER_349 VDDIO ) + ( FILLER_348 VDDIO ) ( FILLER_347 VDDIO ) ( FILLER_346 VDDIO ) + ( bus_tie_72 VDDIO ) ( bus_tie_71 VDDIO ) ( bus_tie_70 VDDIO ) + ( bus_tie_69 VDDIO ) ( bus_tie_68 VDDIO ) ( FILLER_339 VDDIO ) + ( bus_tie_67 VDDIO ) ( FILLER_336 VDDIO ) ( FILLER_338 VDDIO ) + ( FILLER_337 VDDIO ) ( FILLER_335 VDDIO ) ( FILLER_331 VDDIO ) + ( FILLER_332 VDDIO ) ( FILLER_333 VDDIO ) + ( mgmt_vdda_hvclamp_pad VDDIO ) ( FILLER_329 VDDIO ) + ( FILLER_330 VDDIO ) ( bus_tie_65 VDDIO ) ( bus_tie_66 VDDIO ) + ( FILLER_321 VDDIO ) ( bus_tie_64 VDDIO ) ( bus_tie_63 VDDIO ) + ( bus_tie_62 VDDIO ) ( FILLER_322 VDDIO ) ( bus_tie_61 VDDIO ) + ( FILLER_318 VDDIO ) ( FILLER_320 VDDIO ) ( FILLER_319 VDDIO ) + ( FILLER_313 VDDIO ) ( FILLER_315 VDDIO ) ( FILLER_316 VDDIO ) + ( mgmt_vssio_hvclamp_pad\[0\] VDDIO ) ( FILLER_314 VDDIO ) + ( FILLER_312 VDDIO ) ( bus_tie_58 VDDIO ) ( bus_tie_60 VDDIO ) + ( bus_tie_59 VDDIO ) ( bus_tie_56 VDDIO ) ( bus_tie_57 VDDIO ) + ( FILLER_301 VDDIO ) ( FILLER_304 VDDIO ) ( FILLER_305 VDDIO ) + ( bus_tie_55 VDDIO ) ( FILLER_303 VDDIO ) ( FILLER_302 VDDIO ) + ( FILLER_295 VDDIO ) ( FILLER_299 VDDIO ) ( clock_pad VDDIO ) + ( FILLER_297 VDDIO ) ( FILLER_298 VDDIO ) ( FILLER_296 VDDIO ) + ( bus_tie_54 VDDIO ) ( bus_tie_53 VDDIO ) ( bus_tie_52 VDDIO ) + ( bus_tie_51 VDDIO ) ( bus_tie_50 VDDIO ) ( FILLER_286 VDDIO ) + ( FILLER_287 VDDIO ) ( FILLER_288 VDDIO ) ( bus_tie_49 VDDIO ) + ( FILLER_285 VDDIO ) ( FILLER_284 VDDIO ) ( FILLER_279 VDDIO ) + ( flash_io1_pad VDDIO ) ( FILLER_280 VDDIO ) + ( FILLER_281 VDDIO ) ( FILLER_282 VDDIO ) ( FILLER_278 VDDIO ) + ( bus_tie_46 VDDIO ) ( bus_tie_48 VDDIO ) ( bus_tie_47 VDDIO ) + ( FILLER_268 VDDIO ) ( bus_tie_45 VDDIO ) ( bus_tie_44 VDDIO ) + ( FILLER_270 VDDIO ) ( FILLER_271 VDDIO ) ( bus_tie_43 VDDIO ) + ( FILLER_269 VDDIO ) ( FILLER_267 VDDIO ) ( FILLER_261 VDDIO ) + ( FILLER_264 VDDIO ) ( FILLER_265 VDDIO ) + ( flash_io0_pad VDDIO ) ( FILLER_263 VDDIO ) + ( FILLER_262 VDDIO ) ( bus_tie_39 VDDIO ) ( bus_tie_42 VDDIO ) + ( bus_tie_41 VDDIO ) ( bus_tie_40 VDDIO ) ( FILLER_251 VDDIO ) + ( bus_tie_38 VDDIO ) ( FILLER_253 VDDIO ) ( FILLER_254 VDDIO ) + ( bus_tie_37 VDDIO ) ( FILLER_252 VDDIO ) ( FILLER_250 VDDIO ) + ( FILLER_244 VDDIO ) ( FILLER_247 VDDIO ) ( FILLER_248 VDDIO ) + ( flash_clk_pad VDDIO ) ( FILLER_246 VDDIO ) + ( FILLER_245 VDDIO ) ( bus_tie_36 VDDIO ) ( bus_tie_35 VDDIO ) + ( bus_tie_34 VDDIO ) ( bus_tie_33 VDDIO ) ( bus_tie_32 VDDIO ) + ( FILLER_235 VDDIO ) ( FILLER_236 VDDIO ) ( FILLER_237 VDDIO ) + ( bus_tie_31 VDDIO ) ( FILLER_234 VDDIO ) ( FILLER_233 VDDIO ) + ( FILLER_227 VDDIO ) ( FILLER_230 VDDIO ) ( FILLER_231 VDDIO ) + ( flash_csb_pad VDDIO ) ( FILLER_229 VDDIO ) + ( FILLER_228 VDDIO ) ( bus_tie_27 VDDIO ) ( bus_tie_30 VDDIO ) + ( bus_tie_29 VDDIO ) ( bus_tie_28 VDDIO ) ( FILLER_216 VDDIO ) + ( bus_tie_26 VDDIO ) ( FILLER_220 VDDIO ) ( bus_tie_25 VDDIO ) + ( FILLER_218 VDDIO ) ( FILLER_219 VDDIO ) ( FILLER_217 VDDIO ) + ( FILLER_210 VDDIO ) ( FILLER_214 VDDIO ) + ( mgmt_vssd_lvclamp_pad VDDIO ) ( FILLER_212 VDDIO ) + ( FILLER_213 VDDIO ) ( FILLER_211 VDDIO ) ( bus_tie_24 VDDIO ) + ( bus_tie_20 VDDIO ) ( bus_tie_23 VDDIO ) ( bus_tie_22 VDDIO ) + ( bus_tie_21 VDDIO ) ( FILLER_199 VDDIO ) ( FILLER_202 VDDIO ) + ( FILLER_203 VDDIO ) ( bus_tie_19 VDDIO ) ( FILLER_201 VDDIO ) + ( FILLER_200 VDDIO ) ( FILLER_195 VDDIO ) ( bus_tie_9 VDDIO ) + ( FILLER_196 VDDIO ) ( FILLER_197 VDDIO ) ( FILLER_193 VDDIO ) + ( FILLER_194 VDDIO ) ( bus_tie_17 VDDIO ) ( bus_tie_18 VDDIO ) + ( bus_tie_14 VDDIO ) ( bus_tie_16 VDDIO ) ( bus_tie_15 VDDIO ) + ( FILLER_182 VDDIO ) ( FILLER_185 VDDIO ) ( FILLER_186 VDDIO ) + ( bus_tie_13 VDDIO ) ( FILLER_184 VDDIO ) ( FILLER_183 VDDIO ) + ( FILLER_177 VDDIO ) ( FILLER_179 VDDIO ) ( FILLER_180 VDDIO ) + ( resetb_pad VDDIO ) ( FILLER_178 VDDIO ) ( FILLER_176 VDDIO ) + ( bus_tie_12 VDDIO ) ( bus_tie_11 VDDIO ) ( bus_tie_10 VDDIO ) + ( bus_tie_8 VDDIO ) ( bus_tie_7 VDDIO ) ( FILLER_168 VDDIO ) + ( FILLER_169 VDDIO ) ( bus_tie_6 VDDIO ) ( FILLER_166 VDDIO ) + ( FILLER_167 VDDIO ) ( FILLER_165 VDDIO ) ( FILLER_160 VDDIO ) + ( FILLER_163 VDDIO ) ( mgmt_vssa_hvclamp_pad VDDIO ) + ( FILLER_161 VDDIO ) ( FILLER_162 VDDIO ) ( FILLER_159 VDDIO ) + ( bus_tie_4 VDDIO ) ( bus_tie_5 VDDIO ) ( bus_tie_3 VDDIO ) + ( FILLER_149 VDDIO ) ( bus_tie_2 VDDIO ) ( bus_tie_1 VDDIO ) + ( FILLER_151 VDDIO ) ( FILLER_152 VDDIO ) ( gpio_pad VSWITCH ) + ( FILLER_150 VDDIO ) ( mgmt_corner\[0\] VDDIO ) + ( FILLER_148 VDDIO ) ( mgmt_corner\[1\] VSWITCH ) + ( FILLER_351 VSWITCH ) ( FILLER_350 VSWITCH ) + ( FILLER_349 VSWITCH ) ( FILLER_348 VSWITCH ) + ( FILLER_347 VSWITCH ) ( FILLER_346 VSWITCH ) + ( bus_tie_72 VSWITCH ) ( bus_tie_71 VSWITCH ) + ( bus_tie_70 VSWITCH ) ( bus_tie_69 VSWITCH ) + ( bus_tie_68 VSWITCH ) ( FILLER_339 VSWITCH ) + ( bus_tie_67 VSWITCH ) ( FILLER_336 VSWITCH ) + ( FILLER_338 VSWITCH ) ( FILLER_337 VSWITCH ) + ( FILLER_335 VSWITCH ) ( FILLER_331 VSWITCH ) + ( FILLER_332 VSWITCH ) ( FILLER_333 VSWITCH ) + ( mgmt_vdda_hvclamp_pad VSWITCH ) ( FILLER_329 VSWITCH ) + ( FILLER_330 VSWITCH ) ( bus_tie_65 VSWITCH ) + ( bus_tie_66 VSWITCH ) ( FILLER_321 VSWITCH ) + ( bus_tie_64 VSWITCH ) ( bus_tie_63 VSWITCH ) + ( bus_tie_62 VSWITCH ) ( FILLER_322 VSWITCH ) + ( bus_tie_61 VSWITCH ) ( FILLER_318 VSWITCH ) + ( FILLER_320 VSWITCH ) ( FILLER_319 VSWITCH ) + ( FILLER_313 VSWITCH ) ( FILLER_315 VSWITCH ) + ( FILLER_316 VSWITCH ) ( mgmt_vssio_hvclamp_pad\[0\] VSWITCH ) + ( FILLER_314 VSWITCH ) ( FILLER_312 VSWITCH ) + ( bus_tie_58 VSWITCH ) ( bus_tie_60 VSWITCH ) + ( bus_tie_59 VSWITCH ) ( bus_tie_56 VSWITCH ) + ( bus_tie_57 VSWITCH ) ( FILLER_301 VSWITCH ) + ( FILLER_304 VSWITCH ) ( FILLER_305 VSWITCH ) + ( bus_tie_55 VSWITCH ) ( FILLER_303 VSWITCH ) + ( FILLER_302 VSWITCH ) ( FILLER_295 VSWITCH ) + ( FILLER_299 VSWITCH ) ( clock_pad VSWITCH ) + ( FILLER_297 VSWITCH ) ( FILLER_298 VSWITCH ) + ( FILLER_296 VSWITCH ) ( bus_tie_54 VSWITCH ) + ( bus_tie_53 VSWITCH ) ( bus_tie_52 VSWITCH ) + ( bus_tie_51 VSWITCH ) ( bus_tie_50 VSWITCH ) + ( FILLER_286 VSWITCH ) ( FILLER_287 VSWITCH ) + ( FILLER_288 VSWITCH ) ( bus_tie_49 VSWITCH ) + ( FILLER_285 VSWITCH ) ( FILLER_284 VSWITCH ) + ( FILLER_279 VSWITCH ) ( flash_io1_pad VSWITCH ) + ( FILLER_280 VSWITCH ) ( FILLER_281 VSWITCH ) + ( FILLER_282 VSWITCH ) ( FILLER_278 VSWITCH ) + ( bus_tie_46 VSWITCH ) ( bus_tie_48 VSWITCH ) + ( bus_tie_47 VSWITCH ) ( FILLER_268 VSWITCH ) + ( bus_tie_45 VSWITCH ) ( bus_tie_44 VSWITCH ) + ( FILLER_270 VSWITCH ) ( FILLER_271 VSWITCH ) + ( bus_tie_43 VSWITCH ) ( FILLER_269 VSWITCH ) + ( FILLER_267 VSWITCH ) ( FILLER_261 VSWITCH ) + ( FILLER_264 VSWITCH ) ( FILLER_265 VSWITCH ) + ( flash_io0_pad VSWITCH ) ( FILLER_263 VSWITCH ) + ( FILLER_262 VSWITCH ) ( bus_tie_39 VSWITCH ) + ( bus_tie_42 VSWITCH ) ( bus_tie_41 VSWITCH ) + ( bus_tie_40 VSWITCH ) ( FILLER_251 VSWITCH ) + ( bus_tie_38 VSWITCH ) ( FILLER_253 VSWITCH ) + ( FILLER_254 VSWITCH ) ( bus_tie_37 VSWITCH ) + ( FILLER_252 VSWITCH ) ( FILLER_250 VSWITCH ) + ( FILLER_244 VSWITCH ) ( FILLER_247 VSWITCH ) + ( FILLER_248 VSWITCH ) ( flash_clk_pad VSWITCH ) + ( FILLER_246 VSWITCH ) ( FILLER_245 VSWITCH ) + ( bus_tie_36 VSWITCH ) ( bus_tie_35 VSWITCH ) + ( bus_tie_34 VSWITCH ) ( bus_tie_33 VSWITCH ) + ( bus_tie_32 VSWITCH ) ( FILLER_235 VSWITCH ) + ( FILLER_236 VSWITCH ) ( FILLER_237 VSWITCH ) + ( bus_tie_31 VSWITCH ) ( FILLER_234 VSWITCH ) + ( FILLER_233 VSWITCH ) ( FILLER_227 VSWITCH ) + ( FILLER_230 VSWITCH ) ( FILLER_231 VSWITCH ) + ( flash_csb_pad VSWITCH ) ( FILLER_229 VSWITCH ) + ( FILLER_228 VSWITCH ) ( bus_tie_27 VSWITCH ) + ( bus_tie_30 VSWITCH ) ( bus_tie_29 VSWITCH ) + ( bus_tie_28 VSWITCH ) ( FILLER_216 VSWITCH ) + ( bus_tie_26 VSWITCH ) ( FILLER_220 VSWITCH ) + ( bus_tie_25 VSWITCH ) ( FILLER_218 VSWITCH ) + ( FILLER_219 VSWITCH ) ( FILLER_217 VSWITCH ) + ( FILLER_210 VSWITCH ) ( FILLER_214 VSWITCH ) + ( mgmt_vssd_lvclamp_pad VSWITCH ) ( FILLER_212 VSWITCH ) + ( FILLER_213 VSWITCH ) ( FILLER_211 VSWITCH ) + ( bus_tie_24 VSWITCH ) ( bus_tie_20 VSWITCH ) + ( bus_tie_23 VSWITCH ) ( bus_tie_22 VSWITCH ) + ( bus_tie_21 VSWITCH ) ( FILLER_199 VSWITCH ) + ( FILLER_202 VSWITCH ) ( FILLER_203 VSWITCH ) + ( bus_tie_19 VSWITCH ) ( FILLER_201 VSWITCH ) + ( FILLER_200 VSWITCH ) ( FILLER_195 VSWITCH ) + ( bus_tie_9 VSWITCH ) ( FILLER_196 VSWITCH ) + ( FILLER_197 VSWITCH ) ( FILLER_193 VSWITCH ) + ( FILLER_194 VSWITCH ) ( bus_tie_17 VSWITCH ) + ( bus_tie_18 VSWITCH ) ( bus_tie_14 VSWITCH ) + ( bus_tie_16 VSWITCH ) ( bus_tie_15 VSWITCH ) + ( FILLER_182 VSWITCH ) ( FILLER_185 VSWITCH ) + ( FILLER_186 VSWITCH ) ( bus_tie_13 VSWITCH ) + ( FILLER_184 VSWITCH ) ( FILLER_183 VSWITCH ) + ( FILLER_177 VSWITCH ) ( FILLER_179 VSWITCH ) + ( FILLER_180 VSWITCH ) ( resetb_pad VSWITCH ) + ( FILLER_178 VSWITCH ) ( FILLER_176 VSWITCH ) + ( bus_tie_12 VSWITCH ) ( bus_tie_11 VSWITCH ) + ( bus_tie_10 VSWITCH ) ( bus_tie_8 VSWITCH ) + ( bus_tie_7 VSWITCH ) ( FILLER_168 VSWITCH ) + ( FILLER_169 VSWITCH ) ( bus_tie_6 VSWITCH ) + ( FILLER_166 VSWITCH ) ( FILLER_167 VSWITCH ) + ( FILLER_165 VSWITCH ) ( FILLER_160 VSWITCH ) + ( FILLER_163 VSWITCH ) ( mgmt_vssa_hvclamp_pad VSWITCH ) + ( FILLER_161 VSWITCH ) ( FILLER_162 VSWITCH ) + ( FILLER_159 VSWITCH ) ( bus_tie_4 VSWITCH ) + ( bus_tie_5 VSWITCH ) ( bus_tie_3 VSWITCH ) + ( FILLER_149 VSWITCH ) ( bus_tie_2 VSWITCH ) + ( bus_tie_1 VSWITCH ) ( FILLER_151 VSWITCH ) + ( FILLER_152 VSWITCH ) ( FILLER_150 VSWITCH ) + ( FILLER_148 VSWITCH ) ( mgmt_corner\[0\] VSWITCH ) ; + - vdda ( FILLER_367 VDDA ) ( FILLER_370 VDDA ) + ( mgmt_vddio_hvclamp_pad\[0\] VDDA ) ( FILLER_369 VDDA ) + ( FILLER_368 VDDA ) ( FILLER_363 VDDA ) ( FILLER_366 VDDA ) + ( FILLER_365 VDDA ) ( FILLER_364 VDDA ) ( FILLER_362 VDDA ) + ( FILLER_587 VDDA ) ( FILLER_586 VDDA ) ( FILLER_360 VDDA ) + ( mgmt_vccd_lvclamp_pad VDDA ) ( FILLER_359 VDDA ) + ( FILLER_358 VDDA ) ( FILLER_357 VDDA ) ( FILLER_585 VDDA ) + ( FILLER_584 VDDA ) ( FILLER_356 VDDA ) ( FILLER_583 VDDA ) + ( FILLER_582 VDDA ) ( FILLER_355 VDDA ) ( FILLER_581 VDDA ) + ( FILLER_354 VDDA ) ( FILLER_353 VDDA ) + ( mgmt_corner\[1\] VDDA ) ( FILLER_352 VDDA ) + ( FILLER_580 VDDA ) ( FILLER_351 VDDA ) ( FILLER_350 VDDA ) + ( FILLER_349 VDDA ) ( FILLER_348 VDDA ) ( FILLER_347 VDDA ) + ( FILLER_346 VDDA ) ( bus_tie_72 VDDA ) ( bus_tie_71 VDDA ) + ( bus_tie_70 VDDA ) ( bus_tie_69 VDDA ) ( bus_tie_68 VDDA ) + ( FILLER_339 VDDA ) ( bus_tie_67 VDDA ) ( FILLER_336 VDDA ) + ( FILLER_338 VDDA ) ( FILLER_337 VDDA ) ( FILLER_335 VDDA ) + ( FILLER_331 VDDA ) ( FILLER_332 VDDA ) ( FILLER_333 VDDA ) + ( mgmt_vdda_hvclamp_pad VDDA ) ( FILLER_329 VDDA ) + ( FILLER_330 VDDA ) ( bus_tie_65 VDDA ) ( bus_tie_66 VDDA ) + ( FILLER_321 VDDA ) ( bus_tie_64 VDDA ) ( bus_tie_63 VDDA ) + ( bus_tie_62 VDDA ) ( FILLER_322 VDDA ) ( bus_tie_61 VDDA ) + ( FILLER_318 VDDA ) ( FILLER_320 VDDA ) ( FILLER_319 VDDA ) + ( FILLER_313 VDDA ) ( FILLER_315 VDDA ) ( FILLER_316 VDDA ) + ( mgmt_vssio_hvclamp_pad\[0\] VDDA ) ( FILLER_314 VDDA ) + ( FILLER_312 VDDA ) ( bus_tie_58 VDDA ) ( bus_tie_60 VDDA ) + ( bus_tie_59 VDDA ) ( bus_tie_56 VDDA ) ( bus_tie_57 VDDA ) + ( FILLER_301 VDDA ) ( FILLER_304 VDDA ) ( FILLER_305 VDDA ) + ( bus_tie_55 VDDA ) ( FILLER_303 VDDA ) ( FILLER_302 VDDA ) + ( FILLER_295 VDDA ) ( FILLER_299 VDDA ) ( gpio_pad VDDA ) + ( FILLER_297 VDDA ) ( FILLER_298 VDDA ) ( FILLER_296 VDDA ) + ( bus_tie_54 VDDA ) ( bus_tie_53 VDDA ) ( bus_tie_52 VDDA ) + ( bus_tie_51 VDDA ) ( bus_tie_50 VDDA ) ( FILLER_286 VDDA ) + ( FILLER_287 VDDA ) ( FILLER_288 VDDA ) ( bus_tie_49 VDDA ) + ( FILLER_285 VDDA ) ( FILLER_284 VDDA ) ( FILLER_279 VDDA ) + ( flash_io1_pad VDDA ) ( FILLER_280 VDDA ) ( FILLER_281 VDDA ) + ( FILLER_282 VDDA ) ( FILLER_278 VDDA ) ( bus_tie_46 VDDA ) + ( bus_tie_48 VDDA ) ( bus_tie_47 VDDA ) ( FILLER_268 VDDA ) + ( bus_tie_45 VDDA ) ( bus_tie_44 VDDA ) ( FILLER_270 VDDA ) + ( FILLER_271 VDDA ) ( bus_tie_43 VDDA ) ( FILLER_269 VDDA ) + ( FILLER_267 VDDA ) ( FILLER_261 VDDA ) ( FILLER_264 VDDA ) + ( FILLER_265 VDDA ) ( flash_io0_pad VDDA ) ( FILLER_263 VDDA ) + ( FILLER_262 VDDA ) ( bus_tie_39 VDDA ) ( bus_tie_42 VDDA ) + ( bus_tie_41 VDDA ) ( bus_tie_40 VDDA ) ( FILLER_251 VDDA ) + ( bus_tie_38 VDDA ) ( FILLER_253 VDDA ) ( FILLER_254 VDDA ) + ( bus_tie_37 VDDA ) ( FILLER_252 VDDA ) ( FILLER_250 VDDA ) + ( FILLER_244 VDDA ) ( FILLER_247 VDDA ) ( FILLER_248 VDDA ) + ( flash_clk_pad VDDA ) ( FILLER_246 VDDA ) ( FILLER_245 VDDA ) + ( bus_tie_36 VDDA ) ( bus_tie_35 VDDA ) ( bus_tie_34 VDDA ) + ( bus_tie_33 VDDA ) ( bus_tie_32 VDDA ) ( FILLER_235 VDDA ) + ( FILLER_236 VDDA ) ( FILLER_237 VDDA ) ( bus_tie_31 VDDA ) + ( FILLER_234 VDDA ) ( FILLER_233 VDDA ) ( FILLER_227 VDDA ) + ( FILLER_230 VDDA ) ( FILLER_231 VDDA ) ( flash_csb_pad VDDA ) + ( FILLER_229 VDDA ) ( FILLER_228 VDDA ) ( bus_tie_27 VDDA ) + ( bus_tie_30 VDDA ) ( bus_tie_29 VDDA ) ( bus_tie_28 VDDA ) + ( FILLER_216 VDDA ) ( bus_tie_26 VDDA ) ( FILLER_220 VDDA ) + ( bus_tie_25 VDDA ) ( FILLER_218 VDDA ) ( FILLER_219 VDDA ) + ( FILLER_217 VDDA ) ( FILLER_210 VDDA ) ( FILLER_214 VDDA ) + ( mgmt_vssd_lvclamp_pad VDDA ) ( FILLER_212 VDDA ) + ( FILLER_213 VDDA ) ( FILLER_211 VDDA ) ( bus_tie_24 VDDA ) + ( bus_tie_20 VDDA ) ( bus_tie_23 VDDA ) ( bus_tie_22 VDDA ) + ( bus_tie_21 VDDA ) ( FILLER_199 VDDA ) ( FILLER_202 VDDA ) + ( FILLER_203 VDDA ) ( bus_tie_19 VDDA ) ( FILLER_201 VDDA ) + ( FILLER_200 VDDA ) ( FILLER_195 VDDA ) ( clock_pad VDDA ) + ( FILLER_196 VDDA ) ( FILLER_197 VDDA ) ( FILLER_193 VDDA ) + ( FILLER_194 VDDA ) ( bus_tie_17 VDDA ) ( bus_tie_18 VDDA ) + ( bus_tie_14 VDDA ) ( bus_tie_16 VDDA ) ( bus_tie_15 VDDA ) + ( FILLER_182 VDDA ) ( FILLER_185 VDDA ) ( FILLER_186 VDDA ) + ( bus_tie_13 VDDA ) ( FILLER_184 VDDA ) ( FILLER_183 VDDA ) + ( FILLER_177 VDDA ) ( FILLER_179 VDDA ) ( FILLER_180 VDDA ) + ( resetb_pad VDDA ) ( bus_tie_9 VDDA ) ( FILLER_178 VDDA ) + ( FILLER_176 VDDA ) ( bus_tie_12 VDDA ) ( bus_tie_11 VDDA ) + ( bus_tie_10 VDDA ) ( bus_tie_8 VDDA ) ( bus_tie_7 VDDA ) + ( FILLER_168 VDDA ) ( FILLER_169 VDDA ) ( bus_tie_6 VDDA ) + ( FILLER_166 VDDA ) ( FILLER_167 VDDA ) ( FILLER_165 VDDA ) + ( FILLER_160 VDDA ) ( FILLER_163 VDDA ) + ( mgmt_vssa_hvclamp_pad VDDA ) ( FILLER_161 VDDA ) + ( FILLER_162 VDDA ) ( FILLER_159 VDDA ) ( bus_tie_4 VDDA ) + ( bus_tie_5 VDDA ) ( bus_tie_3 VDDA ) ( FILLER_149 VDDA ) + ( bus_tie_2 VDDA ) ( bus_tie_1 VDDA ) ( FILLER_151 VDDA ) + ( FILLER_152 VDDA ) ( FILLER_150 VDDA ) ( FILLER_148 VDDA ) + ( mgmt_corner\[0\] VDDA ) + + ROUTED met4 TAPERRULE met4_width_960 ( 663480 181765 ) ( * 184915 ) ; + - gpio_pad/AMUXBUS_A ( gpio_pad AMUXBUS_A ) + ( FILLER_145 AMUXBUS_A ) ( FILLER_146 AMUXBUS_A ) + ( FILLER_147 AMUXBUS_A ) ( FILLER_144 AMUXBUS_A ) + ( FILLER_143 AMUXBUS_A ) ( FILLER_142 AMUXBUS_A ) + ( FILLER_141 AMUXBUS_A ) ( FILLER_140 AMUXBUS_A ) + ( FILLER_139 AMUXBUS_A ) ( FILLER_138 AMUXBUS_A ) + ( FILLER_137 AMUXBUS_A ) ( FILLER_136 AMUXBUS_A ) + ( FILLER_135 AMUXBUS_A ) ( FILLER_131 AMUXBUS_A ) + ( FILLER_132 AMUXBUS_A ) ( FILLER_133 AMUXBUS_A ) + ( user1_analog_pad\[0\] AMUXBUS_A ) ( FILLER_127 AMUXBUS_A ) + ( FILLER_130 AMUXBUS_A ) ( FILLER_129 AMUXBUS_A ) + ( FILLER_128 AMUXBUS_A ) ( FILLER_124 AMUXBUS_A ) + ( FILLER_126 AMUXBUS_A ) ( FILLER_125 AMUXBUS_A ) + ( FILLER_123 AMUXBUS_A ) ( FILLER_116 AMUXBUS_A ) + ( user1_vssa_hvclamp_pad\[0\] AMUXBUS_A ) + ( FILLER_119 AMUXBUS_A ) ( FILLER_120 AMUXBUS_A ) + ( FILLER_121 AMUXBUS_A ) ( FILLER_118 AMUXBUS_A ) + ( FILLER_117 AMUXBUS_A ) ( FILLER_113 AMUXBUS_A ) + ( FILLER_115 AMUXBUS_A ) ( FILLER_114 AMUXBUS_A ) + ( FILLER_110 AMUXBUS_A ) ( FILLER_112 AMUXBUS_A ) + ( FILLER_111 AMUXBUS_A ) ( FILLER_107 AMUXBUS_A ) + ( user1_analog_pad\[1\] AMUXBUS_A ) ( FILLER_108 AMUXBUS_A ) + ( FILLER_103 AMUXBUS_A ) ( FILLER_106 AMUXBUS_A ) + ( FILLER_105 AMUXBUS_A ) ( FILLER_104 AMUXBUS_A ) + ( FILLER_100 AMUXBUS_A ) ( FILLER_102 AMUXBUS_A ) + ( FILLER_101 AMUXBUS_A ) ( FILLER_98 AMUXBUS_A ) + ( FILLER_99 AMUXBUS_A ) ( FILLER_91 AMUXBUS_A ) + ( FILLER_95 AMUXBUS_A ) ( FILLER_96 AMUXBUS_A ) + ( user1_analog_pad\[2\] AMUXBUS_A ) ( FILLER_93 AMUXBUS_A ) + ( FILLER_94 AMUXBUS_A ) ( FILLER_92 AMUXBUS_A ) + ( FILLER_90 AMUXBUS_A ) ( FILLER_89 AMUXBUS_A ) + ( FILLER_88 AMUXBUS_A ) ( FILLER_87 AMUXBUS_A ) + ( FILLER_86 AMUXBUS_A ) ( FILLER_85 AMUXBUS_A ) + ( FILLER_84 AMUXBUS_A ) ( FILLER_83 AMUXBUS_A ) + ( FILLER_82 AMUXBUS_A ) ( FILLER_81 AMUXBUS_A ) + ( FILLER_80 AMUXBUS_A ) ( FILLER_79 AMUXBUS_A ) + ( sky130_ef_io__com_bus_slice_10um_0 AMUXBUS_A ) + ( FILLER_78 AMUXBUS_A ) + ( sky130_ef_io__com_bus_slice_5um_1 AMUXBUS_A ) + ( user1_analog_pad_with_clamp AMUXBUS_A ) + ( FILLER_SB3 AMUXBUS_A ) + ( sky130_ef_io__com_bus_slice_5um_0 AMUXBUS_A ) + ( FILLER_71 AMUXBUS_A ) ( disconnect_vdda_0 AMUXBUS_A ) + ( FILLER_73 AMUXBUS_A ) ( FILLER_72 AMUXBUS_A ) + ( FILLER_68 AMUXBUS_A ) ( FILLER_70 AMUXBUS_A ) + ( FILLER_69 AMUXBUS_A ) ( FILLER_64 AMUXBUS_A ) + ( mgmt_vssio_hvclamp_pad\[1\] AMUXBUS_A ) + ( FILLER_66 AMUXBUS_A ) ( FILLER_65 AMUXBUS_A ) + ( FILLER_60 AMUXBUS_A ) ( FILLER_63 AMUXBUS_A ) + ( FILLER_62 AMUXBUS_A ) ( FILLER_61 AMUXBUS_A ) + ( sky130_ef_io__com_bus_slice_5um_3 AMUXBUS_A ) + ( sky130_ef_io__com_bus_slice_10um_1 AMUXBUS_A ) + ( user2_analog_pad_with_clamp\[0\] AMUXBUS_A ) + ( sky130_ef_io__com_bus_slice_5um_2 AMUXBUS_A ) + ( FILLER_57 AMUXBUS_A ) ( FILLER_56 AMUXBUS_A ) + ( FILLER_55 AMUXBUS_A ) ( FILLER_54 AMUXBUS_A ) + ( FILLER_53 AMUXBUS_A ) ( FILLER_52 AMUXBUS_A ) + ( FILLER_51 AMUXBUS_A ) ( FILLER_50 AMUXBUS_A ) + ( FILLER_49 AMUXBUS_A ) + ( user2_analog_pad_with_clamp\[1\] AMUXBUS_A ) + ( FILLER_47 AMUXBUS_A ) ( FILLER_46 AMUXBUS_A ) + ( FILLER_45 AMUXBUS_A ) ( FILLER_44 AMUXBUS_A ) + ( FILLER_43 AMUXBUS_A ) ( FILLER_42 AMUXBUS_A ) + ( user2_analog_pad\[0\] AMUXBUS_A ) ( FILLER_41 AMUXBUS_A ) + ( FILLER_39 AMUXBUS_A ) ( FILLER_38 AMUXBUS_A ) + ( FILLER_37 AMUXBUS_A ) ( FILLER_36 AMUXBUS_A ) + ( FILLER_33 AMUXBUS_A ) ( FILLER_35 AMUXBUS_A ) + ( FILLER_34 AMUXBUS_A ) ( FILLER_29 AMUXBUS_A ) + ( FILLER_32 AMUXBUS_A ) ( FILLER_31 AMUXBUS_A ) + ( FILLER_30 AMUXBUS_A ) ( FILLER_26 AMUXBUS_A ) + ( FILLER_27 AMUXBUS_A ) ( user2_analog_pad\[1\] AMUXBUS_A ) + ( FILLER_25 AMUXBUS_A ) ( FILLER_24 AMUXBUS_A ) + ( FILLER_23 AMUXBUS_A ) ( FILLER_22 AMUXBUS_A ) + ( FILLER_21 AMUXBUS_A ) ( FILLER_20 AMUXBUS_A ) + ( FILLER_19 AMUXBUS_A ) ( FILLER_18 AMUXBUS_A ) + ( FILLER_17 AMUXBUS_A ) ( FILLER_13 AMUXBUS_A ) + ( user2_analog_pad\[2\] AMUXBUS_A ) ( FILLER_14 AMUXBUS_A ) + ( FILLER_15 AMUXBUS_A ) ( FILLER_10 AMUXBUS_A ) + ( FILLER_12 AMUXBUS_A ) ( FILLER_11 AMUXBUS_A ) + ( FILLER_6 AMUXBUS_A ) ( FILLER_9 AMUXBUS_A ) + ( FILLER_8 AMUXBUS_A ) ( FILLER_7 AMUXBUS_A ) + ( FILLER_5 AMUXBUS_A ) ( user2_corner AMUXBUS_A ) + ( user1_corner AMUXBUS_A ) ( FILLER_578 AMUXBUS_A ) + ( FILLER_579 AMUXBUS_A ) ( FILLER_576 AMUXBUS_A ) + ( FILLER_786 AMUXBUS_A ) ( FILLER_577 AMUXBUS_A ) + ( FILLER_785 AMUXBUS_A ) ( FILLER_571 AMUXBUS_A ) + ( FILLER_575 AMUXBUS_A ) ( FILLER_784 AMUXBUS_A ) + ( FILLER_574 AMUXBUS_A ) ( FILLER_783 AMUXBUS_A ) + ( FILLER_573 AMUXBUS_A ) ( FILLER_782 AMUXBUS_A ) + ( FILLER_572 AMUXBUS_A ) ( FILLER_781 AMUXBUS_A ) + ( FILLER_780 AMUXBUS_A ) ( FILLER_779 AMUXBUS_A ) + ( FILLER_570 AMUXBUS_A ) ( user2_analog_pad\[3\] AMUXBUS_A ) + ( FILLER_776 AMUXBUS_A ) ( FILLER_568 AMUXBUS_A ) + ( user1_analog_pad\[3\] AMUXBUS_A ) ( FILLER_567 AMUXBUS_A ) + ( FILLER_777 AMUXBUS_A ) ( FILLER_775 AMUXBUS_A ) + ( FILLER_566 AMUXBUS_A ) ( FILLER_774 AMUXBUS_A ) + ( FILLER_565 AMUXBUS_A ) ( FILLER_773 AMUXBUS_A ) + ( FILLER_564 AMUXBUS_A ) ( FILLER_772 AMUXBUS_A ) + ( FILLER_563 AMUXBUS_A ) ( FILLER_771 AMUXBUS_A ) + ( FILLER_562 AMUXBUS_A ) ( FILLER_561 AMUXBUS_A ) + ( FILLER_769 AMUXBUS_A ) ( FILLER_770 AMUXBUS_A ) + ( FILLER_766 AMUXBUS_A ) ( FILLER_559 AMUXBUS_A ) + ( user2_vccd_lvclamp_pad AMUXBUS_A ) ( FILLER_558 AMUXBUS_A ) + ( FILLER_557 AMUXBUS_A ) ( FILLER_767 AMUXBUS_A ) + ( user1_vccd_lvclamp_pad AMUXBUS_A ) ( FILLER_556 AMUXBUS_A ) + ( FILLER_552 AMUXBUS_A ) ( FILLER_765 AMUXBUS_A ) + ( FILLER_555 AMUXBUS_A ) ( FILLER_764 AMUXBUS_A ) + ( FILLER_554 AMUXBUS_A ) ( FILLER_763 AMUXBUS_A ) + ( FILLER_553 AMUXBUS_A ) ( FILLER_762 AMUXBUS_A ) + ( FILLER_761 AMUXBUS_A ) ( FILLER_551 AMUXBUS_A ) + ( FILLER_760 AMUXBUS_A ) ( FILLER_546 AMUXBUS_A ) + ( FILLER_759 AMUXBUS_A ) ( FILLER_549 AMUXBUS_A ) + ( mgmt_vddio_hvclamp_pad\[1\] AMUXBUS_A ) + ( FILLER_548 AMUXBUS_A ) ( FILLER_547 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[13\] AMUXBUS_A ) + ( FILLER_757 AMUXBUS_A ) ( FILLER_756 AMUXBUS_A ) + ( FILLER_545 AMUXBUS_A ) ( FILLER_755 AMUXBUS_A ) + ( FILLER_544 AMUXBUS_A ) ( FILLER_754 AMUXBUS_A ) + ( FILLER_543 AMUXBUS_A ) ( FILLER_542 AMUXBUS_A ) + ( FILLER_753 AMUXBUS_A ) ( FILLER_541 AMUXBUS_A ) + ( FILLER_752 AMUXBUS_A ) ( FILLER_751 AMUXBUS_A ) + ( FILLER_536 AMUXBUS_A ) ( FILLER_750 AMUXBUS_A ) + ( user2_vssa_hvclamp_pad AMUXBUS_A ) ( FILLER_538 AMUXBUS_A ) + ( FILLER_539 AMUXBUS_A ) ( FILLER_537 AMUXBUS_A ) + ( user1_vdda_hvclamp_pad\[0\] AMUXBUS_A ) + ( FILLER_748 AMUXBUS_A ) ( FILLER_747 AMUXBUS_A ) + ( FILLER_746 AMUXBUS_A ) ( FILLER_535 AMUXBUS_A ) + ( FILLER_745 AMUXBUS_A ) ( FILLER_534 AMUXBUS_A ) + ( FILLER_744 AMUXBUS_A ) ( FILLER_533 AMUXBUS_A ) + ( FILLER_532 AMUXBUS_A ) ( FILLER_531 AMUXBUS_A ) + ( FILLER_743 AMUXBUS_A ) ( FILLER_741 AMUXBUS_A ) + ( FILLER_742 AMUXBUS_A ) ( FILLER_740 AMUXBUS_A ) + ( FILLER_526 AMUXBUS_A ) ( FILLER_529 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[0\] AMUXBUS_A ) + ( FILLER_528 AMUXBUS_A ) ( FILLER_527 AMUXBUS_A ) + ( FILLER_522 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[12\] AMUXBUS_A ) + ( FILLER_525 AMUXBUS_A ) ( FILLER_738 AMUXBUS_A ) + ( FILLER_524 AMUXBUS_A ) ( FILLER_737 AMUXBUS_A ) + ( FILLER_523 AMUXBUS_A ) ( FILLER_736 AMUXBUS_A ) + ( FILLER_735 AMUXBUS_A ) ( FILLER_734 AMUXBUS_A ) + ( FILLER_521 AMUXBUS_A ) ( FILLER_733 AMUXBUS_A ) + ( FILLER_732 AMUXBUS_A ) ( FILLER_516 AMUXBUS_A ) + ( FILLER_731 AMUXBUS_A ) ( FILLER_519 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[1\] AMUXBUS_A ) + ( FILLER_518 AMUXBUS_A ) ( FILLER_517 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[11\] AMUXBUS_A ) + ( FILLER_515 AMUXBUS_A ) ( FILLER_729 AMUXBUS_A ) + ( FILLER_728 AMUXBUS_A ) ( FILLER_514 AMUXBUS_A ) + ( FILLER_727 AMUXBUS_A ) ( FILLER_513 AMUXBUS_A ) + ( FILLER_512 AMUXBUS_A ) ( FILLER_511 AMUXBUS_A ) + ( FILLER_726 AMUXBUS_A ) ( FILLER_725 AMUXBUS_A ) + ( FILLER_722 AMUXBUS_A ) ( FILLER_724 AMUXBUS_A ) + ( FILLER_723 AMUXBUS_A ) ( FILLER_507 AMUXBUS_A ) + ( FILLER_509 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[2\] AMUXBUS_A ) + ( FILLER_508 AMUXBUS_A ) ( FILLER_718 AMUXBUS_A ) + ( FILLER_506 AMUXBUS_A ) ( FILLER_505 AMUXBUS_A ) + ( FILLER_719 AMUXBUS_A ) ( FILLER_720 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[10\] AMUXBUS_A ) + ( FILLER_504 AMUXBUS_A ) ( FILLER_503 AMUXBUS_A ) + ( FILLER_501 AMUXBUS_A ) ( FILLER_717 AMUXBUS_A ) + ( FILLER_502 AMUXBUS_A ) ( FILLER_715 AMUXBUS_A ) + ( FILLER_716 AMUXBUS_A ) ( FILLER_712 AMUXBUS_A ) + ( FILLER_714 AMUXBUS_A ) ( FILLER_713 AMUXBUS_A ) + ( FILLER_497 AMUXBUS_A ) ( FILLER_499 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[3\] AMUXBUS_A ) + ( FILLER_498 AMUXBUS_A ) ( FILLER_493 AMUXBUS_A ) + ( FILLER_496 AMUXBUS_A ) ( FILLER_495 AMUXBUS_A ) + ( FILLER_494 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[9\] AMUXBUS_A ) + ( FILLER_710 AMUXBUS_A ) ( FILLER_709 AMUXBUS_A ) + ( FILLER_491 AMUXBUS_A ) ( FILLER_492 AMUXBUS_A ) + ( FILLER_708 AMUXBUS_A ) ( FILLER_707 AMUXBUS_A ) + ( FILLER_703 AMUXBUS_A ) ( FILLER_706 AMUXBUS_A ) + ( FILLER_705 AMUXBUS_A ) ( FILLER_704 AMUXBUS_A ) + ( FILLER_489 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[4\] AMUXBUS_A ) + ( FILLER_488 AMUXBUS_A ) ( FILLER_487 AMUXBUS_A ) + ( FILLER_483 AMUXBUS_A ) ( FILLER_486 AMUXBUS_A ) + ( FILLER_485 AMUXBUS_A ) ( FILLER_484 AMUXBUS_A ) + ( FILLER_701 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[8\] AMUXBUS_A ) + ( FILLER_700 AMUXBUS_A ) ( FILLER_699 AMUXBUS_A ) + ( FILLER_482 AMUXBUS_A ) ( FILLER_481 AMUXBUS_A ) + ( FILLER_698 AMUXBUS_A ) ( FILLER_697 AMUXBUS_A ) + ( FILLER_696 AMUXBUS_A ) ( FILLER_695 AMUXBUS_A ) + ( FILLER_694 AMUXBUS_A ) ( FILLER_477 AMUXBUS_A ) + ( FILLER_478 AMUXBUS_A ) ( FILLER_479 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[5\] AMUXBUS_A ) + ( FILLER_693 AMUXBUS_A ) ( FILLER_473 AMUXBUS_A ) + ( FILLER_476 AMUXBUS_A ) ( FILLER_475 AMUXBUS_A ) + ( FILLER_474 AMUXBUS_A ) ( FILLER_471 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[7\] AMUXBUS_A ) + ( FILLER_691 AMUXBUS_A ) ( FILLER_472 AMUXBUS_A ) + ( FILLER_690 AMUXBUS_A ) ( FILLER_689 AMUXBUS_A ) + ( FILLER_468 AMUXBUS_A ) ( FILLER_688 AMUXBUS_A ) + ( FILLER_687 AMUXBUS_A ) ( FILLER_686 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[6\] AMUXBUS_A ) + ( FILLER_469 AMUXBUS_A ) ( FILLER_685 AMUXBUS_A ) + ( FILLER_684 AMUXBUS_A ) ( FILLER_467 AMUXBUS_A ) + ( FILLER_464 AMUXBUS_A ) ( FILLER_466 AMUXBUS_A ) + ( FILLER_465 AMUXBUS_A ) + ( user1_vdda_hvclamp_pad\[1\] AMUXBUS_A ) + ( FILLER_463 AMUXBUS_A ) ( FILLER_682 AMUXBUS_A ) + ( FILLER_681 AMUXBUS_A ) ( FILLER_462 AMUXBUS_A ) + ( FILLER_461 AMUXBUS_A ) ( FILLER_680 AMUXBUS_A ) + ( FILLER_679 AMUXBUS_A ) ( FILLER_678 AMUXBUS_A ) + ( FILLER_677 AMUXBUS_A ) ( FILLER_457 AMUXBUS_A ) + ( FILLER_458 AMUXBUS_A ) ( FILLER_459 AMUXBUS_A ) + ( user2_vdda_hvclamp_pad AMUXBUS_A ) ( FILLER_676 AMUXBUS_A ) + ( FILLER_675 AMUXBUS_A ) ( FILLER_454 AMUXBUS_A ) + ( FILLER_456 AMUXBUS_A ) ( FILLER_455 AMUXBUS_A ) + ( FILLER_452 AMUXBUS_A ) ( FILLER_453 AMUXBUS_A ) + ( FILLER_673 AMUXBUS_A ) ( user1_vssd_lvclamp_pad AMUXBUS_A ) + ( FILLER_672 AMUXBUS_A ) ( FILLER_451 AMUXBUS_A ) + ( FILLER_668 AMUXBUS_A ) ( FILLER_671 AMUXBUS_A ) + ( FILLER_670 AMUXBUS_A ) ( FILLER_669 AMUXBUS_A ) + ( FILLER_448 AMUXBUS_A ) ( FILLER_449 AMUXBUS_A ) + ( user2_vssd_lvclamp_pad AMUXBUS_A ) ( FILLER_667 AMUXBUS_A ) + ( FILLER_665 AMUXBUS_A ) ( FILLER_447 AMUXBUS_A ) + ( FILLER_666 AMUXBUS_A ) ( FILLER_446 AMUXBUS_A ) + ( FILLER_444 AMUXBUS_A ) ( FILLER_445 AMUXBUS_A ) + ( user1_vssa_hvclamp_pad\[1\] AMUXBUS_A ) + ( FILLER_443 AMUXBUS_A ) ( FILLER_442 AMUXBUS_A ) + ( FILLER_663 AMUXBUS_A ) ( FILLER_441 AMUXBUS_A ) + ( FILLER_662 AMUXBUS_A ) ( FILLER_661 AMUXBUS_A ) + ( FILLER_660 AMUXBUS_A ) ( FILLER_659 AMUXBUS_A ) + ( FILLER_438 AMUXBUS_A ) ( FILLER_439 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[7\] AMUXBUS_A ) + ( FILLER_658 AMUXBUS_A ) ( FILLER_657 AMUXBUS_A ) + ( FILLER_437 AMUXBUS_A ) ( FILLER_656 AMUXBUS_A ) + ( FILLER_436 AMUXBUS_A ) ( FILLER_434 AMUXBUS_A ) + ( FILLER_435 AMUXBUS_A ) ( FILLER_654 AMUXBUS_A ) + ( FILLER_433 AMUXBUS_A ) ( FILLER_432 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[6\] AMUXBUS_A ) + ( FILLER_431 AMUXBUS_A ) ( FILLER_650 AMUXBUS_A ) + ( FILLER_653 AMUXBUS_A ) ( FILLER_652 AMUXBUS_A ) + ( FILLER_651 AMUXBUS_A ) ( FILLER_429 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[8\] AMUXBUS_A ) + ( FILLER_649 AMUXBUS_A ) ( FILLER_646 AMUXBUS_A ) + ( FILLER_428 AMUXBUS_A ) ( FILLER_427 AMUXBUS_A ) + ( FILLER_648 AMUXBUS_A ) ( FILLER_426 AMUXBUS_A ) + ( FILLER_647 AMUXBUS_A ) ( FILLER_425 AMUXBUS_A ) + ( FILLER_424 AMUXBUS_A ) ( FILLER_422 AMUXBUS_A ) + ( FILLER_423 AMUXBUS_A ) ( FILLER_421 AMUXBUS_A ) + ( FILLER_641 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[5\] AMUXBUS_A ) + ( FILLER_644 AMUXBUS_A ) ( FILLER_643 AMUXBUS_A ) + ( FILLER_642 AMUXBUS_A ) ( FILLER_637 AMUXBUS_A ) + ( FILLER_419 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[9\] AMUXBUS_A ) + ( FILLER_418 AMUXBUS_A ) ( FILLER_640 AMUXBUS_A ) + ( FILLER_417 AMUXBUS_A ) ( FILLER_639 AMUXBUS_A ) + ( FILLER_416 AMUXBUS_A ) ( FILLER_638 AMUXBUS_A ) + ( FILLER_415 AMUXBUS_A ) ( FILLER_414 AMUXBUS_A ) + ( FILLER_412 AMUXBUS_A ) ( FILLER_413 AMUXBUS_A ) + ( FILLER_411 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[4\] AMUXBUS_A ) + ( FILLER_635 AMUXBUS_A ) ( FILLER_634 AMUXBUS_A ) + ( FILLER_633 AMUXBUS_A ) ( FILLER_632 AMUXBUS_A ) + ( FILLER_409 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[10\] AMUXBUS_A ) + ( FILLER_631 AMUXBUS_A ) ( FILLER_408 AMUXBUS_A ) + ( FILLER_407 AMUXBUS_A ) ( FILLER_630 AMUXBUS_A ) + ( FILLER_406 AMUXBUS_A ) ( FILLER_405 AMUXBUS_A ) + ( FILLER_629 AMUXBUS_A ) ( FILLER_628 AMUXBUS_A ) + ( FILLER_404 AMUXBUS_A ) ( FILLER_402 AMUXBUS_A ) + ( FILLER_403 AMUXBUS_A ) ( FILLER_401 AMUXBUS_A ) + ( FILLER_624 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[3\] AMUXBUS_A ) + ( FILLER_625 AMUXBUS_A ) ( FILLER_626 AMUXBUS_A ) + ( FILLER_620 AMUXBUS_A ) ( FILLER_623 AMUXBUS_A ) + ( FILLER_399 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[11\] AMUXBUS_A ) + ( FILLER_398 AMUXBUS_A ) ( FILLER_622 AMUXBUS_A ) + ( FILLER_397 AMUXBUS_A ) ( FILLER_621 AMUXBUS_A ) + ( FILLER_396 AMUXBUS_A ) ( FILLER_395 AMUXBUS_A ) + ( FILLER_618 AMUXBUS_A ) ( FILLER_619 AMUXBUS_A ) + ( FILLER_394 AMUXBUS_A ) ( FILLER_392 AMUXBUS_A ) + ( FILLER_393 AMUXBUS_A ) ( FILLER_391 AMUXBUS_A ) + ( FILLER_615 AMUXBUS_A ) ( FILLER_616 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[2\] AMUXBUS_A ) + ( FILLER_385 AMUXBUS_A ) ( FILLER_614 AMUXBUS_A ) + ( FILLER_388 AMUXBUS_A ) ( FILLER_389 AMUXBUS_A ) + ( mprj_pads.area2_io_pad\[12\] AMUXBUS_A ) + ( FILLER_387 AMUXBUS_A ) ( FILLER_613 AMUXBUS_A ) + ( FILLER_386 AMUXBUS_A ) ( FILLER_612 AMUXBUS_A ) + ( FILLER_611 AMUXBUS_A ) ( FILLER_384 AMUXBUS_A ) + ( FILLER_383 AMUXBUS_A ) ( FILLER_610 AMUXBUS_A ) + ( FILLER_609 AMUXBUS_A ) ( FILLER_382 AMUXBUS_A ) + ( FILLER_381 AMUXBUS_A ) ( FILLER_380 AMUXBUS_A ) + ( FILLER_379 AMUXBUS_A ) ( FILLER_606 AMUXBUS_A ) + ( FILLER_607 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[1\] AMUXBUS_A ) + ( FILLER_378 AMUXBUS_A ) ( FILLER_377 AMUXBUS_A ) + ( FILLER_605 AMUXBUS_A ) ( FILLER_376 AMUXBUS_A ) + ( FILLER_604 AMUXBUS_A ) ( FILLER_375 AMUXBUS_A ) + ( FILLER_603 AMUXBUS_A ) ( FILLER_602 AMUXBUS_A ) + ( FILLER_374 AMUXBUS_A ) ( FILLER_SB2 AMUXBUS_A ) + ( disconnect_vdda_2 AMUXBUS_A ) ( FILLER_601 AMUXBUS_A ) + ( FILLER_600 AMUXBUS_A ) ( FILLER_367 AMUXBUS_A ) + ( FILLER_599 AMUXBUS_A ) ( FILLER_370 AMUXBUS_A ) + ( mgmt_vddio_hvclamp_pad\[0\] AMUXBUS_A ) + ( FILLER_369 AMUXBUS_A ) ( FILLER_368 AMUXBUS_A ) + ( mprj_pads.area1_io_pad\[0\] AMUXBUS_A ) + ( FILLER_597 AMUXBUS_A ) ( FILLER_596 AMUXBUS_A ) + ( FILLER_366 AMUXBUS_A ) ( FILLER_595 AMUXBUS_A ) + ( FILLER_365 AMUXBUS_A ) ( FILLER_594 AMUXBUS_A ) + ( FILLER_364 AMUXBUS_A ) ( FILLER_363 AMUXBUS_A ) + ( FILLER_593 AMUXBUS_A ) ( FILLER_362 AMUXBUS_A ) + ( FILLER_592 AMUXBUS_A ) ( FILLER_591 AMUXBUS_A ) + ( FILLER_590 AMUXBUS_A ) ( FILLER_587 AMUXBUS_A ) + ( FILLER_SB1 AMUXBUS_A ) ( disconnect_vdda_1 AMUXBUS_A ) + ( FILLER_586 AMUXBUS_A ) ( FILLER_360 AMUXBUS_A ) + ( mgmt_vccd_lvclamp_pad AMUXBUS_A ) ( FILLER_359 AMUXBUS_A ) + ( FILLER_358 AMUXBUS_A ) ( FILLER_357 AMUXBUS_A ) + ( FILLER_585 AMUXBUS_A ) ( FILLER_584 AMUXBUS_A ) + ( FILLER_356 AMUXBUS_A ) ( FILLER_583 AMUXBUS_A ) + ( FILLER_582 AMUXBUS_A ) ( FILLER_355 AMUXBUS_A ) + ( FILLER_581 AMUXBUS_A ) ( FILLER_354 AMUXBUS_A ) + ( FILLER_353 AMUXBUS_A ) ( mgmt_corner\[1\] AMUXBUS_A ) + ( FILLER_352 AMUXBUS_A ) ( FILLER_580 AMUXBUS_A ) + ( FILLER_351 AMUXBUS_A ) ( FILLER_350 AMUXBUS_A ) + ( FILLER_349 AMUXBUS_A ) ( FILLER_348 AMUXBUS_A ) + ( FILLER_347 AMUXBUS_A ) ( FILLER_346 AMUXBUS_A ) + ( bus_tie_72 AMUXBUS_A ) ( bus_tie_71 AMUXBUS_A ) + ( bus_tie_70 AMUXBUS_A ) ( bus_tie_69 AMUXBUS_A ) + ( bus_tie_68 AMUXBUS_A ) ( FILLER_339 AMUXBUS_A ) + ( bus_tie_67 AMUXBUS_A ) ( FILLER_336 AMUXBUS_A ) + ( FILLER_338 AMUXBUS_A ) ( FILLER_337 AMUXBUS_A ) + ( FILLER_335 AMUXBUS_A ) ( FILLER_331 AMUXBUS_A ) + ( FILLER_332 AMUXBUS_A ) ( FILLER_333 AMUXBUS_A ) + ( mgmt_vdda_hvclamp_pad AMUXBUS_A ) ( FILLER_329 AMUXBUS_A ) + ( FILLER_330 AMUXBUS_A ) ( bus_tie_65 AMUXBUS_A ) + ( bus_tie_66 AMUXBUS_A ) ( FILLER_321 AMUXBUS_A ) + ( bus_tie_64 AMUXBUS_A ) ( bus_tie_63 AMUXBUS_A ) + ( bus_tie_62 AMUXBUS_A ) ( FILLER_322 AMUXBUS_A ) + ( bus_tie_61 AMUXBUS_A ) ( FILLER_318 AMUXBUS_A ) + ( FILLER_320 AMUXBUS_A ) ( FILLER_319 AMUXBUS_A ) + ( FILLER_313 AMUXBUS_A ) ( FILLER_315 AMUXBUS_A ) + ( FILLER_316 AMUXBUS_A ) + ( mgmt_vssio_hvclamp_pad\[0\] AMUXBUS_A ) + ( FILLER_314 AMUXBUS_A ) ( FILLER_312 AMUXBUS_A ) + ( bus_tie_58 AMUXBUS_A ) ( bus_tie_60 AMUXBUS_A ) + ( bus_tie_59 AMUXBUS_A ) ( bus_tie_56 AMUXBUS_A ) + ( bus_tie_57 AMUXBUS_A ) ( FILLER_301 AMUXBUS_A ) + ( FILLER_304 AMUXBUS_A ) ( FILLER_305 AMUXBUS_A ) + ( bus_tie_55 AMUXBUS_A ) ( FILLER_303 AMUXBUS_A ) + ( FILLER_302 AMUXBUS_A ) ( FILLER_295 AMUXBUS_A ) + ( FILLER_299 AMUXBUS_A ) ( clock_pad AMUXBUS_A ) + ( FILLER_297 AMUXBUS_A ) ( FILLER_298 AMUXBUS_A ) + ( FILLER_296 AMUXBUS_A ) ( bus_tie_54 AMUXBUS_A ) + ( bus_tie_53 AMUXBUS_A ) ( bus_tie_52 AMUXBUS_A ) + ( bus_tie_51 AMUXBUS_A ) ( bus_tie_50 AMUXBUS_A ) + ( FILLER_286 AMUXBUS_A ) ( FILLER_287 AMUXBUS_A ) + ( FILLER_288 AMUXBUS_A ) ( bus_tie_49 AMUXBUS_A ) + ( FILLER_285 AMUXBUS_A ) ( FILLER_284 AMUXBUS_A ) + ( FILLER_279 AMUXBUS_A ) ( flash_io1_pad AMUXBUS_A ) + ( FILLER_280 AMUXBUS_A ) ( FILLER_281 AMUXBUS_A ) + ( FILLER_282 AMUXBUS_A ) ( FILLER_278 AMUXBUS_A ) + ( bus_tie_46 AMUXBUS_A ) ( bus_tie_48 AMUXBUS_A ) + ( bus_tie_47 AMUXBUS_A ) ( FILLER_268 AMUXBUS_A ) + ( bus_tie_45 AMUXBUS_A ) ( bus_tie_44 AMUXBUS_A ) + ( FILLER_270 AMUXBUS_A ) ( FILLER_271 AMUXBUS_A ) + ( bus_tie_43 AMUXBUS_A ) ( FILLER_269 AMUXBUS_A ) + ( FILLER_267 AMUXBUS_A ) ( FILLER_261 AMUXBUS_A ) + ( FILLER_264 AMUXBUS_A ) ( FILLER_265 AMUXBUS_A ) + ( flash_io0_pad AMUXBUS_A ) ( FILLER_263 AMUXBUS_A ) + ( FILLER_262 AMUXBUS_A ) ( bus_tie_39 AMUXBUS_A ) + ( bus_tie_42 AMUXBUS_A ) ( bus_tie_41 AMUXBUS_A ) + ( bus_tie_40 AMUXBUS_A ) ( FILLER_251 AMUXBUS_A ) + ( bus_tie_38 AMUXBUS_A ) ( FILLER_253 AMUXBUS_A ) + ( FILLER_254 AMUXBUS_A ) ( bus_tie_37 AMUXBUS_A ) + ( FILLER_252 AMUXBUS_A ) ( FILLER_250 AMUXBUS_A ) + ( FILLER_244 AMUXBUS_A ) ( FILLER_247 AMUXBUS_A ) + ( FILLER_248 AMUXBUS_A ) ( flash_clk_pad AMUXBUS_A ) + ( FILLER_246 AMUXBUS_A ) ( FILLER_245 AMUXBUS_A ) + ( bus_tie_36 AMUXBUS_A ) ( bus_tie_35 AMUXBUS_A ) + ( bus_tie_34 AMUXBUS_A ) ( bus_tie_33 AMUXBUS_A ) + ( bus_tie_32 AMUXBUS_A ) ( FILLER_235 AMUXBUS_A ) + ( FILLER_236 AMUXBUS_A ) ( FILLER_237 AMUXBUS_A ) + ( bus_tie_31 AMUXBUS_A ) ( FILLER_234 AMUXBUS_A ) + ( FILLER_233 AMUXBUS_A ) ( FILLER_227 AMUXBUS_A ) + ( FILLER_230 AMUXBUS_A ) ( FILLER_231 AMUXBUS_A ) + ( flash_csb_pad AMUXBUS_A ) ( FILLER_229 AMUXBUS_A ) + ( FILLER_228 AMUXBUS_A ) ( bus_tie_27 AMUXBUS_A ) + ( bus_tie_30 AMUXBUS_A ) ( bus_tie_29 AMUXBUS_A ) + ( bus_tie_28 AMUXBUS_A ) ( FILLER_216 AMUXBUS_A ) + ( bus_tie_26 AMUXBUS_A ) ( FILLER_220 AMUXBUS_A ) + ( bus_tie_25 AMUXBUS_A ) ( FILLER_218 AMUXBUS_A ) + ( FILLER_219 AMUXBUS_A ) ( FILLER_217 AMUXBUS_A ) + ( FILLER_210 AMUXBUS_A ) ( FILLER_214 AMUXBUS_A ) + ( mgmt_vssd_lvclamp_pad AMUXBUS_A ) ( FILLER_212 AMUXBUS_A ) + ( FILLER_213 AMUXBUS_A ) ( FILLER_211 AMUXBUS_A ) + ( bus_tie_24 AMUXBUS_A ) ( bus_tie_20 AMUXBUS_A ) + ( bus_tie_23 AMUXBUS_A ) ( bus_tie_22 AMUXBUS_A ) + ( bus_tie_21 AMUXBUS_A ) ( FILLER_199 AMUXBUS_A ) + ( FILLER_202 AMUXBUS_A ) ( FILLER_203 AMUXBUS_A ) + ( bus_tie_19 AMUXBUS_A ) ( FILLER_201 AMUXBUS_A ) + ( FILLER_200 AMUXBUS_A ) ( FILLER_195 AMUXBUS_A ) + ( bus_tie_9 AMUXBUS_A ) ( FILLER_196 AMUXBUS_A ) + ( FILLER_197 AMUXBUS_A ) ( FILLER_193 AMUXBUS_A ) + ( FILLER_194 AMUXBUS_A ) ( bus_tie_17 AMUXBUS_A ) + ( bus_tie_18 AMUXBUS_A ) ( bus_tie_14 AMUXBUS_A ) + ( bus_tie_16 AMUXBUS_A ) ( bus_tie_15 AMUXBUS_A ) + ( FILLER_182 AMUXBUS_A ) ( FILLER_185 AMUXBUS_A ) + ( FILLER_186 AMUXBUS_A ) ( bus_tie_13 AMUXBUS_A ) + ( FILLER_184 AMUXBUS_A ) ( FILLER_183 AMUXBUS_A ) + ( FILLER_177 AMUXBUS_A ) ( FILLER_179 AMUXBUS_A ) + ( FILLER_180 AMUXBUS_A ) ( resetb_pad AMUXBUS_A ) + ( FILLER_178 AMUXBUS_A ) ( FILLER_176 AMUXBUS_A ) + ( bus_tie_12 AMUXBUS_A ) ( bus_tie_11 AMUXBUS_A ) + ( bus_tie_10 AMUXBUS_A ) ( bus_tie_8 AMUXBUS_A ) + ( bus_tie_7 AMUXBUS_A ) ( FILLER_168 AMUXBUS_A ) + ( FILLER_169 AMUXBUS_A ) ( bus_tie_6 AMUXBUS_A ) + ( FILLER_166 AMUXBUS_A ) ( FILLER_167 AMUXBUS_A ) + ( FILLER_165 AMUXBUS_A ) ( FILLER_160 AMUXBUS_A ) + ( FILLER_163 AMUXBUS_A ) ( mgmt_vssa_hvclamp_pad AMUXBUS_A ) + ( FILLER_161 AMUXBUS_A ) ( FILLER_162 AMUXBUS_A ) + ( FILLER_159 AMUXBUS_A ) ( bus_tie_4 AMUXBUS_A ) + ( bus_tie_5 AMUXBUS_A ) ( bus_tie_3 AMUXBUS_A ) + ( FILLER_149 AMUXBUS_A ) ( bus_tie_2 AMUXBUS_A ) + ( bus_tie_1 AMUXBUS_A ) ( FILLER_151 AMUXBUS_A ) + ( FILLER_152 AMUXBUS_A ) ( FILLER_150 AMUXBUS_A ) + ( FILLER_148 AMUXBUS_A ) ( mgmt_corner\[0\] AMUXBUS_A ) ; + - gpio_pad/AMUXBUS_B ( gpio_pad AMUXBUS_B ) + ( FILLER_145 AMUXBUS_B ) ( FILLER_146 AMUXBUS_B ) + ( FILLER_147 AMUXBUS_B ) ( FILLER_144 AMUXBUS_B ) + ( FILLER_143 AMUXBUS_B ) ( FILLER_142 AMUXBUS_B ) + ( FILLER_141 AMUXBUS_B ) ( FILLER_140 AMUXBUS_B ) + ( FILLER_139 AMUXBUS_B ) ( FILLER_138 AMUXBUS_B ) + ( FILLER_137 AMUXBUS_B ) ( FILLER_136 AMUXBUS_B ) + ( FILLER_135 AMUXBUS_B ) ( FILLER_131 AMUXBUS_B ) + ( FILLER_132 AMUXBUS_B ) ( FILLER_133 AMUXBUS_B ) + ( user1_analog_pad\[0\] AMUXBUS_B ) ( FILLER_127 AMUXBUS_B ) + ( FILLER_130 AMUXBUS_B ) ( FILLER_129 AMUXBUS_B ) + ( FILLER_128 AMUXBUS_B ) ( FILLER_124 AMUXBUS_B ) + ( FILLER_126 AMUXBUS_B ) ( FILLER_125 AMUXBUS_B ) + ( FILLER_123 AMUXBUS_B ) ( FILLER_116 AMUXBUS_B ) + ( user1_vssa_hvclamp_pad\[0\] AMUXBUS_B ) + ( FILLER_119 AMUXBUS_B ) ( FILLER_120 AMUXBUS_B ) + ( FILLER_121 AMUXBUS_B ) ( FILLER_118 AMUXBUS_B ) + ( FILLER_117 AMUXBUS_B ) ( FILLER_113 AMUXBUS_B ) + ( FILLER_115 AMUXBUS_B ) ( FILLER_114 AMUXBUS_B ) + ( FILLER_110 AMUXBUS_B ) ( FILLER_112 AMUXBUS_B ) + ( FILLER_111 AMUXBUS_B ) ( FILLER_107 AMUXBUS_B ) + ( user1_analog_pad\[1\] AMUXBUS_B ) ( FILLER_108 AMUXBUS_B ) + ( FILLER_103 AMUXBUS_B ) ( FILLER_106 AMUXBUS_B ) + ( FILLER_105 AMUXBUS_B ) ( FILLER_104 AMUXBUS_B ) + ( FILLER_100 AMUXBUS_B ) ( FILLER_102 AMUXBUS_B ) + ( FILLER_101 AMUXBUS_B ) ( FILLER_98 AMUXBUS_B ) + ( FILLER_99 AMUXBUS_B ) ( FILLER_91 AMUXBUS_B ) + ( FILLER_95 AMUXBUS_B ) ( FILLER_96 AMUXBUS_B ) + ( user1_analog_pad\[2\] AMUXBUS_B ) ( FILLER_93 AMUXBUS_B ) + ( FILLER_94 AMUXBUS_B ) ( FILLER_92 AMUXBUS_B ) + ( FILLER_90 AMUXBUS_B ) ( FILLER_89 AMUXBUS_B ) + ( FILLER_88 AMUXBUS_B ) ( FILLER_87 AMUXBUS_B ) + ( FILLER_86 AMUXBUS_B ) ( FILLER_85 AMUXBUS_B ) + ( FILLER_84 AMUXBUS_B ) ( FILLER_83 AMUXBUS_B ) + ( FILLER_82 AMUXBUS_B ) ( FILLER_81 AMUXBUS_B ) + ( FILLER_80 AMUXBUS_B ) ( FILLER_79 AMUXBUS_B ) + ( sky130_ef_io__com_bus_slice_10um_0 AMUXBUS_B ) + ( FILLER_78 AMUXBUS_B ) + ( sky130_ef_io__com_bus_slice_5um_1 AMUXBUS_B ) + ( user1_analog_pad_with_clamp AMUXBUS_B ) + ( FILLER_SB3 AMUXBUS_B ) + ( sky130_ef_io__com_bus_slice_5um_0 AMUXBUS_B ) + ( FILLER_71 AMUXBUS_B ) ( disconnect_vdda_0 AMUXBUS_B ) + ( FILLER_73 AMUXBUS_B ) ( FILLER_72 AMUXBUS_B ) + ( FILLER_68 AMUXBUS_B ) ( FILLER_70 AMUXBUS_B ) + ( FILLER_69 AMUXBUS_B ) ( FILLER_64 AMUXBUS_B ) + ( mgmt_vssio_hvclamp_pad\[1\] AMUXBUS_B ) + ( FILLER_66 AMUXBUS_B ) ( FILLER_65 AMUXBUS_B ) + ( FILLER_60 AMUXBUS_B ) ( FILLER_63 AMUXBUS_B ) + ( FILLER_62 AMUXBUS_B ) ( FILLER_61 AMUXBUS_B ) + ( sky130_ef_io__com_bus_slice_5um_3 AMUXBUS_B ) + ( sky130_ef_io__com_bus_slice_10um_1 AMUXBUS_B ) + ( user2_analog_pad_with_clamp\[0\] AMUXBUS_B ) + ( sky130_ef_io__com_bus_slice_5um_2 AMUXBUS_B ) + ( FILLER_57 AMUXBUS_B ) ( FILLER_56 AMUXBUS_B ) + ( FILLER_55 AMUXBUS_B ) ( FILLER_54 AMUXBUS_B ) + ( FILLER_53 AMUXBUS_B ) ( FILLER_52 AMUXBUS_B ) + ( FILLER_51 AMUXBUS_B ) ( FILLER_50 AMUXBUS_B ) + ( FILLER_49 AMUXBUS_B ) + ( user2_analog_pad_with_clamp\[1\] AMUXBUS_B ) + ( FILLER_47 AMUXBUS_B ) ( FILLER_46 AMUXBUS_B ) + ( FILLER_45 AMUXBUS_B ) ( FILLER_44 AMUXBUS_B ) + ( FILLER_43 AMUXBUS_B ) ( FILLER_42 AMUXBUS_B ) + ( user2_analog_pad\[0\] AMUXBUS_B ) ( FILLER_41 AMUXBUS_B ) + ( FILLER_39 AMUXBUS_B ) ( FILLER_38 AMUXBUS_B ) + ( FILLER_37 AMUXBUS_B ) ( FILLER_36 AMUXBUS_B ) + ( FILLER_33 AMUXBUS_B ) ( FILLER_35 AMUXBUS_B ) + ( FILLER_34 AMUXBUS_B ) ( FILLER_29 AMUXBUS_B ) + ( FILLER_32 AMUXBUS_B ) ( FILLER_31 AMUXBUS_B ) + ( FILLER_30 AMUXBUS_B ) ( FILLER_26 AMUXBUS_B ) + ( FILLER_27 AMUXBUS_B ) ( user2_analog_pad\[1\] AMUXBUS_B ) + ( FILLER_25 AMUXBUS_B ) ( FILLER_24 AMUXBUS_B ) + ( FILLER_23 AMUXBUS_B ) ( FILLER_22 AMUXBUS_B ) + ( FILLER_21 AMUXBUS_B ) ( FILLER_20 AMUXBUS_B ) + ( FILLER_19 AMUXBUS_B ) ( FILLER_18 AMUXBUS_B ) + ( FILLER_17 AMUXBUS_B ) ( FILLER_13 AMUXBUS_B ) + ( user2_analog_pad\[2\] AMUXBUS_B ) ( FILLER_14 AMUXBUS_B ) + ( FILLER_15 AMUXBUS_B ) ( FILLER_10 AMUXBUS_B ) + ( FILLER_12 AMUXBUS_B ) ( FILLER_11 AMUXBUS_B ) + ( FILLER_6 AMUXBUS_B ) ( FILLER_9 AMUXBUS_B ) + ( FILLER_8 AMUXBUS_B ) ( FILLER_7 AMUXBUS_B ) + ( FILLER_5 AMUXBUS_B ) ( user2_corner AMUXBUS_B ) + ( user1_corner AMUXBUS_B ) ( FILLER_578 AMUXBUS_B ) + ( FILLER_579 AMUXBUS_B ) ( FILLER_576 AMUXBUS_B ) + ( FILLER_786 AMUXBUS_B ) ( FILLER_577 AMUXBUS_B ) + ( FILLER_785 AMUXBUS_B ) ( FILLER_571 AMUXBUS_B ) + ( FILLER_575 AMUXBUS_B ) ( FILLER_784 AMUXBUS_B ) + ( FILLER_574 AMUXBUS_B ) ( FILLER_783 AMUXBUS_B ) + ( FILLER_573 AMUXBUS_B ) ( FILLER_782 AMUXBUS_B ) + ( FILLER_572 AMUXBUS_B ) ( FILLER_781 AMUXBUS_B ) + ( FILLER_780 AMUXBUS_B ) ( FILLER_779 AMUXBUS_B ) + ( FILLER_570 AMUXBUS_B ) ( user2_analog_pad\[3\] AMUXBUS_B ) + ( FILLER_776 AMUXBUS_B ) ( FILLER_568 AMUXBUS_B ) + ( user1_analog_pad\[3\] AMUXBUS_B ) ( FILLER_567 AMUXBUS_B ) + ( FILLER_777 AMUXBUS_B ) ( FILLER_775 AMUXBUS_B ) + ( FILLER_566 AMUXBUS_B ) ( FILLER_774 AMUXBUS_B ) + ( FILLER_565 AMUXBUS_B ) ( FILLER_773 AMUXBUS_B ) + ( FILLER_564 AMUXBUS_B ) ( FILLER_772 AMUXBUS_B ) + ( FILLER_563 AMUXBUS_B ) ( FILLER_771 AMUXBUS_B ) + ( FILLER_562 AMUXBUS_B ) ( FILLER_561 AMUXBUS_B ) + ( FILLER_769 AMUXBUS_B ) ( FILLER_770 AMUXBUS_B ) + ( FILLER_766 AMUXBUS_B ) ( FILLER_559 AMUXBUS_B ) + ( user2_vccd_lvclamp_pad AMUXBUS_B ) ( FILLER_558 AMUXBUS_B ) + ( FILLER_557 AMUXBUS_B ) ( FILLER_767 AMUXBUS_B ) + ( user1_vccd_lvclamp_pad AMUXBUS_B ) ( FILLER_556 AMUXBUS_B ) + ( FILLER_552 AMUXBUS_B ) ( FILLER_765 AMUXBUS_B ) + ( FILLER_555 AMUXBUS_B ) ( FILLER_764 AMUXBUS_B ) + ( FILLER_554 AMUXBUS_B ) ( FILLER_763 AMUXBUS_B ) + ( FILLER_553 AMUXBUS_B ) ( FILLER_762 AMUXBUS_B ) + ( FILLER_761 AMUXBUS_B ) ( FILLER_551 AMUXBUS_B ) + ( FILLER_760 AMUXBUS_B ) ( FILLER_546 AMUXBUS_B ) + ( FILLER_759 AMUXBUS_B ) ( FILLER_549 AMUXBUS_B ) + ( mgmt_vddio_hvclamp_pad\[1\] AMUXBUS_B ) + ( FILLER_548 AMUXBUS_B ) ( FILLER_547 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[13\] AMUXBUS_B ) + ( FILLER_757 AMUXBUS_B ) ( FILLER_756 AMUXBUS_B ) + ( FILLER_545 AMUXBUS_B ) ( FILLER_755 AMUXBUS_B ) + ( FILLER_544 AMUXBUS_B ) ( FILLER_754 AMUXBUS_B ) + ( FILLER_543 AMUXBUS_B ) ( FILLER_542 AMUXBUS_B ) + ( FILLER_753 AMUXBUS_B ) ( FILLER_541 AMUXBUS_B ) + ( FILLER_752 AMUXBUS_B ) ( FILLER_751 AMUXBUS_B ) + ( FILLER_536 AMUXBUS_B ) ( FILLER_750 AMUXBUS_B ) + ( user2_vssa_hvclamp_pad AMUXBUS_B ) ( FILLER_538 AMUXBUS_B ) + ( FILLER_539 AMUXBUS_B ) ( FILLER_537 AMUXBUS_B ) + ( user1_vdda_hvclamp_pad\[0\] AMUXBUS_B ) + ( FILLER_748 AMUXBUS_B ) ( FILLER_747 AMUXBUS_B ) + ( FILLER_746 AMUXBUS_B ) ( FILLER_535 AMUXBUS_B ) + ( FILLER_745 AMUXBUS_B ) ( FILLER_534 AMUXBUS_B ) + ( FILLER_744 AMUXBUS_B ) ( FILLER_533 AMUXBUS_B ) + ( FILLER_532 AMUXBUS_B ) ( FILLER_531 AMUXBUS_B ) + ( FILLER_743 AMUXBUS_B ) ( FILLER_741 AMUXBUS_B ) + ( FILLER_742 AMUXBUS_B ) ( FILLER_740 AMUXBUS_B ) + ( FILLER_526 AMUXBUS_B ) ( FILLER_529 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[0\] AMUXBUS_B ) + ( FILLER_528 AMUXBUS_B ) ( FILLER_527 AMUXBUS_B ) + ( FILLER_522 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[12\] AMUXBUS_B ) + ( FILLER_525 AMUXBUS_B ) ( FILLER_738 AMUXBUS_B ) + ( FILLER_524 AMUXBUS_B ) ( FILLER_737 AMUXBUS_B ) + ( FILLER_523 AMUXBUS_B ) ( FILLER_736 AMUXBUS_B ) + ( FILLER_735 AMUXBUS_B ) ( FILLER_734 AMUXBUS_B ) + ( FILLER_521 AMUXBUS_B ) ( FILLER_733 AMUXBUS_B ) + ( FILLER_732 AMUXBUS_B ) ( FILLER_516 AMUXBUS_B ) + ( FILLER_731 AMUXBUS_B ) ( FILLER_519 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[1\] AMUXBUS_B ) + ( FILLER_518 AMUXBUS_B ) ( FILLER_517 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[11\] AMUXBUS_B ) + ( FILLER_515 AMUXBUS_B ) ( FILLER_729 AMUXBUS_B ) + ( FILLER_728 AMUXBUS_B ) ( FILLER_514 AMUXBUS_B ) + ( FILLER_727 AMUXBUS_B ) ( FILLER_513 AMUXBUS_B ) + ( FILLER_512 AMUXBUS_B ) ( FILLER_511 AMUXBUS_B ) + ( FILLER_726 AMUXBUS_B ) ( FILLER_725 AMUXBUS_B ) + ( FILLER_722 AMUXBUS_B ) ( FILLER_724 AMUXBUS_B ) + ( FILLER_723 AMUXBUS_B ) ( FILLER_507 AMUXBUS_B ) + ( FILLER_509 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[2\] AMUXBUS_B ) + ( FILLER_508 AMUXBUS_B ) ( FILLER_718 AMUXBUS_B ) + ( FILLER_506 AMUXBUS_B ) ( FILLER_505 AMUXBUS_B ) + ( FILLER_719 AMUXBUS_B ) ( FILLER_720 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[10\] AMUXBUS_B ) + ( FILLER_504 AMUXBUS_B ) ( FILLER_503 AMUXBUS_B ) + ( FILLER_501 AMUXBUS_B ) ( FILLER_717 AMUXBUS_B ) + ( FILLER_502 AMUXBUS_B ) ( FILLER_715 AMUXBUS_B ) + ( FILLER_716 AMUXBUS_B ) ( FILLER_712 AMUXBUS_B ) + ( FILLER_714 AMUXBUS_B ) ( FILLER_713 AMUXBUS_B ) + ( FILLER_497 AMUXBUS_B ) ( FILLER_499 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[3\] AMUXBUS_B ) + ( FILLER_498 AMUXBUS_B ) ( FILLER_493 AMUXBUS_B ) + ( FILLER_496 AMUXBUS_B ) ( FILLER_495 AMUXBUS_B ) + ( FILLER_494 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[9\] AMUXBUS_B ) + ( FILLER_710 AMUXBUS_B ) ( FILLER_709 AMUXBUS_B ) + ( FILLER_491 AMUXBUS_B ) ( FILLER_492 AMUXBUS_B ) + ( FILLER_708 AMUXBUS_B ) ( FILLER_707 AMUXBUS_B ) + ( FILLER_703 AMUXBUS_B ) ( FILLER_706 AMUXBUS_B ) + ( FILLER_705 AMUXBUS_B ) ( FILLER_704 AMUXBUS_B ) + ( FILLER_489 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[4\] AMUXBUS_B ) + ( FILLER_488 AMUXBUS_B ) ( FILLER_487 AMUXBUS_B ) + ( FILLER_483 AMUXBUS_B ) ( FILLER_486 AMUXBUS_B ) + ( FILLER_485 AMUXBUS_B ) ( FILLER_484 AMUXBUS_B ) + ( FILLER_701 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[8\] AMUXBUS_B ) + ( FILLER_700 AMUXBUS_B ) ( FILLER_699 AMUXBUS_B ) + ( FILLER_482 AMUXBUS_B ) ( FILLER_481 AMUXBUS_B ) + ( FILLER_698 AMUXBUS_B ) ( FILLER_697 AMUXBUS_B ) + ( FILLER_696 AMUXBUS_B ) ( FILLER_695 AMUXBUS_B ) + ( FILLER_694 AMUXBUS_B ) ( FILLER_477 AMUXBUS_B ) + ( FILLER_478 AMUXBUS_B ) ( FILLER_479 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[5\] AMUXBUS_B ) + ( FILLER_693 AMUXBUS_B ) ( FILLER_473 AMUXBUS_B ) + ( FILLER_476 AMUXBUS_B ) ( FILLER_475 AMUXBUS_B ) + ( FILLER_474 AMUXBUS_B ) ( FILLER_471 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[7\] AMUXBUS_B ) + ( FILLER_691 AMUXBUS_B ) ( FILLER_472 AMUXBUS_B ) + ( FILLER_690 AMUXBUS_B ) ( FILLER_689 AMUXBUS_B ) + ( FILLER_468 AMUXBUS_B ) ( FILLER_688 AMUXBUS_B ) + ( FILLER_687 AMUXBUS_B ) ( FILLER_686 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[6\] AMUXBUS_B ) + ( FILLER_469 AMUXBUS_B ) ( FILLER_685 AMUXBUS_B ) + ( FILLER_684 AMUXBUS_B ) ( FILLER_467 AMUXBUS_B ) + ( FILLER_464 AMUXBUS_B ) ( FILLER_466 AMUXBUS_B ) + ( FILLER_465 AMUXBUS_B ) + ( user1_vdda_hvclamp_pad\[1\] AMUXBUS_B ) + ( FILLER_463 AMUXBUS_B ) ( FILLER_682 AMUXBUS_B ) + ( FILLER_681 AMUXBUS_B ) ( FILLER_462 AMUXBUS_B ) + ( FILLER_461 AMUXBUS_B ) ( FILLER_680 AMUXBUS_B ) + ( FILLER_679 AMUXBUS_B ) ( FILLER_678 AMUXBUS_B ) + ( FILLER_677 AMUXBUS_B ) ( FILLER_457 AMUXBUS_B ) + ( FILLER_458 AMUXBUS_B ) ( FILLER_459 AMUXBUS_B ) + ( user2_vdda_hvclamp_pad AMUXBUS_B ) ( FILLER_676 AMUXBUS_B ) + ( FILLER_675 AMUXBUS_B ) ( FILLER_454 AMUXBUS_B ) + ( FILLER_456 AMUXBUS_B ) ( FILLER_455 AMUXBUS_B ) + ( FILLER_452 AMUXBUS_B ) ( FILLER_453 AMUXBUS_B ) + ( FILLER_673 AMUXBUS_B ) ( user1_vssd_lvclamp_pad AMUXBUS_B ) + ( FILLER_672 AMUXBUS_B ) ( FILLER_451 AMUXBUS_B ) + ( FILLER_668 AMUXBUS_B ) ( FILLER_671 AMUXBUS_B ) + ( FILLER_670 AMUXBUS_B ) ( FILLER_669 AMUXBUS_B ) + ( FILLER_448 AMUXBUS_B ) ( FILLER_449 AMUXBUS_B ) + ( user2_vssd_lvclamp_pad AMUXBUS_B ) ( FILLER_667 AMUXBUS_B ) + ( FILLER_665 AMUXBUS_B ) ( FILLER_447 AMUXBUS_B ) + ( FILLER_666 AMUXBUS_B ) ( FILLER_446 AMUXBUS_B ) + ( FILLER_444 AMUXBUS_B ) ( FILLER_445 AMUXBUS_B ) + ( user1_vssa_hvclamp_pad\[1\] AMUXBUS_B ) + ( FILLER_443 AMUXBUS_B ) ( FILLER_442 AMUXBUS_B ) + ( FILLER_663 AMUXBUS_B ) ( FILLER_441 AMUXBUS_B ) + ( FILLER_662 AMUXBUS_B ) ( FILLER_661 AMUXBUS_B ) + ( FILLER_660 AMUXBUS_B ) ( FILLER_659 AMUXBUS_B ) + ( FILLER_438 AMUXBUS_B ) ( FILLER_439 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[7\] AMUXBUS_B ) + ( FILLER_658 AMUXBUS_B ) ( FILLER_657 AMUXBUS_B ) + ( FILLER_437 AMUXBUS_B ) ( FILLER_656 AMUXBUS_B ) + ( FILLER_436 AMUXBUS_B ) ( FILLER_434 AMUXBUS_B ) + ( FILLER_435 AMUXBUS_B ) ( FILLER_654 AMUXBUS_B ) + ( FILLER_433 AMUXBUS_B ) ( FILLER_432 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[6\] AMUXBUS_B ) + ( FILLER_431 AMUXBUS_B ) ( FILLER_650 AMUXBUS_B ) + ( FILLER_653 AMUXBUS_B ) ( FILLER_652 AMUXBUS_B ) + ( FILLER_651 AMUXBUS_B ) ( FILLER_429 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[8\] AMUXBUS_B ) + ( FILLER_649 AMUXBUS_B ) ( FILLER_646 AMUXBUS_B ) + ( FILLER_428 AMUXBUS_B ) ( FILLER_427 AMUXBUS_B ) + ( FILLER_648 AMUXBUS_B ) ( FILLER_426 AMUXBUS_B ) + ( FILLER_647 AMUXBUS_B ) ( FILLER_425 AMUXBUS_B ) + ( FILLER_424 AMUXBUS_B ) ( FILLER_422 AMUXBUS_B ) + ( FILLER_423 AMUXBUS_B ) ( FILLER_421 AMUXBUS_B ) + ( FILLER_641 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[5\] AMUXBUS_B ) + ( FILLER_644 AMUXBUS_B ) ( FILLER_643 AMUXBUS_B ) + ( FILLER_642 AMUXBUS_B ) ( FILLER_637 AMUXBUS_B ) + ( FILLER_419 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[9\] AMUXBUS_B ) + ( FILLER_418 AMUXBUS_B ) ( FILLER_640 AMUXBUS_B ) + ( FILLER_417 AMUXBUS_B ) ( FILLER_639 AMUXBUS_B ) + ( FILLER_416 AMUXBUS_B ) ( FILLER_638 AMUXBUS_B ) + ( FILLER_415 AMUXBUS_B ) ( FILLER_414 AMUXBUS_B ) + ( FILLER_412 AMUXBUS_B ) ( FILLER_413 AMUXBUS_B ) + ( FILLER_411 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[4\] AMUXBUS_B ) + ( FILLER_635 AMUXBUS_B ) ( FILLER_634 AMUXBUS_B ) + ( FILLER_633 AMUXBUS_B ) ( FILLER_632 AMUXBUS_B ) + ( FILLER_409 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[10\] AMUXBUS_B ) + ( FILLER_631 AMUXBUS_B ) ( FILLER_408 AMUXBUS_B ) + ( FILLER_407 AMUXBUS_B ) ( FILLER_630 AMUXBUS_B ) + ( FILLER_406 AMUXBUS_B ) ( FILLER_405 AMUXBUS_B ) + ( FILLER_629 AMUXBUS_B ) ( FILLER_628 AMUXBUS_B ) + ( FILLER_404 AMUXBUS_B ) ( FILLER_402 AMUXBUS_B ) + ( FILLER_403 AMUXBUS_B ) ( FILLER_401 AMUXBUS_B ) + ( FILLER_624 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[3\] AMUXBUS_B ) + ( FILLER_625 AMUXBUS_B ) ( FILLER_626 AMUXBUS_B ) + ( FILLER_620 AMUXBUS_B ) ( FILLER_623 AMUXBUS_B ) + ( FILLER_399 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[11\] AMUXBUS_B ) + ( FILLER_398 AMUXBUS_B ) ( FILLER_622 AMUXBUS_B ) + ( FILLER_397 AMUXBUS_B ) ( FILLER_621 AMUXBUS_B ) + ( FILLER_396 AMUXBUS_B ) ( FILLER_395 AMUXBUS_B ) + ( FILLER_618 AMUXBUS_B ) ( FILLER_619 AMUXBUS_B ) + ( FILLER_394 AMUXBUS_B ) ( FILLER_392 AMUXBUS_B ) + ( FILLER_393 AMUXBUS_B ) ( FILLER_391 AMUXBUS_B ) + ( FILLER_615 AMUXBUS_B ) ( FILLER_616 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[2\] AMUXBUS_B ) + ( FILLER_385 AMUXBUS_B ) ( FILLER_614 AMUXBUS_B ) + ( FILLER_388 AMUXBUS_B ) ( FILLER_389 AMUXBUS_B ) + ( mprj_pads.area2_io_pad\[12\] AMUXBUS_B ) + ( FILLER_387 AMUXBUS_B ) ( FILLER_613 AMUXBUS_B ) + ( FILLER_386 AMUXBUS_B ) ( FILLER_612 AMUXBUS_B ) + ( FILLER_611 AMUXBUS_B ) ( FILLER_384 AMUXBUS_B ) + ( FILLER_383 AMUXBUS_B ) ( FILLER_610 AMUXBUS_B ) + ( FILLER_609 AMUXBUS_B ) ( FILLER_382 AMUXBUS_B ) + ( FILLER_381 AMUXBUS_B ) ( FILLER_380 AMUXBUS_B ) + ( FILLER_379 AMUXBUS_B ) ( FILLER_606 AMUXBUS_B ) + ( FILLER_607 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[1\] AMUXBUS_B ) + ( FILLER_378 AMUXBUS_B ) ( FILLER_377 AMUXBUS_B ) + ( FILLER_605 AMUXBUS_B ) ( FILLER_376 AMUXBUS_B ) + ( FILLER_604 AMUXBUS_B ) ( FILLER_375 AMUXBUS_B ) + ( FILLER_603 AMUXBUS_B ) ( FILLER_602 AMUXBUS_B ) + ( FILLER_374 AMUXBUS_B ) ( FILLER_SB2 AMUXBUS_B ) + ( disconnect_vdda_2 AMUXBUS_B ) ( FILLER_601 AMUXBUS_B ) + ( FILLER_600 AMUXBUS_B ) ( FILLER_367 AMUXBUS_B ) + ( FILLER_599 AMUXBUS_B ) ( FILLER_370 AMUXBUS_B ) + ( mgmt_vddio_hvclamp_pad\[0\] AMUXBUS_B ) + ( FILLER_369 AMUXBUS_B ) ( FILLER_368 AMUXBUS_B ) + ( mprj_pads.area1_io_pad\[0\] AMUXBUS_B ) + ( FILLER_597 AMUXBUS_B ) ( FILLER_596 AMUXBUS_B ) + ( FILLER_366 AMUXBUS_B ) ( FILLER_595 AMUXBUS_B ) + ( FILLER_365 AMUXBUS_B ) ( FILLER_594 AMUXBUS_B ) + ( FILLER_364 AMUXBUS_B ) ( FILLER_363 AMUXBUS_B ) + ( FILLER_593 AMUXBUS_B ) ( FILLER_362 AMUXBUS_B ) + ( FILLER_592 AMUXBUS_B ) ( FILLER_591 AMUXBUS_B ) + ( FILLER_590 AMUXBUS_B ) ( FILLER_587 AMUXBUS_B ) + ( FILLER_SB1 AMUXBUS_B ) ( disconnect_vdda_1 AMUXBUS_B ) + ( FILLER_586 AMUXBUS_B ) ( FILLER_360 AMUXBUS_B ) + ( mgmt_vccd_lvclamp_pad AMUXBUS_B ) ( FILLER_359 AMUXBUS_B ) + ( FILLER_358 AMUXBUS_B ) ( FILLER_357 AMUXBUS_B ) + ( FILLER_585 AMUXBUS_B ) ( FILLER_584 AMUXBUS_B ) + ( FILLER_356 AMUXBUS_B ) ( FILLER_583 AMUXBUS_B ) + ( FILLER_582 AMUXBUS_B ) ( FILLER_355 AMUXBUS_B ) + ( FILLER_581 AMUXBUS_B ) ( FILLER_354 AMUXBUS_B ) + ( FILLER_353 AMUXBUS_B ) ( mgmt_corner\[1\] AMUXBUS_B ) + ( FILLER_352 AMUXBUS_B ) ( FILLER_580 AMUXBUS_B ) + ( FILLER_351 AMUXBUS_B ) ( FILLER_350 AMUXBUS_B ) + ( FILLER_349 AMUXBUS_B ) ( FILLER_348 AMUXBUS_B ) + ( FILLER_347 AMUXBUS_B ) ( FILLER_346 AMUXBUS_B ) + ( bus_tie_72 AMUXBUS_B ) ( bus_tie_71 AMUXBUS_B ) + ( bus_tie_70 AMUXBUS_B ) ( bus_tie_69 AMUXBUS_B ) + ( bus_tie_68 AMUXBUS_B ) ( FILLER_339 AMUXBUS_B ) + ( bus_tie_67 AMUXBUS_B ) ( FILLER_336 AMUXBUS_B ) + ( FILLER_338 AMUXBUS_B ) ( FILLER_337 AMUXBUS_B ) + ( FILLER_335 AMUXBUS_B ) ( FILLER_331 AMUXBUS_B ) + ( FILLER_332 AMUXBUS_B ) ( FILLER_333 AMUXBUS_B ) + ( mgmt_vdda_hvclamp_pad AMUXBUS_B ) ( FILLER_329 AMUXBUS_B ) + ( FILLER_330 AMUXBUS_B ) ( bus_tie_65 AMUXBUS_B ) + ( bus_tie_66 AMUXBUS_B ) ( FILLER_321 AMUXBUS_B ) + ( bus_tie_64 AMUXBUS_B ) ( bus_tie_63 AMUXBUS_B ) + ( bus_tie_62 AMUXBUS_B ) ( FILLER_322 AMUXBUS_B ) + ( bus_tie_61 AMUXBUS_B ) ( FILLER_318 AMUXBUS_B ) + ( FILLER_320 AMUXBUS_B ) ( FILLER_319 AMUXBUS_B ) + ( FILLER_313 AMUXBUS_B ) ( FILLER_315 AMUXBUS_B ) + ( FILLER_316 AMUXBUS_B ) + ( mgmt_vssio_hvclamp_pad\[0\] AMUXBUS_B ) + ( FILLER_314 AMUXBUS_B ) ( FILLER_312 AMUXBUS_B ) + ( bus_tie_58 AMUXBUS_B ) ( bus_tie_60 AMUXBUS_B ) + ( bus_tie_59 AMUXBUS_B ) ( bus_tie_56 AMUXBUS_B ) + ( bus_tie_57 AMUXBUS_B ) ( FILLER_301 AMUXBUS_B ) + ( FILLER_304 AMUXBUS_B ) ( FILLER_305 AMUXBUS_B ) + ( bus_tie_55 AMUXBUS_B ) ( FILLER_303 AMUXBUS_B ) + ( FILLER_302 AMUXBUS_B ) ( FILLER_295 AMUXBUS_B ) + ( FILLER_299 AMUXBUS_B ) ( clock_pad AMUXBUS_B ) + ( FILLER_297 AMUXBUS_B ) ( FILLER_298 AMUXBUS_B ) + ( FILLER_296 AMUXBUS_B ) ( bus_tie_54 AMUXBUS_B ) + ( bus_tie_53 AMUXBUS_B ) ( bus_tie_52 AMUXBUS_B ) + ( bus_tie_51 AMUXBUS_B ) ( bus_tie_50 AMUXBUS_B ) + ( FILLER_286 AMUXBUS_B ) ( FILLER_287 AMUXBUS_B ) + ( FILLER_288 AMUXBUS_B ) ( bus_tie_49 AMUXBUS_B ) + ( FILLER_285 AMUXBUS_B ) ( FILLER_284 AMUXBUS_B ) + ( FILLER_279 AMUXBUS_B ) ( flash_io1_pad AMUXBUS_B ) + ( FILLER_280 AMUXBUS_B ) ( FILLER_281 AMUXBUS_B ) + ( FILLER_282 AMUXBUS_B ) ( FILLER_278 AMUXBUS_B ) + ( bus_tie_46 AMUXBUS_B ) ( bus_tie_48 AMUXBUS_B ) + ( bus_tie_47 AMUXBUS_B ) ( FILLER_268 AMUXBUS_B ) + ( bus_tie_45 AMUXBUS_B ) ( bus_tie_44 AMUXBUS_B ) + ( FILLER_270 AMUXBUS_B ) ( FILLER_271 AMUXBUS_B ) + ( bus_tie_43 AMUXBUS_B ) ( FILLER_269 AMUXBUS_B ) + ( FILLER_267 AMUXBUS_B ) ( FILLER_261 AMUXBUS_B ) + ( FILLER_264 AMUXBUS_B ) ( FILLER_265 AMUXBUS_B ) + ( flash_io0_pad AMUXBUS_B ) ( FILLER_263 AMUXBUS_B ) + ( FILLER_262 AMUXBUS_B ) ( bus_tie_39 AMUXBUS_B ) + ( bus_tie_42 AMUXBUS_B ) ( bus_tie_41 AMUXBUS_B ) + ( bus_tie_40 AMUXBUS_B ) ( FILLER_251 AMUXBUS_B ) + ( bus_tie_38 AMUXBUS_B ) ( FILLER_253 AMUXBUS_B ) + ( FILLER_254 AMUXBUS_B ) ( bus_tie_37 AMUXBUS_B ) + ( FILLER_252 AMUXBUS_B ) ( FILLER_250 AMUXBUS_B ) + ( FILLER_244 AMUXBUS_B ) ( FILLER_247 AMUXBUS_B ) + ( FILLER_248 AMUXBUS_B ) ( flash_clk_pad AMUXBUS_B ) + ( FILLER_246 AMUXBUS_B ) ( FILLER_245 AMUXBUS_B ) + ( bus_tie_36 AMUXBUS_B ) ( bus_tie_35 AMUXBUS_B ) + ( bus_tie_34 AMUXBUS_B ) ( bus_tie_33 AMUXBUS_B ) + ( bus_tie_32 AMUXBUS_B ) ( FILLER_235 AMUXBUS_B ) + ( FILLER_236 AMUXBUS_B ) ( FILLER_237 AMUXBUS_B ) + ( bus_tie_31 AMUXBUS_B ) ( FILLER_234 AMUXBUS_B ) + ( FILLER_233 AMUXBUS_B ) ( FILLER_227 AMUXBUS_B ) + ( FILLER_230 AMUXBUS_B ) ( FILLER_231 AMUXBUS_B ) + ( flash_csb_pad AMUXBUS_B ) ( FILLER_229 AMUXBUS_B ) + ( FILLER_228 AMUXBUS_B ) ( bus_tie_27 AMUXBUS_B ) + ( bus_tie_30 AMUXBUS_B ) ( bus_tie_29 AMUXBUS_B ) + ( bus_tie_28 AMUXBUS_B ) ( FILLER_216 AMUXBUS_B ) + ( bus_tie_26 AMUXBUS_B ) ( FILLER_220 AMUXBUS_B ) + ( bus_tie_25 AMUXBUS_B ) ( FILLER_218 AMUXBUS_B ) + ( FILLER_219 AMUXBUS_B ) ( FILLER_217 AMUXBUS_B ) + ( FILLER_210 AMUXBUS_B ) ( FILLER_214 AMUXBUS_B ) + ( mgmt_vssd_lvclamp_pad AMUXBUS_B ) ( FILLER_212 AMUXBUS_B ) + ( FILLER_213 AMUXBUS_B ) ( FILLER_211 AMUXBUS_B ) + ( bus_tie_24 AMUXBUS_B ) ( bus_tie_20 AMUXBUS_B ) + ( bus_tie_23 AMUXBUS_B ) ( bus_tie_22 AMUXBUS_B ) + ( bus_tie_21 AMUXBUS_B ) ( FILLER_199 AMUXBUS_B ) + ( FILLER_202 AMUXBUS_B ) ( FILLER_203 AMUXBUS_B ) + ( bus_tie_19 AMUXBUS_B ) ( FILLER_201 AMUXBUS_B ) + ( FILLER_200 AMUXBUS_B ) ( FILLER_195 AMUXBUS_B ) + ( bus_tie_9 AMUXBUS_B ) ( FILLER_196 AMUXBUS_B ) + ( FILLER_197 AMUXBUS_B ) ( FILLER_193 AMUXBUS_B ) + ( FILLER_194 AMUXBUS_B ) ( bus_tie_17 AMUXBUS_B ) + ( bus_tie_18 AMUXBUS_B ) ( bus_tie_14 AMUXBUS_B ) + ( bus_tie_16 AMUXBUS_B ) ( bus_tie_15 AMUXBUS_B ) + ( FILLER_182 AMUXBUS_B ) ( FILLER_185 AMUXBUS_B ) + ( FILLER_186 AMUXBUS_B ) ( bus_tie_13 AMUXBUS_B ) + ( FILLER_184 AMUXBUS_B ) ( FILLER_183 AMUXBUS_B ) + ( FILLER_177 AMUXBUS_B ) ( FILLER_179 AMUXBUS_B ) + ( FILLER_180 AMUXBUS_B ) ( resetb_pad AMUXBUS_B ) + ( FILLER_178 AMUXBUS_B ) ( FILLER_176 AMUXBUS_B ) + ( bus_tie_12 AMUXBUS_B ) ( bus_tie_11 AMUXBUS_B ) + ( bus_tie_10 AMUXBUS_B ) ( bus_tie_8 AMUXBUS_B ) + ( bus_tie_7 AMUXBUS_B ) ( FILLER_168 AMUXBUS_B ) + ( FILLER_169 AMUXBUS_B ) ( bus_tie_6 AMUXBUS_B ) + ( FILLER_166 AMUXBUS_B ) ( FILLER_167 AMUXBUS_B ) + ( FILLER_165 AMUXBUS_B ) ( FILLER_160 AMUXBUS_B ) + ( FILLER_163 AMUXBUS_B ) ( mgmt_vssa_hvclamp_pad AMUXBUS_B ) + ( FILLER_161 AMUXBUS_B ) ( FILLER_162 AMUXBUS_B ) + ( FILLER_159 AMUXBUS_B ) ( bus_tie_4 AMUXBUS_B ) + ( bus_tie_5 AMUXBUS_B ) ( bus_tie_3 AMUXBUS_B ) + ( FILLER_149 AMUXBUS_B ) ( bus_tie_2 AMUXBUS_B ) + ( bus_tie_1 AMUXBUS_B ) ( FILLER_151 AMUXBUS_B ) + ( FILLER_152 AMUXBUS_B ) ( FILLER_150 AMUXBUS_B ) + ( FILLER_148 AMUXBUS_B ) ( mgmt_corner\[0\] AMUXBUS_B ) ; + - mprj_io[34] ( mprj_pads.area2_io_pad\[9\] PAD ) ; + - mprj_io_in[23] ( mprj_pads.area2_io_pad\[9\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1631225 ) ( 210895 * ) ; + - mprj_io_one[23] ( mprj_pads.area2_io_pad\[9\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1625245 ) ( 210895 * ) ; + - mprj_io_slow_sel[23] ( mprj_pads.area2_io_pad\[9\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1622025 ) ( 210895 * ) ; + - mprj_gpio_analog[16] + ( mprj_pads.area2_io_pad\[9\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1618805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[9\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[9\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[70] ( mprj_pads.area2_io_pad\[9\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1612825 ) ( 210895 * ) ; + - mprj_gpio_noesd[16] ( mprj_pads.area2_io_pad\[9\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1609605 ) ( 210895 * ) ; + - mprj_io_analog_en[23] ( mprj_pads.area2_io_pad\[9\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1606845 ) ( 210895 * ) ; + - mprj_io_dm[69] ( mprj_pads.area2_io_pad\[9\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1603625 ) ( 210895 * ) ; + - mprj_io_analog_pol[23] ( mprj_pads.area2_io_pad\[9\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1600405 ) ( 210895 * ) ; + - mprj_io_inp_dis[23] ( mprj_pads.area2_io_pad\[9\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1597645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[9\]/ENABLE_H + ( mprj_pads.area2_io_pad\[9\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[9\]/HLD_H_N + ( mprj_pads.area2_io_pad\[9\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[9\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 1587915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1587987.5 ) ( 210220 * ) + NEW met1 ( 210360 1588670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1588810 ) ( * 1627775 ) + NEW met1 ( 210360 1627915 ) ( 210480 * ) + NEW met1 ( 210420 1628005 ) via_260_260_vh + NEW met2 ( 208635 1628075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 1628005 ) ( 210895 * ) + NEW met2 ( 208635 1627935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 1628005 ) ( 210220 * ) + NEW met1 ( 210360 1628095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1628235 ) ( * 1634605 ) + NEW met1 ( 210420 1588280 ) via_260_860_vh + NEW met1 ( 210360 1587890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 1587987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[23] ( mprj_pads.area2_io_pad\[9\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1585225 ) ( 210895 * ) ; + - mprj_io_dm[71] ( mprj_pads.area2_io_pad\[9\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1582005 ) ( 210895 * ) ; + - mprj_io_holdover[23] ( mprj_pads.area2_io_pad\[9\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1578785 ) ( 210895 * ) ; + - mprj_io_out[23] ( mprj_pads.area2_io_pad\[9\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1576025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[9\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[9\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[9\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[9\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 1634442.5 ) ( 210895 * ) + NEW met2 ( 208635 1634515 ) ( 210895 * ) + NEW met1 ( 209880 1634540 ) ( 210000 * ) + NEW met1 ( 209890 1634605 ) ( 209990 * ) + NEW met1 ( 209940 1634150 ) via_260_860_vh + NEW met1 ( 209880 1633760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1595255 ) ( * 1633620 ) + NEW met1 ( 209880 1595115 ) ( 210000 * ) + NEW met1 ( 209940 1594725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1594430 ) ( 210895 * ) + NEW met2 ( 208635 1594355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1594430 ) ( 209740 * ) + NEW met1 ( 209880 1594335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1573635 ) ( * 1594195 ) + NEW met1 ( 209880 1573495 ) ( 210000 * ) + NEW met1 ( 209940 1573105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1572810 ) ( 210895 * ) + NEW met2 ( 208635 1572735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1572810 ) ( 209740 * ) + NEW met1 ( 209880 1572715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1634442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[23] ( mprj_pads.area2_io_pad\[9\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1566825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[23] + ( mprj_pads.area2_io_pad\[9\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1563605 ) ( 210895 * ) ; + - mprj_io_oeb[23] ( mprj_pads.area2_io_pad\[9\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1560385 ) ( 210895 * ) ; + - mprj_io_in_3v3[23] ( mprj_pads.area2_io_pad\[9\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1557625 ) ( 210895 * ) ; + - flash_io0 ( flash_io0_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 2030000 64215 ) ( 2091000 * ) ; + - flash_io0_pad/TIE_LO_ESD ( flash_io0_pad TIE_LO_ESD ) + ( flash_io0_pad ENABLE_VSWITCH_H ) + ( flash_io0_pad ENABLE_INP_H ) + + ROUTED met2 ( 2024515 209095 ) via_260_260_hv + NEW met2 ( 2024455 209185 ) ( 2024575 * ) + NEW met1 TAPERRULE met1_width_260 ( 2023880 209095 ) ( 2024315 * ) + NEW met2 ( 2024455 209005 ) ( 2024575 * ) + NEW met1 TAPERRULE met1_width_260 ( 2024715 209095 ) ( 2064570 * ) via_260_260_hv + ( * 209185 ) ( 2064630 * ) + NEW met2 ( 2064510 209005 ) ( 2064630 * ) + NEW met1 TAPERRULE met1_width_260 ( 2064770 209095 ) ( 2086180 * ) via_260_260_hv + ( * 209185 ) ( 2086240 * ) + NEW met2 ( 2086120 209005 ) ( 2086240 * ) + NEW met1 TAPERRULE met1_width_260 ( 2086380 209095 ) ( 2102065 * ) ; + - flash_io0_di_core ( flash_io0_pad IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2027775 208635 ) ( * 210895 ) ; + - flash_io0_pad/HLD_H_N ( flash_io0_pad HLD_H_N ) + ( flash_io0_pad TIE_HI_ESD ) + + ROUTED met2 ( 2071000 209515 ) via_260_260_hv + NEW met2 ( 2070940 209605 ) ( 2071060 * ) + NEW met1 TAPERRULE met1_width_260 ( 2031180 209515 ) ( 2070800 * ) + NEW met1 ( 2030980 209515 ) via_260_260_hv ( * 209605 ) + ( 2031040 * ) + NEW met1 TAPERRULE met1_width_260 ( 2023880 209515 ) ( 2030780 * ) + NEW met2 ( 2030920 209425 ) ( 2031040 * ) + NEW met2 ( 2070940 209425 ) ( 2071060 * ) + NEW met1 TAPERRULE met1_width_260 ( 2071200 209515 ) ( 2102065 * ) ; + - flash_io0_pad/SLOW ( flash_io0_pad SLOW ) + ( constant_block_4 zero ) ( flash_io0_pad IB_MODE_SEL ) + ( flash_io0_pad VTRIP_SEL ) ( flash_io0_pad HLD_OVR ) + ( flash_io0_pad ANALOG_SEL ) ( flash_io0_pad ANALOG_POL ) + ( flash_io0_pad ANALOG_EN ) + + ROUTED met2 ( 2036965 209935 ) via_260_260_hv + NEW met2 ( 2036905 210025 ) ( 2037025 * ) + NEW met1 TAPERRULE met1_width_260 ( 2023880 209935 ) ( 2036765 * ) + NEW met2 ( 2036905 209845 ) ( 2037025 * ) + NEW met1 TAPERRULE met1_width_260 ( 2037165 209935 ) ( 2052120 * ) via_260_260_hv + ( * 210025 ) ( 2052180 * ) + NEW met2 ( 2052060 209845 ) ( 2052180 * ) + NEW met1 TAPERRULE met1_width_260 ( 2052320 209935 ) ( 2058585 * ) via_260_260_hv + ( * 210025 ) ( 2058645 * ) + NEW met2 ( 2058525 209845 ) ( 2058645 * ) + NEW met1 TAPERRULE met1_width_260 ( 2058785 209935 ) ( 2073755 * ) via_260_260_hv + ( * 210025 ) ( 2073815 * ) + NEW met2 ( 2073695 209845 ) ( 2073815 * ) + NEW met1 TAPERRULE met1_width_260 ( 2073955 209935 ) ( 2080195 * ) via_260_260_hv + ( * 210025 ) ( 2080255 * ) + NEW met2 ( 2080135 209845 ) ( 2080255 * ) + NEW met1 TAPERRULE met1_width_260 ( 2080395 209935 ) ( 2092150 * ) via_260_260_hv + ( * 210025 ) ( 2092210 * ) + NEW met2 ( 2092090 209845 ) ( 2092210 * ) + NEW met1 TAPERRULE met1_width_260 ( 2092350 209935 ) ( 2095355 * ) via_260_260_hv + ( * 210025 ) ( 2095415 * ) + NEW met2 ( 2095295 209845 ) ( 2095415 * ) + NEW met1 TAPERRULE met1_width_260 ( 2095555 209935 ) ( 2103945 * ) via_260_260_hv + ( * 210025 ) ( 2104005 * ) + NEW met2 TAPERRULE met2_width_260 ( 2103945 204625 ) ( * 209735 ) + NEW met2 ( 2103865 204485 ) ( 2104025 * ) + NEW met2 ( 2103945 204360 ) via2_300_300_vx + NEW met3 ( 2103920 204385 ) ( 2103970 * ) + NEW met3 ( 2104245 204360 ) ( 2120150 * ) + NEW met3 ( 2120150 203490 ) ( * 204060 ) + NEW met3 ( 2103920 204335 ) ( 2103970 * ) + NEW met3 ( 2103920 204360 ) ( 2103645 * ) + NEW met2 ( 2103865 204235 ) ( 2104025 * ) ; + - flash_io0_pad/PAD_A_ESD_0_H ( flash_io0_pad PAD_A_ESD_0_H ) ; + - flash_io0_pad/PAD_A_ESD_1_H ( flash_io0_pad PAD_A_ESD_1_H ) ; + - flash_io0_ieb_core ( flash_io0_pad DM[2] ) + ( flash_io0_pad INP_DIS ) ( flash_io0_pad DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2061355 208635 ) ( * 208810 ) ( * 208950 ) + ( * 210895 ) ( * 211035 ) ( * 211380 ) + NEW met2 ( 2061430 211520 ) ( 2061550 * ) + NEW met2 ( 2061490 211610 ) via_260_260_hv + NEW met2 ( 2061430 211700 ) ( 2061550 * ) + NEW met1 ( 2061690 211610 ) ( 2077130 * ) via_260_260_hv + ( * 211700 ) ( 2077190 * ) + NEW met2 ( 2077070 211520 ) ( 2077190 * ) + NEW met2 ( 2077130 208950 ) ( * 211380 ) + NEW met1 ( 2046510 211610 ) ( 2061290 * ) + NEW met1 ( 2046310 211610 ) via_260_260_hv ( * 211700 ) + ( 2046370 * ) + NEW met2 ( 2046250 211520 ) ( 2046370 * ) + NEW met2 ( 2046310 208950 ) ( * 211380 ) ; + - flash_io0_pad/PAD_A_NOESD_H ( flash_io0_pad PAD_A_NOESD_H ) ; + - flash_io0_oeb_core ( flash_io0_pad OE_N ) ( flash_io0_pad DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2098615 208635 ) ( * 208810 ) ( * 208950 ) + ( * 210895 ) ( * 211035 ) ( * 212010 ) + NEW met2 ( 2098690 212150 ) ( 2098810 * ) + NEW met2 ( 2098750 212240 ) via_260_260_hv + NEW met2 ( 2098690 212330 ) ( 2098810 * ) + NEW met1 ( 2055710 212240 ) ( 2098550 * ) + NEW met1 ( 2055510 212240 ) via_260_260_hv ( * 212330 ) + ( 2055570 * ) + NEW met2 ( 2055450 212150 ) ( 2055570 * ) + NEW met2 ( 2055510 208950 ) ( * 212010 ) ; + - flash_io0_do_core ( flash_io0_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2082975 208635 ) ( * 210895 ) ; + - flash_io0_pad/IN_H ( flash_io0_pad IN_H ) ; + - mprj_io[15] ( user1_analog_pad\[0\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3142850 5123530 ) ( 3202090 * ) ; + - mprj_analog[1] ( user1_analog_pad\[0\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_25000 ( 3172220 4988150 ) ( * 5070200 ) ; + - vdda_pad ( mgmt_vdda_hvclamp_pad VDDA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3121910 64465 ) ( 3181150 * ) ; + - mprj_io[0] ( mprj_pads.area1_io_pad\[0\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 507000 ) ( * 568000 ) ; + - mprj_pads.area1_io_pad\[0\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[0\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[0\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[0\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 501557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 502240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 502380 ) ( * 540745 ) + NEW met1 ( 3378000 540885 ) ( 3378120 * ) + NEW met1 ( 3378060 541275 ) via_260_860_vh + NEW met2 ( 3377105 541645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 541570 ) ( 3379365 * ) + NEW met1 ( 3378000 541665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 541805 ) ( * 562365 ) + NEW met1 ( 3378000 562505 ) ( 3378120 * ) + NEW met1 ( 3378060 562895 ) via_260_860_vh + NEW met2 ( 3377105 563265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 563190 ) ( 3379365 * ) + NEW met1 ( 3378000 563285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 563190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 541570 ) ( 3377860 * ) + NEW met2 ( 3378060 501850 ) via_260_860_vh ( * 501460 ) + ( 3378120 * ) + NEW met1 ( 3378010 501395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 501557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 501485 ) ( 3379365 * ) ; + - mprj_io_in[0] ( mprj_pads.area1_io_pad\[0\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 504775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[0\]/HLD_H_N + ( mprj_pads.area1_io_pad\[0\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[0\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 548085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 548012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 548110 ) ( 3377640 * ) + NEW met1 ( 3377580 547720 ) via_260_860_vh + NEW met1 ( 3377520 547330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 508225 ) ( * 547190 ) + NEW met1 ( 3377520 508085 ) ( 3377640 * ) + NEW met1 ( 3377580 507995 ) via_260_260_vh + NEW met2 ( 3377105 508065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 507995 ) ( 3379365 * ) + NEW met2 ( 3377105 507925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 507995 ) ( 3377380 * ) + NEW met1 ( 3377520 507905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 501395 ) ( * 507765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 548012.5 ) ( 3377380 * ) ; + - mprj_io_one[0] ( mprj_pads.area1_io_pad\[0\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 510755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[0] ( mprj_pads.area1_io_pad\[0\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 513975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[0\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[0\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[0\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[0\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[1] ( mprj_pads.area1_io_pad\[0\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 523175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[0\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[0\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[0] ( mprj_pads.area1_io_pad\[0\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 529155 ) ( 3379365 * ) ; + - mprj_io_dm[0] ( mprj_pads.area1_io_pad\[0\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 532375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[0] ( mprj_pads.area1_io_pad\[0\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 535595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[0] ( mprj_pads.area1_io_pad\[0\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 538355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[0\]/ENABLE_H + ( mprj_pads.area1_io_pad\[0\] ENABLE_H ) ; + - mprj_io_analog_sel[0] ( mprj_pads.area1_io_pad\[0\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 550775 ) ( 3379365 * ) ; + - mprj_io_dm[2] ( mprj_pads.area1_io_pad\[0\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 553995 ) ( 3379365 * ) ; + - mprj_io_holdover[0] ( mprj_pads.area1_io_pad\[0\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 557215 ) ( 3379365 * ) ; + - mprj_io_out[0] ( mprj_pads.area1_io_pad\[0\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 559975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[0] ( mprj_pads.area1_io_pad\[0\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 569175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[0] + ( mprj_pads.area1_io_pad\[0\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 572395 ) ( 3379365 * ) ; + - mprj_io_oeb[0] ( mprj_pads.area1_io_pad\[0\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 575615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[0] ( mprj_pads.area1_io_pad\[0\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 578375 ) ( 3379365 * ) ; + - mprj_io[17] ( user1_analog_pad\[2\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 2376850 5123530 ) ( 2436090 * ) ; + - mprj_analog[3] ( user1_analog_pad\[2\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_25000 ( 2406220 4988150 ) ( * 5070200 ) ; + - mprj_io[25] ( mprj_pads.area2_io_pad\[0\] PAD ) ; + - mprj_io_in[14] ( mprj_pads.area2_io_pad\[0\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3997225 ) ( 210895 * ) ; + - mprj_io_one[14] ( mprj_pads.area2_io_pad\[0\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3991245 ) ( 210895 * ) ; + - mprj_io_slow_sel[14] ( mprj_pads.area2_io_pad\[0\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3988025 ) ( 210895 * ) ; + - mprj_gpio_analog[7] ( mprj_pads.area2_io_pad\[0\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3984805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[0\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[0\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[43] ( mprj_pads.area2_io_pad\[0\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3978825 ) ( 210895 * ) ; + - mprj_gpio_noesd[7] ( mprj_pads.area2_io_pad\[0\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3975605 ) ( 210895 * ) ; + - mprj_io_analog_en[14] ( mprj_pads.area2_io_pad\[0\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3972845 ) ( 210895 * ) ; + - mprj_io_dm[42] ( mprj_pads.area2_io_pad\[0\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3969625 ) ( 210895 * ) ; + - mprj_io_analog_pol[14] ( mprj_pads.area2_io_pad\[0\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3966405 ) ( 210895 * ) ; + - mprj_io_inp_dis[14] ( mprj_pads.area2_io_pad\[0\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3963645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[0\]/ENABLE_H + ( mprj_pads.area2_io_pad\[0\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[0\]/HLD_H_N + ( mprj_pads.area2_io_pad\[0\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[0\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3953915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3953987.5 ) ( 210220 * ) + NEW met1 ( 210360 3954670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3954810 ) ( * 3993775 ) + NEW met1 ( 210360 3993915 ) ( 210480 * ) + NEW met1 ( 210420 3994005 ) via_260_260_vh + NEW met2 ( 208635 3994075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3994005 ) ( 210895 * ) + NEW met2 ( 208635 3993935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3994005 ) ( 210220 * ) + NEW met1 ( 210360 3994095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3994235 ) ( * 4000605 ) + NEW met1 ( 210420 3954280 ) via_260_860_vh + NEW met1 ( 210360 3953890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3953987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[14] ( mprj_pads.area2_io_pad\[0\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3951225 ) ( 210895 * ) ; + - mprj_io_dm[44] ( mprj_pads.area2_io_pad\[0\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3948005 ) ( 210895 * ) ; + - mprj_io_holdover[14] ( mprj_pads.area2_io_pad\[0\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3944785 ) ( 210895 * ) ; + - mprj_io_out[14] ( mprj_pads.area2_io_pad\[0\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3942025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[0\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[0\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[0\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[0\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 4000442.5 ) ( 210895 * ) + NEW met2 ( 208635 4000515 ) ( 210895 * ) + NEW met1 ( 209880 4000540 ) ( 210000 * ) + NEW met1 ( 209890 4000605 ) ( 209990 * ) + NEW met1 ( 209940 4000150 ) via_260_860_vh + NEW met1 ( 209880 3999760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3961255 ) ( * 3999620 ) + NEW met1 ( 209880 3961115 ) ( 210000 * ) + NEW met1 ( 209940 3960725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3960430 ) ( 210895 * ) + NEW met2 ( 208635 3960355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3960430 ) ( 209740 * ) + NEW met1 ( 209880 3960335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3939635 ) ( * 3960195 ) + NEW met1 ( 209880 3939495 ) ( 210000 * ) + NEW met1 ( 209940 3939105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3938810 ) ( 210895 * ) + NEW met2 ( 208635 3938735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3938810 ) ( 209740 * ) + NEW met1 ( 209880 3938715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 4000442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[14] ( mprj_pads.area2_io_pad\[0\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3932825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[14] + ( mprj_pads.area2_io_pad\[0\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3929605 ) ( 210895 * ) ; + - mprj_io_oeb[14] ( mprj_pads.area2_io_pad\[0\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3926385 ) ( 210895 * ) ; + - mprj_io_in_3v3[14] ( mprj_pads.area2_io_pad\[0\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3923625 ) ( 210895 * ) ; + - mprj_io[35] ( mprj_pads.area2_io_pad\[10\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211480 2278940 ) ( * 4585710 ) + NEW met5 TAPERRULE met5_width_13000 ( 211480 4609410 ) ( * 4635320 ) + NEW met4 TAPERRULE met4_width_620 ( 205170 4608920 ) ( 217860 * ) + NEW met4 TAPERRULE met4_width_650 ( 217685 4586660 ) ( * 4608460 ) + NEW met4 TAPERRULE met4_width_460 ( 205170 4586280 ) ( 217860 * ) + NEW met4 TAPERRULE met4_width_490 ( 205265 4586660 ) ( * 4608460 ) + NEW met4 ( 211435 4597560 ) via4_11850_22100 + NEW met3 TAPERRULE met3_width_650 ( 203620 4608935 ) ( 233760 * ) + NEW met3 TAPERRULE met3_width_16550 ( 225635 4586660 ) ( * 4608460 ) + NEW met3 TAPERRULE met3_width_560 ( 203620 4586230 ) ( 233760 * ) + NEW met3 TAPERRULE met3_width_2040 ( 204490 4586660 ) ( * 4608460 ) + NEW met3 ( 211435 4597560 ) via3_11850_22100_hx + NEW met5 TAPERRULE met5_width_13000 ( 211480 2228670 ) ( * 2254540 ) + NEW met4 TAPERRULE met4_width_480 ( 205140 2278380 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_450 ( 217695 2255490 ) ( * 2277990 ) + NEW met4 TAPERRULE met4_width_600 ( 205140 2255040 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_550 ( 205265 2255490 ) ( * 2277990 ) + NEW met4 ( 211505 2266740 ) via4_11930_22800 + NEW met3 TAPERRULE met3_width_560 ( 204850 2278420 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_16650 ( 225795 2255490 ) ( * 2277990 ) + NEW met3 TAPERRULE met3_width_585 ( 204850 2255047.5 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_840 ( 205120 2255490 ) ( * 2277990 ) + NEW met3 ( 211505 2266740 ) via3_11930_22800_hx + NEW met5 TAPERRULE met5_width_13000 ( 211480 892940 ) ( * 2204270 ) + NEW met4 TAPERRULE met4_width_580 ( 205110 2228160 ) ( 217740 * ) + NEW met4 TAPERRULE met4_width_460 ( 217660 2205220 ) ( * 2227720 ) + NEW met4 TAPERRULE met4_width_500 ( 205110 2204820 ) ( 217740 * ) + NEW met4 TAPERRULE met4_width_540 ( 205230 2205220 ) ( * 2227720 ) + NEW met4 ( 211465 2216470 ) via4_11930_22800 + NEW met3 TAPERRULE met3_width_630 ( 204850 2228185 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_16690 ( 225775 2205220 ) ( * 2227720 ) + NEW met3 TAPERRULE met3_width_570 ( 204850 2204785 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_800 ( 205100 2205220 ) ( * 2227720 ) + NEW met3 ( 211465 2216470 ) via3_11930_22800_hx ; + - mprj_io_in[24] ( mprj_pads.area2_io_pad\[10\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1415225 ) ( 210895 * ) ; + - mprj_io_one[24] ( mprj_pads.area2_io_pad\[10\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1409245 ) ( 210895 * ) ; + - mprj_io_slow_sel[24] ( mprj_pads.area2_io_pad\[10\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1406025 ) ( 210895 * ) ; + - mprj_gpio_analog[17] + ( mprj_pads.area2_io_pad\[10\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1402805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[10\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[10\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[73] ( mprj_pads.area2_io_pad\[10\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1396825 ) ( 210895 * ) ; + - mprj_gpio_noesd[17] + ( mprj_pads.area2_io_pad\[10\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1393605 ) ( 210895 * ) ; + - mprj_io_analog_en[24] ( mprj_pads.area2_io_pad\[10\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1390845 ) ( 210895 * ) ; + - mprj_io_dm[72] ( mprj_pads.area2_io_pad\[10\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1387625 ) ( 210895 * ) ; + - mprj_io_analog_pol[24] + ( mprj_pads.area2_io_pad\[10\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1384405 ) ( 210895 * ) ; + - mprj_io_inp_dis[24] ( mprj_pads.area2_io_pad\[10\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1381645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[10\]/ENABLE_H + ( mprj_pads.area2_io_pad\[10\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[10\]/HLD_H_N + ( mprj_pads.area2_io_pad\[10\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[10\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 1371915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1371987.5 ) ( 210220 * ) + NEW met1 ( 210360 1372670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1372810 ) ( * 1411775 ) + NEW met1 ( 210360 1411915 ) ( 210480 * ) + NEW met1 ( 210420 1412005 ) via_260_260_vh + NEW met2 ( 208635 1412075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 1412005 ) ( 210895 * ) + NEW met2 ( 208635 1411935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 1412005 ) ( 210220 * ) + NEW met1 ( 210360 1412095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1412235 ) ( * 1418605 ) + NEW met1 ( 210420 1372280 ) via_260_860_vh + NEW met1 ( 210360 1371890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 1371987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[24] + ( mprj_pads.area2_io_pad\[10\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1369225 ) ( 210895 * ) ; + - mprj_io_dm[74] ( mprj_pads.area2_io_pad\[10\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1366005 ) ( 210895 * ) ; + - mprj_io_holdover[24] ( mprj_pads.area2_io_pad\[10\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1362785 ) ( 210895 * ) ; + - mprj_io_out[24] ( mprj_pads.area2_io_pad\[10\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1360025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[10\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[10\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[10\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[10\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 1418442.5 ) ( 210895 * ) + NEW met2 ( 208635 1418515 ) ( 210895 * ) + NEW met1 ( 209880 1418540 ) ( 210000 * ) + NEW met1 ( 209890 1418605 ) ( 209990 * ) + NEW met1 ( 209940 1418150 ) via_260_860_vh + NEW met1 ( 209880 1417760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1379255 ) ( * 1417620 ) + NEW met1 ( 209880 1379115 ) ( 210000 * ) + NEW met1 ( 209940 1378725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1378430 ) ( 210895 * ) + NEW met2 ( 208635 1378355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1378430 ) ( 209740 * ) + NEW met1 ( 209880 1378335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1357635 ) ( * 1378195 ) + NEW met1 ( 209880 1357495 ) ( 210000 * ) + NEW met1 ( 209940 1357105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1356810 ) ( 210895 * ) + NEW met2 ( 208635 1356735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1356810 ) ( 209740 * ) + NEW met1 ( 209880 1356715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1418442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[24] ( mprj_pads.area2_io_pad\[10\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1350825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[24] + ( mprj_pads.area2_io_pad\[10\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1347605 ) ( 210895 * ) ; + - mprj_io_oeb[24] ( mprj_pads.area2_io_pad\[10\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1344385 ) ( 210895 * ) ; + - mprj_io_in_3v3[24] ( mprj_pads.area2_io_pad\[10\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1341625 ) ( 210895 * ) ; + - vdda1_pad2 ( user1_vdda_hvclamp_pad\[1\] VDDA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3523530 2526910 ) ( * 2586150 ) ; + - mprj_io[19] ( user2_analog_pad_with_clamp\[0\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 1422850 5123530 ) ( 1482090 * ) ; + - mprj_analog[5] ( user2_analog_pad_with_clamp\[0\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_15680 ( 1465540 4995840 ) ( 1536850 * ) ; + - mprj_clamp_high[1] ( user2_analog_pad_with_clamp\[0\] DRN_HVC ) + + ROUTED met2 TAPERRULE met2_width_23900 ( 1477340 4988070 ) ( * 5013590 ) ; + - mprj_clamp_low[1] + ( user2_analog_pad_with_clamp\[0\] SRC_BDY_HVC ) + + ROUTED met2 TAPERRULE met2_width_2050 ( 1415565 4989025 ) ( 1439325 * ) ; + - mprj_io[2] ( mprj_pads.area1_io_pad\[2\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 958000 ) ( * 1019000 ) ; + - mprj_pads.area1_io_pad\[2\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[2\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[2\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[2\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 952557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 953240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 953380 ) ( * 991745 ) + NEW met1 ( 3378000 991885 ) ( 3378120 * ) + NEW met1 ( 3378060 992275 ) via_260_860_vh + NEW met2 ( 3377105 992645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 992570 ) ( 3379365 * ) + NEW met1 ( 3378000 992665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 992805 ) ( * 1013365 ) + NEW met1 ( 3378000 1013505 ) ( 3378120 * ) + NEW met1 ( 3378060 1013895 ) via_260_860_vh + NEW met2 ( 3377105 1014265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1014190 ) ( 3379365 * ) + NEW met1 ( 3378000 1014285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1014190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 992570 ) ( 3377860 * ) + NEW met2 ( 3378060 952850 ) via_260_860_vh ( * 952460 ) + ( 3378120 * ) + NEW met1 ( 3378010 952395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 952557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 952485 ) ( 3379365 * ) ; + - mprj_io_in[2] ( mprj_pads.area1_io_pad\[2\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 955775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[2\]/HLD_H_N + ( mprj_pads.area1_io_pad\[2\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[2\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 999085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 999012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 999110 ) ( 3377640 * ) + NEW met1 ( 3377580 998720 ) via_260_860_vh + NEW met1 ( 3377520 998330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 959225 ) ( * 998190 ) + NEW met1 ( 3377520 959085 ) ( 3377640 * ) + NEW met1 ( 3377580 958995 ) via_260_260_vh + NEW met2 ( 3377105 959065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 958995 ) ( 3379365 * ) + NEW met2 ( 3377105 958925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 958995 ) ( 3377380 * ) + NEW met1 ( 3377520 958905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 952395 ) ( * 958765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 999012.5 ) ( 3377380 * ) ; + - mprj_io_one[2] ( mprj_pads.area1_io_pad\[2\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 961755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[2] ( mprj_pads.area1_io_pad\[2\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 964975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[2\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[2\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[2\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[2\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[7] ( mprj_pads.area1_io_pad\[2\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 974175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[2\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[2\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[2] ( mprj_pads.area1_io_pad\[2\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 980155 ) ( 3379365 * ) ; + - mprj_io_dm[6] ( mprj_pads.area1_io_pad\[2\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 983375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[2] ( mprj_pads.area1_io_pad\[2\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 986595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[2] ( mprj_pads.area1_io_pad\[2\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 989355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[2\]/ENABLE_H + ( mprj_pads.area1_io_pad\[2\] ENABLE_H ) ; + - mprj_io_analog_sel[2] ( mprj_pads.area1_io_pad\[2\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1001775 ) ( 3379365 * ) ; + - mprj_io_dm[8] ( mprj_pads.area1_io_pad\[2\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1004995 ) ( 3379365 * ) ; + - mprj_io_holdover[2] ( mprj_pads.area1_io_pad\[2\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1008215 ) ( 3379365 * ) ; + - mprj_io_out[2] ( mprj_pads.area1_io_pad\[2\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1010975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[2] ( mprj_pads.area1_io_pad\[2\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1020175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[2] + ( mprj_pads.area1_io_pad\[2\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1023395 ) ( 3379365 * ) ; + - mprj_io_oeb[2] ( mprj_pads.area1_io_pad\[2\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1026615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[2] ( mprj_pads.area1_io_pad\[2\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1029375 ) ( 3379365 * ) ; + - vssa2_pad ( user2_vssa_hvclamp_pad VSSA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 64465 4145850 ) ( * 4205090 ) ; + - mprj_io[27] ( mprj_pads.area2_io_pad\[2\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 673680 ) ( * 2324550 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348180 ) ( * 4538130 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562500 ) ( * 4588410 ) + NEW met5 ( 3370900 4612730 ) ( 3382300 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370200 4612280 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_790 ( 3382705 4589360 ) ( * 4611830 ) + NEW met4 TAPERRULE met4_width_740 ( 3370200 4588840 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589360 ) ( * 4611830 ) + NEW met4 ( 3376495 4600595 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_520 ( 3353950 4612240 ) ( 3382660 * ) + NEW met3 ( 3353950 4612360 ) ( 3382055 * ) + NEW met3 TAPERRULE met3_width_500 ( 3382560 4589360 ) ( * 4611830 ) + NEW met3 TAPERRULE met3_width_710 ( 3353950 4588855 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_16880 ( 3362240 4589360 ) ( * 4611830 ) + NEW met3 ( 3376495 4600595 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_690 ( 3370280 4562045 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_730 ( 3382815 4539080 ) ( * 4561550 ) + NEW met4 TAPERRULE met4_width_650 ( 3370280 4538605 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_690 ( 3370475 4539080 ) ( * 4561550 ) + NEW met4 ( 3376635 4550315 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_545 ( 3353950 4561972.5 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_360 ( 3382630 4539080 ) ( * 4561550 ) + NEW met3 TAPERRULE met3_width_630 ( 3353950 4538615 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_17020 ( 3362310 4539080 ) ( * 4561550 ) + NEW met3 ( 3376635 4550315 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_620 ( 3370250 2347690 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_630 ( 3382825 2325500 ) ( * 2347230 ) + NEW met4 TAPERRULE met4_width_630 ( 3370250 2325035 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_590 ( 3370395 2325500 ) ( * 2347230 ) + NEW met4 ( 3376600 2336365 ) via4_11820_22030 + NEW met3 TAPERRULE met3_width_620 ( 3353790 2347690 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_590 ( 3382805 2325500 ) ( * 2347230 ) + NEW met3 TAPERRULE met3_width_605 ( 3353790 2325047.5 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_17050 ( 3362165 2325500 ) ( * 2347230 ) + NEW met3 ( 3376600 2336365 ) via3_11820_22030_hx ; + - mprj_io_in[16] ( mprj_pads.area2_io_pad\[2\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3565225 ) ( 210895 * ) ; + - mprj_io_one[16] ( mprj_pads.area2_io_pad\[2\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3559245 ) ( 210895 * ) ; + - mprj_io_slow_sel[16] ( mprj_pads.area2_io_pad\[2\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3556025 ) ( 210895 * ) ; + - mprj_gpio_analog[9] ( mprj_pads.area2_io_pad\[2\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3552805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[2\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[2\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[49] ( mprj_pads.area2_io_pad\[2\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3546825 ) ( 210895 * ) ; + - mprj_gpio_noesd[9] ( mprj_pads.area2_io_pad\[2\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3543605 ) ( 210895 * ) ; + - mprj_io_analog_en[16] ( mprj_pads.area2_io_pad\[2\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3540845 ) ( 210895 * ) ; + - mprj_io_dm[48] ( mprj_pads.area2_io_pad\[2\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3537625 ) ( 210895 * ) ; + - mprj_io_analog_pol[16] ( mprj_pads.area2_io_pad\[2\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3534405 ) ( 210895 * ) ; + - mprj_io_inp_dis[16] ( mprj_pads.area2_io_pad\[2\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3531645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[2\]/ENABLE_H + ( mprj_pads.area2_io_pad\[2\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[2\]/HLD_H_N + ( mprj_pads.area2_io_pad\[2\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[2\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3521915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3521987.5 ) ( 210220 * ) + NEW met1 ( 210360 3522670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3522810 ) ( * 3561775 ) + NEW met1 ( 210360 3561915 ) ( 210480 * ) + NEW met1 ( 210420 3562005 ) via_260_260_vh + NEW met2 ( 208635 3562075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3562005 ) ( 210895 * ) + NEW met2 ( 208635 3561935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3562005 ) ( 210220 * ) + NEW met1 ( 210360 3562095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3562235 ) ( * 3568605 ) + NEW met1 ( 210420 3522280 ) via_260_860_vh + NEW met1 ( 210360 3521890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3521987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[16] ( mprj_pads.area2_io_pad\[2\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3519225 ) ( 210895 * ) ; + - mprj_io_dm[50] ( mprj_pads.area2_io_pad\[2\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3516005 ) ( 210895 * ) ; + - mprj_io_holdover[16] ( mprj_pads.area2_io_pad\[2\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3512785 ) ( 210895 * ) ; + - mprj_io_out[16] ( mprj_pads.area2_io_pad\[2\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3510025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[2\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[2\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[2\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[2\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 3568442.5 ) ( 210895 * ) + NEW met2 ( 208635 3568515 ) ( 210895 * ) + NEW met1 ( 209880 3568540 ) ( 210000 * ) + NEW met1 ( 209890 3568605 ) ( 209990 * ) + NEW met1 ( 209940 3568150 ) via_260_860_vh + NEW met1 ( 209880 3567760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3529255 ) ( * 3567620 ) + NEW met1 ( 209880 3529115 ) ( 210000 * ) + NEW met1 ( 209940 3528725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3528430 ) ( 210895 * ) + NEW met2 ( 208635 3528355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3528430 ) ( 209740 * ) + NEW met1 ( 209880 3528335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3507635 ) ( * 3528195 ) + NEW met1 ( 209880 3507495 ) ( 210000 * ) + NEW met1 ( 209940 3507105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3506810 ) ( 210895 * ) + NEW met2 ( 208635 3506735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3506810 ) ( 209740 * ) + NEW met1 ( 209880 3506715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3568442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[16] ( mprj_pads.area2_io_pad\[2\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3500825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[16] + ( mprj_pads.area2_io_pad\[2\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3497605 ) ( 210895 * ) ; + - mprj_io_oeb[16] ( mprj_pads.area2_io_pad\[2\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3494385 ) ( 210895 * ) ; + - mprj_io_in_3v3[16] ( mprj_pads.area2_io_pad\[2\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3491625 ) ( 210895 * ) ; + - vssio_pad ( mgmt_vssio_hvclamp_pad\[0\] VSSIO_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 2852910 64465 ) ( 2912150 * ) ; + - mprj_io[37] ( mprj_pads.area2_io_pad\[12\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211480 2278940 ) ( * 4585710 ) + NEW met5 TAPERRULE met5_width_13000 ( 211480 4609410 ) ( * 4635320 ) + NEW met4 TAPERRULE met4_width_620 ( 205170 4608920 ) ( 217860 * ) + NEW met4 TAPERRULE met4_width_650 ( 217685 4586660 ) ( * 4608460 ) + NEW met4 TAPERRULE met4_width_460 ( 205170 4586280 ) ( 217860 * ) + NEW met4 TAPERRULE met4_width_490 ( 205265 4586660 ) ( * 4608460 ) + NEW met4 ( 211435 4597560 ) via4_11850_22100 + NEW met3 TAPERRULE met3_width_650 ( 203620 4608935 ) ( 233760 * ) + NEW met3 TAPERRULE met3_width_16550 ( 225635 4586660 ) ( * 4608460 ) + NEW met3 TAPERRULE met3_width_560 ( 203620 4586230 ) ( 233760 * ) + NEW met3 TAPERRULE met3_width_2040 ( 204490 4586660 ) ( * 4608460 ) + NEW met3 ( 211435 4597560 ) via3_11850_22100_hx + NEW met5 TAPERRULE met5_width_13000 ( 211480 2228670 ) ( * 2254540 ) + NEW met4 TAPERRULE met4_width_480 ( 205140 2278380 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_450 ( 217695 2255490 ) ( * 2277990 ) + NEW met4 TAPERRULE met4_width_600 ( 205140 2255040 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_550 ( 205265 2255490 ) ( * 2277990 ) + NEW met4 ( 211505 2266740 ) via4_11930_22800 + NEW met3 TAPERRULE met3_width_560 ( 204850 2278420 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_16650 ( 225795 2255490 ) ( * 2277990 ) + NEW met3 TAPERRULE met3_width_585 ( 204850 2255047.5 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_840 ( 205120 2255490 ) ( * 2277990 ) + NEW met3 ( 211505 2266740 ) via3_11930_22800_hx + NEW met5 TAPERRULE met5_width_13000 ( 211480 892940 ) ( * 2204270 ) + NEW met4 TAPERRULE met4_width_580 ( 205110 2228160 ) ( 217740 * ) + NEW met4 TAPERRULE met4_width_460 ( 217660 2205220 ) ( * 2227720 ) + NEW met4 TAPERRULE met4_width_500 ( 205110 2204820 ) ( 217740 * ) + NEW met4 TAPERRULE met4_width_540 ( 205230 2205220 ) ( * 2227720 ) + NEW met4 ( 211465 2216470 ) via4_11930_22800 + NEW met3 TAPERRULE met3_width_630 ( 204850 2228185 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_16690 ( 225775 2205220 ) ( * 2227720 ) + NEW met3 TAPERRULE met3_width_570 ( 204850 2204785 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_800 ( 205100 2205220 ) ( * 2227720 ) + NEW met3 ( 211465 2216470 ) via3_11930_22800_hx ; + - mprj_io_in[26] ( mprj_pads.area2_io_pad\[12\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 983225 ) ( 210895 * ) ; + - mprj_io_one[26] ( mprj_pads.area2_io_pad\[12\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 977245 ) ( 210895 * ) ; + - mprj_io_slow_sel[26] ( mprj_pads.area2_io_pad\[12\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 974025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[12\]/PAD_A_ESD_0_H + ( mprj_pads.area2_io_pad\[12\] PAD_A_ESD_0_H ) ; + - mprj_pads.area2_io_pad\[12\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[12\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[79] ( mprj_pads.area2_io_pad\[12\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 964825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[12\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[12\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[26] ( mprj_pads.area2_io_pad\[12\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 958845 ) ( 210895 * ) ; + - mprj_io_dm[78] ( mprj_pads.area2_io_pad\[12\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 955625 ) ( 210895 * ) ; + - mprj_io_analog_pol[26] + ( mprj_pads.area2_io_pad\[12\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 952405 ) ( 210895 * ) ; + - mprj_io_inp_dis[26] ( mprj_pads.area2_io_pad\[12\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 949645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[12\]/ENABLE_H + ( mprj_pads.area2_io_pad\[12\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[12\]/HLD_H_N + ( mprj_pads.area2_io_pad\[12\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[12\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 939915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 939987.5 ) ( 210220 * ) + NEW met1 ( 210360 940670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 940810 ) ( * 979775 ) + NEW met1 ( 210360 979915 ) ( 210480 * ) + NEW met1 ( 210420 980005 ) via_260_260_vh + NEW met2 ( 208635 980075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 980005 ) ( 210895 * ) + NEW met2 ( 208635 979935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 980005 ) ( 210220 * ) + NEW met1 ( 210360 980095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 980235 ) ( * 986605 ) + NEW met1 ( 210420 940280 ) via_260_860_vh + NEW met1 ( 210360 939890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 939987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[26] + ( mprj_pads.area2_io_pad\[12\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 937225 ) ( 210895 * ) ; + - mprj_io_dm[80] ( mprj_pads.area2_io_pad\[12\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 934005 ) ( 210895 * ) ; + - mprj_io_holdover[26] ( mprj_pads.area2_io_pad\[12\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 930785 ) ( 210895 * ) ; + - mprj_io_out[26] ( mprj_pads.area2_io_pad\[12\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 928025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[12\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[12\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[12\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[12\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 986442.5 ) ( 210895 * ) + NEW met2 ( 208635 986515 ) ( 210895 * ) + NEW met1 ( 209880 986540 ) ( 210000 * ) + NEW met1 ( 209890 986605 ) ( 209990 * ) + NEW met1 ( 209940 986150 ) via_260_860_vh + NEW met1 ( 209880 985760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 947255 ) ( * 985620 ) + NEW met1 ( 209880 947115 ) ( 210000 * ) + NEW met1 ( 209940 946725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 946430 ) ( 210895 * ) + NEW met2 ( 208635 946355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 946430 ) ( 209740 * ) + NEW met1 ( 209880 946335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 925635 ) ( * 946195 ) + NEW met1 ( 209880 925495 ) ( 210000 * ) + NEW met1 ( 209940 925105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 924810 ) ( 210895 * ) + NEW met2 ( 208635 924735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 924810 ) ( 209740 * ) + NEW met1 ( 209880 924715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 986442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[26] ( mprj_pads.area2_io_pad\[12\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 918825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[26] + ( mprj_pads.area2_io_pad\[12\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 915605 ) ( 210895 * ) ; + - mprj_io_oeb[26] ( mprj_pads.area2_io_pad\[12\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 912385 ) ( 210895 * ) ; + - mprj_io_in_3v3[26] ( mprj_pads.area2_io_pad\[12\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 909625 ) ( 210895 * ) ; + - vssd2_pad ( user2_vssd_lvclamp_pad VSSD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 31635 2241470 ) ( 97295 * ) ; + - vccd2 ( user2_vccd_lvclamp_pad VCCD1 ) + ( user2_vssd_lvclamp_pad VCCD1 ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 227480 892940 ) ( * 2229720 ) + NEW met5 TAPERRULE met5_width_13000 ( 227480 2253470 ) ( * 4560370 ) + NEW met5 TAPERRULE met5_width_13000 ( 227480 4584730 ) ( * 4610520 ) + NEW met5 TAPERRULE met5_width_2040 ( 221780 4635100 ) ( 233180 * ) + NEW met4 TAPERRULE met4_width_640 ( 221100 4634400 ) ( 233790 * ) + NEW met4 TAPERRULE met4_width_570 ( 233655 4611470 ) ( * 4633930 ) + NEW met4 TAPERRULE met4_width_490 ( 221100 4611075 ) ( 233790 * ) + NEW met4 TAPERRULE met4_width_530 ( 221215 4611470 ) ( * 4633930 ) + NEW met4 ( 227425 4622700 ) via4_11890_22760 + NEW met3 TAPERRULE met3_width_620 ( 203620 4634390 ) ( 233960 * ) + NEW met3 TAPERRULE met3_width_740 ( 233740 4611470 ) ( * 4633930 ) + NEW met3 TAPERRULE met3_width_565 ( 203620 4611037.5 ) ( 233960 * ) + NEW met3 TAPERRULE met3_width_18010 ( 212475 4611470 ) ( * 4633930 ) + NEW met3 ( 227425 4622700 ) via3_11890_22760_hx + NEW met4 TAPERRULE met4_width_550 ( 221140 4584205 ) ( 233830 * ) + NEW met4 TAPERRULE met4_width_520 ( 233720 4561320 ) ( * 4583780 ) + NEW met4 TAPERRULE met4_width_580 ( 221140 4560880 ) ( 233830 * ) + NEW met4 TAPERRULE met4_width_580 ( 221280 4561320 ) ( * 4583780 ) + NEW met4 ( 227515 4572550 ) via4_11890_22760 + NEW met3 TAPERRULE met3_width_570 ( 205530 4584215 ) ( 233960 * ) + NEW met3 TAPERRULE met3_width_650 ( 233785 4561320 ) ( * 4583780 ) + NEW met3 TAPERRULE met3_width_670 ( 205530 4560835 ) ( 233960 * ) + NEW met3 TAPERRULE met3_width_16190 ( 213475 4561320 ) ( * 4583780 ) + NEW met3 ( 227515 4572550 ) via3_11890_22760_hx + NEW met4 TAPERRULE met4_width_560 ( 221100 2252950 ) ( 233830 * ) + NEW met4 TAPERRULE met4_width_700 ( 233630 2230670 ) ( * 2252520 ) + NEW met4 TAPERRULE met4_width_470 ( 221100 2230285 ) ( 233830 * ) + NEW met4 TAPERRULE met4_width_500 ( 221200 2230670 ) ( * 2252520 ) + NEW met4 ( 227365 2241595 ) via4_11830_22150 + NEW met3 TAPERRULE met3_width_585 ( 204850 2252962.5 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_840 ( 233700 2230670 ) ( * 2252520 ) + NEW met3 TAPERRULE met3_width_520 ( 204850 2230260 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_16750 ( 213075 2230670 ) ( * 2252520 ) + NEW met3 ( 227365 2241595 ) via3_11830_22150_hx ; + - mprj_io[4] ( mprj_pads.area1_io_pad\[4\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 1409000 ) ( * 1470000 ) ; + - mprj_pads.area1_io_pad\[4\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[4\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[4\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[4\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 1403557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 1404240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1404380 ) ( * 1442745 ) + NEW met1 ( 3378000 1442885 ) ( 3378120 * ) + NEW met1 ( 3378060 1443275 ) via_260_860_vh + NEW met2 ( 3377105 1443645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1443570 ) ( 3379365 * ) + NEW met1 ( 3378000 1443665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1443805 ) ( * 1464365 ) + NEW met1 ( 3378000 1464505 ) ( 3378120 * ) + NEW met1 ( 3378060 1464895 ) via_260_860_vh + NEW met2 ( 3377105 1465265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1465190 ) ( 3379365 * ) + NEW met1 ( 3378000 1465285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1465190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1443570 ) ( 3377860 * ) + NEW met2 ( 3378060 1403850 ) via_260_860_vh ( * 1403460 ) + ( 3378120 * ) + NEW met1 ( 3378010 1403395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 1403557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 1403485 ) ( 3379365 * ) ; + - mprj_io_in[4] ( mprj_pads.area1_io_pad\[4\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1406775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[4\]/HLD_H_N + ( mprj_pads.area1_io_pad\[4\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[4\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 1450085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 1450012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 1450110 ) ( 3377640 * ) + NEW met1 ( 3377580 1449720 ) via_260_860_vh + NEW met1 ( 3377520 1449330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1410225 ) ( * 1449190 ) + NEW met1 ( 3377520 1410085 ) ( 3377640 * ) + NEW met1 ( 3377580 1409995 ) via_260_260_vh + NEW met2 ( 3377105 1410065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 1409995 ) ( 3379365 * ) + NEW met2 ( 3377105 1409925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 1409995 ) ( 3377380 * ) + NEW met1 ( 3377520 1409905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1403395 ) ( * 1409765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 1450012.5 ) ( 3377380 * ) ; + - mprj_io_one[4] ( mprj_pads.area1_io_pad\[4\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1412755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[4] ( mprj_pads.area1_io_pad\[4\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1415975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[4\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[4\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[4\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[4\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[13] ( mprj_pads.area1_io_pad\[4\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1425175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[4\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[4\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[4] ( mprj_pads.area1_io_pad\[4\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1431155 ) ( 3379365 * ) ; + - mprj_io_dm[12] ( mprj_pads.area1_io_pad\[4\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1434375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[4] ( mprj_pads.area1_io_pad\[4\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1437595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[4] ( mprj_pads.area1_io_pad\[4\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1440355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[4\]/ENABLE_H + ( mprj_pads.area1_io_pad\[4\] ENABLE_H ) ; + - mprj_io_analog_sel[4] ( mprj_pads.area1_io_pad\[4\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1452775 ) ( 3379365 * ) ; + - mprj_io_dm[14] ( mprj_pads.area1_io_pad\[4\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1455995 ) ( 3379365 * ) ; + - mprj_io_holdover[4] ( mprj_pads.area1_io_pad\[4\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1459215 ) ( 3379365 * ) ; + - mprj_io_out[4] ( mprj_pads.area1_io_pad\[4\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1461975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[4] ( mprj_pads.area1_io_pad\[4\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1471175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[4] + ( mprj_pads.area1_io_pad\[4\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1474395 ) ( 3379365 * ) ; + - mprj_io_oeb[4] ( mprj_pads.area1_io_pad\[4\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1477615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[4] ( mprj_pads.area1_io_pad\[4\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1480375 ) ( 3379365 * ) ; + - mprj_io[18] ( user1_analog_pad_with_clamp P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 1931850 5123530 ) ( 1991090 * ) ; + - mprj_analog[4] ( user1_analog_pad_with_clamp P_CORE ) + + ROUTED met3 TAPERRULE met3_width_15680 ( 1974540 4995840 ) ( 2045850 * ) ; + - mprj_clamp_high[0] ( user1_analog_pad_with_clamp DRN_HVC ) + + ROUTED met2 TAPERRULE met2_width_23900 ( 1986340 4988070 ) ( * 5013590 ) ; + - mprj_clamp_low[0] ( user1_analog_pad_with_clamp SRC_BDY_HVC ) + + ROUTED met2 TAPERRULE met2_width_2050 ( 1924565 4989025 ) ( 1948325 * ) ; + - mprj_io[29] ( mprj_pads.area2_io_pad\[4\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 673680 ) ( * 2324550 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348180 ) ( * 4538130 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562500 ) ( * 4588410 ) + NEW met5 ( 3370900 4612730 ) ( 3382300 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370200 4612280 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_790 ( 3382705 4589360 ) ( * 4611830 ) + NEW met4 TAPERRULE met4_width_740 ( 3370200 4588840 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589360 ) ( * 4611830 ) + NEW met4 ( 3376495 4600595 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_520 ( 3353950 4612240 ) ( 3382660 * ) + NEW met3 ( 3353950 4612360 ) ( 3382055 * ) + NEW met3 TAPERRULE met3_width_500 ( 3382560 4589360 ) ( * 4611830 ) + NEW met3 TAPERRULE met3_width_710 ( 3353950 4588855 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_16880 ( 3362240 4589360 ) ( * 4611830 ) + NEW met3 ( 3376495 4600595 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_690 ( 3370280 4562045 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_730 ( 3382815 4539080 ) ( * 4561550 ) + NEW met4 TAPERRULE met4_width_650 ( 3370280 4538605 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_690 ( 3370475 4539080 ) ( * 4561550 ) + NEW met4 ( 3376635 4550315 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_545 ( 3353950 4561972.5 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_360 ( 3382630 4539080 ) ( * 4561550 ) + NEW met3 TAPERRULE met3_width_630 ( 3353950 4538615 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_17020 ( 3362310 4539080 ) ( * 4561550 ) + NEW met3 ( 3376635 4550315 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_620 ( 3370250 2347690 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_630 ( 3382825 2325500 ) ( * 2347230 ) + NEW met4 TAPERRULE met4_width_630 ( 3370250 2325035 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_590 ( 3370395 2325500 ) ( * 2347230 ) + NEW met4 ( 3376600 2336365 ) via4_11820_22030 + NEW met3 TAPERRULE met3_width_620 ( 3353790 2347690 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_590 ( 3382805 2325500 ) ( * 2347230 ) + NEW met3 TAPERRULE met3_width_605 ( 3353790 2325047.5 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_17050 ( 3362165 2325500 ) ( * 2347230 ) + NEW met3 ( 3376600 2336365 ) via3_11820_22030_hx ; + - mprj_io_in[18] ( mprj_pads.area2_io_pad\[4\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3133225 ) ( 210895 * ) ; + - mprj_io_one[18] ( mprj_pads.area2_io_pad\[4\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3127245 ) ( 210895 * ) ; + - mprj_io_slow_sel[18] ( mprj_pads.area2_io_pad\[4\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3124025 ) ( 210895 * ) ; + - mprj_gpio_analog[11] + ( mprj_pads.area2_io_pad\[4\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3120805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[4\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[4\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[55] ( mprj_pads.area2_io_pad\[4\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3114825 ) ( 210895 * ) ; + - mprj_gpio_noesd[11] ( mprj_pads.area2_io_pad\[4\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3111605 ) ( 210895 * ) ; + - mprj_io_analog_en[18] ( mprj_pads.area2_io_pad\[4\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3108845 ) ( 210895 * ) ; + - mprj_io_dm[54] ( mprj_pads.area2_io_pad\[4\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3105625 ) ( 210895 * ) ; + - mprj_io_analog_pol[18] ( mprj_pads.area2_io_pad\[4\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3102405 ) ( 210895 * ) ; + - mprj_io_inp_dis[18] ( mprj_pads.area2_io_pad\[4\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3099645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[4\]/ENABLE_H + ( mprj_pads.area2_io_pad\[4\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[4\]/HLD_H_N + ( mprj_pads.area2_io_pad\[4\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[4\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3089915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3089987.5 ) ( 210220 * ) + NEW met1 ( 210360 3090670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3090810 ) ( * 3129775 ) + NEW met1 ( 210360 3129915 ) ( 210480 * ) + NEW met1 ( 210420 3130005 ) via_260_260_vh + NEW met2 ( 208635 3130075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3130005 ) ( 210895 * ) + NEW met2 ( 208635 3129935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3130005 ) ( 210220 * ) + NEW met1 ( 210360 3130095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3130235 ) ( * 3136605 ) + NEW met1 ( 210420 3090280 ) via_260_860_vh + NEW met1 ( 210360 3089890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3089987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[18] ( mprj_pads.area2_io_pad\[4\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3087225 ) ( 210895 * ) ; + - mprj_io_dm[56] ( mprj_pads.area2_io_pad\[4\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3084005 ) ( 210895 * ) ; + - mprj_io_holdover[18] ( mprj_pads.area2_io_pad\[4\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3080785 ) ( 210895 * ) ; + - mprj_io_out[18] ( mprj_pads.area2_io_pad\[4\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3078025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[4\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[4\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[4\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[4\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 3136442.5 ) ( 210895 * ) + NEW met2 ( 208635 3136515 ) ( 210895 * ) + NEW met1 ( 209880 3136540 ) ( 210000 * ) + NEW met1 ( 209890 3136605 ) ( 209990 * ) + NEW met1 ( 209940 3136150 ) via_260_860_vh + NEW met1 ( 209880 3135760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3097255 ) ( * 3135620 ) + NEW met1 ( 209880 3097115 ) ( 210000 * ) + NEW met1 ( 209940 3096725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3096430 ) ( 210895 * ) + NEW met2 ( 208635 3096355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3096430 ) ( 209740 * ) + NEW met1 ( 209880 3096335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3075635 ) ( * 3096195 ) + NEW met1 ( 209880 3075495 ) ( 210000 * ) + NEW met1 ( 209940 3075105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3074810 ) ( 210895 * ) + NEW met2 ( 208635 3074735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3074810 ) ( 209740 * ) + NEW met1 ( 209880 3074715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3136442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[18] ( mprj_pads.area2_io_pad\[4\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3068825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[18] + ( mprj_pads.area2_io_pad\[4\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3065605 ) ( 210895 * ) ; + - mprj_io_oeb[18] ( mprj_pads.area2_io_pad\[4\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3062385 ) ( 210895 * ) ; + - mprj_io_in_3v3[18] ( mprj_pads.area2_io_pad\[4\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3059625 ) ( 210895 * ) ; + - vddio_pad2 ( mgmt_vddio_hvclamp_pad\[1\] VDDIO_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 64465 4356850 ) ( * 4416090 ) ; + - flash_io1 ( flash_io1_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 2304000 64215 ) ( 2365000 * ) ; + - flash_io1_pad/TIE_LO_ESD ( flash_io1_pad TIE_LO_ESD ) + ( flash_io1_pad ENABLE_VSWITCH_H ) + ( flash_io1_pad ENABLE_INP_H ) + + ROUTED met2 ( 2298520 209095 ) via_260_260_hv + NEW met2 ( 2298460 209185 ) ( 2298580 * ) + NEW met1 TAPERRULE met1_width_260 ( 2297880 209095 ) ( 2298320 * ) + NEW met2 ( 2298460 209005 ) ( 2298580 * ) + NEW met1 TAPERRULE met1_width_260 ( 2298720 209095 ) ( 2338550 * ) via_260_260_hv + ( * 209185 ) ( 2338610 * ) + NEW met2 ( 2338490 209005 ) ( 2338610 * ) + NEW met1 TAPERRULE met1_width_260 ( 2338750 209095 ) ( 2360180 * ) via_260_260_hv + ( * 209185 ) ( 2360240 * ) + NEW met2 ( 2360120 209005 ) ( 2360240 * ) + NEW met1 TAPERRULE met1_width_260 ( 2360380 209095 ) ( 2376065 * ) ; + - flash_io1_di_core ( flash_io1_pad IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2301775 208635 ) ( * 210895 ) ; + - flash_io1_pad/HLD_H_N ( flash_io1_pad HLD_H_N ) + ( flash_io1_pad TIE_HI_ESD ) + + ROUTED met2 ( 2344965 209515 ) via_260_260_hv + NEW met2 ( 2344905 209605 ) ( 2345025 * ) + NEW met1 TAPERRULE met1_width_260 ( 2305185 209515 ) ( 2344765 * ) + NEW met1 ( 2304985 209515 ) via_260_260_hv ( * 209605 ) + ( 2305045 * ) + NEW met1 TAPERRULE met1_width_260 ( 2297880 209515 ) ( 2304785 * ) + NEW met2 ( 2304925 209425 ) ( 2305045 * ) + NEW met2 ( 2344905 209425 ) ( 2345025 * ) + NEW met1 TAPERRULE met1_width_260 ( 2345165 209515 ) ( 2376065 * ) ; + - flash_io1_pad/SLOW ( flash_io1_pad SLOW ) + ( constant_block_5 zero ) ( flash_io1_pad IB_MODE_SEL ) + ( flash_io1_pad VTRIP_SEL ) ( flash_io1_pad HLD_OVR ) + ( flash_io1_pad ANALOG_SEL ) ( flash_io1_pad ANALOG_POL ) + ( flash_io1_pad ANALOG_EN ) + + ROUTED met2 ( 2310940 209935 ) via_260_260_hv + NEW met2 ( 2310880 210025 ) ( 2311000 * ) + NEW met1 TAPERRULE met1_width_260 ( 2297880 209935 ) ( 2310740 * ) + NEW met2 ( 2310880 209845 ) ( 2311000 * ) + NEW met1 TAPERRULE met1_width_260 ( 2311140 209935 ) ( 2326135 * ) via_260_260_hv + ( * 210025 ) ( 2326195 * ) + NEW met2 ( 2326075 209845 ) ( 2326195 * ) + NEW met1 TAPERRULE met1_width_260 ( 2326335 209935 ) ( 2332570 * ) via_260_260_hv + ( * 210025 ) ( 2332630 * ) + NEW met2 ( 2332510 209845 ) ( 2332630 * ) + NEW met1 TAPERRULE met1_width_260 ( 2332770 209935 ) ( 2347740 * ) via_260_260_hv + ( * 210025 ) ( 2347800 * ) + NEW met2 ( 2347680 209845 ) ( 2347800 * ) + NEW met1 TAPERRULE met1_width_260 ( 2347940 209935 ) ( 2354180 * ) via_260_260_hv + ( * 210025 ) ( 2354240 * ) + NEW met2 ( 2354120 209845 ) ( 2354240 * ) + NEW met1 TAPERRULE met1_width_260 ( 2354380 209935 ) ( 2366135 * ) via_260_260_hv + ( * 210025 ) ( 2366195 * ) + NEW met2 ( 2366075 209845 ) ( 2366195 * ) + NEW met1 TAPERRULE met1_width_260 ( 2366335 209935 ) ( 2369375 * ) via_260_260_hv + ( * 210025 ) ( 2369435 * ) + NEW met2 ( 2369315 209845 ) ( 2369435 * ) + NEW met1 TAPERRULE met1_width_260 ( 2369575 209935 ) ( 2377945 * ) via_260_260_hv + ( * 210025 ) ( 2378005 * ) + NEW met2 TAPERRULE met2_width_260 ( 2377945 204625 ) ( * 209735 ) + NEW met2 ( 2377865 204485 ) ( 2378025 * ) + NEW met2 ( 2377945 204360 ) via2_300_300_vx + NEW met3 ( 2377920 204385 ) ( 2377970 * ) + NEW met3 ( 2378245 204360 ) ( 2394225 * ) + NEW met3 ( 2394225 203490 ) ( * 204060 ) + NEW met3 ( 2377920 204335 ) ( 2377970 * ) + NEW met3 ( 2377920 204360 ) ( 2377645 * ) + NEW met2 ( 2377865 204235 ) ( 2378025 * ) ; + - flash_io1_pad/PAD_A_ESD_0_H ( flash_io1_pad PAD_A_ESD_0_H ) ; + - flash_io1_pad/PAD_A_ESD_1_H ( flash_io1_pad PAD_A_ESD_1_H ) ; + - flash_io1_pad/PAD_A_NOESD_H ( flash_io1_pad PAD_A_NOESD_H ) ; + - flash_io1_oeb_core ( flash_io1_pad OE_N ) ( flash_io1_pad DM[0] ) + + ROUTED met2 TAPERRULE met2_width_245 ( 2372545 208687.5 ) ( 2372685 * ) + NEW met2 TAPERRULE met2_width_375 ( 2372567.5 208880 ) ( * 210895 ) ( * 211035 ) + ( * 212060 ) + NEW met2 ( 2372390 212200 ) ( 2372510 * ) + NEW met2 ( 2372450 212290 ) via_260_260_hv + NEW met2 ( 2372390 212380 ) ( 2372510 * ) + NEW met1 ( 2329410 212290 ) ( 2372250 * ) + NEW met1 ( 2329210 212290 ) via_260_260_hv ( * 212380 ) + ( 2329270 * ) + NEW met2 ( 2329150 212200 ) ( 2329270 * ) + NEW met2 ( 2329210 209020 ) ( * 212060 ) + NEW met2 ( 2329210 208880 ) ( 2329305 * ) ; + - flash_io1_ieb_core ( flash_io1_pad DM[2] ) + ( flash_io1_pad DM[1] ) ( flash_io1_pad INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2335355 208635 ) ( * 210895 ) ( * 211035 ) + ( * 211550 ) via_260_260_hv + NEW met2 ( 2335300 211640 ) ( 2335420 * ) + NEW met1 ( 2335560 211550 ) ( 2350995 * ) via_260_260_hv + ( * 211640 ) ( 2351055 * ) + NEW met2 TAPERRULE met2_width_260 ( 2350995 210755 ) ( * 211350 ) + NEW met1 ( 2320380 211550 ) ( 2335160 * ) + NEW met1 ( 2320180 211550 ) via_260_260_hv ( * 211640 ) + ( 2320240 * ) + NEW met2 TAPERRULE met2_width_260 ( 2320180 210750 ) ( * 211350 ) ; + - flash_io1_do_core ( flash_io1_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2356975 208635 ) ( * 210895 ) ; + - flash_io1_pad/IN_H ( flash_io1_pad IN_H ) ; + - mprj_io[10] ( mprj_pads.area1_io_pad\[10\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 3423000 ) ( * 3484000 ) ; + - mprj_pads.area1_io_pad\[10\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[10\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[10\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[10\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 3417557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 3418240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3418380 ) ( * 3456745 ) + NEW met1 ( 3378000 3456885 ) ( 3378120 * ) + NEW met1 ( 3378060 3457275 ) via_260_860_vh + NEW met2 ( 3377105 3457645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3457570 ) ( 3379365 * ) + NEW met1 ( 3378000 3457665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3457805 ) ( * 3478365 ) + NEW met1 ( 3378000 3478505 ) ( 3378120 * ) + NEW met1 ( 3378060 3478895 ) via_260_860_vh + NEW met2 ( 3377105 3479265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3479190 ) ( 3379365 * ) + NEW met1 ( 3378000 3479285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3479190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3457570 ) ( 3377860 * ) + NEW met2 ( 3378060 3417850 ) via_260_860_vh ( * 3417460 ) + ( 3378120 * ) + NEW met1 ( 3378010 3417395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 3417557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 3417485 ) ( 3379365 * ) ; + - mprj_io_in[10] ( mprj_pads.area1_io_pad\[10\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3420775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[10\]/HLD_H_N + ( mprj_pads.area1_io_pad\[10\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[10\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3464085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3464012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3464110 ) ( 3377640 * ) + NEW met1 ( 3377580 3463720 ) via_260_860_vh + NEW met1 ( 3377520 3463330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3424225 ) ( * 3463190 ) + NEW met1 ( 3377520 3424085 ) ( 3377640 * ) + NEW met1 ( 3377580 3423995 ) via_260_260_vh + NEW met2 ( 3377105 3424065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 3423995 ) ( 3379365 * ) + NEW met2 ( 3377105 3423925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 3423995 ) ( 3377380 * ) + NEW met1 ( 3377520 3423905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3417395 ) ( * 3423765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3464012.5 ) ( 3377380 * ) ; + - mprj_io_one[10] ( mprj_pads.area1_io_pad\[10\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3426755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[10] ( mprj_pads.area1_io_pad\[10\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3429975 ) ( 3379365 * ) ; + - mprj_gpio_analog[3] + ( mprj_pads.area1_io_pad\[10\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3433195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[10\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[10\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[31] ( mprj_pads.area1_io_pad\[10\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3439175 ) ( 3379365 * ) ; + - mprj_gpio_noesd[3] ( mprj_pads.area1_io_pad\[10\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3442395 ) ( 3379365 * ) ; + - mprj_io_analog_en[10] ( mprj_pads.area1_io_pad\[10\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3445155 ) ( 3379365 * ) ; + - mprj_io_dm[30] ( mprj_pads.area1_io_pad\[10\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3448375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[10] + ( mprj_pads.area1_io_pad\[10\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3451595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[10] ( mprj_pads.area1_io_pad\[10\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3454355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[10\]/ENABLE_H + ( mprj_pads.area1_io_pad\[10\] ENABLE_H ) ; + - mprj_io_analog_sel[10] + ( mprj_pads.area1_io_pad\[10\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3466775 ) ( 3379365 * ) ; + - mprj_io_dm[32] ( mprj_pads.area1_io_pad\[10\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3469995 ) ( 3379365 * ) ; + - mprj_io_holdover[10] ( mprj_pads.area1_io_pad\[10\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3473215 ) ( 3379365 * ) ; + - mprj_io_out[10] ( mprj_pads.area1_io_pad\[10\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3475975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[10\]/ENABLE_VDDA_H + ( mprj_pads.area1_io_pad\[10\] ENABLE_VDDA_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3482415 ) ( 3378340 * ) + NEW met1 TAPERRULE met1_width_260 ( 3378540 3482925 ) ( * 3494475 ) + NEW met1 ( 3378540 3482425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 3415550 ) ( * 3481925 ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3482415 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[10] ( mprj_pads.area1_io_pad\[10\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3485175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[10] + ( mprj_pads.area1_io_pad\[10\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3488395 ) ( 3379365 * ) ; + - mprj_io_oeb[10] ( mprj_pads.area1_io_pad\[10\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3491615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[10] ( mprj_pads.area1_io_pad\[10\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3494375 ) ( 3379365 * ) ; + - mprj_io[6] ( mprj_pads.area1_io_pad\[6\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 1860000 ) ( * 1921000 ) ; + - mprj_pads.area1_io_pad\[6\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[6\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[6\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[6\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 1854557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 1855240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1855380 ) ( * 1893745 ) + NEW met1 ( 3378000 1893885 ) ( 3378120 * ) + NEW met1 ( 3378060 1894275 ) via_260_860_vh + NEW met2 ( 3377105 1894645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1894570 ) ( 3379365 * ) + NEW met1 ( 3378000 1894665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1894805 ) ( * 1915365 ) + NEW met1 ( 3378000 1915505 ) ( 3378120 * ) + NEW met1 ( 3378060 1915895 ) via_260_860_vh + NEW met2 ( 3377105 1916265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1916190 ) ( 3379365 * ) + NEW met1 ( 3378000 1916285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1916190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1894570 ) ( 3377860 * ) + NEW met2 ( 3378060 1854850 ) via_260_860_vh ( * 1854460 ) + ( 3378120 * ) + NEW met1 ( 3378010 1854395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 1854557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 1854485 ) ( 3379365 * ) ; + - mprj_io_in[6] ( mprj_pads.area1_io_pad\[6\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1857775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[6\]/HLD_H_N + ( mprj_pads.area1_io_pad\[6\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[6\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 1901085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 1901012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 1901110 ) ( 3377640 * ) + NEW met1 ( 3377580 1900720 ) via_260_860_vh + NEW met1 ( 3377520 1900330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1861225 ) ( * 1900190 ) + NEW met1 ( 3377520 1861085 ) ( 3377640 * ) + NEW met1 ( 3377580 1860995 ) via_260_260_vh + NEW met2 ( 3377105 1861065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 1860995 ) ( 3379365 * ) + NEW met2 ( 3377105 1860925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 1860995 ) ( 3377380 * ) + NEW met1 ( 3377520 1860905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1854395 ) ( * 1860765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 1901012.5 ) ( 3377380 * ) ; + - mprj_io_one[6] ( mprj_pads.area1_io_pad\[6\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1863755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[6] ( mprj_pads.area1_io_pad\[6\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1866975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[6\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[6\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[6\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[6\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[19] ( mprj_pads.area1_io_pad\[6\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1876175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[6\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[6\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[6] ( mprj_pads.area1_io_pad\[6\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1882155 ) ( 3379365 * ) ; + - mprj_io_dm[18] ( mprj_pads.area1_io_pad\[6\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1885375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[6] ( mprj_pads.area1_io_pad\[6\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1888595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[6] ( mprj_pads.area1_io_pad\[6\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1891355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[6\]/ENABLE_H + ( mprj_pads.area1_io_pad\[6\] ENABLE_H ) ; + - mprj_io_analog_sel[6] ( mprj_pads.area1_io_pad\[6\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1903775 ) ( 3379365 * ) ; + - mprj_io_dm[20] ( mprj_pads.area1_io_pad\[6\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1906995 ) ( 3379365 * ) ; + - mprj_io_holdover[6] ( mprj_pads.area1_io_pad\[6\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1910215 ) ( 3379365 * ) ; + - mprj_io_out[6] ( mprj_pads.area1_io_pad\[6\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1912975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[6] ( mprj_pads.area1_io_pad\[6\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1922175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[6] + ( mprj_pads.area1_io_pad\[6\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1925395 ) ( 3379365 * ) ; + - mprj_io_oeb[6] ( mprj_pads.area1_io_pad\[6\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1928615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[6] ( mprj_pads.area1_io_pad\[6\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1931375 ) ( 3379365 * ) ; + - mprj_io[22] ( user2_analog_pad\[1\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 650850 5123530 ) ( 710090 * ) ; + - mprj_analog[8] ( user2_analog_pad\[1\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_25000 ( 680220 4988150 ) ( * 5070200 ) ; + - flash_csb ( flash_csb_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 1482000 64215 ) ( 1543000 * ) ; + - flash_csb_pad/TIE_LO_ESD ( flash_csb_pad TIE_LO_ESD ) + ( flash_csb_pad ENABLE_VSWITCH_H ) + ( flash_csb_pad ENABLE_INP_H ) + + ROUTED met2 ( 1476545 209095 ) via_260_260_hv + NEW met2 ( 1476485 209185 ) ( 1476605 * ) + NEW met1 TAPERRULE met1_width_260 ( 1475880 209095 ) ( 1476345 * ) + NEW met2 ( 1476485 209005 ) ( 1476605 * ) + NEW met1 TAPERRULE met1_width_260 ( 1476745 209095 ) ( 1516580 * ) via_260_260_hv + ( * 209185 ) ( 1516640 * ) + NEW met2 ( 1516520 209005 ) ( 1516640 * ) + NEW met1 TAPERRULE met1_width_260 ( 1516780 209095 ) ( 1538210 * ) via_260_260_hv + ( * 209185 ) ( 1538270 * ) + NEW met2 ( 1538150 209005 ) ( 1538270 * ) + NEW met1 TAPERRULE met1_width_260 ( 1538410 209095 ) ( 1554065 * ) ; + - flash_csb_pad/IN ( flash_csb_pad IN ) ; + - flash_csb_pad/HLD_H_N ( flash_csb_pad HLD_H_N ) + ( flash_csb_pad TIE_HI_ESD ) + + ROUTED met2 ( 1523015 209515 ) via_260_260_hv + NEW met2 ( 1522955 209605 ) ( 1523075 * ) + NEW met1 TAPERRULE met1_width_260 ( 1483210 209515 ) ( 1522815 * ) + NEW met1 ( 1483010 209515 ) via_260_260_hv ( * 209605 ) + ( 1483070 * ) + NEW met1 TAPERRULE met1_width_260 ( 1475880 209515 ) ( 1482810 * ) + NEW met2 ( 1482950 209425 ) ( 1483070 * ) + NEW met2 ( 1522955 209425 ) ( 1523075 * ) + NEW met1 TAPERRULE met1_width_260 ( 1523215 209515 ) ( 1554065 * ) ; + - flash_csb_pad/SLOW ( flash_csb_pad SLOW ) + ( constant_block_2 zero ) ( flash_csb_pad IB_MODE_SEL ) + ( flash_csb_pad VTRIP_SEL ) ( flash_csb_pad HLD_OVR ) + ( flash_csb_pad ANALOG_SEL ) ( flash_csb_pad INP_DIS ) + ( flash_csb_pad ANALOG_POL ) ( flash_csb_pad DM[0] ) + ( flash_csb_pad ANALOG_EN ) + + ROUTED met2 ( 1488970 209935 ) via_260_260_hv + NEW met2 ( 1488910 210025 ) ( 1489030 * ) + NEW met1 TAPERRULE met1_width_260 ( 1475880 209935 ) ( 1488770 * ) + NEW met2 ( 1488910 209845 ) ( 1489030 * ) + NEW met1 TAPERRULE met1_width_260 ( 1489170 209935 ) ( 1504150 * ) via_260_260_hv + ( * 210025 ) ( 1504210 * ) + NEW met2 ( 1504090 209845 ) ( 1504210 * ) + NEW met1 TAPERRULE met1_width_260 ( 1504350 209935 ) ( 1507385 * ) via_260_260_hv + ( * 210025 ) ( 1507445 * ) + NEW met2 ( 1507325 209845 ) ( 1507445 * ) + NEW met1 TAPERRULE met1_width_260 ( 1507585 209935 ) ( 1510600 * ) via_260_260_hv + ( * 210025 ) ( 1510660 * ) + NEW met2 ( 1510540 209845 ) ( 1510660 * ) + NEW met1 TAPERRULE met1_width_260 ( 1510800 209935 ) ( 1513345 * ) via_260_260_hv + NEW met2 TAPERRULE met2_width_280 ( 1513355 210135 ) ( * 210490 ) + NEW met2 TAPERRULE met2_width_205 ( 1513285 209702.5 ) ( 1513425 * ) + NEW met1 TAPERRULE met1_width_260 ( 1513545 209935 ) ( 1525795 * ) via_260_260_hv + ( * 210025 ) ( 1525855 * ) + NEW met2 ( 1525735 209845 ) ( 1525855 * ) + NEW met1 TAPERRULE met1_width_260 ( 1525995 209935 ) ( 1532220 * ) via_260_260_hv + ( * 210025 ) ( 1532280 * ) + NEW met2 ( 1532160 209845 ) ( 1532280 * ) + NEW met1 TAPERRULE met1_width_260 ( 1532420 209935 ) ( 1544175 * ) via_260_260_hv + ( * 210025 ) ( 1544235 * ) + NEW met2 ( 1544115 209845 ) ( 1544235 * ) + NEW met1 TAPERRULE met1_width_260 ( 1544375 209935 ) ( 1547390 * ) via_260_260_hv + ( * 210025 ) ( 1547450 * ) + NEW met2 ( 1547330 209845 ) ( 1547450 * ) + NEW met1 TAPERRULE met1_width_260 ( 1547590 209935 ) ( 1555945 * ) via_260_260_hv + ( * 210025 ) ( 1556005 * ) + NEW met2 TAPERRULE met2_width_260 ( 1555945 204625 ) ( * 209735 ) + NEW met2 ( 1555865 204485 ) ( 1556025 * ) + NEW met2 ( 1555945 204360 ) via2_300_300_vx + NEW met3 ( 1555920 204385 ) ( 1555970 * ) + NEW met3 ( 1556245 204360 ) ( 1572215 * ) + NEW met3 ( 1572215 203450 ) ( * 204060 ) + NEW met3 ( 1555920 204335 ) ( 1555970 * ) + NEW met3 ( 1555920 204360 ) ( 1555645 * ) + NEW met2 ( 1555865 204235 ) ( 1556025 * ) ; + - flash_csb_pad/PAD_A_ESD_0_H ( flash_csb_pad PAD_A_ESD_0_H ) ; + - flash_csb_pad/PAD_A_ESD_1_H ( flash_csb_pad PAD_A_ESD_1_H ) ; + - flash_csb_pad/PAD_A_NOESD_H ( flash_csb_pad PAD_A_NOESD_H ) ; + - flash_csb_core ( flash_csb_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1534975 208635 ) ( * 210895 ) ; + - flash_csb_oeb_core ( flash_csb_pad OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1550615 208635 ) ( * 210895 ) ; + - flash_csb_pad/IN_H ( flash_csb_pad IN_H ) ; + - mprj_io[31] ( mprj_pads.area2_io_pad\[6\] PAD ) ; + - mprj_io_in[20] ( mprj_pads.area2_io_pad\[6\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2701225 ) ( 210895 * ) ; + - mprj_io_one[20] ( mprj_pads.area2_io_pad\[6\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2695245 ) ( 210895 * ) ; + - mprj_io_slow_sel[20] ( mprj_pads.area2_io_pad\[6\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2692025 ) ( 210895 * ) ; + - mprj_gpio_analog[13] + ( mprj_pads.area2_io_pad\[6\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2688805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[6\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[6\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[61] ( mprj_pads.area2_io_pad\[6\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2682825 ) ( 210895 * ) ; + - mprj_gpio_noesd[13] ( mprj_pads.area2_io_pad\[6\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2679605 ) ( 210895 * ) ; + - mprj_io_analog_en[20] ( mprj_pads.area2_io_pad\[6\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2676845 ) ( 210895 * ) ; + - mprj_io_dm[60] ( mprj_pads.area2_io_pad\[6\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2673625 ) ( 210895 * ) ; + - mprj_io_analog_pol[20] ( mprj_pads.area2_io_pad\[6\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2670405 ) ( 210895 * ) ; + - mprj_io_inp_dis[20] ( mprj_pads.area2_io_pad\[6\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2667645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[6\]/ENABLE_H + ( mprj_pads.area2_io_pad\[6\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[6\]/HLD_H_N + ( mprj_pads.area2_io_pad\[6\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[6\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 2657915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2657987.5 ) ( 210220 * ) + NEW met1 ( 210360 2658670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2658810 ) ( * 2697775 ) + NEW met1 ( 210360 2697915 ) ( 210480 * ) + NEW met1 ( 210420 2698005 ) via_260_260_vh + NEW met2 ( 208635 2698075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 2698005 ) ( 210895 * ) + NEW met2 ( 208635 2697935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 2698005 ) ( 210220 * ) + NEW met1 ( 210360 2698095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2698235 ) ( * 2704605 ) + NEW met1 ( 210420 2658280 ) via_260_860_vh + NEW met1 ( 210360 2657890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 2657987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[20] ( mprj_pads.area2_io_pad\[6\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2655225 ) ( 210895 * ) ; + - mprj_io_dm[62] ( mprj_pads.area2_io_pad\[6\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2652005 ) ( 210895 * ) ; + - mprj_io_holdover[20] ( mprj_pads.area2_io_pad\[6\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2648785 ) ( 210895 * ) ; + - mprj_io_out[20] ( mprj_pads.area2_io_pad\[6\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2646025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[6\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[6\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[6\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[6\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 2704442.5 ) ( 210895 * ) + NEW met2 ( 208635 2704515 ) ( 210895 * ) + NEW met1 ( 209880 2704540 ) ( 210000 * ) + NEW met1 ( 209890 2704605 ) ( 209990 * ) + NEW met1 ( 209940 2704150 ) via_260_860_vh + NEW met1 ( 209880 2703760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2665255 ) ( * 2703620 ) + NEW met1 ( 209880 2665115 ) ( 210000 * ) + NEW met1 ( 209940 2664725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2664430 ) ( 210895 * ) + NEW met2 ( 208635 2664355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2664430 ) ( 209740 * ) + NEW met1 ( 209880 2664335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2643635 ) ( * 2664195 ) + NEW met1 ( 209880 2643495 ) ( 210000 * ) + NEW met1 ( 209940 2643105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2642810 ) ( 210895 * ) + NEW met2 ( 208635 2642735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2642810 ) ( 209740 * ) + NEW met1 ( 209880 2642715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2704442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[20] ( mprj_pads.area2_io_pad\[6\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2636825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[20] + ( mprj_pads.area2_io_pad\[6\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2633605 ) ( 210895 * ) ; + - mprj_io_oeb[20] ( mprj_pads.area2_io_pad\[6\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2630385 ) ( 210895 * ) ; + - mprj_io_in_3v3[20] ( mprj_pads.area2_io_pad\[6\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2627625 ) ( 210895 * ) ; + - mprj_io[12] ( mprj_pads.area1_io_pad\[12\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 3873000 ) ( * 3934000 ) ; + - mprj_pads.area1_io_pad\[12\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[12\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[12\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[12\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 3867557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 3868240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3868380 ) ( * 3906745 ) + NEW met1 ( 3378000 3906885 ) ( 3378120 * ) + NEW met1 ( 3378060 3907275 ) via_260_860_vh + NEW met2 ( 3377105 3907645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3907570 ) ( 3379365 * ) + NEW met1 ( 3378000 3907665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3907805 ) ( * 3928365 ) + NEW met1 ( 3378000 3928505 ) ( 3378120 * ) + NEW met1 ( 3378060 3928895 ) via_260_860_vh + NEW met2 ( 3377105 3929265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3929190 ) ( 3379365 * ) + NEW met1 ( 3378000 3929285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3929190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3907570 ) ( 3377860 * ) + NEW met2 ( 3378060 3867850 ) via_260_860_vh ( * 3867460 ) + ( 3378120 * ) + NEW met1 ( 3378010 3867395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 3867557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 3867485 ) ( 3379365 * ) ; + - mprj_io_in[12] ( mprj_pads.area1_io_pad\[12\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3870775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[12\]/HLD_H_N + ( mprj_pads.area1_io_pad\[12\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[12\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3914085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3914012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3914110 ) ( 3377640 * ) + NEW met1 ( 3377580 3913720 ) via_260_860_vh + NEW met1 ( 3377520 3913330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3874225 ) ( * 3913190 ) + NEW met1 ( 3377520 3874085 ) ( 3377640 * ) + NEW met1 ( 3377580 3873995 ) via_260_260_vh + NEW met2 ( 3377105 3874065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 3873995 ) ( 3379365 * ) + NEW met2 ( 3377105 3873925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 3873995 ) ( 3377380 * ) + NEW met1 ( 3377520 3873905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3867395 ) ( * 3873765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3914012.5 ) ( 3377380 * ) ; + - mprj_io_one[12] ( mprj_pads.area1_io_pad\[12\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3876755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[12] ( mprj_pads.area1_io_pad\[12\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3879975 ) ( 3379365 * ) ; + - mprj_gpio_analog[5] + ( mprj_pads.area1_io_pad\[12\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3883195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[12\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[12\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[37] ( mprj_pads.area1_io_pad\[12\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3889175 ) ( 3379365 * ) ; + - mprj_gpio_noesd[5] ( mprj_pads.area1_io_pad\[12\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3892395 ) ( 3379365 * ) ; + - mprj_io_analog_en[12] ( mprj_pads.area1_io_pad\[12\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3895155 ) ( 3379365 * ) ; + - mprj_io_dm[36] ( mprj_pads.area1_io_pad\[12\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3898375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[12] + ( mprj_pads.area1_io_pad\[12\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3901595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[12] ( mprj_pads.area1_io_pad\[12\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3904355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[12\]/ENABLE_H + ( mprj_pads.area1_io_pad\[12\] ENABLE_H ) ; + - mprj_io_analog_sel[12] + ( mprj_pads.area1_io_pad\[12\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3916775 ) ( 3379365 * ) ; + - mprj_io_dm[38] ( mprj_pads.area1_io_pad\[12\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3919995 ) ( 3379365 * ) ; + - mprj_io_holdover[12] ( mprj_pads.area1_io_pad\[12\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3923215 ) ( 3379365 * ) ; + - mprj_io_out[12] ( mprj_pads.area1_io_pad\[12\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3925975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[12\]/ENABLE_VDDA_H + ( mprj_pads.area1_io_pad\[12\] ENABLE_VDDA_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3932415 ) ( 3378340 * ) + NEW met1 TAPERRULE met1_width_260 ( 3378540 3932925 ) ( * 3944475 ) + NEW met1 ( 3378540 3932425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 3865550 ) ( * 3931925 ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3932415 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[12] ( mprj_pads.area1_io_pad\[12\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3935175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[12] + ( mprj_pads.area1_io_pad\[12\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3938395 ) ( 3379365 * ) ; + - mprj_io_oeb[12] ( mprj_pads.area1_io_pad\[12\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3941615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[12] ( mprj_pads.area1_io_pad\[12\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3944375 ) ( 3379365 * ) ; + - resetb ( resetb_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_37180 ( 702155 36515 ) ( * 90745 ) ; + - xresloop ( resetb_pad PAD_A_ESD_H ) ( resetb_pad TIE_WEAK_HI_H ) + + ROUTED met3 ( 665620 199850 ) ( * 200420 ) + NEW met3 ( 665620 200720 ) ( 719900 * ) + NEW met3 ( 719900 199850 ) ( * 200420 ) ; + - resetb_core_h ( resetb_pad XRES_H_N ) + + ROUTED met2 TAPERRULE met2_width_330 ( 708405 199835 ) ( 708995 * ) ; + - constant_block_0/one ( constant_block_0 one ) + ( resetb_pad ENABLE_VDDIO ) + + ROUTED met3 ( 729275 203500 ) ( 741110 * ) + NEW met3 ( 729275 203500 ) ( 741110 * ) + NEW met3 ( 729275 203515 ) ( 729305 * ) + NEW met3 ( 729580 203500 ) ( 741110 * ) + NEW met2 ( 729210 203580 ) ( 729370 * ) + NEW met2 ( 729220 203615 ) ( 729370 * ) + NEW met2 ( 729210 203365 ) ( 729370 * ) + NEW met2 ( 729290 203500 ) via2_280_280_vx + NEW met2 TAPERRULE met2_width_180 ( 729350 200520 ) ( * 203225 ) + NEW met2 ( 729335 200300 ) via2_300_300_hx + NEW met3 ( 729310 200370 ) ( 729360 * ) + NEW met3 ( 729635 200300 ) ( 729360 * ) + NEW met3 TAPERRULE met3_width_350 ( 729335 199840 ) ( * 200000 ) + NEW met3 ( 729310 200300 ) ( 729035 * ) + NEW met3 ( 729275 203485 ) ( 729305 * ) ; + - xres_vss_loop ( resetb_pad PULLUP_H ) ( resetb_pad FILT_IN_H ) + ( resetb_pad EN_VDDIO_SIG_H ) ( resetb_pad TIE_LO_ESD ) + ( resetb_pad DISABLE_PULLUP_H ) + + ROUTED met2 ( 705110 200275 ) via_260_260_hv + NEW met2 ( 705050 200365 ) ( 705170 * ) + NEW met2 TAPERRULE met2_width_260 ( 705110 199800 ) ( * 200075 ) + NEW met1 TAPERRULE met1_width_190 ( 705310 200275 ) ( 710090 * ) via_260_260_hv + ( * 200365 ) ( 710150 * ) + NEW met2 TAPERRULE met2_width_320 ( 710090 199840 ) ( * 200075 ) + NEW met1 TAPERRULE met1_width_190 ( 710290 200275 ) ( 715470 * ) via_260_260_hv + ( * 200365 ) ( 715530 * ) + NEW met2 TAPERRULE met2_width_260 ( 715470 199830 ) ( * 200075 ) + NEW met1 TAPERRULE met1_width_190 ( 715670 200275 ) ( 717315 * ) via_560_260_hv + ( * 200365 ) ( 717525 * ) + NEW met3 ( 717160 200105 ) ( 717470 * ) + NEW met3 ( 717185 200115 ) ( 717445 * ) + NEW met3 ( 717160 199890 ) ( 717470 * ) + NEW met3 ( 717315 200090 ) via2_560_280_hx + NEW met1 TAPERRULE met1_width_190 ( 717665 200275 ) ( 723145 * ) via_260_260_hv + ( * 200365 ) ( 723205 * ) + NEW met2 TAPERRULE met2_width_260 ( 723145 199800 ) ( * 200075 ) ; + - resetb_pad/TIE_HI_ESD ( resetb_pad TIE_HI_ESD ) ; + - porb_h ( mprj_pads.area2_io_pad\[0\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[1\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[2\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[3\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[4\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[5\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[6\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[7\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[6\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[8\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[5\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[9\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[4\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[10\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[3\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[11\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[2\] ENABLE_VDDA_H ) + ( mprj_pads.area2_io_pad\[12\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[1\] ENABLE_VDDA_H ) + ( mprj_pads.area1_io_pad\[0\] ENABLE_VDDA_H ) + ( gpio_pad ENABLE_VDDA_H ) ( gpio_pad ENABLE_H ) + ( flash_io1_pad ENABLE_VDDA_H ) ( flash_io1_pad ENABLE_H ) + ( flash_io0_pad ENABLE_VDDA_H ) ( flash_io0_pad ENABLE_H ) + ( flash_clk_pad ENABLE_VDDA_H ) ( flash_clk_pad ENABLE_H ) + ( flash_csb_pad ENABLE_H ) ( clock_pad ENABLE_VDDA_H ) + ( clock_pad ENABLE_H ) ( flash_csb_pad ENABLE_VDDA_H ) + ( resetb_pad ENABLE_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1541415 208800 ) ( * 210075 ) + NEW met2 TAPERRULE met2_width_280 ( 1540395 210285 ) ( 1541485 * ) + NEW met2 TAPERRULE met2_width_220 ( 1540395 210535 ) ( 1540535 * ) + NEW met2 ( 1540395 210950 ) ( 1540535 * ) + NEW met1 TAPERRULE met1_width_260 ( 1519975 210775 ) ( 1540460 * ) via_260_260_hv + NEW met1 TAPERRULE met1_width_260 ( 1540660 210775 ) ( 1793790 * ) via_260_260_hv + ( * 210910 ) ( 1793865 * ) + NEW met2 TAPERRULE met2_width_180 ( 1793725 210555 ) ( 1793865 * ) + NEW met1 TAPERRULE met1_width_260 ( 1793990 210775 ) ( 1815395 * ) via_260_260_hv + ( * 210865 ) ( 1815485 * ) + NEW met2 ( 1815345 210910 ) ( 1815485 * ) + NEW met2 ( 1815335 210685 ) ( 1815485 * ) + NEW met2 TAPERRULE met2_width_150 ( 1815345 210540 ) ( 1815485 * ) + NEW met1 TAPERRULE met1_width_260 ( 1815595 210775 ) ( 2067750 * ) via_260_260_hv + ( * 210865 ) ( 2067865 * ) + NEW met2 ( 2067725 210910 ) ( 2067865 * ) + NEW met2 ( 2067690 210685 ) ( 2067865 * ) + NEW met2 TAPERRULE met2_width_160 ( 2067725 210535 ) ( 2067865 * ) + NEW met1 TAPERRULE met1_width_260 ( 2067950 210775 ) ( 2089420 * ) via_260_260_hv + NEW met2 ( 2089345 210890 ) ( 2089485 * ) + NEW met2 TAPERRULE met2_width_180 ( 2089345 210555 ) ( 2089485 * ) + NEW met1 TAPERRULE met1_width_260 ( 2089620 210775 ) ( 2341780 * ) via_260_260_hv + ( * 210865 ) ( 2341865 * ) + NEW met2 ( 2341725 210935 ) ( 2341865 * ) + NEW met2 ( 2341720 210685 ) ( 2341865 * ) + NEW met2 TAPERRULE met2_width_160 ( 2341725 210535 ) ( 2341865 * ) + NEW met1 TAPERRULE met1_width_260 ( 2341980 210775 ) ( 2363410 * ) via_260_260_hv + ( * 210885 ) ( 2363485 * ) + NEW met2 TAPERRULE met2_width_205 ( 2363345 210542.5 ) ( 2363485 * ) + NEW met1 TAPERRULE met1_width_260 ( 2363610 210775 ) ( 2615760 * ) via_260_260_hv + ( * 210865 ) ( 2615865 * ) + NEW met2 ( 2615725 210965 ) ( 2615865 * ) + NEW met2 ( 2615700 210685 ) ( 2615865 * ) + NEW met2 TAPERRULE met2_width_195 ( 2615725 210517.5 ) ( 2615865 * ) + NEW met1 TAPERRULE met1_width_260 ( 2615960 210775 ) ( 2637415 * ) via_260_260_hv + NEW met2 ( 2637345 210955 ) ( 2637485 * ) + NEW met2 TAPERRULE met2_width_265 ( 2637345 210512.5 ) ( 2637485 * ) + NEW met1 TAPERRULE met1_width_260 ( 2637615 210775 ) ( 3378600 * ) + NEW met1 TAPERRULE met1_width_260 ( 3378540 210975 ) ( * 566425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 566925 ) ( * 792425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 792925 ) ( * 1017425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1017925 ) ( * 1243425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1243925 ) ( * 1468425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1468925 ) ( * 1693425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1693925 ) ( * 1919425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 1919925 ) ( * 1931475 ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1919415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1919415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1693415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1693415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1468415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1468415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1243415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1243415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 1017415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 1017415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 792415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 792415 ) ( 3378340 * ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 566415 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_280 ( 3377105 566415 ) ( 3378340 * ) + NEW met2 ( 1519775 210775 ) via_260_260_hv + NEW met2 ( 1519715 210865 ) ( 1519865 * ) + NEW met2 ( 1519725 210910 ) ( 1519865 * ) + NEW met2 ( 1519715 210685 ) ( 1519865 * ) + NEW met1 TAPERRULE met1_width_260 ( 998595 210775 ) ( 1519575 * ) + NEW met1 ( 998395 210775 ) via_260_260_hv ( * 210865 ) + ( 998485 * ) + NEW met2 ( 998345 210925 ) ( 998485 * ) + NEW met2 ( 998335 210685 ) ( 998485 * ) + NEW met1 TAPERRULE met1_width_260 ( 976970 210775 ) ( 998195 * ) + NEW met1 ( 976770 210775 ) via_260_260_hv ( * 210865 ) + ( 976865 * ) + NEW met2 ( 976725 210920 ) ( 976865 * ) + NEW met2 ( 976710 210685 ) ( 976865 * ) + NEW met1 TAPERRULE met1_width_260 ( 726105 210775 ) ( 976570 * ) + NEW met1 ( 725605 210775 ) via_860_260_hv ( * 210865 ) + ( 725965 * ) + NEW met1 TAPERRULE met1_width_260 ( 209400 210775 ) ( 725105 * ) + NEW met1 TAPERRULE met1_width_260 ( 209460 210975 ) ( * 921575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 922075 ) ( * 1137575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 1138075 ) ( * 1353575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 1354075 ) ( * 1569575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 1570075 ) ( * 1785575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 1786075 ) ( * 2001575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 2002075 ) ( * 2639575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 2640075 ) ( * 2855575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 2856075 ) ( * 3071575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 3072075 ) ( * 3287575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 3288075 ) ( * 3503575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 3504075 ) ( * 3719575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 3720075 ) ( * 3935575 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 209460 3936075 ) ( * 4002450 ) + NEW met2 TAPERRULE met2_width_280 ( 209660 3935585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3935585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 3719585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3719585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 3503585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3503585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 3287585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3287585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 3071585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 3071585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 2855585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 2855585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 2639585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 2639585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 2001585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 2001585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 1785585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 1785585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 1569585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 1569585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 1353585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 1353585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 1137585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 1137585 ) ( 209260 * ) + NEW met2 TAPERRULE met2_width_280 ( 209660 921585 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_280 ( 208635 921585 ) ( 209260 * ) + NEW met2 ( 725245 210685 ) ( 725965 * ) + NEW met2 TAPERRULE met2_width_150 ( 725605 199800 ) ( * 210545 ) + NEW met2 TAPERRULE met2_width_150 ( 976725 210540 ) ( 976865 * ) + NEW met2 TAPERRULE met2_width_150 ( 998345 210540 ) ( 998485 * ) + NEW met2 TAPERRULE met2_width_150 ( 1519725 210540 ) ( 1519865 * ) + NEW met2 TAPERRULE met2_width_280 ( 1541415 210495 ) ( * 211060 ) ; + - resetb_pad/INP_SEL_H ( resetb_pad INP_SEL_H ) ; + - mprj_io[8] ( mprj_pads.area1_io_pad\[8\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 2972000 ) ( * 3033000 ) ; + - mprj_pads.area1_io_pad\[8\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[8\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[8\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[8\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 2966557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 2967240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 2967380 ) ( * 3005745 ) + NEW met1 ( 3378000 3005885 ) ( 3378120 * ) + NEW met1 ( 3378060 3006275 ) via_260_860_vh + NEW met2 ( 3377105 3006645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3006570 ) ( 3379365 * ) + NEW met1 ( 3378000 3006665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3006805 ) ( * 3027365 ) + NEW met1 ( 3378000 3027505 ) ( 3378120 * ) + NEW met1 ( 3378060 3027895 ) via_260_860_vh + NEW met2 ( 3377105 3028265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3028190 ) ( 3379365 * ) + NEW met1 ( 3378000 3028285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3028190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3006570 ) ( 3377860 * ) + NEW met2 ( 3378060 2966850 ) via_260_860_vh ( * 2966460 ) + ( 3378120 * ) + NEW met1 ( 3378010 2966395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 2966557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 2966485 ) ( 3379365 * ) ; + - mprj_io_in[8] ( mprj_pads.area1_io_pad\[8\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2969775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[8\]/HLD_H_N + ( mprj_pads.area1_io_pad\[8\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[8\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3013085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3013012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3013110 ) ( 3377640 * ) + NEW met1 ( 3377580 3012720 ) via_260_860_vh + NEW met1 ( 3377520 3012330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 2973225 ) ( * 3012190 ) + NEW met1 ( 3377520 2973085 ) ( 3377640 * ) + NEW met1 ( 3377580 2972995 ) via_260_260_vh + NEW met2 ( 3377105 2973065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 2972995 ) ( 3379365 * ) + NEW met2 ( 3377105 2972925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 2972995 ) ( 3377380 * ) + NEW met1 ( 3377520 2972905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 2966395 ) ( * 2972765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3013012.5 ) ( 3377380 * ) ; + - mprj_io_one[8] ( mprj_pads.area1_io_pad\[8\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2975755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[8] ( mprj_pads.area1_io_pad\[8\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2978975 ) ( 3379365 * ) ; + - mprj_gpio_analog[1] ( mprj_pads.area1_io_pad\[8\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2982195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[8\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[8\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[25] ( mprj_pads.area1_io_pad\[8\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2988175 ) ( 3379365 * ) ; + - mprj_gpio_noesd[1] ( mprj_pads.area1_io_pad\[8\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2991395 ) ( 3379365 * ) ; + - mprj_io_analog_en[8] ( mprj_pads.area1_io_pad\[8\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2994155 ) ( 3379365 * ) ; + - mprj_io_dm[24] ( mprj_pads.area1_io_pad\[8\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2997375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[8] ( mprj_pads.area1_io_pad\[8\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3000595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[8] ( mprj_pads.area1_io_pad\[8\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3003355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[8\]/ENABLE_H + ( mprj_pads.area1_io_pad\[8\] ENABLE_H ) ; + - mprj_io_analog_sel[8] ( mprj_pads.area1_io_pad\[8\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3015775 ) ( 3379365 * ) ; + - mprj_io_dm[26] ( mprj_pads.area1_io_pad\[8\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3018995 ) ( 3379365 * ) ; + - mprj_io_holdover[8] ( mprj_pads.area1_io_pad\[8\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3022215 ) ( 3379365 * ) ; + - mprj_io_out[8] ( mprj_pads.area1_io_pad\[8\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3024975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[8\]/ENABLE_VDDA_H + ( mprj_pads.area1_io_pad\[8\] ENABLE_VDDA_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3031415 ) ( 3378340 * ) + NEW met1 TAPERRULE met1_width_260 ( 3378540 3031925 ) ( * 3043475 ) + NEW met1 ( 3378540 3031425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 2964550 ) ( * 3030925 ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3031415 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[8] ( mprj_pads.area1_io_pad\[8\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3034175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[8] + ( mprj_pads.area1_io_pad\[8\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3037395 ) ( 3379365 * ) ; + - mprj_io_oeb[8] ( mprj_pads.area1_io_pad\[8\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3040615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[8] ( mprj_pads.area1_io_pad\[8\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3043375 ) ( 3379365 * ) ; + - mprj_io[24] ( user2_analog_pad\[3\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 64465 4783850 ) ( * 4843090 ) ; + - mprj_analog[10] ( user2_analog_pad\[3\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_25000 ( 117800 4813220 ) ( 199850 * ) ; + - mprj_io[33] ( mprj_pads.area2_io_pad\[8\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 2348180 ) ( * 4538130 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562500 ) ( * 4588410 ) + NEW met5 ( 3370900 4612730 ) ( 3382300 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370200 4612280 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_790 ( 3382705 4589360 ) ( * 4611830 ) + NEW met4 TAPERRULE met4_width_740 ( 3370200 4588840 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589360 ) ( * 4611830 ) + NEW met4 ( 3376495 4600595 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_520 ( 3353950 4612240 ) ( 3382660 * ) + NEW met3 ( 3353950 4612360 ) ( 3382055 * ) + NEW met3 TAPERRULE met3_width_500 ( 3382560 4589360 ) ( * 4611830 ) + NEW met3 TAPERRULE met3_width_710 ( 3353950 4588855 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_16880 ( 3362240 4589360 ) ( * 4611830 ) + NEW met3 ( 3376495 4600595 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_690 ( 3370280 4562045 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_730 ( 3382815 4539080 ) ( * 4561550 ) + NEW met4 TAPERRULE met4_width_650 ( 3370280 4538605 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_690 ( 3370475 4539080 ) ( * 4561550 ) + NEW met4 ( 3376635 4550315 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_545 ( 3353950 4561972.5 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_360 ( 3382630 4539080 ) ( * 4561550 ) + NEW met3 TAPERRULE met3_width_630 ( 3353950 4538615 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_17020 ( 3362310 4539080 ) ( * 4561550 ) + NEW met3 ( 3376635 4550315 ) via3_11630_22770_hx + NEW met5 TAPERRULE met5_width_13000 ( 3376600 673680 ) ( * 2324550 ) + NEW met4 TAPERRULE met4_width_620 ( 3370250 2347690 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_630 ( 3382825 2325500 ) ( * 2347230 ) + NEW met4 TAPERRULE met4_width_630 ( 3370250 2325035 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_590 ( 3370395 2325500 ) ( * 2347230 ) + NEW met4 ( 3376600 2336365 ) via4_11820_22030 + NEW met3 TAPERRULE met3_width_620 ( 3353790 2347690 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_590 ( 3382805 2325500 ) ( * 2347230 ) + NEW met3 TAPERRULE met3_width_605 ( 3353790 2325047.5 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_17050 ( 3362165 2325500 ) ( * 2347230 ) + NEW met3 ( 3376600 2336365 ) via3_11820_22030_hx ; + - mprj_io_in[22] ( mprj_pads.area2_io_pad\[8\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1847225 ) ( 210895 * ) ; + - mprj_io_one[22] ( mprj_pads.area2_io_pad\[8\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1841245 ) ( 210895 * ) ; + - mprj_io_slow_sel[22] ( mprj_pads.area2_io_pad\[8\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1838025 ) ( 210895 * ) ; + - mprj_gpio_analog[15] + ( mprj_pads.area2_io_pad\[8\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1834805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[8\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[8\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[67] ( mprj_pads.area2_io_pad\[8\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1828825 ) ( 210895 * ) ; + - mprj_gpio_noesd[15] ( mprj_pads.area2_io_pad\[8\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1825605 ) ( 210895 * ) ; + - mprj_io_analog_en[22] ( mprj_pads.area2_io_pad\[8\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1822845 ) ( 210895 * ) ; + - mprj_io_dm[66] ( mprj_pads.area2_io_pad\[8\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1819625 ) ( 210895 * ) ; + - mprj_io_analog_pol[22] ( mprj_pads.area2_io_pad\[8\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1816405 ) ( 210895 * ) ; + - mprj_io_inp_dis[22] ( mprj_pads.area2_io_pad\[8\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1813645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[8\]/ENABLE_H + ( mprj_pads.area2_io_pad\[8\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[8\]/HLD_H_N + ( mprj_pads.area2_io_pad\[8\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[8\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 1803915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1803987.5 ) ( 210220 * ) + NEW met1 ( 210360 1804670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1804810 ) ( * 1843775 ) + NEW met1 ( 210360 1843915 ) ( 210480 * ) + NEW met1 ( 210420 1844005 ) via_260_260_vh + NEW met2 ( 208635 1844075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 1844005 ) ( 210895 * ) + NEW met2 ( 208635 1843935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 1844005 ) ( 210220 * ) + NEW met1 ( 210360 1844095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1844235 ) ( * 1850605 ) + NEW met1 ( 210420 1804280 ) via_260_860_vh + NEW met1 ( 210360 1803890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 1803987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[22] ( mprj_pads.area2_io_pad\[8\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1801225 ) ( 210895 * ) ; + - mprj_io_dm[68] ( mprj_pads.area2_io_pad\[8\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1798005 ) ( 210895 * ) ; + - mprj_io_holdover[22] ( mprj_pads.area2_io_pad\[8\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1794785 ) ( 210895 * ) ; + - mprj_io_out[22] ( mprj_pads.area2_io_pad\[8\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1792025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[8\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[8\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[8\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[8\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 1850442.5 ) ( 210895 * ) + NEW met2 ( 208635 1850515 ) ( 210895 * ) + NEW met1 ( 209880 1850540 ) ( 210000 * ) + NEW met1 ( 209890 1850605 ) ( 209990 * ) + NEW met1 ( 209940 1850150 ) via_260_860_vh + NEW met1 ( 209880 1849760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1811255 ) ( * 1849620 ) + NEW met1 ( 209880 1811115 ) ( 210000 * ) + NEW met1 ( 209940 1810725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1810430 ) ( 210895 * ) + NEW met2 ( 208635 1810355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1810430 ) ( 209740 * ) + NEW met1 ( 209880 1810335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1789635 ) ( * 1810195 ) + NEW met1 ( 209880 1789495 ) ( 210000 * ) + NEW met1 ( 209940 1789105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1788810 ) ( 210895 * ) + NEW met2 ( 208635 1788735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1788810 ) ( 209740 * ) + NEW met1 ( 209880 1788715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1850442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[22] ( mprj_pads.area2_io_pad\[8\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1782825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[22] + ( mprj_pads.area2_io_pad\[8\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1779605 ) ( 210895 * ) ; + - mprj_io_oeb[22] ( mprj_pads.area2_io_pad\[8\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1776385 ) ( 210895 * ) ; + - mprj_io_in_3v3[22] ( mprj_pads.area2_io_pad\[8\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1773625 ) ( 210895 * ) ; + - vssa1_pad2 ( user1_vssa_hvclamp_pad\[1\] VSSA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3523530 2085910 ) ( * 2145150 ) ; + - gpio_pad/VSSIO ( gpio_pad VSSIO ) ( FILLER_145 VSSIO ) + ( FILLER_146 VSSIO ) ( FILLER_147 VSSIO ) ( FILLER_144 VSSIO ) + ( FILLER_143 VSSIO ) ( FILLER_142 VSSIO ) ( FILLER_141 VSSIO ) + ( FILLER_140 VSSIO ) ( FILLER_139 VSSIO ) ( FILLER_138 VSSIO ) + ( FILLER_137 VSSIO ) ( FILLER_136 VSSIO ) ( FILLER_135 VSSIO ) + ( FILLER_131 VSSIO ) ( FILLER_132 VSSIO ) ( FILLER_133 VSSIO ) + ( user1_analog_pad\[0\] VSSIO ) ( FILLER_127 VSSIO ) + ( FILLER_130 VSSIO ) ( FILLER_129 VSSIO ) ( FILLER_128 VSSIO ) + ( FILLER_124 VSSIO ) ( FILLER_126 VSSIO ) ( FILLER_125 VSSIO ) + ( FILLER_123 VSSIO ) ( FILLER_116 VSSIO ) + ( user1_vssa_hvclamp_pad\[0\] VSSIO ) ( FILLER_119 VSSIO ) + ( FILLER_120 VSSIO ) ( FILLER_121 VSSIO ) ( FILLER_118 VSSIO ) + ( FILLER_117 VSSIO ) ( FILLER_113 VSSIO ) ( FILLER_115 VSSIO ) + ( FILLER_114 VSSIO ) ( FILLER_110 VSSIO ) ( FILLER_112 VSSIO ) + ( FILLER_111 VSSIO ) ( FILLER_107 VSSIO ) + ( user1_analog_pad\[1\] VSSIO ) ( FILLER_108 VSSIO ) + ( FILLER_103 VSSIO ) ( FILLER_106 VSSIO ) ( FILLER_105 VSSIO ) + ( FILLER_104 VSSIO ) ( FILLER_100 VSSIO ) ( FILLER_102 VSSIO ) + ( FILLER_101 VSSIO ) ( FILLER_98 VSSIO ) ( FILLER_99 VSSIO ) + ( FILLER_91 VSSIO ) ( FILLER_95 VSSIO ) ( FILLER_96 VSSIO ) + ( user1_analog_pad\[2\] VSSIO ) ( FILLER_93 VSSIO ) + ( FILLER_94 VSSIO ) ( FILLER_92 VSSIO ) ( FILLER_90 VSSIO ) + ( FILLER_89 VSSIO ) ( FILLER_88 VSSIO ) ( FILLER_87 VSSIO ) + ( FILLER_86 VSSIO ) ( FILLER_85 VSSIO ) ( FILLER_84 VSSIO ) + ( FILLER_83 VSSIO ) ( FILLER_82 VSSIO ) ( FILLER_81 VSSIO ) + ( FILLER_80 VSSIO ) ( FILLER_79 VSSIO ) + ( sky130_ef_io__com_bus_slice_10um_0 VSSIO ) + ( FILLER_78 VSSIO ) ( sky130_ef_io__com_bus_slice_5um_1 VSSIO ) + ( user1_analog_pad_with_clamp VSSIO ) ( FILLER_SB3 VSSIO ) + ( sky130_ef_io__com_bus_slice_5um_0 VSSIO ) ( FILLER_71 VSSIO ) + ( disconnect_vdda_0 VSSIO ) ( FILLER_73 VSSIO ) + ( FILLER_72 VSSIO ) ( FILLER_68 VSSIO ) ( FILLER_70 VSSIO ) + ( FILLER_69 VSSIO ) ( FILLER_64 VSSIO ) + ( mgmt_vssio_hvclamp_pad\[1\] VSSIO ) ( FILLER_66 VSSIO ) + ( FILLER_65 VSSIO ) ( FILLER_60 VSSIO ) ( FILLER_63 VSSIO ) + ( FILLER_62 VSSIO ) ( FILLER_61 VSSIO ) + ( sky130_ef_io__com_bus_slice_5um_3 VSSIO ) + ( sky130_ef_io__com_bus_slice_10um_1 VSSIO ) + ( user2_analog_pad_with_clamp\[0\] VSSIO ) + ( sky130_ef_io__com_bus_slice_5um_2 VSSIO ) ( FILLER_57 VSSIO ) + ( FILLER_56 VSSIO ) ( FILLER_55 VSSIO ) ( FILLER_54 VSSIO ) + ( FILLER_53 VSSIO ) ( FILLER_52 VSSIO ) ( FILLER_51 VSSIO ) + ( FILLER_50 VSSIO ) ( FILLER_49 VSSIO ) + ( user2_analog_pad_with_clamp\[1\] VSSIO ) ( FILLER_47 VSSIO ) + ( FILLER_46 VSSIO ) ( FILLER_45 VSSIO ) ( FILLER_44 VSSIO ) + ( FILLER_43 VSSIO ) ( FILLER_42 VSSIO ) + ( user2_analog_pad\[0\] VSSIO ) ( FILLER_41 VSSIO ) + ( FILLER_39 VSSIO ) ( FILLER_38 VSSIO ) ( FILLER_37 VSSIO ) + ( FILLER_36 VSSIO ) ( FILLER_33 VSSIO ) ( FILLER_35 VSSIO ) + ( FILLER_34 VSSIO ) ( FILLER_29 VSSIO ) ( FILLER_32 VSSIO ) + ( FILLER_31 VSSIO ) ( FILLER_30 VSSIO ) ( FILLER_26 VSSIO ) + ( FILLER_27 VSSIO ) ( user2_analog_pad\[1\] VSSIO ) + ( FILLER_25 VSSIO ) ( FILLER_24 VSSIO ) ( FILLER_23 VSSIO ) + ( FILLER_22 VSSIO ) ( FILLER_21 VSSIO ) ( FILLER_20 VSSIO ) + ( FILLER_19 VSSIO ) ( FILLER_18 VSSIO ) ( FILLER_17 VSSIO ) + ( FILLER_13 VSSIO ) ( user2_analog_pad\[2\] VSSIO ) + ( FILLER_14 VSSIO ) ( FILLER_15 VSSIO ) ( FILLER_10 VSSIO ) + ( FILLER_12 VSSIO ) ( FILLER_11 VSSIO ) ( FILLER_6 VSSIO ) + ( FILLER_9 VSSIO ) ( FILLER_8 VSSIO ) ( FILLER_7 VSSIO ) + ( FILLER_5 VSSIO ) ( user2_corner VSSIO ) + ( user1_corner VSSIO ) ( FILLER_578 VSSIO ) + ( FILLER_579 VSSIO ) ( FILLER_576 VSSIO ) ( FILLER_786 VSSIO ) + ( FILLER_577 VSSIO ) ( FILLER_785 VSSIO ) ( FILLER_571 VSSIO ) + ( FILLER_575 VSSIO ) ( FILLER_784 VSSIO ) ( FILLER_574 VSSIO ) + ( FILLER_783 VSSIO ) ( FILLER_573 VSSIO ) ( FILLER_782 VSSIO ) + ( FILLER_572 VSSIO ) ( FILLER_781 VSSIO ) ( FILLER_780 VSSIO ) + ( FILLER_779 VSSIO ) ( FILLER_570 VSSIO ) + ( user2_analog_pad\[3\] VSSIO ) ( FILLER_776 VSSIO ) + ( FILLER_568 VSSIO ) ( user1_analog_pad\[3\] VSSIO ) + ( FILLER_567 VSSIO ) ( FILLER_777 VSSIO ) ( FILLER_775 VSSIO ) + ( FILLER_566 VSSIO ) ( FILLER_774 VSSIO ) ( FILLER_565 VSSIO ) + ( FILLER_773 VSSIO ) ( FILLER_564 VSSIO ) ( FILLER_772 VSSIO ) + ( FILLER_563 VSSIO ) ( FILLER_771 VSSIO ) ( FILLER_562 VSSIO ) + ( FILLER_561 VSSIO ) ( FILLER_769 VSSIO ) ( FILLER_770 VSSIO ) + ( FILLER_766 VSSIO ) ( user2_vccd_lvclamp_pad VSSIO ) + ( FILLER_559 VSSIO ) ( FILLER_558 VSSIO ) ( FILLER_557 VSSIO ) + ( FILLER_767 VSSIO ) ( user1_vccd_lvclamp_pad VSSIO ) + ( FILLER_556 VSSIO ) ( FILLER_552 VSSIO ) ( FILLER_765 VSSIO ) + ( FILLER_555 VSSIO ) ( FILLER_764 VSSIO ) ( FILLER_554 VSSIO ) + ( FILLER_763 VSSIO ) ( FILLER_553 VSSIO ) ( FILLER_762 VSSIO ) + ( FILLER_761 VSSIO ) ( FILLER_551 VSSIO ) ( FILLER_760 VSSIO ) + ( FILLER_546 VSSIO ) ( FILLER_759 VSSIO ) + ( mgmt_vddio_hvclamp_pad\[1\] VSSIO ) ( FILLER_549 VSSIO ) + ( FILLER_548 VSSIO ) ( FILLER_547 VSSIO ) + ( mprj_pads.area1_io_pad\[13\] VSSIO ) ( FILLER_757 VSSIO ) + ( FILLER_756 VSSIO ) ( FILLER_545 VSSIO ) ( FILLER_755 VSSIO ) + ( FILLER_544 VSSIO ) ( FILLER_754 VSSIO ) ( FILLER_543 VSSIO ) + ( FILLER_542 VSSIO ) ( FILLER_753 VSSIO ) ( FILLER_541 VSSIO ) + ( FILLER_752 VSSIO ) ( FILLER_751 VSSIO ) ( FILLER_536 VSSIO ) + ( FILLER_750 VSSIO ) ( user2_vssa_hvclamp_pad VSSIO ) + ( FILLER_538 VSSIO ) ( FILLER_539 VSSIO ) ( FILLER_537 VSSIO ) + ( user1_vdda_hvclamp_pad\[0\] VSSIO ) ( FILLER_748 VSSIO ) + ( FILLER_747 VSSIO ) ( FILLER_746 VSSIO ) ( FILLER_535 VSSIO ) + ( FILLER_745 VSSIO ) ( FILLER_534 VSSIO ) ( FILLER_744 VSSIO ) + ( FILLER_533 VSSIO ) ( FILLER_532 VSSIO ) ( FILLER_531 VSSIO ) + ( FILLER_743 VSSIO ) ( FILLER_741 VSSIO ) ( FILLER_742 VSSIO ) + ( FILLER_740 VSSIO ) ( FILLER_526 VSSIO ) + ( mprj_pads.area2_io_pad\[0\] VSSIO ) ( FILLER_529 VSSIO ) + ( FILLER_528 VSSIO ) ( FILLER_527 VSSIO ) ( FILLER_522 VSSIO ) + ( mprj_pads.area1_io_pad\[12\] VSSIO ) ( FILLER_525 VSSIO ) + ( FILLER_738 VSSIO ) ( FILLER_524 VSSIO ) ( FILLER_737 VSSIO ) + ( FILLER_523 VSSIO ) ( FILLER_736 VSSIO ) ( FILLER_735 VSSIO ) + ( FILLER_734 VSSIO ) ( FILLER_521 VSSIO ) ( FILLER_733 VSSIO ) + ( FILLER_732 VSSIO ) ( FILLER_516 VSSIO ) ( FILLER_731 VSSIO ) + ( mprj_pads.area2_io_pad\[1\] VSSIO ) ( FILLER_519 VSSIO ) + ( FILLER_518 VSSIO ) ( FILLER_517 VSSIO ) + ( mprj_pads.area1_io_pad\[11\] VSSIO ) ( FILLER_515 VSSIO ) + ( FILLER_729 VSSIO ) ( FILLER_728 VSSIO ) ( FILLER_514 VSSIO ) + ( FILLER_727 VSSIO ) ( FILLER_513 VSSIO ) ( FILLER_512 VSSIO ) + ( FILLER_511 VSSIO ) ( FILLER_726 VSSIO ) ( FILLER_725 VSSIO ) + ( FILLER_722 VSSIO ) ( FILLER_724 VSSIO ) ( FILLER_723 VSSIO ) + ( FILLER_507 VSSIO ) ( mprj_pads.area2_io_pad\[2\] VSSIO ) + ( FILLER_509 VSSIO ) ( FILLER_508 VSSIO ) ( FILLER_718 VSSIO ) + ( FILLER_506 VSSIO ) ( FILLER_505 VSSIO ) ( FILLER_719 VSSIO ) + ( FILLER_720 VSSIO ) ( mprj_pads.area1_io_pad\[10\] VSSIO ) + ( FILLER_504 VSSIO ) ( FILLER_503 VSSIO ) ( FILLER_501 VSSIO ) + ( FILLER_717 VSSIO ) ( FILLER_502 VSSIO ) ( FILLER_715 VSSIO ) + ( FILLER_716 VSSIO ) ( FILLER_712 VSSIO ) ( FILLER_714 VSSIO ) + ( FILLER_713 VSSIO ) ( FILLER_497 VSSIO ) + ( mprj_pads.area2_io_pad\[3\] VSSIO ) ( FILLER_499 VSSIO ) + ( FILLER_498 VSSIO ) ( FILLER_493 VSSIO ) ( FILLER_496 VSSIO ) + ( FILLER_495 VSSIO ) ( FILLER_494 VSSIO ) + ( mprj_pads.area1_io_pad\[9\] VSSIO ) ( FILLER_710 VSSIO ) + ( FILLER_709 VSSIO ) ( FILLER_491 VSSIO ) ( FILLER_492 VSSIO ) + ( FILLER_708 VSSIO ) ( FILLER_707 VSSIO ) ( FILLER_703 VSSIO ) + ( FILLER_706 VSSIO ) ( FILLER_705 VSSIO ) ( FILLER_704 VSSIO ) + ( mprj_pads.area2_io_pad\[4\] VSSIO ) ( FILLER_489 VSSIO ) + ( FILLER_488 VSSIO ) ( FILLER_487 VSSIO ) ( FILLER_483 VSSIO ) + ( FILLER_486 VSSIO ) ( FILLER_485 VSSIO ) ( FILLER_484 VSSIO ) + ( FILLER_701 VSSIO ) ( mprj_pads.area1_io_pad\[8\] VSSIO ) + ( FILLER_700 VSSIO ) ( FILLER_699 VSSIO ) ( FILLER_482 VSSIO ) + ( FILLER_481 VSSIO ) ( FILLER_698 VSSIO ) ( FILLER_697 VSSIO ) + ( FILLER_696 VSSIO ) ( FILLER_695 VSSIO ) ( FILLER_694 VSSIO ) + ( FILLER_477 VSSIO ) ( mprj_pads.area2_io_pad\[5\] VSSIO ) + ( FILLER_478 VSSIO ) ( FILLER_479 VSSIO ) ( FILLER_693 VSSIO ) + ( FILLER_473 VSSIO ) ( FILLER_476 VSSIO ) ( FILLER_475 VSSIO ) + ( FILLER_474 VSSIO ) ( FILLER_471 VSSIO ) + ( mprj_pads.area1_io_pad\[7\] VSSIO ) ( FILLER_691 VSSIO ) + ( FILLER_472 VSSIO ) ( FILLER_690 VSSIO ) ( FILLER_689 VSSIO ) + ( FILLER_468 VSSIO ) ( FILLER_688 VSSIO ) ( FILLER_687 VSSIO ) + ( FILLER_686 VSSIO ) ( mprj_pads.area2_io_pad\[6\] VSSIO ) + ( FILLER_469 VSSIO ) ( FILLER_685 VSSIO ) ( FILLER_684 VSSIO ) + ( FILLER_467 VSSIO ) ( FILLER_464 VSSIO ) ( FILLER_466 VSSIO ) + ( FILLER_465 VSSIO ) ( user1_vdda_hvclamp_pad\[1\] VSSIO ) + ( FILLER_463 VSSIO ) ( FILLER_682 VSSIO ) ( FILLER_681 VSSIO ) + ( FILLER_462 VSSIO ) ( FILLER_461 VSSIO ) ( FILLER_680 VSSIO ) + ( FILLER_679 VSSIO ) ( FILLER_678 VSSIO ) ( FILLER_677 VSSIO ) + ( FILLER_457 VSSIO ) ( user2_vdda_hvclamp_pad VSSIO ) + ( FILLER_458 VSSIO ) ( FILLER_459 VSSIO ) ( FILLER_676 VSSIO ) + ( FILLER_675 VSSIO ) ( FILLER_454 VSSIO ) ( FILLER_456 VSSIO ) + ( FILLER_455 VSSIO ) ( FILLER_452 VSSIO ) ( FILLER_453 VSSIO ) + ( FILLER_673 VSSIO ) ( user1_vssd_lvclamp_pad VSSIO ) + ( FILLER_672 VSSIO ) ( FILLER_451 VSSIO ) ( FILLER_668 VSSIO ) + ( FILLER_671 VSSIO ) ( FILLER_670 VSSIO ) ( FILLER_669 VSSIO ) + ( FILLER_448 VSSIO ) ( user2_vssd_lvclamp_pad VSSIO ) + ( FILLER_449 VSSIO ) ( FILLER_667 VSSIO ) ( FILLER_665 VSSIO ) + ( FILLER_447 VSSIO ) ( FILLER_666 VSSIO ) ( FILLER_446 VSSIO ) + ( FILLER_444 VSSIO ) ( FILLER_445 VSSIO ) + ( user1_vssa_hvclamp_pad\[1\] VSSIO ) ( FILLER_443 VSSIO ) + ( FILLER_442 VSSIO ) ( FILLER_663 VSSIO ) ( FILLER_441 VSSIO ) + ( FILLER_662 VSSIO ) ( FILLER_661 VSSIO ) ( FILLER_660 VSSIO ) + ( FILLER_659 VSSIO ) ( FILLER_438 VSSIO ) + ( mprj_pads.area2_io_pad\[7\] VSSIO ) ( FILLER_439 VSSIO ) + ( FILLER_658 VSSIO ) ( FILLER_657 VSSIO ) ( FILLER_437 VSSIO ) + ( FILLER_656 VSSIO ) ( FILLER_436 VSSIO ) ( FILLER_434 VSSIO ) + ( FILLER_435 VSSIO ) ( FILLER_654 VSSIO ) ( FILLER_433 VSSIO ) + ( FILLER_432 VSSIO ) ( mprj_pads.area1_io_pad\[6\] VSSIO ) + ( FILLER_431 VSSIO ) ( FILLER_650 VSSIO ) ( FILLER_653 VSSIO ) + ( FILLER_652 VSSIO ) ( FILLER_651 VSSIO ) ( FILLER_429 VSSIO ) + ( mprj_pads.area2_io_pad\[8\] VSSIO ) ( FILLER_649 VSSIO ) + ( FILLER_646 VSSIO ) ( FILLER_428 VSSIO ) ( FILLER_427 VSSIO ) + ( FILLER_648 VSSIO ) ( FILLER_426 VSSIO ) ( FILLER_647 VSSIO ) + ( FILLER_425 VSSIO ) ( FILLER_424 VSSIO ) ( FILLER_422 VSSIO ) + ( FILLER_423 VSSIO ) ( FILLER_421 VSSIO ) ( FILLER_641 VSSIO ) + ( mprj_pads.area1_io_pad\[5\] VSSIO ) ( FILLER_644 VSSIO ) + ( FILLER_643 VSSIO ) ( FILLER_642 VSSIO ) ( FILLER_637 VSSIO ) + ( mprj_pads.area2_io_pad\[9\] VSSIO ) ( FILLER_419 VSSIO ) + ( FILLER_418 VSSIO ) ( FILLER_640 VSSIO ) ( FILLER_417 VSSIO ) + ( FILLER_639 VSSIO ) ( FILLER_416 VSSIO ) ( FILLER_638 VSSIO ) + ( FILLER_415 VSSIO ) ( FILLER_414 VSSIO ) ( FILLER_412 VSSIO ) + ( FILLER_413 VSSIO ) ( FILLER_411 VSSIO ) + ( mprj_pads.area1_io_pad\[4\] VSSIO ) ( FILLER_635 VSSIO ) + ( FILLER_634 VSSIO ) ( FILLER_633 VSSIO ) ( FILLER_632 VSSIO ) + ( mprj_pads.area2_io_pad\[10\] VSSIO ) ( FILLER_409 VSSIO ) + ( FILLER_631 VSSIO ) ( FILLER_408 VSSIO ) ( FILLER_407 VSSIO ) + ( FILLER_630 VSSIO ) ( FILLER_406 VSSIO ) ( FILLER_405 VSSIO ) + ( FILLER_629 VSSIO ) ( FILLER_628 VSSIO ) ( FILLER_404 VSSIO ) + ( FILLER_402 VSSIO ) ( FILLER_403 VSSIO ) ( FILLER_401 VSSIO ) + ( FILLER_624 VSSIO ) ( mprj_pads.area1_io_pad\[3\] VSSIO ) + ( FILLER_625 VSSIO ) ( FILLER_626 VSSIO ) ( FILLER_620 VSSIO ) + ( FILLER_623 VSSIO ) ( mprj_pads.area2_io_pad\[11\] VSSIO ) + ( FILLER_399 VSSIO ) ( FILLER_398 VSSIO ) ( FILLER_622 VSSIO ) + ( FILLER_397 VSSIO ) ( FILLER_621 VSSIO ) ( FILLER_396 VSSIO ) + ( FILLER_395 VSSIO ) ( FILLER_618 VSSIO ) ( FILLER_619 VSSIO ) + ( FILLER_394 VSSIO ) ( FILLER_392 VSSIO ) ( FILLER_393 VSSIO ) + ( FILLER_391 VSSIO ) ( FILLER_615 VSSIO ) ( FILLER_616 VSSIO ) + ( mprj_pads.area1_io_pad\[2\] VSSIO ) ( FILLER_385 VSSIO ) + ( FILLER_614 VSSIO ) ( mprj_pads.area2_io_pad\[12\] VSSIO ) + ( FILLER_388 VSSIO ) ( FILLER_389 VSSIO ) ( FILLER_387 VSSIO ) + ( FILLER_613 VSSIO ) ( FILLER_386 VSSIO ) ( FILLER_612 VSSIO ) + ( FILLER_611 VSSIO ) ( FILLER_384 VSSIO ) ( FILLER_383 VSSIO ) + ( FILLER_610 VSSIO ) ( FILLER_609 VSSIO ) ( FILLER_382 VSSIO ) + ( FILLER_381 VSSIO ) ( FILLER_380 VSSIO ) ( FILLER_379 VSSIO ) + ( FILLER_606 VSSIO ) ( FILLER_607 VSSIO ) + ( mprj_pads.area1_io_pad\[1\] VSSIO ) ( FILLER_378 VSSIO ) + ( FILLER_377 VSSIO ) ( FILLER_605 VSSIO ) ( FILLER_376 VSSIO ) + ( FILLER_604 VSSIO ) ( FILLER_375 VSSIO ) ( FILLER_603 VSSIO ) + ( FILLER_602 VSSIO ) ( FILLER_374 VSSIO ) ( FILLER_SB2 VSSIO ) + ( disconnect_vdda_2 VSSIO ) ( FILLER_601 VSSIO ) + ( FILLER_600 VSSIO ) ( FILLER_367 VSSIO ) ( FILLER_599 VSSIO ) + ( mgmt_vddio_hvclamp_pad\[0\] VSSIO ) ( FILLER_370 VSSIO ) + ( FILLER_369 VSSIO ) ( FILLER_368 VSSIO ) + ( mprj_pads.area1_io_pad\[0\] VSSIO ) ( FILLER_597 VSSIO ) + ( FILLER_596 VSSIO ) ( FILLER_366 VSSIO ) ( FILLER_595 VSSIO ) + ( FILLER_365 VSSIO ) ( FILLER_594 VSSIO ) ( FILLER_364 VSSIO ) + ( FILLER_363 VSSIO ) ( FILLER_593 VSSIO ) ( FILLER_362 VSSIO ) + ( FILLER_592 VSSIO ) ( FILLER_591 VSSIO ) ( FILLER_590 VSSIO ) + ( FILLER_587 VSSIO ) ( FILLER_SB1 VSSIO ) + ( disconnect_vdda_1 VSSIO ) ( FILLER_586 VSSIO ) + ( mgmt_vccd_lvclamp_pad VSSIO ) ( FILLER_360 VSSIO ) + ( FILLER_359 VSSIO ) ( FILLER_358 VSSIO ) ( FILLER_357 VSSIO ) + ( FILLER_585 VSSIO ) ( FILLER_584 VSSIO ) ( FILLER_356 VSSIO ) + ( FILLER_583 VSSIO ) ( FILLER_582 VSSIO ) ( FILLER_355 VSSIO ) + ( FILLER_581 VSSIO ) ( FILLER_354 VSSIO ) ( FILLER_353 VSSIO ) + ( mgmt_corner\[1\] VSSIO ) ( FILLER_352 VSSIO ) + ( FILLER_580 VSSIO ) ( FILLER_351 VSSIO ) ( FILLER_350 VSSIO ) + ( FILLER_349 VSSIO ) ( FILLER_348 VSSIO ) ( FILLER_347 VSSIO ) + ( FILLER_346 VSSIO ) ( bus_tie_72 VSSIO ) ( bus_tie_71 VSSIO ) + ( bus_tie_70 VSSIO ) ( bus_tie_69 VSSIO ) ( bus_tie_68 VSSIO ) + ( FILLER_339 VSSIO ) ( bus_tie_67 VSSIO ) ( FILLER_336 VSSIO ) + ( FILLER_338 VSSIO ) ( FILLER_337 VSSIO ) ( FILLER_335 VSSIO ) + ( FILLER_331 VSSIO ) ( mgmt_vdda_hvclamp_pad VSSIO ) + ( FILLER_332 VSSIO ) ( FILLER_333 VSSIO ) ( FILLER_329 VSSIO ) + ( FILLER_330 VSSIO ) ( bus_tie_65 VSSIO ) ( bus_tie_66 VSSIO ) + ( FILLER_321 VSSIO ) ( bus_tie_64 VSSIO ) ( bus_tie_63 VSSIO ) + ( bus_tie_62 VSSIO ) ( FILLER_322 VSSIO ) ( bus_tie_61 VSSIO ) + ( FILLER_318 VSSIO ) ( FILLER_320 VSSIO ) ( FILLER_319 VSSIO ) + ( FILLER_313 VSSIO ) ( mgmt_vssio_hvclamp_pad\[0\] VSSIO ) + ( FILLER_315 VSSIO ) ( FILLER_316 VSSIO ) ( FILLER_314 VSSIO ) + ( FILLER_312 VSSIO ) ( bus_tie_58 VSSIO ) ( bus_tie_60 VSSIO ) + ( bus_tie_59 VSSIO ) ( bus_tie_56 VSSIO ) ( bus_tie_57 VSSIO ) + ( FILLER_301 VSSIO ) ( FILLER_303 VSSIO ) ( FILLER_302 VSSIO ) + ( FILLER_304 VSSIO ) ( FILLER_305 VSSIO ) ( bus_tie_55 VSSIO ) + ( FILLER_295 VSSIO ) ( clock_pad VSSIO ) ( FILLER_299 VSSIO ) + ( FILLER_297 VSSIO ) ( FILLER_298 VSSIO ) ( FILLER_296 VSSIO ) + ( bus_tie_54 VSSIO ) ( bus_tie_53 VSSIO ) ( bus_tie_52 VSSIO ) + ( bus_tie_51 VSSIO ) ( bus_tie_50 VSSIO ) ( FILLER_286 VSSIO ) + ( FILLER_285 VSSIO ) ( FILLER_284 VSSIO ) ( FILLER_287 VSSIO ) + ( FILLER_288 VSSIO ) ( bus_tie_49 VSSIO ) ( FILLER_279 VSSIO ) + ( flash_io1_pad VSSIO ) ( FILLER_280 VSSIO ) + ( FILLER_281 VSSIO ) ( FILLER_282 VSSIO ) ( FILLER_278 VSSIO ) + ( bus_tie_46 VSSIO ) ( bus_tie_48 VSSIO ) ( bus_tie_47 VSSIO ) + ( FILLER_268 VSSIO ) ( bus_tie_45 VSSIO ) ( bus_tie_44 VSSIO ) + ( FILLER_269 VSSIO ) ( FILLER_267 VSSIO ) ( FILLER_270 VSSIO ) + ( FILLER_271 VSSIO ) ( bus_tie_43 VSSIO ) ( FILLER_261 VSSIO ) + ( flash_io0_pad VSSIO ) ( FILLER_264 VSSIO ) + ( FILLER_265 VSSIO ) ( FILLER_263 VSSIO ) ( FILLER_262 VSSIO ) + ( bus_tie_39 VSSIO ) ( bus_tie_42 VSSIO ) ( bus_tie_41 VSSIO ) + ( bus_tie_40 VSSIO ) ( FILLER_251 VSSIO ) ( bus_tie_38 VSSIO ) + ( FILLER_252 VSSIO ) ( FILLER_250 VSSIO ) ( FILLER_253 VSSIO ) + ( FILLER_254 VSSIO ) ( bus_tie_37 VSSIO ) ( FILLER_244 VSSIO ) + ( flash_clk_pad VSSIO ) ( FILLER_247 VSSIO ) + ( FILLER_248 VSSIO ) ( FILLER_246 VSSIO ) ( FILLER_245 VSSIO ) + ( bus_tie_36 VSSIO ) ( bus_tie_35 VSSIO ) ( bus_tie_34 VSSIO ) + ( bus_tie_33 VSSIO ) ( bus_tie_32 VSSIO ) ( FILLER_235 VSSIO ) + ( FILLER_234 VSSIO ) ( FILLER_233 VSSIO ) ( FILLER_236 VSSIO ) + ( FILLER_237 VSSIO ) ( bus_tie_31 VSSIO ) ( FILLER_227 VSSIO ) + ( flash_csb_pad VSSIO ) ( FILLER_230 VSSIO ) + ( FILLER_231 VSSIO ) ( FILLER_229 VSSIO ) ( FILLER_228 VSSIO ) + ( bus_tie_27 VSSIO ) ( bus_tie_30 VSSIO ) ( bus_tie_29 VSSIO ) + ( bus_tie_28 VSSIO ) ( FILLER_216 VSSIO ) ( bus_tie_26 VSSIO ) + ( FILLER_220 VSSIO ) ( bus_tie_25 VSSIO ) ( FILLER_217 VSSIO ) + ( FILLER_218 VSSIO ) ( FILLER_219 VSSIO ) ( FILLER_210 VSSIO ) + ( mgmt_vssd_lvclamp_pad VSSIO ) ( FILLER_214 VSSIO ) + ( FILLER_212 VSSIO ) ( FILLER_213 VSSIO ) ( FILLER_211 VSSIO ) + ( bus_tie_24 VSSIO ) ( bus_tie_20 VSSIO ) ( bus_tie_23 VSSIO ) + ( bus_tie_22 VSSIO ) ( bus_tie_21 VSSIO ) ( FILLER_199 VSSIO ) + ( FILLER_201 VSSIO ) ( FILLER_200 VSSIO ) ( FILLER_202 VSSIO ) + ( FILLER_203 VSSIO ) ( bus_tie_19 VSSIO ) ( FILLER_195 VSSIO ) + ( bus_tie_9 VSSIO ) ( mgmt_corner\[0\] VSSIO ) + ( mgmt_vssa_hvclamp_pad VSSIO ) ( FILLER_160 VSSIO ) + ( FILLER_163 VSSIO ) ( FILLER_161 VSSIO ) ( FILLER_162 VSSIO ) + ( FILLER_159 VSSIO ) ( bus_tie_4 VSSIO ) ( bus_tie_6 VSSIO ) + ( bus_tie_5 VSSIO ) ( FILLER_149 VSSIO ) ( bus_tie_3 VSSIO ) + ( bus_tie_2 VSSIO ) ( FILLER_150 VSSIO ) ( FILLER_148 VSSIO ) + ( FILLER_151 VSSIO ) ( FILLER_152 VSSIO ) ( bus_tie_1 VSSIO ) + ( FILLER_196 VSSIO ) ( FILLER_197 VSSIO ) ( FILLER_193 VSSIO ) + ( FILLER_194 VSSIO ) ( bus_tie_17 VSSIO ) ( bus_tie_18 VSSIO ) + ( bus_tie_14 VSSIO ) ( bus_tie_16 VSSIO ) ( bus_tie_15 VSSIO ) + ( FILLER_182 VSSIO ) ( FILLER_185 VSSIO ) ( FILLER_186 VSSIO ) + ( bus_tie_13 VSSIO ) ( FILLER_184 VSSIO ) ( FILLER_183 VSSIO ) + ( FILLER_177 VSSIO ) ( FILLER_179 VSSIO ) ( FILLER_180 VSSIO ) + ( resetb_pad VSSIO ) ( FILLER_178 VSSIO ) ( FILLER_176 VSSIO ) + ( bus_tie_12 VSSIO ) ( bus_tie_11 VSSIO ) ( bus_tie_10 VSSIO ) + ( bus_tie_8 VSSIO ) ( bus_tie_7 VSSIO ) ( FILLER_168 VSSIO ) + ( FILLER_169 VSSIO ) ( FILLER_167 VSSIO ) ( FILLER_166 VSSIO ) + ( FILLER_165 VSSIO ) ; + - vssa_pad ( mgmt_vssa_hvclamp_pad VSSA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 401910 64465 ) ( 461150 * ) ; + - mprj_io[16] ( user1_analog_pad\[1\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 2633850 5123530 ) ( 2693090 * ) ; + - mprj_analog[2] ( user1_analog_pad\[1\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_25000 ( 2663220 4988150 ) ( * 5070200 ) ; + - vccd2_pad ( user2_vccd_lvclamp_pad VCCD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 31635 4597470 ) ( 97295 * ) ; + - vssd_pad ( mgmt_vssd_lvclamp_pad VSSD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 1243530 31635 ) ( * 97295 ) ; + - vdda1_pad ( user1_vdda_hvclamp_pad\[0\] VDDA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3523530 4099910 ) ( * 4159150 ) ; + - gpio ( gpio_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 2578000 64215 ) ( 2639000 * ) ; + - gpio_pad/TIE_LO_ESD ( gpio_pad TIE_LO_ESD ) + ( gpio_pad ENABLE_VSWITCH_H ) ( gpio_pad ENABLE_INP_H ) + + ROUTED met2 ( 2572565 209095 ) via_260_260_hv + NEW met2 ( 2572505 209185 ) ( 2572625 * ) + NEW met1 TAPERRULE met1_width_260 ( 2571880 209095 ) ( 2572365 * ) + NEW met2 ( 2572505 209005 ) ( 2572625 * ) + NEW met1 TAPERRULE met1_width_260 ( 2572765 209095 ) ( 2612560 * ) via_260_260_hv + ( * 209185 ) ( 2612620 * ) + NEW met2 ( 2612500 209005 ) ( 2612620 * ) + NEW met1 TAPERRULE met1_width_260 ( 2612760 209095 ) ( 2634180 * ) via_260_260_hv + ( * 209185 ) ( 2634240 * ) + NEW met2 ( 2634120 209005 ) ( 2634240 * ) + NEW met1 TAPERRULE met1_width_260 ( 2634380 209095 ) ( 2650065 * ) ; + - gpio_in_core ( gpio_pad IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2575775 208635 ) ( * 210895 ) ; + - gpio_pad/HLD_H_N ( gpio_pad HLD_H_N ) ( gpio_pad TIE_HI_ESD ) + + ROUTED met2 ( 2618995 209515 ) via_260_260_hv + NEW met2 ( 2618935 209605 ) ( 2619055 * ) + NEW met1 TAPERRULE met1_width_260 ( 2579190 209515 ) ( 2618795 * ) + NEW met1 ( 2578990 209515 ) via_260_260_hv ( * 209605 ) + ( 2579050 * ) + NEW met1 TAPERRULE met1_width_260 ( 2571880 209515 ) ( 2578790 * ) + NEW met2 ( 2578930 209425 ) ( 2579050 * ) + NEW met2 ( 2618935 209425 ) ( 2619055 * ) + NEW met1 TAPERRULE met1_width_260 ( 2619195 209515 ) ( 2650065 * ) ; + - gpio_pad/SLOW ( gpio_pad SLOW ) ( constant_block_6 zero ) + ( gpio_pad IB_MODE_SEL ) ( gpio_pad VTRIP_SEL ) + ( gpio_pad HLD_OVR ) ( gpio_pad ANALOG_SEL ) + ( gpio_pad ANALOG_POL ) ( gpio_pad ANALOG_EN ) + + ROUTED met2 ( 2584975 209935 ) via_260_260_hv + NEW met2 ( 2584915 210025 ) ( 2585035 * ) + NEW met1 TAPERRULE met1_width_260 ( 2571880 209935 ) ( 2584775 * ) + NEW met2 ( 2584915 209845 ) ( 2585035 * ) + NEW met1 TAPERRULE met1_width_260 ( 2585175 209935 ) ( 2600150 * ) via_260_260_hv + ( * 210025 ) ( 2600210 * ) + NEW met2 ( 2600090 209845 ) ( 2600210 * ) + NEW met1 TAPERRULE met1_width_260 ( 2600350 209935 ) ( 2606595 * ) via_260_260_hv + ( * 210025 ) ( 2606655 * ) + NEW met2 ( 2606535 209845 ) ( 2606655 * ) + NEW met1 TAPERRULE met1_width_260 ( 2606795 209935 ) ( 2621770 * ) via_260_260_hv + ( * 210025 ) ( 2621830 * ) + NEW met2 ( 2621710 209845 ) ( 2621830 * ) + NEW met1 TAPERRULE met1_width_260 ( 2621970 209935 ) ( 2628205 * ) via_260_260_hv + ( * 210025 ) ( 2628265 * ) + NEW met2 ( 2628145 209845 ) ( 2628265 * ) + NEW met1 TAPERRULE met1_width_260 ( 2628405 209935 ) ( 2640175 * ) via_260_260_hv + ( * 210025 ) ( 2640235 * ) + NEW met2 ( 2640115 209845 ) ( 2640235 * ) + NEW met1 TAPERRULE met1_width_260 ( 2640375 209935 ) ( 2643390 * ) via_260_260_hv + ( * 210025 ) ( 2643450 * ) + NEW met2 ( 2643330 209845 ) ( 2643450 * ) + NEW met1 TAPERRULE met1_width_260 ( 2643590 209935 ) ( 2651945 * ) via_260_260_hv + ( * 210025 ) ( 2652005 * ) + NEW met2 TAPERRULE met2_width_260 ( 2651945 204625 ) ( * 209735 ) + NEW met2 ( 2651865 204485 ) ( 2652025 * ) + NEW met2 ( 2651945 204360 ) via2_300_300_vx + NEW met3 ( 2651920 204385 ) ( 2651970 * ) + NEW met3 ( 2652245 204360 ) ( 2668135 * ) + NEW met3 ( 2668135 203490 ) ( * 204060 ) + NEW met3 ( 2651920 204335 ) ( 2651970 * ) + NEW met3 ( 2651920 204360 ) ( 2651645 * ) + NEW met2 ( 2651865 204235 ) ( 2652025 * ) ; + - gpio_pad/PAD_A_ESD_0_H ( gpio_pad PAD_A_ESD_0_H ) ; + - gpio_pad/PAD_A_ESD_1_H ( gpio_pad PAD_A_ESD_1_H ) ; + - gpio_mode1_core ( gpio_pad DM[2] ) ( gpio_pad DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2624995 208800 ) ( * 211060 ) ( * 211200 ) + ( * 211380 ) + NEW met2 ( 2624930 211520 ) ( 2625050 * ) + NEW met2 ( 2624990 211610 ) via_260_260_hv + NEW met2 ( 2624930 211700 ) ( 2625050 * ) + NEW met1 ( 2594370 211610 ) ( 2624790 * ) + NEW met1 ( 2594170 211610 ) via_260_260_hv ( * 211700 ) + ( 2594230 * ) + NEW met2 ( 2594110 211520 ) ( 2594230 * ) + NEW met2 ( 2594170 208950 ) ( * 211380 ) ; + - gpio_pad/PAD_A_NOESD_H ( gpio_pad PAD_A_NOESD_H ) ; + - gpio_mode0_core ( gpio_pad DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2603375 208635 ) ( * 210895 ) ; + - gpio_inenb_core ( gpio_pad INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2609355 208635 ) ( * 210895 ) ; + - gpio_out_core ( gpio_pad OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2630975 208635 ) ( * 210895 ) ; + - gpio_outenb_core ( gpio_pad OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2646615 208635 ) ( * 210895 ) ; + - gpio_pad/IN_H ( gpio_pad IN_H ) ; + - vssd1_pad ( user1_vssd_lvclamp_pad VSSD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 3490700 2336530 ) ( 3556360 * ) ; + - vssd1 ( user1_vccd_lvclamp_pad VSSD1 ) + ( user1_vssd_lvclamp_pad VSSD1 ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3360600 673680 ) ( * 2299230 ) + NEW met5 TAPERRULE met5_width_13000 ( 3360600 2323450 ) ( * 2349170 ) + NEW met5 TAPERRULE met5_width_13000 ( 3360600 2373790 ) ( * 4563640 ) + NEW met5 TAPERRULE met5_width_13000 ( 3360600 4587190 ) ( * 4612730 ) + NEW met4 TAPERRULE met4_width_620 ( 3354240 4586700 ) ( 3366960 * ) + NEW met4 TAPERRULE met4_width_680 ( 3366770 4564590 ) ( * 4586240 ) + NEW met4 TAPERRULE met4_width_680 ( 3354240 4564100 ) ( 3366960 * ) + NEW met4 TAPERRULE met4_width_650 ( 3354415 4564590 ) ( * 4586240 ) + NEW met4 ( 3360585 4575415 ) via4_11690_21950 + NEW met3 TAPERRULE met3_width_660 ( 3353950 4586720 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_16380 ( 3374620 4564590 ) ( * 4586240 ) + NEW met3 TAPERRULE met3_width_700 ( 3353950 4564090 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_940 ( 3354270 4564590 ) ( * 4586240 ) + NEW met3 ( 3360585 4575415 ) via3_11690_21950_hx + NEW met4 TAPERRULE met4_width_530 ( 3354200 2373255 ) ( 3366930 * ) + NEW met4 TAPERRULE met4_width_690 ( 3366735 2350120 ) ( * 2372840 ) + NEW met4 TAPERRULE met4_width_470 ( 3354200 2349735 ) ( 3366930 * ) + NEW met4 TAPERRULE met4_width_550 ( 3354325 2350120 ) ( * 2372840 ) + NEW met4 ( 3360495 2361480 ) via4_11790_23020 + NEW met3 TAPERRULE met3_width_510 ( 3353790 2373245 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_16710 ( 3374745 2350120 ) ( * 2372840 ) + NEW met3 TAPERRULE met3_width_470 ( 3353790 2349735 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_960 ( 3354120 2350120 ) ( * 2372840 ) + NEW met3 ( 3360495 2361480 ) via3_11790_23020_hx + NEW met4 TAPERRULE met4_width_670 ( 3354240 2322985 ) ( 3366950 * ) + NEW met4 TAPERRULE met4_width_600 ( 3366800 2300180 ) ( * 2322500 ) + NEW met4 TAPERRULE met4_width_730 ( 3354240 2299665 ) ( 3366950 * ) + NEW met4 TAPERRULE met4_width_710 ( 3354445 2300180 ) ( * 2322500 ) + NEW met4 ( 3360650 2311340 ) via4_11700_22620 + NEW met3 TAPERRULE met3_width_595 ( 3353790 2322947.5 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_16600 ( 3374800 2300180 ) ( * 2322500 ) + NEW met3 TAPERRULE met3_width_730 ( 3353790 2299665 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_1160 ( 3354220 2300180 ) ( * 2322500 ) + NEW met3 ( 3360650 2311340 ) via3_11700_22620_hx ; + - vccd1 ( user1_vccd_lvclamp_pad VCCD1 ) + ( user1_vssd_lvclamp_pad VCCD1 ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 673680 ) ( * 2324550 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348180 ) ( * 4538130 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562500 ) ( * 4588410 ) + NEW met5 ( 3370900 4612730 ) ( 3382300 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370200 4612280 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_790 ( 3382705 4589360 ) ( * 4611830 ) + NEW met4 TAPERRULE met4_width_740 ( 3370200 4588840 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589360 ) ( * 4611830 ) + NEW met4 ( 3376495 4600595 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_520 ( 3353950 4612240 ) ( 3382660 * ) + NEW met3 ( 3353950 4612360 ) ( 3382055 * ) + NEW met3 TAPERRULE met3_width_500 ( 3382560 4589360 ) ( * 4611830 ) + NEW met3 TAPERRULE met3_width_710 ( 3353950 4588855 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_16880 ( 3362240 4589360 ) ( * 4611830 ) + NEW met3 ( 3376495 4600595 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_690 ( 3370280 4562045 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_730 ( 3382815 4539080 ) ( * 4561550 ) + NEW met4 TAPERRULE met4_width_650 ( 3370280 4538605 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_690 ( 3370475 4539080 ) ( * 4561550 ) + NEW met4 ( 3376635 4550315 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_545 ( 3353950 4561972.5 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_360 ( 3382630 4539080 ) ( * 4561550 ) + NEW met3 TAPERRULE met3_width_630 ( 3353950 4538615 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_17020 ( 3362310 4539080 ) ( * 4561550 ) + NEW met3 ( 3376635 4550315 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_620 ( 3370250 2347690 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_630 ( 3382825 2325500 ) ( * 2347230 ) + NEW met4 TAPERRULE met4_width_630 ( 3370250 2325035 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_590 ( 3370395 2325500 ) ( * 2347230 ) + NEW met4 ( 3376600 2336365 ) via4_11820_22030 + NEW met3 TAPERRULE met3_width_620 ( 3353790 2347690 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_590 ( 3382805 2325500 ) ( * 2347230 ) + NEW met3 TAPERRULE met3_width_605 ( 3353790 2325047.5 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_17050 ( 3362165 2325500 ) ( * 2347230 ) + NEW met3 ( 3376600 2336365 ) via3_11820_22030_hx ; + - mprj_io[1] ( mprj_pads.area1_io_pad\[1\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 733000 ) ( * 794000 ) ; + - mprj_pads.area1_io_pad\[1\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[1\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[1\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[1\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 727557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 728240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 728380 ) ( * 766745 ) + NEW met1 ( 3378000 766885 ) ( 3378120 * ) + NEW met1 ( 3378060 767275 ) via_260_860_vh + NEW met2 ( 3377105 767645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 767570 ) ( 3379365 * ) + NEW met1 ( 3378000 767665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 767805 ) ( * 788365 ) + NEW met1 ( 3378000 788505 ) ( 3378120 * ) + NEW met1 ( 3378060 788895 ) via_260_860_vh + NEW met2 ( 3377105 789265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 789190 ) ( 3379365 * ) + NEW met1 ( 3378000 789285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 789190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 767570 ) ( 3377860 * ) + NEW met2 ( 3378060 727850 ) via_260_860_vh ( * 727460 ) + ( 3378120 * ) + NEW met1 ( 3378010 727395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 727557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 727485 ) ( 3379365 * ) ; + - mprj_io_in[1] ( mprj_pads.area1_io_pad\[1\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 730775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[1\]/HLD_H_N + ( mprj_pads.area1_io_pad\[1\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[1\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 774085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 774012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 774110 ) ( 3377640 * ) + NEW met1 ( 3377580 773720 ) via_260_860_vh + NEW met1 ( 3377520 773330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 734225 ) ( * 773190 ) + NEW met1 ( 3377520 734085 ) ( 3377640 * ) + NEW met1 ( 3377580 733995 ) via_260_260_vh + NEW met2 ( 3377105 734065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 733995 ) ( 3379365 * ) + NEW met2 ( 3377105 733925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 733995 ) ( 3377380 * ) + NEW met1 ( 3377520 733905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 727395 ) ( * 733765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 774012.5 ) ( 3377380 * ) ; + - mprj_io_one[1] ( mprj_pads.area1_io_pad\[1\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 736755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[1] ( mprj_pads.area1_io_pad\[1\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 739975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[1\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[1\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[1\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[1\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[4] ( mprj_pads.area1_io_pad\[1\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 749175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[1\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[1\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[1] ( mprj_pads.area1_io_pad\[1\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 755155 ) ( 3379365 * ) ; + - mprj_io_dm[3] ( mprj_pads.area1_io_pad\[1\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 758375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[1] ( mprj_pads.area1_io_pad\[1\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 761595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[1] ( mprj_pads.area1_io_pad\[1\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 764355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[1\]/ENABLE_H + ( mprj_pads.area1_io_pad\[1\] ENABLE_H ) ; + - mprj_io_analog_sel[1] ( mprj_pads.area1_io_pad\[1\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 776775 ) ( 3379365 * ) ; + - mprj_io_dm[5] ( mprj_pads.area1_io_pad\[1\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 779995 ) ( 3379365 * ) ; + - mprj_io_holdover[1] ( mprj_pads.area1_io_pad\[1\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 783215 ) ( 3379365 * ) ; + - mprj_io_out[1] ( mprj_pads.area1_io_pad\[1\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 785975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[1] ( mprj_pads.area1_io_pad\[1\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 795175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[1] + ( mprj_pads.area1_io_pad\[1\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 798395 ) ( 3379365 * ) ; + - mprj_io_oeb[1] ( mprj_pads.area1_io_pad\[1\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 801615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[1] ( mprj_pads.area1_io_pad\[1\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 804375 ) ( 3379365 * ) ; + - mprj_io[14] ( user1_analog_pad\[3\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 3523530 4765910 ) ( * 4825150 ) ; + - mprj_analog[0] ( user1_analog_pad\[3\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_25000 ( 3388150 4795780 ) ( 3470200 * ) ; + - mprj_io[26] ( mprj_pads.area2_io_pad\[1\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 673680 ) ( * 2324550 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348180 ) ( * 4538130 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562500 ) ( * 4588410 ) + NEW met5 ( 3370900 4612730 ) ( 3382300 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370200 4612280 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_790 ( 3382705 4589360 ) ( * 4611830 ) + NEW met4 TAPERRULE met4_width_740 ( 3370200 4588840 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589360 ) ( * 4611830 ) + NEW met4 ( 3376495 4600595 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_520 ( 3353950 4612240 ) ( 3382660 * ) + NEW met3 ( 3353950 4612360 ) ( 3382055 * ) + NEW met3 TAPERRULE met3_width_500 ( 3382560 4589360 ) ( * 4611830 ) + NEW met3 TAPERRULE met3_width_710 ( 3353950 4588855 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_16880 ( 3362240 4589360 ) ( * 4611830 ) + NEW met3 ( 3376495 4600595 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_690 ( 3370280 4562045 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_730 ( 3382815 4539080 ) ( * 4561550 ) + NEW met4 TAPERRULE met4_width_650 ( 3370280 4538605 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_690 ( 3370475 4539080 ) ( * 4561550 ) + NEW met4 ( 3376635 4550315 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_545 ( 3353950 4561972.5 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_360 ( 3382630 4539080 ) ( * 4561550 ) + NEW met3 TAPERRULE met3_width_630 ( 3353950 4538615 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_17020 ( 3362310 4539080 ) ( * 4561550 ) + NEW met3 ( 3376635 4550315 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_620 ( 3370250 2347690 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_630 ( 3382825 2325500 ) ( * 2347230 ) + NEW met4 TAPERRULE met4_width_630 ( 3370250 2325035 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_590 ( 3370395 2325500 ) ( * 2347230 ) + NEW met4 ( 3376600 2336365 ) via4_11820_22030 + NEW met3 TAPERRULE met3_width_620 ( 3353790 2347690 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_590 ( 3382805 2325500 ) ( * 2347230 ) + NEW met3 TAPERRULE met3_width_605 ( 3353790 2325047.5 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_17050 ( 3362165 2325500 ) ( * 2347230 ) + NEW met3 ( 3376600 2336365 ) via3_11820_22030_hx ; + - mprj_io_in[15] ( mprj_pads.area2_io_pad\[1\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3781225 ) ( 210895 * ) ; + - mprj_io_one[15] ( mprj_pads.area2_io_pad\[1\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3775245 ) ( 210895 * ) ; + - mprj_io_slow_sel[15] ( mprj_pads.area2_io_pad\[1\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3772025 ) ( 210895 * ) ; + - mprj_gpio_analog[8] ( mprj_pads.area2_io_pad\[1\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3768805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[1\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[1\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[46] ( mprj_pads.area2_io_pad\[1\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3762825 ) ( 210895 * ) ; + - mprj_gpio_noesd[8] ( mprj_pads.area2_io_pad\[1\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3759605 ) ( 210895 * ) ; + - mprj_io_analog_en[15] ( mprj_pads.area2_io_pad\[1\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3756845 ) ( 210895 * ) ; + - mprj_io_dm[45] ( mprj_pads.area2_io_pad\[1\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3753625 ) ( 210895 * ) ; + - mprj_io_analog_pol[15] ( mprj_pads.area2_io_pad\[1\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3750405 ) ( 210895 * ) ; + - mprj_io_inp_dis[15] ( mprj_pads.area2_io_pad\[1\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3747645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[1\]/ENABLE_H + ( mprj_pads.area2_io_pad\[1\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[1\]/HLD_H_N + ( mprj_pads.area2_io_pad\[1\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[1\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3737915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3737987.5 ) ( 210220 * ) + NEW met1 ( 210360 3738670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3738810 ) ( * 3777775 ) + NEW met1 ( 210360 3777915 ) ( 210480 * ) + NEW met1 ( 210420 3778005 ) via_260_260_vh + NEW met2 ( 208635 3778075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3778005 ) ( 210895 * ) + NEW met2 ( 208635 3777935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3778005 ) ( 210220 * ) + NEW met1 ( 210360 3778095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3778235 ) ( * 3784605 ) + NEW met1 ( 210420 3738280 ) via_260_860_vh + NEW met1 ( 210360 3737890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3737987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[15] ( mprj_pads.area2_io_pad\[1\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3735225 ) ( 210895 * ) ; + - mprj_io_dm[47] ( mprj_pads.area2_io_pad\[1\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3732005 ) ( 210895 * ) ; + - mprj_io_holdover[15] ( mprj_pads.area2_io_pad\[1\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3728785 ) ( 210895 * ) ; + - mprj_io_out[15] ( mprj_pads.area2_io_pad\[1\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3726025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[1\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[1\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[1\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[1\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 3784442.5 ) ( 210895 * ) + NEW met2 ( 208635 3784515 ) ( 210895 * ) + NEW met1 ( 209880 3784540 ) ( 210000 * ) + NEW met1 ( 209890 3784605 ) ( 209990 * ) + NEW met1 ( 209940 3784150 ) via_260_860_vh + NEW met1 ( 209880 3783760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3745255 ) ( * 3783620 ) + NEW met1 ( 209880 3745115 ) ( 210000 * ) + NEW met1 ( 209940 3744725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3744430 ) ( 210895 * ) + NEW met2 ( 208635 3744355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3744430 ) ( 209740 * ) + NEW met1 ( 209880 3744335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3723635 ) ( * 3744195 ) + NEW met1 ( 209880 3723495 ) ( 210000 * ) + NEW met1 ( 209940 3723105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3722810 ) ( 210895 * ) + NEW met2 ( 208635 3722735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3722810 ) ( 209740 * ) + NEW met1 ( 209880 3722715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3784442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[15] ( mprj_pads.area2_io_pad\[1\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3716825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[15] + ( mprj_pads.area2_io_pad\[1\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3713605 ) ( 210895 * ) ; + - mprj_io_oeb[15] ( mprj_pads.area2_io_pad\[1\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3710385 ) ( 210895 * ) ; + - mprj_io_in_3v3[15] ( mprj_pads.area2_io_pad\[1\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3707625 ) ( 210895 * ) ; + - mprj_io[36] ( mprj_pads.area2_io_pad\[11\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 211480 2278940 ) ( * 4585710 ) + NEW met5 TAPERRULE met5_width_13000 ( 211480 4609410 ) ( * 4635320 ) + NEW met4 TAPERRULE met4_width_620 ( 205170 4608920 ) ( 217860 * ) + NEW met4 TAPERRULE met4_width_650 ( 217685 4586660 ) ( * 4608460 ) + NEW met4 TAPERRULE met4_width_460 ( 205170 4586280 ) ( 217860 * ) + NEW met4 TAPERRULE met4_width_490 ( 205265 4586660 ) ( * 4608460 ) + NEW met4 ( 211435 4597560 ) via4_11850_22100 + NEW met3 TAPERRULE met3_width_650 ( 203620 4608935 ) ( 233760 * ) + NEW met3 TAPERRULE met3_width_16550 ( 225635 4586660 ) ( * 4608460 ) + NEW met3 TAPERRULE met3_width_560 ( 203620 4586230 ) ( 233760 * ) + NEW met3 TAPERRULE met3_width_2040 ( 204490 4586660 ) ( * 4608460 ) + NEW met3 ( 211435 4597560 ) via3_11850_22100_hx + NEW met5 TAPERRULE met5_width_13000 ( 211480 2228670 ) ( * 2254540 ) + NEW met4 TAPERRULE met4_width_480 ( 205140 2278380 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_450 ( 217695 2255490 ) ( * 2277990 ) + NEW met4 TAPERRULE met4_width_600 ( 205140 2255040 ) ( 217770 * ) + NEW met4 TAPERRULE met4_width_550 ( 205265 2255490 ) ( * 2277990 ) + NEW met4 ( 211505 2266740 ) via4_11930_22800 + NEW met3 TAPERRULE met3_width_560 ( 204850 2278420 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_16650 ( 225795 2255490 ) ( * 2277990 ) + NEW met3 TAPERRULE met3_width_585 ( 204850 2255047.5 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_840 ( 205120 2255490 ) ( * 2277990 ) + NEW met3 ( 211505 2266740 ) via3_11930_22800_hx + NEW met5 TAPERRULE met5_width_13000 ( 211480 892940 ) ( * 2204270 ) + NEW met4 TAPERRULE met4_width_580 ( 205110 2228160 ) ( 217740 * ) + NEW met4 TAPERRULE met4_width_460 ( 217660 2205220 ) ( * 2227720 ) + NEW met4 TAPERRULE met4_width_500 ( 205110 2204820 ) ( 217740 * ) + NEW met4 TAPERRULE met4_width_540 ( 205230 2205220 ) ( * 2227720 ) + NEW met4 ( 211465 2216470 ) via4_11930_22800 + NEW met3 TAPERRULE met3_width_630 ( 204850 2228185 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_16690 ( 225775 2205220 ) ( * 2227720 ) + NEW met3 TAPERRULE met3_width_570 ( 204850 2204785 ) ( 233970 * ) + NEW met3 TAPERRULE met3_width_800 ( 205100 2205220 ) ( * 2227720 ) + NEW met3 ( 211465 2216470 ) via3_11930_22800_hx ; + - mprj_io_in[25] ( mprj_pads.area2_io_pad\[11\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1199225 ) ( 210895 * ) ; + - mprj_io_one[25] ( mprj_pads.area2_io_pad\[11\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1193245 ) ( 210895 * ) ; + - mprj_io_slow_sel[25] ( mprj_pads.area2_io_pad\[11\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1190025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[11\]/PAD_A_ESD_0_H + ( mprj_pads.area2_io_pad\[11\] PAD_A_ESD_0_H ) ; + - mprj_pads.area2_io_pad\[11\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[11\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[76] ( mprj_pads.area2_io_pad\[11\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1180825 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[11\]/PAD_A_NOESD_H + ( mprj_pads.area2_io_pad\[11\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[25] ( mprj_pads.area2_io_pad\[11\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1174845 ) ( 210895 * ) ; + - mprj_io_dm[75] ( mprj_pads.area2_io_pad\[11\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1171625 ) ( 210895 * ) ; + - mprj_io_analog_pol[25] + ( mprj_pads.area2_io_pad\[11\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1168405 ) ( 210895 * ) ; + - mprj_io_inp_dis[25] ( mprj_pads.area2_io_pad\[11\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1165645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[11\]/ENABLE_H + ( mprj_pads.area2_io_pad\[11\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[11\]/HLD_H_N + ( mprj_pads.area2_io_pad\[11\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[11\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 1155915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1155987.5 ) ( 210220 * ) + NEW met1 ( 210360 1156670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1156810 ) ( * 1195775 ) + NEW met1 ( 210360 1195915 ) ( 210480 * ) + NEW met1 ( 210420 1196005 ) via_260_260_vh + NEW met2 ( 208635 1196075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 1196005 ) ( 210895 * ) + NEW met2 ( 208635 1195935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 1196005 ) ( 210220 * ) + NEW met1 ( 210360 1196095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 1196235 ) ( * 1202605 ) + NEW met1 ( 210420 1156280 ) via_260_860_vh + NEW met1 ( 210360 1155890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 1155987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[25] + ( mprj_pads.area2_io_pad\[11\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1153225 ) ( 210895 * ) ; + - mprj_io_dm[77] ( mprj_pads.area2_io_pad\[11\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1150005 ) ( 210895 * ) ; + - mprj_io_holdover[25] ( mprj_pads.area2_io_pad\[11\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1146785 ) ( 210895 * ) ; + - mprj_io_out[25] ( mprj_pads.area2_io_pad\[11\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1144025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[11\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[11\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[11\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[11\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 1202442.5 ) ( 210895 * ) + NEW met2 ( 208635 1202515 ) ( 210895 * ) + NEW met1 ( 209880 1202540 ) ( 210000 * ) + NEW met1 ( 209890 1202605 ) ( 209990 * ) + NEW met1 ( 209940 1202150 ) via_260_860_vh + NEW met1 ( 209880 1201760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1163255 ) ( * 1201620 ) + NEW met1 ( 209880 1163115 ) ( 210000 * ) + NEW met1 ( 209940 1162725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1162430 ) ( 210895 * ) + NEW met2 ( 208635 1162355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1162430 ) ( 209740 * ) + NEW met1 ( 209880 1162335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 1141635 ) ( * 1162195 ) + NEW met1 ( 209880 1141495 ) ( 210000 * ) + NEW met1 ( 209940 1141105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 1140810 ) ( 210895 * ) + NEW met2 ( 208635 1140735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 1140810 ) ( 209740 * ) + NEW met1 ( 209880 1140715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 1202442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[25] ( mprj_pads.area2_io_pad\[11\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1134825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[25] + ( mprj_pads.area2_io_pad\[11\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1131605 ) ( 210895 * ) ; + - mprj_io_oeb[25] ( mprj_pads.area2_io_pad\[11\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1128385 ) ( 210895 * ) ; + - mprj_io_in_3v3[25] ( mprj_pads.area2_io_pad\[11\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1125625 ) ( 210895 * ) ; + - mprj_io[20] ( user2_analog_pad_with_clamp\[1\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 1159850 5123530 ) ( 1219090 * ) ; + - mprj_analog[6] ( user2_analog_pad_with_clamp\[1\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_15680 ( 1202540 4995840 ) ( 1273850 * ) ; + - mprj_clamp_high[2] ( user2_analog_pad_with_clamp\[1\] DRN_HVC ) + + ROUTED met2 TAPERRULE met2_width_23900 ( 1214340 4988070 ) ( * 5013590 ) ; + - mprj_clamp_low[2] + ( user2_analog_pad_with_clamp\[1\] SRC_BDY_HVC ) + + ROUTED met2 TAPERRULE met2_width_2050 ( 1152565 4989025 ) ( 1176325 * ) ; + - FILLER_9/VSSD ( FILLER_9 VSSD ) ( FILLER_145 VSSD ) + ( FILLER_146 VSSD ) ( FILLER_147 VSSD ) ( FILLER_144 VSSD ) + ( FILLER_143 VSSD ) ( FILLER_142 VSSD ) ( FILLER_141 VSSD ) + ( FILLER_140 VSSD ) ( FILLER_139 VSSD ) ( FILLER_138 VSSD ) + ( FILLER_137 VSSD ) ( FILLER_136 VSSD ) ( FILLER_135 VSSD ) + ( FILLER_131 VSSD ) ( FILLER_132 VSSD ) ( FILLER_133 VSSD ) + ( user1_analog_pad\[0\] VSSD ) ( FILLER_127 VSSD ) + ( FILLER_130 VSSD ) ( FILLER_129 VSSD ) ( FILLER_128 VSSD ) + ( FILLER_124 VSSD ) ( FILLER_126 VSSD ) ( FILLER_125 VSSD ) + ( FILLER_123 VSSD ) ( FILLER_116 VSSD ) + ( user1_vssa_hvclamp_pad\[0\] VSSD ) ( FILLER_119 VSSD ) + ( FILLER_120 VSSD ) ( FILLER_121 VSSD ) ( FILLER_118 VSSD ) + ( FILLER_117 VSSD ) ( FILLER_113 VSSD ) ( FILLER_115 VSSD ) + ( FILLER_114 VSSD ) ( FILLER_110 VSSD ) ( FILLER_112 VSSD ) + ( FILLER_111 VSSD ) ( FILLER_107 VSSD ) + ( user1_analog_pad\[1\] VSSD ) ( FILLER_108 VSSD ) + ( FILLER_103 VSSD ) ( FILLER_106 VSSD ) ( FILLER_105 VSSD ) + ( FILLER_104 VSSD ) ( FILLER_100 VSSD ) ( FILLER_102 VSSD ) + ( FILLER_101 VSSD ) ( FILLER_98 VSSD ) ( FILLER_99 VSSD ) + ( FILLER_91 VSSD ) ( FILLER_95 VSSD ) ( FILLER_96 VSSD ) + ( user1_analog_pad\[2\] VSSD ) ( FILLER_93 VSSD ) + ( FILLER_94 VSSD ) ( FILLER_92 VSSD ) ( FILLER_90 VSSD ) + ( FILLER_89 VSSD ) ( FILLER_88 VSSD ) ( FILLER_87 VSSD ) + ( FILLER_86 VSSD ) ( FILLER_85 VSSD ) ( FILLER_84 VSSD ) + ( FILLER_83 VSSD ) ( FILLER_82 VSSD ) ( FILLER_81 VSSD ) + ( FILLER_80 VSSD ) ( FILLER_79 VSSD ) + ( sky130_ef_io__com_bus_slice_10um_0 VSSD ) ( FILLER_78 VSSD ) + ( sky130_ef_io__com_bus_slice_5um_1 VSSD ) + ( user1_analog_pad_with_clamp VSSD ) ( FILLER_SB3 VSSD ) + ( sky130_ef_io__com_bus_slice_5um_0 VSSD ) ( FILLER_71 VSSD ) + ( disconnect_vdda_0 VSSD ) ( FILLER_73 VSSD ) + ( FILLER_72 VSSD ) ( FILLER_68 VSSD ) ( FILLER_70 VSSD ) + ( FILLER_69 VSSD ) ( FILLER_64 VSSD ) + ( mgmt_vssio_hvclamp_pad\[1\] VSSD ) ( FILLER_66 VSSD ) + ( FILLER_65 VSSD ) ( FILLER_60 VSSD ) ( FILLER_63 VSSD ) + ( FILLER_62 VSSD ) ( FILLER_61 VSSD ) + ( sky130_ef_io__com_bus_slice_5um_3 VSSD ) + ( sky130_ef_io__com_bus_slice_10um_1 VSSD ) + ( user2_analog_pad_with_clamp\[0\] VSSD ) + ( sky130_ef_io__com_bus_slice_5um_2 VSSD ) ( FILLER_57 VSSD ) + ( FILLER_56 VSSD ) ( FILLER_55 VSSD ) ( FILLER_54 VSSD ) + ( FILLER_53 VSSD ) ( FILLER_52 VSSD ) ( FILLER_51 VSSD ) + ( FILLER_50 VSSD ) ( FILLER_49 VSSD ) + ( user2_analog_pad_with_clamp\[1\] VSSD ) ( FILLER_47 VSSD ) + ( FILLER_46 VSSD ) ( FILLER_45 VSSD ) ( FILLER_44 VSSD ) + ( FILLER_43 VSSD ) ( FILLER_42 VSSD ) + ( user2_analog_pad\[0\] VSSD ) ( FILLER_41 VSSD ) + ( FILLER_39 VSSD ) ( FILLER_38 VSSD ) ( FILLER_37 VSSD ) + ( FILLER_36 VSSD ) ( FILLER_33 VSSD ) ( FILLER_35 VSSD ) + ( FILLER_34 VSSD ) ( FILLER_29 VSSD ) ( FILLER_32 VSSD ) + ( FILLER_31 VSSD ) ( FILLER_30 VSSD ) ( FILLER_26 VSSD ) + ( FILLER_27 VSSD ) ( user2_analog_pad\[1\] VSSD ) + ( FILLER_25 VSSD ) ( FILLER_24 VSSD ) ( FILLER_23 VSSD ) + ( FILLER_22 VSSD ) ( FILLER_21 VSSD ) ( FILLER_20 VSSD ) + ( FILLER_19 VSSD ) ( FILLER_18 VSSD ) ( FILLER_17 VSSD ) + ( FILLER_13 VSSD ) ( user2_analog_pad\[2\] VSSD ) + ( FILLER_14 VSSD ) ( FILLER_15 VSSD ) ( FILLER_10 VSSD ) + ( FILLER_12 VSSD ) ( FILLER_11 VSSD ) ( FILLER_6 VSSD ) + ( FILLER_8 VSSD ) ( FILLER_7 VSSD ) ( FILLER_5 VSSD ) + ( FILLER_SB2 VSSD ) ( user2_corner VSSD ) ( user1_corner VSSD ) + ( FILLER_578 VSSD ) ( FILLER_579 VSSD ) ( FILLER_576 VSSD ) + ( FILLER_786 VSSD ) ( FILLER_577 VSSD ) ( FILLER_785 VSSD ) + ( FILLER_571 VSSD ) ( FILLER_575 VSSD ) ( FILLER_784 VSSD ) + ( FILLER_574 VSSD ) ( FILLER_783 VSSD ) ( FILLER_573 VSSD ) + ( FILLER_782 VSSD ) ( FILLER_572 VSSD ) ( FILLER_781 VSSD ) + ( FILLER_780 VSSD ) ( FILLER_779 VSSD ) ( FILLER_570 VSSD ) + ( user2_analog_pad\[3\] VSSD ) ( FILLER_776 VSSD ) + ( FILLER_568 VSSD ) ( user1_analog_pad\[3\] VSSD ) + ( FILLER_567 VSSD ) ( FILLER_777 VSSD ) ( FILLER_775 VSSD ) + ( FILLER_566 VSSD ) ( FILLER_774 VSSD ) ( FILLER_565 VSSD ) + ( FILLER_773 VSSD ) ( FILLER_564 VSSD ) ( FILLER_772 VSSD ) + ( FILLER_563 VSSD ) ( FILLER_771 VSSD ) ( FILLER_562 VSSD ) + ( FILLER_561 VSSD ) ( FILLER_769 VSSD ) ( FILLER_770 VSSD ) + ( FILLER_766 VSSD ) ( FILLER_559 VSSD ) + ( user2_vccd_lvclamp_pad VSSD ) ( FILLER_558 VSSD ) + ( FILLER_557 VSSD ) ( FILLER_767 VSSD ) + ( user1_vccd_lvclamp_pad VSSD ) ( FILLER_556 VSSD ) + ( FILLER_552 VSSD ) ( FILLER_765 VSSD ) ( FILLER_555 VSSD ) + ( FILLER_764 VSSD ) ( FILLER_554 VSSD ) ( FILLER_763 VSSD ) + ( FILLER_553 VSSD ) ( FILLER_762 VSSD ) ( FILLER_761 VSSD ) + ( FILLER_551 VSSD ) ( FILLER_760 VSSD ) ( FILLER_546 VSSD ) + ( FILLER_759 VSSD ) ( FILLER_549 VSSD ) + ( mgmt_vddio_hvclamp_pad\[1\] VSSD ) ( FILLER_548 VSSD ) + ( FILLER_547 VSSD ) ( mprj_pads.area1_io_pad\[13\] VSSD ) + ( FILLER_757 VSSD ) ( FILLER_756 VSSD ) ( FILLER_545 VSSD ) + ( FILLER_755 VSSD ) ( FILLER_544 VSSD ) ( FILLER_754 VSSD ) + ( FILLER_543 VSSD ) ( FILLER_542 VSSD ) ( FILLER_753 VSSD ) + ( FILLER_541 VSSD ) ( FILLER_752 VSSD ) ( FILLER_751 VSSD ) + ( FILLER_536 VSSD ) ( FILLER_750 VSSD ) + ( user2_vssa_hvclamp_pad VSSD ) ( FILLER_538 VSSD ) + ( FILLER_539 VSSD ) ( FILLER_537 VSSD ) + ( user1_vdda_hvclamp_pad\[0\] VSSD ) ( FILLER_748 VSSD ) + ( FILLER_747 VSSD ) ( FILLER_746 VSSD ) ( FILLER_535 VSSD ) + ( FILLER_745 VSSD ) ( FILLER_534 VSSD ) ( FILLER_744 VSSD ) + ( FILLER_533 VSSD ) ( FILLER_532 VSSD ) ( FILLER_531 VSSD ) + ( FILLER_743 VSSD ) ( FILLER_741 VSSD ) ( FILLER_742 VSSD ) + ( FILLER_740 VSSD ) ( FILLER_526 VSSD ) ( FILLER_529 VSSD ) + ( mprj_pads.area2_io_pad\[0\] VSSD ) ( FILLER_528 VSSD ) + ( FILLER_527 VSSD ) ( FILLER_522 VSSD ) + ( mprj_pads.area1_io_pad\[12\] VSSD ) ( FILLER_525 VSSD ) + ( FILLER_738 VSSD ) ( FILLER_524 VSSD ) ( FILLER_737 VSSD ) + ( FILLER_523 VSSD ) ( FILLER_736 VSSD ) ( FILLER_735 VSSD ) + ( FILLER_734 VSSD ) ( FILLER_521 VSSD ) ( FILLER_733 VSSD ) + ( FILLER_732 VSSD ) ( FILLER_516 VSSD ) ( FILLER_731 VSSD ) + ( FILLER_519 VSSD ) ( mprj_pads.area2_io_pad\[1\] VSSD ) + ( FILLER_518 VSSD ) ( FILLER_517 VSSD ) + ( mprj_pads.area1_io_pad\[11\] VSSD ) ( FILLER_515 VSSD ) + ( FILLER_729 VSSD ) ( FILLER_728 VSSD ) ( FILLER_514 VSSD ) + ( FILLER_727 VSSD ) ( FILLER_513 VSSD ) ( FILLER_512 VSSD ) + ( FILLER_511 VSSD ) ( FILLER_726 VSSD ) ( FILLER_725 VSSD ) + ( FILLER_722 VSSD ) ( FILLER_724 VSSD ) ( FILLER_723 VSSD ) + ( FILLER_507 VSSD ) ( FILLER_509 VSSD ) + ( mprj_pads.area2_io_pad\[2\] VSSD ) ( FILLER_508 VSSD ) + ( FILLER_718 VSSD ) ( FILLER_506 VSSD ) ( FILLER_505 VSSD ) + ( FILLER_719 VSSD ) ( FILLER_720 VSSD ) + ( mprj_pads.area1_io_pad\[10\] VSSD ) ( FILLER_504 VSSD ) + ( FILLER_503 VSSD ) ( FILLER_501 VSSD ) ( FILLER_717 VSSD ) + ( FILLER_502 VSSD ) ( FILLER_715 VSSD ) ( FILLER_716 VSSD ) + ( FILLER_712 VSSD ) ( FILLER_714 VSSD ) ( FILLER_713 VSSD ) + ( FILLER_497 VSSD ) ( FILLER_499 VSSD ) + ( mprj_pads.area2_io_pad\[3\] VSSD ) ( FILLER_498 VSSD ) + ( FILLER_493 VSSD ) ( FILLER_496 VSSD ) ( FILLER_495 VSSD ) + ( FILLER_494 VSSD ) ( mprj_pads.area1_io_pad\[9\] VSSD ) + ( FILLER_710 VSSD ) ( FILLER_709 VSSD ) ( FILLER_491 VSSD ) + ( FILLER_492 VSSD ) ( FILLER_708 VSSD ) ( FILLER_707 VSSD ) + ( FILLER_703 VSSD ) ( FILLER_706 VSSD ) ( FILLER_705 VSSD ) + ( FILLER_704 VSSD ) ( FILLER_489 VSSD ) + ( mprj_pads.area2_io_pad\[4\] VSSD ) ( FILLER_488 VSSD ) + ( FILLER_487 VSSD ) ( FILLER_483 VSSD ) ( FILLER_486 VSSD ) + ( FILLER_485 VSSD ) ( FILLER_484 VSSD ) ( FILLER_701 VSSD ) + ( mprj_pads.area1_io_pad\[8\] VSSD ) ( FILLER_700 VSSD ) + ( FILLER_699 VSSD ) ( FILLER_482 VSSD ) ( FILLER_481 VSSD ) + ( FILLER_698 VSSD ) ( FILLER_697 VSSD ) ( FILLER_696 VSSD ) + ( FILLER_695 VSSD ) ( FILLER_694 VSSD ) ( FILLER_477 VSSD ) + ( FILLER_478 VSSD ) ( FILLER_479 VSSD ) + ( mprj_pads.area2_io_pad\[5\] VSSD ) ( FILLER_693 VSSD ) + ( FILLER_473 VSSD ) ( FILLER_476 VSSD ) ( FILLER_475 VSSD ) + ( FILLER_474 VSSD ) ( FILLER_471 VSSD ) + ( mprj_pads.area1_io_pad\[7\] VSSD ) ( FILLER_691 VSSD ) + ( FILLER_472 VSSD ) ( FILLER_690 VSSD ) ( FILLER_689 VSSD ) + ( FILLER_468 VSSD ) ( FILLER_688 VSSD ) ( FILLER_687 VSSD ) + ( FILLER_686 VSSD ) ( mprj_pads.area2_io_pad\[6\] VSSD ) + ( FILLER_469 VSSD ) ( FILLER_685 VSSD ) ( FILLER_684 VSSD ) + ( FILLER_467 VSSD ) ( FILLER_464 VSSD ) ( FILLER_466 VSSD ) + ( FILLER_465 VSSD ) ( user1_vdda_hvclamp_pad\[1\] VSSD ) + ( FILLER_463 VSSD ) ( FILLER_682 VSSD ) ( FILLER_681 VSSD ) + ( FILLER_462 VSSD ) ( FILLER_461 VSSD ) ( FILLER_680 VSSD ) + ( FILLER_679 VSSD ) ( FILLER_678 VSSD ) ( FILLER_677 VSSD ) + ( FILLER_457 VSSD ) ( FILLER_458 VSSD ) ( FILLER_459 VSSD ) + ( user2_vdda_hvclamp_pad VSSD ) ( FILLER_676 VSSD ) + ( FILLER_675 VSSD ) ( FILLER_454 VSSD ) ( FILLER_456 VSSD ) + ( FILLER_455 VSSD ) ( FILLER_452 VSSD ) ( FILLER_453 VSSD ) + ( FILLER_673 VSSD ) ( user1_vssd_lvclamp_pad VSSD ) + ( FILLER_672 VSSD ) ( FILLER_451 VSSD ) ( FILLER_668 VSSD ) + ( FILLER_671 VSSD ) ( FILLER_670 VSSD ) ( FILLER_669 VSSD ) + ( FILLER_448 VSSD ) ( FILLER_449 VSSD ) + ( user2_vssd_lvclamp_pad VSSD ) ( FILLER_667 VSSD ) + ( FILLER_665 VSSD ) ( FILLER_447 VSSD ) ( FILLER_666 VSSD ) + ( FILLER_446 VSSD ) ( FILLER_444 VSSD ) ( FILLER_445 VSSD ) + ( user1_vssa_hvclamp_pad\[1\] VSSD ) ( FILLER_443 VSSD ) + ( FILLER_442 VSSD ) ( FILLER_663 VSSD ) ( FILLER_441 VSSD ) + ( FILLER_662 VSSD ) ( FILLER_661 VSSD ) ( FILLER_660 VSSD ) + ( FILLER_659 VSSD ) ( FILLER_438 VSSD ) ( FILLER_439 VSSD ) + ( mprj_pads.area2_io_pad\[7\] VSSD ) ( FILLER_658 VSSD ) + ( FILLER_657 VSSD ) ( FILLER_437 VSSD ) ( FILLER_656 VSSD ) + ( FILLER_436 VSSD ) ( FILLER_434 VSSD ) ( FILLER_435 VSSD ) + ( FILLER_654 VSSD ) ( FILLER_433 VSSD ) ( FILLER_432 VSSD ) + ( mprj_pads.area1_io_pad\[6\] VSSD ) ( FILLER_431 VSSD ) + ( FILLER_650 VSSD ) ( FILLER_653 VSSD ) ( FILLER_652 VSSD ) + ( FILLER_651 VSSD ) ( FILLER_429 VSSD ) + ( mprj_pads.area2_io_pad\[8\] VSSD ) ( FILLER_649 VSSD ) + ( FILLER_646 VSSD ) ( FILLER_428 VSSD ) ( FILLER_427 VSSD ) + ( FILLER_648 VSSD ) ( FILLER_426 VSSD ) ( FILLER_647 VSSD ) + ( FILLER_425 VSSD ) ( FILLER_424 VSSD ) ( FILLER_422 VSSD ) + ( FILLER_423 VSSD ) ( FILLER_421 VSSD ) ( FILLER_641 VSSD ) + ( mprj_pads.area1_io_pad\[5\] VSSD ) ( FILLER_644 VSSD ) + ( FILLER_643 VSSD ) ( FILLER_642 VSSD ) ( FILLER_637 VSSD ) + ( FILLER_419 VSSD ) ( mprj_pads.area2_io_pad\[9\] VSSD ) + ( FILLER_418 VSSD ) ( FILLER_640 VSSD ) ( FILLER_417 VSSD ) + ( FILLER_639 VSSD ) ( FILLER_416 VSSD ) ( FILLER_638 VSSD ) + ( FILLER_415 VSSD ) ( FILLER_414 VSSD ) ( FILLER_412 VSSD ) + ( FILLER_413 VSSD ) ( FILLER_411 VSSD ) + ( mprj_pads.area1_io_pad\[4\] VSSD ) ( FILLER_635 VSSD ) + ( FILLER_634 VSSD ) ( FILLER_633 VSSD ) ( FILLER_632 VSSD ) + ( FILLER_409 VSSD ) ( mprj_pads.area2_io_pad\[10\] VSSD ) + ( FILLER_631 VSSD ) ( FILLER_408 VSSD ) ( FILLER_407 VSSD ) + ( FILLER_630 VSSD ) ( FILLER_406 VSSD ) ( FILLER_405 VSSD ) + ( FILLER_629 VSSD ) ( FILLER_628 VSSD ) ( FILLER_404 VSSD ) + ( FILLER_402 VSSD ) ( FILLER_403 VSSD ) ( FILLER_401 VSSD ) + ( FILLER_624 VSSD ) ( mprj_pads.area1_io_pad\[3\] VSSD ) + ( FILLER_625 VSSD ) ( FILLER_626 VSSD ) ( FILLER_620 VSSD ) + ( FILLER_623 VSSD ) ( FILLER_399 VSSD ) + ( mprj_pads.area2_io_pad\[11\] VSSD ) ( FILLER_398 VSSD ) + ( FILLER_622 VSSD ) ( FILLER_397 VSSD ) ( FILLER_621 VSSD ) + ( FILLER_396 VSSD ) ( FILLER_395 VSSD ) ( FILLER_618 VSSD ) + ( FILLER_619 VSSD ) ( FILLER_394 VSSD ) ( FILLER_392 VSSD ) + ( FILLER_393 VSSD ) ( FILLER_391 VSSD ) ( FILLER_615 VSSD ) + ( FILLER_616 VSSD ) ( mprj_pads.area1_io_pad\[2\] VSSD ) + ( FILLER_385 VSSD ) ( FILLER_614 VSSD ) ( FILLER_388 VSSD ) + ( FILLER_389 VSSD ) ( mprj_pads.area2_io_pad\[12\] VSSD ) + ( FILLER_387 VSSD ) ( FILLER_613 VSSD ) ( FILLER_386 VSSD ) + ( FILLER_612 VSSD ) ( FILLER_611 VSSD ) ( FILLER_384 VSSD ) + ( FILLER_383 VSSD ) ( FILLER_610 VSSD ) ( FILLER_609 VSSD ) + ( FILLER_382 VSSD ) ( FILLER_381 VSSD ) ( FILLER_380 VSSD ) + ( FILLER_379 VSSD ) ( FILLER_606 VSSD ) ( FILLER_607 VSSD ) + ( mprj_pads.area1_io_pad\[1\] VSSD ) ( FILLER_378 VSSD ) + ( FILLER_377 VSSD ) ( FILLER_605 VSSD ) ( FILLER_376 VSSD ) + ( FILLER_604 VSSD ) ( FILLER_375 VSSD ) ( FILLER_603 VSSD ) + ( FILLER_602 VSSD ) ( FILLER_374 VSSD ) ( FILLER_SB1 VSSD ) + ( disconnect_vdda_2 VSSD ) ( FILLER_601 VSSD ) + ( FILLER_600 VSSD ) ( FILLER_367 VSSD ) ( FILLER_599 VSSD ) + ( FILLER_370 VSSD ) ( mgmt_vddio_hvclamp_pad\[0\] VSSD ) + ( FILLER_369 VSSD ) ( FILLER_368 VSSD ) + ( mprj_pads.area1_io_pad\[0\] VSSD ) ( FILLER_597 VSSD ) + ( FILLER_596 VSSD ) ( FILLER_366 VSSD ) ( FILLER_595 VSSD ) + ( FILLER_365 VSSD ) ( FILLER_594 VSSD ) ( FILLER_364 VSSD ) + ( FILLER_363 VSSD ) ( FILLER_593 VSSD ) ( FILLER_362 VSSD ) + ( FILLER_592 VSSD ) ( FILLER_591 VSSD ) ( FILLER_590 VSSD ) + ( FILLER_587 VSSD ) ( FILLER_586 VSSD ) + ( disconnect_vdda_1 VSSD ) ( FILLER_585 VSSD ) + ( FILLER_360 VSSD ) ( mgmt_vccd_lvclamp_pad VSSD ) + ( FILLER_359 VSSD ) ( FILLER_358 VSSD ) ( FILLER_357 VSSD ) + ( FILLER_584 VSSD ) ( FILLER_583 VSSD ) ( FILLER_356 VSSD ) + ( FILLER_582 VSSD ) ( FILLER_581 VSSD ) ( FILLER_355 VSSD ) + ( FILLER_354 VSSD ) ( FILLER_353 VSSD ) ; + - vdda2_pad ( user2_vdda_hvclamp_pad VDDA_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 64465 2422850 ) ( * 2482090 ) ; + - mprj_io[3] ( mprj_pads.area1_io_pad\[3\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 1184000 ) ( * 1245000 ) ; + - mprj_pads.area1_io_pad\[3\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[3\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[3\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[3\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 1178557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 1179240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1179380 ) ( * 1217745 ) + NEW met1 ( 3378000 1217885 ) ( 3378120 * ) + NEW met1 ( 3378060 1218275 ) via_260_860_vh + NEW met2 ( 3377105 1218645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1218570 ) ( 3379365 * ) + NEW met1 ( 3378000 1218665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1218805 ) ( * 1239365 ) + NEW met1 ( 3378000 1239505 ) ( 3378120 * ) + NEW met1 ( 3378060 1239895 ) via_260_860_vh + NEW met2 ( 3377105 1240265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1240190 ) ( 3379365 * ) + NEW met1 ( 3378000 1240285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1240190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1218570 ) ( 3377860 * ) + NEW met2 ( 3378060 1178850 ) via_260_860_vh ( * 1178460 ) + ( 3378120 * ) + NEW met1 ( 3378010 1178395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 1178557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 1178485 ) ( 3379365 * ) ; + - mprj_io_in[3] ( mprj_pads.area1_io_pad\[3\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1181775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[3\]/HLD_H_N + ( mprj_pads.area1_io_pad\[3\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[3\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 1225085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 1225012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 1225110 ) ( 3377640 * ) + NEW met1 ( 3377580 1224720 ) via_260_860_vh + NEW met1 ( 3377520 1224330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1185225 ) ( * 1224190 ) + NEW met1 ( 3377520 1185085 ) ( 3377640 * ) + NEW met1 ( 3377580 1184995 ) via_260_260_vh + NEW met2 ( 3377105 1185065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 1184995 ) ( 3379365 * ) + NEW met2 ( 3377105 1184925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 1184995 ) ( 3377380 * ) + NEW met1 ( 3377520 1184905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1178395 ) ( * 1184765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 1225012.5 ) ( 3377380 * ) ; + - mprj_io_one[3] ( mprj_pads.area1_io_pad\[3\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1187755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[3] ( mprj_pads.area1_io_pad\[3\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1190975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[3\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[3\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[3\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[3\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[10] ( mprj_pads.area1_io_pad\[3\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1200175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[3\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[3\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[3] ( mprj_pads.area1_io_pad\[3\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1206155 ) ( 3379365 * ) ; + - mprj_io_dm[9] ( mprj_pads.area1_io_pad\[3\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1209375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[3] ( mprj_pads.area1_io_pad\[3\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1212595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[3] ( mprj_pads.area1_io_pad\[3\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1215355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[3\]/ENABLE_H + ( mprj_pads.area1_io_pad\[3\] ENABLE_H ) ; + - mprj_io_analog_sel[3] ( mprj_pads.area1_io_pad\[3\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1227775 ) ( 3379365 * ) ; + - mprj_io_dm[11] ( mprj_pads.area1_io_pad\[3\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1230995 ) ( 3379365 * ) ; + - mprj_io_holdover[3] ( mprj_pads.area1_io_pad\[3\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1234215 ) ( 3379365 * ) ; + - mprj_io_out[3] ( mprj_pads.area1_io_pad\[3\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1236975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[3] ( mprj_pads.area1_io_pad\[3\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1246175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[3] + ( mprj_pads.area1_io_pad\[3\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1249395 ) ( 3379365 * ) ; + - mprj_io_oeb[3] ( mprj_pads.area1_io_pad\[3\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1252615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[3] ( mprj_pads.area1_io_pad\[3\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1255375 ) ( 3379365 * ) ; + - gpio_pad/VCCD ( gpio_pad VCCD ) ( FILLER_145 VCCD ) + ( FILLER_146 VCCD ) ( FILLER_147 VCCD ) ( FILLER_144 VCCD ) + ( FILLER_143 VCCD ) ( FILLER_142 VCCD ) ( FILLER_141 VCCD ) + ( FILLER_140 VCCD ) ( FILLER_139 VCCD ) ( FILLER_138 VCCD ) + ( FILLER_137 VCCD ) ( FILLER_136 VCCD ) ( FILLER_135 VCCD ) + ( FILLER_131 VCCD ) ( FILLER_132 VCCD ) ( FILLER_133 VCCD ) + ( user1_analog_pad\[0\] VCCD ) ( FILLER_127 VCCD ) + ( FILLER_130 VCCD ) ( FILLER_129 VCCD ) ( FILLER_128 VCCD ) + ( FILLER_124 VCCD ) ( FILLER_126 VCCD ) ( FILLER_125 VCCD ) + ( FILLER_123 VCCD ) ( FILLER_116 VCCD ) + ( user1_vssa_hvclamp_pad\[0\] VCCD ) ( FILLER_119 VCCD ) + ( FILLER_120 VCCD ) ( FILLER_121 VCCD ) ( FILLER_118 VCCD ) + ( FILLER_117 VCCD ) ( FILLER_113 VCCD ) ( FILLER_115 VCCD ) + ( FILLER_114 VCCD ) ( FILLER_110 VCCD ) ( FILLER_112 VCCD ) + ( FILLER_111 VCCD ) ( FILLER_107 VCCD ) + ( user1_analog_pad\[1\] VCCD ) ( FILLER_108 VCCD ) + ( FILLER_103 VCCD ) ( FILLER_106 VCCD ) ( FILLER_105 VCCD ) + ( FILLER_104 VCCD ) ( FILLER_100 VCCD ) ( FILLER_102 VCCD ) + ( FILLER_101 VCCD ) ( FILLER_98 VCCD ) ( FILLER_99 VCCD ) + ( FILLER_91 VCCD ) ( FILLER_95 VCCD ) ( FILLER_96 VCCD ) + ( user1_analog_pad\[2\] VCCD ) ( FILLER_93 VCCD ) + ( FILLER_94 VCCD ) ( FILLER_92 VCCD ) ( FILLER_90 VCCD ) + ( FILLER_89 VCCD ) ( FILLER_88 VCCD ) ( FILLER_87 VCCD ) + ( FILLER_86 VCCD ) ( FILLER_85 VCCD ) ( FILLER_84 VCCD ) + ( FILLER_83 VCCD ) ( FILLER_82 VCCD ) ( FILLER_81 VCCD ) + ( FILLER_80 VCCD ) ( FILLER_79 VCCD ) + ( sky130_ef_io__com_bus_slice_10um_0 VCCD ) ( FILLER_78 VCCD ) + ( sky130_ef_io__com_bus_slice_5um_1 VCCD ) + ( user1_analog_pad_with_clamp VCCD ) ( FILLER_SB3 VCCD ) + ( sky130_ef_io__com_bus_slice_5um_0 VCCD ) ( FILLER_71 VCCD ) + ( disconnect_vdda_0 VCCD ) ( FILLER_73 VCCD ) + ( FILLER_72 VCCD ) ( FILLER_68 VCCD ) ( FILLER_70 VCCD ) + ( FILLER_69 VCCD ) ( FILLER_64 VCCD ) + ( mgmt_vssio_hvclamp_pad\[1\] VCCD ) ( FILLER_66 VCCD ) + ( FILLER_65 VCCD ) ( FILLER_60 VCCD ) ( FILLER_63 VCCD ) + ( FILLER_62 VCCD ) ( FILLER_61 VCCD ) + ( sky130_ef_io__com_bus_slice_5um_3 VCCD ) + ( sky130_ef_io__com_bus_slice_10um_1 VCCD ) + ( user2_analog_pad_with_clamp\[0\] VCCD ) + ( sky130_ef_io__com_bus_slice_5um_2 VCCD ) ( FILLER_57 VCCD ) + ( FILLER_56 VCCD ) ( FILLER_55 VCCD ) ( FILLER_54 VCCD ) + ( FILLER_53 VCCD ) ( FILLER_52 VCCD ) ( FILLER_51 VCCD ) + ( FILLER_50 VCCD ) ( FILLER_49 VCCD ) + ( user2_analog_pad_with_clamp\[1\] VCCD ) ( FILLER_47 VCCD ) + ( FILLER_46 VCCD ) ( FILLER_45 VCCD ) ( FILLER_44 VCCD ) + ( FILLER_43 VCCD ) ( FILLER_42 VCCD ) + ( user2_analog_pad\[0\] VCCD ) ( FILLER_41 VCCD ) + ( FILLER_39 VCCD ) ( FILLER_38 VCCD ) ( FILLER_37 VCCD ) + ( FILLER_36 VCCD ) ( FILLER_33 VCCD ) ( FILLER_35 VCCD ) + ( FILLER_34 VCCD ) ( FILLER_29 VCCD ) ( FILLER_32 VCCD ) + ( FILLER_31 VCCD ) ( FILLER_30 VCCD ) ( FILLER_26 VCCD ) + ( FILLER_27 VCCD ) ( user2_analog_pad\[1\] VCCD ) + ( FILLER_25 VCCD ) ( FILLER_24 VCCD ) ( FILLER_23 VCCD ) + ( FILLER_22 VCCD ) ( FILLER_21 VCCD ) ( FILLER_20 VCCD ) + ( FILLER_19 VCCD ) ( FILLER_18 VCCD ) ( FILLER_17 VCCD ) + ( FILLER_13 VCCD ) ( user2_analog_pad\[2\] VCCD ) + ( FILLER_14 VCCD ) ( FILLER_15 VCCD ) ( FILLER_10 VCCD ) + ( FILLER_12 VCCD ) ( FILLER_11 VCCD ) ( FILLER_6 VCCD ) + ( FILLER_9 VCCD ) ( FILLER_8 VCCD ) ( FILLER_7 VCCD ) + ( FILLER_5 VCCD ) ( FILLER_145 VCCHIB ) ( FILLER_146 VCCHIB ) + ( FILLER_147 VCCHIB ) ( FILLER_144 VCCHIB ) + ( FILLER_143 VCCHIB ) ( FILLER_142 VCCHIB ) + ( FILLER_141 VCCHIB ) ( FILLER_140 VCCHIB ) + ( FILLER_139 VCCHIB ) ( FILLER_138 VCCHIB ) + ( FILLER_137 VCCHIB ) ( FILLER_136 VCCHIB ) + ( FILLER_135 VCCHIB ) ( FILLER_131 VCCHIB ) + ( FILLER_132 VCCHIB ) ( FILLER_133 VCCHIB ) + ( user1_analog_pad\[0\] VCCHIB ) ( FILLER_127 VCCHIB ) + ( FILLER_130 VCCHIB ) ( FILLER_129 VCCHIB ) + ( FILLER_128 VCCHIB ) ( FILLER_124 VCCHIB ) + ( FILLER_126 VCCHIB ) ( FILLER_125 VCCHIB ) + ( FILLER_123 VCCHIB ) ( FILLER_116 VCCHIB ) + ( user1_vssa_hvclamp_pad\[0\] VCCHIB ) ( FILLER_119 VCCHIB ) + ( FILLER_120 VCCHIB ) ( FILLER_121 VCCHIB ) + ( FILLER_118 VCCHIB ) ( FILLER_117 VCCHIB ) + ( FILLER_113 VCCHIB ) ( FILLER_115 VCCHIB ) + ( FILLER_114 VCCHIB ) ( FILLER_110 VCCHIB ) + ( FILLER_112 VCCHIB ) ( FILLER_111 VCCHIB ) + ( FILLER_107 VCCHIB ) ( user1_analog_pad\[1\] VCCHIB ) + ( FILLER_108 VCCHIB ) ( FILLER_103 VCCHIB ) + ( FILLER_106 VCCHIB ) ( FILLER_105 VCCHIB ) + ( FILLER_104 VCCHIB ) ( FILLER_100 VCCHIB ) + ( FILLER_102 VCCHIB ) ( FILLER_101 VCCHIB ) + ( FILLER_98 VCCHIB ) ( FILLER_99 VCCHIB ) ( FILLER_91 VCCHIB ) + ( FILLER_95 VCCHIB ) ( FILLER_96 VCCHIB ) + ( user1_analog_pad\[2\] VCCHIB ) ( FILLER_93 VCCHIB ) + ( FILLER_94 VCCHIB ) ( FILLER_92 VCCHIB ) ( FILLER_90 VCCHIB ) + ( FILLER_89 VCCHIB ) ( FILLER_88 VCCHIB ) ( FILLER_87 VCCHIB ) + ( FILLER_86 VCCHIB ) ( FILLER_85 VCCHIB ) ( FILLER_84 VCCHIB ) + ( FILLER_83 VCCHIB ) ( FILLER_82 VCCHIB ) ( FILLER_81 VCCHIB ) + ( FILLER_80 VCCHIB ) ( FILLER_79 VCCHIB ) + ( sky130_ef_io__com_bus_slice_10um_0 VCCHIB ) + ( FILLER_78 VCCHIB ) + ( sky130_ef_io__com_bus_slice_5um_1 VCCHIB ) + ( user1_analog_pad_with_clamp VCCHIB ) ( FILLER_SB3 VCCHIB ) + ( sky130_ef_io__com_bus_slice_5um_0 VCCHIB ) + ( FILLER_71 VCCHIB ) ( disconnect_vdda_0 VCCHIB ) + ( FILLER_73 VCCHIB ) ( FILLER_72 VCCHIB ) ( FILLER_68 VCCHIB ) + ( FILLER_70 VCCHIB ) ( FILLER_69 VCCHIB ) ( FILLER_64 VCCHIB ) + ( mgmt_vssio_hvclamp_pad\[1\] VCCHIB ) ( FILLER_66 VCCHIB ) + ( FILLER_65 VCCHIB ) ( FILLER_60 VCCHIB ) ( FILLER_63 VCCHIB ) + ( FILLER_62 VCCHIB ) ( FILLER_61 VCCHIB ) + ( sky130_ef_io__com_bus_slice_5um_3 VCCHIB ) + ( sky130_ef_io__com_bus_slice_10um_1 VCCHIB ) + ( user2_analog_pad_with_clamp\[0\] VCCHIB ) + ( sky130_ef_io__com_bus_slice_5um_2 VCCHIB ) + ( FILLER_57 VCCHIB ) ( FILLER_56 VCCHIB ) ( FILLER_55 VCCHIB ) + ( FILLER_54 VCCHIB ) ( FILLER_53 VCCHIB ) ( FILLER_52 VCCHIB ) + ( FILLER_51 VCCHIB ) ( FILLER_50 VCCHIB ) ( FILLER_49 VCCHIB ) + ( user2_analog_pad_with_clamp\[1\] VCCHIB ) + ( FILLER_47 VCCHIB ) ( FILLER_46 VCCHIB ) ( FILLER_45 VCCHIB ) + ( FILLER_44 VCCHIB ) ( FILLER_43 VCCHIB ) ( FILLER_42 VCCHIB ) + ( user2_analog_pad\[0\] VCCHIB ) ( FILLER_41 VCCHIB ) + ( FILLER_39 VCCHIB ) ( FILLER_38 VCCHIB ) ( FILLER_37 VCCHIB ) + ( FILLER_36 VCCHIB ) ( FILLER_33 VCCHIB ) ( FILLER_35 VCCHIB ) + ( FILLER_34 VCCHIB ) ( FILLER_29 VCCHIB ) ( FILLER_32 VCCHIB ) + ( FILLER_31 VCCHIB ) ( FILLER_30 VCCHIB ) ( FILLER_26 VCCHIB ) + ( FILLER_27 VCCHIB ) ( user2_analog_pad\[1\] VCCHIB ) + ( FILLER_25 VCCHIB ) ( FILLER_24 VCCHIB ) ( FILLER_23 VCCHIB ) + ( FILLER_22 VCCHIB ) ( FILLER_21 VCCHIB ) ( FILLER_20 VCCHIB ) + ( FILLER_19 VCCHIB ) ( FILLER_18 VCCHIB ) ( FILLER_17 VCCHIB ) + ( FILLER_13 VCCHIB ) ( user2_analog_pad\[2\] VCCHIB ) + ( FILLER_14 VCCHIB ) ( FILLER_15 VCCHIB ) ( FILLER_10 VCCHIB ) + ( FILLER_12 VCCHIB ) ( FILLER_11 VCCHIB ) ( FILLER_6 VCCHIB ) + ( FILLER_9 VCCHIB ) ( FILLER_8 VCCHIB ) ( FILLER_7 VCCHIB ) + ( FILLER_5 VCCHIB ) ( user2_corner VCCHIB ) + ( user2_corner VCCD ) ( FILLER_578 VCCHIB ) + ( FILLER_579 VCCHIB ) ( user1_corner VCCD ) ( FILLER_578 VCCD ) + ( FILLER_579 VCCD ) ( user1_corner VCCHIB ) ( FILLER_786 VCCD ) + ( FILLER_576 VCCHIB ) ( FILLER_786 VCCHIB ) + ( FILLER_577 VCCHIB ) ( FILLER_577 VCCD ) ( FILLER_576 VCCD ) + ( FILLER_785 VCCD ) ( FILLER_785 VCCHIB ) ( FILLER_571 VCCHIB ) + ( FILLER_575 VCCHIB ) ( FILLER_575 VCCD ) ( FILLER_784 VCCD ) + ( FILLER_784 VCCHIB ) ( FILLER_574 VCCHIB ) ( FILLER_574 VCCD ) + ( FILLER_783 VCCD ) ( FILLER_783 VCCHIB ) ( FILLER_573 VCCHIB ) + ( FILLER_573 VCCD ) ( FILLER_782 VCCD ) ( FILLER_782 VCCHIB ) + ( FILLER_572 VCCHIB ) ( FILLER_572 VCCD ) ( FILLER_781 VCCD ) + ( FILLER_781 VCCHIB ) ( FILLER_571 VCCD ) ( FILLER_780 VCCD ) + ( FILLER_780 VCCHIB ) ( FILLER_779 VCCD ) ( FILLER_570 VCCHIB ) + ( FILLER_570 VCCD ) ( FILLER_779 VCCHIB ) + ( user2_analog_pad\[3\] VCCHIB ) ( FILLER_776 VCCD ) + ( FILLER_776 VCCHIB ) ( FILLER_568 VCCHIB ) + ( user2_analog_pad\[3\] VCCD ) ( FILLER_568 VCCD ) + ( user1_analog_pad\[3\] VCCD ) ( user1_analog_pad\[3\] VCCHIB ) + ( FILLER_567 VCCHIB ) ( FILLER_567 VCCD ) ( FILLER_777 VCCD ) + ( FILLER_777 VCCHIB ) ( FILLER_775 VCCD ) ( FILLER_775 VCCHIB ) + ( FILLER_566 VCCHIB ) ( FILLER_566 VCCD ) ( FILLER_774 VCCD ) + ( FILLER_774 VCCHIB ) ( FILLER_565 VCCHIB ) ( FILLER_565 VCCD ) + ( FILLER_773 VCCD ) ( FILLER_773 VCCHIB ) ( FILLER_564 VCCHIB ) + ( FILLER_564 VCCD ) ( FILLER_772 VCCD ) ( FILLER_772 VCCHIB ) + ( FILLER_563 VCCHIB ) ( FILLER_563 VCCD ) ( FILLER_771 VCCD ) + ( FILLER_771 VCCHIB ) ( FILLER_562 VCCHIB ) ( FILLER_562 VCCD ) + ( FILLER_561 VCCHIB ) ( FILLER_561 VCCD ) ( FILLER_769 VCCD ) + ( FILLER_770 VCCD ) ( FILLER_770 VCCHIB ) ( FILLER_769 VCCHIB ) + ( FILLER_766 VCCD ) ( FILLER_559 VCCHIB ) + ( user2_vccd_lvclamp_pad VCCHIB ) ( FILLER_559 VCCD ) + ( user2_vccd_lvclamp_pad VCCD ) ( FILLER_558 VCCHIB ) + ( FILLER_558 VCCD ) ( FILLER_557 VCCHIB ) ( FILLER_557 VCCD ) + ( FILLER_767 VCCD ) ( user1_vccd_lvclamp_pad VCCD ) + ( FILLER_767 VCCHIB ) ( user1_vccd_lvclamp_pad VCCHIB ) + ( FILLER_766 VCCHIB ) ( FILLER_556 VCCHIB ) ( FILLER_556 VCCD ) + ( FILLER_552 VCCHIB ) ( FILLER_765 VCCD ) ( FILLER_765 VCCHIB ) + ( FILLER_555 VCCHIB ) ( FILLER_555 VCCD ) ( FILLER_764 VCCD ) + ( FILLER_764 VCCHIB ) ( FILLER_554 VCCHIB ) ( FILLER_554 VCCD ) + ( FILLER_763 VCCD ) ( FILLER_763 VCCHIB ) ( FILLER_553 VCCHIB ) + ( FILLER_553 VCCD ) ( FILLER_762 VCCD ) ( FILLER_762 VCCHIB ) + ( FILLER_552 VCCD ) ( FILLER_761 VCCD ) ( FILLER_761 VCCHIB ) + ( FILLER_551 VCCHIB ) ( FILLER_551 VCCD ) ( FILLER_760 VCCD ) + ( FILLER_760 VCCHIB ) ( FILLER_546 VCCHIB ) ( FILLER_759 VCCD ) + ( FILLER_759 VCCHIB ) ( FILLER_549 VCCHIB ) + ( mgmt_vddio_hvclamp_pad\[1\] VCCHIB ) ( FILLER_549 VCCD ) + ( mgmt_vddio_hvclamp_pad\[1\] VCCD ) ( FILLER_548 VCCHIB ) + ( FILLER_548 VCCD ) ( FILLER_547 VCCHIB ) ( FILLER_547 VCCD ) + ( FILLER_546 VCCD ) ( mprj_pads.area1_io_pad\[13\] VCCD ) + ( FILLER_757 VCCD ) ( mprj_pads.area1_io_pad\[13\] VCCHIB ) + ( FILLER_757 VCCHIB ) ( FILLER_756 VCCD ) ( FILLER_545 VCCHIB ) + ( FILLER_545 VCCD ) ( FILLER_756 VCCHIB ) ( FILLER_755 VCCD ) + ( FILLER_544 VCCHIB ) ( FILLER_544 VCCD ) ( FILLER_755 VCCHIB ) + ( FILLER_754 VCCD ) ( FILLER_543 VCCHIB ) ( FILLER_543 VCCD ) + ( FILLER_754 VCCHIB ) ( FILLER_542 VCCHIB ) ( FILLER_542 VCCD ) + ( FILLER_753 VCCD ) ( FILLER_753 VCCHIB ) ( FILLER_541 VCCHIB ) + ( FILLER_541 VCCD ) ( FILLER_752 VCCD ) ( FILLER_752 VCCHIB ) + ( FILLER_751 VCCD ) ( FILLER_751 VCCHIB ) ( FILLER_536 VCCHIB ) + ( FILLER_750 VCCD ) ( FILLER_750 VCCHIB ) + ( user2_vssa_hvclamp_pad VCCHIB ) + ( user2_vssa_hvclamp_pad VCCD ) ( FILLER_538 VCCHIB ) + ( FILLER_539 VCCHIB ) ( FILLER_538 VCCD ) ( FILLER_539 VCCD ) + ( FILLER_537 VCCHIB ) ( FILLER_537 VCCD ) ( FILLER_536 VCCD ) + ( user1_vdda_hvclamp_pad\[0\] VCCD ) ( FILLER_748 VCCD ) + ( user1_vdda_hvclamp_pad\[0\] VCCHIB ) ( FILLER_748 VCCHIB ) + ( FILLER_747 VCCD ) ( FILLER_747 VCCHIB ) ( FILLER_746 VCCD ) + ( FILLER_535 VCCHIB ) ( FILLER_535 VCCD ) ( FILLER_746 VCCHIB ) + ( FILLER_745 VCCD ) ( FILLER_534 VCCHIB ) ( FILLER_534 VCCD ) + ( FILLER_745 VCCHIB ) ( FILLER_744 VCCD ) ( FILLER_533 VCCHIB ) + ( FILLER_533 VCCD ) ( FILLER_744 VCCHIB ) ( FILLER_532 VCCHIB ) + ( FILLER_532 VCCD ) ( FILLER_531 VCCHIB ) ( FILLER_743 VCCD ) + ( FILLER_743 VCCHIB ) ( FILLER_531 VCCD ) ( FILLER_741 VCCD ) + ( FILLER_742 VCCD ) ( FILLER_742 VCCHIB ) ( FILLER_741 VCCHIB ) + ( FILLER_740 VCCD ) ( FILLER_740 VCCHIB ) ( FILLER_526 VCCHIB ) + ( FILLER_529 VCCHIB ) ( mprj_pads.area2_io_pad\[0\] VCCHIB ) + ( FILLER_529 VCCD ) ( mprj_pads.area2_io_pad\[0\] VCCD ) + ( FILLER_528 VCCHIB ) ( FILLER_528 VCCD ) ( FILLER_527 VCCHIB ) + ( FILLER_527 VCCD ) ( FILLER_526 VCCD ) ( FILLER_522 VCCHIB ) + ( mprj_pads.area1_io_pad\[12\] VCCD ) + ( mprj_pads.area1_io_pad\[12\] VCCHIB ) ( FILLER_525 VCCHIB ) + ( FILLER_525 VCCD ) ( FILLER_738 VCCD ) ( FILLER_738 VCCHIB ) + ( FILLER_524 VCCHIB ) ( FILLER_524 VCCD ) ( FILLER_737 VCCD ) + ( FILLER_737 VCCHIB ) ( FILLER_523 VCCHIB ) ( FILLER_523 VCCD ) + ( FILLER_736 VCCD ) ( FILLER_736 VCCHIB ) ( FILLER_522 VCCD ) + ( FILLER_735 VCCD ) ( FILLER_735 VCCHIB ) ( FILLER_734 VCCD ) + ( FILLER_734 VCCHIB ) ( FILLER_521 VCCHIB ) ( FILLER_521 VCCD ) + ( FILLER_733 VCCD ) ( FILLER_733 VCCHIB ) ( FILLER_732 VCCD ) + ( FILLER_732 VCCHIB ) ( FILLER_516 VCCHIB ) ( FILLER_731 VCCD ) + ( FILLER_731 VCCHIB ) ( FILLER_519 VCCHIB ) + ( mprj_pads.area2_io_pad\[1\] VCCHIB ) ( FILLER_519 VCCD ) + ( mprj_pads.area2_io_pad\[1\] VCCD ) ( FILLER_518 VCCHIB ) + ( FILLER_518 VCCD ) ( FILLER_517 VCCHIB ) ( FILLER_517 VCCD ) + ( FILLER_516 VCCD ) ( mprj_pads.area1_io_pad\[11\] VCCD ) + ( FILLER_515 VCCHIB ) ( FILLER_515 VCCD ) + ( mprj_pads.area1_io_pad\[11\] VCCHIB ) ( FILLER_729 VCCD ) + ( FILLER_729 VCCHIB ) ( FILLER_728 VCCD ) ( FILLER_514 VCCHIB ) + ( FILLER_514 VCCD ) ( FILLER_728 VCCHIB ) ( FILLER_727 VCCD ) + ( FILLER_513 VCCHIB ) ( FILLER_513 VCCD ) ( FILLER_727 VCCHIB ) + ( FILLER_512 VCCHIB ) ( FILLER_512 VCCD ) ( FILLER_511 VCCHIB ) + ( FILLER_726 VCCD ) ( FILLER_726 VCCHIB ) ( FILLER_511 VCCD ) + ( FILLER_725 VCCD ) ( FILLER_725 VCCHIB ) ( FILLER_722 VCCD ) + ( FILLER_724 VCCD ) ( FILLER_724 VCCHIB ) ( FILLER_723 VCCD ) + ( FILLER_723 VCCHIB ) ( FILLER_722 VCCHIB ) + ( FILLER_507 VCCHIB ) ( FILLER_509 VCCHIB ) + ( mprj_pads.area2_io_pad\[2\] VCCHIB ) ( FILLER_509 VCCD ) + ( mprj_pads.area2_io_pad\[2\] VCCD ) ( FILLER_508 VCCHIB ) + ( FILLER_508 VCCD ) ( FILLER_507 VCCD ) ( FILLER_718 VCCD ) + ( FILLER_506 VCCHIB ) ( FILLER_506 VCCD ) ( FILLER_505 VCCHIB ) + ( FILLER_505 VCCD ) ( FILLER_719 VCCD ) ( FILLER_720 VCCD ) + ( mprj_pads.area1_io_pad\[10\] VCCD ) ( FILLER_719 VCCHIB ) + ( FILLER_720 VCCHIB ) ( mprj_pads.area1_io_pad\[10\] VCCHIB ) + ( FILLER_504 VCCHIB ) ( FILLER_504 VCCD ) ( FILLER_718 VCCHIB ) + ( FILLER_503 VCCHIB ) ( FILLER_503 VCCD ) ( FILLER_501 VCCHIB ) + ( FILLER_717 VCCD ) ( FILLER_717 VCCHIB ) ( FILLER_502 VCCHIB ) + ( FILLER_502 VCCD ) ( FILLER_501 VCCD ) ( FILLER_715 VCCD ) + ( FILLER_716 VCCD ) ( FILLER_716 VCCHIB ) ( FILLER_715 VCCHIB ) + ( FILLER_712 VCCD ) ( FILLER_714 VCCD ) ( FILLER_714 VCCHIB ) + ( FILLER_713 VCCD ) ( FILLER_713 VCCHIB ) ( FILLER_712 VCCHIB ) + ( FILLER_497 VCCHIB ) ( FILLER_499 VCCHIB ) + ( mprj_pads.area2_io_pad\[3\] VCCHIB ) ( FILLER_499 VCCD ) + ( mprj_pads.area2_io_pad\[3\] VCCD ) ( FILLER_498 VCCHIB ) + ( FILLER_498 VCCD ) ( FILLER_497 VCCD ) ( FILLER_493 VCCHIB ) + ( FILLER_496 VCCHIB ) ( FILLER_496 VCCD ) ( FILLER_495 VCCHIB ) + ( FILLER_495 VCCD ) ( FILLER_494 VCCHIB ) ( FILLER_494 VCCD ) + ( mprj_pads.area1_io_pad\[9\] VCCD ) + ( mprj_pads.area1_io_pad\[9\] VCCHIB ) ( FILLER_710 VCCD ) + ( FILLER_710 VCCHIB ) ( FILLER_493 VCCD ) ( FILLER_709 VCCD ) + ( FILLER_709 VCCHIB ) ( FILLER_491 VCCHIB ) + ( FILLER_492 VCCHIB ) ( FILLER_492 VCCD ) ( FILLER_708 VCCD ) + ( FILLER_708 VCCHIB ) ( FILLER_491 VCCD ) ( FILLER_707 VCCD ) + ( FILLER_707 VCCHIB ) ( FILLER_703 VCCD ) ( FILLER_706 VCCD ) + ( FILLER_706 VCCHIB ) ( FILLER_705 VCCD ) ( FILLER_705 VCCHIB ) + ( FILLER_704 VCCD ) ( FILLER_704 VCCHIB ) ( FILLER_489 VCCHIB ) + ( mprj_pads.area2_io_pad\[4\] VCCHIB ) ( FILLER_489 VCCD ) + ( mprj_pads.area2_io_pad\[4\] VCCD ) ( FILLER_488 VCCHIB ) + ( FILLER_488 VCCD ) ( FILLER_703 VCCHIB ) ( FILLER_487 VCCHIB ) + ( FILLER_487 VCCD ) ( FILLER_483 VCCHIB ) ( FILLER_486 VCCHIB ) + ( FILLER_486 VCCD ) ( FILLER_485 VCCHIB ) ( FILLER_485 VCCD ) + ( FILLER_484 VCCHIB ) ( FILLER_484 VCCD ) ( FILLER_701 VCCD ) + ( mprj_pads.area1_io_pad\[8\] VCCD ) ( FILLER_701 VCCHIB ) + ( mprj_pads.area1_io_pad\[8\] VCCHIB ) ( FILLER_483 VCCD ) + ( FILLER_700 VCCD ) ( FILLER_700 VCCHIB ) ( FILLER_699 VCCD ) + ( FILLER_482 VCCHIB ) ( FILLER_482 VCCD ) ( FILLER_699 VCCHIB ) + ( FILLER_481 VCCHIB ) ( FILLER_481 VCCD ) ( FILLER_698 VCCD ) + ( FILLER_698 VCCHIB ) ( FILLER_697 VCCD ) ( FILLER_697 VCCHIB ) + ( FILLER_696 VCCD ) ( FILLER_696 VCCHIB ) ( FILLER_695 VCCD ) + ( FILLER_695 VCCHIB ) ( FILLER_694 VCCD ) ( FILLER_694 VCCHIB ) + ( FILLER_477 VCCHIB ) ( FILLER_478 VCCHIB ) + ( FILLER_479 VCCHIB ) ( mprj_pads.area2_io_pad\[5\] VCCHIB ) + ( FILLER_478 VCCD ) ( FILLER_479 VCCD ) + ( mprj_pads.area2_io_pad\[5\] VCCD ) ( FILLER_477 VCCD ) + ( FILLER_693 VCCD ) ( FILLER_693 VCCHIB ) ( FILLER_473 VCCHIB ) + ( FILLER_476 VCCHIB ) ( FILLER_476 VCCD ) ( FILLER_475 VCCHIB ) + ( FILLER_475 VCCD ) ( FILLER_474 VCCHIB ) ( FILLER_474 VCCD ) + ( FILLER_473 VCCD ) ( FILLER_471 VCCHIB ) + ( mprj_pads.area1_io_pad\[7\] VCCD ) + ( mprj_pads.area1_io_pad\[7\] VCCHIB ) ( FILLER_691 VCCD ) + ( FILLER_691 VCCHIB ) ( FILLER_472 VCCHIB ) ( FILLER_472 VCCD ) + ( FILLER_690 VCCD ) ( FILLER_690 VCCHIB ) ( FILLER_471 VCCD ) + ( FILLER_689 VCCD ) ( FILLER_689 VCCHIB ) ( FILLER_468 VCCHIB ) + ( FILLER_688 VCCD ) ( FILLER_688 VCCHIB ) ( FILLER_687 VCCD ) + ( FILLER_687 VCCHIB ) ( FILLER_686 VCCD ) ( FILLER_686 VCCHIB ) + ( mprj_pads.area2_io_pad\[6\] VCCHIB ) + ( mprj_pads.area2_io_pad\[6\] VCCD ) ( FILLER_469 VCCHIB ) + ( FILLER_468 VCCD ) ( FILLER_469 VCCD ) ( FILLER_685 VCCD ) + ( FILLER_685 VCCHIB ) ( FILLER_684 VCCD ) ( FILLER_467 VCCHIB ) + ( FILLER_467 VCCD ) ( FILLER_684 VCCHIB ) ( FILLER_464 VCCHIB ) + ( FILLER_466 VCCHIB ) ( FILLER_466 VCCD ) ( FILLER_465 VCCHIB ) + ( FILLER_465 VCCD ) ( FILLER_464 VCCD ) + ( user1_vdda_hvclamp_pad\[1\] VCCD ) ( FILLER_463 VCCHIB ) + ( FILLER_463 VCCD ) ( FILLER_682 VCCD ) + ( user1_vdda_hvclamp_pad\[1\] VCCHIB ) ( FILLER_682 VCCHIB ) + ( FILLER_681 VCCD ) ( FILLER_462 VCCHIB ) ( FILLER_462 VCCD ) + ( FILLER_681 VCCHIB ) ( FILLER_461 VCCHIB ) ( FILLER_461 VCCD ) + ( FILLER_680 VCCD ) ( FILLER_680 VCCHIB ) ( FILLER_679 VCCD ) + ( FILLER_679 VCCHIB ) ( FILLER_678 VCCD ) ( FILLER_678 VCCHIB ) + ( FILLER_677 VCCD ) ( FILLER_677 VCCHIB ) ( FILLER_457 VCCHIB ) + ( FILLER_458 VCCHIB ) ( FILLER_459 VCCHIB ) + ( user2_vdda_hvclamp_pad VCCHIB ) ( FILLER_458 VCCD ) + ( FILLER_459 VCCD ) ( user2_vdda_hvclamp_pad VCCD ) + ( FILLER_457 VCCD ) ( FILLER_676 VCCD ) ( FILLER_676 VCCHIB ) + ( FILLER_675 VCCD ) ( FILLER_675 VCCHIB ) ( FILLER_454 VCCHIB ) + ( FILLER_456 VCCHIB ) ( FILLER_456 VCCD ) ( FILLER_455 VCCHIB ) + ( FILLER_455 VCCD ) ( FILLER_454 VCCD ) ( FILLER_452 VCCHIB ) + ( FILLER_453 VCCHIB ) ( FILLER_453 VCCD ) ( FILLER_673 VCCD ) + ( user1_vssd_lvclamp_pad VCCD ) ( FILLER_673 VCCHIB ) + ( user1_vssd_lvclamp_pad VCCHIB ) ( FILLER_452 VCCD ) + ( FILLER_672 VCCD ) ( FILLER_672 VCCHIB ) ( FILLER_451 VCCHIB ) + ( FILLER_451 VCCD ) ( FILLER_668 VCCD ) ( FILLER_671 VCCD ) + ( FILLER_671 VCCHIB ) ( FILLER_670 VCCD ) ( FILLER_670 VCCHIB ) + ( FILLER_669 VCCD ) ( FILLER_669 VCCHIB ) ( FILLER_668 VCCHIB ) + ( FILLER_448 VCCHIB ) ( FILLER_449 VCCHIB ) + ( user2_vssd_lvclamp_pad VCCHIB ) ( FILLER_449 VCCD ) + ( user2_vssd_lvclamp_pad VCCD ) ( FILLER_667 VCCD ) + ( FILLER_667 VCCHIB ) ( FILLER_448 VCCD ) ( FILLER_665 VCCD ) + ( FILLER_447 VCCHIB ) ( FILLER_447 VCCD ) ( FILLER_666 VCCD ) + ( FILLER_666 VCCHIB ) ( FILLER_446 VCCHIB ) ( FILLER_446 VCCD ) + ( FILLER_665 VCCHIB ) ( FILLER_444 VCCHIB ) + ( FILLER_445 VCCHIB ) ( FILLER_445 VCCD ) ( FILLER_444 VCCD ) + ( user1_vssa_hvclamp_pad\[1\] VCCD ) ( FILLER_443 VCCHIB ) + ( FILLER_443 VCCD ) ( FILLER_442 VCCHIB ) ( FILLER_442 VCCD ) + ( FILLER_663 VCCD ) ( user1_vssa_hvclamp_pad\[1\] VCCHIB ) + ( FILLER_663 VCCHIB ) ( FILLER_441 VCCHIB ) ( FILLER_441 VCCD ) + ( FILLER_662 VCCD ) ( FILLER_662 VCCHIB ) ( FILLER_661 VCCD ) + ( FILLER_661 VCCHIB ) ( FILLER_660 VCCD ) ( FILLER_660 VCCHIB ) + ( FILLER_659 VCCD ) ( FILLER_659 VCCHIB ) ( FILLER_438 VCCHIB ) + ( FILLER_439 VCCHIB ) ( mprj_pads.area2_io_pad\[7\] VCCHIB ) + ( FILLER_438 VCCD ) ( FILLER_439 VCCD ) + ( mprj_pads.area2_io_pad\[7\] VCCD ) ( FILLER_658 VCCD ) + ( FILLER_658 VCCHIB ) ( FILLER_657 VCCD ) ( FILLER_437 VCCHIB ) + ( FILLER_437 VCCD ) ( FILLER_657 VCCHIB ) ( FILLER_656 VCCD ) + ( FILLER_436 VCCHIB ) ( FILLER_436 VCCD ) ( FILLER_656 VCCHIB ) + ( FILLER_434 VCCHIB ) ( FILLER_435 VCCHIB ) ( FILLER_435 VCCD ) + ( FILLER_434 VCCD ) ( FILLER_654 VCCD ) ( FILLER_433 VCCHIB ) + ( FILLER_433 VCCD ) ( FILLER_432 VCCHIB ) ( FILLER_432 VCCD ) + ( mprj_pads.area1_io_pad\[6\] VCCD ) ( FILLER_654 VCCHIB ) + ( mprj_pads.area1_io_pad\[6\] VCCHIB ) ( FILLER_431 VCCHIB ) + ( FILLER_431 VCCD ) ( FILLER_650 VCCD ) ( FILLER_653 VCCD ) + ( FILLER_653 VCCHIB ) ( FILLER_652 VCCD ) ( FILLER_652 VCCHIB ) + ( FILLER_651 VCCD ) ( FILLER_651 VCCHIB ) ( FILLER_650 VCCHIB ) + ( FILLER_429 VCCHIB ) ( mprj_pads.area2_io_pad\[8\] VCCHIB ) + ( mprj_pads.area2_io_pad\[8\] VCCD ) ( FILLER_649 VCCD ) + ( FILLER_649 VCCHIB ) ( FILLER_429 VCCD ) ( FILLER_428 VCCHIB ) + ( FILLER_646 VCCD ) ( FILLER_428 VCCD ) ( FILLER_427 VCCHIB ) + ( FILLER_427 VCCD ) ( FILLER_648 VCCD ) ( FILLER_648 VCCHIB ) + ( FILLER_426 VCCHIB ) ( FILLER_426 VCCD ) ( FILLER_647 VCCD ) + ( FILLER_647 VCCHIB ) ( FILLER_425 VCCHIB ) ( FILLER_425 VCCD ) + ( FILLER_646 VCCHIB ) ( FILLER_424 VCCHIB ) ( FILLER_424 VCCD ) + ( FILLER_422 VCCHIB ) ( FILLER_423 VCCHIB ) ( FILLER_423 VCCD ) + ( FILLER_422 VCCD ) ( FILLER_421 VCCHIB ) ( FILLER_421 VCCD ) + ( FILLER_641 VCCD ) ( mprj_pads.area1_io_pad\[5\] VCCD ) + ( mprj_pads.area1_io_pad\[5\] VCCHIB ) ( FILLER_644 VCCD ) + ( FILLER_644 VCCHIB ) ( FILLER_643 VCCD ) ( FILLER_643 VCCHIB ) + ( FILLER_642 VCCD ) ( FILLER_642 VCCHIB ) ( FILLER_641 VCCHIB ) + ( FILLER_637 VCCD ) ( FILLER_419 VCCHIB ) + ( mprj_pads.area2_io_pad\[9\] VCCHIB ) ( FILLER_419 VCCD ) + ( mprj_pads.area2_io_pad\[9\] VCCD ) ( FILLER_418 VCCHIB ) + ( FILLER_418 VCCD ) ( FILLER_640 VCCD ) ( FILLER_640 VCCHIB ) + ( FILLER_417 VCCHIB ) ( FILLER_417 VCCD ) ( FILLER_639 VCCD ) + ( FILLER_639 VCCHIB ) ( FILLER_416 VCCHIB ) ( FILLER_416 VCCD ) + ( FILLER_638 VCCD ) ( FILLER_638 VCCHIB ) ( FILLER_415 VCCHIB ) + ( FILLER_415 VCCD ) ( FILLER_637 VCCHIB ) ( FILLER_414 VCCHIB ) + ( FILLER_414 VCCD ) ( FILLER_412 VCCHIB ) ( FILLER_413 VCCHIB ) + ( FILLER_413 VCCD ) ( FILLER_412 VCCD ) ( FILLER_411 VCCHIB ) + ( FILLER_411 VCCD ) ( mprj_pads.area1_io_pad\[4\] VCCD ) + ( mprj_pads.area1_io_pad\[4\] VCCHIB ) ( FILLER_635 VCCD ) + ( FILLER_635 VCCHIB ) ( FILLER_634 VCCD ) ( FILLER_634 VCCHIB ) + ( FILLER_633 VCCD ) ( FILLER_633 VCCHIB ) ( FILLER_632 VCCD ) + ( FILLER_409 VCCHIB ) ( mprj_pads.area2_io_pad\[10\] VCCHIB ) + ( FILLER_409 VCCD ) ( mprj_pads.area2_io_pad\[10\] VCCD ) + ( FILLER_632 VCCHIB ) ( FILLER_631 VCCD ) ( FILLER_408 VCCHIB ) + ( FILLER_408 VCCD ) ( FILLER_407 VCCHIB ) ( FILLER_407 VCCD ) + ( FILLER_631 VCCHIB ) ( FILLER_630 VCCD ) ( FILLER_406 VCCHIB ) + ( FILLER_406 VCCD ) ( FILLER_630 VCCHIB ) ( FILLER_405 VCCHIB ) + ( FILLER_405 VCCD ) ( FILLER_629 VCCD ) ( FILLER_629 VCCHIB ) + ( FILLER_628 VCCD ) ( FILLER_404 VCCHIB ) ( FILLER_404 VCCD ) + ( FILLER_628 VCCHIB ) ( FILLER_402 VCCHIB ) + ( FILLER_403 VCCHIB ) ( FILLER_403 VCCD ) ( FILLER_402 VCCD ) + ( FILLER_401 VCCHIB ) ( FILLER_401 VCCD ) ( FILLER_624 VCCD ) + ( mprj_pads.area1_io_pad\[3\] VCCD ) + ( mprj_pads.area1_io_pad\[3\] VCCHIB ) ( FILLER_625 VCCD ) + ( FILLER_626 VCCD ) ( FILLER_625 VCCHIB ) ( FILLER_626 VCCHIB ) + ( FILLER_624 VCCHIB ) ( FILLER_620 VCCD ) ( FILLER_623 VCCD ) + ( FILLER_623 VCCHIB ) ( FILLER_399 VCCHIB ) + ( mprj_pads.area2_io_pad\[11\] VCCHIB ) ( FILLER_399 VCCD ) + ( mprj_pads.area2_io_pad\[11\] VCCD ) ( FILLER_398 VCCHIB ) + ( FILLER_398 VCCD ) ( FILLER_622 VCCD ) ( FILLER_622 VCCHIB ) + ( FILLER_397 VCCHIB ) ( FILLER_397 VCCD ) ( FILLER_621 VCCD ) + ( FILLER_621 VCCHIB ) ( FILLER_396 VCCHIB ) ( FILLER_396 VCCD ) + ( FILLER_620 VCCHIB ) ( FILLER_395 VCCHIB ) ( FILLER_395 VCCD ) + ( FILLER_618 VCCD ) ( FILLER_619 VCCD ) ( FILLER_619 VCCHIB ) + ( FILLER_394 VCCHIB ) ( FILLER_394 VCCD ) ( FILLER_618 VCCHIB ) + ( FILLER_392 VCCHIB ) ( FILLER_393 VCCHIB ) ( FILLER_393 VCCD ) + ( FILLER_392 VCCD ) ( FILLER_391 VCCHIB ) ( FILLER_391 VCCD ) + ( FILLER_615 VCCD ) ( FILLER_616 VCCD ) + ( mprj_pads.area1_io_pad\[2\] VCCD ) ( FILLER_616 VCCHIB ) + ( mprj_pads.area1_io_pad\[2\] VCCHIB ) ( FILLER_615 VCCHIB ) + ( FILLER_385 VCCHIB ) ( FILLER_614 VCCD ) ( FILLER_614 VCCHIB ) + ( FILLER_388 VCCHIB ) ( FILLER_389 VCCHIB ) + ( mprj_pads.area2_io_pad\[12\] VCCHIB ) ( FILLER_388 VCCD ) + ( FILLER_389 VCCD ) ( mprj_pads.area2_io_pad\[12\] VCCD ) + ( FILLER_387 VCCHIB ) ( FILLER_387 VCCD ) ( FILLER_613 VCCD ) + ( FILLER_613 VCCHIB ) ( FILLER_386 VCCHIB ) ( FILLER_386 VCCD ) + ( FILLER_612 VCCD ) ( FILLER_612 VCCHIB ) ( FILLER_385 VCCD ) + ( FILLER_611 VCCD ) ( FILLER_611 VCCHIB ) ( FILLER_384 VCCHIB ) + ( FILLER_384 VCCD ) ( FILLER_383 VCCHIB ) ( FILLER_610 VCCD ) + ( FILLER_610 VCCHIB ) ( FILLER_383 VCCD ) ( FILLER_609 VCCD ) + ( FILLER_609 VCCHIB ) ( FILLER_382 VCCHIB ) ( FILLER_382 VCCD ) + ( FILLER_381 VCCHIB ) ( FILLER_381 VCCD ) ( FILLER_380 VCCHIB ) + ( FILLER_380 VCCD ) ( FILLER_379 VCCHIB ) ( FILLER_379 VCCD ) + ( FILLER_606 VCCD ) ( FILLER_607 VCCD ) + ( mprj_pads.area1_io_pad\[1\] VCCD ) ( FILLER_607 VCCHIB ) + ( mprj_pads.area1_io_pad\[1\] VCCHIB ) ( FILLER_606 VCCHIB ) + ( FILLER_378 VCCHIB ) ( FILLER_378 VCCD ) ( FILLER_377 VCCHIB ) + ( FILLER_605 VCCD ) ( FILLER_605 VCCHIB ) ( FILLER_377 VCCD ) + ( FILLER_376 VCCHIB ) ( FILLER_604 VCCD ) ( FILLER_604 VCCHIB ) + ( FILLER_376 VCCD ) ( FILLER_375 VCCHIB ) ( FILLER_603 VCCD ) + ( FILLER_603 VCCHIB ) ( FILLER_375 VCCD ) ( FILLER_602 VCCD ) + ( FILLER_602 VCCHIB ) ( FILLER_374 VCCHIB ) + ( FILLER_SB2 VCCHIB ) ( FILLER_374 VCCD ) ( FILLER_SB2 VCCD ) + ( disconnect_vdda_2 VCCHIB ) ( disconnect_vdda_2 VCCD ) + ( FILLER_601 VCCD ) ( FILLER_601 VCCHIB ) ( FILLER_600 VCCD ) + ( FILLER_600 VCCHIB ) ( FILLER_367 VCCHIB ) ( FILLER_599 VCCD ) + ( FILLER_599 VCCHIB ) ( FILLER_370 VCCHIB ) + ( mgmt_vddio_hvclamp_pad\[0\] VCCHIB ) ( FILLER_370 VCCD ) + ( mgmt_vddio_hvclamp_pad\[0\] VCCD ) ( FILLER_369 VCCHIB ) + ( FILLER_369 VCCD ) ( FILLER_368 VCCHIB ) ( FILLER_368 VCCD ) + ( FILLER_367 VCCD ) ( mprj_pads.area1_io_pad\[0\] VCCD ) + ( mprj_pads.area1_io_pad\[0\] VCCHIB ) ( FILLER_597 VCCD ) + ( FILLER_597 VCCHIB ) ( FILLER_596 VCCD ) ( FILLER_366 VCCHIB ) + ( FILLER_366 VCCD ) ( FILLER_596 VCCHIB ) ( FILLER_595 VCCD ) + ( FILLER_365 VCCHIB ) ( FILLER_365 VCCD ) ( FILLER_595 VCCHIB ) + ( FILLER_594 VCCD ) ( FILLER_364 VCCHIB ) ( FILLER_364 VCCD ) + ( FILLER_594 VCCHIB ) ( FILLER_363 VCCHIB ) ( FILLER_363 VCCD ) + ( FILLER_593 VCCD ) ( FILLER_593 VCCHIB ) ( FILLER_362 VCCHIB ) + ( FILLER_362 VCCD ) ( FILLER_592 VCCD ) ( FILLER_592 VCCHIB ) + ( FILLER_591 VCCD ) ( FILLER_591 VCCHIB ) ( FILLER_590 VCCD ) + ( FILLER_590 VCCHIB ) ( FILLER_587 VCCD ) ( FILLER_SB1 VCCD ) + ( disconnect_vdda_1 VCCD ) ( FILLER_SB1 VCCHIB ) + ( disconnect_vdda_1 VCCHIB ) ( FILLER_587 VCCHIB ) + ( FILLER_586 VCCD ) ( FILLER_360 VCCHIB ) + ( mgmt_vccd_lvclamp_pad VCCHIB ) ( FILLER_360 VCCD ) + ( mgmt_vccd_lvclamp_pad VCCD ) ( FILLER_359 VCCHIB ) + ( FILLER_359 VCCD ) ( FILLER_358 VCCHIB ) ( FILLER_358 VCCD ) + ( FILLER_586 VCCHIB ) ( FILLER_357 VCCHIB ) ( FILLER_357 VCCD ) + ( FILLER_585 VCCD ) ( FILLER_585 VCCHIB ) ( FILLER_584 VCCD ) + ( FILLER_356 VCCHIB ) ( FILLER_356 VCCD ) ( FILLER_584 VCCHIB ) + ( FILLER_583 VCCD ) ( FILLER_583 VCCHIB ) ( FILLER_582 VCCD ) + ( FILLER_355 VCCHIB ) ( FILLER_355 VCCD ) ( FILLER_582 VCCHIB ) + ( FILLER_581 VCCD ) ( FILLER_354 VCCHIB ) ( FILLER_354 VCCD ) + ( FILLER_581 VCCHIB ) ( FILLER_353 VCCHIB ) ( FILLER_353 VCCD ) + ( constant_block_6 vccd ) ( FILLER_352 VCCHIB ) + ( FILLER_352 VCCD ) ( FILLER_580 VCCD ) ( FILLER_580 VCCHIB ) + ( constant_block_5 vccd ) ( constant_block_4 vccd ) + ( constant_block_3 vccd ) ( constant_block_2 vccd ) + ( constant_block_1 vccd ) ( constant_block_0 vccd ) + ( mgmt_corner\[1\] VCCHIB ) ( FILLER_351 VCCHIB ) + ( FILLER_350 VCCHIB ) ( FILLER_349 VCCHIB ) + ( FILLER_348 VCCHIB ) ( FILLER_347 VCCHIB ) + ( FILLER_346 VCCHIB ) ( FILLER_339 VCCHIB ) + ( FILLER_336 VCCHIB ) ( FILLER_338 VCCHIB ) + ( FILLER_337 VCCHIB ) ( FILLER_335 VCCHIB ) + ( FILLER_331 VCCHIB ) ( FILLER_332 VCCHIB ) + ( FILLER_333 VCCHIB ) ( mgmt_vdda_hvclamp_pad VCCHIB ) + ( FILLER_329 VCCHIB ) ( FILLER_330 VCCHIB ) + ( FILLER_321 VCCHIB ) ( FILLER_322 VCCHIB ) + ( FILLER_318 VCCHIB ) ( FILLER_320 VCCHIB ) + ( FILLER_319 VCCHIB ) ( FILLER_313 VCCHIB ) + ( FILLER_315 VCCHIB ) ( FILLER_316 VCCHIB ) + ( mgmt_vssio_hvclamp_pad\[0\] VCCHIB ) ( FILLER_314 VCCHIB ) + ( FILLER_312 VCCHIB ) ( FILLER_304 VCCHIB ) + ( FILLER_305 VCCHIB ) ( FILLER_301 VCCHIB ) + ( FILLER_303 VCCHIB ) ( FILLER_302 VCCHIB ) + ( FILLER_295 VCCHIB ) ( FILLER_299 VCCHIB ) ( gpio_pad VCCHIB ) + ( FILLER_297 VCCHIB ) ( FILLER_298 VCCHIB ) + ( FILLER_296 VCCHIB ) ( FILLER_287 VCCHIB ) + ( FILLER_288 VCCHIB ) ( FILLER_286 VCCHIB ) + ( FILLER_285 VCCHIB ) ( FILLER_284 VCCHIB ) + ( FILLER_279 VCCHIB ) ( flash_io1_pad VCCHIB ) + ( FILLER_280 VCCHIB ) ( FILLER_281 VCCHIB ) + ( FILLER_282 VCCHIB ) ( FILLER_278 VCCHIB ) + ( FILLER_270 VCCHIB ) ( FILLER_271 VCCHIB ) + ( FILLER_268 VCCHIB ) ( FILLER_269 VCCHIB ) + ( FILLER_267 VCCHIB ) ( FILLER_261 VCCHIB ) + ( FILLER_264 VCCHIB ) ( FILLER_265 VCCHIB ) + ( flash_io0_pad VCCHIB ) ( FILLER_263 VCCHIB ) + ( FILLER_262 VCCHIB ) ( FILLER_253 VCCHIB ) + ( FILLER_254 VCCHIB ) ( FILLER_251 VCCHIB ) + ( FILLER_252 VCCHIB ) ( FILLER_250 VCCHIB ) + ( FILLER_244 VCCHIB ) ( FILLER_247 VCCHIB ) + ( FILLER_248 VCCHIB ) ( flash_clk_pad VCCHIB ) + ( FILLER_246 VCCHIB ) ( FILLER_245 VCCHIB ) + ( FILLER_236 VCCHIB ) ( FILLER_237 VCCHIB ) + ( FILLER_235 VCCHIB ) ( FILLER_234 VCCHIB ) + ( FILLER_233 VCCHIB ) ( FILLER_227 VCCHIB ) + ( FILLER_230 VCCHIB ) ( FILLER_231 VCCHIB ) + ( flash_csb_pad VCCHIB ) ( FILLER_229 VCCHIB ) + ( FILLER_228 VCCHIB ) ( FILLER_220 VCCHIB ) + ( FILLER_216 VCCHIB ) ( FILLER_218 VCCHIB ) + ( FILLER_219 VCCHIB ) ( FILLER_217 VCCHIB ) + ( FILLER_210 VCCHIB ) ( FILLER_214 VCCHIB ) + ( mgmt_vssd_lvclamp_pad VCCHIB ) ( FILLER_212 VCCHIB ) + ( FILLER_213 VCCHIB ) ( FILLER_211 VCCHIB ) + ( FILLER_202 VCCHIB ) ( FILLER_203 VCCHIB ) + ( FILLER_199 VCCHIB ) ( FILLER_201 VCCHIB ) + ( FILLER_200 VCCHIB ) ( FILLER_195 VCCHIB ) + ( clock_pad VCCHIB ) ( FILLER_196 VCCHIB ) + ( FILLER_197 VCCHIB ) ( FILLER_193 VCCHIB ) + ( FILLER_194 VCCHIB ) ( FILLER_185 VCCHIB ) + ( FILLER_186 VCCHIB ) ( FILLER_182 VCCHIB ) + ( FILLER_184 VCCHIB ) ( FILLER_183 VCCHIB ) + ( FILLER_177 VCCHIB ) ( FILLER_179 VCCHIB ) + ( FILLER_180 VCCHIB ) ( resetb_pad VCCHIB ) + ( FILLER_178 VCCHIB ) ( FILLER_176 VCCHIB ) + ( FILLER_169 VCCHIB ) ( FILLER_168 VCCHIB ) + ( FILLER_166 VCCHIB ) ( FILLER_167 VCCHIB ) + ( FILLER_165 VCCHIB ) ( FILLER_160 VCCHIB ) + ( FILLER_163 VCCHIB ) ( mgmt_vssa_hvclamp_pad VCCHIB ) + ( FILLER_161 VCCHIB ) ( FILLER_162 VCCHIB ) + ( FILLER_159 VCCHIB ) ( FILLER_149 VCCHIB ) + ( FILLER_150 VCCHIB ) ( mgmt_corner\[0\] VCCHIB ) + ( FILLER_148 VCCHIB ) ( FILLER_151 VCCHIB ) + ( FILLER_152 VCCHIB ) ( mgmt_corner\[1\] VCCD ) + ( FILLER_351 VCCD ) ( FILLER_350 VCCD ) ( FILLER_349 VCCD ) + ( FILLER_348 VCCD ) ( FILLER_347 VCCD ) ( FILLER_346 VCCD ) + ( bus_tie_72 VCCHIB ) ( bus_tie_72 VCCD ) ( bus_tie_71 VCCHIB ) + ( bus_tie_71 VCCD ) ( bus_tie_70 VCCHIB ) ( bus_tie_70 VCCD ) + ( bus_tie_69 VCCHIB ) ( bus_tie_69 VCCD ) ( bus_tie_68 VCCHIB ) + ( bus_tie_68 VCCD ) ( FILLER_339 VCCD ) ( bus_tie_67 VCCHIB ) + ( bus_tie_67 VCCD ) ( FILLER_336 VCCD ) ( FILLER_338 VCCD ) + ( FILLER_337 VCCD ) ( FILLER_335 VCCD ) ( FILLER_331 VCCD ) + ( FILLER_332 VCCD ) ( FILLER_333 VCCD ) + ( mgmt_vdda_hvclamp_pad VCCD ) ( FILLER_329 VCCD ) + ( FILLER_330 VCCD ) ( bus_tie_65 VCCHIB ) ( bus_tie_66 VCCHIB ) + ( bus_tie_66 VCCD ) ( bus_tie_65 VCCD ) ( FILLER_321 VCCD ) + ( bus_tie_64 VCCHIB ) ( bus_tie_64 VCCD ) ( bus_tie_63 VCCHIB ) + ( bus_tie_63 VCCD ) ( bus_tie_62 VCCHIB ) ( bus_tie_62 VCCD ) + ( FILLER_322 VCCD ) ( bus_tie_61 VCCHIB ) ( bus_tie_61 VCCD ) + ( FILLER_318 VCCD ) ( FILLER_320 VCCD ) ( FILLER_319 VCCD ) + ( FILLER_313 VCCD ) ( FILLER_315 VCCD ) ( FILLER_316 VCCD ) + ( mgmt_vssio_hvclamp_pad\[0\] VCCD ) ( FILLER_314 VCCD ) + ( FILLER_312 VCCD ) ( bus_tie_58 VCCHIB ) ( bus_tie_60 VCCHIB ) + ( bus_tie_60 VCCD ) ( bus_tie_59 VCCHIB ) ( bus_tie_59 VCCD ) + ( bus_tie_58 VCCD ) ( bus_tie_56 VCCHIB ) ( bus_tie_57 VCCHIB ) + ( bus_tie_57 VCCD ) ( bus_tie_56 VCCD ) ( FILLER_301 VCCD ) + ( FILLER_304 VCCD ) ( FILLER_305 VCCD ) ( bus_tie_55 VCCHIB ) + ( bus_tie_55 VCCD ) ( FILLER_303 VCCD ) ( FILLER_302 VCCD ) + ( FILLER_295 VCCD ) ( FILLER_299 VCCD ) ( clock_pad VCCD ) + ( FILLER_297 VCCD ) ( FILLER_298 VCCD ) ( FILLER_296 VCCD ) + ( bus_tie_54 VCCHIB ) ( bus_tie_54 VCCD ) ( bus_tie_53 VCCHIB ) + ( bus_tie_53 VCCD ) ( bus_tie_52 VCCHIB ) ( bus_tie_52 VCCD ) + ( bus_tie_51 VCCHIB ) ( bus_tie_51 VCCD ) ( bus_tie_50 VCCHIB ) + ( bus_tie_50 VCCD ) ( FILLER_286 VCCD ) ( FILLER_287 VCCD ) + ( FILLER_288 VCCD ) ( bus_tie_49 VCCHIB ) ( bus_tie_49 VCCD ) + ( FILLER_285 VCCD ) ( FILLER_284 VCCD ) ( FILLER_279 VCCD ) + ( flash_io1_pad VCCD ) ( FILLER_280 VCCD ) ( FILLER_281 VCCD ) + ( FILLER_282 VCCD ) ( FILLER_278 VCCD ) ( bus_tie_46 VCCHIB ) + ( bus_tie_48 VCCHIB ) ( bus_tie_48 VCCD ) ( bus_tie_47 VCCHIB ) + ( bus_tie_47 VCCD ) ( bus_tie_46 VCCD ) ( FILLER_268 VCCD ) + ( bus_tie_45 VCCHIB ) ( bus_tie_45 VCCD ) ( bus_tie_44 VCCHIB ) + ( bus_tie_44 VCCD ) ( FILLER_270 VCCD ) ( FILLER_271 VCCD ) + ( bus_tie_43 VCCHIB ) ( bus_tie_43 VCCD ) ( FILLER_269 VCCD ) + ( FILLER_267 VCCD ) ( FILLER_261 VCCD ) ( FILLER_264 VCCD ) + ( FILLER_265 VCCD ) ( flash_io0_pad VCCD ) ( FILLER_263 VCCD ) + ( FILLER_262 VCCD ) ( bus_tie_39 VCCHIB ) ( bus_tie_42 VCCHIB ) + ( bus_tie_42 VCCD ) ( bus_tie_41 VCCHIB ) ( bus_tie_41 VCCD ) + ( bus_tie_40 VCCHIB ) ( bus_tie_40 VCCD ) ( bus_tie_39 VCCD ) + ( FILLER_251 VCCD ) ( bus_tie_38 VCCHIB ) ( bus_tie_38 VCCD ) + ( FILLER_253 VCCD ) ( FILLER_254 VCCD ) ( bus_tie_37 VCCHIB ) + ( bus_tie_37 VCCD ) ( FILLER_252 VCCD ) ( FILLER_250 VCCD ) + ( FILLER_244 VCCD ) ( FILLER_247 VCCD ) ( FILLER_248 VCCD ) + ( flash_clk_pad VCCD ) ( FILLER_246 VCCD ) ( FILLER_245 VCCD ) + ( bus_tie_36 VCCHIB ) ( bus_tie_36 VCCD ) ( bus_tie_35 VCCHIB ) + ( bus_tie_35 VCCD ) ( bus_tie_34 VCCHIB ) ( bus_tie_34 VCCD ) + ( bus_tie_33 VCCHIB ) ( bus_tie_33 VCCD ) ( bus_tie_32 VCCHIB ) + ( bus_tie_32 VCCD ) ( FILLER_235 VCCD ) ( FILLER_236 VCCD ) + ( FILLER_237 VCCD ) ( bus_tie_31 VCCHIB ) ( bus_tie_31 VCCD ) + ( FILLER_234 VCCD ) ( FILLER_233 VCCD ) ( FILLER_227 VCCD ) + ( FILLER_230 VCCD ) ( FILLER_231 VCCD ) ( flash_csb_pad VCCD ) + ( FILLER_229 VCCD ) ( FILLER_228 VCCD ) ( bus_tie_27 VCCHIB ) + ( bus_tie_30 VCCHIB ) ( bus_tie_30 VCCD ) ( bus_tie_29 VCCHIB ) + ( bus_tie_29 VCCD ) ( bus_tie_28 VCCHIB ) ( bus_tie_28 VCCD ) + ( bus_tie_27 VCCD ) ( FILLER_216 VCCD ) ( bus_tie_26 VCCHIB ) + ( bus_tie_26 VCCD ) ( FILLER_220 VCCD ) ( bus_tie_25 VCCHIB ) + ( bus_tie_25 VCCD ) ( FILLER_218 VCCD ) ( FILLER_219 VCCD ) + ( FILLER_217 VCCD ) ( FILLER_210 VCCD ) ( FILLER_214 VCCD ) + ( mgmt_vssd_lvclamp_pad VCCD ) ( FILLER_212 VCCD ) + ( FILLER_213 VCCD ) ( FILLER_211 VCCD ) ( bus_tie_24 VCCHIB ) + ( bus_tie_24 VCCD ) ( bus_tie_20 VCCHIB ) ( bus_tie_23 VCCHIB ) + ( bus_tie_23 VCCD ) ( bus_tie_22 VCCHIB ) ( bus_tie_22 VCCD ) + ( bus_tie_21 VCCHIB ) ( bus_tie_21 VCCD ) ( bus_tie_20 VCCD ) + ( FILLER_199 VCCD ) ( FILLER_202 VCCD ) ( FILLER_203 VCCD ) + ( bus_tie_19 VCCHIB ) ( bus_tie_19 VCCD ) ( FILLER_201 VCCD ) + ( FILLER_200 VCCD ) ( FILLER_195 VCCD ) ( bus_tie_9 VCCD ) + ( FILLER_196 VCCD ) ( FILLER_197 VCCD ) ( FILLER_193 VCCD ) + ( FILLER_194 VCCD ) ( bus_tie_17 VCCHIB ) ( bus_tie_18 VCCHIB ) + ( bus_tie_18 VCCD ) ( bus_tie_17 VCCD ) ( bus_tie_14 VCCHIB ) + ( bus_tie_16 VCCHIB ) ( bus_tie_16 VCCD ) ( bus_tie_15 VCCHIB ) + ( bus_tie_15 VCCD ) ( bus_tie_14 VCCD ) ( FILLER_182 VCCD ) + ( FILLER_185 VCCD ) ( FILLER_186 VCCD ) ( bus_tie_13 VCCHIB ) + ( bus_tie_13 VCCD ) ( FILLER_184 VCCD ) ( FILLER_183 VCCD ) + ( FILLER_177 VCCD ) ( FILLER_179 VCCD ) ( FILLER_180 VCCD ) + ( resetb_pad VCCD ) ( FILLER_178 VCCD ) ( FILLER_176 VCCD ) + ( bus_tie_12 VCCHIB ) ( bus_tie_12 VCCD ) ( bus_tie_11 VCCHIB ) + ( bus_tie_11 VCCD ) ( bus_tie_10 VCCHIB ) ( bus_tie_10 VCCD ) + ( bus_tie_9 VCCHIB ) ( bus_tie_8 VCCD ) ( bus_tie_8 VCCHIB ) + ( bus_tie_7 VCCD ) ( FILLER_168 VCCD ) ( FILLER_169 VCCD ) + ( bus_tie_7 VCCHIB ) ( bus_tie_6 VCCD ) ( FILLER_166 VCCD ) + ( FILLER_167 VCCD ) ( FILLER_165 VCCD ) ( FILLER_160 VCCD ) + ( FILLER_163 VCCD ) ( mgmt_vssa_hvclamp_pad VCCD ) + ( FILLER_161 VCCD ) ( FILLER_162 VCCD ) ( FILLER_159 VCCD ) + ( bus_tie_4 VCCHIB ) ( bus_tie_6 VCCHIB ) ( bus_tie_5 VCCD ) + ( bus_tie_5 VCCHIB ) ( bus_tie_4 VCCD ) ( bus_tie_3 VCCD ) + ( FILLER_149 VCCD ) ( bus_tie_3 VCCHIB ) ( bus_tie_2 VCCD ) + ( bus_tie_2 VCCHIB ) ( bus_tie_1 VCCD ) ( FILLER_150 VCCD ) + ( mgmt_corner\[0\] VCCD ) ( FILLER_148 VCCD ) + ( FILLER_151 VCCD ) ( FILLER_152 VCCD ) ( bus_tie_1 VCCHIB ) ; + - vdda2 ( FILLER_71 VDDA ) ( FILLER_73 VDDA ) ( FILLER_72 VDDA ) + ( FILLER_68 VDDA ) ( FILLER_70 VDDA ) ( FILLER_69 VDDA ) + ( FILLER_64 VDDA ) ( mgmt_vssio_hvclamp_pad\[1\] VDDA ) + ( FILLER_66 VDDA ) ( FILLER_65 VDDA ) ( FILLER_60 VDDA ) + ( FILLER_63 VDDA ) ( FILLER_62 VDDA ) ( FILLER_61 VDDA ) + ( sky130_ef_io__com_bus_slice_5um_3 VDDA ) + ( sky130_ef_io__com_bus_slice_10um_1 VDDA ) + ( user2_analog_pad_with_clamp\[0\] VDDA ) + ( sky130_ef_io__com_bus_slice_5um_2 VDDA ) ( FILLER_57 VDDA ) + ( FILLER_56 VDDA ) ( FILLER_55 VDDA ) ( FILLER_54 VDDA ) + ( FILLER_53 VDDA ) ( FILLER_52 VDDA ) ( FILLER_51 VDDA ) + ( FILLER_50 VDDA ) ( FILLER_49 VDDA ) + ( user2_analog_pad_with_clamp\[1\] VDDA ) ( FILLER_47 VDDA ) + ( FILLER_46 VDDA ) ( FILLER_45 VDDA ) ( FILLER_44 VDDA ) + ( FILLER_43 VDDA ) ( FILLER_42 VDDA ) + ( user2_analog_pad\[0\] VDDA ) ( FILLER_41 VDDA ) + ( FILLER_39 VDDA ) ( FILLER_38 VDDA ) ( FILLER_37 VDDA ) + ( FILLER_36 VDDA ) ( FILLER_33 VDDA ) ( FILLER_35 VDDA ) + ( FILLER_34 VDDA ) ( FILLER_29 VDDA ) ( FILLER_32 VDDA ) + ( FILLER_31 VDDA ) ( FILLER_30 VDDA ) ( FILLER_26 VDDA ) + ( FILLER_27 VDDA ) ( user2_analog_pad\[1\] VDDA ) + ( FILLER_25 VDDA ) ( FILLER_24 VDDA ) ( FILLER_23 VDDA ) + ( FILLER_22 VDDA ) ( FILLER_21 VDDA ) ( FILLER_20 VDDA ) + ( FILLER_19 VDDA ) ( FILLER_18 VDDA ) ( FILLER_17 VDDA ) + ( FILLER_13 VDDA ) ( user2_analog_pad\[2\] VDDA ) + ( FILLER_14 VDDA ) ( FILLER_15 VDDA ) ( FILLER_10 VDDA ) + ( FILLER_12 VDDA ) ( FILLER_11 VDDA ) ( FILLER_6 VDDA ) + ( FILLER_9 VDDA ) ( FILLER_8 VDDA ) ( FILLER_7 VDDA ) + ( FILLER_5 VDDA ) ( user2_corner VDDA ) ( FILLER_576 VDDA ) + ( FILLER_578 VDDA ) ( FILLER_579 VDDA ) ( FILLER_577 VDDA ) + ( FILLER_571 VDDA ) ( FILLER_575 VDDA ) ( FILLER_574 VDDA ) + ( FILLER_573 VDDA ) ( FILLER_572 VDDA ) + ( user2_analog_pad\[3\] VDDA ) ( FILLER_570 VDDA ) + ( FILLER_568 VDDA ) ( FILLER_567 VDDA ) ( FILLER_566 VDDA ) + ( FILLER_565 VDDA ) ( FILLER_564 VDDA ) ( FILLER_563 VDDA ) + ( FILLER_562 VDDA ) ( FILLER_561 VDDA ) ( FILLER_556 VDDA ) + ( FILLER_559 VDDA ) ( user2_vccd_lvclamp_pad VDDA ) + ( FILLER_558 VDDA ) ( FILLER_557 VDDA ) ( FILLER_552 VDDA ) + ( FILLER_555 VDDA ) ( FILLER_554 VDDA ) ( FILLER_553 VDDA ) + ( FILLER_551 VDDA ) ( FILLER_546 VDDA ) ( FILLER_549 VDDA ) + ( mgmt_vddio_hvclamp_pad\[1\] VDDA ) ( FILLER_548 VDDA ) + ( FILLER_547 VDDA ) ( FILLER_542 VDDA ) ( FILLER_545 VDDA ) + ( FILLER_544 VDDA ) ( FILLER_543 VDDA ) ( FILLER_541 VDDA ) + ( FILLER_536 VDDA ) ( user2_vssa_hvclamp_pad VDDA ) + ( FILLER_538 VDDA ) ( FILLER_539 VDDA ) ( FILLER_537 VDDA ) + ( FILLER_532 VDDA ) ( FILLER_535 VDDA ) ( FILLER_534 VDDA ) + ( FILLER_533 VDDA ) ( FILLER_531 VDDA ) ( FILLER_526 VDDA ) + ( FILLER_529 VDDA ) ( mprj_pads.area2_io_pad\[0\] VDDA ) + ( FILLER_528 VDDA ) ( FILLER_527 VDDA ) ( FILLER_522 VDDA ) + ( FILLER_525 VDDA ) ( FILLER_524 VDDA ) ( FILLER_523 VDDA ) + ( FILLER_521 VDDA ) ( FILLER_516 VDDA ) ( FILLER_519 VDDA ) + ( mprj_pads.area2_io_pad\[1\] VDDA ) ( FILLER_518 VDDA ) + ( FILLER_517 VDDA ) ( FILLER_512 VDDA ) ( FILLER_515 VDDA ) + ( FILLER_514 VDDA ) ( FILLER_513 VDDA ) ( FILLER_511 VDDA ) + ( FILLER_507 VDDA ) ( FILLER_509 VDDA ) + ( mprj_pads.area2_io_pad\[2\] VDDA ) ( FILLER_508 VDDA ) + ( FILLER_503 VDDA ) ( FILLER_506 VDDA ) ( FILLER_505 VDDA ) + ( FILLER_504 VDDA ) ( FILLER_501 VDDA ) ( FILLER_502 VDDA ) + ( FILLER_497 VDDA ) ( FILLER_499 VDDA ) + ( mprj_pads.area2_io_pad\[3\] VDDA ) ( FILLER_498 VDDA ) + ( FILLER_493 VDDA ) ( FILLER_496 VDDA ) ( FILLER_495 VDDA ) + ( FILLER_494 VDDA ) ( FILLER_491 VDDA ) ( FILLER_492 VDDA ) + ( FILLER_487 VDDA ) ( FILLER_489 VDDA ) + ( mprj_pads.area2_io_pad\[4\] VDDA ) ( FILLER_488 VDDA ) + ( FILLER_483 VDDA ) ( FILLER_486 VDDA ) ( FILLER_485 VDDA ) + ( FILLER_484 VDDA ) ( FILLER_481 VDDA ) ( FILLER_482 VDDA ) + ( FILLER_477 VDDA ) ( FILLER_478 VDDA ) ( FILLER_479 VDDA ) + ( mprj_pads.area2_io_pad\[5\] VDDA ) ( FILLER_473 VDDA ) + ( FILLER_476 VDDA ) ( FILLER_475 VDDA ) ( FILLER_474 VDDA ) + ( FILLER_471 VDDA ) ( FILLER_472 VDDA ) ( FILLER_468 VDDA ) + ( mprj_pads.area2_io_pad\[6\] VDDA ) ( FILLER_469 VDDA ) + ( FILLER_464 VDDA ) ( FILLER_467 VDDA ) ( FILLER_466 VDDA ) + ( FILLER_465 VDDA ) ( FILLER_461 VDDA ) ( FILLER_463 VDDA ) + ( FILLER_462 VDDA ) ( FILLER_457 VDDA ) ( FILLER_458 VDDA ) + ( FILLER_459 VDDA ) ( user2_vdda_hvclamp_pad VDDA ) + ( FILLER_454 VDDA ) ( FILLER_456 VDDA ) ( FILLER_455 VDDA ) + ( FILLER_452 VDDA ) ( FILLER_453 VDDA ) ( FILLER_451 VDDA ) + ( FILLER_448 VDDA ) ( FILLER_SB2 VDDA ) ( FILLER_449 VDDA ) + ( user2_vssd_lvclamp_pad VDDA ) ( FILLER_444 VDDA ) + ( FILLER_447 VDDA ) ( FILLER_446 VDDA ) ( FILLER_445 VDDA ) + ( FILLER_441 VDDA ) ( FILLER_443 VDDA ) ( FILLER_442 VDDA ) + ( FILLER_438 VDDA ) ( FILLER_439 VDDA ) + ( mprj_pads.area2_io_pad\[7\] VDDA ) ( FILLER_434 VDDA ) + ( FILLER_437 VDDA ) ( FILLER_436 VDDA ) ( FILLER_435 VDDA ) + ( FILLER_431 VDDA ) ( FILLER_433 VDDA ) ( FILLER_432 VDDA ) + ( FILLER_429 VDDA ) ( mprj_pads.area2_io_pad\[8\] VDDA ) + ( FILLER_424 VDDA ) ( FILLER_428 VDDA ) ( FILLER_427 VDDA ) + ( FILLER_426 VDDA ) ( FILLER_425 VDDA ) ( FILLER_422 VDDA ) + ( FILLER_423 VDDA ) ( FILLER_421 VDDA ) ( FILLER_414 VDDA ) + ( FILLER_419 VDDA ) ( mprj_pads.area2_io_pad\[9\] VDDA ) + ( FILLER_418 VDDA ) ( FILLER_417 VDDA ) ( FILLER_416 VDDA ) + ( FILLER_415 VDDA ) ( FILLER_412 VDDA ) ( FILLER_413 VDDA ) + ( FILLER_411 VDDA ) ( FILLER_405 VDDA ) ( FILLER_409 VDDA ) + ( mprj_pads.area2_io_pad\[10\] VDDA ) ( FILLER_408 VDDA ) + ( FILLER_407 VDDA ) ( FILLER_406 VDDA ) ( FILLER_402 VDDA ) + ( FILLER_404 VDDA ) ( FILLER_403 VDDA ) ( FILLER_401 VDDA ) + ( FILLER_395 VDDA ) ( FILLER_399 VDDA ) + ( mprj_pads.area2_io_pad\[11\] VDDA ) ( FILLER_398 VDDA ) + ( FILLER_397 VDDA ) ( FILLER_396 VDDA ) ( FILLER_392 VDDA ) + ( FILLER_394 VDDA ) ( FILLER_393 VDDA ) ( FILLER_391 VDDA ) + ( FILLER_385 VDDA ) ( FILLER_388 VDDA ) ( FILLER_389 VDDA ) + ( mprj_pads.area2_io_pad\[12\] VDDA ) ( FILLER_387 VDDA ) + ( FILLER_386 VDDA ) ( FILLER_384 VDDA ) ( FILLER_383 VDDA ) + ( FILLER_382 VDDA ) ( FILLER_381 VDDA ) ( FILLER_380 VDDA ) + ( FILLER_379 VDDA ) ( FILLER_378 VDDA ) ( FILLER_377 VDDA ) + ( FILLER_376 VDDA ) ( FILLER_375 VDDA ) ( FILLER_374 VDDA ) + + ROUTED met4 TAPERRULE met4_width_960 ( 181765 2278515 ) ( 184915 * ) ; + - vssa2 ( FILLER_71 VSSA ) ( FILLER_73 VSSA ) ( FILLER_72 VSSA ) + ( FILLER_68 VSSA ) ( FILLER_70 VSSA ) ( FILLER_69 VSSA ) + ( FILLER_64 VSSA ) ( mgmt_vssio_hvclamp_pad\[1\] VSSA ) + ( FILLER_66 VSSA ) ( FILLER_65 VSSA ) ( FILLER_60 VSSA ) + ( FILLER_63 VSSA ) ( FILLER_62 VSSA ) ( FILLER_61 VSSA ) + ( sky130_ef_io__com_bus_slice_5um_3 VSSA ) + ( sky130_ef_io__com_bus_slice_10um_1 VSSA ) + ( user2_analog_pad_with_clamp\[0\] VSSA ) + ( sky130_ef_io__com_bus_slice_5um_2 VSSA ) ( FILLER_57 VSSA ) + ( FILLER_56 VSSA ) ( FILLER_55 VSSA ) ( FILLER_54 VSSA ) + ( FILLER_53 VSSA ) ( FILLER_52 VSSA ) ( FILLER_51 VSSA ) + ( FILLER_50 VSSA ) ( FILLER_49 VSSA ) + ( user2_analog_pad_with_clamp\[1\] VSSA ) ( FILLER_47 VSSA ) + ( FILLER_46 VSSA ) ( FILLER_45 VSSA ) ( FILLER_44 VSSA ) + ( FILLER_43 VSSA ) ( FILLER_42 VSSA ) + ( user2_analog_pad\[0\] VSSA ) ( FILLER_41 VSSA ) + ( FILLER_39 VSSA ) ( FILLER_38 VSSA ) ( FILLER_37 VSSA ) + ( FILLER_36 VSSA ) ( FILLER_33 VSSA ) ( FILLER_35 VSSA ) + ( FILLER_34 VSSA ) ( FILLER_29 VSSA ) ( FILLER_32 VSSA ) + ( FILLER_31 VSSA ) ( FILLER_30 VSSA ) ( FILLER_26 VSSA ) + ( FILLER_27 VSSA ) ( user2_analog_pad\[1\] VSSA ) + ( FILLER_25 VSSA ) ( FILLER_24 VSSA ) ( FILLER_23 VSSA ) + ( FILLER_22 VSSA ) ( FILLER_21 VSSA ) ( FILLER_20 VSSA ) + ( FILLER_19 VSSA ) ( FILLER_18 VSSA ) ( FILLER_17 VSSA ) + ( FILLER_13 VSSA ) ( user2_analog_pad\[2\] VSSA ) + ( FILLER_14 VSSA ) ( FILLER_15 VSSA ) ( FILLER_10 VSSA ) + ( FILLER_12 VSSA ) ( FILLER_11 VSSA ) ( FILLER_6 VSSA ) + ( FILLER_9 VSSA ) ( FILLER_8 VSSA ) ( FILLER_7 VSSA ) + ( FILLER_5 VSSA ) ( user2_corner VSSA ) ( FILLER_576 VSSA ) + ( FILLER_578 VSSA ) ( FILLER_579 VSSA ) ( FILLER_577 VSSA ) + ( FILLER_571 VSSA ) ( FILLER_575 VSSA ) ( FILLER_574 VSSA ) + ( FILLER_573 VSSA ) ( FILLER_572 VSSA ) + ( user2_analog_pad\[3\] VSSA ) ( FILLER_570 VSSA ) + ( FILLER_568 VSSA ) ( FILLER_567 VSSA ) ( FILLER_566 VSSA ) + ( FILLER_565 VSSA ) ( FILLER_564 VSSA ) ( FILLER_563 VSSA ) + ( FILLER_562 VSSA ) ( FILLER_561 VSSA ) ( FILLER_556 VSSA ) + ( FILLER_559 VSSA ) ( user2_vccd_lvclamp_pad VSSA ) + ( FILLER_558 VSSA ) ( FILLER_557 VSSA ) ( FILLER_552 VSSA ) + ( FILLER_555 VSSA ) ( FILLER_554 VSSA ) ( FILLER_553 VSSA ) + ( FILLER_551 VSSA ) ( FILLER_546 VSSA ) ( FILLER_549 VSSA ) + ( mgmt_vddio_hvclamp_pad\[1\] VSSA ) ( FILLER_548 VSSA ) + ( FILLER_547 VSSA ) ( FILLER_542 VSSA ) ( FILLER_545 VSSA ) + ( FILLER_544 VSSA ) ( FILLER_543 VSSA ) ( FILLER_541 VSSA ) + ( FILLER_536 VSSA ) ( user2_vssa_hvclamp_pad VSSA ) + ( FILLER_538 VSSA ) ( FILLER_539 VSSA ) ( FILLER_537 VSSA ) + ( FILLER_532 VSSA ) ( FILLER_535 VSSA ) ( FILLER_534 VSSA ) + ( FILLER_533 VSSA ) ( FILLER_531 VSSA ) ( FILLER_526 VSSA ) + ( FILLER_529 VSSA ) ( mprj_pads.area2_io_pad\[0\] VSSA ) + ( FILLER_528 VSSA ) ( FILLER_527 VSSA ) ( FILLER_522 VSSA ) + ( FILLER_525 VSSA ) ( FILLER_524 VSSA ) ( FILLER_523 VSSA ) + ( FILLER_521 VSSA ) ( FILLER_516 VSSA ) ( FILLER_519 VSSA ) + ( mprj_pads.area2_io_pad\[1\] VSSA ) ( FILLER_518 VSSA ) + ( FILLER_517 VSSA ) ( FILLER_512 VSSA ) ( FILLER_515 VSSA ) + ( FILLER_514 VSSA ) ( FILLER_513 VSSA ) ( FILLER_511 VSSA ) + ( FILLER_507 VSSA ) ( FILLER_509 VSSA ) + ( mprj_pads.area2_io_pad\[2\] VSSA ) ( FILLER_508 VSSA ) + ( FILLER_503 VSSA ) ( FILLER_506 VSSA ) ( FILLER_505 VSSA ) + ( FILLER_504 VSSA ) ( FILLER_501 VSSA ) ( FILLER_502 VSSA ) + ( FILLER_497 VSSA ) ( FILLER_499 VSSA ) + ( mprj_pads.area2_io_pad\[3\] VSSA ) ( FILLER_498 VSSA ) + ( FILLER_493 VSSA ) ( FILLER_496 VSSA ) ( FILLER_495 VSSA ) + ( FILLER_494 VSSA ) ( FILLER_491 VSSA ) ( FILLER_492 VSSA ) + ( FILLER_487 VSSA ) ( FILLER_489 VSSA ) + ( mprj_pads.area2_io_pad\[4\] VSSA ) ( FILLER_488 VSSA ) + ( FILLER_483 VSSA ) ( FILLER_486 VSSA ) ( FILLER_485 VSSA ) + ( FILLER_484 VSSA ) ( FILLER_481 VSSA ) ( FILLER_482 VSSA ) + ( FILLER_477 VSSA ) ( FILLER_478 VSSA ) ( FILLER_479 VSSA ) + ( mprj_pads.area2_io_pad\[5\] VSSA ) ( FILLER_473 VSSA ) + ( FILLER_476 VSSA ) ( FILLER_475 VSSA ) ( FILLER_474 VSSA ) + ( FILLER_471 VSSA ) ( FILLER_472 VSSA ) ( FILLER_468 VSSA ) + ( mprj_pads.area2_io_pad\[6\] VSSA ) ( FILLER_469 VSSA ) + ( FILLER_464 VSSA ) ( FILLER_467 VSSA ) ( FILLER_466 VSSA ) + ( FILLER_465 VSSA ) ( FILLER_461 VSSA ) ( FILLER_463 VSSA ) + ( FILLER_462 VSSA ) ( FILLER_457 VSSA ) ( FILLER_458 VSSA ) + ( FILLER_459 VSSA ) ( user2_vdda_hvclamp_pad VSSA ) + ( FILLER_454 VSSA ) ( FILLER_456 VSSA ) ( FILLER_455 VSSA ) + ( FILLER_452 VSSA ) ( FILLER_453 VSSA ) ( FILLER_451 VSSA ) + ( FILLER_448 VSSA ) ( FILLER_449 VSSA ) + ( user2_vssd_lvclamp_pad VSSA ) ( FILLER_SB2 VSSA ) + ( FILLER_444 VSSA ) ( FILLER_447 VSSA ) ( FILLER_446 VSSA ) + ( FILLER_445 VSSA ) ( FILLER_441 VSSA ) ( FILLER_443 VSSA ) + ( FILLER_442 VSSA ) ( FILLER_438 VSSA ) ( FILLER_439 VSSA ) + ( mprj_pads.area2_io_pad\[7\] VSSA ) ( FILLER_434 VSSA ) + ( FILLER_437 VSSA ) ( FILLER_436 VSSA ) ( FILLER_435 VSSA ) + ( FILLER_431 VSSA ) ( FILLER_433 VSSA ) ( FILLER_432 VSSA ) + ( FILLER_429 VSSA ) ( mprj_pads.area2_io_pad\[8\] VSSA ) + ( FILLER_424 VSSA ) ( FILLER_428 VSSA ) ( FILLER_427 VSSA ) + ( FILLER_426 VSSA ) ( FILLER_425 VSSA ) ( FILLER_422 VSSA ) + ( FILLER_423 VSSA ) ( FILLER_421 VSSA ) ( FILLER_414 VSSA ) + ( FILLER_419 VSSA ) ( mprj_pads.area2_io_pad\[9\] VSSA ) + ( FILLER_418 VSSA ) ( FILLER_417 VSSA ) ( FILLER_416 VSSA ) + ( FILLER_415 VSSA ) ( FILLER_412 VSSA ) ( FILLER_413 VSSA ) + ( FILLER_411 VSSA ) ( FILLER_405 VSSA ) ( FILLER_409 VSSA ) + ( mprj_pads.area2_io_pad\[10\] VSSA ) ( FILLER_408 VSSA ) + ( FILLER_407 VSSA ) ( FILLER_406 VSSA ) ( FILLER_402 VSSA ) + ( FILLER_404 VSSA ) ( FILLER_403 VSSA ) ( FILLER_401 VSSA ) + ( FILLER_395 VSSA ) ( FILLER_399 VSSA ) + ( mprj_pads.area2_io_pad\[11\] VSSA ) ( FILLER_398 VSSA ) + ( FILLER_397 VSSA ) ( FILLER_396 VSSA ) ( FILLER_392 VSSA ) + ( FILLER_394 VSSA ) ( FILLER_393 VSSA ) ( FILLER_391 VSSA ) + ( FILLER_385 VSSA ) ( FILLER_388 VSSA ) ( FILLER_389 VSSA ) + ( mprj_pads.area2_io_pad\[12\] VSSA ) ( FILLER_387 VSSA ) + ( FILLER_386 VSSA ) ( FILLER_384 VSSA ) ( FILLER_383 VSSA ) + ( FILLER_382 VSSA ) ( FILLER_381 VSSA ) ( FILLER_380 VSSA ) + ( FILLER_379 VSSA ) ( FILLER_378 VSSA ) ( FILLER_377 VSSA ) + ( FILLER_376 VSSA ) ( FILLER_375 VSSA ) ( FILLER_374 VSSA ) + + ROUTED met4 TAPERRULE met4_width_330 ( 143430 2204150 ) ( * 2278850 ) ; + - FILLER_580/VSSD ( FILLER_580 VSSD ) ( FILLER_352 VSSD ) ; + - mprj_io[28] ( mprj_pads.area2_io_pad\[3\] PAD ) ; + - mprj_io_in[17] ( mprj_pads.area2_io_pad\[3\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3349225 ) ( 210895 * ) ; + - mprj_io_one[17] ( mprj_pads.area2_io_pad\[3\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3343245 ) ( 210895 * ) ; + - mprj_io_slow_sel[17] ( mprj_pads.area2_io_pad\[3\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3340025 ) ( 210895 * ) ; + - mprj_gpio_analog[10] + ( mprj_pads.area2_io_pad\[3\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3336805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[3\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[3\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[52] ( mprj_pads.area2_io_pad\[3\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3330825 ) ( 210895 * ) ; + - mprj_gpio_noesd[10] ( mprj_pads.area2_io_pad\[3\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3327605 ) ( 210895 * ) ; + - mprj_io_analog_en[17] ( mprj_pads.area2_io_pad\[3\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3324845 ) ( 210895 * ) ; + - mprj_io_dm[51] ( mprj_pads.area2_io_pad\[3\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3321625 ) ( 210895 * ) ; + - mprj_io_analog_pol[17] ( mprj_pads.area2_io_pad\[3\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3318405 ) ( 210895 * ) ; + - mprj_io_inp_dis[17] ( mprj_pads.area2_io_pad\[3\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3315645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[3\]/ENABLE_H + ( mprj_pads.area2_io_pad\[3\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[3\]/HLD_H_N + ( mprj_pads.area2_io_pad\[3\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[3\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 3305915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3305987.5 ) ( 210220 * ) + NEW met1 ( 210360 3306670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3306810 ) ( * 3345775 ) + NEW met1 ( 210360 3345915 ) ( 210480 * ) + NEW met1 ( 210420 3346005 ) via_260_260_vh + NEW met2 ( 208635 3346075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 3346005 ) ( 210895 * ) + NEW met2 ( 208635 3345935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 3346005 ) ( 210220 * ) + NEW met1 ( 210360 3346095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 3346235 ) ( * 3352605 ) + NEW met1 ( 210420 3306280 ) via_260_860_vh + NEW met1 ( 210360 3305890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 3305987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[17] ( mprj_pads.area2_io_pad\[3\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3303225 ) ( 210895 * ) ; + - mprj_io_dm[53] ( mprj_pads.area2_io_pad\[3\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3300005 ) ( 210895 * ) ; + - mprj_io_holdover[17] ( mprj_pads.area2_io_pad\[3\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3296785 ) ( 210895 * ) ; + - mprj_io_out[17] ( mprj_pads.area2_io_pad\[3\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3294025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[3\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[3\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[3\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[3\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 3352442.5 ) ( 210895 * ) + NEW met2 ( 208635 3352515 ) ( 210895 * ) + NEW met1 ( 209880 3352540 ) ( 210000 * ) + NEW met1 ( 209890 3352605 ) ( 209990 * ) + NEW met1 ( 209940 3352150 ) via_260_860_vh + NEW met1 ( 209880 3351760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3313255 ) ( * 3351620 ) + NEW met1 ( 209880 3313115 ) ( 210000 * ) + NEW met1 ( 209940 3312725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3312430 ) ( 210895 * ) + NEW met2 ( 208635 3312355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3312430 ) ( 209740 * ) + NEW met1 ( 209880 3312335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 3291635 ) ( * 3312195 ) + NEW met1 ( 209880 3291495 ) ( 210000 * ) + NEW met1 ( 209940 3291105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 3290810 ) ( 210895 * ) + NEW met2 ( 208635 3290735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 3290810 ) ( 209740 * ) + NEW met1 ( 209880 3290715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 3352442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[17] ( mprj_pads.area2_io_pad\[3\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3284825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[17] + ( mprj_pads.area2_io_pad\[3\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3281605 ) ( 210895 * ) ; + - mprj_io_oeb[17] ( mprj_pads.area2_io_pad\[3\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3278385 ) ( 210895 * ) ; + - mprj_io_in_3v3[17] ( mprj_pads.area2_io_pad\[3\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 3275625 ) ( 210895 * ) ; + - vssio_pad2 ( mgmt_vssio_hvclamp_pad\[1\] VSSIO_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 1674850 5123530 ) ( 1734090 * ) ; + - vddio_pad ( mgmt_vddio_hvclamp_pad\[0\] VDDIO_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 64465 558850 ) ( * 618090 ) ; + - constant_block_6/vssd ( constant_block_6 vssd ) ; + - constant_block_6/one ( constant_block_6 one ) + ( gpio_pad ENABLE_VDDIO ) + + ROUTED met3 ( 2653015 203495 ) ( 2659130 * ) + NEW met3 ( 2652690 203520 ) ( 2652740 * ) + NEW met2 ( 2652635 203620 ) ( 2652795 * ) + NEW met2 TAPERRULE met2_width_260 ( 2652715 203760 ) ( * 210155 ) + NEW met1 TAPERRULE met1_width_260 ( 2581930 210355 ) ( 2652715 * ) via_260_260_hv + ( * 210445 ) ( 2652775 * ) + NEW met2 ( 2581730 210355 ) via_260_260_hv + NEW met2 ( 2581670 210445 ) ( 2581790 * ) + NEW met1 TAPERRULE met1_width_260 ( 2571880 210355 ) ( 2581530 * ) + NEW met2 ( 2581670 210265 ) ( 2581790 * ) + NEW met2 ( 2652715 203495 ) via2_300_300_vx + NEW met2 ( 2652635 203370 ) ( 2652795 * ) + NEW met3 ( 2652690 203470 ) ( 2652740 * ) + NEW met3 ( 2652690 203495 ) ( 2652415 * ) ; + - mprj_io[5] ( mprj_pads.area1_io_pad\[5\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 1634000 ) ( * 1695000 ) ; + - mprj_pads.area1_io_pad\[5\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[5\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[5\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[5\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 1628557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 1629240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1629380 ) ( * 1667745 ) + NEW met1 ( 3378000 1667885 ) ( 3378120 * ) + NEW met1 ( 3378060 1668275 ) via_260_860_vh + NEW met2 ( 3377105 1668645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1668570 ) ( 3379365 * ) + NEW met1 ( 3378000 1668665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 1668805 ) ( * 1689365 ) + NEW met1 ( 3378000 1689505 ) ( 3378120 * ) + NEW met1 ( 3378060 1689895 ) via_260_860_vh + NEW met2 ( 3377105 1690265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 1690190 ) ( 3379365 * ) + NEW met1 ( 3378000 1690285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1690190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 1668570 ) ( 3377860 * ) + NEW met2 ( 3378060 1628850 ) via_260_860_vh ( * 1628460 ) + ( 3378120 * ) + NEW met1 ( 3378010 1628395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 1628557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 1628485 ) ( 3379365 * ) ; + - mprj_io_in[5] ( mprj_pads.area1_io_pad\[5\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1631775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[5\]/HLD_H_N + ( mprj_pads.area1_io_pad\[5\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[5\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 1675085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 1675012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 1675110 ) ( 3377640 * ) + NEW met1 ( 3377580 1674720 ) via_260_860_vh + NEW met1 ( 3377520 1674330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1635225 ) ( * 1674190 ) + NEW met1 ( 3377520 1635085 ) ( 3377640 * ) + NEW met1 ( 3377580 1634995 ) via_260_260_vh + NEW met2 ( 3377105 1635065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 1634995 ) ( 3379365 * ) + NEW met2 ( 3377105 1634925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 1634995 ) ( 3377380 * ) + NEW met1 ( 3377520 1634905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 1628395 ) ( * 1634765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 1675012.5 ) ( 3377380 * ) ; + - mprj_io_one[5] ( mprj_pads.area1_io_pad\[5\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1637755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[5] ( mprj_pads.area1_io_pad\[5\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1640975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[5\]/PAD_A_ESD_0_H + ( mprj_pads.area1_io_pad\[5\] PAD_A_ESD_0_H ) ; + - mprj_pads.area1_io_pad\[5\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[5\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[16] ( mprj_pads.area1_io_pad\[5\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1650175 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[5\]/PAD_A_NOESD_H + ( mprj_pads.area1_io_pad\[5\] PAD_A_NOESD_H ) ; + - mprj_io_analog_en[5] ( mprj_pads.area1_io_pad\[5\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1656155 ) ( 3379365 * ) ; + - mprj_io_dm[15] ( mprj_pads.area1_io_pad\[5\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1659375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[5] ( mprj_pads.area1_io_pad\[5\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1662595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[5] ( mprj_pads.area1_io_pad\[5\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1665355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[5\]/ENABLE_H + ( mprj_pads.area1_io_pad\[5\] ENABLE_H ) ; + - mprj_io_analog_sel[5] ( mprj_pads.area1_io_pad\[5\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1677775 ) ( 3379365 * ) ; + - mprj_io_dm[17] ( mprj_pads.area1_io_pad\[5\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1680995 ) ( 3379365 * ) ; + - mprj_io_holdover[5] ( mprj_pads.area1_io_pad\[5\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1684215 ) ( 3379365 * ) ; + - mprj_io_out[5] ( mprj_pads.area1_io_pad\[5\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1686975 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[5] ( mprj_pads.area1_io_pad\[5\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1696175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[5] + ( mprj_pads.area1_io_pad\[5\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1699395 ) ( 3379365 * ) ; + - mprj_io_oeb[5] ( mprj_pads.area1_io_pad\[5\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1702615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[5] ( mprj_pads.area1_io_pad\[5\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 1705375 ) ( 3379365 * ) ; + - mprj_io[21] ( user2_analog_pad\[0\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 907850 5123530 ) ( 967090 * ) ; + - mprj_analog[7] ( user2_analog_pad\[0\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_25000 ( 937220 4988150 ) ( * 5070200 ) ; + - mprj_io[30] ( mprj_pads.area2_io_pad\[5\] PAD ) + + ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 673680 ) ( * 2324550 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348180 ) ( * 4538130 ) + NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562500 ) ( * 4588410 ) + NEW met5 ( 3370900 4612730 ) ( 3382300 * ) + NEW met4 TAPERRULE met4_width_600 ( 3370200 4612280 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_790 ( 3382705 4589360 ) ( * 4611830 ) + NEW met4 TAPERRULE met4_width_740 ( 3370200 4588840 ) ( 3382950 * ) + NEW met4 TAPERRULE met4_width_630 ( 3370365 4589360 ) ( * 4611830 ) + NEW met4 ( 3376495 4600595 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_520 ( 3353950 4612240 ) ( 3382660 * ) + NEW met3 ( 3353950 4612360 ) ( 3382055 * ) + NEW met3 TAPERRULE met3_width_500 ( 3382560 4589360 ) ( * 4611830 ) + NEW met3 TAPERRULE met3_width_710 ( 3353950 4588855 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_16880 ( 3362240 4589360 ) ( * 4611830 ) + NEW met3 ( 3376495 4600595 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_690 ( 3370280 4562045 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_730 ( 3382815 4539080 ) ( * 4561550 ) + NEW met4 TAPERRULE met4_width_650 ( 3370280 4538605 ) ( 3383030 * ) + NEW met4 TAPERRULE met4_width_690 ( 3370475 4539080 ) ( * 4561550 ) + NEW met4 ( 3376635 4550315 ) via4_11630_22770 + NEW met3 TAPERRULE met3_width_545 ( 3353950 4561972.5 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_360 ( 3382630 4539080 ) ( * 4561550 ) + NEW met3 TAPERRULE met3_width_630 ( 3353950 4538615 ) ( 3382660 * ) + NEW met3 TAPERRULE met3_width_17020 ( 3362310 4539080 ) ( * 4561550 ) + NEW met3 ( 3376635 4550315 ) via3_11630_22770_hx + NEW met4 TAPERRULE met4_width_620 ( 3370250 2347690 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_630 ( 3382825 2325500 ) ( * 2347230 ) + NEW met4 TAPERRULE met4_width_630 ( 3370250 2325035 ) ( 3382990 * ) + NEW met4 TAPERRULE met4_width_590 ( 3370395 2325500 ) ( * 2347230 ) + NEW met4 ( 3376600 2336365 ) via4_11820_22030 + NEW met3 TAPERRULE met3_width_620 ( 3353790 2347690 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_590 ( 3382805 2325500 ) ( * 2347230 ) + NEW met3 TAPERRULE met3_width_605 ( 3353790 2325047.5 ) ( 3382950 * ) + NEW met3 TAPERRULE met3_width_17050 ( 3362165 2325500 ) ( * 2347230 ) + NEW met3 ( 3376600 2336365 ) via3_11820_22030_hx ; + - mprj_io_in[19] ( mprj_pads.area2_io_pad\[5\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2917225 ) ( 210895 * ) ; + - mprj_io_one[19] ( mprj_pads.area2_io_pad\[5\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2911245 ) ( 210895 * ) ; + - mprj_io_slow_sel[19] ( mprj_pads.area2_io_pad\[5\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2908025 ) ( 210895 * ) ; + - mprj_gpio_analog[12] + ( mprj_pads.area2_io_pad\[5\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2904805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[5\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[5\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[58] ( mprj_pads.area2_io_pad\[5\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2898825 ) ( 210895 * ) ; + - mprj_gpio_noesd[12] ( mprj_pads.area2_io_pad\[5\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2895605 ) ( 210895 * ) ; + - mprj_io_analog_en[19] ( mprj_pads.area2_io_pad\[5\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2892845 ) ( 210895 * ) ; + - mprj_io_dm[57] ( mprj_pads.area2_io_pad\[5\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2889625 ) ( 210895 * ) ; + - mprj_io_analog_pol[19] ( mprj_pads.area2_io_pad\[5\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2886405 ) ( 210895 * ) ; + - mprj_io_inp_dis[19] ( mprj_pads.area2_io_pad\[5\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2883645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[5\]/ENABLE_H + ( mprj_pads.area2_io_pad\[5\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[5\]/HLD_H_N + ( mprj_pads.area2_io_pad\[5\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[5\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 2873915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2873987.5 ) ( 210220 * ) + NEW met1 ( 210360 2874670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2874810 ) ( * 2913775 ) + NEW met1 ( 210360 2913915 ) ( 210480 * ) + NEW met1 ( 210420 2914005 ) via_260_260_vh + NEW met2 ( 208635 2914075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 2914005 ) ( 210895 * ) + NEW met2 ( 208635 2913935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 2914005 ) ( 210220 * ) + NEW met1 ( 210360 2914095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2914235 ) ( * 2920605 ) + NEW met1 ( 210420 2874280 ) via_260_860_vh + NEW met1 ( 210360 2873890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 2873987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[19] ( mprj_pads.area2_io_pad\[5\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2871225 ) ( 210895 * ) ; + - mprj_io_dm[59] ( mprj_pads.area2_io_pad\[5\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2868005 ) ( 210895 * ) ; + - mprj_io_holdover[19] ( mprj_pads.area2_io_pad\[5\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2864785 ) ( 210895 * ) ; + - mprj_io_out[19] ( mprj_pads.area2_io_pad\[5\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2862025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[5\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[5\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[5\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[5\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 2920442.5 ) ( 210895 * ) + NEW met2 ( 208635 2920515 ) ( 210895 * ) + NEW met1 ( 209880 2920540 ) ( 210000 * ) + NEW met1 ( 209890 2920605 ) ( 209990 * ) + NEW met1 ( 209940 2920150 ) via_260_860_vh + NEW met1 ( 209880 2919760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2881255 ) ( * 2919620 ) + NEW met1 ( 209880 2881115 ) ( 210000 * ) + NEW met1 ( 209940 2880725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2880430 ) ( 210895 * ) + NEW met2 ( 208635 2880355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2880430 ) ( 209740 * ) + NEW met1 ( 209880 2880335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2859635 ) ( * 2880195 ) + NEW met1 ( 209880 2859495 ) ( 210000 * ) + NEW met1 ( 209940 2859105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2858810 ) ( 210895 * ) + NEW met2 ( 208635 2858735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2858810 ) ( 209740 * ) + NEW met1 ( 209880 2858715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2920442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[19] ( mprj_pads.area2_io_pad\[5\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2852825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[19] + ( mprj_pads.area2_io_pad\[5\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2849605 ) ( 210895 * ) ; + - mprj_io_oeb[19] ( mprj_pads.area2_io_pad\[5\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2846385 ) ( 210895 * ) ; + - mprj_io_in_3v3[19] ( mprj_pads.area2_io_pad\[5\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2843625 ) ( 210895 * ) ; + - constant_block_5/vssd ( constant_block_5 vssd ) ; + - constant_block_5/one ( constant_block_5 one ) + ( flash_io1_pad ENABLE_VDDIO ) + + ROUTED met3 ( 2379015 203495 ) ( 2385125 * ) + NEW met3 ( 2378690 203520 ) ( 2378740 * ) + NEW met2 ( 2378635 203620 ) ( 2378795 * ) + NEW met2 TAPERRULE met2_width_260 ( 2378715 203760 ) ( * 210155 ) + NEW met1 TAPERRULE met1_width_260 ( 2307950 210355 ) ( 2378715 * ) via_260_260_hv + ( * 210445 ) ( 2378775 * ) + NEW met2 ( 2307750 210355 ) via_260_260_hv + NEW met2 ( 2307690 210445 ) ( 2307810 * ) + NEW met1 TAPERRULE met1_width_260 ( 2297880 210355 ) ( 2307550 * ) + NEW met2 ( 2307690 210265 ) ( 2307810 * ) + NEW met2 ( 2378715 203495 ) via2_300_300_vx + NEW met2 ( 2378635 203370 ) ( 2378795 * ) + NEW met3 ( 2378690 203470 ) ( 2378740 * ) + NEW met3 ( 2378690 203495 ) ( 2378415 * ) ; + - constant_block_4/vssd ( constant_block_4 vssd ) ; + - constant_block_4/one ( constant_block_4 one ) + ( flash_io0_pad ENABLE_VDDIO ) + + ROUTED met3 ( 2105015 203495 ) ( 2111160 * ) + NEW met3 ( 2104690 203520 ) ( 2104740 * ) + NEW met2 ( 2104635 203620 ) ( 2104795 * ) + NEW met2 TAPERRULE met2_width_260 ( 2104715 203760 ) ( * 210155 ) + NEW met1 TAPERRULE met1_width_260 ( 2033925 210355 ) ( 2104715 * ) via_260_260_hv + ( * 210445 ) ( 2104775 * ) + NEW met2 ( 2033725 210355 ) via_260_260_hv + NEW met2 ( 2033665 210445 ) ( 2033785 * ) + NEW met1 TAPERRULE met1_width_260 ( 2023880 210355 ) ( 2033525 * ) + NEW met2 ( 2033665 210265 ) ( 2033785 * ) + NEW met2 ( 2104715 203495 ) via2_300_300_vx + NEW met2 ( 2104635 203370 ) ( 2104795 * ) + NEW met3 ( 2104690 203470 ) ( 2104740 * ) + NEW met3 ( 2104690 203495 ) ( 2104415 * ) ; + - mprj_io[11] ( mprj_pads.area1_io_pad\[11\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 3648000 ) ( * 3709000 ) ; + - mprj_pads.area1_io_pad\[11\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[11\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[11\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[11\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 3642557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 3643240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3643380 ) ( * 3681745 ) + NEW met1 ( 3378000 3681885 ) ( 3378120 * ) + NEW met1 ( 3378060 3682275 ) via_260_860_vh + NEW met2 ( 3377105 3682645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3682570 ) ( 3379365 * ) + NEW met1 ( 3378000 3682665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 3682805 ) ( * 3703365 ) + NEW met1 ( 3378000 3703505 ) ( 3378120 * ) + NEW met1 ( 3378060 3703895 ) via_260_860_vh + NEW met2 ( 3377105 3704265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 3704190 ) ( 3379365 * ) + NEW met1 ( 3378000 3704285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3704190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 3682570 ) ( 3377860 * ) + NEW met2 ( 3378060 3642850 ) via_260_860_vh ( * 3642460 ) + ( 3378120 * ) + NEW met1 ( 3378010 3642395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 3642557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 3642485 ) ( 3379365 * ) ; + - mprj_io_in[11] ( mprj_pads.area1_io_pad\[11\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3645775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[11\]/HLD_H_N + ( mprj_pads.area1_io_pad\[11\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[11\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 3689085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 3689012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 3689110 ) ( 3377640 * ) + NEW met1 ( 3377580 3688720 ) via_260_860_vh + NEW met1 ( 3377520 3688330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3649225 ) ( * 3688190 ) + NEW met1 ( 3377520 3649085 ) ( 3377640 * ) + NEW met1 ( 3377580 3648995 ) via_260_260_vh + NEW met2 ( 3377105 3649065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 3648995 ) ( 3379365 * ) + NEW met2 ( 3377105 3648925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 3648995 ) ( 3377380 * ) + NEW met1 ( 3377520 3648905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 3642395 ) ( * 3648765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 3689012.5 ) ( 3377380 * ) ; + - mprj_io_one[11] ( mprj_pads.area1_io_pad\[11\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3651755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[11] ( mprj_pads.area1_io_pad\[11\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3654975 ) ( 3379365 * ) ; + - mprj_gpio_analog[4] + ( mprj_pads.area1_io_pad\[11\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3658195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[11\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[11\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[34] ( mprj_pads.area1_io_pad\[11\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3664175 ) ( 3379365 * ) ; + - mprj_gpio_noesd[4] ( mprj_pads.area1_io_pad\[11\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3667395 ) ( 3379365 * ) ; + - mprj_io_analog_en[11] ( mprj_pads.area1_io_pad\[11\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3670155 ) ( 3379365 * ) ; + - mprj_io_dm[33] ( mprj_pads.area1_io_pad\[11\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3673375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[11] + ( mprj_pads.area1_io_pad\[11\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3676595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[11] ( mprj_pads.area1_io_pad\[11\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3679355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[11\]/ENABLE_H + ( mprj_pads.area1_io_pad\[11\] ENABLE_H ) ; + - mprj_io_analog_sel[11] + ( mprj_pads.area1_io_pad\[11\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3691775 ) ( 3379365 * ) ; + - mprj_io_dm[35] ( mprj_pads.area1_io_pad\[11\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3694995 ) ( 3379365 * ) ; + - mprj_io_holdover[11] ( mprj_pads.area1_io_pad\[11\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3698215 ) ( 3379365 * ) ; + - mprj_io_out[11] ( mprj_pads.area1_io_pad\[11\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3700975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[11\]/ENABLE_VDDA_H + ( mprj_pads.area1_io_pad\[11\] ENABLE_VDDA_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3707415 ) ( 3378340 * ) + NEW met1 TAPERRULE met1_width_260 ( 3378540 3707925 ) ( * 3719475 ) + NEW met1 ( 3378540 3707425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 3640550 ) ( * 3706925 ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 3707415 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[11] ( mprj_pads.area1_io_pad\[11\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3710175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[11] + ( mprj_pads.area1_io_pad\[11\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3713395 ) ( 3379365 * ) ; + - mprj_io_oeb[11] ( mprj_pads.area1_io_pad\[11\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3716615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[11] ( mprj_pads.area1_io_pad\[11\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 3719375 ) ( 3379365 * ) ; + - constant_block_3/vssd ( constant_block_3 vssd ) ; + - flash_clk_pad/DM[2] ( flash_clk_pad DM[2] ) + ( flash_clk_pad DM[1] ) ( constant_block_3 one ) + ( flash_clk_pad ENABLE_VDDIO ) + + ROUTED met2 ( 1802980 210355 ) via_260_260_hv + NEW met2 ( 1802920 210445 ) ( 1803040 * ) + NEW met1 TAPERRULE met1_width_260 ( 1772360 210355 ) ( 1802780 * ) + NEW met1 ( 1772160 210355 ) via_260_260_hv ( * 210445 ) + ( 1772220 * ) + NEW met1 TAPERRULE met1_width_260 ( 1759955 210355 ) ( 1771960 * ) + NEW met1 ( 1759755 210355 ) via_260_260_hv ( * 210445 ) + ( 1759815 * ) + NEW met1 TAPERRULE met1_width_260 ( 1749880 210355 ) ( 1759555 * ) + NEW met2 ( 1759695 210265 ) ( 1759815 * ) + NEW met2 ( 1772100 210265 ) ( 1772220 * ) + NEW met2 ( 1802920 210265 ) ( 1803040 * ) + NEW met1 TAPERRULE met1_width_260 ( 1803180 210355 ) ( 1830715 * ) via_260_260_hv + ( * 210445 ) ( 1830775 * ) + NEW met2 TAPERRULE met2_width_260 ( 1830715 203760 ) ( * 210155 ) + NEW met2 ( 1830635 203620 ) ( 1830795 * ) + NEW met2 ( 1830715 203495 ) via2_300_300_vx + NEW met3 ( 1830690 203520 ) ( 1830740 * ) + NEW met3 ( 1831015 203495 ) ( 1837270 * ) + NEW met3 ( 1830690 203470 ) ( 1830740 * ) + NEW met3 ( 1830690 203495 ) ( 1830415 * ) + NEW met2 ( 1830635 203370 ) ( 1830795 * ) ; + - mprj_io[7] ( mprj_pads.area1_io_pad\[7\] PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 2746000 ) ( * 2807000 ) ; + - mprj_pads.area1_io_pad\[7\]/TIE_LO_ESD + ( mprj_pads.area1_io_pad\[7\] TIE_LO_ESD ) + ( mprj_pads.area1_io_pad\[7\] ENABLE_VSWITCH_H ) + ( mprj_pads.area1_io_pad\[7\] ENABLE_INP_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 3377105 2740557.5 ) ( 3377860 * ) + NEW met1 ( 3378000 2741240 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 2741380 ) ( * 2779745 ) + NEW met1 ( 3378000 2779885 ) ( 3378120 * ) + NEW met1 ( 3378060 2780275 ) via_260_860_vh + NEW met2 ( 3377105 2780645 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 2780570 ) ( 3379365 * ) + NEW met1 ( 3378000 2780665 ) ( 3378120 * ) + NEW met1 TAPERRULE met1_width_240 ( 3378060 2780805 ) ( * 2801365 ) + NEW met1 ( 3378000 2801505 ) ( 3378120 * ) + NEW met1 ( 3378060 2801895 ) via_260_860_vh + NEW met2 ( 3377105 2802265 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_270 ( 3378260 2802190 ) ( 3379365 * ) + NEW met1 ( 3378000 2802285 ) ( 3378120 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 2802190 ) ( 3377860 * ) + NEW met2 TAPERRULE met2_width_270 ( 3377105 2780570 ) ( 3377860 * ) + NEW met2 ( 3378060 2740850 ) via_260_860_vh ( * 2740460 ) + ( 3378120 * ) + NEW met1 ( 3378010 2740395 ) ( 3378110 * ) + NEW met2 TAPERRULE met2_width_275 ( 3378260 2740557.5 ) ( 3379365 * ) + NEW met2 ( 3377105 2740485 ) ( 3379365 * ) ; + - mprj_io_in[7] ( mprj_pads.area1_io_pad\[7\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2743775 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[7\]/HLD_H_N + ( mprj_pads.area1_io_pad\[7\] HLD_H_N ) + ( mprj_pads.area1_io_pad\[7\] TIE_HI_ESD ) + + ROUTED met2 ( 3377105 2787085 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_275 ( 3377780 2787012.5 ) ( 3379365 * ) + NEW met1 ( 3377520 2787110 ) ( 3377640 * ) + NEW met1 ( 3377580 2786720 ) via_260_860_vh + NEW met1 ( 3377520 2786330 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 2747225 ) ( * 2786190 ) + NEW met1 ( 3377520 2747085 ) ( 3377640 * ) + NEW met1 ( 3377580 2746995 ) via_260_260_vh + NEW met2 ( 3377105 2747065 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377780 2746995 ) ( 3379365 * ) + NEW met2 ( 3377105 2746925 ) ( 3379365 * ) + NEW met2 TAPERRULE met2_width_260 ( 3377105 2746995 ) ( 3377380 * ) + NEW met1 ( 3377520 2746905 ) ( 3377640 * ) + NEW met1 TAPERRULE met1_width_240 ( 3377580 2740395 ) ( * 2746765 ) + NEW met2 TAPERRULE met2_width_275 ( 3377105 2787012.5 ) ( 3377380 * ) ; + - mprj_io_one[7] ( mprj_pads.area1_io_pad\[7\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2749755 ) ( 3379365 * ) ; + - mprj_io_slow_sel[7] ( mprj_pads.area1_io_pad\[7\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2752975 ) ( 3379365 * ) ; + - mprj_gpio_analog[0] ( mprj_pads.area1_io_pad\[7\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2756195 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[7\]/PAD_A_ESD_1_H + ( mprj_pads.area1_io_pad\[7\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[22] ( mprj_pads.area1_io_pad\[7\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2762175 ) ( 3379365 * ) ; + - mprj_gpio_noesd[0] ( mprj_pads.area1_io_pad\[7\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2765395 ) ( 3379365 * ) ; + - mprj_io_analog_en[7] ( mprj_pads.area1_io_pad\[7\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2768155 ) ( 3379365 * ) ; + - mprj_io_dm[21] ( mprj_pads.area1_io_pad\[7\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2771375 ) ( 3379365 * ) ; + - mprj_io_analog_pol[7] ( mprj_pads.area1_io_pad\[7\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2774595 ) ( 3379365 * ) ; + - mprj_io_inp_dis[7] ( mprj_pads.area1_io_pad\[7\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2777355 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[7\]/ENABLE_H + ( mprj_pads.area1_io_pad\[7\] ENABLE_H ) ; + - mprj_io_analog_sel[7] ( mprj_pads.area1_io_pad\[7\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2789775 ) ( 3379365 * ) ; + - mprj_io_dm[23] ( mprj_pads.area1_io_pad\[7\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2792995 ) ( 3379365 * ) ; + - mprj_io_holdover[7] ( mprj_pads.area1_io_pad\[7\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2796215 ) ( 3379365 * ) ; + - mprj_io_out[7] ( mprj_pads.area1_io_pad\[7\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2798975 ) ( 3379365 * ) ; + - mprj_pads.area1_io_pad\[7\]/ENABLE_VDDA_H + ( mprj_pads.area1_io_pad\[7\] ENABLE_VDDA_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2805415 ) ( 3378340 * ) + NEW met1 TAPERRULE met1_width_260 ( 3378540 2805925 ) ( * 2817475 ) + NEW met1 ( 3378540 2805425 ) via_260_860_vh + NEW met1 TAPERRULE met1_width_260 ( 3378540 2738550 ) ( * 2804925 ) + NEW met2 TAPERRULE met2_width_280 ( 3378740 2805415 ) ( 3379365 * ) ; + - mprj_io_vtrip_sel[7] ( mprj_pads.area1_io_pad\[7\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2808175 ) ( 3379365 * ) ; + - mprj_io_ib_mode_sel[7] + ( mprj_pads.area1_io_pad\[7\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2811395 ) ( 3379365 * ) ; + - mprj_io_oeb[7] ( mprj_pads.area1_io_pad\[7\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2814615 ) ( 3379365 * ) ; + - mprj_io_in_3v3[7] ( mprj_pads.area1_io_pad\[7\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 3377105 2817375 ) ( 3379365 * ) ; + - mprj_io[23] ( user2_analog_pad\[2\] P_PAD ) + + ROUTED met5 TAPERRULE met5_width_60820 ( 393850 5123530 ) ( 453090 * ) ; + - mprj_analog[9] ( user2_analog_pad\[2\] P_CORE ) + + ROUTED met3 TAPERRULE met3_width_25000 ( 423220 4988150 ) ( * 5070200 ) ; + - constant_block_2/vssd ( constant_block_2 vssd ) + ( constant_block_1 vssd ) ; + - flash_csb_pad/DM[2] ( flash_csb_pad DM[2] ) + ( flash_csb_pad DM[1] ) ( constant_block_2 one ) + ( flash_csb_pad ENABLE_VDDIO ) + + ROUTED met2 ( 1529000 210355 ) via_260_260_hv + NEW met2 ( 1528940 210445 ) ( 1529060 * ) + NEW met1 TAPERRULE met1_width_260 ( 1498365 210355 ) ( 1528800 * ) + NEW met1 ( 1498165 210355 ) via_260_260_hv ( * 210445 ) + ( 1498225 * ) + NEW met1 TAPERRULE met1_width_260 ( 1485955 210355 ) ( 1497965 * ) + NEW met1 ( 1485755 210355 ) via_260_260_hv ( * 210445 ) + ( 1485815 * ) + NEW met1 TAPERRULE met1_width_260 ( 1475880 210355 ) ( 1485555 * ) + NEW met2 ( 1485695 210265 ) ( 1485815 * ) + NEW met2 ( 1498105 210265 ) ( 1498225 * ) + NEW met2 ( 1528940 210265 ) ( 1529060 * ) + NEW met1 TAPERRULE met1_width_260 ( 1529200 210355 ) ( 1556715 * ) via_260_260_hv + ( * 210445 ) ( 1556775 * ) + NEW met2 TAPERRULE met2_width_260 ( 1556715 203760 ) ( * 210155 ) + NEW met2 ( 1556635 203620 ) ( 1556795 * ) + NEW met2 ( 1556715 203495 ) via2_300_300_vx + NEW met3 ( 1556690 203520 ) ( 1556740 * ) + NEW met3 ( 1557015 203495 ) ( 1563270 * ) + NEW met3 ( 1556690 203470 ) ( 1556740 * ) + NEW met3 ( 1556690 203495 ) ( 1556415 * ) + NEW met2 ( 1556635 203370 ) ( 1556795 * ) ; + - mprj_io[32] ( mprj_pads.area2_io_pad\[7\] PAD ) ; + - mprj_io_in[21] ( mprj_pads.area2_io_pad\[7\] IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2063225 ) ( 210895 * ) ; + - mprj_io_one[21] ( mprj_pads.area2_io_pad\[7\] ENABLE_VDDIO ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2057245 ) ( 210895 * ) ; + - mprj_io_slow_sel[21] ( mprj_pads.area2_io_pad\[7\] SLOW ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2054025 ) ( 210895 * ) ; + - mprj_gpio_analog[14] + ( mprj_pads.area2_io_pad\[7\] PAD_A_ESD_0_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2050805 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[7\]/PAD_A_ESD_1_H + ( mprj_pads.area2_io_pad\[7\] PAD_A_ESD_1_H ) ; + - mprj_io_dm[64] ( mprj_pads.area2_io_pad\[7\] DM[1] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2044825 ) ( 210895 * ) ; + - mprj_gpio_noesd[14] ( mprj_pads.area2_io_pad\[7\] PAD_A_NOESD_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2041605 ) ( 210895 * ) ; + - mprj_io_analog_en[21] ( mprj_pads.area2_io_pad\[7\] ANALOG_EN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2038845 ) ( 210895 * ) ; + - mprj_io_dm[63] ( mprj_pads.area2_io_pad\[7\] DM[0] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2035625 ) ( 210895 * ) ; + - mprj_io_analog_pol[21] ( mprj_pads.area2_io_pad\[7\] ANALOG_POL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2032405 ) ( 210895 * ) ; + - mprj_io_inp_dis[21] ( mprj_pads.area2_io_pad\[7\] INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2029645 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[7\]/ENABLE_H + ( mprj_pads.area2_io_pad\[7\] ENABLE_H ) ; + - mprj_pads.area2_io_pad\[7\]/HLD_H_N + ( mprj_pads.area2_io_pad\[7\] HLD_H_N ) + ( mprj_pads.area2_io_pad\[7\] TIE_HI_ESD ) + + ROUTED met2 ( 208635 2019915 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2019987.5 ) ( 210220 * ) + NEW met1 ( 210360 2020670 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2020810 ) ( * 2059775 ) + NEW met1 ( 210360 2059915 ) ( 210480 * ) + NEW met1 ( 210420 2060005 ) via_260_260_vh + NEW met2 ( 208635 2060075 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 210620 2060005 ) ( 210895 * ) + NEW met2 ( 208635 2059935 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_260 ( 208635 2060005 ) ( 210220 * ) + NEW met1 ( 210360 2060095 ) ( 210480 * ) + NEW met1 TAPERRULE met1_width_240 ( 210420 2060235 ) ( * 2066605 ) + NEW met1 ( 210420 2020280 ) via_260_860_vh + NEW met1 ( 210360 2019890 ) ( 210480 * ) + NEW met2 TAPERRULE met2_width_275 ( 210620 2019987.5 ) ( 210895 * ) ; + - mprj_io_analog_sel[21] ( mprj_pads.area2_io_pad\[7\] ANALOG_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2017225 ) ( 210895 * ) ; + - mprj_io_dm[65] ( mprj_pads.area2_io_pad\[7\] DM[2] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2014005 ) ( 210895 * ) ; + - mprj_io_holdover[21] ( mprj_pads.area2_io_pad\[7\] HLD_OVR ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2010785 ) ( 210895 * ) ; + - mprj_io_out[21] ( mprj_pads.area2_io_pad\[7\] OUT ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 2008025 ) ( 210895 * ) ; + - mprj_pads.area2_io_pad\[7\]/TIE_LO_ESD + ( mprj_pads.area2_io_pad\[7\] TIE_LO_ESD ) + ( mprj_pads.area2_io_pad\[7\] ENABLE_INP_H ) + ( mprj_pads.area2_io_pad\[7\] ENABLE_VSWITCH_H ) + + ROUTED met2 TAPERRULE met2_width_275 ( 210140 2066442.5 ) ( 210895 * ) + NEW met2 ( 208635 2066515 ) ( 210895 * ) + NEW met1 ( 209880 2066540 ) ( 210000 * ) + NEW met1 ( 209890 2066605 ) ( 209990 * ) + NEW met1 ( 209940 2066150 ) via_260_860_vh + NEW met1 ( 209880 2065760 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2027255 ) ( * 2065620 ) + NEW met1 ( 209880 2027115 ) ( 210000 * ) + NEW met1 ( 209940 2026725 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2026430 ) ( 210895 * ) + NEW met2 ( 208635 2026355 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2026430 ) ( 209740 * ) + NEW met1 ( 209880 2026335 ) ( 210000 * ) + NEW met1 TAPERRULE met1_width_240 ( 209940 2005635 ) ( * 2026195 ) + NEW met1 ( 209880 2005495 ) ( 210000 * ) + NEW met1 ( 209940 2005105 ) via_260_860_vh + NEW met2 TAPERRULE met2_width_270 ( 210140 2004810 ) ( 210895 * ) + NEW met2 ( 208635 2004735 ) ( 210895 * ) + NEW met2 TAPERRULE met2_width_270 ( 208635 2004810 ) ( 209740 * ) + NEW met1 ( 209880 2004715 ) ( 210000 * ) + NEW met2 TAPERRULE met2_width_275 ( 208635 2066442.5 ) ( 209740 * ) ; + - mprj_io_vtrip_sel[21] ( mprj_pads.area2_io_pad\[7\] VTRIP_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1998825 ) ( 210895 * ) ; + - mprj_io_ib_mode_sel[21] + ( mprj_pads.area2_io_pad\[7\] IB_MODE_SEL ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1995605 ) ( 210895 * ) ; + - mprj_io_oeb[21] ( mprj_pads.area2_io_pad\[7\] OE_N ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1992385 ) ( 210895 * ) ; + - mprj_io_in_3v3[21] ( mprj_pads.area2_io_pad\[7\] IN_H ) + + ROUTED met2 TAPERRULE met2_width_280 ( 208635 1989625 ) ( 210895 * ) ; + - vccd_pad ( mgmt_vccd_lvclamp_pad VCCD_PAD ) + + ROUTED met5 TAPERRULE met5_width_54400 ( 31635 377470 ) ( 97295 * ) ; + - clock ( clock_pad PAD ) + + ROUTED met5 TAPERRULE met5_width_62450 ( 939000 64215 ) ( 1000000 * ) ; + - clock_pad/TIE_LO_ESD ( clock_pad TIE_LO_ESD ) + ( clock_pad ENABLE_VSWITCH_H ) ( clock_pad ENABLE_INP_H ) + + ROUTED met2 ( 933545 209095 ) via_260_260_hv + NEW met2 ( 933485 209185 ) ( 933605 * ) + NEW met1 TAPERRULE met1_width_260 ( 932810 209095 ) ( 933345 * ) + NEW met2 ( 933485 209005 ) ( 933605 * ) + NEW met1 TAPERRULE met1_width_260 ( 933745 209095 ) ( 973570 * ) via_260_260_hv + ( * 209185 ) ( 973630 * ) + NEW met2 ( 973510 209005 ) ( 973630 * ) + NEW met1 TAPERRULE met1_width_260 ( 973770 209095 ) ( 995190 * ) via_260_260_hv + ( * 209185 ) ( 995250 * ) + NEW met2 ( 995130 209005 ) ( 995250 * ) + NEW met1 TAPERRULE met1_width_260 ( 995390 209095 ) ( 1010740 * ) ; + - clock_core ( clock_pad IN ) + + ROUTED met2 TAPERRULE met2_width_280 ( 936775 208635 ) ( * 210895 ) ; + - clock_pad/HLD_H_N ( clock_pad HLD_H_N ) ( clock_pad TIE_HI_ESD ) + + ROUTED met2 ( 979995 209515 ) via_260_260_hv + NEW met2 ( 979935 209605 ) ( 980055 * ) + NEW met1 TAPERRULE met1_width_260 ( 940170 209515 ) ( 979795 * ) + NEW met1 ( 939970 209515 ) via_260_260_hv ( * 209605 ) + ( 940030 * ) + NEW met1 TAPERRULE met1_width_260 ( 932810 209515 ) ( 939770 * ) + NEW met2 ( 939910 209425 ) ( 940030 * ) + NEW met2 ( 979935 209425 ) ( 980055 * ) + NEW met1 TAPERRULE met1_width_260 ( 980195 209515 ) ( 1010740 * ) ; + - clock_pad/OUT ( clock_pad OUT ) ( constant_block_1 zero ) + ( clock_pad IB_MODE_SEL ) ( clock_pad VTRIP_SEL ) + ( clock_pad SLOW ) ( clock_pad HLD_OVR ) ( clock_pad DM[2] ) + ( clock_pad ANALOG_SEL ) ( clock_pad ANALOG_POL ) + ( clock_pad ANALOG_EN ) ( clock_pad DM[1] ) + + ROUTED met2 ( 991970 209935 ) via_260_260_hv + NEW met2 ( 991910 210025 ) ( 992030 * ) + NEW met1 TAPERRULE met1_width_260 ( 989395 209935 ) ( 991770 * ) + NEW met1 ( 989195 209935 ) via_260_260_hv ( * 210025 ) + ( 989255 * ) + NEW met1 TAPERRULE met1_width_260 ( 986180 209935 ) ( 988995 * ) + NEW met1 ( 985980 209935 ) via_260_260_hv ( * 210025 ) + ( 986040 * ) + NEW met1 TAPERRULE met1_width_260 ( 982970 209935 ) ( 985780 * ) + NEW met1 ( 982770 209935 ) via_260_260_hv ( * 210025 ) + ( 982830 * ) + NEW met1 TAPERRULE met1_width_260 ( 967775 209935 ) ( 982570 * ) + NEW met1 ( 967575 209935 ) via_260_260_hv ( * 210025 ) + ( 967635 * ) + NEW met1 TAPERRULE met1_width_260 ( 961340 209935 ) ( 967375 * ) + NEW met1 ( 961140 209935 ) via_260_260_hv ( * 210025 ) + ( 961200 * ) + NEW met1 TAPERRULE met1_width_260 ( 955345 209935 ) ( 960940 * ) + NEW met1 ( 955145 209935 ) via_260_260_hv ( * 210025 ) + ( 955205 * ) + NEW met1 TAPERRULE met1_width_260 ( 946145 209935 ) ( 954945 * ) + NEW met1 ( 945945 209935 ) via_260_260_hv ( * 210025 ) + ( 946005 * ) + NEW met1 TAPERRULE met1_width_260 ( 932810 209935 ) ( 945745 * ) + NEW met2 ( 945885 209845 ) ( 946005 * ) + NEW met2 ( 955085 209845 ) ( 955205 * ) + NEW met2 ( 961080 209845 ) ( 961200 * ) + NEW met2 ( 967515 209845 ) ( 967635 * ) + NEW met2 ( 982710 209845 ) ( 982830 * ) + NEW met2 ( 985920 209845 ) ( 986040 * ) + NEW met2 ( 989135 209845 ) ( 989255 * ) + NEW met2 ( 991910 209845 ) ( 992030 * ) + NEW met1 TAPERRULE met1_width_260 ( 992170 209935 ) ( 1001160 * ) via_260_260_hv + ( * 210025 ) ( 1001220 * ) + NEW met2 ( 1001100 209845 ) ( 1001220 * ) + NEW met1 TAPERRULE met1_width_260 ( 1001360 209935 ) ( 1004415 * ) via_260_260_hv + ( * 210025 ) ( 1004475 * ) + NEW met2 ( 1004355 209845 ) ( 1004475 * ) + NEW met1 TAPERRULE met1_width_260 ( 1004615 209935 ) ( 1012945 * ) via_260_260_hv + ( * 210025 ) ( 1013005 * ) + NEW met2 TAPERRULE met2_width_260 ( 1012945 204625 ) ( * 209735 ) + NEW met2 ( 1012865 204485 ) ( 1013025 * ) + NEW met2 ( 1012945 204360 ) via2_300_300_vx + NEW met3 ( 1012920 204385 ) ( 1012970 * ) + NEW met3 ( 1013245 204360 ) ( 1024240 * ) + NEW met3 ( 1024240 203495 ) ( * 204060 ) + NEW met3 ( 1012920 204335 ) ( 1012970 * ) + NEW met3 ( 1012920 204360 ) ( 1012645 * ) + NEW met2 ( 1012865 204235 ) ( 1013025 * ) ; + - clock_pad/PAD_A_ESD_0_H ( clock_pad PAD_A_ESD_0_H ) ; + - clock_pad/PAD_A_ESD_1_H ( clock_pad PAD_A_ESD_1_H ) ; + - clock_pad/PAD_A_NOESD_H ( clock_pad PAD_A_NOESD_H ) ; + - por ( clock_pad INP_DIS ) + + ROUTED met2 TAPERRULE met2_width_280 ( 970355 208635 ) ( * 210895 ) ; + - clock_pad/IN_H ( clock_pad IN_H ) ; +END NETS + +END DESIGN + diff --git a/gds/chip_io.gds.gz b/gds/chip_io.gds.gz index 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