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fix bug at mgmt_gpio_out by increasing the number of phases

This commit is contained in:
M0stafaRady 2022-10-03 05:45:55 -07:00
parent 79f26f6b38
commit e945c3b882
1 changed files with 2 additions and 1 deletions
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3
verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio.py
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@ -19,7 +19,7 @@ async def mgmt_gpio_out(dut):
cpu.cpu_force_reset() cpu.cpu_force_reset()
cpu.cpu_release_reset() cpu.cpu_release_reset()
cocotb.log.info(f"[TEST] Start mgmt_gpio_out test") cocotb.log.info(f"[TEST] Start mgmt_gpio_out test")
phases_fails = 2 phases_fails = 3
phases_passes = 0 phases_passes = 0
reg1 =0 # buffer reg1 =0 # buffer
reg2 = 0 #buffer reg2 = 0 #buffer
@ -50,6 +50,7 @@ async def mgmt_gpio_out(dut):
await ClockCycles(caravelEnv.clk,10) await ClockCycles(caravelEnv.clk,10)
cocotb.log.info("[TEST] passing sending {reg1} blinks ") cocotb.log.info("[TEST] passing sending {reg1} blinks ")
phases_fails -=1 phases_fails -=1
phases_passes +=1
await ClockCycles(caravelEnv.clk,10) await ClockCycles(caravelEnv.clk,10)
if phases_fails != 0: if phases_fails != 0: