diff --git a/mag/caravel_openframe.mag b/mag/caravel_openframe.mag new file mode 100644 index 00000000..1d808f85 --- /dev/null +++ b/mag/caravel_openframe.mag @@ -0,0 +1,210 @@ +magic +tech sky130A +magscale 1 2 +timestamp 1682719879 +<< checkpaint >> +rect -1260 -1260 718860 1038860 +<< error_p >> +rect 149223 18082 150855 18116 +<< metal5 >> +rect 78440 1018512 90960 1031002 +rect 129840 1018512 142360 1031002 +rect 181240 1018512 193760 1031002 +rect 232640 1018512 245160 1031002 +rect 284240 1018512 296760 1031002 +rect 334810 1018624 346978 1030788 +rect 386040 1018512 398560 1031002 +rect 475040 1018512 487560 1031002 +rect 526440 1018512 538960 1031002 +rect 577010 1018624 589178 1030788 +rect 628240 1018512 640760 1031002 +rect 6598 956440 19088 968960 +rect 698512 952840 711002 965360 +rect 6167 914054 19619 924934 +rect 697980 909666 711432 920546 +rect 6811 871210 18975 883378 +rect 698512 863640 711002 876160 +rect 6811 829010 18975 841178 +rect 698624 819822 710788 831990 +rect 6598 786640 19088 799160 +rect 698512 774440 711002 786960 +rect 6598 743440 19088 755960 +rect 698512 729440 711002 741960 +rect 6598 700240 19088 712760 +rect 698512 684440 711002 696960 +rect 6598 657040 19088 669560 +rect 698512 639240 711002 651760 +rect 6598 613840 19088 626360 +rect 698512 594240 711002 606760 +rect 6598 570640 19088 583160 +rect 698512 549040 711002 561560 +rect 6598 527440 19088 539960 +rect 698624 505222 710788 517390 +rect 6811 484410 18975 496578 +rect 697980 461866 711432 472746 +rect 6167 442854 19619 453734 +rect 698624 417022 710788 429190 +rect 6598 399840 19088 412360 +rect 698512 371840 711002 384360 +rect 6598 356640 19088 369160 +rect 698512 326640 711002 339160 +rect 6598 313440 19088 325960 +rect 6598 270240 19088 282760 +rect 698512 281640 711002 294160 +rect 6598 227040 19088 239560 +rect 698512 236640 711002 249160 +rect 6598 183840 19088 196360 +rect 698512 191440 711002 203960 +rect 698512 146440 711002 158960 +rect 6811 111610 18975 123778 +rect 698512 101240 711002 113760 +rect 6167 70054 19619 80934 +rect 80222 6811 92390 18975 +rect 136713 7143 144149 18309 +rect 187640 6598 200160 19088 +rect 243266 6167 254146 19619 +rect 296240 6598 308760 19088 +rect 351040 6598 363560 19088 +rect 405840 6598 418360 19088 +rect 460640 6598 473160 19088 +rect 515440 6598 527960 19088 +rect 570422 6811 582590 18975 +rect 624222 6811 636390 18975 +use chip_io_openframe chip_io_openframe_0 +timestamp 1682718471 +transform 1 0 0 0 1 0 +box 0 0 717600 1037600 +use openframe_project_wrapper openframe_project_wrapper_0 +timestamp 1682719879 +transform 1 0 42137 0 1 42137 +box -444 -444 633770 953770 +<< labels >> +flabel metal5 s 187640 6598 200160 19088 0 FreeSans 16000 0 0 0 gpio[38] +port 57 nsew +flabel metal5 s 296240 6598 308760 19088 0 FreeSans 16000 0 0 0 gpio[39] +port 58 nsew +flabel metal5 s 351040 6598 363560 19088 0 FreeSans 16000 0 0 0 gpio[40] +port 59 nsew +flabel metal5 s 405840 6598 418360 19088 0 FreeSans 16000 0 0 0 gpio[41] +port 60 nsew +flabel metal5 s 460640 6598 473160 19088 0 FreeSans 16000 0 0 0 gpio[42] +port 61 nsew +flabel metal5 s 515440 6598 527960 19088 0 FreeSans 16000 0 0 0 gpio[43] +port 62 nsew +flabel metal5 s 624222 6811 636390 18975 0 FreeSans 16000 0 0 0 vdda +port 5 nsew +flabel metal5 s 80222 6811 92390 18975 0 FreeSans 16000 0 0 0 vssa +port 6 nsew +flabel metal5 s 243266 6167 254146 19619 0 FreeSans 16000 0 0 0 vssd +port 8 nsew +flabel metal5 s 570422 6811 582590 18975 0 FreeSans 16000 0 0 0 vssio +port 3 nsew +flabel metal5 s 136713 7143 144149 18309 0 FreeSans 16000 0 0 0 resetb +port 63 nsew +flabel metal5 s 334810 1018624 346978 1030788 0 FreeSans 16000 0 0 0 vssio_2 +port 4 nsew +flabel metal5 s 628240 1018512 640760 1031002 0 FreeSans 16000 0 0 0 gpio[15] +port 34 nsew +flabel metal5 s 526440 1018512 538960 1031002 0 FreeSans 16000 0 0 0 gpio[16] +port 35 nsew +flabel metal5 s 475040 1018512 487560 1031002 0 FreeSans 16000 0 0 0 gpio[17] +port 36 nsew +flabel metal5 s 386040 1018512 398560 1031002 0 FreeSans 16000 0 0 0 gpio[18] +port 37 nsew +flabel metal5 s 284240 1018512 296760 1031002 0 FreeSans 16000 0 0 0 gpio[19] +port 38 nsew +flabel metal5 s 232640 1018512 245160 1031002 0 FreeSans 16000 0 0 0 gpio[20] +port 39 nsew +flabel metal5 s 181240 1018512 193760 1031002 0 FreeSans 16000 0 0 0 gpio[21] +port 40 nsew +flabel metal5 s 129840 1018512 142360 1031002 0 FreeSans 16000 0 0 0 gpio[22] +port 41 nsew +flabel metal5 s 78440 1018512 90960 1031002 0 FreeSans 16000 0 0 0 gpio[23] +port 42 nsew +flabel metal5 s 577010 1018624 589178 1030788 0 FreeSans 16000 0 0 0 vssa1 +port 12 nsew +flabel metal5 s 698512 684440 711002 696960 0 FreeSans 16000 0 0 0 gpio[10] +port 29 nsew +flabel metal5 s 698512 729440 711002 741960 0 FreeSans 16000 0 0 0 gpio[11] +port 30 nsew +flabel metal5 s 698512 774440 711002 786960 0 FreeSans 16000 0 0 0 gpio[12] +port 31 nsew +flabel metal5 s 698512 863640 711002 876160 0 FreeSans 16000 0 0 0 gpio[13] +port 32 nsew +flabel metal5 s 698512 146440 711002 158960 0 FreeSans 16000 0 0 0 gpio[1] +port 20 nsew +flabel metal5 s 698512 191440 711002 203960 0 FreeSans 16000 0 0 0 gpio[2] +port 21 nsew +flabel metal5 s 698512 236640 711002 249160 0 FreeSans 16000 0 0 0 gpio[3] +port 22 nsew +flabel metal5 s 698512 281640 711002 294160 0 FreeSans 16000 0 0 0 gpio[4] +port 23 nsew +flabel metal5 s 698512 326640 711002 339160 0 FreeSans 16000 0 0 0 gpio[5] +port 24 nsew +flabel metal5 s 698512 371840 711002 384360 0 FreeSans 16000 0 0 0 gpio[6] +port 25 nsew +flabel metal5 s 698512 549040 711002 561560 0 FreeSans 16000 0 0 0 gpio[7] +port 26 nsew +flabel metal5 s 698512 594240 711002 606760 0 FreeSans 16000 0 0 0 gpio[8] +port 27 nsew +flabel metal5 s 698512 639240 711002 651760 0 FreeSans 16000 0 0 0 gpio[9] +port 28 nsew +flabel metal5 s 697980 909666 711432 920546 0 FreeSans 16000 0 0 0 vccd1 +port 14 nsew +flabel metal5 s 698624 819822 710788 831990 0 FreeSans 16000 0 0 0 vdda1 +port 9 nsew +flabel metal5 s 698624 505222 710788 517390 0 FreeSans 16000 0 0 0 vdda1_2 +port 10 nsew +flabel metal5 s 698624 417022 710788 429190 0 FreeSans 16000 0 0 0 vssa1_2 +port 12 nsew +flabel metal5 s 697980 461866 711432 472746 0 FreeSans 16000 0 0 0 vssd1 +port 16 nsew +flabel metal5 s 698512 101240 711002 113760 0 FreeSans 16000 0 0 0 gpio[0] +port 19 nsew +flabel metal5 s 698512 952840 711002 965360 0 FreeSans 16000 0 0 0 gpio[14] +port 33 nsew +flabel metal5 s 6167 70054 19619 80934 0 FreeSans 16000 0 0 0 vccd +port 7 nsew +flabel metal5 s 6811 111610 18975 123778 0 FreeSans 16000 0 0 0 vddio +port 1 nsew +flabel metal5 s 6811 871210 18975 883378 0 FreeSans 16000 0 0 0 vddio_2 +port 2 nsew +flabel metal5 s 6598 613840 19088 626360 0 FreeSans 16000 0 0 0 gpio[29] +port 48 nsew +flabel metal5 s 6598 570640 19088 583160 0 FreeSans 16000 0 0 0 gpio[30] +port 49 nsew +flabel metal5 s 6598 527440 19088 539960 0 FreeSans 16000 0 0 0 gpio[31] +port 50 nsew +flabel metal5 s 6598 399840 19088 412360 0 FreeSans 16000 0 0 0 gpio[32] +port 51 nsew +flabel metal5 s 6598 356640 19088 369160 0 FreeSans 16000 0 0 0 gpio[33] +port 52 nsew +flabel metal5 s 6598 313440 19088 325960 0 FreeSans 16000 0 0 0 gpio[34] +port 53 nsew +flabel metal5 s 6598 270240 19088 282760 0 FreeSans 16000 0 0 0 gpio[35] +port 54 nsew +flabel metal5 s 6598 227040 19088 239560 0 FreeSans 16000 0 0 0 gpio[36] +port 55 nsew +flabel metal5 s 6598 956440 19088 968960 0 FreeSans 16000 0 0 0 gpio[24] +port 43 nsew +flabel metal5 s 6598 786640 19088 799160 0 FreeSans 16000 0 0 0 gpio[25] +port 44 nsew +flabel metal5 s 6598 743440 19088 755960 0 FreeSans 16000 0 0 0 gpio[26] +port 45 nsew +flabel metal5 s 6598 700240 19088 712760 0 FreeSans 16000 0 0 0 gpio[27] +port 46 nsew +flabel metal5 s 6598 657040 19088 669560 0 FreeSans 16000 0 0 0 gpio[28] +port 47 nsew +flabel metal5 s 6167 914054 19619 924934 0 FreeSans 16000 0 0 0 vccd2 +port 15 nsew +flabel metal5 s 6811 484410 18975 496578 0 FreeSans 16000 0 0 0 vdda2 +port 2569 nsew +flabel metal5 s 6811 829010 18975 841178 0 FreeSans 16000 0 0 0 vssa2 +port 13 nsew +flabel metal5 s 6167 442854 19619 453734 0 FreeSans 16000 0 0 0 vssd2 +port 17 nsew +flabel metal5 s 6598 183840 19088 196360 0 FreeSans 16000 0 0 0 gpio[37] +port 56 nsew +<< properties >> +string FIXED_BBOX 0 0 717600 1037600 +<< end >> diff --git a/mag/chip_io_gpio_connects_horiz.mag b/mag/chip_io_gpio_connects_horiz.mag new file mode 100644 index 00000000..7dfe7306 --- /dev/null +++ b/mag/chip_io_gpio_connects_horiz.mag @@ -0,0 +1,189 @@ +magic +tech sky130A +magscale 1 2 +timestamp 1682718471 +<< checkpaint >> +rect 675448 118535 678028 118712 +rect 675439 118532 678037 118535 +rect 674512 116974 678037 118532 +rect 674130 115945 678037 116974 +rect 674130 114359 677088 115945 +rect 674520 103456 677088 114359 +rect 674500 100854 677112 103456 +rect 674502 100852 677100 100854 +rect 674508 98629 677100 100852 +<< metal1 >> +rect 675778 117266 675830 117272 +rect 675778 117208 675830 117214 +rect 675682 113371 675734 115709 +rect 675586 112665 675638 112671 +rect 675586 112487 675638 112493 +rect 675490 109630 675542 109636 +rect 675490 109452 675542 109458 +rect 675492 101631 675540 109452 +rect 675588 108347 675636 112487 +rect 675682 109050 675734 113199 +rect 675586 108341 675638 108347 +rect 675586 108163 675638 108169 +rect 675490 101625 675542 101631 +rect 675490 101567 675542 101573 +rect 675492 100265 675540 101567 +rect 675588 100462 675636 108163 +rect 675586 100456 675638 100462 +rect 675586 100278 675638 100284 +rect 675588 100265 675636 100278 +rect 675682 99896 675734 108866 +rect 675780 102183 675828 117208 +rect 675778 102177 675830 102183 +rect 675778 102119 675830 102125 +rect 675780 102106 675828 102119 +<< via1 >> +rect 675778 117214 675830 117266 +rect 675682 113199 675734 113371 +rect 675586 112493 675638 112665 +rect 675490 109458 675542 109630 +rect 675682 108866 675734 109050 +rect 675586 108169 675638 108341 +rect 675490 101573 675542 101625 +rect 675586 100284 675638 100456 +rect 675778 102125 675830 102177 +<< metal2 >> +rect 675772 117214 675778 117266 +rect 675830 117264 675836 117266 +rect 676699 117264 676708 117270 +rect 675830 117216 676708 117264 +rect 675830 117214 675836 117216 +rect 676699 117210 676708 117216 +rect 676768 117210 676777 117270 +rect 675676 113311 675682 113371 +rect 675407 113255 675682 113311 +rect 675676 113199 675682 113255 +rect 675734 113311 675740 113371 +rect 675734 113255 675887 113311 +rect 675734 113199 675740 113255 +rect 675407 112665 675887 112667 +rect 675407 112611 675586 112665 +rect 675580 112493 675586 112611 +rect 675638 112611 675887 112665 +rect 675638 112493 675644 112611 +rect 675407 109630 675887 109631 +rect 675407 109575 675490 109630 +rect 675484 109458 675490 109575 +rect 675542 109575 675887 109630 +rect 675542 109458 675548 109575 +rect 675676 108866 675682 109050 +rect 675734 108866 675740 109050 +rect 675407 108341 675887 108343 +rect 675407 108287 675586 108341 +rect 675580 108169 675586 108287 +rect 675638 108287 675887 108341 +rect 675638 108169 675644 108287 +rect 675762 102177 675840 102179 +rect 675762 102125 675778 102177 +rect 675830 102125 675840 102177 +rect 675762 102123 675840 102125 +rect 675407 101625 675887 101627 +rect 675407 101573 675490 101625 +rect 675542 101573 675887 101625 +rect 675407 101571 675887 101573 +rect 675580 100339 675586 100456 +rect 675407 100284 675586 100339 +rect 675638 100339 675644 100456 +rect 675638 100284 675887 100339 +rect 675407 100283 675887 100284 +<< via2 >> +rect 676708 117210 676768 117270 +rect 675505 115647 675730 115703 +rect 675505 115095 675730 115151 +rect 675506 114451 675731 114507 +rect 675506 113807 675731 113863 +rect 675506 111967 675731 112023 +rect 675505 111415 675730 111471 +rect 675505 110771 675730 110827 +rect 675505 110127 675730 110183 +rect 675505 107643 675730 107699 +rect 675506 107091 675731 107147 +rect 675506 106447 675731 106503 +rect 675505 105803 675730 105859 +rect 675504 105251 675729 105307 +rect 675506 104607 675731 104663 +rect 675506 103411 675731 103467 +rect 675505 102767 675730 102823 +rect 675505 100927 675730 100983 +<< metal3 >> +rect 676708 117275 676768 117452 +rect 676703 117270 676773 117275 +rect 676703 117210 676708 117270 +rect 676768 117210 676773 117270 +rect 676703 117205 676773 117210 +rect 675407 115703 675736 115710 +rect 675407 115647 675505 115703 +rect 675730 115647 675887 115703 +rect 675407 115640 675736 115647 +rect 675407 115151 675737 115158 +rect 675407 115095 675505 115151 +rect 675730 115095 675887 115151 +rect 675407 115088 675737 115095 +rect 675407 114507 675737 114514 +rect 675407 114451 675506 114507 +rect 675731 114451 675887 114507 +rect 675407 114444 675737 114451 +rect 675407 113863 675737 113870 +rect 675407 113807 675506 113863 +rect 675731 113807 675887 113863 +rect 675407 113800 675737 113807 +rect 675407 112023 675737 112030 +rect 675407 111967 675506 112023 +rect 675731 111967 675887 112023 +rect 675407 111960 675737 111967 +rect 675407 111471 675737 111478 +rect 675407 111415 675505 111471 +rect 675730 111415 675887 111471 +rect 675407 111408 675737 111415 +rect 675407 110827 675737 110834 +rect 675407 110771 675505 110827 +rect 675730 110771 675887 110827 +rect 675407 110764 675737 110771 +rect 675407 110183 675737 110190 +rect 675407 110127 675505 110183 +rect 675730 110127 675887 110183 +rect 675407 110120 675737 110127 +rect 675407 107699 675737 107706 +rect 675407 107643 675505 107699 +rect 675730 107643 675887 107699 +rect 675407 107636 675737 107643 +rect 675407 107147 675737 107154 +rect 675407 107091 675506 107147 +rect 675731 107091 675887 107147 +rect 675407 107084 675737 107091 +rect 675407 106503 675737 106510 +rect 675407 106447 675506 106503 +rect 675731 106447 675887 106503 +rect 675407 106440 675737 106447 +rect 675407 105859 675737 105866 +rect 675407 105803 675505 105859 +rect 675730 105803 675887 105859 +rect 675407 105796 675737 105803 +rect 675406 105307 675736 105314 +rect 675406 105251 675504 105307 +rect 675729 105251 675887 105307 +rect 675406 105244 675736 105251 +rect 675407 104663 675737 104670 +rect 675407 104607 675506 104663 +rect 675731 104607 675887 104663 +rect 675407 104600 675737 104607 +rect 675407 103467 675737 103474 +rect 675407 103411 675506 103467 +rect 675731 103411 675887 103467 +rect 675407 103404 675737 103411 +rect 675407 102823 675737 102830 +rect 675407 102767 675505 102823 +rect 675730 102767 675887 102823 +rect 675407 102760 675737 102767 +rect 675407 100983 675737 100990 +rect 675407 100927 675505 100983 +rect 675730 100927 675887 100983 +rect 675407 100920 675737 100927 +<< properties >> +string flatten true +<< end >> diff --git a/mag/openframe_project_wrapper.mag b/mag/openframe_project_wrapper.mag new file mode 100644 index 00000000..6c300e0c --- /dev/null +++ b/mag/openframe_project_wrapper.mag @@ -0,0 +1,2961 @@ +magic +tech sky130A +magscale 1 2 +timestamp 1682719879 +<< checkpaint >> +rect 26979 955052 29560 955590 +rect 26977 954895 29568 955052 +rect 26197 954869 29568 954895 +rect 26197 954850 30892 954869 +rect 26197 952010 34019 954850 +rect 26197 951926 30892 952010 +rect 26977 951900 30892 951926 +rect 26977 951808 29568 951900 +rect -1684 927589 1316 928403 +rect -2249 924446 1772 927589 +rect -1684 910964 1316 924446 +rect -1726 903373 1518 910964 +rect -1684 757718 1316 903373 +rect -2039 754575 1982 757718 +rect -1684 741164 1316 754575 +rect -1726 733373 1518 741164 +rect -1684 714574 1316 733373 +rect -1987 711431 2034 714574 +rect -1684 697964 1316 711431 +rect -1726 690373 1518 697964 +rect -1684 671310 1316 690373 +rect -2039 668167 1982 671310 +rect -1684 654764 1316 668167 +rect -1726 647373 1518 654764 +rect -1684 628166 1316 647373 +rect -2199 625023 1822 628166 +rect -1684 611564 1316 625023 +rect -1726 604373 1518 611564 +rect -1684 585014 1316 604373 +rect -2151 581871 1870 585014 +rect -1684 568364 1316 581871 +rect -1726 561373 1518 568364 +rect -1684 541777 1316 561373 +rect -2035 538634 1986 541777 +rect -1684 525164 1316 538634 +rect -1726 518373 1518 525164 +rect -1684 498688 1316 518373 +rect -2069 495545 1952 498688 +rect -1684 481964 1316 495545 +rect -1726 475373 1518 481964 +rect -1684 370846 1316 475373 +rect -2054 367703 1967 370846 +rect -1684 354364 1316 367703 +rect -1726 346373 1518 354364 +rect -1684 327787 1316 346373 +rect -1968 324644 2053 327787 +rect -1684 311564 1316 324644 +rect -1726 303373 1518 311564 +rect -1684 284632 1316 303373 +rect -2017 281489 2004 284632 +rect -1684 267964 1316 281489 +rect -1726 260373 1518 267964 +rect -1684 241279 1316 260373 +rect -2028 238136 1993 241279 +rect -1684 224764 1316 238136 +rect -1726 217373 1518 224764 +rect -1684 198205 1316 217373 +rect -1857 195062 2164 198205 +rect -1684 181564 1316 195062 +rect -1726 174373 1518 181564 +rect -1684 155083 1316 174373 +rect -2110 151940 1911 155083 +rect -1684 138364 1316 151940 +rect -1726 131373 1518 138364 +rect -1684 51887 1316 131373 +rect 40340 94018 43565 970540 +rect 46451 951753 49391 955302 +rect 78177 954952 80768 955052 +rect 77380 954895 80768 954952 +rect 77380 954850 82080 954895 +rect 77380 952010 85419 954850 +rect 77380 951983 82080 952010 +rect 78177 951926 82080 951983 +rect 78177 951808 80768 951926 +rect 97889 951761 100829 955310 +rect 129377 954916 131968 955052 +rect 128579 954880 131968 954916 +rect 128579 954850 133274 954880 +rect 128579 952010 136819 954850 +rect 128579 951947 133274 952010 +rect 129377 951911 133274 951947 +rect 129377 951808 131968 951911 +rect 149253 951690 152193 955239 +rect 180577 954895 183168 955052 +rect 180577 954880 184472 954895 +rect 179767 954850 184472 954880 +rect 179767 952010 188219 954850 +rect 179767 951926 184472 952010 +rect 179767 951911 183168 951926 +rect 180577 951808 183168 951911 +rect 200573 951668 203513 955217 +rect 231777 955031 234368 955052 +rect 231002 955000 234368 955031 +rect 231002 954983 235720 955000 +rect 230894 954979 235720 954983 +rect 230874 954850 235720 954979 +rect 230874 952010 239819 954850 +rect 230874 951928 235720 952010 +rect 230874 951907 234368 951928 +rect 230894 951815 234368 951907 +rect 231777 951808 234368 951815 +rect 252211 951709 255151 955258 +rect 336177 955020 338768 955052 +rect 336177 954964 340085 955020 +rect 335372 954850 340085 954964 +rect 335372 952010 341619 954850 +rect 335372 951948 340085 952010 +rect 335372 951892 338768 951948 +rect 336177 951808 338768 951892 +rect 353953 951797 356893 955346 +rect 425177 954995 427768 955052 +rect 424333 954969 427768 954995 +rect 424333 954850 429056 954969 +rect 424333 952010 430619 954850 +rect 424333 951923 429056 952010 +rect 425177 951897 429056 951923 +rect 425177 951808 427768 951897 +rect 443126 951827 446066 955376 +rect 476377 954948 478968 955052 +rect 475540 954938 478968 954948 +rect 475540 954850 480310 954938 +rect 475540 952010 482019 954850 +rect 475540 951876 480310 952010 +rect 476377 951866 480310 951876 +rect 476377 951808 478968 951866 +rect 494479 951687 497419 955236 +rect 575777 955042 578368 955052 +rect 575777 955013 579629 955042 +rect 575777 954995 583819 955013 +rect 574935 952010 583819 954995 +rect 574935 951923 579679 952010 +rect 575777 951907 579679 951923 +rect 575777 951817 579629 951907 +rect 575777 951808 578368 951817 +rect 596230 951800 599170 955349 +rect 632010 930729 634850 930929 +rect 631808 925735 635052 930729 +rect 632010 913025 635010 925735 +rect 631695 910144 635403 913025 +rect 632010 841529 635010 910144 +rect 631808 835735 635052 841529 +rect 632010 823808 635010 835735 +rect 631658 820927 635366 823808 +rect 632010 752329 635010 820927 +rect 631808 746735 635052 752329 +rect 632010 734723 635010 746735 +rect 631794 731842 635502 734723 +rect 632010 707329 635010 731842 +rect 631808 701735 635052 707329 +rect 632010 689688 635010 701735 +rect 631769 686807 635477 689688 +rect 632010 662329 635010 686807 +rect 631808 656735 635052 662329 +rect 632010 644756 635010 656735 +rect 631769 641875 635477 644756 +rect 632010 617129 635010 641875 +rect 631827 611735 635033 617129 +rect 632010 599477 635010 611735 +rect 631774 596596 635482 599477 +rect 632010 572129 635010 596596 +rect 631827 566735 635033 572129 +rect 632010 554454 635010 566735 +rect 631679 551573 635387 554454 +rect 632010 526929 635010 551573 +rect 631827 521735 635033 526929 +rect 632010 509270 635010 521735 +rect 631786 506389 635494 509270 +rect 632010 349729 635010 506389 +rect 631827 344735 635033 349729 +rect 632010 332061 635010 344735 +rect 631753 329180 635461 332061 +rect 632010 304529 635010 329180 +rect 631827 299735 635033 304529 +rect 632010 286820 635010 299735 +rect 631790 283939 635498 286820 +rect 632010 259529 635010 283939 +rect 631827 254735 635033 259529 +rect 632010 241863 635010 254735 +rect 631741 238982 635449 241863 +rect 632010 214529 635010 238982 +rect 631827 209735 635033 214529 +rect 632010 196959 635010 209735 +rect 631827 194078 635535 196959 +rect 632010 168589 635010 194078 +rect 631827 165997 635033 168589 +rect 632010 151685 635010 165997 +rect 631827 148804 635535 151685 +rect 632010 123589 635010 148804 +rect 631827 120997 635033 123589 +rect 632010 106592 635010 120997 +rect 631633 103711 635341 106592 +rect 632010 78589 635010 103711 +rect 674034 99654 677259 968570 +rect 631827 75997 635033 78589 +rect 632010 61524 635010 75997 +rect 631646 58643 635354 61524 +rect 632010 57523 635010 58643 +rect 144759 -2101 147845 1707 +rect 253470 -1972 256599 1703 +rect 308351 -1987 311480 1688 +rect 363090 -1952 366219 1723 +rect 417863 -1947 420992 1728 +rect 472636 -2065 475765 1610 +rect -43397 -43397 -40876 -40876 +<< metal2 >> +rect 30697 953270 30758 953590 +rect 32698 953270 32759 953590 +rect 34360 953270 34416 953750 +rect 34912 953270 34968 953750 +rect 35556 953270 35612 953750 +rect 36200 953270 36256 953750 +rect 38040 953270 38096 953750 +rect 38592 953270 38648 953750 +rect 39236 953270 39292 953750 +rect 39880 953270 39936 953750 +rect 42364 953270 42420 953750 +rect 42916 953270 42972 953750 +rect 43560 953270 43616 953750 +rect 44204 953270 44260 953750 +rect 44756 953270 44812 953750 +rect 45400 953270 45456 953750 +rect 46596 953270 46652 953750 +rect 47240 953270 47296 953750 +rect 49080 953270 49136 953750 +rect 82097 953270 82158 953590 +rect 84098 953270 84159 953590 +rect 85760 953270 85816 953750 +rect 86312 953270 86368 953750 +rect 86956 953270 87012 953750 +rect 87600 953270 87656 953750 +rect 89440 953270 89496 953750 +rect 89992 953270 90048 953750 +rect 90636 953270 90692 953750 +rect 91280 953270 91336 953750 +rect 93764 953270 93820 953750 +rect 94316 953270 94372 953750 +rect 94960 953270 95016 953750 +rect 95604 953270 95660 953750 +rect 96156 953270 96212 953750 +rect 96800 953270 96856 953750 +rect 97996 953270 98052 953750 +rect 98640 953270 98696 953750 +rect 100480 953270 100536 953750 +rect 133497 953270 133558 953590 +rect 135498 953270 135559 953590 +rect 137160 953270 137216 953750 +rect 137712 953270 137768 953750 +rect 138356 953270 138412 953750 +rect 139000 953270 139056 953750 +rect 140840 953270 140896 953750 +rect 141392 953270 141448 953750 +rect 142036 953270 142092 953750 +rect 142680 953270 142736 953750 +rect 145164 953270 145220 953750 +rect 145716 953270 145772 953750 +rect 146360 953270 146416 953750 +rect 147004 953270 147060 953750 +rect 147556 953270 147612 953750 +rect 148200 953270 148256 953750 +rect 149396 953270 149452 953750 +rect 150040 953270 150096 953750 +rect 151880 953270 151936 953750 +rect 184897 953270 184958 953590 +rect 186898 953270 186959 953590 +rect 188560 953270 188616 953750 +rect 189112 953270 189168 953750 +rect 189756 953270 189812 953750 +rect 190400 953270 190456 953750 +rect 192240 953270 192296 953750 +rect 192792 953270 192848 953750 +rect 193436 953270 193492 953750 +rect 194080 953270 194136 953750 +rect 196564 953270 196620 953750 +rect 197116 953270 197172 953750 +rect 197760 953270 197816 953750 +rect 198404 953270 198460 953750 +rect 198956 953270 199012 953750 +rect 199600 953270 199656 953750 +rect 200796 953270 200852 953750 +rect 201440 953270 201496 953750 +rect 203280 953270 203336 953750 +rect 236497 953270 236558 953590 +rect 238498 953270 238559 953590 +rect 240160 953270 240216 953750 +rect 240712 953270 240768 953750 +rect 241356 953270 241412 953750 +rect 242000 953270 242056 953750 +rect 243840 953270 243896 953750 +rect 244392 953270 244448 953750 +rect 245036 953270 245092 953750 +rect 245680 953270 245736 953750 +rect 248164 953270 248220 953750 +rect 248716 953270 248772 953750 +rect 249360 953270 249416 953750 +rect 250004 953270 250060 953750 +rect 250556 953270 250612 953750 +rect 251200 953270 251256 953750 +rect 252396 953270 252452 953750 +rect 253040 953270 253096 953750 +rect 254880 953270 254936 953750 +rect 338297 953270 338358 953590 +rect 340298 953270 340359 953590 +rect 341960 953270 342016 953750 +rect 342512 953270 342568 953750 +rect 343156 953270 343212 953750 +rect 343800 953270 343856 953750 +rect 345640 953270 345696 953750 +rect 346192 953270 346248 953750 +rect 346836 953270 346892 953750 +rect 347480 953270 347536 953750 +rect 349964 953270 350020 953750 +rect 350516 953270 350572 953750 +rect 351160 953270 351216 953750 +rect 351804 953270 351860 953750 +rect 352356 953270 352412 953750 +rect 353000 953270 353056 953750 +rect 354196 953270 354252 953750 +rect 354840 953270 354896 953750 +rect 356680 953270 356736 953750 +rect 427297 953270 427358 953590 +rect 429298 953270 429359 953590 +rect 430960 953270 431016 953750 +rect 431512 953270 431568 953750 +rect 432156 953270 432212 953750 +rect 432800 953270 432856 953750 +rect 434640 953270 434696 953750 +rect 435192 953270 435248 953750 +rect 435836 953270 435892 953750 +rect 436480 953270 436536 953750 +rect 438964 953270 439020 953750 +rect 439516 953270 439572 953750 +rect 440160 953270 440216 953750 +rect 440804 953270 440860 953750 +rect 441356 953270 441412 953750 +rect 442000 953270 442056 953750 +rect 443196 953270 443252 953750 +rect 443840 953270 443896 953750 +rect 445680 953270 445736 953750 +rect 478697 953270 478758 953590 +rect 480698 953270 480759 953590 +rect 482360 953270 482416 953750 +rect 482912 953270 482968 953750 +rect 483556 953270 483612 953750 +rect 484200 953270 484256 953750 +rect 486040 953270 486096 953750 +rect 486592 953270 486648 953750 +rect 487236 953270 487292 953750 +rect 487880 953270 487936 953750 +rect 490364 953270 490420 953750 +rect 490916 953270 490972 953750 +rect 491560 953270 491616 953750 +rect 492204 953270 492260 953750 +rect 492756 953270 492812 953750 +rect 493400 953270 493456 953750 +rect 494596 953270 494652 953750 +rect 495240 953270 495296 953750 +rect 497080 953270 497136 953750 +rect 580497 953270 580558 953590 +rect 582498 953270 582559 953590 +rect 584160 953270 584216 953750 +rect 584712 953270 584768 953750 +rect 585356 953270 585412 953750 +rect 586000 953270 586056 953750 +rect 587840 953270 587896 953750 +rect 588392 953270 588448 953750 +rect 589036 953270 589092 953750 +rect 589680 953270 589736 953750 +rect 592164 953270 592220 953750 +rect 592716 953270 592772 953750 +rect 593360 953270 593416 953750 +rect 594004 953270 594060 953750 +rect 594556 953270 594612 953750 +rect 595200 953270 595256 953750 +rect 596396 953270 596452 953750 +rect 597040 953270 597096 953750 +rect 598880 953270 598936 953750 +rect 99571 -90 99637 56 +rect 110164 -116 110220 56 +rect 145190 -424 145246 56 +rect 147030 -424 147086 56 +rect 147674 -424 147730 56 +rect 148870 -424 148926 56 +rect 149514 -424 149570 56 +rect 150066 -274 150123 56 +rect 150066 -424 150122 -274 +rect 150710 -424 150766 56 +rect 151354 -424 151410 56 +rect 151906 -424 151962 56 +rect 154390 -424 154446 56 +rect 155034 -424 155090 56 +rect 155678 -424 155734 56 +rect 156230 -424 156286 56 +rect 158070 -424 158126 56 +rect 158714 -424 158770 56 +rect 159358 -424 159414 56 +rect 159910 -424 159966 56 +rect 160580 -260 160632 56 +rect 163791 -259 163843 56 +rect 253790 -424 253846 56 +rect 255630 -424 255686 56 +rect 256274 -424 256330 56 +rect 257470 -424 257526 56 +rect 258114 -424 258170 56 +rect 258666 -424 258722 56 +rect 259310 -424 259366 56 +rect 259954 -424 260010 56 +rect 260506 -424 260562 56 +rect 262990 -424 263046 56 +rect 263634 -424 263690 56 +rect 264278 -424 264334 56 +rect 264830 -424 264886 56 +rect 266670 -424 266726 56 +rect 267314 -424 267370 56 +rect 267958 -424 268014 56 +rect 268510 -424 268566 56 +rect 269180 -260 269232 56 +rect 273360 -260 273412 56 +rect 308590 -424 308646 56 +rect 310430 -424 310486 56 +rect 311074 -424 311130 56 +rect 312270 -424 312326 56 +rect 312914 -424 312970 56 +rect 313466 -424 313522 56 +rect 314110 -424 314166 56 +rect 314754 -424 314810 56 +rect 315306 -424 315362 56 +rect 317790 -424 317846 56 +rect 318434 -424 318490 56 +rect 319078 -424 319134 56 +rect 319630 -424 319686 56 +rect 321470 -424 321526 56 +rect 322114 -424 322170 56 +rect 322758 -424 322814 56 +rect 323310 -424 323366 56 +rect 323980 -260 324032 56 +rect 328165 -282 328217 34 +rect 363390 -424 363446 56 +rect 365230 -424 365286 56 +rect 365874 -424 365930 56 +rect 367070 -424 367126 56 +rect 367714 -424 367770 56 +rect 368266 -424 368322 56 +rect 368910 -424 368966 56 +rect 369554 -424 369610 56 +rect 370106 -424 370162 56 +rect 372590 -424 372646 56 +rect 373234 -424 373290 56 +rect 373878 -424 373934 56 +rect 374430 -424 374486 56 +rect 376270 -424 376326 56 +rect 376914 -424 376970 56 +rect 377558 -424 377614 56 +rect 378110 -424 378166 56 +rect 378780 -260 378832 56 +rect 382978 -260 383030 56 +rect 418190 -424 418246 56 +rect 420030 -424 420086 56 +rect 420674 -424 420730 56 +rect 421870 -424 421926 56 +rect 422514 -424 422570 56 +rect 423066 -424 423122 56 +rect 423710 -424 423766 56 +rect 424354 -424 424410 56 +rect 424906 -424 424962 56 +rect 427390 -424 427446 56 +rect 428034 -424 428090 56 +rect 428678 -424 428734 56 +rect 429230 -424 429286 56 +rect 431070 -424 431126 56 +rect 431714 -424 431770 56 +rect 432358 -424 432414 56 +rect 432910 -424 432966 56 +rect 433580 -260 433632 56 +rect 437778 -260 437830 56 +rect 472990 -424 473046 56 +rect 474830 -424 474886 56 +rect 475474 -424 475530 56 +rect 476670 -424 476726 56 +rect 477314 -424 477370 56 +rect 477866 -424 477922 56 +rect 478510 -424 478566 56 +rect 479154 -424 479210 56 +rect 479706 -424 479762 56 +rect 482190 -424 482246 56 +rect 482834 -424 482890 56 +rect 483478 -424 483534 56 +rect 484030 -424 484086 56 +rect 485870 -424 485926 56 +rect 486514 -424 486570 56 +rect 487158 -424 487214 56 +rect 487710 -424 487766 56 +rect 488380 -260 488432 56 +rect 492635 -260 492687 56 +rect 605082 -260 605134 56 +rect 605306 -260 605358 56 +rect 605530 -260 605582 56 +rect 605754 -260 605806 56 +rect 605978 -260 606030 56 +rect 606202 -260 606254 56 +rect 606426 -260 606478 56 +rect 606650 -260 606702 56 +rect 606874 -260 606926 56 +rect 607098 -260 607150 56 +rect 607322 -260 607374 56 +rect 607546 -260 607598 56 +rect 607770 -260 607822 56 +rect 607994 -260 608046 56 +rect 608218 -260 608270 56 +rect 608442 -260 608494 56 +rect 608666 -260 608718 56 +rect 608890 -260 608942 56 +rect 609114 -260 609166 56 +rect 609338 -260 609390 56 +rect 609562 -260 609614 56 +rect 609786 -260 609838 56 +rect 610010 -260 610062 56 +rect 610234 -260 610286 56 +rect 610458 -260 610510 56 +rect 610682 -260 610734 56 +rect 610906 -260 610958 56 +rect 611130 -260 611182 56 +rect 611354 -260 611406 56 +rect 611578 -260 611630 56 +rect 611802 -260 611854 56 +rect 612026 -260 612078 56 +<< metal3 >> +rect 291362 953270 296142 953770 +rect 301341 953270 306121 953770 +rect 533562 953270 538342 953770 +rect 543541 953270 548321 953770 +rect 633270 929607 633590 929669 +rect 633270 927605 633590 927667 +rect -424 927073 56 927143 +rect -424 925233 56 925303 +rect 633270 925103 633750 925173 +rect -424 924589 56 924659 +rect 633270 924551 633750 924621 +rect 633270 923907 633750 923977 +rect -424 923393 56 923463 +rect 633270 923263 633750 923333 +rect -424 922749 56 922819 +rect -424 922197 56 922267 +rect -424 921553 56 921623 +rect 633270 921423 633750 921493 +rect -424 920909 56 920979 +rect 633270 920871 633750 920941 +rect -424 920357 56 920427 +rect 633270 920227 633750 920297 +rect 633270 919583 633750 919653 +rect -424 917873 56 917943 +rect -424 917229 56 917299 +rect 633270 917099 633750 917169 +rect -424 916585 56 916655 +rect 633270 916547 633750 916617 +rect -424 916033 56 916103 +rect 633270 915903 633750 915973 +rect 633270 915259 633750 915329 +rect 633270 914707 633750 914777 +rect -424 914193 56 914263 +rect 633270 914063 633750 914133 +rect -424 913549 56 913619 +rect -424 912905 56 912975 +rect 633270 912867 633750 912937 +rect -424 912353 56 912423 +rect 633270 912223 633750 912293 +rect 633270 910383 633750 910453 +rect -264 909844 56 909904 +rect -264 907844 56 907904 +rect -444 880014 56 884803 +rect -444 875053 56 879715 +rect 633270 875563 633770 880363 +rect -444 869963 56 874763 +rect 633270 870611 633770 875273 +rect 633270 865523 633770 870312 +rect -444 837741 56 842521 +rect 633270 840407 633590 840469 +rect 633270 838405 633590 838467 +rect 633270 835903 633750 835973 +rect 633270 835351 633750 835421 +rect 633270 834707 633750 834777 +rect 633270 834063 633750 834133 +rect -444 827762 56 832542 +rect 633270 832223 633750 832293 +rect 633270 831671 633750 831741 +rect 633270 831027 633750 831097 +rect 633270 830383 633750 830453 +rect 633270 827899 633750 827969 +rect 633270 827347 633750 827417 +rect 633270 826703 633750 826773 +rect 633270 826059 633750 826129 +rect 633270 825507 633750 825577 +rect 633270 824863 633750 824933 +rect 633270 823667 633750 823737 +rect 633270 823023 633750 823093 +rect 633270 821183 633750 821253 +rect -444 795541 56 800321 +rect -444 785562 56 790342 +rect 633270 786384 633770 791164 +rect 633270 776405 633770 781185 +rect -424 757273 56 757343 +rect -424 755433 56 755503 +rect -424 754789 56 754859 +rect -424 753593 56 753663 +rect -424 752949 56 753019 +rect -424 752397 56 752467 +rect -424 751753 56 751823 +rect 633270 751207 633590 751269 +rect -424 751109 56 751179 +rect -424 750557 56 750627 +rect 633270 749205 633590 749267 +rect -424 748073 56 748143 +rect -424 747429 56 747499 +rect -424 746785 56 746855 +rect 633270 746703 633750 746773 +rect -424 746233 56 746303 +rect 633270 746151 633750 746221 +rect 633270 745507 633750 745577 +rect 633270 744863 633750 744933 +rect -424 744393 56 744463 +rect -424 743749 56 743819 +rect -424 743105 56 743175 +rect 633270 743023 633750 743093 +rect -424 742553 56 742623 +rect 633270 742471 633750 742541 +rect 633270 741827 633750 741897 +rect 633270 741183 633750 741253 +rect -264 740044 56 740104 +rect 633270 738699 633750 738769 +rect 633270 738147 633750 738217 +rect -264 738044 56 738104 +rect 633270 737503 633750 737573 +rect 633270 736859 633750 736929 +rect 633270 736307 633750 736377 +rect 633270 735663 633750 735733 +rect 633270 734467 633750 734537 +rect 633270 733823 633750 733893 +rect 633270 731983 633750 732053 +rect -424 714073 56 714143 +rect -424 712233 56 712303 +rect -424 711589 56 711659 +rect -424 710393 56 710463 +rect -424 709749 56 709819 +rect -424 709197 56 709267 +rect -424 708553 56 708623 +rect -424 707909 56 707979 +rect -424 707357 56 707427 +rect 633270 706207 633590 706269 +rect -424 704873 56 704943 +rect -424 704229 56 704299 +rect 633270 704205 633590 704267 +rect -424 703585 56 703655 +rect -424 703033 56 703103 +rect 633270 701703 633750 701773 +rect -424 701193 56 701263 +rect 633270 701151 633750 701221 +rect -424 700549 56 700619 +rect 633270 700507 633750 700577 +rect -424 699905 56 699975 +rect 633270 699863 633750 699933 +rect -424 699353 56 699423 +rect 633270 698023 633750 698093 +rect 633270 697471 633750 697541 +rect -264 696844 56 696904 +rect 633270 696827 633750 696897 +rect 633270 696183 633750 696253 +rect -264 694844 56 694904 +rect 633270 693699 633750 693769 +rect 633270 693147 633750 693217 +rect 633270 692503 633750 692573 +rect 633270 691859 633750 691929 +rect 633270 691307 633750 691377 +rect 633270 690663 633750 690733 +rect 633270 689467 633750 689537 +rect 633270 688823 633750 688893 +rect 633270 686983 633750 687053 +rect -424 670873 56 670943 +rect -424 669033 56 669103 +rect -424 668389 56 668459 +rect -424 667193 56 667263 +rect -424 666549 56 666619 +rect -424 665997 56 666067 +rect -424 665353 56 665423 +rect -424 664709 56 664779 +rect -424 664157 56 664227 +rect -424 661673 56 661743 +rect 633270 661207 633590 661269 +rect -424 661029 56 661099 +rect -424 660385 56 660455 +rect -424 659833 56 659903 +rect 633270 659205 633590 659267 +rect -424 657993 56 658063 +rect -424 657349 56 657419 +rect -424 656705 56 656775 +rect 633270 656703 633750 656773 +rect -424 656153 56 656223 +rect 633270 656151 633750 656221 +rect 633270 655507 633750 655577 +rect 633270 654863 633750 654933 +rect -264 653644 56 653704 +rect 633270 653023 633750 653093 +rect 633270 652471 633750 652541 +rect 633270 651827 633750 651897 +rect -264 651644 56 651704 +rect 633270 651183 633750 651253 +rect 633270 648699 633750 648769 +rect 633270 648147 633750 648217 +rect 633270 647503 633750 647573 +rect 633270 646859 633750 646929 +rect 633270 646307 633750 646377 +rect 633270 645663 633750 645733 +rect 633270 644467 633750 644537 +rect 633270 643823 633750 643893 +rect 633270 641983 633750 642053 +rect -424 627673 56 627743 +rect -424 625833 56 625903 +rect -424 625189 56 625259 +rect -424 623993 56 624063 +rect -424 623349 56 623419 +rect -424 622797 56 622867 +rect -424 622153 56 622223 +rect -424 621509 56 621579 +rect -424 620957 56 621027 +rect -424 618473 56 618543 +rect -424 617829 56 617899 +rect -424 617185 56 617255 +rect -424 616633 56 616703 +rect 633270 616007 633590 616069 +rect -424 614793 56 614863 +rect -424 614149 56 614219 +rect 633270 614005 633590 614067 +rect -424 613505 56 613575 +rect -424 612953 56 613023 +rect 633270 611503 633750 611573 +rect 633270 610951 633750 611021 +rect -264 610444 56 610504 +rect 633270 610307 633750 610377 +rect 633270 609663 633750 609733 +rect -264 608444 56 608504 +rect 633270 607823 633750 607893 +rect 633270 607271 633750 607341 +rect 633270 606627 633750 606697 +rect 633270 605983 633750 606053 +rect 633270 603499 633750 603569 +rect 633270 602947 633750 603017 +rect 633270 602303 633750 602373 +rect 633270 601659 633750 601729 +rect 633270 601107 633750 601177 +rect 633270 600463 633750 600533 +rect 633270 599267 633750 599337 +rect 633270 598623 633750 598693 +rect 633270 596783 633750 596853 +rect -424 584473 56 584543 +rect -424 582633 56 582703 +rect -424 581989 56 582059 +rect -424 580793 56 580863 +rect -424 580149 56 580219 +rect -424 579597 56 579667 +rect -424 578953 56 579023 +rect -424 578309 56 578379 +rect -424 577757 56 577827 +rect -424 575273 56 575343 +rect -424 574629 56 574699 +rect -424 573985 56 574055 +rect -424 573433 56 573503 +rect -424 571593 56 571663 +rect -424 570949 56 571019 +rect 633270 571007 633590 571069 +rect -424 570305 56 570375 +rect -424 569753 56 569823 +rect 633270 569005 633590 569067 +rect -264 567244 56 567304 +rect 633270 566503 633750 566573 +rect 633270 565951 633750 566021 +rect 633270 565307 633750 565377 +rect -264 565244 56 565304 +rect 633270 564663 633750 564733 +rect 633270 562823 633750 562893 +rect 633270 562271 633750 562341 +rect 633270 561627 633750 561697 +rect 633270 560983 633750 561053 +rect 633270 558499 633750 558569 +rect 633270 557947 633750 558017 +rect 633270 557303 633750 557373 +rect 633270 556659 633750 556729 +rect 633270 556107 633750 556177 +rect 633270 555463 633750 555533 +rect 633270 554267 633750 554337 +rect 633270 553623 633750 553693 +rect 633270 551783 633750 551853 +rect -424 541273 56 541343 +rect -424 539433 56 539503 +rect -424 538789 56 538859 +rect -424 537593 56 537663 +rect -424 536949 56 537019 +rect -424 536397 56 536467 +rect -424 535753 56 535823 +rect -424 535109 56 535179 +rect -424 534557 56 534627 +rect -424 532073 56 532143 +rect -424 531429 56 531499 +rect -424 530785 56 530855 +rect -424 530233 56 530303 +rect -424 528393 56 528463 +rect -424 527749 56 527819 +rect -424 527105 56 527175 +rect -424 526553 56 526623 +rect 633270 525807 633590 525869 +rect -264 524044 56 524104 +rect 633270 523805 633590 523867 +rect -264 522044 56 522104 +rect 633270 521303 633750 521373 +rect 633270 520751 633750 520821 +rect 633270 520107 633750 520177 +rect 633270 519463 633750 519533 +rect 633270 517623 633750 517693 +rect 633270 517071 633750 517141 +rect 633270 516427 633750 516497 +rect 633270 515783 633750 515853 +rect 633270 513299 633750 513369 +rect 633270 512747 633750 512817 +rect 633270 512103 633750 512173 +rect 633270 511459 633750 511529 +rect 633270 510907 633750 510977 +rect 633270 510263 633750 510333 +rect 633270 509067 633750 509137 +rect 633270 508423 633750 508493 +rect 633270 506583 633750 506653 +rect -424 498073 56 498143 +rect -424 496233 56 496303 +rect -424 495589 56 495659 +rect -424 494393 56 494463 +rect -424 493749 56 493819 +rect -424 493197 56 493267 +rect -424 492553 56 492623 +rect -424 491909 56 491979 +rect -424 491357 56 491427 +rect -424 488873 56 488943 +rect -424 488229 56 488299 +rect -424 487585 56 487655 +rect -424 487033 56 487103 +rect -424 485193 56 485263 +rect -424 484549 56 484619 +rect -424 483905 56 483975 +rect -424 483353 56 483423 +rect -264 480844 56 480904 +rect -264 478844 56 478904 +rect 633270 471784 633770 476564 +rect 633270 461805 633770 466585 +rect -444 450941 56 455721 +rect -444 440962 56 445742 +rect 633270 427763 633770 432563 +rect 633270 422812 633770 427463 +rect 633270 417723 633770 422512 +rect -444 408814 56 413603 +rect -444 403863 56 408514 +rect -444 398763 56 403563 +rect 633270 383584 633770 388364 +rect 633270 373605 633770 378385 +rect -424 370473 56 370543 +rect -424 368633 56 368703 +rect -424 367989 56 368059 +rect -424 366793 56 366863 +rect -424 366149 56 366219 +rect -424 365597 56 365667 +rect -424 364953 56 365023 +rect -424 364309 56 364379 +rect -424 363757 56 363827 +rect -424 361273 56 361343 +rect -424 360629 56 360699 +rect -424 359985 56 360055 +rect -424 359433 56 359503 +rect -424 357593 56 357663 +rect -424 356949 56 357019 +rect -424 356305 56 356375 +rect -424 355753 56 355823 +rect -264 353244 56 353304 +rect -264 351244 56 351304 +rect 633270 348607 633590 348669 +rect 633270 346605 633590 346667 +rect 633270 344103 633750 344173 +rect 633270 343551 633750 343621 +rect 633270 342907 633750 342977 +rect 633270 342263 633750 342333 +rect 633270 340423 633750 340493 +rect 633270 339871 633750 339941 +rect 633270 339227 633750 339297 +rect 633270 338583 633750 338653 +rect 633270 336099 633750 336169 +rect 633270 335547 633750 335617 +rect 633270 334903 633750 334973 +rect 633270 334259 633750 334329 +rect 633270 333707 633750 333777 +rect 633270 333063 633750 333133 +rect 633270 331867 633750 331937 +rect 633270 331223 633750 331293 +rect 633270 329383 633750 329453 +rect -424 327273 56 327343 +rect -424 325433 56 325503 +rect -424 324789 56 324859 +rect -424 323593 56 323663 +rect -424 322949 56 323019 +rect -424 322397 56 322467 +rect -424 321753 56 321823 +rect -424 321109 56 321179 +rect -424 320557 56 320627 +rect -424 318073 56 318143 +rect -424 317429 56 317499 +rect -424 316785 56 316855 +rect -424 316233 56 316303 +rect -424 314393 56 314463 +rect -424 313749 56 313819 +rect -424 313105 56 313175 +rect -424 312553 56 312623 +rect -264 310044 56 310104 +rect -264 308044 56 308104 +rect 633270 303407 633590 303469 +rect 633270 301405 633590 301467 +rect 633270 298903 633750 298973 +rect 633270 298351 633750 298421 +rect 633270 297707 633750 297777 +rect 633270 297063 633750 297133 +rect 633270 295223 633750 295293 +rect 633270 294671 633750 294741 +rect 633270 294027 633750 294097 +rect 633270 293383 633750 293453 +rect 633270 290899 633750 290969 +rect 633270 290347 633750 290417 +rect 633270 289703 633750 289773 +rect 633270 289059 633750 289129 +rect 633270 288507 633750 288577 +rect 633270 287863 633750 287933 +rect 633270 286667 633750 286737 +rect 633270 286023 633750 286093 +rect 633270 284183 633750 284253 +rect -424 284073 56 284143 +rect -424 282233 56 282303 +rect -424 281589 56 281659 +rect -424 280393 56 280463 +rect -424 279749 56 279819 +rect -424 279197 56 279267 +rect -424 278553 56 278623 +rect -424 277909 56 277979 +rect -424 277357 56 277427 +rect -424 274873 56 274943 +rect -424 274229 56 274299 +rect -424 273585 56 273655 +rect -424 273033 56 273103 +rect -424 271193 56 271263 +rect -424 270549 56 270619 +rect -424 269905 56 269975 +rect -424 269353 56 269423 +rect -264 266844 56 266904 +rect -264 264844 56 264904 +rect 633270 258407 633590 258469 +rect 633270 256405 633590 256467 +rect 633270 253903 633750 253973 +rect 633270 253351 633750 253421 +rect 633270 252707 633750 252777 +rect 633270 252063 633750 252133 +rect 633270 250223 633750 250293 +rect 633270 249671 633750 249741 +rect 633270 249027 633750 249097 +rect 633270 248383 633750 248453 +rect 633270 245899 633750 245969 +rect 633270 245347 633750 245417 +rect 633270 244703 633750 244773 +rect 633270 244059 633750 244129 +rect 633270 243507 633750 243577 +rect 633270 242863 633750 242933 +rect 633270 241667 633750 241737 +rect 633270 241023 633750 241093 +rect -424 240873 56 240943 +rect 633270 239183 633750 239253 +rect -424 239033 56 239103 +rect -424 238389 56 238459 +rect -424 237193 56 237263 +rect -424 236549 56 236619 +rect -424 235997 56 236067 +rect -424 235353 56 235423 +rect -424 234709 56 234779 +rect -424 234157 56 234227 +rect -424 231673 56 231743 +rect -424 231029 56 231099 +rect -424 230385 56 230455 +rect -424 229833 56 229903 +rect -424 227993 56 228063 +rect -424 227349 56 227419 +rect -424 226705 56 226775 +rect -424 226153 56 226223 +rect -264 223644 56 223704 +rect -264 221644 56 221704 +rect 633270 213407 633590 213469 +rect 633270 211405 633590 211467 +rect 633270 208903 633750 208973 +rect 633270 208351 633750 208421 +rect 633270 207707 633750 207777 +rect 633270 207063 633750 207133 +rect 633270 205223 633750 205293 +rect 633270 204671 633750 204741 +rect 633270 204027 633750 204097 +rect 633270 203383 633750 203453 +rect 633270 200899 633750 200969 +rect 633270 200347 633750 200417 +rect 633270 199703 633750 199773 +rect 633270 199059 633750 199129 +rect 633270 198507 633750 198577 +rect 633270 197863 633750 197933 +rect -424 197673 56 197744 +rect 633270 196667 633750 196737 +rect 633270 196023 633750 196093 +rect -424 195833 56 195904 +rect -424 195189 56 195260 +rect 633270 194183 633750 194253 +rect -424 193993 56 194064 +rect -424 193349 56 193420 +rect -424 192797 56 192868 +rect -424 192153 56 192224 +rect -424 191509 56 191580 +rect -424 190957 56 191028 +rect -424 188473 56 188544 +rect -424 187829 56 187900 +rect -424 187185 56 187256 +rect -424 186633 56 186704 +rect -424 184793 56 184864 +rect -424 184149 56 184220 +rect -424 183505 56 183576 +rect -424 182953 56 183024 +rect -264 180444 56 180504 +rect -264 178444 56 178504 +rect 633270 168007 633590 168069 +rect 633270 166005 633590 166067 +rect 633270 163703 633750 163773 +rect 633270 163151 633750 163221 +rect 633270 162507 633750 162577 +rect 633270 161863 633750 161933 +rect 633270 160023 633750 160093 +rect 633270 159471 633750 159541 +rect 633270 158827 633750 158897 +rect 633270 158183 633750 158253 +rect 633270 155699 633750 155769 +rect 633270 155147 633750 155217 +rect -424 154473 56 154544 +rect 633270 154503 633750 154573 +rect 633270 153859 633750 153929 +rect 633270 153307 633750 153377 +rect -424 152633 56 152704 +rect 633270 152663 633750 152733 +rect -424 151989 56 152060 +rect 633270 151467 633750 151537 +rect -424 150793 56 150864 +rect 633270 150823 633750 150893 +rect -424 150149 56 150220 +rect -424 149597 56 149668 +rect -424 148953 56 149024 +rect 633270 148983 633750 149053 +rect -424 148309 56 148380 +rect -424 147757 56 147828 +rect -424 145273 56 145344 +rect -424 144629 56 144700 +rect -424 143985 56 144056 +rect -424 143433 56 143504 +rect -424 141600 56 141656 +rect -424 140949 56 141020 +rect -424 140305 56 140376 +rect -424 139753 56 139824 +rect -264 137244 56 137304 +rect -264 135244 56 135304 +rect 633270 123007 633590 123069 +rect 633270 121005 633590 121067 +rect 633270 118703 633750 118773 +rect 633270 118151 633750 118221 +rect 633270 117507 633750 117577 +rect 633270 116863 633750 116933 +rect 633270 115023 633750 115093 +rect 633270 114471 633750 114541 +rect 633270 113827 633750 113897 +rect 633270 113183 633750 113253 +rect 633270 110699 633750 110769 +rect 633270 110147 633750 110217 +rect 633270 109503 633750 109573 +rect 633270 108859 633750 108929 +rect 633270 108307 633750 108377 +rect 633270 107663 633750 107733 +rect 633270 106467 633750 106537 +rect 633270 105823 633750 105893 +rect 633270 103983 633750 104053 +rect -444 78141 56 82921 +rect 633270 78007 633590 78069 +rect 633270 76005 633590 76067 +rect 633270 73503 633750 73573 +rect 633270 72951 633750 73021 +rect -444 68162 56 72942 +rect 633270 72307 633750 72377 +rect 633270 71663 633750 71733 +rect 633270 69823 633750 69893 +rect 633270 69271 633750 69341 +rect 633270 68627 633750 68697 +rect 633270 67983 633750 68053 +rect 633270 65499 633750 65569 +rect 633270 64947 633750 65017 +rect 633270 64303 633750 64373 +rect 633270 63659 633750 63729 +rect 633270 63107 633750 63177 +rect 633270 62463 633750 62533 +rect 633270 61267 633750 61337 +rect 633270 60623 633750 60693 +rect 633270 58783 633750 58853 +rect -283 53595 56 53665 +rect -283 53372 56 53442 +rect -283 53147 56 53217 +rect -444 36014 56 40803 +rect -444 25963 56 30763 +rect 36805 -444 41585 56 +rect 46784 -444 51564 57 +rect 199283 -444 203912 56 +rect 209163 -444 213963 56 +rect 527005 -444 531785 56 +rect 536984 -444 541764 56 +rect 580805 -444 585585 56 +rect 590784 -444 595564 56 +<< comment >> +rect -400 953326 633726 953726 +rect -400 0 0 953326 +rect 633326 0 633726 953326 +rect -400 -400 633726 0 +<< labels >> +flabel metal2 485870 -424 485926 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[43] +port 290 nsew +flabel metal2 s 594004 953270 594060 953750 0 FreeSans 400 90 0 0 gpio_analog_en[15] +port 450 nsew +flabel metal2 s 592716 953270 592772 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[15] +port 538 nsew +flabel metal2 s 589680 953270 589736 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[15] +port 494 nsew +flabel metal2 s 593360 953270 593416 953750 0 FreeSans 400 90 0 0 gpio_dm0[15] +port 582 nsew +flabel metal2 s 595200 953270 595256 953750 0 FreeSans 400 90 0 0 gpio_dm1[15] +port 626 nsew +flabel metal2 s 589036 953270 589092 953750 0 FreeSans 400 90 0 0 gpio_dm2[15] +port 670 nsew +flabel metal2 s 588392 953270 588448 953750 0 FreeSans 400 90 0 0 gpio_holdover[15] +port 406 nsew +flabel metal2 s 585356 953270 585412 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[15] +port 274 nsew +flabel metal2 s 592164 953270 592220 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[15] +port 230 nsew +flabel metal2 s 584712 953270 584768 953750 0 FreeSans 400 90 0 0 gpio_oeb[15] +port 186 nsew +flabel metal2 s 587840 953270 587896 953750 0 FreeSans 400 90 0 0 gpio_out[15] +port 142 nsew +flabel metal2 s 597040 953270 597096 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[15] +port 362 nsew +flabel metal2 s 586000 953270 586056 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[15] +port 318 nsew +flabel metal2 s 598880 953270 598936 953750 0 FreeSans 400 90 0 0 gpio_in[15] +port 714 nsew +flabel metal2 s 492204 953270 492260 953750 0 FreeSans 400 90 0 0 gpio_analog_en[16] +port 449 nsew +flabel metal2 s 490916 953270 490972 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[16] +port 537 nsew +flabel metal2 s 487880 953270 487936 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[16] +port 493 nsew +flabel metal2 s 491560 953270 491616 953750 0 FreeSans 400 90 0 0 gpio_dm0[16] +port 581 nsew +flabel metal2 s 493400 953270 493456 953750 0 FreeSans 400 90 0 0 gpio_dm1[16] +port 625 nsew +flabel metal2 s 487236 953270 487292 953750 0 FreeSans 400 90 0 0 gpio_dm2[16] +port 669 nsew +flabel metal2 s 486592 953270 486648 953750 0 FreeSans 400 90 0 0 gpio_holdover[16] +port 405 nsew +flabel metal2 s 483556 953270 483612 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[16] +port 273 nsew +flabel metal2 s 490364 953270 490420 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[16] +port 229 nsew +flabel metal2 s 482912 953270 482968 953750 0 FreeSans 400 90 0 0 gpio_oeb[16] +port 185 nsew +flabel metal2 s 486040 953270 486096 953750 0 FreeSans 400 90 0 0 gpio_out[16] +port 141 nsew +flabel metal2 s 495240 953270 495296 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[16] +port 361 nsew +flabel metal2 s 484200 953270 484256 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[16] +port 317 nsew +flabel metal2 s 497080 953270 497136 953750 0 FreeSans 400 90 0 0 gpio_in[16] +port 713 nsew +flabel metal2 s 442000 953270 442056 953750 0 FreeSans 400 90 0 0 gpio_dm1[17] +port 624 nsew +flabel metal2 s 435836 953270 435892 953750 0 FreeSans 400 90 0 0 gpio_dm2[17] +port 668 nsew +flabel metal2 s 435192 953270 435248 953750 0 FreeSans 400 90 0 0 gpio_holdover[17] +port 404 nsew +flabel metal2 s 432156 953270 432212 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[17] +port 272 nsew +flabel metal2 s 438964 953270 439020 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[17] +port 228 nsew +flabel metal2 s 431512 953270 431568 953750 0 FreeSans 400 90 0 0 gpio_oeb[17] +port 184 nsew +flabel metal2 s 434640 953270 434696 953750 0 FreeSans 400 90 0 0 gpio_out[17] +port 140 nsew +flabel metal2 s 443840 953270 443896 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[17] +port 360 nsew +flabel metal2 s 432800 953270 432856 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[17] +port 316 nsew +flabel metal2 s 445680 953270 445736 953750 0 FreeSans 400 90 0 0 gpio_in[17] +port 712 nsew +flabel metal2 s 351804 953270 351860 953750 0 FreeSans 400 90 0 0 gpio_analog_en[18] +port 447 nsew +flabel metal2 s 350516 953270 350572 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[18] +port 535 nsew +flabel metal2 s 347480 953270 347536 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[18] +port 491 nsew +flabel metal2 s 351160 953270 351216 953750 0 FreeSans 400 90 0 0 gpio_dm0[18] +port 579 nsew +flabel metal2 s 353000 953270 353056 953750 0 FreeSans 400 90 0 0 gpio_dm1[18] +port 623 nsew +flabel metal2 s 346836 953270 346892 953750 0 FreeSans 400 90 0 0 gpio_dm2[18] +port 667 nsew +flabel metal2 s 346192 953270 346248 953750 0 FreeSans 400 90 0 0 gpio_holdover[18] +port 403 nsew +flabel metal2 s 343156 953270 343212 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[18] +port 271 nsew +flabel metal2 s 349964 953270 350020 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[18] +port 227 nsew +flabel metal2 s 342512 953270 342568 953750 0 FreeSans 400 90 0 0 gpio_oeb[18] +port 183 nsew +flabel metal2 s 345640 953270 345696 953750 0 FreeSans 400 90 0 0 gpio_out[18] +port 139 nsew +flabel metal2 s 354840 953270 354896 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[18] +port 359 nsew +flabel metal2 s 343800 953270 343856 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[18] +port 315 nsew +flabel metal2 s 356680 953270 356736 953750 0 FreeSans 400 90 0 0 gpio_in[18] +port 711 nsew +flabel metal2 s 440804 953270 440860 953750 0 FreeSans 400 90 0 0 gpio_analog_en[17] +port 448 nsew +flabel metal2 s 439516 953270 439572 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[17] +port 536 nsew +flabel metal2 s 436480 953270 436536 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[17] +port 492 nsew +flabel metal2 s 440160 953270 440216 953750 0 FreeSans 400 90 0 0 gpio_dm0[17] +port 580 nsew +flabel metal2 s 253040 953270 253096 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[19] +port 358 nsew +flabel metal2 s 242000 953270 242056 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[19] +port 314 nsew +flabel metal2 s 254880 953270 254936 953750 0 FreeSans 400 90 0 0 gpio_in[19] +port 710 nsew +flabel metal2 s 198404 953270 198460 953750 0 FreeSans 400 90 0 0 gpio_analog_en[20] +port 445 nsew +flabel metal2 s 197116 953270 197172 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[20] +port 533 nsew +flabel metal2 s 194080 953270 194136 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[20] +port 489 nsew +flabel metal2 s 197760 953270 197816 953750 0 FreeSans 400 90 0 0 gpio_dm0[20] +port 577 nsew +flabel metal2 s 199600 953270 199656 953750 0 FreeSans 400 90 0 0 gpio_dm1[20] +port 621 nsew +flabel metal2 s 193436 953270 193492 953750 0 FreeSans 400 90 0 0 gpio_dm2[20] +port 665 nsew +flabel metal2 s 192792 953270 192848 953750 0 FreeSans 400 90 0 0 gpio_holdover[20] +port 401 nsew +flabel metal2 s 189756 953270 189812 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[20] +port 269 nsew +flabel metal2 s 196564 953270 196620 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[20] +port 225 nsew +flabel metal2 s 189112 953270 189168 953750 0 FreeSans 400 90 0 0 gpio_oeb[20] +port 181 nsew +flabel metal2 s 192240 953270 192296 953750 0 FreeSans 400 90 0 0 gpio_out[20] +port 137 nsew +flabel metal2 s 201440 953270 201496 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[20] +port 357 nsew +flabel metal2 s 190400 953270 190456 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[20] +port 313 nsew +flabel metal2 s 203280 953270 203336 953750 0 FreeSans 400 90 0 0 gpio_in[20] +port 709 nsew +flabel metal2 s 250004 953270 250060 953750 0 FreeSans 400 90 0 0 gpio_analog_en[19] +port 446 nsew +flabel metal2 s 248716 953270 248772 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[19] +port 534 nsew +flabel metal2 s 245680 953270 245736 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[19] +port 490 nsew +flabel metal2 s 249360 953270 249416 953750 0 FreeSans 400 90 0 0 gpio_dm0[19] +port 578 nsew +flabel metal2 s 251200 953270 251256 953750 0 FreeSans 400 90 0 0 gpio_dm1[19] +port 622 nsew +flabel metal2 s 245036 953270 245092 953750 0 FreeSans 400 90 0 0 gpio_dm2[19] +port 666 nsew +flabel metal2 s 244392 953270 244448 953750 0 FreeSans 400 90 0 0 gpio_holdover[19] +port 402 nsew +flabel metal2 s 241356 953270 241412 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[19] +port 270 nsew +flabel metal2 s 248164 953270 248220 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[19] +port 226 nsew +flabel metal2 s 240712 953270 240768 953750 0 FreeSans 400 90 0 0 gpio_oeb[19] +port 182 nsew +flabel metal2 s 243840 953270 243896 953750 0 FreeSans 400 90 0 0 gpio_out[19] +port 138 nsew +flabel metal2 s 151880 953270 151936 953750 0 FreeSans 400 90 0 0 gpio_in[21] +port 708 nsew +flabel metal2 s 95604 953270 95660 953750 0 FreeSans 400 90 0 0 gpio_analog_en[22] +port 443 nsew +flabel metal2 s 94316 953270 94372 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[22] +port 531 nsew +flabel metal2 s 91280 953270 91336 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[22] +port 487 nsew +flabel metal2 s 94960 953270 95016 953750 0 FreeSans 400 90 0 0 gpio_dm0[22] +port 575 nsew +flabel metal2 s 96800 953270 96856 953750 0 FreeSans 400 90 0 0 gpio_dm1[22] +port 619 nsew +flabel metal2 s 90636 953270 90692 953750 0 FreeSans 400 90 0 0 gpio_dm2[22] +port 663 nsew +flabel metal2 s 89992 953270 90048 953750 0 FreeSans 400 90 0 0 gpio_holdover[22] +port 399 nsew +flabel metal2 s 86956 953270 87012 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[22] +port 267 nsew +flabel metal2 s 93764 953270 93820 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[22] +port 223 nsew +flabel metal2 s 86312 953270 86368 953750 0 FreeSans 400 90 0 0 gpio_oeb[22] +port 179 nsew +flabel metal2 s 89440 953270 89496 953750 0 FreeSans 400 90 0 0 gpio_out[22] +port 135 nsew +flabel metal2 s 98640 953270 98696 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[22] +port 355 nsew +flabel metal2 s 87600 953270 87656 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[22] +port 311 nsew +flabel metal2 s 100480 953270 100536 953750 0 FreeSans 400 90 0 0 gpio_in[22] +port 707 nsew +flabel metal2 s 44204 953270 44260 953750 0 FreeSans 400 90 0 0 gpio_analog_en[23] +port 442 nsew +flabel metal2 s 42916 953270 42972 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[23] +port 530 nsew +flabel metal2 s 39880 953270 39936 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[23] +port 486 nsew +flabel metal2 s 43560 953270 43616 953750 0 FreeSans 400 90 0 0 gpio_dm0[23] +port 574 nsew +flabel metal2 s 45400 953270 45456 953750 0 FreeSans 400 90 0 0 gpio_dm1[23] +port 618 nsew +flabel metal2 s 39236 953270 39292 953750 0 FreeSans 400 90 0 0 gpio_dm2[23] +port 662 nsew +flabel metal2 s 38592 953270 38648 953750 0 FreeSans 400 90 0 0 gpio_holdover[23] +port 398 nsew +flabel metal2 s 35556 953270 35612 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[23] +port 266 nsew +flabel metal2 s 42364 953270 42420 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[23] +port 222 nsew +flabel metal2 s 34912 953270 34968 953750 0 FreeSans 400 90 0 0 gpio_oeb[23] +port 178 nsew +flabel metal2 s 38040 953270 38096 953750 0 FreeSans 400 90 0 0 gpio_out[23] +port 134 nsew +flabel metal2 s 47240 953270 47296 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[23] +port 354 nsew +flabel metal2 s 36200 953270 36256 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[23] +port 310 nsew +flabel metal2 s 49080 953270 49136 953750 0 FreeSans 400 90 0 0 gpio_in[23] +port 706 nsew +flabel metal2 s 147004 953270 147060 953750 0 FreeSans 400 90 0 0 gpio_analog_en[21] +port 444 nsew +flabel metal2 s 145716 953270 145772 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[21] +port 532 nsew +flabel metal2 s 142680 953270 142736 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[21] +port 488 nsew +flabel metal2 s 146360 953270 146416 953750 0 FreeSans 400 90 0 0 gpio_dm0[21] +port 576 nsew +flabel metal2 s 148200 953270 148256 953750 0 FreeSans 400 90 0 0 gpio_dm1[21] +port 620 nsew +flabel metal2 s 142036 953270 142092 953750 0 FreeSans 400 90 0 0 gpio_dm2[21] +port 664 nsew +flabel metal2 s 141392 953270 141448 953750 0 FreeSans 400 90 0 0 gpio_holdover[21] +port 400 nsew +flabel metal2 s 138356 953270 138412 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[21] +port 268 nsew +flabel metal2 s 145164 953270 145220 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[21] +port 224 nsew +flabel metal2 s 137712 953270 137768 953750 0 FreeSans 400 90 0 0 gpio_oeb[21] +port 180 nsew +flabel metal2 s 140840 953270 140896 953750 0 FreeSans 400 90 0 0 gpio_out[21] +port 136 nsew +flabel metal2 s 150040 953270 150096 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[21] +port 356 nsew +flabel metal2 s 139000 953270 139056 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[21] +port 312 nsew +flabel metal2 145190 -424 145246 56 0 FreeSans 400 270 0 0 gpio_in[38] +port 691 nsew +flabel metal2 147030 -424 147086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[38] +port 339 nsew +flabel metal2 148870 -424 148926 56 0 FreeSans 400 270 0 0 gpio_dm0[38] +port 559 nsew +flabel metal2 150710 -424 150766 56 0 FreeSans 400 270 0 0 gpio_dm1[38] +port 603 nsew +flabel metal2 151354 -424 151410 56 0 FreeSans 400 270 0 0 gpio_analog_pol[38] +port 515 nsew +flabel metal2 150066 -424 150122 56 0 FreeSans 400 270 0 0 gpio_analog_en[38] +port 427 nsew +flabel metal2 151906 -424 151962 56 0 FreeSans 400 270 0 0 gpio_inp_dis[38] +port 207 nsew +flabel metal2 154390 -424 154446 56 0 FreeSans 400 270 0 0 gpio_analog_sel[38] +port 471 nsew +flabel metal2 155034 -424 155090 56 0 FreeSans 400 270 0 0 gpio_dm2[38] +port 647 nsew +flabel metal2 155678 -424 155734 56 0 FreeSans 400 270 0 0 gpio_holdover[38] +port 383 nsew +flabel metal2 156230 -424 156286 56 0 FreeSans 400 270 0 0 gpio_out[38] +port 119 nsew +flabel metal2 158070 -424 158126 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[38] +port 295 nsew +flabel metal2 158714 -424 158770 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[38] +port 251 nsew +flabel metal2 159358 -424 159414 56 0 FreeSans 400 270 0 0 gpio_oeb[38] +port 163 nsew +flabel metal2 253790 -424 253846 56 0 FreeSans 400 270 0 0 gpio_in[39] +port 690 nsew +flabel metal2 255630 -424 255686 56 0 FreeSans 400 270 0 0 gpio_slow_sel[39] +port 338 nsew +flabel metal2 257470 -424 257526 56 0 FreeSans 400 270 0 0 gpio_dm1[39] +port 602 nsew +flabel metal2 259310 -424 259366 56 0 FreeSans 400 270 0 0 gpio_dm0[39] +port 558 nsew +flabel metal2 259954 -424 260010 56 0 FreeSans 400 270 0 0 gpio_analog_pol[39] +port 514 nsew +flabel metal2 258666 -424 258722 56 0 FreeSans 400 270 0 0 gpio_analog_en[39] +port 426 nsew +flabel metal2 260506 -424 260562 56 0 FreeSans 400 270 0 0 gpio_inp_dis[39] +port 206 nsew +flabel metal2 262990 -424 263046 56 0 FreeSans 400 270 0 0 gpio_analog_sel[39] +port 470 nsew +flabel metal2 263634 -424 263690 56 0 FreeSans 400 270 0 0 gpio_dm2[39] +port 646 nsew +flabel metal2 264278 -424 264334 56 0 FreeSans 400 270 0 0 gpio_holdover[39] +port 382 nsew +flabel metal2 264830 -424 264886 56 0 FreeSans 400 270 0 0 gpio_out[39] +port 118 nsew +flabel metal2 266670 -424 266726 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[39] +port 294 nsew +flabel metal2 267314 -424 267370 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[39] +port 250 nsew +flabel metal2 267958 -424 268014 56 0 FreeSans 400 270 0 0 gpio_oeb[39] +port 162 nsew +flabel metal2 308590 -424 308646 56 0 FreeSans 400 270 0 0 gpio_in[40] +port 689 nsew +flabel metal2 310430 -424 310486 56 0 FreeSans 400 270 0 0 gpio_slow_sel[40] +port 337 nsew +flabel metal2 312270 -424 312326 56 0 FreeSans 400 270 0 0 gpio_dm1[40] +port 601 nsew +flabel metal2 314110 -424 314166 56 0 FreeSans 400 270 0 0 gpio_dm0[40] +port 557 nsew +flabel metal2 314754 -424 314810 56 0 FreeSans 400 270 0 0 gpio_analog_pol[40] +port 513 nsew +flabel metal2 313466 -424 313522 56 0 FreeSans 400 270 0 0 gpio_analog_en[40] +port 425 nsew +flabel metal2 315306 -424 315362 56 0 FreeSans 400 270 0 0 gpio_inp_dis[40] +port 205 nsew +flabel metal2 317790 -424 317846 56 0 FreeSans 400 270 0 0 gpio_analog_sel[40] +port 469 nsew +flabel metal2 318434 -424 318490 56 0 FreeSans 400 270 0 0 gpio_dm2[40] +port 645 nsew +flabel metal2 319078 -424 319134 56 0 FreeSans 400 270 0 0 gpio_holdover[40] +port 381 nsew +flabel metal2 319630 -424 319686 56 0 FreeSans 400 270 0 0 gpio_out[40] +port 117 nsew +flabel metal2 321470 -424 321526 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[40] +port 293 nsew +flabel metal2 322114 -424 322170 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[40] +port 249 nsew +flabel metal2 322758 -424 322814 56 0 FreeSans 400 270 0 0 gpio_oeb[40] +port 161 nsew +flabel metal2 363390 -424 363446 56 0 FreeSans 400 270 0 0 gpio_in[41] +port 688 nsew +flabel metal2 365230 -424 365286 56 0 FreeSans 400 270 0 0 gpio_slow_sel[41] +port 336 nsew +flabel metal2 367070 -424 367126 56 0 FreeSans 400 270 0 0 gpio_dm1[41] +port 600 nsew +flabel metal2 368910 -424 368966 56 0 FreeSans 400 270 0 0 gpio_dm0[41] +port 556 nsew +flabel metal2 369554 -424 369610 56 0 FreeSans 400 270 0 0 gpio_analog_pol[41] +port 512 nsew +flabel metal2 368266 -424 368322 56 0 FreeSans 400 270 0 0 gpio_analog_en[41] +port 424 nsew +flabel metal2 370106 -424 370162 56 0 FreeSans 400 270 0 0 gpio_inp_dis[41] +port 204 nsew +flabel metal2 372590 -424 372646 56 0 FreeSans 400 270 0 0 gpio_analog_sel[41] +port 468 nsew +flabel metal2 373234 -424 373290 56 0 FreeSans 400 270 0 0 gpio_dm2[41] +port 644 nsew +flabel metal2 373878 -424 373934 56 0 FreeSans 400 270 0 0 gpio_holdover[41] +port 380 nsew +flabel metal2 374430 -424 374486 56 0 FreeSans 400 270 0 0 gpio_out[41] +port 116 nsew +flabel metal2 376270 -424 376326 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[41] +port 292 nsew +flabel metal2 376914 -424 376970 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[41] +port 248 nsew +flabel metal2 377558 -424 377614 56 0 FreeSans 400 270 0 0 gpio_oeb[41] +port 160 nsew +flabel metal2 418190 -424 418246 56 0 FreeSans 400 270 0 0 gpio_in[42] +port 687 nsew +flabel metal2 420030 -424 420086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[42] +port 335 nsew +flabel metal2 421870 -424 421926 56 0 FreeSans 400 270 0 0 gpio_dm1[42] +port 599 nsew +flabel metal2 423710 -424 423766 56 0 FreeSans 400 270 0 0 gpio_dm0[42] +port 555 nsew +flabel metal2 424354 -424 424410 56 0 FreeSans 400 270 0 0 gpio_analog_pol[42] +port 511 nsew +flabel metal2 423066 -424 423122 56 0 FreeSans 400 270 0 0 gpio_analog_en[42] +port 423 nsew +flabel metal2 424906 -424 424962 56 0 FreeSans 400 270 0 0 gpio_inp_dis[42] +port 203 nsew +flabel metal2 427390 -424 427446 56 0 FreeSans 400 270 0 0 gpio_analog_sel[42] +port 467 nsew +flabel metal2 428034 -424 428090 56 0 FreeSans 400 270 0 0 gpio_dm2[42] +port 643 nsew +flabel metal2 428678 -424 428734 56 0 FreeSans 400 270 0 0 gpio_holdover[42] +port 379 nsew +flabel metal2 429230 -424 429286 56 0 FreeSans 400 270 0 0 gpio_out[42] +port 115 nsew +flabel metal2 431070 -424 431126 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[42] +port 291 nsew +flabel metal2 431714 -424 431770 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[42] +port 247 nsew +flabel metal2 432358 -424 432414 56 0 FreeSans 400 270 0 0 gpio_oeb[42] +port 159 nsew +flabel metal2 472990 -424 473046 56 0 FreeSans 400 270 0 0 gpio_in[43] +port 686 nsew +flabel metal2 474830 -424 474886 56 0 FreeSans 400 270 0 0 gpio_slow_sel[43] +port 334 nsew +flabel metal2 476670 -424 476726 56 0 FreeSans 400 270 0 0 gpio_dm1[43] +port 598 nsew +flabel metal2 478510 -424 478566 56 0 FreeSans 400 270 0 0 gpio_dm0[43] +port 554 nsew +flabel metal2 479154 -424 479210 56 0 FreeSans 400 270 0 0 gpio_analog_pol[43] +port 510 nsew +flabel metal2 477866 -424 477922 56 0 FreeSans 400 270 0 0 gpio_analog_en[43] +port 422 nsew +flabel metal2 479706 -424 479762 56 0 FreeSans 400 270 0 0 gpio_inp_dis[43] +port 202 nsew +flabel metal2 482190 -424 482246 56 0 FreeSans 400 270 0 0 gpio_analog_sel[43] +port 466 nsew +flabel metal2 482834 -424 482890 56 0 FreeSans 400 270 0 0 gpio_dm2[43] +port 642 nsew +flabel metal2 483478 -424 483534 56 0 FreeSans 400 270 0 0 gpio_holdover[43] +port 378 nsew +flabel metal2 484030 -424 484086 56 0 FreeSans 400 270 0 0 gpio_out[43] +port 114 nsew +flabel metal2 486514 -424 486570 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[43] +port 246 nsew +flabel metal2 487158 -424 487214 56 0 FreeSans 400 270 0 0 gpio_oeb[43] +port 158 nsew +flabel metal2 s 584160 953270 584216 953750 0 FreeSans 400 90 0 0 gpio_in_h[15] +port 758 nsew +flabel metal2 s 482360 953270 482416 953750 0 FreeSans 400 90 0 0 gpio_in_h[16] +port 757 nsew +flabel metal2 s 430960 953270 431016 953750 0 FreeSans 400 90 0 0 gpio_in_h[17] +port 756 nsew +flabel metal2 s 341960 953270 342016 953750 0 FreeSans 400 90 0 0 gpio_in_h[18] +port 755 nsew +flabel metal2 s 240160 953270 240216 953750 0 FreeSans 400 90 0 0 gpio_in_h[19] +port 754 nsew +flabel metal2 s 188560 953270 188616 953750 0 FreeSans 400 90 0 0 gpio_in_h[20] +port 753 nsew +flabel metal2 s 137160 953270 137216 953750 0 FreeSans 400 90 0 0 gpio_in_h[21] +port 752 nsew +flabel metal2 s 85760 953270 85816 953750 0 FreeSans 400 90 0 0 gpio_in_h[22] +port 751 nsew +flabel metal2 s 34360 953270 34416 953750 0 FreeSans 400 90 0 0 gpio_in_h[23] +port 750 nsew +flabel metal2 s 159910 -424 159966 56 0 FreeSans 400 90 0 0 gpio_in_h[38] +port 735 nsew +flabel metal2 s 268510 -424 268566 56 0 FreeSans 400 90 0 0 gpio_in_h[39] +port 734 nsew +flabel metal2 s 323310 -424 323366 56 0 FreeSans 400 90 0 0 gpio_in_h[40] +port 733 nsew +flabel metal2 s 378110 -424 378166 56 0 FreeSans 400 90 0 0 gpio_in_h[41] +port 732 nsew +flabel metal2 s 432910 -424 432966 56 0 FreeSans 400 90 0 0 gpio_in_h[42] +port 731 nsew +flabel metal2 s 487710 -424 487766 56 0 FreeSans 400 90 0 0 gpio_in_h[43] +port 730 nsew +flabel metal2 s 596396 953270 596452 953750 0 FreeSans 400 90 0 0 analog_io[15] +port 890 nsew +flabel metal2 s 494596 953270 494652 953750 0 FreeSans 400 90 0 0 analog_io[16] +port 889 nsew +flabel metal2 s 443196 953270 443252 953750 0 FreeSans 400 90 0 0 analog_io[17] +port 888 nsew +flabel metal2 s 354196 953270 354252 953750 0 FreeSans 400 90 0 0 analog_io[18] +port 887 nsew +flabel metal2 s 252396 953270 252452 953750 0 FreeSans 400 90 0 0 analog_io[19] +port 886 nsew +flabel metal2 s 200796 953270 200852 953750 0 FreeSans 400 90 0 0 analog_io[20] +port 885 nsew +flabel metal2 s 149396 953270 149452 953750 0 FreeSans 400 90 0 0 analog_io[21] +port 884 nsew +flabel metal2 s 97996 953270 98052 953750 0 FreeSans 400 90 0 0 analog_io[22] +port 883 nsew +flabel metal2 s 46596 953270 46652 953750 0 FreeSans 400 90 0 0 analog_io[23] +port 882 nsew +flabel metal2 s 147674 -424 147730 56 0 FreeSans 400 90 0 0 analog_io[38] +port 867 nsew +flabel metal2 s 256274 -424 256330 56 0 FreeSans 400 90 0 0 analog_io[39] +port 866 nsew +flabel metal2 s 311074 -424 311130 56 0 FreeSans 400 90 0 0 analog_io[40] +port 865 nsew +flabel metal2 s 365874 -424 365930 56 0 FreeSans 400 90 0 0 analog_io[41] +port 864 nsew +flabel metal2 s 420674 -424 420730 56 0 FreeSans 400 90 0 0 analog_io[42] +port 863 nsew +flabel metal2 s 475474 -424 475530 56 0 FreeSans 400 90 0 0 analog_io[43] +port 862 nsew +flabel metal2 s 594556 953270 594612 953750 0 FreeSans 400 90 0 0 analog_noesd_io[15] +port 934 nsew +flabel metal2 s 492756 953270 492812 953750 0 FreeSans 400 90 0 0 analog_noesd_io[16] +port 933 nsew +flabel metal2 s 441356 953270 441412 953750 0 FreeSans 400 90 0 0 analog_noesd_io[17] +port 932 nsew +flabel metal2 s 352356 953270 352412 953750 0 FreeSans 400 90 0 0 analog_noesd_io[18] +port 931 nsew +flabel metal2 s 250556 953270 250612 953750 0 FreeSans 400 90 0 0 analog_noesd_io[19] +port 930 nsew +flabel metal2 s 198956 953270 199012 953750 0 FreeSans 400 90 0 0 analog_noesd_io[20] +port 929 nsew +flabel metal2 s 147556 953270 147612 953750 0 FreeSans 400 90 0 0 analog_noesd_io[21] +port 928 nsew +flabel metal2 s 96156 953270 96212 953750 0 FreeSans 400 90 0 0 analog_noesd_io[22] +port 927 nsew +flabel metal2 s 44756 953270 44812 953750 0 FreeSans 400 90 0 0 analog_noesd_io[23] +port 926 nsew +flabel metal2 s 149514 -424 149570 56 0 FreeSans 400 90 0 0 analog_noesd_io[38] +port 911 nsew +flabel metal2 s 258114 -424 258170 56 0 FreeSans 400 90 0 0 analog_noesd_io[39] +port 910 nsew +flabel metal2 s 312914 -424 312970 56 0 FreeSans 400 90 0 0 analog_noesd_io[40] +port 909 nsew +flabel metal2 s 367714 -424 367770 56 0 FreeSans 400 90 0 0 analog_noesd_io[41] +port 908 nsew +flabel metal2 s 422514 -424 422570 56 0 FreeSans 400 90 0 0 analog_noesd_io[42] +port 907 nsew +flabel metal2 s 477314 -424 477370 56 0 FreeSans 400 90 0 0 analog_noesd_io[43] +port 906 nsew +flabel metal2 s 488380 -260 488432 56 0 FreeSans 400 90 0 0 gpio_loopback_one[43] +port 818 nsew +flabel metal2 s 492635 -260 492687 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[43] +port 774 nsew +flabel metal2 s 433580 -260 433632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[42] +port 819 nsew +flabel metal2 s 437778 -260 437830 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[42] +port 775 nsew +flabel metal2 s 378780 -260 378832 56 0 FreeSans 400 90 0 0 gpio_loopback_one[41] +port 820 nsew +flabel metal2 s 382978 -260 383030 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[41] +port 776 nsew +flabel metal2 s 323980 -260 324032 56 0 FreeSans 400 90 0 0 gpio_loopback_one[40] +port 821 nsew +flabel metal2 s 328165 -282 328217 34 0 FreeSans 400 90 0 0 gpio_loopback_zero[40] +port 777 nsew +flabel metal2 s 269180 -260 269232 56 0 FreeSans 400 90 0 0 gpio_loopback_one[39] +port 822 nsew +flabel metal2 s 273360 -260 273412 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[39] +port 778 nsew +flabel metal2 s 160580 -260 160632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[38] +port 823 nsew +flabel metal2 s 163791 -259 163843 57 0 FreeSans 400 90 0 0 gpio_loopback_zero[38] +port 779 nsew +flabel metal2 s 110164 -116 110220 56 0 FreeSans 400 90 0 0 resetb_l +port 37 nsew +flabel metal2 s 99571 -90 99637 56 0 FreeSans 400 90 0 0 resetb_h +port 36 nsew +flabel metal2 s 605082 -260 605134 56 0 FreeSans 400 90 0 0 mask_rev[0] +port 69 nsew +flabel metal2 s 605978 -260 606030 56 0 FreeSans 400 90 0 0 mask_rev[4] +port 65 nsew +flabel metal2 s 606202 -260 606254 56 0 FreeSans 400 90 0 0 mask_rev[5] +port 64 nsew +flabel metal2 s 606426 -260 606478 56 0 FreeSans 400 90 0 0 mask_rev[6] +port 63 nsew +flabel metal2 s 606650 -260 606702 56 0 FreeSans 400 90 0 0 mask_rev[7] +port 62 nsew +flabel metal2 s 606874 -260 606926 56 0 FreeSans 400 90 0 0 mask_rev[8] +port 61 nsew +flabel metal2 s 607098 -260 607150 56 0 FreeSans 400 90 0 0 mask_rev[9] +port 60 nsew +flabel metal2 s 607322 -260 607374 56 0 FreeSans 400 90 0 0 mask_rev[10] +port 59 nsew +flabel metal2 s 607546 -260 607598 56 0 FreeSans 400 90 0 0 mask_rev[11] +port 58 nsew +flabel metal2 s 607770 -260 607822 56 0 FreeSans 400 90 0 0 mask_rev[12] +port 57 nsew +flabel metal2 s 607994 -260 608046 56 0 FreeSans 400 90 0 0 mask_rev[13] +port 56 nsew +flabel metal2 s 608218 -260 608270 56 0 FreeSans 400 90 0 0 mask_rev[14] +port 55 nsew +flabel metal2 s 608442 -260 608494 56 0 FreeSans 400 90 0 0 mask_rev[15] +port 54 nsew +flabel metal2 s 608666 -260 608718 56 0 FreeSans 400 90 0 0 mask_rev[16] +port 53 nsew +flabel metal2 s 608890 -260 608942 56 0 FreeSans 400 90 0 0 mask_rev[17] +port 52 nsew +flabel metal2 s 609114 -260 609166 56 0 FreeSans 400 90 0 0 mask_rev[18] +port 51 nsew +flabel metal2 s 609338 -260 609390 56 0 FreeSans 400 90 0 0 mask_rev[19] +port 50 nsew +flabel metal2 s 609562 -260 609614 56 0 FreeSans 400 90 0 0 mask_rev[20] +port 49 nsew +flabel metal2 s 609786 -260 609838 56 0 FreeSans 400 90 0 0 mask_rev[21] +port 48 nsew +flabel metal2 s 610010 -260 610062 56 0 FreeSans 400 90 0 0 mask_rev[22] +port 47 nsew +flabel metal2 s 610234 -260 610286 56 0 FreeSans 400 90 0 0 mask_rev[23] +port 46 nsew +flabel metal2 s 610458 -260 610510 56 0 FreeSans 400 90 0 0 mask_rev[24] +port 45 nsew +flabel metal2 s 610682 -260 610734 56 0 FreeSans 400 90 0 0 mask_rev[25] +port 44 nsew +flabel metal2 s 610906 -260 610958 56 0 FreeSans 400 90 0 0 mask_rev[26] +port 43 nsew +flabel metal2 s 611130 -260 611182 56 0 FreeSans 400 90 0 0 mask_rev[27] +port 42 nsew +flabel metal2 s 611354 -260 611406 56 0 FreeSans 400 90 0 0 mask_rev[28] +port 41 nsew +flabel metal2 s 611578 -260 611630 56 0 FreeSans 400 90 0 0 mask_rev[29] +port 40 nsew +flabel metal2 s 611802 -260 611854 56 0 FreeSans 400 90 0 0 mask_rev[30] +port 39 nsew +flabel metal2 s 612026 -260 612078 56 0 FreeSans 400 90 0 0 mask_rev[31] +port 38 nsew +flabel metal2 s 605754 -260 605806 56 0 FreeSans 400 90 0 0 mask_rev[3] +port 66 nsew +flabel metal2 s 605530 -260 605582 56 0 FreeSans 400 90 0 0 mask_rev[2] +port 67 nsew +flabel metal2 s 605306 -260 605358 56 0 FreeSans 400 90 0 0 mask_rev[1] +port 68 nsew +flabel metal3 s -424 141600 56 141656 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] +port 296 nsew +flabel metal3 633270 422812 633770 427463 0 FreeSans 3200 90 0 0 vccd1 +port 28 nsew +flabel metal3 633270 427763 633770 432563 0 FreeSans 3200 90 0 0 vssd1 +port 30 nsew +flabel metal3 633270 417723 633770 422512 0 FreeSans 3200 90 0 0 vssd1 +port 30 nsew +flabel metal3 s 633270 870611 633770 875273 0 FreeSans 3200 90 0 0 vssd1 +port 30 nsew +flabel metal3 s 633270 875563 633770 880363 0 FreeSans 3200 90 0 0 vccd1 +port 28 nsew +flabel metal3 s 633270 865523 633770 870312 0 FreeSans 3200 90 0 0 vccd1 +port 28 nsew +flabel metal3 s 633270 786384 633770 791164 0 FreeSans 3200 90 0 0 vdda1 +port 24 nsew +flabel metal3 s 633270 776405 633770 781185 0 FreeSans 3200 90 0 0 vdda1 +port 24 nsew +flabel metal3 s 633270 471784 633770 476564 0 FreeSans 3200 90 0 0 vdda1 +port 24 nsew +flabel metal3 s 633270 461805 633770 466585 0 FreeSans 3200 90 0 0 vdda1 +port 24 nsew +flabel metal3 s 633270 383584 633770 388364 0 FreeSans 3200 90 0 0 vssa1 +port 26 nsew +flabel metal3 s 633270 373605 633770 378385 0 FreeSans 3200 90 0 0 vssa1 +port 26 nsew +flabel metal3 s 543541 953270 548321 953770 0 FreeSans 3200 0 0 0 vssa1 +port 26 nsew +flabel metal3 s 533562 953270 538342 953770 0 FreeSans 3200 0 0 0 vssa1 +port 26 nsew +flabel metal3 301341 953270 306121 953770 0 FreeSans 3200 0 0 0 vssio +port 19 nsew +flabel metal3 291362 953270 296142 953770 0 FreeSans 3200 0 0 0 vssio +port 19 nsew +flabel metal3 -444 875053 56 879715 0 FreeSans 3200 90 0 0 vssd2 +port 31 nsew +flabel metal3 -444 880014 56 884803 0 FreeSans 3200 90 0 0 vccd2 +port 29 nsew +flabel metal3 -444 869963 56 874763 0 FreeSans 3200 90 0 0 vccd2 +port 29 nsew +flabel metal3 -444 837741 56 842521 0 FreeSans 3200 90 0 0 vddio +port 18 nsew +flabel metal3 -444 827762 56 832542 0 FreeSans 3200 90 0 0 vddio +port 18 nsew +flabel metal3 -444 795541 56 800321 0 FreeSans 3200 90 0 0 vssa2 +port 27 nsew +flabel metal3 -444 785562 56 790342 0 FreeSans 3200 90 0 0 vssa2 +port 27 nsew +flabel metal3 -444 450941 56 455721 0 FreeSans 3200 90 0 0 vdda2 +port 25 nsew +flabel metal3 -444 440962 56 445742 0 FreeSans 3200 90 0 0 vdda2 +port 25 nsew +flabel metal3 -444 403863 56 408514 0 FreeSans 3200 90 0 0 vccd2 +port 29 nsew +flabel metal3 -444 408814 56 413603 0 FreeSans 3200 90 0 0 vssd2 +port 31 nsew +flabel metal3 -444 398763 56 403563 0 FreeSans 3200 90 0 0 vssd2 +port 31 nsew +flabel metal3 -444 78141 56 82921 0 FreeSans 3200 90 0 0 vddio +port 18 nsew +flabel metal3 -444 68162 56 72942 0 FreeSans 3200 90 0 0 vddio +port 18 nsew +flabel metal3 -444 36014 56 40803 0 FreeSans 3200 90 0 0 vccd +port 20 nsew +flabel metal3 -444 25963 56 30763 0 FreeSans 3200 90 0 0 vccd +port 20 nsew +flabel metal3 46784 -443 51564 57 0 FreeSans 3200 0 0 0 vssa +port 23 nsew +flabel metal3 36805 -444 41585 56 0 FreeSans 3200 0 0 0 vssa +port 23 nsew +flabel metal3 209163 -444 213963 56 0 FreeSans 3200 0 0 0 vssd +port 21 nsew +flabel metal3 199283 -444 203912 56 0 FreeSans 3200 0 0 0 vssd +port 21 nsew +flabel metal3 536984 -444 541764 56 0 FreeSans 3200 0 0 0 vssio +port 19 nsew +flabel metal3 527005 -444 531785 56 0 FreeSans 3200 0 0 0 vssio +port 19 nsew +flabel metal3 580805 -444 585585 56 0 FreeSans 3200 0 0 0 vdda +port 22 nsew +flabel metal3 590784 -444 595564 56 0 FreeSans 3200 0 0 0 vdda +port 22 nsew +flabel metal3 633270 76005 633590 76067 0 FreeSans 400 0 0 0 gpio_loopback_one[0] +port 861 nsew +flabel metal3 633270 121005 633590 121067 0 FreeSans 400 0 0 0 gpio_loopback_one[1] +port 860 nsew +flabel metal3 633270 166005 633590 166067 0 FreeSans 400 0 0 0 gpio_loopback_one[2] +port 859 nsew +flabel comment s 107715 141850 108715 141850 0 FreeSans 1120000 60 0 0 example +flabel metal3 633270 168007 633590 168069 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] +port 815 nsew +flabel metal3 633270 123007 633590 123069 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] +port 816 nsew +flabel metal3 633270 78007 633590 78069 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] +port 817 nsew +flabel metal3 s 633270 736859 633750 736929 0 FreeSans 400 0 0 0 gpio_analog_en[12] +port 453 nsew +flabel metal3 s 633270 738147 633750 738217 0 FreeSans 400 0 0 0 gpio_analog_pol[12] +port 541 nsew +flabel metal3 s 633270 741183 633750 741253 0 FreeSans 400 0 0 0 gpio_analog_sel[12] +port 497 nsew +flabel metal3 s 633270 737503 633750 737573 0 FreeSans 400 0 0 0 gpio_dm0[12] +port 585 nsew +flabel metal3 s 633270 735663 633750 735733 0 FreeSans 400 0 0 0 gpio_dm1[12] +port 629 nsew +flabel metal3 s 633270 741827 633750 741897 0 FreeSans 400 0 0 0 gpio_dm2[12] +port 673 nsew +flabel metal3 s 633270 742471 633750 742541 0 FreeSans 400 0 0 0 gpio_holdover[12] +port 409 nsew +flabel metal3 s 633270 745507 633750 745577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] +port 277 nsew +flabel metal3 s 633270 738699 633750 738769 0 FreeSans 400 0 0 0 gpio_inp_dis[12] +port 233 nsew +flabel metal3 s 633270 746151 633750 746221 0 FreeSans 400 0 0 0 gpio_oeb[12] +port 189 nsew +flabel metal3 s 633270 743023 633750 743093 0 FreeSans 400 0 0 0 gpio_out[12] +port 145 nsew +flabel metal3 s 633270 733823 633750 733893 0 FreeSans 400 0 0 0 gpio_slow_sel[12] +port 365 nsew +flabel metal3 s 633270 744863 633750 744933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] +port 321 nsew +flabel metal3 s 633270 731983 633750 732053 0 FreeSans 400 0 0 0 gpio_in[12] +port 717 nsew +flabel metal3 s 633270 826059 633750 826129 0 FreeSans 400 0 0 0 gpio_analog_en[13] +port 452 nsew +flabel metal3 s 633270 827347 633750 827417 0 FreeSans 400 0 0 0 gpio_analog_pol[13] +port 540 nsew +flabel metal3 s 633270 830383 633750 830453 0 FreeSans 400 0 0 0 gpio_analog_sel[13] +port 496 nsew +flabel metal3 s 633270 826703 633750 826773 0 FreeSans 400 0 0 0 gpio_dm0[13] +port 584 nsew +flabel metal3 s 633270 824863 633750 824933 0 FreeSans 400 0 0 0 gpio_dm1[13] +port 628 nsew +flabel metal3 s 633270 831027 633750 831097 0 FreeSans 400 0 0 0 gpio_dm2[13] +port 672 nsew +flabel metal3 s 633270 831671 633750 831741 0 FreeSans 400 0 0 0 gpio_holdover[13] +port 408 nsew +flabel metal3 s 633270 834707 633750 834777 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] +port 276 nsew +flabel metal3 s 633270 827899 633750 827969 0 FreeSans 400 0 0 0 gpio_inp_dis[13] +port 232 nsew +flabel metal3 s 633270 835351 633750 835421 0 FreeSans 400 0 0 0 gpio_oeb[13] +port 188 nsew +flabel metal3 s 633270 832223 633750 832293 0 FreeSans 400 0 0 0 gpio_out[13] +port 144 nsew +flabel metal3 s 633270 823023 633750 823093 0 FreeSans 400 0 0 0 gpio_slow_sel[13] +port 364 nsew +flabel metal3 s 633270 834063 633750 834133 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] +port 320 nsew +flabel metal3 s 633270 821183 633750 821253 0 FreeSans 400 0 0 0 gpio_in[13] +port 716 nsew +flabel metal3 s 633270 915259 633750 915329 0 FreeSans 400 0 0 0 gpio_analog_en[14] +port 451 nsew +flabel metal3 s 633270 916547 633750 916617 0 FreeSans 400 0 0 0 gpio_analog_pol[14] +port 539 nsew +flabel metal3 s 633270 919583 633750 919653 0 FreeSans 400 0 0 0 gpio_analog_sel[14] +port 495 nsew +flabel metal3 s 633270 915903 633750 915973 0 FreeSans 400 0 0 0 gpio_dm0[14] +port 583 nsew +flabel metal3 s 633270 914063 633750 914133 0 FreeSans 400 0 0 0 gpio_dm1[14] +port 627 nsew +flabel metal3 s 633270 920227 633750 920297 0 FreeSans 400 0 0 0 gpio_dm2[14] +port 671 nsew +flabel metal3 s 633270 920871 633750 920941 0 FreeSans 400 0 0 0 gpio_holdover[14] +port 407 nsew +flabel metal3 s 633270 923907 633750 923977 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] +port 275 nsew +flabel metal3 s 633270 917099 633750 917169 0 FreeSans 400 0 0 0 gpio_inp_dis[14] +port 231 nsew +flabel metal3 s 633270 924551 633750 924621 0 FreeSans 400 0 0 0 gpio_oeb[14] +port 187 nsew +flabel metal3 s 633270 921423 633750 921493 0 FreeSans 400 0 0 0 gpio_out[14] +port 143 nsew +flabel metal3 s 633270 912223 633750 912293 0 FreeSans 400 0 0 0 gpio_slow_sel[14] +port 363 nsew +flabel metal3 s 633270 923263 633750 923333 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] +port 319 nsew +flabel metal3 s 633270 910383 633750 910453 0 FreeSans 400 0 0 0 gpio_in[14] +port 715 nsew +flabel metal3 s 633270 697471 633750 697541 0 FreeSans 400 0 0 0 gpio_holdover[11] +port 410 nsew +flabel metal3 s 633270 700507 633750 700577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] +port 278 nsew +flabel metal3 s 633270 693699 633750 693769 0 FreeSans 400 0 0 0 gpio_inp_dis[11] +port 234 nsew +flabel metal3 s 633270 701151 633750 701221 0 FreeSans 400 0 0 0 gpio_oeb[11] +port 190 nsew +flabel metal3 s 633270 698023 633750 698093 0 FreeSans 400 0 0 0 gpio_out[11] +port 146 nsew +flabel metal3 s 633270 688823 633750 688893 0 FreeSans 400 0 0 0 gpio_slow_sel[11] +port 366 nsew +flabel metal3 s 633270 699863 633750 699933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] +port 322 nsew +flabel metal3 s 633270 686983 633750 687053 0 FreeSans 400 0 0 0 gpio_in[11] +port 718 nsew +flabel metal3 s 633270 646859 633750 646929 0 FreeSans 400 0 0 0 gpio_analog_en[10] +port 455 nsew +flabel metal3 s 633270 648147 633750 648217 0 FreeSans 400 0 0 0 gpio_analog_pol[10] +port 543 nsew +flabel metal3 s 633270 651183 633750 651253 0 FreeSans 400 0 0 0 gpio_analog_sel[10] +port 499 nsew +flabel metal3 s 633270 647503 633750 647573 0 FreeSans 400 0 0 0 gpio_dm0[10] +port 587 nsew +flabel metal3 s 633270 645663 633750 645733 0 FreeSans 400 0 0 0 gpio_dm1[10] +port 631 nsew +flabel metal3 s 633270 651827 633750 651897 0 FreeSans 400 0 0 0 gpio_dm2[10] +port 675 nsew +flabel metal3 s 633270 652471 633750 652541 0 FreeSans 400 0 0 0 gpio_holdover[10] +port 411 nsew +flabel metal3 s 633270 655507 633750 655577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] +port 279 nsew +flabel metal3 s 633270 648699 633750 648769 0 FreeSans 400 0 0 0 gpio_inp_dis[10] +port 235 nsew +flabel metal3 s 633270 656151 633750 656221 0 FreeSans 400 0 0 0 gpio_oeb[10] +port 191 nsew +flabel metal3 s 633270 653023 633750 653093 0 FreeSans 400 0 0 0 gpio_out[10] +port 147 nsew +flabel metal3 s 633270 643823 633750 643893 0 FreeSans 400 0 0 0 gpio_slow_sel[10] +port 367 nsew +flabel metal3 s 633270 654863 633750 654933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] +port 323 nsew +flabel metal3 s 633270 641983 633750 642053 0 FreeSans 400 0 0 0 gpio_in[10] +port 719 nsew +flabel metal3 s 633270 511459 633750 511529 0 FreeSans 400 0 0 0 gpio_analog_en[7] +port 458 nsew +flabel metal3 s 633270 512747 633750 512817 0 FreeSans 400 0 0 0 gpio_analog_pol[7] +port 546 nsew +flabel metal3 s 633270 515783 633750 515853 0 FreeSans 400 0 0 0 gpio_analog_sel[7] +port 502 nsew +flabel metal3 s 633270 512103 633750 512173 0 FreeSans 400 0 0 0 gpio_dm0[7] +port 590 nsew +flabel metal3 s 633270 510263 633750 510333 0 FreeSans 400 0 0 0 gpio_dm1[7] +port 634 nsew +flabel metal3 s 633270 516427 633750 516497 0 FreeSans 400 0 0 0 gpio_dm2[7] +port 678 nsew +flabel metal3 s 633270 517071 633750 517141 0 FreeSans 400 0 0 0 gpio_holdover[7] +port 414 nsew +flabel metal3 s 633270 520107 633750 520177 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] +port 282 nsew +flabel metal3 s 633270 513299 633750 513369 0 FreeSans 400 0 0 0 gpio_inp_dis[7] +port 238 nsew +flabel metal3 s 633270 520751 633750 520821 0 FreeSans 400 0 0 0 gpio_oeb[7] +port 194 nsew +flabel metal3 s 633270 517623 633750 517693 0 FreeSans 400 0 0 0 gpio_out[7] +port 150 nsew +flabel metal3 s 633270 508423 633750 508493 0 FreeSans 400 0 0 0 gpio_slow_sel[7] +port 370 nsew +flabel metal3 s 633270 519463 633750 519533 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] +port 326 nsew +flabel metal3 s 633270 506583 633750 506653 0 FreeSans 400 0 0 0 gpio_in[7] +port 722 nsew +flabel metal3 s 633270 556659 633750 556729 0 FreeSans 400 0 0 0 gpio_analog_en[8] +port 457 nsew +flabel metal3 s 633270 557947 633750 558017 0 FreeSans 400 0 0 0 gpio_analog_pol[8] +port 545 nsew +flabel metal3 s 633270 560983 633750 561053 0 FreeSans 400 0 0 0 gpio_analog_sel[8] +port 501 nsew +flabel metal3 s 633270 557303 633750 557373 0 FreeSans 400 0 0 0 gpio_dm0[8] +port 589 nsew +flabel metal3 s 633270 555463 633750 555533 0 FreeSans 400 0 0 0 gpio_dm1[8] +port 633 nsew +flabel metal3 s 633270 561627 633750 561697 0 FreeSans 400 0 0 0 gpio_dm2[8] +port 677 nsew +flabel metal3 s 633270 562271 633750 562341 0 FreeSans 400 0 0 0 gpio_holdover[8] +port 413 nsew +flabel metal3 s 633270 565307 633750 565377 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] +port 281 nsew +flabel metal3 s 633270 558499 633750 558569 0 FreeSans 400 0 0 0 gpio_inp_dis[8] +port 237 nsew +flabel metal3 s 633270 565951 633750 566021 0 FreeSans 400 0 0 0 gpio_oeb[8] +port 193 nsew +flabel metal3 s 633270 562823 633750 562893 0 FreeSans 400 0 0 0 gpio_out[8] +port 149 nsew +flabel metal3 s 633270 553623 633750 553693 0 FreeSans 400 0 0 0 gpio_slow_sel[8] +port 369 nsew +flabel metal3 s 633270 564663 633750 564733 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] +port 325 nsew +flabel metal3 s 633270 551783 633750 551853 0 FreeSans 400 0 0 0 gpio_in[8] +port 721 nsew +flabel metal3 s 633270 601659 633750 601729 0 FreeSans 400 0 0 0 gpio_analog_en[9] +port 456 nsew +flabel metal3 s 633270 602947 633750 603017 0 FreeSans 400 0 0 0 gpio_analog_pol[9] +port 544 nsew +flabel metal3 s 633270 605983 633750 606053 0 FreeSans 400 0 0 0 gpio_analog_sel[9] +port 500 nsew +flabel metal3 s 633270 602303 633750 602373 0 FreeSans 400 0 0 0 gpio_dm0[9] +port 588 nsew +flabel metal3 s 633270 600463 633750 600533 0 FreeSans 400 0 0 0 gpio_dm1[9] +port 632 nsew +flabel metal3 s 633270 606627 633750 606697 0 FreeSans 400 0 0 0 gpio_dm2[9] +port 676 nsew +flabel metal3 s 633270 607271 633750 607341 0 FreeSans 400 0 0 0 gpio_holdover[9] +port 412 nsew +flabel metal3 s 633270 610307 633750 610377 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] +port 280 nsew +flabel metal3 s 633270 603499 633750 603569 0 FreeSans 400 0 0 0 gpio_inp_dis[9] +port 236 nsew +flabel metal3 s 633270 610951 633750 611021 0 FreeSans 400 0 0 0 gpio_oeb[9] +port 192 nsew +flabel metal3 s 633270 607823 633750 607893 0 FreeSans 400 0 0 0 gpio_out[9] +port 148 nsew +flabel metal3 s 633270 598623 633750 598693 0 FreeSans 400 0 0 0 gpio_slow_sel[9] +port 368 nsew +flabel metal3 s 633270 609663 633750 609733 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] +port 324 nsew +flabel metal3 s 633270 596783 633750 596853 0 FreeSans 400 0 0 0 gpio_in[9] +port 720 nsew +flabel metal3 s 633270 691859 633750 691929 0 FreeSans 400 0 0 0 gpio_analog_en[11] +port 454 nsew +flabel metal3 s 633270 693147 633750 693217 0 FreeSans 400 0 0 0 gpio_analog_pol[11] +port 542 nsew +flabel metal3 s 633270 696183 633750 696253 0 FreeSans 400 0 0 0 gpio_analog_sel[11] +port 498 nsew +flabel metal3 s 633270 692503 633750 692573 0 FreeSans 400 0 0 0 gpio_dm0[11] +port 586 nsew +flabel metal3 s 633270 690663 633750 690733 0 FreeSans 400 0 0 0 gpio_dm1[11] +port 630 nsew +flabel metal3 s 633270 696827 633750 696897 0 FreeSans 400 0 0 0 gpio_dm2[11] +port 674 nsew +flabel metal3 s 633270 244059 633750 244129 0 FreeSans 400 0 0 0 gpio_analog_en[4] +port 461 nsew +flabel metal3 s 633270 245347 633750 245417 0 FreeSans 400 0 0 0 gpio_analog_pol[4] +port 549 nsew +flabel metal3 s 633270 248383 633750 248453 0 FreeSans 400 0 0 0 gpio_analog_sel[4] +port 505 nsew +flabel metal3 s 633270 244703 633750 244773 0 FreeSans 400 0 0 0 gpio_dm0[4] +port 593 nsew +flabel metal3 s 633270 242863 633750 242933 0 FreeSans 400 0 0 0 gpio_dm1[4] +port 637 nsew +flabel metal3 s 633270 249027 633750 249097 0 FreeSans 400 0 0 0 gpio_dm2[4] +port 681 nsew +flabel metal3 s 633270 249671 633750 249741 0 FreeSans 400 0 0 0 gpio_holdover[4] +port 417 nsew +flabel metal3 s 633270 252707 633750 252777 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] +port 285 nsew +flabel metal3 s 633270 245899 633750 245969 0 FreeSans 400 0 0 0 gpio_inp_dis[4] +port 241 nsew +flabel metal3 s 633270 253351 633750 253421 0 FreeSans 400 0 0 0 gpio_oeb[4] +port 197 nsew +flabel metal3 s 633270 250223 633750 250293 0 FreeSans 400 0 0 0 gpio_out[4] +port 153 nsew +flabel metal3 s 633270 241023 633750 241093 0 FreeSans 400 0 0 0 gpio_slow_sel[4] +port 373 nsew +flabel metal3 s 633270 252063 633750 252133 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] +port 329 nsew +flabel metal3 s 633270 239183 633750 239253 0 FreeSans 400 0 0 0 gpio_in[4] +port 725 nsew +flabel metal3 s 633270 289059 633750 289129 0 FreeSans 400 0 0 0 gpio_analog_en[5] +port 460 nsew +flabel metal3 s 633270 290347 633750 290417 0 FreeSans 400 0 0 0 gpio_analog_pol[5] +port 548 nsew +flabel metal3 s 633270 293383 633750 293453 0 FreeSans 400 0 0 0 gpio_analog_sel[5] +port 504 nsew +flabel metal3 s 633270 289703 633750 289773 0 FreeSans 400 0 0 0 gpio_dm0[5] +port 592 nsew +flabel metal3 s 633270 287863 633750 287933 0 FreeSans 400 0 0 0 gpio_dm1[5] +port 636 nsew +flabel metal3 s 633270 294027 633750 294097 0 FreeSans 400 0 0 0 gpio_dm2[5] +port 680 nsew +flabel metal3 s 633270 294671 633750 294741 0 FreeSans 400 0 0 0 gpio_holdover[5] +port 416 nsew +flabel metal3 s 633270 297707 633750 297777 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] +port 284 nsew +flabel metal3 s 633270 290899 633750 290969 0 FreeSans 400 0 0 0 gpio_inp_dis[5] +port 240 nsew +flabel metal3 s 633270 298351 633750 298421 0 FreeSans 400 0 0 0 gpio_oeb[5] +port 196 nsew +flabel metal3 s 633270 295223 633750 295293 0 FreeSans 400 0 0 0 gpio_out[5] +port 152 nsew +flabel metal3 s 633270 286023 633750 286093 0 FreeSans 400 0 0 0 gpio_slow_sel[5] +port 372 nsew +flabel metal3 s 633270 297063 633750 297133 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] +port 328 nsew +flabel metal3 s 633270 284183 633750 284253 0 FreeSans 400 0 0 0 gpio_in[5] +port 724 nsew +flabel metal3 s 633270 334259 633750 334329 0 FreeSans 400 0 0 0 gpio_analog_en[6] +port 459 nsew +flabel metal3 s 633270 335547 633750 335617 0 FreeSans 400 0 0 0 gpio_analog_pol[6] +port 547 nsew +flabel metal3 s 633270 338583 633750 338653 0 FreeSans 400 0 0 0 gpio_analog_sel[6] +port 503 nsew +flabel metal3 s 633270 334903 633750 334973 0 FreeSans 400 0 0 0 gpio_dm0[6] +port 591 nsew +flabel metal3 s 633270 333063 633750 333133 0 FreeSans 400 0 0 0 gpio_dm1[6] +port 635 nsew +flabel metal3 s 633270 339227 633750 339297 0 FreeSans 400 0 0 0 gpio_dm2[6] +port 679 nsew +flabel metal3 s 633270 339871 633750 339941 0 FreeSans 400 0 0 0 gpio_holdover[6] +port 415 nsew +flabel metal3 s 633270 342907 633750 342977 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] +port 283 nsew +flabel metal3 s 633270 336099 633750 336169 0 FreeSans 400 0 0 0 gpio_inp_dis[6] +port 239 nsew +flabel metal3 s 633270 343551 633750 343621 0 FreeSans 400 0 0 0 gpio_oeb[6] +port 195 nsew +flabel metal3 s 633270 340423 633750 340493 0 FreeSans 400 0 0 0 gpio_out[6] +port 151 nsew +flabel metal3 s 633270 331223 633750 331293 0 FreeSans 400 0 0 0 gpio_slow_sel[6] +port 371 nsew +flabel metal3 s 633270 342263 633750 342333 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] +port 327 nsew +flabel metal3 s 633270 329383 633750 329453 0 FreeSans 400 0 0 0 gpio_in[6] +port 723 nsew +flabel metal3 s 633270 108859 633750 108929 0 FreeSans 400 0 0 0 gpio_analog_en[1] +port 464 nsew +flabel metal3 s 633270 110147 633750 110217 0 FreeSans 400 0 0 0 gpio_analog_pol[1] +port 552 nsew +flabel metal3 s 633270 113183 633750 113253 0 FreeSans 400 0 0 0 gpio_analog_sel[1] +port 508 nsew +flabel metal3 s 633270 109503 633750 109573 0 FreeSans 400 0 0 0 gpio_dm0[1] +port 596 nsew +flabel metal3 s 633270 107663 633750 107733 0 FreeSans 400 0 0 0 gpio_dm1[1] +port 640 nsew +flabel metal3 s 633270 113827 633750 113897 0 FreeSans 400 0 0 0 gpio_dm2[1] +port 684 nsew +flabel metal3 s 633270 114471 633750 114541 0 FreeSans 400 0 0 0 gpio_holdover[1] +port 420 nsew +flabel metal3 s 633270 117507 633750 117577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] +port 288 nsew +flabel metal3 s 633270 110699 633750 110769 0 FreeSans 400 0 0 0 gpio_inp_dis[1] +port 244 nsew +flabel metal3 s 633270 118151 633750 118221 0 FreeSans 400 0 0 0 gpio_oeb[1] +port 200 nsew +flabel metal3 s 633270 115023 633750 115093 0 FreeSans 400 0 0 0 gpio_out[1] +port 156 nsew +flabel metal3 s 633270 105823 633750 105893 0 FreeSans 400 0 0 0 gpio_slow_sel[1] +port 376 nsew +flabel metal3 s 633270 116863 633750 116933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] +port 332 nsew +flabel metal3 s 633270 103983 633750 104053 0 FreeSans 400 0 0 0 gpio_in[1] +port 728 nsew +flabel metal3 s 633270 153859 633750 153929 0 FreeSans 400 0 0 0 gpio_analog_en[2] +port 463 nsew +flabel metal3 s 633270 155147 633750 155217 0 FreeSans 400 0 0 0 gpio_analog_pol[2] +port 551 nsew +flabel metal3 s 633270 158183 633750 158253 0 FreeSans 400 0 0 0 gpio_analog_sel[2] +port 507 nsew +flabel metal3 s 633270 154503 633750 154573 0 FreeSans 400 0 0 0 gpio_dm0[2] +port 595 nsew +flabel metal3 s 633270 152663 633750 152733 0 FreeSans 400 0 0 0 gpio_dm1[2] +port 639 nsew +flabel metal3 s 633270 158827 633750 158897 0 FreeSans 400 0 0 0 gpio_dm2[2] +port 683 nsew +flabel metal3 s 633270 159471 633750 159541 0 FreeSans 400 0 0 0 gpio_holdover[2] +port 419 nsew +flabel metal3 s 633270 162507 633750 162577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] +port 287 nsew +flabel metal3 s 633270 155699 633750 155769 0 FreeSans 400 0 0 0 gpio_inp_dis[2] +port 243 nsew +flabel metal3 s 633270 163151 633750 163221 0 FreeSans 400 0 0 0 gpio_oeb[2] +port 199 nsew +flabel metal3 s 633270 160023 633750 160093 0 FreeSans 400 0 0 0 gpio_out[2] +port 155 nsew +flabel metal3 s 633270 150823 633750 150893 0 FreeSans 400 0 0 0 gpio_slow_sel[2] +port 375 nsew +flabel metal3 s 633270 161863 633750 161933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] +port 331 nsew +flabel metal3 s 633270 148983 633750 149053 0 FreeSans 400 0 0 0 gpio_in[2] +port 727 nsew +flabel metal3 s 633270 199059 633750 199129 0 FreeSans 400 0 0 0 gpio_analog_en[3] +port 462 nsew +flabel metal3 s 633270 200347 633750 200417 0 FreeSans 400 0 0 0 gpio_analog_pol[3] +port 550 nsew +flabel metal3 s 633270 203383 633750 203453 0 FreeSans 400 0 0 0 gpio_analog_sel[3] +port 506 nsew +flabel metal3 s 633270 197863 633750 197933 0 FreeSans 400 0 0 0 gpio_dm1[3] +port 638 nsew +flabel metal3 s 633270 204027 633750 204097 0 FreeSans 400 0 0 0 gpio_dm2[3] +port 682 nsew +flabel metal3 s 633270 199703 633750 199773 0 FreeSans 400 0 0 0 gpio_dm0[3] +port 594 nsew +flabel metal3 s 633270 204671 633750 204741 0 FreeSans 400 0 0 0 gpio_holdover[3] +port 418 nsew +flabel metal3 s 633270 207707 633750 207777 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] +port 286 nsew +flabel metal3 s 633270 200899 633750 200969 0 FreeSans 400 0 0 0 gpio_inp_dis[3] +port 242 nsew +flabel metal3 s 633270 208351 633750 208421 0 FreeSans 400 0 0 0 gpio_oeb[3] +port 198 nsew +flabel metal3 s 633270 205223 633750 205293 0 FreeSans 400 0 0 0 gpio_out[3] +port 154 nsew +flabel metal3 s 633270 196023 633750 196093 0 FreeSans 400 0 0 0 gpio_slow_sel[3] +port 374 nsew +flabel metal3 s 633270 207063 633750 207133 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] +port 330 nsew +flabel metal3 s 633270 63659 633750 63729 0 FreeSans 400 0 0 0 gpio_analog_en[0] +port 465 nsew +flabel metal3 s 633270 64947 633750 65017 0 FreeSans 400 0 0 0 gpio_analog_pol[0] +port 553 nsew +flabel metal3 s 633270 67983 633750 68053 0 FreeSans 400 0 0 0 gpio_analog_sel[0] +port 509 nsew +flabel metal3 s 633270 64303 633750 64373 0 FreeSans 400 0 0 0 gpio_dm0[0] +port 597 nsew +flabel metal3 s 633270 62463 633750 62533 0 FreeSans 400 0 0 0 gpio_dm1[0] +port 641 nsew +flabel metal3 s 633270 68627 633750 68697 0 FreeSans 400 0 0 0 gpio_dm2[0] +port 685 nsew +flabel metal3 s 633270 69271 633750 69341 0 FreeSans 400 0 0 0 gpio_holdover[0] +port 421 nsew +flabel metal3 s 633270 72307 633750 72377 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] +port 289 nsew +flabel metal3 s 633270 65499 633750 65569 0 FreeSans 400 0 0 0 gpio_inp_dis[0] +port 245 nsew +flabel metal3 s 633270 72951 633750 73021 0 FreeSans 400 0 0 0 gpio_oeb[0] +port 201 nsew +flabel metal3 s 633270 69823 633750 69893 0 FreeSans 400 0 0 0 gpio_out[0] +port 157 nsew +flabel metal3 s 633270 60623 633750 60693 0 FreeSans 400 0 0 0 gpio_slow_sel[0] +port 377 nsew +flabel metal3 s 633270 71663 633750 71733 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] +port 333 nsew +flabel metal3 s 633270 58783 633750 58853 0 FreeSans 400 0 0 0 gpio_in[0] +port 729 nsew +flabel metal3 s 633270 194183 633750 194253 0 FreeSans 400 0 0 0 gpio_in[3] +port 726 nsew +flabel metal3 633270 61267 633750 61337 0 FreeSans 400 0 0 0 analog_io[0] +port 905 nsew +flabel metal3 633270 63107 633750 63177 0 FreeSans 400 0 0 0 analog_noesd_io[0] +port 949 nsew +flabel metal3 633270 108307 633750 108377 0 FreeSans 400 0 0 0 analog_noesd_io[1] +port 948 nsew +flabel metal3 633270 106467 633750 106537 0 FreeSans 400 0 0 0 analog_io[1] +port 904 nsew +flabel metal3 633270 73503 633750 73573 0 FreeSans 400 0 0 0 gpio_in_h[0] +port 773 nsew +flabel metal3 633270 118703 633750 118773 0 FreeSans 400 0 0 0 gpio_in_h[1] +port 772 nsew +flabel metal3 633270 151467 633750 151537 0 FreeSans 400 0 0 0 analog_io[2] +port 903 nsew +flabel metal3 633270 153307 633750 153377 0 FreeSans 400 0 0 0 analog_noesd_io[2] +port 947 nsew +flabel metal3 633270 163703 633750 163773 0 FreeSans 400 0 0 0 gpio_in_h[2] +port 771 nsew +flabel metal3 633270 196667 633750 196737 0 FreeSans 400 0 0 0 analog_io[3] +port 902 nsew +flabel metal3 633270 198507 633750 198577 0 FreeSans 400 0 0 0 analog_noesd_io[3] +port 946 nsew +flabel metal3 633270 208903 633750 208973 0 FreeSans 400 0 0 0 gpio_in_h[3] +port 770 nsew +flabel metal3 633270 241667 633750 241737 0 FreeSans 400 0 0 0 analog_io[4] +port 901 nsew +flabel metal3 633270 243507 633750 243577 0 FreeSans 400 0 0 0 analog_noesd_io[4] +port 945 nsew +flabel metal3 633270 253903 633750 253973 0 FreeSans 400 0 0 0 gpio_in_h[4] +port 769 nsew +flabel metal3 633270 286667 633750 286737 0 FreeSans 400 0 0 0 analog_io[5] +port 900 nsew +flabel metal3 633270 288507 633750 288577 0 FreeSans 400 0 0 0 analog_noesd_io[5] +port 944 nsew +flabel metal3 633270 298903 633750 298973 0 FreeSans 400 0 0 0 gpio_in_h[5] +port 768 nsew +flabel metal3 633270 331867 633750 331937 0 FreeSans 400 0 0 0 analog_io[6] +port 899 nsew +flabel metal3 633270 333707 633750 333777 0 FreeSans 400 0 0 0 analog_noesd_io[6] +port 943 nsew +flabel metal3 633270 344103 633750 344173 0 FreeSans 400 0 0 0 gpio_in_h[6] +port 767 nsew +flabel metal3 s 633270 509067 633750 509137 0 FreeSans 400 0 0 0 analog_io[7] +port 898 nsew +flabel metal3 s 633270 510907 633750 510977 0 FreeSans 400 0 0 0 analog_noesd_io[7] +port 942 nsew +flabel metal3 s 633270 521303 633750 521373 0 FreeSans 400 0 0 0 gpio_in_h[7] +port 766 nsew +flabel metal3 s 633270 554267 633750 554337 0 FreeSans 400 0 0 0 analog_io[8] +port 897 nsew +flabel metal3 s 633270 556107 633750 556177 0 FreeSans 400 0 0 0 analog_noesd_io[8] +port 941 nsew +flabel metal3 s 633270 566503 633750 566573 0 FreeSans 400 0 0 0 gpio_in_h[8] +port 765 nsew +flabel metal3 s 633270 599267 633750 599337 0 FreeSans 400 0 0 0 analog_io[9] +port 896 nsew +flabel metal3 s 633270 601107 633750 601177 0 FreeSans 400 0 0 0 analog_noesd_io[9] +port 940 nsew +flabel metal3 s 633270 611503 633750 611573 0 FreeSans 400 0 0 0 gpio_in_h[9] +port 764 nsew +flabel metal3 s 633270 644467 633750 644537 0 FreeSans 400 0 0 0 analog_io[10] +port 895 nsew +flabel metal3 s 633270 646307 633750 646377 0 FreeSans 400 0 0 0 analog_noesd_io[10] +port 939 nsew +flabel metal3 s 633270 656703 633750 656773 0 FreeSans 400 0 0 0 gpio_in_h[10] +port 763 nsew +flabel metal3 s 633270 689467 633750 689537 0 FreeSans 400 0 0 0 analog_io[11] +port 894 nsew +flabel metal3 s 633270 691307 633750 691377 0 FreeSans 400 0 0 0 analog_noesd_io[11] +port 938 nsew +flabel metal3 s 633270 701703 633750 701773 0 FreeSans 400 0 0 0 gpio_in_h[11] +port 762 nsew +flabel metal3 s 633270 746703 633750 746773 0 FreeSans 400 0 0 0 gpio_in_h[12] +port 761 nsew +flabel metal3 s 633270 835903 633750 835973 0 FreeSans 400 0 0 0 gpio_in_h[13] +port 760 nsew +flabel metal3 s 633270 925103 633750 925173 0 FreeSans 400 0 0 0 gpio_in_h[14] +port 759 nsew +flabel metal3 s 633270 734467 633750 734537 0 FreeSans 400 0 0 0 analog_io[12] +port 893 nsew +flabel metal3 s 633270 823667 633750 823737 0 FreeSans 400 0 0 0 analog_io[13] +port 892 nsew +flabel metal3 s 633270 912867 633750 912937 0 FreeSans 400 0 0 0 analog_io[14] +port 891 nsew +flabel metal3 s 633270 736307 633750 736377 0 FreeSans 400 0 0 0 analog_noesd_io[12] +port 937 nsew +flabel metal3 s 633270 825507 633750 825577 0 FreeSans 400 0 0 0 analog_noesd_io[13] +port 936 nsew +flabel metal3 s 633270 914707 633750 914777 0 FreeSans 400 0 0 0 analog_noesd_io[14] +port 935 nsew +flabel metal3 s -424 922197 56 922267 0 FreeSans 400 0 0 0 gpio_analog_en[24] +port 441 nsew +flabel metal3 s -424 920909 56 920979 0 FreeSans 400 0 0 0 gpio_analog_pol[24] +port 529 nsew +flabel metal3 s -424 917873 56 917943 0 FreeSans 400 0 0 0 gpio_analog_sel[24] +port 485 nsew +flabel metal3 s -424 921553 56 921623 0 FreeSans 400 0 0 0 gpio_dm0[24] +port 573 nsew +flabel metal3 s -424 923393 56 923463 0 FreeSans 400 0 0 0 gpio_dm1[24] +port 617 nsew +flabel metal3 s -424 917229 56 917299 0 FreeSans 400 0 0 0 gpio_dm2[24] +port 661 nsew +flabel metal3 s -424 916585 56 916655 0 FreeSans 400 0 0 0 gpio_holdover[24] +port 397 nsew +flabel metal3 s -424 913549 56 913619 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] +port 265 nsew +flabel metal3 s -424 920357 56 920427 0 FreeSans 400 0 0 0 gpio_inp_dis[24] +port 221 nsew +flabel metal3 s -424 912905 56 912975 0 FreeSans 400 0 0 0 gpio_oeb[24] +port 177 nsew +flabel metal3 s -424 916033 56 916103 0 FreeSans 400 0 0 0 gpio_out[24] +port 133 nsew +flabel metal3 s -424 925233 56 925303 0 FreeSans 400 0 0 0 gpio_slow_sel[24] +port 353 nsew +flabel metal3 s -424 914193 56 914263 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] +port 309 nsew +flabel metal3 s -424 927073 56 927143 0 FreeSans 400 0 0 0 gpio_in[24] +port 705 nsew +flabel metal3 s -424 912353 56 912423 0 FreeSans 400 0 0 0 gpio_in_h[24] +port 749 nsew +flabel metal3 s -424 924589 56 924659 0 FreeSans 400 0 0 0 analog_io[24] +port 881 nsew +flabel metal3 s -424 922749 56 922819 0 FreeSans 400 0 0 0 analog_noesd_io[24] +port 925 nsew +flabel metal3 -283 53372 56 53442 0 FreeSans 400 0 0 0 por_l +port 35 nsew +flabel metal3 -283 53595 56 53665 0 FreeSans 400 0 0 0 porb_l +port 34 nsew +flabel metal3 -283 53147 56 53217 0 FreeSans 400 0 0 0 porb_h +port 33 nsew +flabel metal3 s -424 752397 56 752467 0 FreeSans 400 0 0 0 gpio_analog_en[25] +port 440 nsew +flabel metal3 s -424 751109 56 751179 0 FreeSans 400 0 0 0 gpio_analog_pol[25] +port 528 nsew +flabel metal3 s -424 748073 56 748143 0 FreeSans 400 0 0 0 gpio_analog_sel[25] +port 484 nsew +flabel metal3 s -424 751753 56 751823 0 FreeSans 400 0 0 0 gpio_dm0[25] +port 572 nsew +flabel metal3 s -424 753593 56 753663 0 FreeSans 400 0 0 0 gpio_dm1[25] +port 616 nsew +flabel metal3 s -424 747429 56 747499 0 FreeSans 400 0 0 0 gpio_dm2[25] +port 660 nsew +flabel metal3 s -424 746785 56 746855 0 FreeSans 400 0 0 0 gpio_holdover[25] +port 396 nsew +flabel metal3 s -424 743749 56 743819 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] +port 264 nsew +flabel metal3 s -424 750557 56 750627 0 FreeSans 400 0 0 0 gpio_inp_dis[25] +port 220 nsew +flabel metal3 s -424 743105 56 743175 0 FreeSans 400 0 0 0 gpio_oeb[25] +port 176 nsew +flabel metal3 s -424 746233 56 746303 0 FreeSans 400 0 0 0 gpio_out[25] +port 132 nsew +flabel metal3 s -424 755433 56 755503 0 FreeSans 400 0 0 0 gpio_slow_sel[25] +port 352 nsew +flabel metal3 s -424 757273 56 757343 0 FreeSans 400 0 0 0 gpio_in[25] +port 704 nsew +flabel metal3 s -424 535753 56 535823 0 FreeSans 400 0 0 0 gpio_dm0[30] +port 567 nsew +flabel metal3 s -424 537593 56 537663 0 FreeSans 400 0 0 0 gpio_dm1[30] +port 611 nsew +flabel metal3 s -424 531429 56 531499 0 FreeSans 400 0 0 0 gpio_dm2[30] +port 655 nsew +flabel metal3 s -424 530785 56 530855 0 FreeSans 400 0 0 0 gpio_holdover[30] +port 391 nsew +flabel metal3 s -424 527749 56 527819 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] +port 259 nsew +flabel metal3 s -424 534557 56 534627 0 FreeSans 400 0 0 0 gpio_inp_dis[30] +port 215 nsew +flabel metal3 s -424 527105 56 527175 0 FreeSans 400 0 0 0 gpio_oeb[30] +port 171 nsew +flabel metal3 s -424 530233 56 530303 0 FreeSans 400 0 0 0 gpio_out[30] +port 127 nsew +flabel metal3 s -424 539433 56 539503 0 FreeSans 400 0 0 0 gpio_slow_sel[30] +port 347 nsew +flabel metal3 s -424 528393 56 528463 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] +port 303 nsew +flabel metal3 s -424 541273 56 541343 0 FreeSans 400 0 0 0 gpio_in[30] +port 699 nsew +flabel metal3 s -424 493197 56 493267 0 FreeSans 400 0 0 0 gpio_analog_en[31] +port 434 nsew +flabel metal3 s -424 491909 56 491979 0 FreeSans 400 0 0 0 gpio_analog_pol[31] +port 522 nsew +flabel metal3 s -424 488873 56 488943 0 FreeSans 400 0 0 0 gpio_analog_sel[31] +port 478 nsew +flabel metal3 s -424 492553 56 492623 0 FreeSans 400 0 0 0 gpio_dm0[31] +port 566 nsew +flabel metal3 s -424 494393 56 494463 0 FreeSans 400 0 0 0 gpio_dm1[31] +port 610 nsew +flabel metal3 s -424 488229 56 488299 0 FreeSans 400 0 0 0 gpio_dm2[31] +port 654 nsew +flabel metal3 s -424 487585 56 487655 0 FreeSans 400 0 0 0 gpio_holdover[31] +port 390 nsew +flabel metal3 s -424 484549 56 484619 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] +port 258 nsew +flabel metal3 s -424 491357 56 491427 0 FreeSans 400 0 0 0 gpio_inp_dis[31] +port 214 nsew +flabel metal3 s -424 483905 56 483975 0 FreeSans 400 0 0 0 gpio_oeb[31] +port 170 nsew +flabel metal3 s -424 487033 56 487103 0 FreeSans 400 0 0 0 gpio_out[31] +port 126 nsew +flabel metal3 s -424 496233 56 496303 0 FreeSans 400 0 0 0 gpio_slow_sel[31] +port 346 nsew +flabel metal3 s -424 485193 56 485263 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] +port 302 nsew +flabel metal3 s -424 498073 56 498143 0 FreeSans 400 0 0 0 gpio_in[31] +port 698 nsew +flabel metal3 s -424 709197 56 709267 0 FreeSans 400 0 0 0 gpio_analog_en[26] +port 439 nsew +flabel metal3 s -424 707909 56 707979 0 FreeSans 400 0 0 0 gpio_analog_pol[26] +port 527 nsew +flabel metal3 s -424 704873 56 704943 0 FreeSans 400 0 0 0 gpio_analog_sel[26] +port 483 nsew +flabel metal3 s -424 708553 56 708623 0 FreeSans 400 0 0 0 gpio_dm0[26] +port 571 nsew +flabel metal3 s -424 710393 56 710463 0 FreeSans 400 0 0 0 gpio_dm1[26] +port 615 nsew +flabel metal3 s -424 704229 56 704299 0 FreeSans 400 0 0 0 gpio_dm2[26] +port 659 nsew +flabel metal3 s -424 703585 56 703655 0 FreeSans 400 0 0 0 gpio_holdover[26] +port 395 nsew +flabel metal3 s -424 700549 56 700619 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] +port 263 nsew +flabel metal3 s -424 707357 56 707427 0 FreeSans 400 0 0 0 gpio_inp_dis[26] +port 219 nsew +flabel metal3 s -424 699905 56 699975 0 FreeSans 400 0 0 0 gpio_oeb[26] +port 175 nsew +flabel metal3 s -424 703033 56 703103 0 FreeSans 400 0 0 0 gpio_out[26] +port 131 nsew +flabel metal3 s -424 712233 56 712303 0 FreeSans 400 0 0 0 gpio_slow_sel[26] +port 351 nsew +flabel metal3 s -424 701193 56 701263 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] +port 307 nsew +flabel metal3 s -424 714073 56 714143 0 FreeSans 400 0 0 0 gpio_in[26] +port 703 nsew +flabel metal3 s -424 665997 56 666067 0 FreeSans 400 0 0 0 gpio_analog_en[27] +port 438 nsew +flabel metal3 s -424 664709 56 664779 0 FreeSans 400 0 0 0 gpio_analog_pol[27] +port 526 nsew +flabel metal3 s -424 661673 56 661743 0 FreeSans 400 0 0 0 gpio_analog_sel[27] +port 482 nsew +flabel metal3 s -424 665353 56 665423 0 FreeSans 400 0 0 0 gpio_dm0[27] +port 570 nsew +flabel metal3 s -424 667193 56 667263 0 FreeSans 400 0 0 0 gpio_dm1[27] +port 614 nsew +flabel metal3 s -424 661029 56 661099 0 FreeSans 400 0 0 0 gpio_dm2[27] +port 658 nsew +flabel metal3 s -424 660385 56 660455 0 FreeSans 400 0 0 0 gpio_holdover[27] +port 394 nsew +flabel metal3 s -424 657349 56 657419 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] +port 262 nsew +flabel metal3 s -424 664157 56 664227 0 FreeSans 400 0 0 0 gpio_inp_dis[27] +port 218 nsew +flabel metal3 s -424 656705 56 656775 0 FreeSans 400 0 0 0 gpio_oeb[27] +port 174 nsew +flabel metal3 s -424 659833 56 659903 0 FreeSans 400 0 0 0 gpio_out[27] +port 130 nsew +flabel metal3 s -424 669033 56 669103 0 FreeSans 400 0 0 0 gpio_slow_sel[27] +port 350 nsew +flabel metal3 s -424 657993 56 658063 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] +port 306 nsew +flabel metal3 s -424 670873 56 670943 0 FreeSans 400 0 0 0 gpio_in[27] +port 702 nsew +flabel metal3 s -424 622797 56 622867 0 FreeSans 400 0 0 0 gpio_analog_en[28] +port 437 nsew +flabel metal3 s -424 621509 56 621579 0 FreeSans 400 0 0 0 gpio_analog_pol[28] +port 525 nsew +flabel metal3 s -424 618473 56 618543 0 FreeSans 400 0 0 0 gpio_analog_sel[28] +port 481 nsew +flabel metal3 s -424 622153 56 622223 0 FreeSans 400 0 0 0 gpio_dm0[28] +port 569 nsew +flabel metal3 s -424 623993 56 624063 0 FreeSans 400 0 0 0 gpio_dm1[28] +port 613 nsew +flabel metal3 s -424 617829 56 617899 0 FreeSans 400 0 0 0 gpio_dm2[28] +port 657 nsew +flabel metal3 s -424 617185 56 617255 0 FreeSans 400 0 0 0 gpio_holdover[28] +port 393 nsew +flabel metal3 s -424 614149 56 614219 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] +port 261 nsew +flabel metal3 s -424 620957 56 621027 0 FreeSans 400 0 0 0 gpio_inp_dis[28] +port 217 nsew +flabel metal3 s -424 613505 56 613575 0 FreeSans 400 0 0 0 gpio_oeb[28] +port 173 nsew +flabel metal3 s -424 616633 56 616703 0 FreeSans 400 0 0 0 gpio_out[28] +port 129 nsew +flabel metal3 s -424 625833 56 625903 0 FreeSans 400 0 0 0 gpio_slow_sel[28] +port 349 nsew +flabel metal3 s -424 614793 56 614863 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] +port 305 nsew +flabel metal3 s -424 627673 56 627743 0 FreeSans 400 0 0 0 gpio_in[28] +port 701 nsew +flabel metal3 s -424 579597 56 579667 0 FreeSans 400 0 0 0 gpio_analog_en[29] +port 436 nsew +flabel metal3 s -424 578309 56 578379 0 FreeSans 400 0 0 0 gpio_analog_pol[29] +port 524 nsew +flabel metal3 s -424 575273 56 575343 0 FreeSans 400 0 0 0 gpio_analog_sel[29] +port 480 nsew +flabel metal3 s -424 578953 56 579023 0 FreeSans 400 0 0 0 gpio_dm0[29] +port 568 nsew +flabel metal3 s -424 580793 56 580863 0 FreeSans 400 0 0 0 gpio_dm1[29] +port 612 nsew +flabel metal3 s -424 574629 56 574699 0 FreeSans 400 0 0 0 gpio_dm2[29] +port 656 nsew +flabel metal3 s -424 573985 56 574055 0 FreeSans 400 0 0 0 gpio_holdover[29] +port 392 nsew +flabel metal3 s -424 570949 56 571019 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] +port 260 nsew +flabel metal3 s -424 577757 56 577827 0 FreeSans 400 0 0 0 gpio_inp_dis[29] +port 216 nsew +flabel metal3 s -424 570305 56 570375 0 FreeSans 400 0 0 0 gpio_oeb[29] +port 172 nsew +flabel metal3 s -424 573433 56 573503 0 FreeSans 400 0 0 0 gpio_out[29] +port 128 nsew +flabel metal3 s -424 582633 56 582703 0 FreeSans 400 0 0 0 gpio_slow_sel[29] +port 348 nsew +flabel metal3 s -424 571593 56 571663 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] +port 304 nsew +flabel metal3 s -424 584473 56 584543 0 FreeSans 400 0 0 0 gpio_in[29] +port 700 nsew +flabel metal3 s -424 536397 56 536467 0 FreeSans 400 0 0 0 gpio_analog_en[30] +port 435 nsew +flabel metal3 s -424 535109 56 535179 0 FreeSans 400 0 0 0 gpio_analog_pol[30] +port 523 nsew +flabel metal3 s -424 532073 56 532143 0 FreeSans 400 0 0 0 gpio_analog_sel[30] +port 479 nsew +flabel metal3 s -424 193993 56 194064 0 FreeSans 400 0 0 0 gpio_dm1[36] +port 605 nsew +flabel metal3 s -424 187829 56 187900 0 FreeSans 400 0 0 0 gpio_dm2[36] +port 649 nsew +flabel metal3 s -424 187185 56 187256 0 FreeSans 400 0 0 0 gpio_holdover[36] +port 385 nsew +flabel metal3 s -424 184149 56 184220 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] +port 253 nsew +flabel metal3 s -424 190957 56 191028 0 FreeSans 400 0 0 0 gpio_inp_dis[36] +port 209 nsew +flabel metal3 s -424 183505 56 183576 0 FreeSans 400 0 0 0 gpio_oeb[36] +port 165 nsew +flabel metal3 s -424 186633 56 186704 0 FreeSans 400 0 0 0 gpio_out[36] +port 121 nsew +flabel metal3 s -424 195833 56 195904 0 FreeSans 400 0 0 0 gpio_slow_sel[36] +port 341 nsew +flabel metal3 s -424 184793 56 184864 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] +port 297 nsew +flabel metal3 s -424 197673 56 197744 0 FreeSans 400 0 0 0 gpio_in[36] +port 693 nsew +flabel metal3 s -424 149597 56 149668 0 FreeSans 400 0 0 0 gpio_analog_en[37] +port 428 nsew +flabel metal3 s -424 148309 56 148380 0 FreeSans 400 0 0 0 gpio_analog_pol[37] +port 516 nsew +flabel metal3 s -424 145273 56 145344 0 FreeSans 400 0 0 0 gpio_analog_sel[37] +port 472 nsew +flabel metal3 s -424 148953 56 149024 0 FreeSans 400 0 0 0 gpio_dm0[37] +port 560 nsew +flabel metal3 s -424 150793 56 150864 0 FreeSans 400 0 0 0 gpio_dm1[37] +port 604 nsew +flabel metal3 s -424 144629 56 144700 0 FreeSans 400 0 0 0 gpio_dm2[37] +port 648 nsew +flabel metal3 s -424 143985 56 144056 0 FreeSans 400 0 0 0 gpio_holdover[37] +port 384 nsew +flabel metal3 s -424 140949 56 141020 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] +port 252 nsew +flabel metal3 s -424 140305 56 140376 0 FreeSans 400 0 0 0 gpio_oeb[37] +port 164 nsew +flabel metal3 s -424 143433 56 143504 0 FreeSans 400 0 0 0 gpio_out[37] +port 120 nsew +flabel metal3 s -424 152633 56 152704 0 FreeSans 400 0 0 0 gpio_slow_sel[37] +port 340 nsew +flabel metal3 s -424 154473 56 154544 0 FreeSans 400 0 0 0 gpio_in[37] +port 692 nsew +flabel metal3 s -424 365597 56 365667 0 FreeSans 400 0 0 0 gpio_analog_en[32] +port 433 nsew +flabel metal3 s -424 364309 56 364379 0 FreeSans 400 0 0 0 gpio_analog_pol[32] +port 521 nsew +flabel metal3 s -424 361273 56 361343 0 FreeSans 400 0 0 0 gpio_analog_sel[32] +port 477 nsew +flabel metal3 s -424 364953 56 365023 0 FreeSans 400 0 0 0 gpio_dm0[32] +port 565 nsew +flabel metal3 s -424 366793 56 366863 0 FreeSans 400 0 0 0 gpio_dm1[32] +port 609 nsew +flabel metal3 s -424 360629 56 360699 0 FreeSans 400 0 0 0 gpio_dm2[32] +port 653 nsew +flabel metal3 s -424 359985 56 360055 0 FreeSans 400 0 0 0 gpio_holdover[32] +port 389 nsew +flabel metal3 s -424 356949 56 357019 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] +port 257 nsew +flabel metal3 s -424 363757 56 363827 0 FreeSans 400 0 0 0 gpio_inp_dis[32] +port 213 nsew +flabel metal3 s -424 356305 56 356375 0 FreeSans 400 0 0 0 gpio_oeb[32] +port 169 nsew +flabel metal3 s -424 359433 56 359503 0 FreeSans 400 0 0 0 gpio_out[32] +port 125 nsew +flabel metal3 s -424 368633 56 368703 0 FreeSans 400 0 0 0 gpio_slow_sel[32] +port 345 nsew +flabel metal3 s -424 357593 56 357663 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] +port 301 nsew +flabel metal3 s -424 370473 56 370543 0 FreeSans 400 0 0 0 gpio_in[32] +port 697 nsew +flabel metal3 s -424 322397 56 322467 0 FreeSans 400 0 0 0 gpio_analog_en[33] +port 432 nsew +flabel metal3 s -424 318073 56 318143 0 FreeSans 400 0 0 0 gpio_analog_sel[33] +port 476 nsew +flabel metal3 s -424 323593 56 323663 0 FreeSans 400 0 0 0 gpio_dm1[33] +port 608 nsew +flabel metal3 s -424 317429 56 317499 0 FreeSans 400 0 0 0 gpio_dm2[33] +port 652 nsew +flabel metal3 s -424 321753 56 321823 0 FreeSans 400 0 0 0 gpio_dm0[33] +port 564 nsew +flabel metal3 s -424 316785 56 316855 0 FreeSans 400 0 0 0 gpio_holdover[33] +port 388 nsew +flabel metal3 s -424 313749 56 313819 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] +port 256 nsew +flabel metal3 s -424 320557 56 320627 0 FreeSans 400 0 0 0 gpio_inp_dis[33] +port 212 nsew +flabel metal3 s -424 313105 56 313175 0 FreeSans 400 0 0 0 gpio_oeb[33] +port 168 nsew +flabel metal3 s -424 316233 56 316303 0 FreeSans 400 0 0 0 gpio_out[33] +port 124 nsew +flabel metal3 s -424 325433 56 325503 0 FreeSans 400 0 0 0 gpio_slow_sel[33] +port 344 nsew +flabel metal3 s -424 314393 56 314463 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] +port 300 nsew +flabel metal3 s -424 327273 56 327343 0 FreeSans 400 0 0 0 gpio_in[33] +port 696 nsew +flabel metal3 s -424 279197 56 279267 0 FreeSans 400 0 0 0 gpio_analog_en[34] +port 431 nsew +flabel metal3 s -424 277909 56 277979 0 FreeSans 400 0 0 0 gpio_analog_pol[34] +port 519 nsew +flabel metal3 s -424 274873 56 274943 0 FreeSans 400 0 0 0 gpio_analog_sel[34] +port 475 nsew +flabel metal3 s -424 278553 56 278623 0 FreeSans 400 0 0 0 gpio_dm0[34] +port 563 nsew +flabel metal3 s -424 280393 56 280463 0 FreeSans 400 0 0 0 gpio_dm1[34] +port 607 nsew +flabel metal3 s -424 274229 56 274299 0 FreeSans 400 0 0 0 gpio_dm2[34] +port 651 nsew +flabel metal3 s -424 273585 56 273655 0 FreeSans 400 0 0 0 gpio_holdover[34] +port 387 nsew +flabel metal3 s -424 270549 56 270619 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] +port 255 nsew +flabel metal3 s -424 277357 56 277427 0 FreeSans 400 0 0 0 gpio_inp_dis[34] +port 211 nsew +flabel metal3 s -424 269905 56 269975 0 FreeSans 400 0 0 0 gpio_oeb[34] +port 167 nsew +flabel metal3 s -424 273033 56 273103 0 FreeSans 400 0 0 0 gpio_out[34] +port 123 nsew +flabel metal3 s -424 282233 56 282303 0 FreeSans 400 0 0 0 gpio_slow_sel[34] +port 343 nsew +flabel metal3 s -424 271193 56 271263 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] +port 299 nsew +flabel metal3 s -424 284073 56 284143 0 FreeSans 400 0 0 0 gpio_in[34] +port 695 nsew +flabel metal3 s -424 235997 56 236067 0 FreeSans 400 0 0 0 gpio_analog_en[35] +port 430 nsew +flabel metal3 s -424 234709 56 234779 0 FreeSans 400 0 0 0 gpio_analog_pol[35] +port 518 nsew +flabel metal3 s -424 231673 56 231743 0 FreeSans 400 0 0 0 gpio_analog_sel[35] +port 474 nsew +flabel metal3 s -424 235353 56 235423 0 FreeSans 400 0 0 0 gpio_dm0[35] +port 562 nsew +flabel metal3 s -424 237193 56 237263 0 FreeSans 400 0 0 0 gpio_dm1[35] +port 606 nsew +flabel metal3 s -424 231029 56 231099 0 FreeSans 400 0 0 0 gpio_dm2[35] +port 650 nsew +flabel metal3 s -424 230385 56 230455 0 FreeSans 400 0 0 0 gpio_holdover[35] +port 386 nsew +flabel metal3 s -424 227349 56 227419 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] +port 254 nsew +flabel metal3 s -424 234157 56 234227 0 FreeSans 400 0 0 0 gpio_inp_dis[35] +port 210 nsew +flabel metal3 s -424 226705 56 226775 0 FreeSans 400 0 0 0 gpio_oeb[35] +port 166 nsew +flabel metal3 s -424 229833 56 229903 0 FreeSans 400 0 0 0 gpio_out[35] +port 122 nsew +flabel metal3 s -424 239033 56 239103 0 FreeSans 400 0 0 0 gpio_slow_sel[35] +port 342 nsew +flabel metal3 s -424 227993 56 228063 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] +port 298 nsew +flabel metal3 s -424 240873 56 240943 0 FreeSans 400 0 0 0 gpio_in[35] +port 694 nsew +flabel metal3 s -424 192797 56 192868 0 FreeSans 400 0 0 0 gpio_analog_en[36] +port 429 nsew +flabel metal3 s -424 191509 56 191580 0 FreeSans 400 0 0 0 gpio_analog_pol[36] +port 517 nsew +flabel metal3 s -424 188473 56 188544 0 FreeSans 400 0 0 0 gpio_analog_sel[36] +port 473 nsew +flabel metal3 s -424 192153 56 192224 0 FreeSans 400 0 0 0 gpio_dm0[36] +port 561 nsew +flabel metal3 s -424 147757 56 147828 0 FreeSans 400 0 0 0 gpio_inp_dis[37] +port 208 nsew +flabel metal3 s -424 742553 56 742623 0 FreeSans 400 0 0 0 gpio_in_h[25] +port 748 nsew +flabel metal3 s -424 699353 56 699423 0 FreeSans 400 0 0 0 gpio_in_h[26] +port 747 nsew +flabel metal3 s -424 656153 56 656223 0 FreeSans 400 0 0 0 gpio_in_h[27] +port 746 nsew +flabel metal3 s -424 612953 56 613023 0 FreeSans 400 0 0 0 gpio_in_h[28] +port 745 nsew +flabel metal3 s -424 569753 56 569823 0 FreeSans 400 0 0 0 gpio_in_h[29] +port 744 nsew +flabel metal3 s -424 526553 56 526623 0 FreeSans 400 0 0 0 gpio_in_h[30] +port 743 nsew +flabel metal3 s -424 483353 56 483423 0 FreeSans 400 0 0 0 gpio_in_h[31] +port 742 nsew +flabel metal3 s -424 355753 56 355823 0 FreeSans 400 0 0 0 gpio_in_h[32] +port 741 nsew +flabel metal3 s -424 312553 56 312623 0 FreeSans 400 0 0 0 gpio_in_h[33] +port 740 nsew +flabel metal3 s -424 269353 56 269423 0 FreeSans 400 0 0 0 gpio_in_h[34] +port 739 nsew +flabel metal3 s -424 226153 56 226223 0 FreeSans 400 0 0 0 gpio_in_h[35] +port 738 nsew +flabel metal3 s -424 182953 56 183024 0 FreeSans 400 0 0 0 gpio_in_h[36] +port 737 nsew +flabel metal3 s -424 139753 56 139824 0 FreeSans 400 0 0 0 gpio_in_h[37] +port 736 nsew +flabel metal3 s -424 754789 56 754859 0 FreeSans 400 0 0 0 analog_io[25] +port 880 nsew +flabel metal3 s -424 711589 56 711659 0 FreeSans 400 0 0 0 analog_io[26] +port 879 nsew +flabel metal3 s -424 668389 56 668459 0 FreeSans 400 0 0 0 analog_io[27] +port 878 nsew +flabel metal3 s -424 625189 56 625259 0 FreeSans 400 0 0 0 analog_io[28] +port 877 nsew +flabel metal3 s -424 581989 56 582059 0 FreeSans 400 0 0 0 analog_io[29] +port 876 nsew +flabel metal3 s -424 538789 56 538859 0 FreeSans 400 0 0 0 analog_io[30] +port 875 nsew +flabel metal3 s -424 495589 56 495659 0 FreeSans 400 0 0 0 analog_io[31] +port 874 nsew +flabel metal3 s -424 367989 56 368059 0 FreeSans 400 0 0 0 analog_io[32] +port 873 nsew +flabel metal3 s -424 324789 56 324859 0 FreeSans 400 0 0 0 analog_io[33] +port 872 nsew +flabel metal3 s -424 281589 56 281659 0 FreeSans 400 0 0 0 analog_io[34] +port 871 nsew +flabel metal3 s -424 238389 56 238459 0 FreeSans 400 0 0 0 analog_io[35] +port 870 nsew +flabel metal3 s -424 195189 56 195260 0 FreeSans 400 0 0 0 analog_io[36] +port 869 nsew +flabel metal3 s -424 151989 56 152060 0 FreeSans 400 0 0 0 analog_io[37] +port 868 nsew +flabel metal3 s -424 752949 56 753019 0 FreeSans 400 0 0 0 analog_noesd_io[25] +port 924 nsew +flabel metal3 s -424 709749 56 709819 0 FreeSans 400 0 0 0 analog_noesd_io[26] +port 923 nsew +flabel metal3 s -424 666549 56 666619 0 FreeSans 400 0 0 0 analog_noesd_io[27] +port 922 nsew +flabel metal3 s -424 623349 56 623419 0 FreeSans 400 0 0 0 analog_noesd_io[28] +port 921 nsew +flabel metal3 s -424 580149 56 580219 0 FreeSans 400 0 0 0 analog_noesd_io[29] +port 920 nsew +flabel metal3 s -424 536949 56 537019 0 FreeSans 400 0 0 0 analog_noesd_io[30] +port 919 nsew +flabel metal3 s -424 493749 56 493819 0 FreeSans 400 0 0 0 analog_noesd_io[31] +port 918 nsew +flabel metal3 s -424 366149 56 366219 0 FreeSans 400 0 0 0 analog_noesd_io[32] +port 917 nsew +flabel metal3 s -424 322949 56 323019 0 FreeSans 400 0 0 0 analog_noesd_io[33] +port 916 nsew +flabel metal3 s -424 279749 56 279819 0 FreeSans 400 0 0 0 analog_noesd_io[34] +port 915 nsew +flabel metal3 s -424 236549 56 236619 0 FreeSans 400 0 0 0 analog_noesd_io[35] +port 914 nsew +flabel metal3 s -424 193349 56 193420 0 FreeSans 400 0 0 0 analog_noesd_io[36] +port 913 nsew +flabel metal3 s -424 150149 56 150220 0 FreeSans 400 0 0 0 analog_noesd_io[37] +port 912 nsew +flabel metal3 s -424 744393 56 744463 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] +port 308 nsew +flabel metal3 s -424 321116 56 321172 0 FreeSans 400 0 0 0 gpio_analog_pol[33] +port 520 nsew +flabel metal3 633270 211405 633590 211467 0 FreeSans 400 0 0 0 gpio_loopback_one[3] +port 858 nsew +flabel metal3 633270 213407 633590 213469 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] +port 814 nsew +flabel metal3 633270 256405 633590 256467 0 FreeSans 400 0 0 0 gpio_loopback_one[4] +port 857 nsew +flabel metal3 633270 258407 633590 258469 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] +port 813 nsew +flabel metal3 633270 301405 633590 301467 0 FreeSans 400 0 0 0 gpio_loopback_one[5] +port 856 nsew +flabel metal3 633270 303407 633590 303469 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] +port 812 nsew +flabel metal3 633270 346605 633590 346667 0 FreeSans 400 0 0 0 gpio_loopback_one[6] +port 855 nsew +flabel metal3 633270 348607 633590 348669 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] +port 811 nsew +flabel metal3 633270 523805 633590 523867 0 FreeSans 400 0 0 0 gpio_loopback_one[7] +port 854 nsew +flabel metal3 633270 525807 633590 525869 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] +port 810 nsew +flabel metal3 633270 569005 633590 569067 0 FreeSans 400 0 0 0 gpio_loopback_one[8] +port 853 nsew +flabel metal3 633270 571007 633590 571069 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] +port 809 nsew +flabel metal3 633270 614005 633590 614067 0 FreeSans 400 0 0 0 gpio_loopback_one[9] +port 852 nsew +flabel metal3 633270 616007 633590 616069 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] +port 808 nsew +flabel metal3 633270 659205 633590 659267 0 FreeSans 400 0 0 0 gpio_loopback_one[10] +port 851 nsew +flabel metal3 633270 661207 633590 661269 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] +port 807 nsew +flabel metal3 633270 704205 633590 704267 0 FreeSans 400 0 0 0 gpio_loopback_one[11] +port 850 nsew +flabel metal3 633270 706207 633590 706269 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] +port 806 nsew +flabel metal3 633270 749205 633590 749267 0 FreeSans 400 0 0 0 gpio_loopback_one[12] +port 849 nsew +flabel metal3 633270 751207 633590 751269 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] +port 805 nsew +flabel metal3 633270 838405 633590 838467 0 FreeSans 400 0 0 0 gpio_loopback_one[13] +port 848 nsew +flabel metal3 633270 840407 633590 840469 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] +port 804 nsew +flabel metal3 633270 927605 633590 927667 0 FreeSans 400 0 0 0 gpio_loopback_one[14] +port 847 nsew +flabel metal3 633270 929607 633590 929669 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] +port 803 nsew +flabel metal2 582498 953270 582559 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[15] +port 846 nsew +flabel metal2 580497 953270 580558 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[15] +port 802 nsew +flabel metal2 480698 953270 480759 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[16] +port 845 nsew +flabel metal2 478697 953270 478758 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[16] +port 801 nsew +flabel metal2 429298 953270 429359 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[17] +port 844 nsew +flabel metal2 427297 953270 427358 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[17] +port 800 nsew +flabel metal2 340298 953270 340359 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[18] +port 843 nsew +flabel metal2 338297 953270 338358 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[18] +port 799 nsew +flabel metal2 238498 953270 238559 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[19] +port 842 nsew +flabel metal2 236497 953270 236558 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[19] +port 798 nsew +flabel metal2 186898 953270 186959 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[20] +port 841 nsew +flabel metal2 184897 953270 184958 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[20] +port 797 nsew +flabel metal2 133497 953270 133558 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[21] +port 796 nsew +flabel metal2 135498 953270 135559 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[21] +port 840 nsew +flabel metal2 82097 953270 82158 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[22] +port 795 nsew +flabel metal2 84098 953270 84159 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[22] +port 839 nsew +flabel metal2 30697 953270 30758 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[23] +port 794 nsew +flabel metal2 32698 953270 32759 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[23] +port 838 nsew +flabel metal3 -264 909844 56 909904 0 FreeSans 400 0 0 0 gpio_loopback_one[24] +port 837 nsew +flabel metal3 -264 907844 56 907904 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] +port 793 nsew +flabel metal3 -264 740044 56 740104 0 FreeSans 400 0 0 0 gpio_loopback_one[25] +port 836 nsew +flabel metal3 -264 738044 56 738104 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] +port 792 nsew +flabel metal3 -264 694844 56 694904 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] +port 791 nsew +flabel metal3 -264 696844 56 696904 0 FreeSans 400 0 0 0 gpio_loopback_one[26] +port 835 nsew +flabel metal3 -264 651644 56 651704 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] +port 790 nsew +flabel metal3 -264 653644 56 653704 0 FreeSans 400 0 0 0 gpio_loopback_one[27] +port 834 nsew +flabel metal3 -264 608444 56 608504 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] +port 789 nsew +flabel metal3 -264 610444 56 610504 0 FreeSans 400 0 0 0 gpio_loopback_one[28] +port 833 nsew +flabel metal3 -264 565244 56 565304 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] +port 788 nsew +flabel metal3 -264 567244 56 567304 0 FreeSans 400 0 0 0 gpio_loopback_one[29] +port 832 nsew +flabel metal3 -264 522044 56 522104 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] +port 787 nsew +flabel metal3 -264 524044 56 524104 0 FreeSans 400 0 0 0 gpio_loopback_one[30] +port 831 nsew +flabel metal3 -264 478844 56 478904 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] +port 786 nsew +flabel metal3 -264 480844 56 480904 0 FreeSans 400 0 0 0 gpio_loopback_one[31] +port 830 nsew +flabel metal3 -264 351244 56 351304 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] +port 785 nsew +flabel metal3 -264 353244 56 353304 0 FreeSans 400 0 0 0 gpio_loopback_one[32] +port 829 nsew +flabel metal3 -264 308044 56 308104 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] +port 784 nsew +flabel metal3 -264 310044 56 310104 0 FreeSans 400 0 0 0 gpio_loopback_one[33] +port 828 nsew +flabel metal3 -264 264844 56 264904 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] +port 783 nsew +flabel metal3 -264 266844 56 266904 0 FreeSans 400 0 0 0 gpio_loopback_one[34] +port 827 nsew +flabel metal3 -264 221644 56 221704 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] +port 782 nsew +flabel metal3 -264 223644 56 223704 0 FreeSans 400 0 0 0 gpio_loopback_one[35] +port 826 nsew +flabel metal3 -264 178444 56 178504 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] +port 781 nsew +flabel metal3 -264 180444 56 180504 0 FreeSans 400 0 0 0 gpio_loopback_one[36] +port 825 nsew +flabel metal3 -264 135244 56 135304 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] +port 780 nsew +flabel metal3 -264 137244 56 137304 0 FreeSans 400 0 0 0 gpio_loopback_one[37] +port 824 nsew +<< properties >> +string FIXED_BBOX 0 0 633326 953326 +<< end >> diff --git a/mag/simple_por.mag b/mag/simple_por.mag index 900ab6a2..ea0a8cc9 100644 --- a/mag/simple_por.mag +++ b/mag/simple_por.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1650914729 +timestamp 1680223961 << isosubstrate >> rect -52 7354 7222 8450 rect -52 -62 11288 7354 @@ -41,14 +41,15 @@ rect 41 7305 6927 7435 rect 35 6388 121 7179 rect 3043 7022 6927 7305 rect 7110 7322 7134 7435 -rect 7110 7201 10829 7322 +rect 7110 7235 10827 7322 +rect 7110 7201 7467 7235 rect 7110 7022 7134 7201 rect 3043 7005 7134 7022 rect 2907 6728 7134 6838 rect 2907 6388 3188 6728 rect 35 6326 3188 6388 -rect 6990 6388 7134 6728 -rect 6990 6326 10860 6388 +rect 6990 6387 7134 6728 +rect 6990 6326 10860 6387 rect 35 6320 3220 6326 rect 35 6318 505 6320 rect 35 6192 48 6318 @@ -614,23 +615,23 @@ timestamp 1606074388 transform 1 0 5446 0 1 3098 box -5446 -3098 5446 3098 use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1646116156 +timestamp 1679235063 transform 1 0 8523 0 1 6404 box -66 -43 1986 897 use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_1 -timestamp 1646116156 +timestamp 1679235063 transform 1 0 7477 0 1 7438 box -66 -43 1986 897 use sky130_fd_sc_hvl__fill_4 sky130_fd_sc_hvl__fill_4_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1646116156 +timestamp 1679235063 transform 1 0 10443 0 1 6404 box -66 -43 450 897 use sky130_fd_sc_hvl__inv_8 sky130_fd_sc_hvl__inv_8_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1646116156 +timestamp 1679235063 transform 1 0 9397 0 1 7438 box -66 -43 1506 897 use sky130_fd_sc_hvl__schmittbuf_1 sky130_fd_sc_hvl__schmittbuf_1_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1646116156 +timestamp 1679235063 transform 1 0 7467 0 1 6404 box -66 -43 1122 897 << labels >> diff --git a/scripts/openframe_build_stub.py b/scripts/openframe_build_stub.py new file mode 100755 index 00000000..6da83081 --- /dev/null +++ b/scripts/openframe_build_stub.py @@ -0,0 +1,116 @@ +#!/usr/bin/env python3 + +# Generate the SPICE netlist stub entry for the openframe chip_io, to be +# used to annotate the layout. The generated file is only needed for +# annotation and may be removed afterwards. The script is maintained to +# regenerate the stub file on demand. + +with open('chip_io_openframe.spice', 'w') as ofile: + print('* Subcircuit pin order definition for chip_io_openframe', file=ofile) + print('.subckt chip_io_openframe', file=ofile) + print('+ vddio_pad', file=ofile) + print('+ vddio_pad2', file=ofile) + print('+ vssio_pad', file=ofile) + print('+ vssio_pad2', file=ofile) + print('+ vccd_pad', file=ofile) + print('+ vssd_pad', file=ofile) + print('+ vdda_pad', file=ofile) + print('+ vssa_pad', file=ofile) + print('+ vdda1_pad', file=ofile) + print('+ vdda1_pad2', file=ofile) + print('+ vssa1_pad', file=ofile) + print('+ vssa1_pad2', file=ofile) + print('+ vssa2_pad', file=ofile) + print('+ vccd1_pad', file=ofile) + print('+ vccd2_pad', file=ofile) + print('+ vssd1_pad', file=ofile) + print('+ vssd2_pad', file=ofile) + + print('+ vddio', file=ofile) + print('+ vssio', file=ofile) + print('+ vccd', file=ofile) + print('+ vssd', file=ofile) + print('+ vdda', file=ofile) + print('+ vssa', file=ofile) + print('+ vdda1', file=ofile) + print('+ vdda2', file=ofile) + print('+ vssa1', file=ofile) + print('+ vssa2', file=ofile) + print('+ vccd1', file=ofile) + print('+ vccd2', file=ofile) + print('+ vssd1', file=ofile) + print('+ vssd2', file=ofile) + + print('+ resetb_pad', file=ofile) + + print('+ porb_h', file=ofile) + print('+ porb_l', file=ofile) + print('+ por_l', file=ofile) + print('+ resetb_h', file=ofile) + print('+ resetb_l', file=ofile) + + for i in range(31, -1, -1): + print('+ mask_rev[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_out[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_oeb[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_inp_dis[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_ib_mode_sel[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_vtrip_sel[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_slow_sel[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_holdover[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_analog_en[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_analog_sel[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_analog_pol[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_dm0[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_dm1[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_dm2[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_in[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_in_h[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_loopback_zero[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ gpio_loopback_one[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ analog_io[' + str(i) + ']', file=ofile) + + for i in range(43, -1, -1): + print('+ analog_noesd_io[' + str(i) + ']', file=ofile) + + print('* No contents---stub for ordering pins in layout.', file=ofile) + print('.ends', file=ofile) diff --git a/scripts/run_chip_io_openframe_lvs.sh b/scripts/run_chip_io_openframe_lvs.sh new file mode 100755 index 00000000..4ace7136 --- /dev/null +++ b/scripts/run_chip_io_openframe_lvs.sh @@ -0,0 +1,79 @@ +#!/bin/bash +# +# Run LVS on the Openframe padframe layout and verilog. +# If the layout netlist does not exist, then generate it from the +# extracted .mag layout of the caravel_openframe top level. The +# LVS script for netgen will read both top level netlists and then +# compare the padframe cell. +# +# Run this script in the mag/ directory. +# +echo ${PDK_ROOT:=/usr/share/pdk} > /dev/null +echo ${PDK:=sky130A} > /dev/null + +if [ ! -f caravel_openframe.spice ]; then +magic -dnull -noconsole -rcfile $PDK_ROOT/$PDK/libs.tech/magic/$PDK.magicrc << EOF +drc off +crashbackups stop +load caravel_openframe +select top cell +expand +extract do local +# Maybe not do parasitic extraction for LVS?? +extract no all +extract all +ext2spice lvs +ext2spice +EOF +rm -f *.ext +fi + +# Set the USE_POWER_PINS definition, which is not set anywhere else. +cat > local_defs.v << EOF +\`define USE_POWER_PINS 1 +EOF + +# Generate script for netgen + +cat > netgen.tcl << EOF + +# Load top level netlists + +puts stdout "Reading layout netlist:" +set circuit1 [readnet spice caravel_openframe.spice] +puts stdout "Reading verilog and schematic netlists:" +puts stdout "Reading SPICE netlists of I/O:" +set circuit2 [readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_fd_io.spice] +readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_ef_io.spice \$circuit2 +readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice \$circuit2 +readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap_12.spice \$circuit2 +readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice \$circuit2 +readnet spice ../xschem/simple_por.spice \$circuit2 +puts stdout "Reading all gate-level verilog submodules:" +readnet verilog local_defs.v \$circuit2 +readnet verilog ../verilog/rtl/defines.v \$circuit2 +readnet verilog ../verilog/rtl/pads.v \$circuit2 + +# NOTE: __openframe_project_wrapper.v is empty. +readnet verilog ../verilog/rtl/__openframe_project_wrapper.v \$circuit2 +readnet verilog ../verilog/gl/user_id_programming.v \$circuit2 +readnet verilog ../verilog/gl/constant_block.v \$circuit2 +readnet verilog ../verilog/gl/xres_buf.v \$circuit2 + +# ALSO NOTE: Top-level modules are in the RTL directory but are purely gate level. +readnet verilog ../verilog/rtl/chip_io_openframe.v \$circuit2 +readnet verilog ../verilog/rtl/caravel_openframe.v \$circuit2 +puts stdout "Done reading netlists." + +# Run LVS on the chip_io_openframe cells in layout and verilog. + +lvs "\$circuit1 chip_io_openframe" "\$circuit2 chip_io_openframe" \ + $PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl \ + chip_io_openframe_comp.out +EOF + + +export NETGEN_COLUMNS=60 +netgen -batch source netgen.tcl +rm local_defs.v +rm netgen.tcl diff --git a/verilog/rtl/__openframe_project_wrapper.v b/verilog/rtl/__openframe_project_wrapper.v new file mode 100644 index 00000000..585497e1 --- /dev/null +++ b/verilog/rtl/__openframe_project_wrapper.v @@ -0,0 +1,148 @@ +// SPDX-FileCopyrightText: 2020 Efabless Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// SPDX-License-Identifier: Apache-2.0 + +`default_nettype none +/* + *------------------------------------------------------------- + * + * openframe_project_wrapper + * + * This wrapper enumerates all of the pins available to the + * user for the user openframe project. + * + * Written by Tim Edwards + * March 27, 2023 + * Efabless Corporation + * + *------------------------------------------------------------- + */ + +module openframe_project_wrapper ( +`ifdef USE_POWER_PINS + inout vdda, // User area 0 3.3V supply + inout vdda1, // User area 1 3.3V supply + inout vdda2, // User area 2 3.3V supply + inout vssa, // User area 0 analog ground + inout vssa1, // User area 1 analog ground + inout vssa2, // User area 2 analog ground + inout vccd, // Common 1.8V supply + inout vccd1, // User area 1 1.8V supply + inout vccd2, // User area 2 1.8v supply + inout vssd, // Common digital ground + inout vssd1, // User area 1 digital ground + inout vssd2, // User area 2 digital ground +`endif + + /* Signals exported from the frame area to the user project */ + /* The user may elect to use any of these inputs. */ + + input porb_h, // power-on reset, sense inverted, 3.3V domain + input porb_l, // power-on reset, sense inverted, 1.8V domain + input por_l, // power-on reset, noninverted, 1.8V domain + input resetb_h, // master reset, sense inverted, 3.3V domain + input resetb_l, // master reset, sense inverted, 1.8V domain + input [31:0] mask_rev, // 32-bit user ID, 1.8V domain + + /* GPIOs. There are 44 GPIOs (19 left, 19 right, 6 bottom). */ + /* These must be configured appropriately by the user project. */ + + /* Basic bidirectional I/O. Input gpio_in_h is in the 3.3V domain; all + * others are in the 1.8v domain. OEB is output enable, sense inverted. + */ + input [`OPENFRAME_IO_PADS-1:0] gpio_in, + input [`OPENFRAME_IO_PADS-1:0] gpio_in_h, + output [`OPENFRAME_IO_PADS-1:0] gpio_out, + output [`OPENFRAME_IO_PADS-1:0] gpio_oeb, + + /* Pad configuration. These signals are usually static values. + * See the documentation for the sky130_fd_io__gpiov2 cell signals + * and their use. + */ + output [`OPENFRAME_IO_PADS-1:0] gpio_inp_dis, + output [`OPENFRAME_IO_PADS-1:0] gpio_ib_mode_sel, + output [`OPENFRAME_IO_PADS-1:0] gpio_vtrip_sel, + output [`OPENFRAME_IO_PADS-1:0] gpio_slow_sel, + output [`OPENFRAME_IO_PADS-1:0] gpio_holdover, + output [`OPENFRAME_IO_PADS-1:0] gpio_analog_en, + output [`OPENFRAME_IO_PADS-1:0] gpio_analog_sel, + output [`OPENFRAME_IO_PADS-1:0] gpio_analog_pol, + output [`OPENFRAME_IO_PADS-1:0] gpio_dm2, + output [`OPENFRAME_IO_PADS-1:0] gpio_dm1, + output [`OPENFRAME_IO_PADS-1:0] gpio_dm0, + + /* These signals correct directly to the pad. Pads using analog I/O + * connections should keep the digital input and output buffers turned + * off. Both signals connect to the same pad. The "noesd" signal + * is a direct connection to the pad; the other signal connects through + * a series resistor which gives it minimal ESD protection. Both signals + * have basic over- and under-voltage protection at the pad. These + * signals may be expected to attenuate heavily above 50MHz. + */ + inout [`OPENFRAME_IO_PADS-1:0] analog_io, + inout [`OPENFRAME_IO_PADS-1:0] analog_noesd_io, + + /* These signals are constant one and zero in the 1.8V domain, one for + * each GPIO pad, and can be looped back to the control signals on the + * same GPIO pad to set a static configuration at power-up. + */ + input [`OPENFRAME_IO_PADS-1:0] gpio_loopback_one, + input [`OPENFRAME_IO_PADS-1:0] gpio_loopback_zero +); + +`ifdef OPENFRAME_TESTING + openframe_example test_example ( +`ifdef USE_POWER_PINS + .vdda(vdda), + .vdda1(vdda1), + .vdda2(vdda2), + .vssa(vssa), + .vssa1(vssa1), + .vssa2(vssa2), + .vccd(vccd), + .vccd1(vccd1), + .vccd2(vccd2), + .vssd(vssd), + .vssd1(vssd1), + .vssd2(vssd2), +`endif + .porb_h(porb_h), + .porb_l(porb_l), + .por_l(por_l), + .resetb_h(resetb_h), + .resetb_l(resetb_l), + .mask_rev(mask_rev), + .gpio_in(gpio_in), + .gpio_in_h(gpio_in_h), + .gpio_out(gpio_out), + .gpio_oeb(gpio_oeb), + .gpio_inp_dis(gpio_inp_dis), + .gpio_ib_mode_sel(gpio_ib_mode_sel), + .gpio_vtrip_sel(gpio_vtrip_sel), + .gpio_slow_sel(gpio_slow_sel), + .gpio_holdover(gpio_holdover), + .gpio_analog_en(gpio_analog_en), + .gpio_analog_sel(gpio_analog_sel), + .gpio_analog_pol(gpio_analog_pol), + .gpio_dm2(gpio_dm2), + .gpio_dm1(gpio_dm1), + .gpio_dm0(gpio_dm0), + .analog_io(analog_io), + .analog_noesd_io(analog_noesd_io), + .gpio_loopback_one(gpio_loopback_one), + .gpio_loopback_zero(gpio_loopback_zero) + ); +`endif + +endmodule // openframe_project_wrapper diff --git a/verilog/rtl/caravel_openframe.v b/verilog/rtl/caravel_openframe.v index b619a7ec..6c7c3b68 100644 --- a/verilog/rtl/caravel_openframe.v +++ b/verilog/rtl/caravel_openframe.v @@ -18,21 +18,53 @@ /* caravel_openframe, a project harness for the Google/SkyWater */ /* sky130 fabrication process and open source PDK */ /* */ -/* Copyright 2020 efabless, Inc. */ -/* Written by Tim Edwards, December 2019 */ -/* and Mohamed Shalan, August 2020 */ +/* Copyright 2023 Efabless Corporation */ +/* Written by Tim Edwards, March 2023 */ /* This file is open source hardware released under the */ /* Apache 2.0 license. See file LICENSE. */ /* */ -/* Updated 10/15/2021: Revised using the housekeeping module */ -/* from housekeeping.v (refactoring a number of functions from */ -/* the management SoC). */ +/* The caravel_openframe is a chip top level design conforming */ +/* to the pad locations and assignments used by the Caravel and */ +/* Caravan chips top level definition. However, it does not */ +/* define any embedded processor or other interfaces. */ /* */ -/* Updated 10/25/2021: Made the open-frame version, which */ -/* replaces the managment SoC wrapper, the user project */ -/* wrapper, and the management protect circuit with a single */ -/* user project wrapper. */ -/* */ +/* The padframe of caravel_openframe consists of the same 38 */ +/* general-purpose I/O pads as Caravel. The pads formerly */ +/* used by Caravel for dedicated functions of the management */ +/* SoC (flash controller CSB, SCK, IO0 and IO1, gpio, and */ +/* clock) are redefined as additional general-purpose I/O for */ +/* a total of 44 GPIO pads. The resetb pad retains its */ +/* function as an input pin with weak pull-up with high and */ +/* low voltage domain (3.3V and 1.8V) versions of the output */ +/* exported to the chip project core. The user may elect to */ +/* use the reset pin for a purpose other than a master reset. */ +/* */ +/* The padframe implements a simple power-on reset circuit, and */ +/* provides a 32-bit bus in the 1.8V digital domain consisting */ +/* of the (fixed) user project ID. */ +/* */ +/* Each GPIO pad must be configured by the user project. The */ +/* padframe exports constant value "1" and "0" bits in the 1.8V */ +/* domain for each GPIO pad that can be used by the user */ +/* project to loop back to the GPIO to set a static */ +/* configuration on power-up. */ +/* */ +/* Every user project must instantiate a module called */ +/* "openframe_project_wrapper" that connects to all of the */ +/* signals as defined in the module call, below. The layout */ +/* of the user project must correspond to the provided wrapper */ +/* cell layout, describing the position of signal and power */ +/* pins on the perimeter of the wrapper. */ +/* */ +/* Bon voyage! */ +/*--------------------------------------------------------------*/ + +/*--------------------------------------------------------------*/ +/* NOTE: This file can be checked for syntax directly using: */ +/* */ +/* iverilog -I ${PDK_ROOT}/${PDK} -DSIM -DFUNCTIONAL \ */ +/* openframe_netlists.v __openframe_project_wrapper.v \ */ +/* -s caravel_openframe */ /*--------------------------------------------------------------*/ module caravel_openframe ( @@ -58,20 +90,8 @@ module caravel_openframe ( inout vssd1, // User area 1 digital ground inout vssd2, // User area 2 digital ground - inout gpio, // Used for external LDO control - inout [`MPRJ_IO_PADS-1:0] mprj_io, - input clock, // CMOS core clock input, not a crystal - input resetb, // Reset input (sense inverted) - - // Note that only two flash data pins are dedicated to the - // management SoC wrapper. The management SoC exports the - // quad SPI mode status to make use of the top two mprj_io - // pins for io2 and io3. - - output flash_csb, - output flash_clk, - output flash_io0, - output flash_io1 + inout [`OPENFRAME_IO_PADS-1:0] gpio, + input resetb // Reset input (sense inverted) ); //------------------------------------------------------------ @@ -79,144 +99,51 @@ module caravel_openframe ( //------------------------------------------------------------ parameter USER_PROJECT_ID = 32'h00000000; - /* - *-------------------------------------------------------------------- - * - * These pins are overlaid on mprj_io space. They have the function - * below when the management processor is in reset, or in the default - * configuration. They are assigned to uses in the user space by the - * configuration program running off of the SPI flash. Note that even - * when the user has taken control of these pins, they can be restored - * to the original use by setting the resetb pin low. The SPI pins and - * UART pins can be connected directly to an FTDI chip as long as the - * FTDI chip sets these lines to high impedence (input function) at - * all times except when holding the chip in reset. - * - * JTAG = mprj_io[0] (inout) - * SDO = mprj_io[1] (output) - * SDI = mprj_io[2] (input) - * CSB = mprj_io[3] (input) - * SCK = mprj_io[4] (input) - * ser_rx = mprj_io[5] (input) - * ser_tx = mprj_io[6] (output) - * irq = mprj_io[7] (input) - * - * spi_sck = mprj_io[32] (output) - * spi_csb = mprj_io[33] (output) - * spi_sdi = mprj_io[34] (input) - * spi_sdo = mprj_io[35] (output) - * flash_io2 = mprj_io[36] (inout) - * flash_io3 = mprj_io[37] (inout) - * - * These pins are reserved for any project that wants to incorporate - * its own processor and flash controller. While a user project can - * technically use any available I/O pins for the purpose, these - * four pins connect to a pass-through mode from the SPI slave (pins - * 1-4 above) so that any SPI flash connected to these specific pins - * can be accessed through the SPI slave even when the processor is in - * reset. - * - * user_flash_csb = mprj_io[8] - * user_flash_sck = mprj_io[9] - * user_flash_io0 = mprj_io[10] - * user_flash_io1 = mprj_io[11] - * - *-------------------------------------------------------------------- - */ + // Project Control (pad-facing) + wire [`OPENFRAME_IO_PADS-1:0] gpio_inp_dis; + wire [`OPENFRAME_IO_PADS-1:0] gpio_oeb; + wire [`OPENFRAME_IO_PADS-1:0] gpio_ib_mode_sel; + wire [`OPENFRAME_IO_PADS-1:0] gpio_vtrip_sel; + wire [`OPENFRAME_IO_PADS-1:0] gpio_slow_sel; + wire [`OPENFRAME_IO_PADS-1:0] gpio_holdover; + wire [`OPENFRAME_IO_PADS-1:0] gpio_analog_en; + wire [`OPENFRAME_IO_PADS-1:0] gpio_analog_sel; + wire [`OPENFRAME_IO_PADS-1:0] gpio_analog_pol; + wire [`OPENFRAME_IO_PADS-1:0] gpio_dm0; + wire [`OPENFRAME_IO_PADS-1:0] gpio_dm1; + wire [`OPENFRAME_IO_PADS-1:0] gpio_dm2; + wire [`OPENFRAME_IO_PADS-1:0] gpio_in; + wire [`OPENFRAME_IO_PADS-1:0] gpio_in_h; + wire [`OPENFRAME_IO_PADS-1:0] gpio_out; + wire [`OPENFRAME_IO_PADS-1:0] gpio_loopback_zero; + wire [`OPENFRAME_IO_PADS-1:0] gpio_loopback_one; + wire [`OPENFRAME_IO_PADS-1:0] analog_io; + wire [`OPENFRAME_IO_PADS-1:0] analog_noesd_io; - // One-bit GPIO dedicated to management SoC (outside of user control) - wire gpio_out_core; - wire gpio_in_core; - wire gpio_mode0_core; - wire gpio_mode1_core; - wire gpio_outenb_core; - wire gpio_inenb_core; - - // User Project Control (pad-facing) - wire [`MPRJ_IO_PADS-1:0] mprj_io_inp_dis; - wire [`MPRJ_IO_PADS-1:0] mprj_io_oeb; - wire [`MPRJ_IO_PADS-1:0] mprj_io_ib_mode_sel; - wire [`MPRJ_IO_PADS-1:0] mprj_io_vtrip_sel; - wire [`MPRJ_IO_PADS-1:0] mprj_io_slow_sel; - wire [`MPRJ_IO_PADS-1:0] mprj_io_holdover; - wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_en; - wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_sel; - wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_pol; - wire [`MPRJ_IO_PADS*3-1:0] mprj_io_dm; - wire [`MPRJ_IO_PADS-1:0] mprj_io_in; - wire [`MPRJ_IO_PADS-1:0] mprj_io_out; - - // User Project Control (user-facing) - wire [`MPRJ_IO_PADS-1:0] user_io_oeb; - wire [`MPRJ_IO_PADS-1:0] user_io_in; - wire [`MPRJ_IO_PADS-1:0] user_io_out; - wire [`MPRJ_IO_PADS-10:0] user_analog_io; - - /* Padframe control signals */ - wire [`MPRJ_IO_PADS_1-1:0] gpio_serial_link_1; - wire [`MPRJ_IO_PADS_2-1:0] gpio_serial_link_2; - wire mprj_io_loader_resetn; - wire mprj_io_loader_clock; - wire mprj_io_loader_data_1; /* user1 side serial loader */ - wire mprj_io_loader_data_2; /* user2 side serial loader */ - - // User Project Control management I/O - // There are two types of GPIO connections: - // (1) Full Bidirectional: Management connects to in, out, and oeb - // Uses: JTAG and SDO - // (2) Selectable bidirectional: Management connects to in and out, - // which are tied together. oeb is grounded (oeb from the - // configuration is used) - - // SDI = mprj_io[2] (input) - // CSB = mprj_io[3] (input) - // SCK = mprj_io[4] (input) - // ser_rx = mprj_io[5] (input) - // ser_tx = mprj_io[6] (output) - // irq = mprj_io[7] (input) - - wire [`MPRJ_IO_PADS-1:0] mgmt_io_in; /* one- and three-pin data */ - wire [`MPRJ_IO_PADS-5:0] mgmt_io_nc; /* no-connects */ - wire [4:0] mgmt_io_out; /* three-pin interface out */ - wire [4:0] mgmt_io_oeb; /* three-pin output enable */ - - wire clock_core; - - // Power-on-reset signal. The reset pad generates the sense-inverted - // reset at 3.3V. The 1.8V signal and the inverted 1.8V signal are - // derived. + // Power-on-reset signal. The simple POR circuit generates these + // three signals, uses them to enable the GPIO, and exports the + // signals to the core. wire porb_h; wire porb_l; wire por_l; + // Master reset signal. The reset pad generates the sense-inverted + // reset at 3.3V. The 1.8V signal is derived. + wire rstb_h; wire rstb_l; - // Flash SPI communication (management SoC to housekeeping) - wire flash_clk_core, flash_csb_core; - wire flash_clk_oeb_core, flash_csb_oeb_core; - wire flash_clk_ieb_core, flash_csb_ieb_core; - wire flash_io0_oeb_core, flash_io1_oeb_core; - wire flash_io2_oeb_core, flash_io3_oeb_core; - wire flash_io0_ieb_core, flash_io1_ieb_core; - wire flash_io2_ieb_core, flash_io3_ieb_core; - wire flash_io0_do_core, flash_io1_do_core; - wire flash_io2_do_core, flash_io3_do_core; - wire flash_io0_di_core, flash_io1_di_core; - wire flash_io2_di_core, flash_io3_di_core; + // Mask revision: Output from the padframe, exporting the 32-bit + // user ID value. - // Flash SPI communication ( - wire flash_clk_frame; - wire flash_csb_frame; - wire flash_clk_oeb, flash_csb_oeb; - wire flash_clk_ieb, flash_csb_ieb; - wire flash_io0_oeb, flash_io1_oeb; - wire flash_io0_ieb, flash_io1_ieb; - wire flash_io0_do, flash_io1_do; - wire flash_io0_di, flash_io1_di; + wire [31:0] mask_rev; - chip_io padframe( + chip_io_openframe #( + .USER_PROJECT_ID(USER_PROJECT_ID) + ) padframe ( + + // Pad side power connections `ifndef TOP_ROUTING // Package Pins .vddio_pad (vddio), // Common padframe/ESD supply @@ -238,7 +165,12 @@ module caravel_openframe ( .vssd1_pad (vssd1), // User area 1 digital ground .vssd2_pad (vssd2), // User area 2 digital ground `endif - // Core Side Pins + + // Pad side signals + .resetb_pad(resetb), + .gpio(gpio), + + // Core side power connections .vddio (vddio_core), .vssio (vssio_core), .vdda (vdda_core), @@ -254,92 +186,35 @@ module caravel_openframe ( .vssd1 (vssd1_core), .vssd2 (vssd2_core), - .gpio(gpio), - .mprj_io(mprj_io), - .clock(clock), - .resetb(resetb), - .flash_csb(flash_csb), - .flash_clk(flash_clk), - .flash_io0(flash_io0), - .flash_io1(flash_io1), - // SoC Core Interface + // Core side signals .porb_h(porb_h), - .por(por_l), - .resetb_core_h(rstb_h), - .clock_core(clock_core), - .gpio_out_core(gpio_out_core), - .gpio_in_core(gpio_in_core), - .gpio_mode0_core(gpio_mode0_core), - .gpio_mode1_core(gpio_mode1_core), - .gpio_outenb_core(gpio_outenb_core), - .gpio_inenb_core(gpio_inenb_core), - .flash_csb_core(flash_csb_frame), - .flash_clk_core(flash_clk_frame), - .flash_csb_oeb_core(flash_csb_oeb), - .flash_clk_oeb_core(flash_clk_oeb), - .flash_io0_oeb_core(flash_io0_oeb), - .flash_io1_oeb_core(flash_io1_oeb), - .flash_csb_ieb_core(flash_csb_ieb), - .flash_clk_ieb_core(flash_clk_ieb), - .flash_io0_ieb_core(flash_io0_ieb), - .flash_io1_ieb_core(flash_io1_ieb), - .flash_io0_do_core(flash_io0_do), - .flash_io1_do_core(flash_io1_do), - .flash_io0_di_core(flash_io0_di), - .flash_io1_di_core(flash_io1_di), - .mprj_io_in(mprj_io_in), - .mprj_io_out(mprj_io_out), - .mprj_io_oeb(mprj_io_oeb), - .mprj_io_inp_dis(mprj_io_inp_dis), - .mprj_io_ib_mode_sel(mprj_io_ib_mode_sel), - .mprj_io_vtrip_sel(mprj_io_vtrip_sel), - .mprj_io_slow_sel(mprj_io_slow_sel), - .mprj_io_holdover(mprj_io_holdover), - .mprj_io_analog_en(mprj_io_analog_en), - .mprj_io_analog_sel(mprj_io_analog_sel), - .mprj_io_analog_pol(mprj_io_analog_pol), - .mprj_io_dm(mprj_io_dm), - .mprj_analog_io(user_analog_io) + .porb_l(porb_l), + .por_l(por_l), + .resetb_h(rstb_h), + .resetb_l(rstb_l), + .mask_rev(mask_rev), + + .gpio_in(gpio_in), + .gpio_in_h(gpio_in_h), + .gpio_out(gpio_out), + .gpio_oeb(gpio_oeb), + .gpio_inp_dis(gpio_inp_dis), + .gpio_ib_mode_sel(gpio_ib_mode_sel), + .gpio_vtrip_sel(gpio_vtrip_sel), + .gpio_slow_sel(gpio_slow_sel), + .gpio_holdover(gpio_holdover), + .gpio_analog_en(gpio_analog_en), + .gpio_analog_sel(gpio_analog_sel), + .gpio_analog_pol(gpio_analog_pol), + .gpio_dm0(gpio_dm0), + .gpio_dm1(gpio_dm1), + .gpio_dm2(gpio_dm2), + .gpio_loopback_zero(gpio_loopback_zero), + .gpio_loopback_one(gpio_loopback_one), + .analog_io(analog_io), + .analog_noesd_io(analog_noesd_io) ); - // SoC core - wire caravel_clk; - wire caravel_clk2; - wire caravel_rstn; - - wire [2:0] user_irq_core; - wire [2:0] user_irq_ena; - wire [2:0] irq_spi; // From SPI and external pins - - // Wishbone Bus (housekeeping facing) - wire mprj_cyc_o; - wire mprj_stb_o; - wire mprj_we_o; - wire [3:0] mprj_sel_o; - wire [31:0] mprj_adr_o; - wire [31:0] mprj_dat_o; - wire mprj_ack_i; - wire [31:0] mprj_dat_i; - - // Mask revision - wire [31:0] mask_rev; - - wire mprj_clock; - wire mprj_clock2; - wire mprj_reset; - - // Power monitoring - wire mprj_vcc_pwrgood; - wire mprj2_vcc_pwrgood; - wire mprj_vdd_pwrgood; - wire mprj2_vdd_pwrgood; - - // SRAM read-only access from houskeeping - wire hkspi_sram_clk; - wire hkspi_sram_csb; - wire [7:0] hkspi_sram_addr; - wire [31:0] hkspi_sram_data; - /*--------------------------------------------------*/ /* Wrapper module around the user project */ /*--------------------------------------------------*/ @@ -360,931 +235,37 @@ module caravel_openframe ( .vssd2(vssd2_core), // User area 2 digital ground `endif - // Clock and reset - .core_clk(caravel_clk), - .core_rstn(caravel_rstn), - .core_clock2(mprj_clock2), + .porb_h(porb_h), + .porb_l(porb_l), + .por_l(por_l), + .resetb_h(rstb_h), + .resetb_l(rstb_l), + .mask_rev(mask_rev), - // IRQ - .irq(irq_spi), - - // Exported Wishbone Bus - .mprj_cyc_o(mprj_cyc_o), - .mprj_stb_o(mprj_stb_o), - .mprj_we_o(mprj_we_o), - .mprj_sel_o(mprj_sel_o), - .mprj_adr_o(mprj_adr_o), - .mprj_dat_o(mprj_dat_o), - .mprj_ack_i(mprj_ack_i), - .mprj_dat_i(mprj_dat_i), - - // GPIO (1 pin) - .gpio_out_pad(gpio_out_core), - .gpio_in_pad(gpio_in_core), - .gpio_mode0_pad(gpio_mode0_core), - .gpio_mode1_pad(gpio_mode1_core), - .gpio_outenb_pad(gpio_outenb_core), - .gpio_inenb_pad(gpio_inenb_core), - - // GPIO pad 3-pin interface (plus analog) - .io_in (user_io_in), - .io_out(user_io_out), - .io_oeb(user_io_oeb), - .analog_io(user_analog_io), - - // Primary SPI flash controller - .flash_csb(flash_csb_core), - .flash_clk(flash_clk_core), - .flash_io0_oeb(flash_io0_oeb_core), - .flash_io0_di(flash_io0_di_core), - .flash_io0_do(flash_io0_do_core), - .flash_io1_oeb(flash_io1_oeb_core), - .flash_io1_di(flash_io1_di_core), - .flash_io1_do(flash_io1_do_core), - .flash_io2_oeb(flash_io2_oeb_core), - .flash_io2_di(flash_io2_di_core), - .flash_io2_do(flash_io2_do_core), - .flash_io3_oeb(flash_io3_oeb_core), - .flash_io3_di(flash_io3_di_core), - .flash_io3_do(flash_io3_do_core), - - // Module status (these may or may not be implemented) - .qspi_enabled(qspi_enabled), - .uart_enabled(uart_enabled), - .spi_enabled(spi_enabled), - .debug_mode(debug_mode), - - // Module I/O (these may or may not be implemented) - // UART - .ser_tx(ser_tx), - .ser_rx(ser_rx), - // SPI master - .spi_sdi(spi_sdi), - .spi_csb(spi_csb), - .spi_sck(spi_sck), - .spi_sdo(spi_sdo), - .spi_sdoenb(spi_sdoenb), - // Debug - .debug_in(debug_in), - .debug_out(debug_out), - .debug_oeb(debug_oeb), - - // SRAM Read-only access to housekeeping - .sram_ro_clk(hkspi_sram_clk), - .sram_ro_csb(hkspi_sram_csb), - .sram_ro_addr(hkspi_sram_addr), - .sram_ro_data(hkspi_sram_data), - - // Trap status - .trap(trap) + .gpio_in(gpio_in), + .gpio_in_h(gpio_in_h), + .gpio_out(gpio_out), + .gpio_oeb(gpio_oeb), + .gpio_inp_dis(gpio_inp_dis), + .gpio_ib_mode_sel(gpio_ib_mode_sel), + .gpio_vtrip_sel(gpio_vtrip_sel), + .gpio_slow_sel(gpio_slow_sel), + .gpio_holdover(gpio_holdover), + .gpio_analog_en(gpio_analog_en), + .gpio_analog_sel(gpio_analog_sel), + .gpio_analog_pol(gpio_analog_pol), + .gpio_dm0(gpio_dm0), + .gpio_dm1(gpio_dm1), + .gpio_dm2(gpio_dm2), + .gpio_loopback_zero(gpio_loopback_zero), + .gpio_loopback_one(gpio_loopback_one), + .analog_io(analog_io), + .analog_noesd_io(analog_noesd_io) ); /*------------------------------------------*/ /* End user project instantiation */ /*------------------------------------------*/ - wire [`MPRJ_IO_PADS_1-1:0] gpio_serial_link_1_shifted; - wire [`MPRJ_IO_PADS_2-1:0] gpio_serial_link_2_shifted; - - assign gpio_serial_link_1_shifted = {gpio_serial_link_1[`MPRJ_IO_PADS_1-2:0], - mprj_io_loader_data_1}; - // Note that serial_link_2 is backwards compared to serial_link_1, so it - // shifts in the other direction. - assign gpio_serial_link_2_shifted = {mprj_io_loader_data_2, - gpio_serial_link_2[`MPRJ_IO_PADS_2-1:1]}; - - // Propagating clock and reset to mitigate timing and fanout issues - wire [`MPRJ_IO_PADS_1-1:0] gpio_clock_1; - wire [`MPRJ_IO_PADS_2-1:0] gpio_clock_2; - wire [`MPRJ_IO_PADS_1-1:0] gpio_resetn_1; - wire [`MPRJ_IO_PADS_2-1:0] gpio_resetn_2; - wire [`MPRJ_IO_PADS_1-1:0] gpio_clock_1_shifted; - wire [`MPRJ_IO_PADS_2-1:0] gpio_clock_2_shifted; - wire [`MPRJ_IO_PADS_1-1:0] gpio_resetn_1_shifted; - wire [`MPRJ_IO_PADS_2-1:0] gpio_resetn_2_shifted; - - assign gpio_clock_1_shifted = {gpio_clock_1[`MPRJ_IO_PADS_1-2:0], - mprj_io_loader_clock}; - assign gpio_clock_2_shifted = {mprj_io_loader_clock, - gpio_clock_2[`MPRJ_IO_PADS_2-1:1]}; - assign gpio_resetn_1_shifted = {gpio_resetn_1[`MPRJ_IO_PADS_1-2:0], - mprj_io_loader_resetn}; - assign gpio_resetn_2_shifted = {mprj_io_loader_resetn, - gpio_resetn_2[`MPRJ_IO_PADS_2-1:1]}; - - wire [2:0] spi_pll_sel; - wire [2:0] spi_pll90_sel; - wire [4:0] spi_pll_div; - wire [25:0] spi_pll_trim; - - // Clocking control - - caravel_clocking clocking( - `ifdef USE_POWER_PINS - .vdd1v8(VPWR), - .vss(VGND), - `endif - .ext_clk_sel(ext_clk_sel), - .ext_clk(clock), - .pll_clk(pll_clk), - .pll_clk90(pll_clk90), - .resetb(resetb), - .sel(spi_pll_sel), - .sel2(spi_pll90_sel), - .ext_reset(ext_reset), // From housekeeping SPI - .core_clk(caravel_clk), - .user_clk(caravel_clk2), - .resetb_sync(caravel_rstn) - ); - - // DCO/Digital Locked Loop - - digital_pll pll ( - `ifdef USE_POWER_PINS - .VPWR(VPWR), - .VGND(VGND), - `endif - .resetb(resetb), - .enable(spi_pll_ena), - .osc(clock), - .clockp({pll_clk, pll_clk90}), - .div(spi_pll_div), - .dco(spi_pll_dco_ena), - .ext_trim(spi_pll_trim) - ); - - // Housekeeping interface - - housekeeping housekeeping ( - `ifdef USE_POWER_PINS - .vdd(VPWR), - .vss(VGND), - `endif - - .wb_clk_i(mprj_clock), - .wb_rst_i(mprj_reset), - - .wb_adr_i(mprj_adr_o), - .wb_dat_i(mprj_dat_o), - .wb_sel_i(mprj_sel_o), - .wb_we_i(mprj_we_o), - .wb_cyc_i(mprj_cyc_o), - .wb_stb_i(mprj_stb_o), - .wb_ack_o(mprj_ack_i), - .wb_dat_o(mprj_dat_i), - - .porb(porb_l), - - .pll_ena(spi_pll_ena), - .pll_dco_ena(spi_pll_dco_ena), - .pll_div(spi_pll_div), - .pll_sel(spi_pll_sel), - .pll90_sel(spi_pll90_sel), - .pll_trim(spi_pll_trim), - .pll_bypass(ext_clk_sel), - - .qspi_enabled(qspi_enabled), - .uart_enabled(uart_enabled), - .spi_enabled(spi_enabled), - .debug_mode(debug_mode), - - .ser_tx(ser_tx), - .ser_rx(ser_rx), - - .spi_sdi(spi_sdi), - .spi_csb(spi_csb), - .spi_sck(spi_sck), - .spi_sdo(spi_sdo), - .spi_sdoenb(spi_sdoenb), - - .debug_in(debug_in), - .debug_out(debug_out), - .debug_oeb(debug_oeb), - - .irq(irq_spi), - .reset(ext_reset), - - .serial_clock(mprj_io_loader_clock), - .serial_resetn(mprj_io_loader_resetn), - .serial_data_1(mprj_io_loader_data_1), - .serial_data_2(mprj_io_loader_data_2), - - .mgmt_gpio_in(mgmt_io_in), - .mgmt_gpio_out({mgmt_io_out[4:2], mgmt_io_in[`MPRJ_IO_PADS-4:2], - mgmt_io_out[1:0]}), - .mgmt_gpio_oeb({mgmt_io_oeb[4:2], mgmt_io_nc[`MPRJ_IO_PADS-6:0], - mgmt_io_oeb[1:0]}), - - .pwr_ctrl_out(), /* Not used in this version */ - - .trap(trap), - - .user_clock(user_clock), - - .mask_rev_in(mask_rev), - - .spimemio_flash_csb(flash_csb_core), - .spimemio_flash_clk(flash_clk_core), - .spimemio_flash_io0_oeb(flash_io0_oeb_core), - .spimemio_flash_io1_oeb(flash_io1_oeb_core), - .spimemio_flash_io2_oeb(flash_io2_oeb_core), - .spimemio_flash_io3_oeb(flash_io3_oeb_core), - .spimemio_flash_io0_do(flash_io0_do_core), - .spimemio_flash_io1_do(flash_io1_do_core), - .spimemio_flash_io2_do(flash_io2_do_core), - .spimemio_flash_io3_do(flash_io3_do_core), - .spimemio_flash_io0_di(flash_io0_di_core), - .spimemio_flash_io1_di(flash_io1_di_core), - .spimemio_flash_io2_di(flash_io2_di_core), - .spimemio_flash_io3_di(flash_io3_di_core), - - .pad_flash_csb(flash_csb_frame), - .pad_flash_csb_oeb(flash_csb_oeb), - .pad_flash_clk(flash_clk_frame), - .pad_flash_clk_oeb(flash_clk_oeb), - .pad_flash_io0_oeb(flash_io0_oeb), - .pad_flash_io1_oeb(flash_io1_oeb), - .pad_flash_io0_ieb(flash_io0_ieb), - .pad_flash_io1_ieb(flash_io1_ieb), - .pad_flash_io0_do(flash_io0_do), - .pad_flash_io1_do(flash_io1_do), - .pad_flash_io0_di(flash_io0_di), - .pad_flash_io1_di(flash_io1_di), - - .sram_ro_clk(hkspi_sram_clk), - .sram_ro_csb(hkspi_sram_csb), - .sram_ro_addr(hkspi_sram_addr), - .sram_ro_data(hkspi_sram_data), - - .usr1_vcc_pwrgood(mprj_vcc_pwrgood), - .usr2_vcc_pwrgood(mprj2_vcc_pwrgood), - .usr1_vdd_pwrgood(mprj_vdd_pwrgood), - .usr2_vdd_pwrgood(mprj2_vdd_pwrgood) - ); - - /* GPIO defaults (via programmed) */ - wire [`MPRJ_IO_PADS*13-1:0] gpio_defaults; - - /* Fixed defaults for the first 5 GPIO pins */ - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(13'h1803) - ) gpio_01_defaults [1:0] ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[25:0]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(13'h0403) - ) gpio_234_defaults [2:0] ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[64:26]) - ); - - /* Via-programmable defaults for the rest of the GPIO pins */ - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_5_INIT) - ) gpio_5_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[77:65]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_6_INIT) - ) gpio_6_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[90:78]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_7_INIT) - ) gpio_7_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[103:91]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_8_INIT) - ) gpio_8_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[116:104]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_9_INIT) - ) gpio_9_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[129:117]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_10_INIT) - ) gpio_10_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[142:130]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_11_INIT) - ) gpio_11_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[155:143]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_12_INIT) - ) gpio_12_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[168:156]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_13_INIT) - ) gpio_13_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[181:169]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_14_INIT) - ) gpio_14_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[194:182]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_15_INIT) - ) gpio_15_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[207:195]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_16_INIT) - ) gpio_16_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[220:208]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_17_INIT) - ) gpio_17_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[233:221]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_18_INIT) - ) gpio_18_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[246:234]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_19_INIT) - ) gpio_19_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[259:247]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_20_INIT) - ) gpio_20_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[272:260]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_21_INIT) - ) gpio_21_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[285:273]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_22_INIT) - ) gpio_22_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[298:286]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_23_INIT) - ) gpio_23_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[311:299]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_24_INIT) - ) gpio_24_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[324:312]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_25_INIT) - ) gpio_25_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[337:325]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_26_INIT) - ) gpio_26_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[350:338]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_27_INIT) - ) gpio_27_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[363:351]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_28_INIT) - ) gpio_28_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[376:364]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_29_INIT) - ) gpio_29_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[389:377]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_30_INIT) - ) gpio_30_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[402:390]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_31_INIT) - ) gpio_31_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[415:403]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_32_INIT) - ) gpio_32_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[428:416]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_33_INIT) - ) gpio_33_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[441:429]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_34_INIT) - ) gpio_34_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[454:442]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_35_INIT) - ) gpio_35_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[467:455]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_36_INIT) - ) gpio_36_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[480:468]) - ); - - gpio_defaults_block #( - .GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_37_INIT) - ) gpio_37_defaults ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .gpio_defaults(gpio_defaults[493:481]) - ); - - // Each control block sits next to an I/O pad in the user area. - // It gets input through a serial chain from the previous control - // block and passes it to the next control block. Due to the nature - // of the shift register, bits are presented in reverse, as the first - // bit in ends up as the last bit of the last I/O pad control block. - - // There are two types of block; the first two and the last two - // are configured to be full bidirectional under control of the - // management Soc (JTAG and SDO for the first two; flash_io2 and - // flash_io3 for the last two). The rest are configured to be default - // (input). Note that the first two and last two are the ones closest - // to the management SoC on either side, which minimizes the wire length - // of the extra signals those pads need. - - /* First two GPIOs (JTAG and SDO) */ - - gpio_control_block gpio_control_bidir_1 [1:0] ( - `ifdef USE_POWER_PINS - .vccd(vccd_core), - .vssd(vssd_core), - .vccd1(vccd1_core), - .vssd1(vssd1_core), - `endif - - .gpio_defaults(gpio_defaults[25:0]), - - // Management Soc-facing signals - - .resetn(gpio_resetn_1_shifted[1:0]), - .serial_clock(gpio_clock_1_shifted[1:0]), - - .resetn_out(gpio_resetn_1[1:0]), - .serial_clock_out(gpio_clock_1[1:0]), - - .mgmt_gpio_in(mgmt_io_in[1:0]), - .mgmt_gpio_out(mgmt_io_out[1:0]), - .mgmt_gpio_oeb(mgmt_io_oeb[1:0]), - - .one(), - .zero(), - - // Serial data chain for pad configuration - .serial_data_in(gpio_serial_link_1_shifted[1:0]), - .serial_data_out(gpio_serial_link_1[1:0]), - - // User-facing signals - .user_gpio_out(user_io_out[1:0]), - .user_gpio_oeb(user_io_oeb[1:0]), - .user_gpio_in(user_io_in[1:0]), - - // Pad-facing signals (Pad GPIOv2) - .pad_gpio_inenb(mprj_io_inp_dis[1:0]), - .pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[1:0]), - .pad_gpio_vtrip_sel(mprj_io_vtrip_sel[1:0]), - .pad_gpio_slow_sel(mprj_io_slow_sel[1:0]), - .pad_gpio_holdover(mprj_io_holdover[1:0]), - .pad_gpio_ana_en(mprj_io_analog_en[1:0]), - .pad_gpio_ana_sel(mprj_io_analog_sel[1:0]), - .pad_gpio_ana_pol(mprj_io_analog_pol[1:0]), - .pad_gpio_dm(mprj_io_dm[5:0]), - .pad_gpio_outenb(mprj_io_oeb[1:0]), - .pad_gpio_out(mprj_io_out[1:0]), - .pad_gpio_in(mprj_io_in[1:0]) - ); - - /* Section 1 GPIOs (GPIO 0 to 18) */ - wire [`MPRJ_IO_PADS_1-1:2] one_loop1; - - /* Section 1 GPIOs (GPIO 2 to 7) that start up under management control */ - - gpio_control_block gpio_control_in_1a [5:0] ( - `ifdef USE_POWER_PINS - .vccd(vccd_core), - .vssd(vssd_core), - .vccd1(vccd1_core), - .vssd1(vssd1_core), - `endif - - .gpio_defaults(gpio_defaults[103:26]), - - // Management Soc-facing signals - - .resetn(gpio_resetn_1_shifted[7:2]), - .serial_clock(gpio_clock_1_shifted[7:2]), - - .resetn_out(gpio_resetn_1[7:2]), - .serial_clock_out(gpio_clock_1[7:2]), - - .mgmt_gpio_in(mgmt_io_in[7:2]), - .mgmt_gpio_out(mgmt_io_in[7:2]), - .mgmt_gpio_oeb(one_loop1[7:2]), - - .one(one_loop1[7:2]), - .zero(), - - // Serial data chain for pad configuration - .serial_data_in(gpio_serial_link_1_shifted[7:2]), - .serial_data_out(gpio_serial_link_1[7:2]), - - // User-facing signals - .user_gpio_out(user_io_out[7:2]), - .user_gpio_oeb(user_io_oeb[7:2]), - .user_gpio_in(user_io_in[7:2]), - - // Pad-facing signals (Pad GPIOv2) - .pad_gpio_inenb(mprj_io_inp_dis[7:2]), - .pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[7:2]), - .pad_gpio_vtrip_sel(mprj_io_vtrip_sel[7:2]), - .pad_gpio_slow_sel(mprj_io_slow_sel[7:2]), - .pad_gpio_holdover(mprj_io_holdover[7:2]), - .pad_gpio_ana_en(mprj_io_analog_en[7:2]), - .pad_gpio_ana_sel(mprj_io_analog_sel[7:2]), - .pad_gpio_ana_pol(mprj_io_analog_pol[7:2]), - .pad_gpio_dm(mprj_io_dm[23:6]), - .pad_gpio_outenb(mprj_io_oeb[7:2]), - .pad_gpio_out(mprj_io_out[7:2]), - .pad_gpio_in(mprj_io_in[7:2]) - ); - - /* Section 1 GPIOs (GPIO 8 to 18) */ - - gpio_control_block gpio_control_in_1 [`MPRJ_IO_PADS_1-9:0] ( - `ifdef USE_POWER_PINS - .vccd(vccd_core), - .vssd(vssd_core), - .vccd1(vccd1_core), - .vssd1(vssd1_core), - `endif - - .gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS_1*13-1):104]), - - // Management Soc-facing signals - - .resetn(gpio_resetn_1_shifted[(`MPRJ_IO_PADS_1-1):8]), - .serial_clock(gpio_clock_1_shifted[(`MPRJ_IO_PADS_1-1):8]), - - .resetn_out(gpio_resetn_1[(`MPRJ_IO_PADS_1-1):8]), - .serial_clock_out(gpio_clock_1[(`MPRJ_IO_PADS_1-1):8]), - - .mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS_1-1):8]), - .mgmt_gpio_out(mgmt_io_in[(`MPRJ_IO_PADS_1-1):8]), - .mgmt_gpio_oeb(one_loop1[(`MPRJ_IO_PADS_1-1):8]), - - .one(one_loop1[(`MPRJ_IO_PADS_1-1):8]), - .zero(), - - // Serial data chain for pad configuration - .serial_data_in(gpio_serial_link_1_shifted[(`MPRJ_IO_PADS_1-1):8]), - .serial_data_out(gpio_serial_link_1[(`MPRJ_IO_PADS_1-1):8]), - - // User-facing signals - .user_gpio_out(user_io_out[(`MPRJ_IO_PADS_1-1):8]), - .user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS_1-1):8]), - .user_gpio_in(user_io_in[(`MPRJ_IO_PADS_1-1):8]), - - // Pad-facing signals (Pad GPIOv2) - .pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS_1*3-1):24]), - .pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS_1-1):8]), - .pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS_1-1):8]) - ); - - /* Last three GPIOs (spi_sdo, flash_io2, and flash_io3) */ - - gpio_control_block gpio_control_bidir_2 [2:0] ( - `ifdef USE_POWER_PINS - .vccd(vccd_core), - .vssd(vssd_core), - .vccd1(vccd1_core), - .vssd1(vssd1_core), - `endif - - .gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS*13-1):(`MPRJ_IO_PADS*13-39)]), - - // Management Soc-facing signals - - .resetn(gpio_resetn_1_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]), - .serial_clock(gpio_clock_1_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]), - - .resetn_out(gpio_resetn_1[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]), - .serial_clock_out(gpio_clock_1[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]), - - .mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .mgmt_gpio_out(mgmt_io_out[4:2]), - .mgmt_gpio_oeb(mgmt_io_oeb[4:2]), - - .one(), - .zero(), - - // Serial data chain for pad configuration - .serial_data_in(gpio_serial_link_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]), - .serial_data_out(gpio_serial_link_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]), - - // User-facing signals - .user_gpio_out(user_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .user_gpio_in(user_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - - // Pad-facing signals (Pad GPIOv2) - .pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS*3-1):(`MPRJ_IO_PADS*3-9)]), - .pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]), - .pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]) - ); - - /* Section 2 GPIOs (GPIO 19 to 34) */ - wire [`MPRJ_IO_PADS_2-4:0] one_loop2; - - gpio_control_block gpio_control_in_2 [`MPRJ_IO_PADS_2-4:0] ( - `ifdef USE_POWER_PINS - .vccd(vccd_core), - .vssd(vssd_core), - .vccd1(vccd1_core), - .vssd1(vssd1_core), - `endif - - .gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS*13-40):(`MPRJ_IO_PADS_1*13)]), - - // Management Soc-facing signals - - .resetn(gpio_resetn_1_shifted[(`MPRJ_IO_PADS_2-4):0]), - .serial_clock(gpio_clock_1_shifted[(`MPRJ_IO_PADS_2-4):0]), - - .resetn_out(gpio_resetn_1[(`MPRJ_IO_PADS_2-4):0]), - .serial_clock_out(gpio_clock_1[(`MPRJ_IO_PADS_2-4):0]), - - .mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .mgmt_gpio_out(mgmt_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .mgmt_gpio_oeb(one_loop2), - - .one(one_loop2), - .zero(), - - // Serial data chain for pad configuration - .serial_data_in(gpio_serial_link_2_shifted[(`MPRJ_IO_PADS_2-4):0]), - .serial_data_out(gpio_serial_link_2[(`MPRJ_IO_PADS_2-4):0]), - - // User-facing signals - .user_gpio_out(user_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .user_gpio_in(user_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - - // Pad-facing signals (Pad GPIOv2) - .pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS*3-10):(`MPRJ_IO_PADS_1*3)]), - .pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]), - .pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]) - ); - - user_id_programming #( - .USER_PROJECT_ID(USER_PROJECT_ID) - ) user_id_value ( - `ifdef USE_POWER_PINS - .VPWR(vccd_core), - .VGND(vssd_core), - `endif - .mask_rev(mask_rev) - ); - - // Power-on-reset circuit - simple_por por ( - `ifdef USE_POWER_PINS - .vdd3v3(vddio_core), - .vdd1v8(vccd_core), - .vss(vssio_core), - `endif - .porb_h(porb_h), - .porb_l(porb_l), - .por_l(por_l) - ); - - // XRES (chip input pin reset) reset level converter - xres_buf rstb_level ( - `ifdef USE_POWER_PINS - .VPWR(vddio_core), - .LVPWR(vccd_core), - .LVGND(vssd_core), - .VGND(vssio_core), - `endif - .A(rstb_h), - .X(rstb_l) - ); - endmodule // `default_nettype wire diff --git a/verilog/rtl/chip_io_openframe.v b/verilog/rtl/chip_io_openframe.v new file mode 100644 index 00000000..9b5b5a3b --- /dev/null +++ b/verilog/rtl/chip_io_openframe.v @@ -0,0 +1,517 @@ +// SPDX-FileCopyrightText: 2020 Efabless Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// SPDX-License-Identifier: Apache-2.0 + +/* chip_io_openframe --- + * + * RTL verilog definition of the padframe for the open-frame version + * of the Caravel harness chip, sky130 process + * + * Written by Tim Edwards + * March 27, 2023 + */ + +// `default_nettype none +module chip_io_openframe #( + parameter USER_PROJECT_ID = 32'h00000000 +) ( + // Package Pins + inout vddio_pad, // Common padframe/ESD supply + inout vddio_pad2, + inout vssio_pad, // Common padframe/ESD ground + inout vssio_pad2, + inout vccd_pad, // Common 1.8V supply + inout vssd_pad, // Common digital ground + inout vdda_pad, // User area 0 3.3V supply + inout vssa_pad, // User area 0 analog ground + inout vdda1_pad, // User area 1 3.3V supply + inout vdda1_pad2, + inout vdda2_pad, // User area 2 3.3V supply + inout vssa1_pad, // User area 1 analog ground + inout vssa1_pad2, + inout vssa2_pad, // User area 2 analog ground + inout vccd1_pad, // User area 1 1.8V supply + inout vccd2_pad, // User area 2 1.8V supply + inout vssd1_pad, // User area 1 digital ground + inout vssd2_pad, // User area 2 digital ground + + // Core Side + inout vddio, // Common padframe/ESD supply + inout vssio, // Common padframe/ESD ground + inout vccd, // Common 1.8V supply + inout vssd, // Common digital ground + inout vdda, // User area 0 3.3V supply + inout vssa, // User area 0 analog ground + inout vdda1, // User area 1 3.3V supply + inout vdda2, // User area 2 3.3V supply + inout vssa1, // User area 1 analog ground + inout vssa2, // User area 2 analog ground + inout vccd1, // User area 1 1.8V supply + inout vccd2, // User area 2 1.8V supply + inout vssd1, // User area 1 digital ground + inout vssd2, // User area 2 digital ground + + input resetb_pad, + + // Chip Core Interface + output porb_h, + output porb_l, + output por_l, + output resetb_h, + output resetb_l, + output [31:0] mask_rev, + + // User project IOs + inout [`OPENFRAME_IO_PADS-1:0] gpio, + input [`OPENFRAME_IO_PADS-1:0] gpio_out, + input [`OPENFRAME_IO_PADS-1:0] gpio_oeb, + input [`OPENFRAME_IO_PADS-1:0] gpio_inp_dis, + input [`OPENFRAME_IO_PADS-1:0] gpio_ib_mode_sel, + input [`OPENFRAME_IO_PADS-1:0] gpio_vtrip_sel, + input [`OPENFRAME_IO_PADS-1:0] gpio_slow_sel, + input [`OPENFRAME_IO_PADS-1:0] gpio_holdover, + input [`OPENFRAME_IO_PADS-1:0] gpio_analog_en, + input [`OPENFRAME_IO_PADS-1:0] gpio_analog_sel, + input [`OPENFRAME_IO_PADS-1:0] gpio_analog_pol, + input [`OPENFRAME_IO_PADS-1:0] gpio_dm0, + input [`OPENFRAME_IO_PADS-1:0] gpio_dm1, + input [`OPENFRAME_IO_PADS-1:0] gpio_dm2, + output [`OPENFRAME_IO_PADS-1:0] gpio_in, + output [`OPENFRAME_IO_PADS-1:0] gpio_in_h, + output [`OPENFRAME_IO_PADS-1:0] gpio_loopback_zero, + output [`OPENFRAME_IO_PADS-1:0] gpio_loopback_one, + inout [`OPENFRAME_IO_PADS-1:0] analog_io, + inout [`OPENFRAME_IO_PADS-1:0] analog_noesd_io +); + + // To be considered: Individual hold signals on all GPIO pads + // For now, set holdh_n to 1 internally (NOTE: This is in the + // VDDIO 3.3V domain) and set enh to porb_h for all GPIO pads. + + wire [`OPENFRAME_IO_PADS-1:0] gpio_enh; + + assign gpio_enh = {`OPENFRAME_IO_PADS{porb_h}}; + + // Internal bus wires + wire analog_a, analog_b; + wire vddio_q, vssio_q; + + // Instantiate power and ground pads for management domain + // 12 pads: vddio, vssio, vdda, vssa, vccd, vssd + // One each HV and LV clamp. + + // HV clamps connect between one HV power rail and one ground + // LV clamps have two clamps connecting between any two LV power + // rails and grounds, and one back-to-back diode which connects + // between the first LV clamp ground and any other ground. + + sky130_ef_io__vddio_hvc_clamped_pad user0_vddio_hvclamp_pad_0 ( + `MGMT_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VDDIO_PAD(vddio_pad) +`endif + ); + + // lies in user area 2 + sky130_ef_io__vddio_hvc_clamped_pad user0_vddio_hvclamp_pad_1 ( + `USER2_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VDDIO_PAD(vddio_pad2) +`endif + ); + + sky130_ef_io__vdda_hvc_clamped_pad user0_vdda_hvclamp_pad ( + `MGMT_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VDDA_PAD(vdda_pad) +`endif + ); + + sky130_ef_io__vccd_lvc_clamped_pad user0_vccd_lvclamp_pad ( + `MGMT_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VCCD_PAD(vccd_pad) +`endif + ); + + sky130_ef_io__vssio_hvc_clamped_pad user0_vssio_hvclamp_pad_0 ( + `MGMT_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VSSIO_PAD(vssio_pad) +`endif + ); + + sky130_ef_io__vssio_hvc_clamped_pad user0_vssio_hvclamp_pad_1 ( + `USER2_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VSSIO_PAD(vssio_pad2) +`endif + ); + + sky130_ef_io__vssa_hvc_clamped_pad user0_vssa_hvclamp_pad ( + `MGMT_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VSSA_PAD(vssa_pad) +`endif + ); + + sky130_ef_io__vssd_lvc_clamped_pad user0_vssd_lvclamp_pad ( + `MGMT_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VSSD_PAD(vssd_pad) +`endif + ); + + // Instantiate power and ground pads for user 1 domain + // 8 pads: vdda, vssa, vccd, vssd; One each HV and LV clamp. + + sky130_ef_io__vdda_hvc_clamped_pad user1_vdda_hvclamp_pad_0 ( + `USER1_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VDDA_PAD(vdda1_pad) +`endif + ); + + sky130_ef_io__vdda_hvc_clamped_pad user1_vdda_hvclamp_pad_1 ( + `USER1_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VDDA_PAD(vdda1_pad2) +`endif + ); + + sky130_ef_io__vccd_lvc_clamped3_pad user1_vccd_lvclamp_pad ( + `USER1_ABUTMENT_PINS + .VCCD1(vccd1), + .VSSD1(vssd1), +`ifndef TOP_ROUTING + .VCCD_PAD(vccd1_pad) +`endif + ); + + sky130_ef_io__vssa_hvc_clamped_pad user1_vssa_hvclamp_pad_0 ( + `USER1_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VSSA_PAD(vssa1_pad) +`endif + ); + + + sky130_ef_io__vssa_hvc_clamped_pad user1_vssa_hvclamp_pad_1 ( + `USER1_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VSSA_PAD(vssa1_pad2) +`endif + ); + + sky130_ef_io__vssd_lvc_clamped3_pad user1_vssd_lvclamp_pad ( + `USER1_ABUTMENT_PINS + .VCCD1(vccd1), + .VSSD1(vssd1), +`ifndef TOP_ROUTING + .VSSD_PAD(vssd1_pad) +`endif + ); + + // Instantiate power and ground pads for user 2 domain + // 8 pads: vdda, vssa, vccd, vssd; One each HV and LV clamp. + + sky130_ef_io__vdda_hvc_clamped_pad user2_vdda_hvclamp_pad ( + `USER2_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VDDA_PAD(vdda2_pad) +`endif + ); + + sky130_ef_io__vccd_lvc_clamped3_pad user2_vccd_lvclamp_pad ( + `USER2_ABUTMENT_PINS + .VCCD1(vccd2), + .VSSD1(vssd2), +`ifndef TOP_ROUTING + .VCCD_PAD(vccd2_pad) +`endif + ); + + sky130_ef_io__vssa_hvc_clamped_pad user2_vssa_hvclamp_pad ( + `USER2_ABUTMENT_PINS +`ifndef TOP_ROUTING + .VSSA_PAD(vssa2_pad) +`endif + ); + + sky130_ef_io__vssd_lvc_clamped3_pad user2_vssd_lvclamp_pad ( + `USER2_ABUTMENT_PINS + .VCCD1(vccd2), + .VSSD1(vssd2), +`ifndef TOP_ROUTING + .VSSD_PAD(vssd2_pad) +`endif + ); + + // Constant values in 1.8V domain to drive constant signals on GPIO pads + // These are exported to the user project for direct loopback if needed. + + constant_block constant_value_inst [`OPENFRAME_IO_PADS-1:0] ( + .vccd(vccd), + .vssd(vssd), + .one(gpio_loopback_one), + .zero(gpio_loopback_zero) + ); + + // One additional constant block provides the constant one value + // for the reset pad (see below) + + wire xres_loopback_one; + wire xres_loopback_zero; + + constant_block constant_value_xres_inst ( + .vccd(vccd), + .vssd(vssd), + .one(xres_loopback_one), + .zero(xres_loopback_zero) // (unused) + ); + + // Master reset pad (only digital pad not assigned as GPIO) + + wire xresloop; + wire xres_vss_loop; + + sky130_fd_io__top_xres4v2 master_resetb_pad ( + `MGMT_ABUTMENT_PINS + `ifndef TOP_ROUTING + .PAD(resetb_pad), + `endif + .TIE_WEAK_HI_H(xresloop), // Loop-back connection to pad through pad_a_esd_h + .TIE_HI_ESD(), + .TIE_LO_ESD(xres_vss_loop), + .PAD_A_ESD_H(xresloop), + .XRES_H_N(resetb_h), + .DISABLE_PULLUP_H(xres_vss_loop), // 0 = enable pull-up on reset pad + .ENABLE_H(porb_h), // Power-on-reset + .EN_VDDIO_SIG_H(xres_vss_loop), // No idea. + .INP_SEL_H(xres_vss_loop), // 1 = use filt_in_h else filter the pad input + .FILT_IN_H(xres_vss_loop), // Alternate input for glitch filter + .PULLUP_H(xres_vss_loop), // Pullup connection for alternate filter input + .ENABLE_VDDIO(xres_loopback_one) + ); + + // Buffer the reset pad output to generate a signal in the 1.8V domain + + xres_buf rstb_level ( +`ifdef USE_POWER_PINS + .VPWR(vddio), + .LVPWR(vccd), + .LVGND(vssd), + .VGND(vssio), +`endif + .A(resetb_h), + .X(resetb_l) + ); + + // Power-on-reset circuit + + simple_por por ( +`ifdef USE_POWER_PINS + .vdd3v3(vddio), + .vdd1v8(vccd), + .vss3v3(vssio), + .vss1v8(vssd), +`endif + .porb_h(porb_h), + .porb_l(porb_l), + .por_l(por_l) + ); + + // User ID block + user_id_programming #( + .USER_PROJECT_ID(USER_PROJECT_ID) + ) user_id_value ( + `ifdef USE_POWER_PINS + .VPWR(vccd), + .VGND(vssd), + `endif + .mask_rev(mask_rev) + ); + + // Corner cells (These are overlay cells; it is not clear what is normally + // supposed to go under them.) + + sky130_ef_io__corner_pad user0_corner [1:0] ( +`ifndef TOP_ROUTING + .VSSIO(vssio), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSIO_Q(vssio_q), + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VSSD(vssd), + .VSSA(vssa), + .VSWITCH(vddio), + .VDDA(vdda), + .VCCD(vccd), + .VCCHIB(vccd) +`endif + ); + sky130_ef_io__corner_pad user1_corner ( +`ifndef TOP_ROUTING + .VSSIO(vssio), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSIO_Q(vssio_q), + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VSSD(vssd), + .VSSA(vssa1), + .VSWITCH(vddio), + .VDDA(vdda1), + .VCCD(vccd), + .VCCHIB(vccd) +`endif + ); + sky130_ef_io__corner_pad user2_corner ( +`ifndef TOP_ROUTING + .VSSIO(vssio), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSIO_Q(vssio_q), + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VSSD(vssd), + .VSSA(vssa2), + .VSWITCH(vddio), + .VDDA(vdda2), + .VCCD(vccd), + .VCCHIB(vccd) +`endif + ); + + wire [`OPENFRAME_IO_PADS-1:0] loop0_gpio; // Internal loopback to 3.3V domain ground + wire [`OPENFRAME_IO_PADS-1:0] loop1_gpio; // Internal loopback to 3.3V domain power + + /* Digital mode signal DM is the interleaved concatenation of */ + /* GPIO signals dm2, dm1, and dm0 when passed to the GPIO pad */ + /* array, so generated the concatenated signal dm_all. */ + + wire [(`OPENFRAME_IO_PADS * 3)-1:0] gpio_dm_all; + + genvar i; + generate + for (i = 0; i < `OPENFRAME_IO_PADS; i = i+1) begin + assign gpio_dm_all[(i*3) + 2] = gpio_dm2[i]; + assign gpio_dm_all[(i*3) + 1] = gpio_dm1[i]; + assign gpio_dm_all[(i*3) + 0] = gpio_dm0[i]; + end + endgenerate + + /* Openframe pads (right side, power domain 1) */ + + sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad [`MPRJ_IO_PADS_1 - 1:0] ( + `USER1_ABUTMENT_PINS +`ifndef TOP_ROUTING + .PAD(gpio[`MPRJ_IO_PADS_1 - 1:0]), +`endif + .OUT(gpio_out[`MPRJ_IO_PADS_1 - 1:0]), + .OE_N(gpio_oeb[`MPRJ_IO_PADS_1 - 1:0]), + .HLD_H_N(loop1_gpio[`MPRJ_IO_PADS_1 - 1:0]), + .ENABLE_H(gpio_enh[`MPRJ_IO_PADS_1 - 1:0]), + .ENABLE_INP_H(loop0_gpio[`MPRJ_IO_PADS_1 - 1:0]), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VSWITCH_H(loop0_gpio[`MPRJ_IO_PADS_1 - 1:0]), + .ENABLE_VDDIO(gpio_loopback_one[`MPRJ_IO_PADS_1 - 1:0]), + .INP_DIS(gpio_inp_dis[`MPRJ_IO_PADS_1 - 1:0]), + .IB_MODE_SEL(gpio_ib_mode_sel[`MPRJ_IO_PADS_1 - 1:0]), + .VTRIP_SEL(gpio_vtrip_sel[`MPRJ_IO_PADS_1 - 1:0]), + .SLOW(gpio_slow_sel[`MPRJ_IO_PADS_1 - 1:0]), + .HLD_OVR(gpio_holdover[`MPRJ_IO_PADS_1 - 1:0]), + .ANALOG_EN(gpio_analog_en[`MPRJ_IO_PADS_1 - 1:0]), + .ANALOG_SEL(gpio_analog_sel[`MPRJ_IO_PADS_1 - 1:0]), + .ANALOG_POL(gpio_analog_pol[`MPRJ_IO_PADS_1 - 1:0]), + .DM(gpio_dm_all[(`MPRJ_IO_PADS_1)*3 - 1:0]), + .PAD_A_NOESD_H(analog_noesd_io[`MPRJ_IO_PADS_1 - 1:0]), + .PAD_A_ESD_0_H(analog_io[`MPRJ_IO_PADS_1 - 1:0]), + .PAD_A_ESD_1_H(), + .IN(gpio_in[`MPRJ_IO_PADS_1 - 1:0]), + .IN_H(gpio_in_h[`MPRJ_IO_PADS_1 - 1:0]), + .TIE_HI_ESD(loop1_gpio[`MPRJ_IO_PADS_1 - 1:0]), + .TIE_LO_ESD(loop0_gpio[`MPRJ_IO_PADS_1 - 1:0]) + ); + + /* Openframe pads (left side, power domain 2) */ + + sky130_ef_io__gpiov2_pad_wrapped area2_gpio_pad [`MPRJ_IO_PADS_2 - 1:0] ( + `USER2_ABUTMENT_PINS +`ifndef TOP_ROUTING + .PAD(gpio[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), +`endif + .OUT(gpio_out[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .OE_N(gpio_oeb[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .HLD_H_N(loop1_gpio[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .ENABLE_H(gpio_enh[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .ENABLE_INP_H(loop0_gpio[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VSWITCH_H(loop0_gpio[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .ENABLE_VDDIO(gpio_loopback_one[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .INP_DIS(gpio_inp_dis[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .IB_MODE_SEL(gpio_ib_mode_sel[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .VTRIP_SEL(gpio_vtrip_sel[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .SLOW(gpio_slow_sel[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .HLD_OVR(gpio_holdover[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .ANALOG_EN(gpio_analog_en[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .ANALOG_SEL(gpio_analog_sel[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .ANALOG_POL(gpio_analog_pol[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .DM(gpio_dm_all[(`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2)*3 - 1:(`MPRJ_IO_PADS_1)*3]), + .PAD_A_NOESD_H(analog_noesd_io[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .PAD_A_ESD_0_H(analog_io[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .PAD_A_ESD_1_H(), + .IN(gpio_in[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .IN_H(gpio_in_h[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .TIE_HI_ESD(loop1_gpio[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), + .TIE_LO_ESD(loop0_gpio[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]) + ); + + /* Openframe pads (bottom side, power domain 0) */ + + sky130_ef_io__gpiov2_pad_wrapped area0_gpio_pad [`OPENFRAME_IO_PADS - (`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2) - 1:0] ( + `MGMT_ABUTMENT_PINS +`ifndef TOP_ROUTING + .PAD(gpio[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), +`endif + .OUT(gpio_out[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .OE_N(gpio_oeb[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .HLD_H_N(loop1_gpio[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .ENABLE_H(gpio_enh[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .ENABLE_INP_H(loop0_gpio[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VSWITCH_H(loop0_gpio[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .ENABLE_VDDIO(gpio_loopback_one[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .INP_DIS(gpio_inp_dis[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .IB_MODE_SEL(gpio_ib_mode_sel[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .VTRIP_SEL(gpio_vtrip_sel[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .SLOW(gpio_slow_sel[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .HLD_OVR(gpio_holdover[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .ANALOG_EN(gpio_analog_en[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .ANALOG_SEL(gpio_analog_sel[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .ANALOG_POL(gpio_analog_pol[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .DM(gpio_dm_all[(`OPENFRAME_IO_PADS)*3 - 1:(`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2)*3]), + .PAD_A_NOESD_H(analog_noesd_io[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .PAD_A_ESD_0_H(analog_io[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .PAD_A_ESD_1_H(), + .IN(gpio_in[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .IN_H(gpio_in_h[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .TIE_HI_ESD(loop1_gpio[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), + .TIE_LO_ESD(loop0_gpio[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]) + ); + +endmodule +// `default_nettype wire + diff --git a/verilog/rtl/defines.v b/verilog/rtl/defines.v index 6213b6c2..94c6fcef 100644 --- a/verilog/rtl/defines.v +++ b/verilog/rtl/defines.v @@ -35,6 +35,9 @@ `define ANALOG_PADS (`ANALOG_PADS_1 + `ANALOG_PADS_2) +// Number of GPIO pads defined in the caravel openframe layout +`define OPENFRAME_IO_PADS 44 + // Size of soc_mem_synth // Type and size of soc_mem diff --git a/verilog/rtl/openframe_netlists.v b/verilog/rtl/openframe_netlists.v new file mode 100644 index 00000000..95247d5e --- /dev/null +++ b/verilog/rtl/openframe_netlists.v @@ -0,0 +1,63 @@ +// SPDX-FileCopyrightText: 2020 Efabless Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// SPDX-License-Identifier: Apache-2.0 + +`timescale 1 ns / 1 ps + +`define UNIT_DELAY #1 +`define USE_POWER_PINS + +`ifdef SIM + + `include "defines.v" + `include "user_defines.v" + `include "pads.v" + + /* NOTE: Need to pass the PDK root directory to iverilog with option -I */ + + `ifdef EF_STYLE + `include "libs.ref/verilog/sky130_fd_io/sky130_fd_io.v" + `include "libs.ref/verilog/sky130_fd_io/sky130_ef_io.v" + + `include "libs.ref/verilog/sky130_fd_sc_hd/primitives.v" + `include "libs.ref/verilog/sky130_fd_sc_hd/sky130_fd_sc_hd.v" + `include "libs.ref/verilog/sky130_fd_sc_hvl/primitives.v" + `include "libs.ref/verilog/sky130_fd_sc_hvl/sky130_fd_sc_hvl.v" + `else + `include "libs.ref/sky130_fd_io/verilog/sky130_fd_io.v" + `include "libs.ref/sky130_fd_io/verilog/sky130_ef_io.v" + + `include "libs.ref/sky130_fd_sc_hd/verilog/primitives.v" + `include "libs.ref/sky130_fd_sc_hd/verilog/sky130_fd_sc_hd.v" + `include "libs.ref/sky130_fd_sc_hvl/verilog/primitives.v" + `include "libs.ref/sky130_fd_sc_hvl/verilog/sky130_fd_sc_hvl.v" + `endif + + `ifdef GL + `include "gl/user_id_programming.v" + `include "gl/chip_io_openframe.v" + `include "gl/constant_block.v" + `include "gl/xres_buf.v" + `include "gl/caravel_openframe.v" + `else + `include "user_id_programming.v" + `include "chip_io_openframe.v" + `include "constant_block.v" + `include "xres_buf.v" + `include "caravel_openframe.v" + `endif + + `include "simple_por.v" + +`endif diff --git a/xschem/simple_por.spice b/xschem/simple_por.spice index eab7fedb..fd3c4cf0 100644 --- a/xschem/simple_por.spice +++ b/xschem/simple_por.spice @@ -1,5 +1,6 @@ -# NOTE: Hand-edited to change res_xhigh_po_0p69 resistors to res_xhigh_po resistors with W=0.69 -# because the former device does not get recognized when reading from GDS. +* NOTE: Hand-edited to change res_xhigh_po_0p69 resistors to res_xhigh_po resistors with W=0.69 +* because the former device does not get recognized when reading from GDS. The magic view is annotated +* so that it will extract properly. .subckt simple_por vdd3v3 vss3v3 porb_h porb_l por_l vdd1v8 vss1v8 *.iopin vdd3v3 *.iopin vss3v3 @@ -16,16 +17,16 @@ XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((n XM2 net2 net3 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' + as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' + nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 -# XR1 net4 vdd3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1 -XR1 net4 vdd3v3 vss3v3 sky130_fd_pr__res_xhigh_po W=0.69 L=500 mult=1 m=1 +XR1 net4 vdd3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1 +* XR1 net4 vdd3v3 vss3v3 sky130_fd_pr__res_xhigh_po W=0.69 L=500 mult=1 m=1 XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' + as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' + nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 XM5 net3 net3 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' + as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' + nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 -# XR2 vss3v3 net4 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1 -XR2 vss3v3 net4 vss3v3 sky130_fd_pr__res_xhigh_po W=0.69 L=150 mult=1 m=1 +XR2 vss3v3 net4 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1 +* XR2 vss3v3 net4 vss3v3 sky130_fd_pr__res_xhigh_po W=0.69 L=150 mult=1 m=1 XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' + as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' + nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 @@ -47,8 +48,8 @@ XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' + as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' + nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 -# XR3 vss3v3 vss3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2 -XR3 vss3v3 vss3v3 vss3v3 sky130_fd_pr__res_xhigh_po W=0.69 L=25 mult=2 m=2 +XR3 vss3v3 vss3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2 +* XR3 vss3v3 vss3v3 vss3v3 sky130_fd_pr__res_xhigh_po W=0.69 L=25 mult=2 m=2 x2 net10 vss3v3 vss3v3 vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8 x3 net10 vss1v8 vss1v8 vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8 x4 net10 vss1v8 vss1v8 vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8