update gpio_all_i_pu test

verilog/dv/cocotb/caravel.py

@@ -122,8 +122,9 @@ class Caravel_env:
     """set the spi vsb signal high impedance """
     async def release_csb(self ):
         cocotb.log.info(f' [caravel] release housekeeping spi transmission')
-        await self.drive_csb('z')
+        self.drive_gpio_in((3,3),'z')
-        
+        self.drive_gpio_in((2,2),'z')
+        await ClockCycles(self.clk, 1)
 
     """set the spi vsb signal low to enable housekeeping spi transmission bin E8 mprj[3]"""
     async def enable_csb(self ):
@@ -336,7 +337,7 @@ class Caravel_env:
                 self.dut._id(f"bin{bits2}_en",False).value = 0
                 cocotb.log.debug(f'[caravel] [drive_gpio_disable] release driving bin{bits2}')
         else:
-            self.dut._id(f'bin{bits}_en',False).value = 1
+            self.dut._id(f'bin{bits}_en',False).value = 0
             cocotb.log.debug(f'[caravel] [drive_gpio_disable] release driving bin{bits}')
 
 

verilog/dv/cocotb/tests/gpio/gpio.py

@@ -103,12 +103,13 @@ async def gpio_all_i(dut):
 @cocotb.test()
 @repot_test
 async def gpio_all_i_pu(dut):
-    caravelEnv,clock = await test_configure(dut,timeout_cycles=1245464)
+    caravelEnv,clock = await test_configure(dut,timeout_cycles=1245464,num_error=2000)
+    await caravelEnv.release_csb()
     cpu = RiskV(dut)
     cpu.cpu_force_reset()
     cpu.cpu_release_reset()
     uut = dut.uut
-
+    # await ClockCycles(caravelEnv.clk,1000000000) 
     # for i in range(200):
     #     caravelEnv.drive_gpio_in((31,0),0x0)
     #     await ClockCycles(caravelEnv.clk,10000) 
@@ -117,30 +118,107 @@ async def gpio_all_i_pu(dut):
     
     # return
     await wait_reg1(cpu,caravelEnv,0xAA)
-
+    # monitor the output of padframe module it suppose to be all ones  when no input is applied
-    cocotb.log.info(f"[TEST] configuration finished")
+    await ClockCycles(caravelEnv.clk,100) 
-    await wait_reg1(cpu,caravelEnv,0xB1)
+    gpio = dut.uut.padframe.mprj_io_in.value.binstr
+    for i in range(38):
+        if gpio[i] != "1":
+            cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as pullup and float")
+    await ClockCycles(caravelEnv.clk,1000) 
+    # drive gpios with zero 
     data_in =  0x0
-    cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]")
+    caravelEnv.drive_gpio_in((37,0),data_in)
-    caravelEnv.drive_gpio_in((31,0),data_in)
+    await ClockCycles(caravelEnv.clk,1000) 
-    await wait_reg1(cpu,caravelEnv,0xB2)
+    gpio = dut.uut.padframe.mprj_io_in.value.binstr
-    cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]")
+    for i in range(38):
-    size = 32
+        if gpio[i] != "0":
-    data_in =  int(size) * 'z'
+            cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as pullup and drived with 0")
-    data_in =  0xFFFFFFFF
+    await ClockCycles(caravelEnv.clk,1000) 
-    cocotb.log.info(f"[TEST] send {data_in} to gpio[31:0]")
+    # drive gpios with ones 
-    caravelEnv.release_gpio((31,0))
+    data_in =  0x3FFFFFFFFF
-    await wait_reg1(cpu,caravelEnv,0xB3)
+    caravelEnv.drive_gpio_in((37,0),data_in)
-    cocotb.log.info(f"[TEST] data {data_in} sent successfully to gpio[31:0]")
+    await ClockCycles(caravelEnv.clk,1000) 
+    gpio = dut.uut.padframe.mprj_io_in.value.binstr
+    for i in range(38):
+        if gpio[i] != "1":
+            cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as pullup and drived with 1")
+    await ClockCycles(caravelEnv.clk,1000) 
+    # drive odd half gpios with zeros and float other half
     data_in =  0x0
-    cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[0:16]")
+    caravelEnv.drive_gpio_in((37,0),data_in)
-    caravelEnv.drive_gpio_in((15,0),data_in)
+    for i in range(0,38,2):
+        caravelEnv.release_gpio(i) # release even gpios
+    await ClockCycles(caravelEnv.clk,1000) 
+    gpio = dut.uut.padframe.mprj_io_in.value.binstr
+    for i in range(38):
+        if i%2 ==1: #odd
+            if gpio[i]!="1":
+                cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as pullup and drived with odd half with 0")
+        else:
+            if gpio[i] != "0":
+                cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as pullup and drived with odd half with 0")
+    await ClockCycles(caravelEnv.clk,1000) 
+    # drive even half gpios with zeros and float other half
+    caravelEnv.drive_gpio_in((37,0),data_in)
+    for i in range(1,38,2):
+        caravelEnv.release_gpio(i) # release odd gpios
+    await ClockCycles(caravelEnv.clk,1000) 
+    gpio = dut.uut.padframe.mprj_io_in.value.binstr
+    for i in range(38):
+        if i%2 ==1: #odd
+            if gpio[i] != "0":
+                cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as pullup and drived with even half with 0")
+        else:
+            if gpio[i]!="1":
+                cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as pullup and drived with even half with 0")
+    await ClockCycles(caravelEnv.clk,1000) 
+    # drive odd half gpios with ones and float other half
+    data_in =  0x3FFFFFFFFF
+    caravelEnv.drive_gpio_in((37,0),data_in)
+    for i in range(0,38,2):
+        caravelEnv.release_gpio(i) # release even gpios
+    await ClockCycles(caravelEnv.clk,1000) 
+    gpio = dut.uut.padframe.mprj_io_in.value.binstr
+    for i in range(38):
+        if gpio[i]!="1":
+            cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as pullup and drived with odd half with 1")
     
-    # await wait_reg2(cpu,caravelEnv,0xFF) 
+    await ClockCycles(caravelEnv.clk,1000) 
-    cocotb.log.info(f"[TEST] finish")
+    # drive even half gpios with zeros and float other half
+    caravelEnv.drive_gpio_in((37,0),data_in)
+    for i in range(1,38,2):
+        caravelEnv.release_gpio(i) # release odd gpios
+    await ClockCycles(caravelEnv.clk,1000) 
+    gpio = dut.uut.padframe.mprj_io_in.value.binstr
+    for i in range(38):
+        if gpio[i] != "1":
+            cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as pullup and drived with even half with 1")
+       
+    await ClockCycles(caravelEnv.clk,1000) 
+
+    # cocotb.log.info(f"[TEST] configuration finished")
+    # await wait_reg1(cpu,caravelEnv,0xB1)
+    # data_in = 0x0
+    # cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]")
+    # caravelEnv.drive_gpio_in((31,0),data_in)
+    # await wait_reg1(cpu,caravelEnv,0xB2)
+    # cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]")
+    # size = 32
+    # data_in =  int(size) * 'z'
+    # data_in =  0xFFFFFFFF
+    # cocotb.log.info(f"[TEST] send {data_in} to gpio[31:0]")
+    # caravelEnv.release_gpio((31,0))
+    # await wait_reg1(cpu,caravelEnv,0xB3)
+    # cocotb.log.info(f"[TEST] data {data_in} sent successfully to gpio[31:0]")
+    # data_in = 0x0
+    # cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[0:16]")
+    # caravelEnv.drive_gpio_in((15,0),data_in)
+
+    # # await wait_reg2(cpu,caravelEnv,0xFF) 
+    # cocotb.log.info(f"[TEST] finish")
 
 
-    await wait_reg1(cpu,caravelEnv,0xFF)
+    # await wait_reg1(cpu,caravelEnv,0xFF)
 
 
 

verilog/dv/cocotb/tests/gpio/gpio_all_i_pu.c

@@ -7,7 +7,7 @@ void main(){
     reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2
     reg_debug_1  = 0x0;
     reg_debug_2  = 0x0;
-
+    reg_hkspi_disable = 1;
     reg_mprj_io_37 = GPIO_MODE_MGMT_STD_INPUT_PULLUP;
     reg_mprj_io_36 = GPIO_MODE_MGMT_STD_INPUT_PULLUP;
     reg_mprj_io_35 = GPIO_MODE_MGMT_STD_INPUT_PULLUP;
@@ -57,25 +57,25 @@ void main(){
     // reg_debug_2 = reg_mprj_datal;
 
     // }
-    reg_debug_1 = 0XB1; //  wait environment to send 0x0 to reg_mprj_datal
+    // reg_debug_1 = 0XB1; //  wait environment to send 0x0 to reg_mprj_datal
-    while (reg_mprj_datal != 0x0);
+    // while (reg_mprj_datal != 0x0);
-    reg_debug_2 = reg_mprj_datal;
+    // reg_debug_2 = reg_mprj_datal;
-    reg_debug_1 = 0XB2; //  wait environment to send 0xzzzzzzzz to reg_mprj_datal
+    // reg_debug_1 = 0XB2; //  wait environment to send 0xzzzzzzzz to reg_mprj_datal
-    while (reg_mprj_datal != 0xFFFFFFFF);
+    // while (reg_mprj_datal != 0xFFFFFFFF);
-    reg_debug_2 = reg_mprj_datal;
+    // reg_debug_2 = reg_mprj_datal;
-    reg_debug_1 = 0XB3; //  wait environment to send 0xzzzz0000 to reg_mprj_datal
+    // reg_debug_1 = 0XB3; //  wait environment to send 0xzzzz0000 to reg_mprj_datal
-    while (reg_mprj_datal != 0xFFFF0000);
+    // while (reg_mprj_datal != 0xFFFF0000);
-    reg_debug_2 = reg_mprj_datal;
+    // reg_debug_2 = reg_mprj_datal;
     
-    reg_debug_1 = 0XB5; //  wait environment to send 0x0 to reg_mprj_datah
+    // reg_debug_1 = 0XB5; //  wait environment to send 0x0 to reg_mprj_datah
-    while (reg_mprj_datah != 0x0);
+    // while (reg_mprj_datah != 0x0);
-    reg_debug_2 = reg_mprj_datah;
+    // reg_debug_2 = reg_mprj_datah;
-    reg_debug_1 = 0XB6; //  wait environment to send 0xzz to reg_mprj_datah
+    // reg_debug_1 = 0XB6; //  wait environment to send 0xzz to reg_mprj_datah
-    while (reg_mprj_datah != 0x3F);
+    // while (reg_mprj_datah != 0x3F);
-    reg_debug_2 = reg_mprj_datah;
+    // reg_debug_2 = reg_mprj_datah;
-    reg_debug_1 = 0XB7; //  wait environment to send 0xz0 to reg_mprj_datah
+    // reg_debug_1 = 0XB7; //  wait environment to send 0xz0 to reg_mprj_datah
-    while (reg_mprj_datah != 0x30);
+    // while (reg_mprj_datah != 0x30);
-    reg_debug_2 = reg_mprj_datah;
+    // reg_debug_2 = reg_mprj_datah;
 
     reg_debug_1 = 0xFF;
 }