Merge pull request #146 from efabless/mgmt_fix

fix  typos in mgmt_protect.v

manifest

@@ -18,7 +18,7 @@ ce49f9af199b5f16d2c39c417d58e5890bc7bab2  verilog/rtl/digital_pll_controller.v
 32d395d5936632f3c92a0de4867d6dd7cd4af1bb  verilog/rtl/gpio_logic_high.v
 8dafb824eae7173e43f4e2f31c7470a6a1272c79  verilog/rtl/housekeeping.v
 3030f955d5f110d24012bd1562c0e18c1a0d04e2  verilog/rtl/housekeeping_spi.v
-9cb20aace3daaae58f74b4a280053e7d1ed6b8e3  verilog/rtl/mgmt_protect.v
+ee3fbd794fcc6d221562147b09891e315873ac4c  verilog/rtl/mgmt_protect.v
 3b1ff20593bc386d13f5e2cf1571f08121889957  verilog/rtl/mgmt_protect_hv.v
 9816acedf3dc3edd193861cc217ec46180ac1cdd  verilog/rtl/mprj2_logic_high.v
 9dd11188f3a6980537dd51d8dd1a827795ac70fc  verilog/rtl/mprj_io.v

verilog/rtl/mgmt_protect.v

@@ -180,7 +180,7 @@ module mgmt_protect (
 
 	// Protection, similar to the above, for the three user IRQ lines
 
-	assign user_irq_enable = user_irq_ena & mrpj_logic1[460:458];
+	assign user_irq_enable = user_irq_ena & mprj_logic1[460:458];
 
 	sky130_fd_sc_hd__nand2_4 user_irq_gates [2:0] (
 `ifdef USE_POWER_PINS
@@ -233,7 +233,7 @@ module mgmt_protect (
 	// SoC dumping current into the user project area when
 	// the user project area is powered down.
 	
-	assign user_reset      = (~caravel_rstn) & mprj_logic1[0]);
+	assign user_reset      = (~caravel_rstn) & mprj_logic1[0];
 	assign user_clock      = caravel_clk     & mprj_logic1[1];
 	assign user_clock2     = caravel_clk2    & mprj_logic1[2];
 	assign mprj_cyc_o_user = mprj_cyc_o_core & mprj_logic1[3];
@@ -252,7 +252,7 @@ module mgmt_protect (
 	/* Project data out enable (bar) from the managment side to the	*/
 	/* user project	area when the user project is powered down.	*/
 
-	assign la_oenb_core = la_oenb_mprj & mprj_logic1[329:202]);
+	assign la_oenb_core = la_oenb_mprj & mprj_logic1[329:202];
 
 	/* The conb cell output is a resistive connection directly to	*/
 	/* the power supply, so when returning the user1_powergood	*/