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add log for verify simulation output

This commit is contained in:
jeffdi 2022-09-20 18:27:21 -07:00
parent d8399ae6f5
commit baeb1cc551
1 changed files with 5 additions and 5 deletions
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10
Makefile
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@ -268,17 +268,17 @@ verify-standalone-all-gl-sdf: $(dv-targets-gl-sdf)
$(dv-caravel-targets-rtl): SIM=RTL
$(dv-caravel-targets-rtl): CONFIG=caravel
$(dv-caravel-targets-rtl): verify-caravel-%-rtl: $(dv_base_dependencies)
$(dv-caravel-targets-rtl): verify-caravel-%-rtl: $(dv_base_dependencies) verify_log_header
$(docker_run_verify)
$(dv-caravel-targets-gl): SIM=GL
$(dv-caravel-targets-gl): CONFIG=caravel
$(dv-caravel-targets-gl): verify-caravel-%-gl: $(dv_base_dependencies)
$(dv-caravel-targets-gl): verify-caravel-%-gl: $(dv_base_dependencies) verify_log_header
$(docker_run_verify)
$(dv-caravel-targets-gl-sdf): SIM=GL_SDF
$(dv-caravel-targets-gl-sdf): CONFIG=caravel
$(dv-caravel-targets-gl-sdf): verify-caravel-%-gl-sdf: $(dv_base_dependencies)
$(dv-caravel-targets-gl-sdf): verify-caravel-%-gl-sdf: $(dv_base_dependencies) verify_log_header
$(docker_run_verify)
$(dv-standalone-targets-rtl): SIM=RTL
@ -288,12 +288,12 @@ $(dv-standalone-targets-rtl): verify-standalone-%-rtl: $(dv_base_dependencies) v
$(dv-standalone-targets-gl): SIM=GL
$(dv-standalone-targets-gl): CONFIG=standalone
$(dv-standalone-targets-gl): verify-standalone-%-gl: $(dv_base_dependencies)
$(dv-standalone-targets-gl): verify-standalone-%-gl: $(dv_base_dependencies) verify_log_header
$(docker_run_verify)
$(dv-standalone-targets-gl-sdf): SIM=GL_SDF
$(dv-standalone-targets-gl-sdf): CONFIG=standalone
$(dv-standalone-targets-gl-sdf): verify-standalone-%-gl-sdf: $(dv_base_dependencies)
$(dv-standalone-targets-gl-sdf): verify-standalone-%-gl-sdf: $(dv_base_dependencies) verify_log_header
$(docker_run_verify)
clean-targets=$(blocks:%=clean-%)