Merge pull request #265 from efabless/caravel_redesign-top-level-with-pdn

reharden: caravel

lef/caravel_logo-stub.lef

@@ -0,0 +1,12 @@
+VERSION 5.7 ;
+  NOWIREEXTENSIONATPIN ON ;
+  DIVIDERCHAR "/" ;
+  BUSBITCHARS "[]" ;
+MACRO caravel_logo
+  CLASS BLOCK ;
+  FOREIGN caravel_logo ;
+  ORIGIN 0.000 0.000 ;
+  SIZE 40.000 BY 25.000 ;
+END caravel_logo
+END LIBRARY
+

lef/caravel_motto-stub.lef

@@ -0,0 +1,12 @@
+VERSION 5.7 ;
+  NOWIREEXTENSIONATPIN ON ;
+  DIVIDERCHAR "/" ;
+  BUSBITCHARS "[]" ;
+MACRO caravel_motto
+  CLASS BLOCK ;
+  FOREIGN caravel_motto ;
+  ORIGIN 0.000 0.000 ;
+  SIZE 40.000 BY 25.000 ;
+END caravel_motto
+END LIBRARY
+

lef/copyright_block-stub.lef

@@ -0,0 +1,12 @@
+VERSION 5.7 ;
+  NOWIREEXTENSIONATPIN ON ;
+  DIVIDERCHAR "/" ;
+  BUSBITCHARS "[]" ;
+MACRO copyright_block
+  CLASS BLOCK ;
+  FOREIGN copyright_block ;
+  ORIGIN 0.000 0.000 ;
+  SIZE 40.000 BY 25.000 ;
+END copyright_block
+END LIBRARY
+

lef/open_source-stub.lef

@@ -0,0 +1,12 @@
+VERSION 5.7 ;
+  NOWIREEXTENSIONATPIN ON ;
+  DIVIDERCHAR "/" ;
+  BUSBITCHARS "[]" ;
+MACRO open_source
+  CLASS BLOCK ;
+  FOREIGN open_source ;
+  ORIGIN 0.000 0.000 ;
+  SIZE 40.000 BY 25.000 ;
+END open_source
+END LIBRARY
+

lef/user_id_textblock-stub.lef

@@ -0,0 +1,12 @@
+VERSION 5.7 ;
+  NOWIREEXTENSIONATPIN ON ;
+  DIVIDERCHAR "/" ;
+  BUSBITCHARS "[]" ;
+MACRO user_id_textblock
+  CLASS BLOCK ;
+  FOREIGN user_id_textblock ;
+  ORIGIN 0.000 0.000 ;
+  SIZE 40.000 BY 25.000 ;
+END user_id_textblock
+END LIBRARY
+

manifest

@@ -8,7 +8,7 @@ cc82a78753f5f5d0a1519bd81adbcff8a4296d91  verilog/rtl/__user_project_wrapper.v
 2cc670e819a1cae69314242364118f5d4267737c  verilog/rtl/caravan.v
 06e92151b5928e3f28e30a5cde76f7dd6530ed91  verilog/rtl/caravan_netlists.v
 a3d12a2d2d3596800bec47d1266dce2399a2fcc6  verilog/rtl/caravan_openframe.v
-0eae54a68056d27eb75a06b67023054e7247cdf2  verilog/rtl/caravel.v
+9ffad7386a27535d6441908a122cb90bb931ad68  verilog/rtl/caravel.v
 2fe34f043edbe87c626e5616ad54f82c9ba067c2  verilog/rtl/caravel_clocking.v
 625c9f974f1a3c9bd2eca5449a89a7bfb8f69fe8  verilog/rtl/caravel_logo.v
 1bbaa93405d4cb51429eacea4da40014231b11ed  verilog/rtl/caravel_motto.v

openlane/caravel/config.tcl

@@ -53,10 +53,20 @@ set ::env(VERILOG_FILES_BLACKBOX) "\
 	$verilog_root/rtl/caravel_power_routing.v \
 	$verilog_root/rtl/buff_flash_clkrst.v \
 	$verilog_root/rtl/gpio_signal_buffering.v \
+	$verilog_root/rtl/caravel_logo.v \
+	$verilog_root/rtl/caravel_motto.v \
+	$verilog_root/rtl/copyright_block.v \
+	$verilog_root/rtl/open_source.v \
+	$verilog_root/rtl/user_id_textblock.v \
 	$mgmt_area_verilog_root/rtl/mgmt_core_wrapper.v \
 	"
 
 set ::env(EXTRA_LEFS) "\
+	$lef_root/caravel_logo-stub.lef \
+	$lef_root/caravel_motto-stub.lef \
+	$lef_root/copyright_block-stub.lef \
+	$lef_root/open_source-stub.lef \
+	$lef_root/user_id_textblock-stub.lef \
 	$lef_root/caravel_power_routing.lef \
 	$lef_root/chip_io.lef \
 	$lef_root/user_project_wrapper.lef \
@@ -76,6 +86,11 @@ set ::env(EXTRA_LEFS) "\
 	"
 
 set ::env(EXTRA_GDS_FILES) "\
+    $gds_root/copyright_block.gds \
+    $gds_root/open_source.gds \
+    $gds_root/user_id_textblock.gds \
+    $gds_root/caravel_logo.gds \
+    $gds_root/caravel_motto.gds \
     $gds_root/caravel_power_routing.gds \
     $gds_root/buff_flash_clkrst.gds \
     $gds_root/gpio_signal_buffering.gds \

openlane/caravel/interactive-old.tcl

@@ -64,6 +64,11 @@ set mprj_y 1393.590
 
 set soc_x 260.170
 set soc_y 265.010
+add_macro_placement copyright_block 747.91000 81.49000 N
+add_macro_placement open_source 1030.49000 10.27000 N
+add_macro_placement user_id_textblock 481.36000 34.45000 N
+add_macro_placement caravel_logo 1346.85000 25.50000 N
+add_macro_placement caravel_motto -271.86000 -22.23000 N
 add_macro_placement sigbuf 0 0 N
 add_macro_placement flash_clkrst_buffers 2292 238 N
 add_macro_placement caravel_power_routing 0 0 N
@@ -80,6 +85,7 @@ add_macro_placement pll 3140.730 404.721 N
 add_macro_placement spare_logic\\\[0\\\] 443.16 1162.64 N
 add_macro_placement spare_logic\\\[1\\\] 543.16 1162.64 N
 add_macro_placement spare_logic\\\[2\\\] 3204.37 1102.96 N
+#add_macro_placement spare_logic\\\[3\\\] 2943.16 1162.64 N
 add_macro_placement spare_logic\\\[3\\\] 2893.16 1162.64 N
 
 add_macro_placement clock_ctrl 3133.820 316.420 N

verilog/gl/caravel.v

@@ -5229,60 +5229,6 @@ module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vd
     .VPWR(vccd_core),
     .mask_rev({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0]  })
   );
-  assign \gpio_clock_2_shifted[17]  = \gpio_clock_2[18] ;
-  assign \gpio_clock_2_shifted[16]  = \gpio_clock_2[17] ;
-  assign \gpio_clock_2_shifted[15]  = \gpio_clock_2[16] ;
-  assign \gpio_clock_2_shifted[14]  = \gpio_clock_2[15] ;
-  assign \gpio_clock_2_shifted[13]  = \gpio_clock_2[14] ;
-  assign \gpio_clock_2_shifted[12]  = \gpio_clock_2[13] ;
-  assign \gpio_clock_2_shifted[11]  = \gpio_clock_2[12] ;
-  assign \gpio_clock_2_shifted[10]  = \gpio_clock_2[11] ;
-  assign \gpio_clock_2_shifted[9]  = \gpio_clock_2[10] ;
-  assign \gpio_clock_2_shifted[8]  = \gpio_clock_2[9] ;
-  assign \gpio_clock_2_shifted[7]  = \gpio_clock_2[8] ;
-  assign \gpio_clock_2_shifted[6]  = \gpio_clock_2[7] ;
-  assign \gpio_clock_2_shifted[5]  = \gpio_clock_2[6] ;
-  assign \gpio_clock_2_shifted[4]  = \gpio_clock_2[5] ;
-  assign \gpio_clock_2_shifted[3]  = \gpio_clock_2[4] ;
-  assign \gpio_clock_2_shifted[2]  = \gpio_clock_2[3] ;
-  assign \gpio_clock_2_shifted[1]  = \gpio_clock_2[2] ;
-  assign \gpio_clock_2_shifted[0]  = \gpio_clock_2[1] ;
-  assign \gpio_clock_1_shifted[18]  = \gpio_clock_1[17] ;
-  assign \gpio_clock_1_shifted[17]  = \gpio_clock_1[16] ;
-  assign \gpio_clock_1_shifted[16]  = \gpio_clock_1[15] ;
-  assign \gpio_clock_1_shifted[15]  = \gpio_clock_1[14] ;
-  assign \gpio_clock_1_shifted[14]  = \gpio_clock_1[13] ;
-  assign \gpio_clock_1_shifted[13]  = \gpio_clock_1[12] ;
-  assign \gpio_clock_1_shifted[12]  = \gpio_clock_1[11] ;
-  assign \gpio_clock_1_shifted[11]  = \gpio_clock_1[10] ;
-  assign \gpio_clock_1_shifted[10]  = \gpio_clock_1[9] ;
-  assign \gpio_clock_1_shifted[9]  = \gpio_clock_1[8] ;
-  assign \gpio_clock_1_shifted[8]  = \gpio_clock_1[7] ;
-  assign \gpio_clock_1_shifted[7]  = \gpio_clock_1[6] ;
-  assign \gpio_clock_1_shifted[6]  = \gpio_clock_1[5] ;
-  assign \gpio_clock_1_shifted[5]  = \gpio_clock_1[4] ;
-  assign \gpio_clock_1_shifted[4]  = \gpio_clock_1[3] ;
-  assign \gpio_clock_1_shifted[3]  = \gpio_clock_1[2] ;
-  assign \gpio_clock_1_shifted[2]  = \gpio_clock_1[1] ;
-  assign \gpio_clock_1_shifted[1]  = \gpio_clock_1[0] ;
-  assign \gpio_resetn_2_shifted[17]  = \gpio_resetn_2[18] ;
-  assign \gpio_resetn_2_shifted[16]  = \gpio_resetn_2[17] ;
-  assign \gpio_resetn_2_shifted[15]  = \gpio_resetn_2[16] ;
-  assign \gpio_resetn_2_shifted[14]  = \gpio_resetn_2[15] ;
-  assign \gpio_resetn_2_shifted[13]  = \gpio_resetn_2[14] ;
-  assign \gpio_resetn_2_shifted[12]  = \gpio_resetn_2[13] ;
-  assign \gpio_resetn_2_shifted[11]  = \gpio_resetn_2[12] ;
-  assign \gpio_resetn_2_shifted[10]  = \gpio_resetn_2[11] ;
-  assign \gpio_resetn_2_shifted[9]  = \gpio_resetn_2[10] ;
-  assign \gpio_resetn_2_shifted[8]  = \gpio_resetn_2[9] ;
-  assign \gpio_resetn_2_shifted[7]  = \gpio_resetn_2[8] ;
-  assign \gpio_resetn_2_shifted[6]  = \gpio_resetn_2[7] ;
-  assign \gpio_resetn_2_shifted[5]  = \gpio_resetn_2[6] ;
-  assign \gpio_resetn_2_shifted[4]  = \gpio_resetn_2[5] ;
-  assign \gpio_resetn_2_shifted[3]  = \gpio_resetn_2[4] ;
-  assign \gpio_resetn_2_shifted[2]  = \gpio_resetn_2[3] ;
-  assign \gpio_resetn_2_shifted[1]  = \gpio_resetn_2[2] ;
-  assign \gpio_resetn_2_shifted[0]  = \gpio_resetn_2[1] ;
   assign \gpio_serial_link_2_shifted[17]  = \gpio_serial_link_2[18] ;
   assign \gpio_serial_link_2_shifted[16]  = \gpio_serial_link_2[17] ;
   assign \gpio_serial_link_2_shifted[15]  = \gpio_serial_link_2[16] ;
@@ -5301,6 +5247,49 @@ module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vd
   assign \gpio_serial_link_2_shifted[2]  = \gpio_serial_link_2[3] ;
   assign \gpio_serial_link_2_shifted[1]  = \gpio_serial_link_2[2] ;
   assign \gpio_serial_link_2_shifted[0]  = \gpio_serial_link_2[1] ;
+  assign \gpio_resetn_2_shifted[17]  = \gpio_resetn_2[18] ;
+  assign \gpio_resetn_2_shifted[16]  = \gpio_resetn_2[17] ;
+  assign \gpio_resetn_2_shifted[15]  = \gpio_resetn_2[16] ;
+  assign \gpio_resetn_2_shifted[14]  = \gpio_resetn_2[15] ;
+  assign \gpio_resetn_2_shifted[13]  = \gpio_resetn_2[14] ;
+  assign \gpio_resetn_2_shifted[12]  = \gpio_resetn_2[13] ;
+  assign \gpio_resetn_2_shifted[11]  = \gpio_resetn_2[12] ;
+  assign \gpio_resetn_2_shifted[10]  = \gpio_resetn_2[11] ;
+  assign \gpio_resetn_2_shifted[9]  = \gpio_resetn_2[10] ;
+  assign \gpio_resetn_2_shifted[8]  = \gpio_resetn_2[9] ;
+  assign \gpio_resetn_2_shifted[7]  = \gpio_resetn_2[8] ;
+  assign \gpio_resetn_2_shifted[6]  = \gpio_resetn_2[7] ;
+  assign \gpio_resetn_2_shifted[5]  = \gpio_resetn_2[6] ;
+  assign \gpio_resetn_2_shifted[4]  = \gpio_resetn_2[5] ;
+  assign \gpio_resetn_2_shifted[3]  = \gpio_resetn_2[4] ;
+  assign \gpio_resetn_2_shifted[2]  = \gpio_resetn_2[3] ;
+  assign \gpio_resetn_2_shifted[1]  = \gpio_resetn_2[2] ;
+  assign \gpio_resetn_2_shifted[0]  = \gpio_resetn_2[1] ;
+  assign \gpio_serial_link_1_shifted[18]  = \gpio_serial_link_1[17] ;
+  assign \gpio_serial_link_1_shifted[17]  = \gpio_serial_link_1[16] ;
+  assign \gpio_serial_link_1_shifted[16]  = \gpio_serial_link_1[15] ;
+  assign \gpio_serial_link_1_shifted[15]  = \gpio_serial_link_1[14] ;
+  assign \gpio_serial_link_1_shifted[14]  = \gpio_serial_link_1[13] ;
+  assign \gpio_serial_link_1_shifted[13]  = \gpio_serial_link_1[12] ;
+  assign \gpio_serial_link_1_shifted[12]  = \gpio_serial_link_1[11] ;
+  assign \gpio_serial_link_1_shifted[11]  = \gpio_serial_link_1[10] ;
+  assign \gpio_serial_link_1_shifted[10]  = \gpio_serial_link_1[9] ;
+  assign \gpio_serial_link_1_shifted[9]  = \gpio_serial_link_1[8] ;
+  assign \gpio_serial_link_1_shifted[8]  = \gpio_serial_link_1[7] ;
+  assign \gpio_serial_link_1_shifted[7]  = \gpio_serial_link_1[6] ;
+  assign \gpio_serial_link_1_shifted[6]  = \gpio_serial_link_1[5] ;
+  assign \gpio_serial_link_1_shifted[5]  = \gpio_serial_link_1[4] ;
+  assign \gpio_serial_link_1_shifted[4]  = \gpio_serial_link_1[3] ;
+  assign \gpio_serial_link_1_shifted[3]  = \gpio_serial_link_1[2] ;
+  assign \gpio_serial_link_1_shifted[2]  = \gpio_serial_link_1[1] ;
+  assign \gpio_serial_link_1_shifted[1]  = \gpio_serial_link_1[0] ;
+  assign \mgmt_io_out_hk[6]  = \mgmt_io_out[6] ;
+  assign \mgmt_io_out_hk[5]  = \mgmt_io_out[5] ;
+  assign \mgmt_io_out_hk[4]  = \mgmt_io_out[4] ;
+  assign \mgmt_io_out_hk[3]  = \mgmt_io_out[3] ;
+  assign \mgmt_io_out_hk[2]  = \mgmt_io_out[2] ;
+  assign \mgmt_io_out_hk[1]  = \mgmt_io_out[1] ;
+  assign \mgmt_io_out_hk[0]  = \mgmt_io_out[0] ;
   assign \gpio_load_1_shifted[18]  = \gpio_load_1[17] ;
   assign \gpio_load_1_shifted[17]  = \gpio_load_1[16] ;
   assign \gpio_load_1_shifted[16]  = \gpio_load_1[15] ;
@@ -5319,6 +5308,24 @@ module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vd
   assign \gpio_load_1_shifted[3]  = \gpio_load_1[2] ;
   assign \gpio_load_1_shifted[2]  = \gpio_load_1[1] ;
   assign \gpio_load_1_shifted[1]  = \gpio_load_1[0] ;
+  assign \gpio_clock_2_shifted[17]  = \gpio_clock_2[18] ;
+  assign \gpio_clock_2_shifted[16]  = \gpio_clock_2[17] ;
+  assign \gpio_clock_2_shifted[15]  = \gpio_clock_2[16] ;
+  assign \gpio_clock_2_shifted[14]  = \gpio_clock_2[15] ;
+  assign \gpio_clock_2_shifted[13]  = \gpio_clock_2[14] ;
+  assign \gpio_clock_2_shifted[12]  = \gpio_clock_2[13] ;
+  assign \gpio_clock_2_shifted[11]  = \gpio_clock_2[12] ;
+  assign \gpio_clock_2_shifted[10]  = \gpio_clock_2[11] ;
+  assign \gpio_clock_2_shifted[9]  = \gpio_clock_2[10] ;
+  assign \gpio_clock_2_shifted[8]  = \gpio_clock_2[9] ;
+  assign \gpio_clock_2_shifted[7]  = \gpio_clock_2[8] ;
+  assign \gpio_clock_2_shifted[6]  = \gpio_clock_2[7] ;
+  assign \gpio_clock_2_shifted[5]  = \gpio_clock_2[6] ;
+  assign \gpio_clock_2_shifted[4]  = \gpio_clock_2[5] ;
+  assign \gpio_clock_2_shifted[3]  = \gpio_clock_2[4] ;
+  assign \gpio_clock_2_shifted[2]  = \gpio_clock_2[3] ;
+  assign \gpio_clock_2_shifted[1]  = \gpio_clock_2[2] ;
+  assign \gpio_clock_2_shifted[0]  = \gpio_clock_2[1] ;
   assign \mgmt_io_in_hk[6]  = \mgmt_io_in[6] ;
   assign \mgmt_io_in_hk[5]  = \mgmt_io_in[5] ;
   assign \mgmt_io_in_hk[4]  = \mgmt_io_in[4] ;
@@ -5326,13 +5333,42 @@ module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vd
   assign \mgmt_io_in_hk[2]  = \mgmt_io_in[2] ;
   assign \mgmt_io_in_hk[1]  = \mgmt_io_in[1] ;
   assign \mgmt_io_in_hk[0]  = \mgmt_io_in[0] ;
-  assign \mgmt_io_out_hk[6]  = \mgmt_io_out[6] ;
+  assign \gpio_load_2_shifted[17]  = \gpio_load_2[18] ;
-  assign \mgmt_io_out_hk[5]  = \mgmt_io_out[5] ;
+  assign \gpio_load_2_shifted[16]  = \gpio_load_2[17] ;
-  assign \mgmt_io_out_hk[4]  = \mgmt_io_out[4] ;
+  assign \gpio_load_2_shifted[15]  = \gpio_load_2[16] ;
-  assign \mgmt_io_out_hk[3]  = \mgmt_io_out[3] ;
+  assign \gpio_load_2_shifted[14]  = \gpio_load_2[15] ;
-  assign \mgmt_io_out_hk[2]  = \mgmt_io_out[2] ;
+  assign \gpio_load_2_shifted[13]  = \gpio_load_2[14] ;
-  assign \mgmt_io_out_hk[1]  = \mgmt_io_out[1] ;
+  assign \gpio_load_2_shifted[12]  = \gpio_load_2[13] ;
-  assign \mgmt_io_out_hk[0]  = \mgmt_io_out[0] ;
+  assign \gpio_load_2_shifted[11]  = \gpio_load_2[12] ;
+  assign \gpio_load_2_shifted[10]  = \gpio_load_2[11] ;
+  assign \gpio_load_2_shifted[9]  = \gpio_load_2[10] ;
+  assign \gpio_load_2_shifted[8]  = \gpio_load_2[9] ;
+  assign \gpio_load_2_shifted[7]  = \gpio_load_2[8] ;
+  assign \gpio_load_2_shifted[6]  = \gpio_load_2[7] ;
+  assign \gpio_load_2_shifted[5]  = \gpio_load_2[6] ;
+  assign \gpio_load_2_shifted[4]  = \gpio_load_2[5] ;
+  assign \gpio_load_2_shifted[3]  = \gpio_load_2[4] ;
+  assign \gpio_load_2_shifted[2]  = \gpio_load_2[3] ;
+  assign \gpio_load_2_shifted[1]  = \gpio_load_2[2] ;
+  assign \gpio_load_2_shifted[0]  = \gpio_load_2[1] ;
+  assign \gpio_clock_1_shifted[18]  = \gpio_clock_1[17] ;
+  assign \gpio_clock_1_shifted[17]  = \gpio_clock_1[16] ;
+  assign \gpio_clock_1_shifted[16]  = \gpio_clock_1[15] ;
+  assign \gpio_clock_1_shifted[15]  = \gpio_clock_1[14] ;
+  assign \gpio_clock_1_shifted[14]  = \gpio_clock_1[13] ;
+  assign \gpio_clock_1_shifted[13]  = \gpio_clock_1[12] ;
+  assign \gpio_clock_1_shifted[12]  = \gpio_clock_1[11] ;
+  assign \gpio_clock_1_shifted[11]  = \gpio_clock_1[10] ;
+  assign \gpio_clock_1_shifted[10]  = \gpio_clock_1[9] ;
+  assign \gpio_clock_1_shifted[9]  = \gpio_clock_1[8] ;
+  assign \gpio_clock_1_shifted[8]  = \gpio_clock_1[7] ;
+  assign \gpio_clock_1_shifted[7]  = \gpio_clock_1[6] ;
+  assign \gpio_clock_1_shifted[6]  = \gpio_clock_1[5] ;
+  assign \gpio_clock_1_shifted[5]  = \gpio_clock_1[4] ;
+  assign \gpio_clock_1_shifted[4]  = \gpio_clock_1[3] ;
+  assign \gpio_clock_1_shifted[3]  = \gpio_clock_1[2] ;
+  assign \gpio_clock_1_shifted[2]  = \gpio_clock_1[1] ;
+  assign \gpio_clock_1_shifted[1]  = \gpio_clock_1[0] ;
   assign \mgmt_io_oeb_hk[34]  = \mgmt_io_oeb[34] ;
   assign \mgmt_io_oeb_hk[33]  = \mgmt_io_oeb[33] ;
   assign \mgmt_io_oeb_hk[32]  = \mgmt_io_oeb[32] ;
@@ -5368,66 +5404,30 @@ module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vd
   assign \mgmt_io_oeb_hk[2]  = \mgmt_io_oeb[2] ;
   assign \mgmt_io_oeb_hk[1]  = \mgmt_io_oeb[1] ;
   assign \mgmt_io_oeb_hk[0]  = \mgmt_io_oeb[0] ;
-  assign \gpio_load_2_shifted[17]  = \gpio_load_2[18] ;
-  assign \gpio_load_2_shifted[16]  = \gpio_load_2[17] ;
-  assign \gpio_load_2_shifted[15]  = \gpio_load_2[16] ;
-  assign \gpio_load_2_shifted[14]  = \gpio_load_2[15] ;
-  assign \gpio_load_2_shifted[13]  = \gpio_load_2[14] ;
-  assign \gpio_load_2_shifted[12]  = \gpio_load_2[13] ;
-  assign \gpio_load_2_shifted[11]  = \gpio_load_2[12] ;
-  assign \gpio_load_2_shifted[10]  = \gpio_load_2[11] ;
-  assign \gpio_load_2_shifted[9]  = \gpio_load_2[10] ;
-  assign \gpio_load_2_shifted[8]  = \gpio_load_2[9] ;
-  assign \gpio_load_2_shifted[7]  = \gpio_load_2[8] ;
-  assign \gpio_load_2_shifted[6]  = \gpio_load_2[7] ;
-  assign \gpio_load_2_shifted[5]  = \gpio_load_2[6] ;
-  assign \gpio_load_2_shifted[4]  = \gpio_load_2[5] ;
-  assign \gpio_load_2_shifted[3]  = \gpio_load_2[4] ;
-  assign \gpio_load_2_shifted[2]  = \gpio_load_2[3] ;
-  assign \gpio_load_2_shifted[1]  = \gpio_load_2[2] ;
-  assign \gpio_load_2_shifted[0]  = \gpio_load_2[1] ;
-  assign \gpio_resetn_1_shifted[18]  = \gpio_resetn_1[17] ;
-  assign \gpio_resetn_1_shifted[17]  = \gpio_resetn_1[16] ;
-  assign \gpio_resetn_1_shifted[16]  = \gpio_resetn_1[15] ;
-  assign \gpio_resetn_1_shifted[15]  = \gpio_resetn_1[14] ;
-  assign \gpio_resetn_1_shifted[14]  = \gpio_resetn_1[13] ;
-  assign \gpio_resetn_1_shifted[13]  = \gpio_resetn_1[12] ;
-  assign \gpio_resetn_1_shifted[12]  = \gpio_resetn_1[11] ;
-  assign \gpio_resetn_1_shifted[11]  = \gpio_resetn_1[10] ;
-  assign \gpio_resetn_1_shifted[10]  = \gpio_resetn_1[9] ;
-  assign \gpio_resetn_1_shifted[9]  = \gpio_resetn_1[8] ;
-  assign \gpio_resetn_1_shifted[8]  = \gpio_resetn_1[7] ;
   assign \gpio_resetn_1_shifted[7]  = \gpio_resetn_1[6] ;
-  assign \gpio_resetn_1_shifted[6]  = \gpio_resetn_1[5] ;
+  assign \gpio_resetn_1_shifted[8]  = \gpio_resetn_1[7] ;
   assign \gpio_resetn_1_shifted[5]  = \gpio_resetn_1[4] ;
+  assign \gpio_resetn_1_shifted[6]  = \gpio_resetn_1[5] ;
+  assign \gpio_resetn_1_shifted[1]  = \gpio_resetn_1[0] ;
   assign \gpio_resetn_1_shifted[4]  = \gpio_resetn_1[3] ;
   assign \gpio_resetn_1_shifted[3]  = \gpio_resetn_1[2] ;
-  assign \gpio_resetn_1_shifted[2]  = \gpio_resetn_1[1] ;
-  assign \gpio_resetn_1_shifted[1]  = \gpio_resetn_1[0] ;
-  assign \gpio_serial_link_1_shifted[18]  = \gpio_serial_link_1[17] ;
-  assign \gpio_serial_link_1_shifted[17]  = \gpio_serial_link_1[16] ;
-  assign \gpio_serial_link_1_shifted[16]  = \gpio_serial_link_1[15] ;
-  assign \gpio_serial_link_1_shifted[15]  = \gpio_serial_link_1[14] ;
-  assign \gpio_serial_link_1_shifted[14]  = \gpio_serial_link_1[13] ;
-  assign \gpio_serial_link_1_shifted[13]  = \gpio_serial_link_1[12] ;
-  assign \gpio_serial_link_1_shifted[12]  = \gpio_serial_link_1[11] ;
-  assign \gpio_serial_link_1_shifted[11]  = \gpio_serial_link_1[10] ;
-  assign \gpio_serial_link_1_shifted[10]  = \gpio_serial_link_1[9] ;
-  assign \gpio_serial_link_1_shifted[9]  = \gpio_serial_link_1[8] ;
-  assign \gpio_serial_link_1_shifted[8]  = \gpio_serial_link_1[7] ;
-  assign \gpio_serial_link_1_shifted[7]  = \gpio_serial_link_1[6] ;
-  assign \gpio_serial_link_1_shifted[6]  = \gpio_serial_link_1[5] ;
-  assign \gpio_serial_link_1_shifted[5]  = \gpio_serial_link_1[4] ;
-  assign \gpio_serial_link_1_shifted[4]  = \gpio_serial_link_1[3] ;
-  assign \gpio_serial_link_1_shifted[3]  = \gpio_serial_link_1[2] ;
-  assign \gpio_serial_link_1_shifted[2]  = \gpio_serial_link_1[1] ;
-  assign \gpio_serial_link_1_shifted[1]  = \gpio_serial_link_1[0] ;
   assign mprj_io_loader_data_2_buf = \gpio_serial_link_2_shifted[18] ;
   assign mprj_io_loader_resetn_buf = \gpio_resetn_2_shifted[18] ;
   assign mprj_io_loader_strobe_buf = \gpio_load_2_shifted[18] ;
   assign mprj_io_loader_clock_buf = \gpio_clock_2_shifted[18] ;
+  assign \gpio_resetn_1_shifted[13]  = \gpio_resetn_1[12] ;
   assign mprj_io_loader_data_1 = \gpio_serial_link_1_shifted[0] ;
   assign mprj_io_loader_strobe = \gpio_load_1_shifted[0] ;
   assign mprj_io_loader_clock = \gpio_clock_1_shifted[0] ;
   assign mprj_io_loader_resetn = \gpio_resetn_1_shifted[0] ;
+  assign \gpio_resetn_1_shifted[16]  = \gpio_resetn_1[15] ;
+  assign \gpio_resetn_1_shifted[9]  = \gpio_resetn_1[8] ;
+  assign \gpio_resetn_1_shifted[15]  = \gpio_resetn_1[14] ;
+  assign \gpio_resetn_1_shifted[17]  = \gpio_resetn_1[16] ;
+  assign \gpio_resetn_1_shifted[18]  = \gpio_resetn_1[17] ;
+  assign \gpio_resetn_1_shifted[12]  = \gpio_resetn_1[11] ;
+  assign \gpio_resetn_1_shifted[2]  = \gpio_resetn_1[1] ;
+  assign \gpio_resetn_1_shifted[11]  = \gpio_resetn_1[10] ;
+  assign \gpio_resetn_1_shifted[14]  = \gpio_resetn_1[13] ;
+  assign \gpio_resetn_1_shifted[10]  = \gpio_resetn_1[9] ;
 endmodule

verilog/rtl/caravel.v

@@ -1618,6 +1618,11 @@ module caravel (
 
     `ifdef TOP_ROUTING
     caravel_power_routing caravel_power_routing();
+    copyright_block copyright_block();
+    caravel_logo caravel_logo();
+    caravel_motto caravel_motto();
+    open_source open_source();
+    user_id_textblock user_id_textblock();
     `endif
 
 endmodule