mirror of https://github.com/efabless/caravel.git
update signoff scripts with:
- set the parasitics log file for each RC corner to be in the directory `./signoff/<design_name>/primetime-signoff/logs/` - flag if there is any error in reading a spef file - correct paths of `RAM256` and `RAM128` spef files - set PT message limit to 1500 instead of the default 100 - report SI bottleneck nets for any design
This commit is contained in:
Passant
parent
fd80ef4003
commit
a7e8d9d224
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@ -14,6 +14,8 @@ if {\
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vssd_lvc_clamped3_pad_tt_025C_1v80_3v30.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vccd_lvc_clamped3_pad_tt_025C_1v80_3v30_3v30.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vssd_lvc_clamped_pad_tt_025C_1v80_3v30.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vddio_hvc_clamped_pad_tt_025C_1v80_3v30_3v30.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vssio_hvc_clamped_pad_tt_025C_1v80_3v30_3v30.lib \
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"
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} elseif {$::env(PROC_CORNER) == "f"} {
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set link_path "* $::env(PT_LIB_ROOT)/scs130hd_ff_1.95v_-40C.lib \
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@ -27,10 +29,13 @@ if {\
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vssd_lvc_clamped3_pad_ff_n40C_1v95_5v50.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vccd_lvc_clamped3_pad_ff_n40C_1v95_5v50_5v50.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vssd_lvc_clamped_pad_ff_n40C_1v95_5v50.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vddio_hvc_clamped_pad_ff_n40C_1v95_5v50_5v50.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vssio_hvc_clamped_pad_ff_n40C_1v95_5v50_5v50.lib \
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"
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} elseif {$::env(PROC_CORNER) == "s"} {
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set link_path "* $::env(PT_LIB_ROOT)/scs130hd_ss_1.40v_100C.lib \
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$::env(PT_LIB_ROOT)/scs130hvl_ss_3.00v_100C.lib \
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$::env(PT_LIB_ROOT)/scs130hvl_ss_3.00v_lowhv_1.65v_lv_1.6v_150C.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_fd_io__top_xres4v2_ss_ss_100C_1v60_3v00.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ss_ss_100C_1v60_3v00.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vccd_lvc_clamped_pad_ss_100C_1v60_3v00_3v00.lib \
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@ -39,6 +44,8 @@ if {\
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vssd_lvc_clamped3_pad_ss_100C_1v60_3v00.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vccd_lvc_clamped3_pad_ss_100C_1v60_3v00_3v00.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vssd_lvc_clamped_pad_ss_100C_1v60_3v00.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vddio_hvc_clamped_pad_ss_100C_1v60_3v00_3v00.lib \
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$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lib/sky130_ef_io__vssio_hvc_clamped_pad_ss_100C_1v60_3v00_3v00.lib \
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"
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}
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@ -58,19 +65,19 @@ if {\
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read_sdc $::env(MCW_ROOT)/signoff/$::env(DESIGN)/$::env(DESIGN).sdc
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} else {
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read_sdc $::env(CARAVEL_ROOT)/signoff/$::env(DESIGN)/$::env(DESIGN).sdc
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}
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# -filter is supported by PT but not in the read_sdc
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# add max_tran constraint as the default max_tran of the ss hd SCL is 10 so the violations are not caught in ss corners
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# apply the constraint to hd cells at the ss corner on caravel/caravan
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if { $::env(DESIGN) == "caravel" | $::env(DESIGN) == "caravan" } {
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# apply the constraint to hd cells at the ss corner
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if { $::env(PROC_CORNER) == "s" } {
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set max_tran 1.5
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puts "\[INFO\]: Setting maximum transition of HD cells in slow process corner to: $max_tran"
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puts "For HD cells in the hierarchy of $::env(DESIGN)"
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set_max_transition $max_tran [get_pins -of_objects [get_cells -filter {ref_name=~sky130_fd_sc_hd*}]]
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set_max_transition $max_tran [get_pins -of_objects [get_cells */* -filter {ref_name=~sky130_fd_sc_hd*}]]
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set_max_transition $max_tran [get_pins -of_objects [get_cells */*/* -filter {ref_name=~sky130_fd_sc_hd*}]]
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}
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}
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}
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# Reading parasitics based on the RC corner specified
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proc read_spefs {design rc_corner} {
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@ -78,13 +85,13 @@ if {\
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foreach key [array names spef_mapping] {
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read_parasitics -keep_capacitive_coupling -path $key $spef_mapping($key)
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}
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# add -complete_with wlm to let PT complete incomplete RC networks at the top-level
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if {$design == "mgmt_core_wrapper" | $design == "RAM128" | $design == "RAM256"} {
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read_parasitics -keep_capacitive_coupling -verbose $::env(MCW_ROOT)/signoff/${design}/openlane-signoff/spef/${design}.${rc_corner}.spef -pin_cap_included
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read_parasitics -keep_capacitive_coupling -verbose $::env(MCW_ROOT)/signoff/${design}/openlane-signoff/spef/${design}.${rc_corner}.spef -complete_with wlm -pin_cap_included
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} else {
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read_parasitics -keep_capacitive_coupling -verbose $::env(CARAVEL_ROOT)/signoff/${design}/openlane-signoff/spef/${design}.${rc_corner}.spef -pin_cap_included
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read_parasitics -keep_capacitive_coupling -verbose $::env(CARAVEL_ROOT)/signoff/${design}/openlane-signoff/spef/${design}.${rc_corner}.spef -complete_with wlm -pin_cap_included
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}
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report_annotated_parasitics
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}
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proc report_results {design rc_corner proc_corner} {
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@ -93,47 +100,47 @@ if {\
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report_constraint -all_violators -significant_digits 4 -nosplit > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-all_viol.rpt
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report_timing -delay min -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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report_timing -unique_pins -delay min -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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-max_paths 10000 -nworst 10 -slack_lesser_than 10 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-min_timing.rpt
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report_timing -delay max -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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report_timing -unique_pins -delay max -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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-max_paths 10000 -nworst 10 -slack_lesser_than 10 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-max_timing.rpt
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report_si_bottleneck -significant_digits 4 -nosplit -slack_lesser_than 10 -all_nets > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-si_bottleneck.rpt
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if {$design == "caravel" | $design == "caravan"} {
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report_timing -delay min -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group clk \
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report_timing -unique_pins -delay min -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group clk \
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-max_paths 10000 -nworst 10 -slack_lesser_than 10 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-clk-min_timing.rpt
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report_timing -delay max -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group clk \
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report_timing -unique_pins -delay max -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group clk \
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-max_paths 10000 -nworst 10 -slack_lesser_than 10 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-clk-max_timing.rpt
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report_timing -delay min -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group hk_serial_clk \
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report_timing -unique_pins -delay min -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group hk_serial_clk \
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-max_paths 10000 -nworst 10 -slack_lesser_than 10 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-hk_serial_clk-min_timing.rpt
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report_timing -delay max -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group hk_serial_clk \
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report_timing -unique_pins -delay max -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group hk_serial_clk \
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-max_paths 10000 -nworst 10 -slack_lesser_than 10 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-hk_serial_clk-max_timing.rpt
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report_timing -delay max -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group hkspi_clk \
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report_timing -unique_pins -delay max -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group hkspi_clk \
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-max_paths 10000 -nworst 10 -slack_lesser_than 10 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-hkspi_clk-max_timing.rpt
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report_timing -delay min -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group hkspi_clk \
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report_timing -unique_pins -delay min -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit -group hkspi_clk \
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-max_paths 10000 -nworst 10 -slack_lesser_than 10 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-hkspi_clk-min_timing.rpt
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report_timing -delay min -through [get_cells soc] -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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report_timing -unique_pins -delay min -through [get_cells soc] -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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-max_paths 10000 -nworst 10 -slack_lesser_than 100 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-soc-min_timing.rpt
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report_timing -delay max -through [get_cells soc] -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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report_timing -unique_pins -delay max -through [get_cells soc] -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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-max_paths 10000 -nworst 10 -slack_lesser_than 100 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-soc-max_timing.rpt
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report_case_analysis -nosplit > $::env(OUT_DIR)/reports/${design}.case_analysis.rpt
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report_exceptions -nosplit > $::env(OUT_DIR)/reports/${design}.false_paths.rpt
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report_timing -delay min -through [get_cells mprj] -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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report_timing -unique_pins -delay min -through [get_cells mprj] -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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-max_paths 10000 -nworst 5 -slack_lesser_than 100 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-mprj-min_timing.rpt
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report_timing -delay max -through [get_cells mprj] -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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report_timing -unique_pins -delay max -through [get_cells mprj] -path_type full_clock_expanded -transition_time -capacitance -nets -crosstalk_delta -derate -nosplit \
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-max_paths 10000 -nworst 5 -slack_lesser_than 100 -significant_digits 4 -include_hierarchical_pins > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-mprj-max_timing.rpt
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report_si_bottleneck -significant_digits 4 -nosplit -slack_lesser_than 10 -all_nets > $::env(OUT_DIR)/reports/${rc_corner}/${design}.${proc_corner}${proc_corner}-si_bottleneck.rpt
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}
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write_sdf -version 3.0 -significant_digits 4 $::env(OUT_DIR)/sdf/${rc_corner}/${design}.${proc_corner}${proc_corner}.sdf
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@ -148,10 +155,13 @@ if {\
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set extract_model_use_conservative_current_slew true
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set extract_model_enable_report_delay_calculation true
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set extract_model_with_clock_latency_arcs true
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extract_model -output $::env(OUT_DIR)/lib/${rc_corner}/${design}.${proc_corner}${proc_corner} -format {db lib} -test_design
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extract_model -output $::env(OUT_DIR)/lib/${rc_corner}/${design}.${proc_corner}${proc_corner} -format {lib}
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}
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# set timing_report_unconstrained_paths TRUE
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set parasitics_log_file $::env(OUT_DIR)/logs/$::env(DESIGN)-$::env(RC_CORNER)-parasitics.log
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set si_enable_analysis TRUE
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# set si_enable_analysis FALSE
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set sh_message_limit 1500
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read_spefs $::env(DESIGN) $::env(RC_CORNER)
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update_timing
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report_results $::env(DESIGN) $::env(RC_CORNER) $::env(PROC_CORNER)
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@ -90,8 +90,11 @@ def run_sta (
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print(f"There are violations. check report: {output_dir}/reports/{rc_corner}/{design}.{proc_corner}{proc_corner}-all_viol.rpt")
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log.write(f"There are violations. check report: {output_dir}/reports/{rc_corner}/{design}.{proc_corner}{proc_corner}-all_viol.rpt")
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elif sta_pass == "no cons":
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print(f"Reading constraints SDC file failed. check log: {log_dir}/{design}-{rc_corner}-{proc_corner}-sta.log")
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log.write(f"Reading constraints SDC file failed. check log: {log_dir}/{design}-{rc_corner}-{proc_corner}-sta.log")
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print(f"Reading constraints SDC failed. check log: {log_dir}/{design}-{rc_corner}-{proc_corner}-sta.log")
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log.write(f"Reading constraints SDC failed. check log: {log_dir}/{design}-{rc_corner}-{proc_corner}-sta.log")
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elif sta_pass == "spef":
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print(f"Reading parasitics failed. check log: {log_dir}/{design}-{rc_corner}-parasitics.log")
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log.write(f"Reading parasitics failed. check log: {log_dir}/{design}-{rc_corner}-parasitics.log")
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else:
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print(f"Linking failed. check log: {log_dir}/{design}-{rc_corner}-{proc_corner}-sta.log")
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log.write(f"Linking failed. check log: {log_dir}/{design}-{rc_corner}-{proc_corner}-sta.log")
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@ -134,14 +137,27 @@ def check_env_vars():
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def search_viol(
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report_path: str
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):
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proc_corner = report_path[-12]
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rc_corner = os.path.basename(os.path.dirname(report_path))
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log_path = report_path.replace(f"/reports/{rc_corner}/", "/logs/")
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log_path = log_path.replace(f".{proc_corner}{proc_corner}-global.rpt", f"-{rc_corner}-{proc_corner}-sta.log")
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with open(log_path, 'r') as report:
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data = report.read()
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if "Could not auto-link design" in data:
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return "no link"
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elif "Error: Errors reading SDC file:" in data:
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return "no cons"
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log_path = log_path.replace(f"{proc_corner}-sta", f"parasitics")
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with open(log_path, 'r') as report:
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data = report.read()
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if "Error: Cannot open file" in data:
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return "spef"
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with open(report_path, 'r') as report:
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data = report.read()
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if "Setup violations" in data:
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return "setup"
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elif "Hold violations" in data:
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if "Hold violations" in data:
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return "hold"
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elif "Could not auto-link design" in data:
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return "no link"
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elif "Setup violations" in data:
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return "setup"
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report_path = report_path.replace("global", "all_viol")
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with open(report_path, 'r') as report:
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data = report.read()
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@ -153,11 +169,6 @@ def search_viol(
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return "max_cap"
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elif "VIOLATED" in data:
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return "viol"
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report_path = report_path.replace("all_viol", "min_timing")
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with open(report_path, 'r') as report:
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data = report.read()
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if "No constrained paths" in data:
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return "no cons"
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else:
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return "pass"
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@ -260,21 +260,26 @@ def check_errors(
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logging.info(f"{log_name} STA: Passed")
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f.write(f"{log_name} STA: Passed\n")
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elif "max_transition and max_capacitance" in lines[-1]:
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logging.info(lines[-1])
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logging.warning(lines[-1])
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logging.info(f"{log_name} STA: Passed (except: max_tran & max_cap)")
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f.write(f"{log_name} STA: Passed (except: max_tran & max_cap)\n")
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elif "max_transition" in lines[-1]:
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logging.info(lines[-1])
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logging.warning(lines[-1])
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logging.info(f"{log_name} STA: Passed (except: max_tran)")
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f.write(f"{log_name} STA: Passed (except: max_tran)\n")
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elif "max_capacitance" in lines[-1]:
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logging.info(lines[-1])
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logging.warning(lines[-1])
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logging.info(f"{log_name} STA: Passed (except: max_cap)")
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f.write(f"{log_name} STA: Passed (except: max_cap)\n")
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else:
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logging.error(lines[-1])
|
||||
logging.error(f"{log_name} STA: Failed")
|
||||
f.write(f"{log_name} STA: Failed\n")
|
||||
if "setup" in lines[-1]:
|
||||
f.write(f"{log_name} STA: Failed (setup)\n")
|
||||
elif "hold" in lines[-1]:
|
||||
f.write(f"{log_name} STA: Failed (hold)\n")
|
||||
else:
|
||||
f.write(f"{log_name} STA: Failed (" + lines[-1].split(" failed")[0] + ")\n")
|
||||
|
||||
if antenna:
|
||||
antenna_report = os.path.join(signoff_dir, f"{design}/standalone_pvr/antenna-vios.report")
|
||||
|
|
|
|||
|
|
@ -8,15 +8,15 @@ if {$design == "caravel" | $design == "caravan"} {
|
|||
}
|
||||
|
||||
# add spefs of modules instantiated in user_project_wrapper/user_analog_project_wrapper here
|
||||
set spef_mapping(mprj/mprj) $::env(UPRJ_ROOT)/signoff/user_project_example/openlane-signoff/spef/user_project_example.${rc_corner}.spef
|
||||
set spef_mapping(mprj/mprj) $::env(UPRJ_ROOT)/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.${rc_corner}.spef
|
||||
|
||||
#caravel/caravan macros
|
||||
set spef_mapping(flash_clkrst_buffers) $::env(CARAVEL_ROOT)/signoff/buff_flash_clkrst/openlane-signoff/buff_flash_clkrst.${rc_corner}.spef
|
||||
set spef_mapping(rstb_level) $::env(CARAVEL_ROOT)/signoff/xres_buf/openlane-signoff/xres_buf.${rc_corner}.spef
|
||||
set spef_mapping(flash_clkrst_buffers) $::env(CARAVEL_ROOT)/signoff/buff_flash_clkrst/openlane-signoff/spef/buff_flash_clkrst.${rc_corner}.spef
|
||||
set spef_mapping(rstb_level) $::env(CARAVEL_ROOT)/signoff/xres_buf/openlane-signoff/spef/xres_buf.${rc_corner}.spef
|
||||
|
||||
set spef_mapping(padframe) $::env(CARAVEL_ROOT)/signoff/chip_io/chip_io.${rc_corner}.spef
|
||||
set spef_mapping(padframe) $::env(CARAVEL_ROOT)/signoff/chip_io/openlane-signoff/spef/chip_io.${rc_corner}.spef
|
||||
if {$design == "caravan"} {
|
||||
set spef_mapping(padframe) $::env(CARAVEL_ROOT)/signoff/chip_io_alt/chip_io_alt.${rc_corner}.spef
|
||||
set spef_mapping(padframe) $::env(CARAVEL_ROOT)/signoff/chip_io_alt/openlane-signoff/spef/chip_io_alt.${rc_corner}.spef
|
||||
}
|
||||
set spef_mapping(padframe/\constant_value_inst[0]) $::env(CARAVEL_ROOT)/signoff/constant_block/openlane-signoff/spef/constant_block.${rc_corner}.spef
|
||||
set spef_mapping(padframe/\constant_value_inst[1]) $::env(CARAVEL_ROOT)/signoff/constant_block/openlane-signoff/spef/constant_block.${rc_corner}.spef
|
||||
|
|
@ -40,8 +40,8 @@ if {$design == "caravel" | $design == "caravan"} {
|
|||
set spef_mapping(mgmt_buffers/mprj2_logic_high_inst) $::env(CARAVEL_ROOT)/signoff/mprj2_logic_high/openlane-signoff/spef/mprj2_logic_high.${rc_corner}.spef
|
||||
|
||||
set spef_mapping(soc) $::env(MCW_ROOT)/signoff/mgmt_core_wrapper/openlane-signoff/spef/mgmt_core_wrapper.${rc_corner}.spef
|
||||
set spef_mapping(soc/\core.RAM256) $::env(MCW_ROOT)/signoff/RAM256/spef/openlane-signoff/spef/RAM256.${rc_corner}.spef
|
||||
set spef_mapping(soc/\core.RAM128) $::env(MCW_ROOT)/signoff/RAM128/spef/openlane-signoff/spef/RAM128.${rc_corner}.spef
|
||||
set spef_mapping(soc/\core.RAM256) $::env(MCW_ROOT)/signoff/RAM256/openlane-signoff/spef/RAM256.${rc_corner}.spef
|
||||
set spef_mapping(soc/\core.RAM128) $::env(MCW_ROOT)/signoff/RAM128/openlane-signoff/spef/RAM128.${rc_corner}.spef
|
||||
|
||||
set spef_mapping(\gpio_control_bidir_1[0]) $::env(CARAVEL_ROOT)/signoff/gpio_control_block/openlane-signoff/spef/gpio_control_block.${rc_corner}.spef
|
||||
set spef_mapping(\gpio_control_bidir_1[1]) $::env(CARAVEL_ROOT)/signoff/gpio_control_block/openlane-signoff/spef/gpio_control_block.${rc_corner}.spef
|
||||
|
|
@ -160,9 +160,11 @@ if {$design == "caravel" | $design == "caravan"} {
|
|||
set spef_mapping(gpio_defaults_block_8) $::env(CARAVEL_ROOT)/signoff/gpio_defaults_block_0403/openlane-signoff/spef/gpio_defaults_block_0403.${rc_corner}.spef
|
||||
set spef_mapping(gpio_defaults_block_9) $::env(CARAVEL_ROOT)/signoff/gpio_defaults_block_0403/openlane-signoff/spef/gpio_defaults_block_0403.${rc_corner}.spef
|
||||
|
||||
set spef_mapping(sigbuf) $::env(CARAVEL_ROOT)/signoff/gpio_signal_buffering/openlane-signoff/spef/gpio_signal_buffering.${rc_corner}.spef
|
||||
|
||||
} elseif {$design == "mgmt_core_wrapper"} {
|
||||
set spef_mapping(\core.RAM128) $::env(MCW_ROOT)/signoff/RAM128/openlane-signoff/spef/RAM128.${rc_corner}.spef
|
||||
set spef_mapping(\core.RAM256) $::env(MCW_ROOT)/signoff/RAM512/openlane-signoff/spef/RAM512.${rc_corner}.spef
|
||||
set spef_mapping(\core.RAM256) $::env(MCW_ROOT)/signoff/RAM256/openlane-signoff/spef/RAM256.${rc_corner}.spef
|
||||
} elseif {$design == "gpio_control_block"} {
|
||||
set spef_mapping(gpio_logic_high) $::env(CARAVEL_ROOT)/signoff/gpio_logic_high/openlane-signoff/spef/gpio_logic_high.${rc_corner}.spef
|
||||
} elseif {$design == "mgmt_protect"} {
|
||||
|
|
@ -170,3 +172,4 @@ if {$design == "caravel" | $design == "caravan"} {
|
|||
set spef_mapping(mprj_logic_high_inst) $::env(CARAVEL_ROOT)/signoff/mprj_logic_high/openlane-signoff/spef/mprj_logic_high.${rc_corner}.spef
|
||||
set spef_mapping(mprj2_logic_high_inst) $::env(CARAVEL_ROOT)/signoff/mprj2_logic_high/openlane-signoff/spef/mprj2_logic_high.${rc_corner}.spef
|
||||
}
|
||||
puts "\[INFO\]: Spef mapping done"
|
||||
Loading…
Reference in New Issue