From a572a8ec143512eee1a71ce6d84030517d2f2858 Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Mon, 10 Oct 2022 09:07:32 -0700 Subject: [PATCH] add gpio_all_i_user test --- verilog/dv/cocotb/tests.json | 6 ++ verilog/dv/cocotb/tests/gpio/gpio_all_i.c | 2 +- .../dv/cocotb/tests/gpio/gpio_all_i_user.c | 89 +++++++++++++++++++ verilog/dv/cocotb/tests/gpio/gpio_user.py | 82 +++++++++++++++++ verilog/dv/cocotb/verify_cocotb.py | 4 +- 5 files changed, 180 insertions(+), 3 deletions(-) create mode 100644 verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c diff --git a/verilog/dv/cocotb/tests.json b/verilog/dv/cocotb/tests.json index 308efdf4..2d145d85 100644 --- a/verilog/dv/cocotb/tests.json +++ b/verilog/dv/cocotb/tests.json @@ -33,6 +33,12 @@ "GL":["r_gl","push_gl","nightly","weekly","tape_out"], "GL_SDF":["r_sdf","weekly","tape_out"], "description":"configure all gpios as mgmt input using automatic approach firmware and check them"} + ,"gpio_all_i_user" :{"level":0, + "SW":true, + "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], + "GL":["r_gl","push_gl","nightly","weekly","tape_out"], + "GL_SDF":["r_sdf","weekly","tape_out"], + "description":"configure all gpios as user input using automatic approach firmware and check them"} ,"gpio_all_i_pu" :{"level":0, "SW":true, "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i.c index ff2bb319..dadfaf80 100644 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_i.c +++ b/verilog/dv/cocotb/tests/gpio/gpio_all_i.c @@ -79,7 +79,7 @@ void main(){ reg_debug_1 = 0XD5; // for delay insertion for release // trying to inject error by sending data to gpio by firmware where gpios configured as input reg_mprj_datal = 0x5AE1FFB8; // random number - reg_mprj_datah = 0x5AE1FFB8; // random number + reg_mprj_datah = 0x1E; // random number reg_debug_2 = 0xFF; } diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c new file mode 100644 index 00000000..8d76a09b --- /dev/null +++ b/verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c @@ -0,0 +1,89 @@ +#include +#include +#include "../bitbang/bitbang_functions.c" + +#define reg_mprj_userl (*(volatile uint32_t*)0x300FFFF0) +#define reg_mprj_userh (*(volatile uint32_t*)0x300FFFF4) + +void main(){ + unsigned int i, j, k; + reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 + reg_debug_1 = 0x0; + reg_debug_2 = 0x0; + reg_hkspi_disable = 1; + reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_35 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_28 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_23 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_11 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL; + + reg_mprj_xfer = 1; + while (reg_mprj_xfer == 1); + + reg_debug_1 = 0XAA; // configuration done wait environment to send 0xFFFFFFFF to reg_mprj_userl + while (reg_mprj_userl != 0xFFFFFFFF); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XBB; // configuration done wait environment to send 0xAAAAAAAA to reg_mprj_userl + while (reg_mprj_userl != 0xAAAAAAAA); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XCC; // configuration done wait environment to send 0x55555555 to reg_mprj_userl + while (reg_mprj_userl != 0x55555555); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XDD; // configuration done wait environment to send 0x0 to reg_mprj_userl + while (reg_mprj_userl != 0x0); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XD1; + while (reg_mprj_userh != 0x3F); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD2; + while (reg_mprj_userh != 0x0); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD3; + while (reg_mprj_userh != 0x15); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD4; + while (reg_mprj_userh != 0x2A); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD5; + reg_debug_1 = 0XD5; // for delay insertion for release + // trying to inject error by sending data to gpio by firmware where gpios configured as input + reg_mprj_userl = 0x5AE1FFB8; // random number + reg_mprj_userh = 0x1E; // random number + + reg_debug_2 = 0xFF; +} + diff --git a/verilog/dv/cocotb/tests/gpio/gpio_user.py b/verilog/dv/cocotb/tests/gpio/gpio_user.py index f8169e49..e50f2574 100644 --- a/verilog/dv/cocotb/tests/gpio/gpio_user.py +++ b/verilog/dv/cocotb/tests/gpio/gpio_user.py @@ -67,3 +67,85 @@ async def gpio_all_o_user(dut): await ClockCycles(caravelEnv.clk, 10) + + +@cocotb.test() +@repot_test +async def gpio_all_i_user(dut): + caravelEnv,clock = await test_configure(dut,timeout_cycles=56694) + cpu = RiskV(dut) + cpu.cpu_force_reset() + cpu.cpu_release_reset() + await wait_reg1(cpu,caravelEnv,0xAA) + cocotb.log.info(f"[TEST] configuration finished") + data_in = 0xFFFFFFFF + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xBB) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xAAAAAAAA + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xCC) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x55555555 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xDD) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x0 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xD1) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x3F + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD2) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x0 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD3) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x15 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD4) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x2A + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0XD5) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + caravelEnv.release_gpio((37,0)) + await wait_reg2(cpu,caravelEnv,0XFF) + if caravelEnv.monitor_gpio((37,0)).binstr != "zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz": + cocotb.log.error(f"[TEST] ERROR: firmware can write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") + else: + cocotb.log.info(f"[TEST] [TEST] PASS: firmware cannot write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") + cocotb.log.info(f"[TEST] finish") diff --git a/verilog/dv/cocotb/verify_cocotb.py b/verilog/dv/cocotb/verify_cocotb.py index 71c5958b..21737e68 100755 --- a/verilog/dv/cocotb/verify_cocotb.py +++ b/verilog/dv/cocotb/verify_cocotb.py @@ -75,7 +75,7 @@ class RunTest: os.system(f"docker run -it {env_vars} -v {os.getenv('CARAVEL_ROOT')}:{os.getenv('CARAVEL_ROOT')} -v {os.getenv('MCW_ROOT')}:{os.getenv('MCW_ROOT')} -v {os.getenv('PDK_ROOT')}:{os.getenv('PDK_ROOT')} efabless/dv:cocotb sh -c 'cd {self.cocotb_path} && {command}'") self.passed = search_str(self.full_terminal.name,"Test passed with (0)criticals (0)errors") Path(f'{self.sim_path}/{self.passed}').touch() - + # vcs function def runTest_vcs(self): print(f"Start running test: {self.sim_type}-{self.test_name}") @@ -91,7 +91,7 @@ class RunTest: macros = f'+define+FUNCTIONAL +define+USE_POWER_PINS +define+UNIT_DELAY=#1 +define+MAIN_PATH=\\\"{self.cocotb_path}\\\" +define+VCS ' if self.test_name == "la": macros = f'{macros} +define+LA_TESTING' - if self.test_name == "gpio_all_o_user": + if self.test_name in ["gpio_all_o_user","gpio_all_i_user"]: macros = f'{macros} +define+GPIO_TESTING' # shutil.copyfile(f'{self.test_full_dir}/{self.test_name}.hex',f'{self.sim_path}/{self.test_name}.hex') # if os.path.exists(f'{self.test_full_dir}/test_data'):