mirror of https://github.com/efabless/caravel.git
Added a testbench that demonstrates copying a portion of a program in
flash into SRAM and executing it.
This commit is contained in:
Tim Edwards
parent
11fe006532
commit
a360b77618
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@ -19,7 +19,7 @@
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.SUFFIXES:
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.SILENT: clean all
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PATTERNS = gpio_mgmt gpio mem uart perf hkspi sysctrl mprj_ctrl mprj_bitbang pass_thru timer timer2 pll storage qspi caravan irq user_pass_thru spi_master
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PATTERNS = gpio_mgmt gpio mem uart perf hkspi sysctrl mprj_ctrl mprj_bitbang pass_thru timer timer2 pll storage qspi caravan irq user_pass_thru spi_master sram_exec
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all: ${PATTERNS}
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for i in ${PATTERNS}; do \
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@ -0,0 +1,86 @@
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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PDK_PATH = $(PDK_ROOT)/sky130A
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VERILOG_PATH = ../../../..
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RTL_PATH = $(VERILOG_PATH)/rtl
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BEHAVIOURAL_MODELS = ../../
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# Temporary: Path to management SoC wrapper repository
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MGMT_WRAPPER_PATH = ~/gits/caravel_pico/verilog/rtl
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FIRMWARE_PATH = ../..
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GCC_PATH?=/ef/apps/bin
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GCC_PREFIX?=riscv32-unknown-elf
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SIM_DEFINES = -DFUNCTIONAL -DSIM
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SIM?=RTL
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.SUFFIXES:
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PATTERN = sram_exec
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all: ${PATTERN:=.vcd}
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hex: ${PATTERN:=.hex}
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%.vvp: %_tb.v %.hex
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ifeq ($(SIM),RTL)
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iverilog -Ttyp $(SIM_DEFINES) -I $(BEHAVIOURAL_MODELS) \
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-I $(PDK_PATH) -I $(RTL_PATH) -I $(MGMT_WRAPPER_PATH) \
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$< -o $@
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else
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iverilog -Ttyp $(SIM_DEFINES) -DGL -I $(BEHAVIOURAL_MODELS) \
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-I $(PDK_PATH) -I $(VERILOG_PATH) -I $(RTL_PATH) \
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$< -o $@
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endif
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%.vcd: %.vvp
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vvp $<
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%.elf: %.c $(FIRMWARE_PATH)/sections.lds $(FIRMWARE_PATH)/start.s check-env
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${GCC_PATH}/${GCC_PREFIX}-gcc -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(FIRMWARE_PATH)/start.s $<
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%.hex: %.elf
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${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
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# to fix flash base address
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sed -i 's/@10000000/@00000000/g' $@
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%.bin: %.elf
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${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@
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check-env:
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ifndef PDK_ROOT
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$(error PDK_ROOT is undefined, please export it before running make)
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endif
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ifeq (,$(wildcard $(PDK_ROOT)/sky130A))
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$(error $(PDK_ROOT)/sky130A not found, please install pdk before running make)
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endif
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ifeq (,$(wildcard $(GCC_PATH)/$(GCC_PREFIX)-gcc ))
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$(error $(GCC_PATH)/$(GCC_PREFIX)-gcc is not found, please export GCC_PATH and GCC_PREFIX before running make)
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endif
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# check for efabless style installation
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ifeq (,$(wildcard $(PDK_ROOT)/sky130A/libs.ref/*/verilog))
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SIM_DEFINES := ${SIM_DEFINES} -DEF_STYLE
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endif
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# ---- Clean ----
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clean:
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rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
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.PHONY: clean hex all
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@ -0,0 +1,24 @@
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<!---
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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-->
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------------------------------------------------
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Caravel
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sram_exec testbench
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------------------------------------------------
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This testbench demonstrates how to copy a portion of a program from
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flash memory into SRAM and to run it from there.
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@ -0,0 +1,76 @@
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/*
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* SPDX-FileCopyrightText: 2020 Efabless Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "../../defs.h"
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// -------------------------------------------------------------------------
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// Test copying code into SRAM and running it from there.
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// -------------------------------------------------------------------------
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void test_function()
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{
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int i;
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reg_mprj_datah = 0xa; // Signal middle of test
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for (i = 0; i < 10; i++) {
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reg_mprj_datal = i << 16;
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}
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return;
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}
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void main()
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{
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// uint32_t func[&test_routine_end - &test_routine_begin];
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// uint32_t *src_ptr;
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uint16_t func[&main - &test_function];
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uint16_t *src_ptr;
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uint16_t *dst_ptr;
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// Copy test routine from flash into SRAM
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// Configure GPIO upper bits to assert the test code
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reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT;
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reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT;
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reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT;
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reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT;
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reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT;
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reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT;
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reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT;
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reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT;
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/* Apply the GPIO configuration */
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reg_mprj_xfer = 1;
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while (reg_mprj_xfer == 1);
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reg_mprj_datah = 0x5; // Signal start of test
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reg_mprj_datal = 0;
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// src_ptr = &test_routine_begin;
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src_ptr = &test_function;
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dst_ptr = func;
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// while (src_ptr != &test_routine_end)
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while (src_ptr != &main)
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*(dst_ptr++) = *(src_ptr++);
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// Call the routine in SRAM
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((void(*)())func)();
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reg_mprj_datal = 0x40000;
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reg_mprj_datah = 0xc; // Signal end of test
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}
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@ -0,0 +1,177 @@
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`default_nettype none
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/*
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* SPDX-FileCopyrightText: 2017 Clifford Wolf, 2018 Tim Edwards
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*
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* Caravel - A full example SoC using PicoRV32 in SkyWater sky130
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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* Copyright (C) 2021 Tim Edwards <tim@efabless.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* SPDX-License-Identifier: ISC
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*/
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`timescale 1 ns / 1 ps
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`include "__uprj_netlists.v"
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`include "caravel_netlists.v"
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`include "spiflash.v"
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module sram_exec_tb;
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reg clock;
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reg power1;
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reg power2;
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always #10 clock <= (clock === 1'b0);
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initial begin
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clock <= 0;
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end
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initial begin
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$dumpfile("sram_exec.vcd");
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$dumpvars(0, sram_exec_tb);
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// Repeat cycles of 1000 clock edges as needed to complete testbench
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repeat (60) begin
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repeat (1000) @(posedge clock);
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$display("+1000 cycles");
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end
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$display("%c[1;31m",27);
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`ifdef GL
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$display ("Monitor: Timeout, Test SRAM exec (GL) Failed");
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`else
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$display ("Monitor: Timeout, Test SRAM exec (RTL) Failed");
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`endif
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$display("%c[0m",27);
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$finish;
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end
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wire [37:0] mprj_io; // Most of these are no-connects
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wire [3:0] status;
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wire [3:0] checkbits;
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assign checkbits = mprj_io[19:16];
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assign status = mprj_io[35:32];
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assign mprj_io[3] = 1'b1; // Force CSB high.
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wire flash_csb;
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wire flash_clk;
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wire flash_io0;
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wire flash_io1;
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wire gpio;
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reg RSTB;
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// Monitor
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initial begin
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wait(status == 4'h5);
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`ifdef GL
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$display("Monitor: Test SRAM exec (GL) Started");
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`else
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$display("Monitor: Test SRAM exec (RTL) Started");
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`endif
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wait(status == 4'ha);
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`ifdef GL
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$display("Monitor: Test SRAM exec (GL) called SRAM routine");
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`else
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$display("Monitor: Test SRAM exec (RTL) called SRAM routine");
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`endif
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wait(status == 4'hc);
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`ifdef GL
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$display("Monitor: Test SRAM exec (GL) Passed");
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`else
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$display("Monitor: Test SRAM exec (RTL) Passed");
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`endif
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$finish;
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end
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initial begin
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RSTB <= 1'b0;
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#1000;
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RSTB <= 1'b1; // Release reset
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#2000;
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end
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initial begin // Power-up
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power1 <= 1'b0;
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power2 <= 1'b0;
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#200;
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power1 <= 1'b1;
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#200;
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power2 <= 1'b1;
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end
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always @(checkbits, status) begin
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#1 $display("GPIO state = %b (%b)", checkbits, status);
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end
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wire VDD3V3;
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wire VDD1V8;
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wire VSS;
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assign VDD3V3 = power1;
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assign VDD1V8 = power2;
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assign VSS = 1'b0;
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// These are the mappings of mprj_io GPIO pads that are set to
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// specific functions on startup:
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//
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// JTAG = mgmt_gpio_io[0] (inout)
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// SDO = mgmt_gpio_io[1] (output)
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// SDI = mgmt_gpio_io[2] (input)
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// CSB = mgmt_gpio_io[3] (input)
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// SCK = mgmt_gpio_io[4] (input)
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// ser_rx = mgmt_gpio_io[5] (input)
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// ser_tx = mgmt_gpio_io[6] (output)
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// irq = mgmt_gpio_io[7] (input)
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caravel uut (
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.vddio (VDD3V3),
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.vssio (VSS),
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.vdda (VDD3V3),
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.vssa (VSS),
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.vccd (VDD1V8),
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.vssd (VSS),
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.vdda1 (VDD3V3),
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.vdda2 (VDD3V3),
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.vssa1 (VSS),
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.vssa2 (VSS),
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.vccd1 (VDD1V8),
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.vccd2 (VDD1V8),
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.vssd1 (VSS),
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.vssd2 (VSS),
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.clock (clock),
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.gpio (gpio),
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.mprj_io (mprj_io),
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.flash_csb(flash_csb),
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.flash_clk(flash_clk),
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.flash_io0(flash_io0),
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.flash_io1(flash_io1),
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.resetb (RSTB)
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);
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spiflash #(
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.FILENAME("sram_exec.hex")
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) spiflash (
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.csb(flash_csb),
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.clk(flash_clk),
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.io0(flash_io0),
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.io1(flash_io1),
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.io2(), // not used
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.io3() // not used
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);
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endmodule
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