mirror of https://github.com/efabless/caravel.git
issue-105: caravel & caravan.mag: relabel top-level v*_core power nets (label PLUS underlying met5); (#110)
tweak blackbox lvs scripts for very fast extract; update spi/lvs/*.spice. The .spice (once propagated to caravel-lite AND caravel-lite embed in mpw_precheck docker) will pass the consistency check. Co-authored-by: Risto Bell <rb@efabless.com>
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@ -58900,6 +58900,16 @@ rect 460640 6598 473160 19088
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rect 515440 6598 527960 19088
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rect 515440 6598 527960 19088
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rect 570422 6811 582590 18975
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rect 570422 6811 582590 18975
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rect 624222 6811 636390 18975
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rect 624222 6811 636390 18975
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rect 621960 246802 629984 249230
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rect 621948 250708 629990 253036
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rect 621550 262640 629508 265144
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rect 621514 266692 629472 269196
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rect 590480 230750 595228 233134
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rect 590522 234770 595540 236910
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rect 621512 258708 630212 261250
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rect 621598 254668 630298 257210
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rect 621936 242776 630636 245318
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rect 621794 238736 630494 241278
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use caravan_logo caravan_logo_0
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use caravan_logo caravan_logo_0
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timestamp 1636751500
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timestamp 1636751500
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transform 1 0 255684 0 1 5594
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transform 1 0 255684 0 1 5594
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@ -59327,6 +59337,16 @@ flabel metal5 s 6167 70054 19619 80934 0 FreeSans 25000 0 0 0 vccd
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port 61 nsew signal bidirectional
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port 61 nsew signal bidirectional
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flabel metal5 s 243266 6167 254146 19619 0 FreeSans 25000 0 0 0 vssd
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flabel metal5 s 243266 6167 254146 19619 0 FreeSans 25000 0 0 0 vssd
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port 62 nsew signal bidirectional
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port 62 nsew signal bidirectional
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flabel metal5 s 621960 246802 629984 249230 0 FreeSans 16000 0 0 0 vccd1_core
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flabel metal5 s 621948 250708 629990 253036 0 FreeSans 16000 0 0 0 vssd1_core
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flabel metal5 s 621550 262640 629508 265144 0 FreeSans 16000 0 0 0 vdda1_core
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flabel metal5 s 621514 266692 629472 269196 0 FreeSans 16000 0 0 0 vssa1_core
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flabel metal5 s 590480 230750 595228 233134 0 FreeSans 16000 0 0 0 vccd_core
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flabel metal5 s 590522 234770 595540 236910 0 FreeSans 16000 0 0 0 vssd_core
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flabel metal5 s 621512 258708 630212 261250 0 FreeSans 16000 0 0 0 vssa2_core
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flabel metal5 s 621598 254668 630298 257210 0 FreeSans 16000 0 0 0 vdda2_core
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flabel metal5 s 621936 242776 630636 245318 0 FreeSans 16000 0 0 0 vssd2_core
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flabel metal5 s 621794 238736 630494 241278 0 FreeSans 16000 0 0 0 vccd2_core
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<< properties >>
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<< properties >>
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string FIXED_BBOX 0 0 717600 1037600
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string FIXED_BBOX 0 0 717600 1037600
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<< end >>
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<< end >>
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@ -73700,6 +73700,16 @@ rect 460640 6598 473160 19088
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rect 515440 6598 527960 19088
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rect 515440 6598 527960 19088
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rect 570422 6811 582590 18976
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rect 570422 6811 582590 18976
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rect 624222 6811 636390 18976
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rect 624222 6811 636390 18976
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rect 621960 246802 629984 249230
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rect 621948 250708 629990 253036
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rect 621550 262640 629508 265144
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rect 621514 266692 629472 269196
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rect 590480 230750 595228 233134
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rect 590522 234770 595540 236910
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rect 621512 258708 630212 261250
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rect 621598 254668 630298 257210
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rect 621936 242776 630636 245318
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rect 621794 238736 630494 241278
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use caravel_logo caravel_logo_0
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use caravel_logo caravel_logo_0
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timestamp 1638586901
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timestamp 1638586901
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transform 1 0 269006 0 1 5020
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transform 1 0 269006 0 1 5020
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@ -74211,6 +74221,16 @@ flabel metal5 s 570422 6811 582590 18976 0 FreeSans 25000 0 0 0 vssio
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port 61 nsew signal bidirectional
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port 61 nsew signal bidirectional
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flabel metal5 s 334810 1018624 346978 1030789 0 FreeSans 25000 0 0 0 vssio_2
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flabel metal5 s 334810 1018624 346978 1030789 0 FreeSans 25000 0 0 0 vssio_2
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port 62 nsew signal bidirectional
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port 62 nsew signal bidirectional
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flabel metal5 s 621960 246802 629984 249230 0 FreeSans 16000 0 0 0 vccd1_core
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flabel metal5 s 621948 250708 629990 253036 0 FreeSans 16000 0 0 0 vssd1_core
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flabel metal5 s 621550 262640 629508 265144 0 FreeSans 16000 0 0 0 vdda1_core
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flabel metal5 s 621514 266692 629472 269196 0 FreeSans 16000 0 0 0 vssa1_core
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flabel metal5 s 590480 230750 595228 233134 0 FreeSans 16000 0 0 0 vccd_core
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flabel metal5 s 590522 234770 595540 236910 0 FreeSans 16000 0 0 0 vssd_core
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flabel metal5 s 621512 258708 630212 261250 0 FreeSans 16000 0 0 0 vssa2_core
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flabel metal5 s 621598 254668 630298 257210 0 FreeSans 16000 0 0 0 vdda2_core
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flabel metal5 s 621936 242776 630636 245318 0 FreeSans 16000 0 0 0 vssd2_core
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flabel metal5 s 621794 238736 630494 241278 0 FreeSans 16000 0 0 0 vccd2_core
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<< properties >>
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<< properties >>
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string FIXED_BBOX 0 0 717600 1037600
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string FIXED_BBOX 0 0 717600 1037600
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<< end >>
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<< end >>
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@ -13,6 +13,7 @@ crashbackups stop
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load caravan
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load caravan
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select top cell
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select top cell
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expand
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expand
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extract no all ;# <-- large speed-up
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extract do local
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extract do local
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extract all
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extract all
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ext2spice lvs
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ext2spice lvs
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@ -24,6 +25,7 @@ export NETGEN_COLUMNS=60
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netgen -batch lvs "caravan.spice caravan" "../verilog/gl/caravan.v caravan" \
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netgen -batch lvs "caravan.spice caravan" "../verilog/gl/caravan.v caravan" \
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$PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl caravan_comp.out
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$PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl caravan_comp.out
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mv caravan.spice ../spi/lvs/caravan_lvs.spice
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# mv caravan.spice ../spi/lvs/caravan_lvs.spice
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mv caravan.spice ../spi/lvs/caravan.spice
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mv caravan_comp.out ../signoff/
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mv caravan_comp.out ../signoff/
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exit 0
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exit 0
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@ -12,6 +12,7 @@ crashbackups stop
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load caravel
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load caravel
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select top cell
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select top cell
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expand
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expand
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extract no all ;# <-- large speed-up
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extract do local
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extract do local
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extract all
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extract all
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ext2spice lvs
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ext2spice lvs
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@ -23,6 +24,7 @@ export NETGEN_COLUMNS=60
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netgen -batch lvs "caravel.spice caravel" "../verilog/gl/caravel.v caravel" \
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netgen -batch lvs "caravel.spice caravel" "../verilog/gl/caravel.v caravel" \
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$PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl caravel_comp.out
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$PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl caravel_comp.out
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mv caravel.spice ../spi/lvs/caravel_lvs.spice
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# mv caravel.spice ../spi/lvs/caravel_lvs.spice
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mv caravel.spice ../spi/lvs/caravel.spice
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mv caravel_comp.out ../signoff/
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mv caravel_comp.out ../signoff/
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exit 0
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exit 0
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36774
spi/lvs/caravan.spice
36774
spi/lvs/caravan.spice
File diff suppressed because it is too large
Load Diff
36425
spi/lvs/caravel.spice
36425
spi/lvs/caravel.spice
File diff suppressed because it is too large
Load Diff
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