From 98d089ed081cc7a0651b8651f3ff43013a0ca97f Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Thu, 20 Oct 2022 06:26:55 -0700 Subject: [PATCH] Move decleration of some signal in caravel.v to fix error in iverilog --- verilog/rtl/caravel.v | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/verilog/rtl/caravel.v b/verilog/rtl/caravel.v index c8a7ef35..dae1fa9c 100644 --- a/verilog/rtl/caravel.v +++ b/verilog/rtl/caravel.v @@ -244,6 +244,12 @@ module caravel ( wire por_l_buf; wire porb_h_buf; + + // SoC core + wire caravel_clk; + wire caravel_clk2; + wire caravel_rstn; + // top-level buffers buff_flash_clkrst flash_clkrst_buffers ( `ifdef USE_POWER_PINS @@ -399,10 +405,6 @@ module caravel ( .mprj_analog_io(user_analog_io) ); - // SoC core - wire caravel_clk; - wire caravel_clk2; - wire caravel_rstn; // Logic analyzer signals wire [127:0] la_data_in_user; // From CPU to MPRJ