Added LVS results for caravel and scripts for running caravel and

caravan LVS using the new PDK to update the chip GDS.  Moved files
to their proper places.  Still waiting on caravan LVS result file.
This commit is contained in:
Tim Edwards 2022-11-11 12:21:24 -05:00
parent 6bc1acaea1
commit 94461a3125
10 changed files with 742832 additions and 218978 deletions

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158
scripts/run_caravan_lvs_3.sh Executable file
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@ -0,0 +1,158 @@
#!/bin/bash
#
# run_caravan_lvs_3.sh ---
#
# Run LVS on caravan. Read GDS using the recipe developed for open_pdks.
# Read I/O cells from vendor GDS first so that they get replaced.
#
echo ${PDK_ROOT:=/usr/share/pdk} > /dev/null
echo ${PDK:=sky130A} > /dev/null
echo ${CARAVEL_ROOT:=/home/tim/gits/caravel} > /dev/null
echo ${LITEX_ROOT:=/home/tim/gits/caravel_mgmt_soc_litex} > /dev/null
echo "Running LVS on caravan."
if [ $# -eq 0 ]; then
echo "No arguments---running LVS on existing spice if it exists."
elif [ $1 == "extract" ]; then
echo "Forced new extraction."
rm -f $CARAVEL_ROOT/spi/lvs/caravan.spice
else
echo "Ending without running LVS."
exit 0
fi
if [ ! -f $CARAVEL_ROOT/spi/lvs/caravan.spice ]; then
magic -dnull -noconsole -rcfile $PDK_ROOT/$PDK/libs.tech/magic/$PDK.magicrc << EOF
drc off
crashbackups stop
# ! This recipe taken from open_pdks/sky130/custom/scripts/gds_import_io.tcl
gds flatten true
gds flatglob *_cdns_*
gds flatglob *sky130_fd_pr__*_example_*
# ! flatten within the 120x2 ESD device
gds flatglob *sky130_fd_io__gnd2gnd_*
# The following cells have to be flattened for the gpiov2 pad to read in
# correctly, and produce a layout that can be extracted and generate an
# LVS clean netlist.
### flatten within the analog mux isolated P region
gds flatglob *sky130_fd_io__amx*
gds flatglob *sky130_fd_io__xor*
gds flatglob *sky130_fd_io__gpiov2_amx*
gds flatglob *sky130_fd_io__gpiov2_amux*
### flatten within the isolated VSSIO domain
gds flatglob *sky130_fd_io__feas_com_pupredrvr*
gds flatglob *sky130_fd_io__com_pupredrvr_strong_slowv2*
gds flatglob *sky130_fd_io__com_pdpredrvr_pbiasv2*
gds flatglob *sky130_fd_io__gpiov2_pdpredrvr_strong*
### flatten in opathv2
gds flatglob *sky130_fd_io__com_pudrvr_strong_slowv2*
gds flatglob *sky130_fd_io__com_pdpredrvr_strong_slowv2*
gds flatglob *sky130_fd_io__gpiov2_obpredrvr*
gds flatglob *sky130_fd_io__hvsbt_*
### flatten in ipath
gds flatglob *sky130_fd_io__gpiov2_ictl_logic*
### avoid splitting a netlist that passes in contorted ways through the
### layout hierarchy
gds flatglob *sky130_fd_io__gpio_pddrvr_strong_slowv2*
gds flatglob *sky130_fd_io__gpiov2_pddrvr_strong*
gds read $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/gds/sky130_fd_io.gds
gds read $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/gds/sky130_ef_io.gds
# Now assert that existing views must take precedence
gds noduplicates true
# GDS is still written in legacy mode
cif istyle sky130(legacy)
# And read in the full chip (except for cells already read)
gds read $CARAVEL_ROOT/gds/caravan-signoff.gds.gz
load caravan
select top cell
expand
extract do local
extract no all
extract unique
extract all
ext2spice lvs
ext2spice
EOF
rm -f *.ext
fi
cat > netgenD.tcl << EOF
puts stdout "Reading netlist caravan.spice"
set circuit1 [readnet spice $CARAVEL_ROOT/spi/lvs/caravan.spice]
puts stdout "Reading SPICE netlists of I/O"
set circuit2 [readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_fd_io.spice]
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_ef_io.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_ef_io__analog_pad.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap_12.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice \$circuit2
readnet spice $CARAVEL_ROOT/xschem/simple_por.spice \$circuit2
puts stdout "Reading all gate-level verilog submodules"
readnet verilog $CARAVEL_ROOT/verilog/rtl/defines.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/constant_block.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/digital_pll.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/gpio_control_block.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/gpio_defaults_block.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/gpio_defaults_block_0403.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/gpio_defaults_block_0801.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/gpio_defaults_block_1803.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/gpio_logic_high.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/gpio_signal_buffering_alt.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/mprj_logic_high.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/mprj2_logic_high.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/mgmt_protect_hv.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/mgmt_protect.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/spare_logic_block.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/caravel_clocking.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/user_id_programming.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/xres_buf.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/buff_flash_clkrst.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/housekeeping.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/chip_io_alt.v \$circuit2
puts stdout "Reading LiteX gate-level verilog submodules"
readnet verilog $LITEX_ROOT/verilog/gl/RAM128.v \$circuit2
readnet verilog $LITEX_ROOT/verilog/gl/RAM256.v \$circuit2
readnet verilog $LITEX_ROOT/verilog/gl/mgmt_core_wrapper.v \$circuit2
puts stdout "Reading top gate-level verilog module"
readnet verilog $CARAVEL_ROOT/verilog/gl/caravan-signoff.v \$circuit2
# Cells in management core wrapper (layout) are prefixed with RL_ or KF_
set cells1 [cells list -all \$circuit1]
set cells2 [cells list -all \$circuit2]
foreach cell \$cells1 {
if {[regexp "\\[A-Z\\]\\[A-Z\\]_(.+)" \$cell match cellname]} {
if {([lsearch \$cells2 \$cell] < 0) && ([lsearch \$cells2 \$cellname] >= 0) && ([lsearch \$cells1 \$cellname] < 0)} {
equate classes "\$circuit1 \$cell" "\$circuit2 \$cellname"
puts stdout "Matching pins of \$cell in circuit 1 and \$cellname in circuit 2"
equate pins "\$circuit1 \$cell" "\$circuit2 \$cellname"
}
}
# Ignore fill cells in standard cell sets that have two-letter prefixes.
if {[regexp {\\[A-Z\\]\\[A-Z\\]_sky130_fd_sc_[^_]+__fill_[[:digit:]]+} \$cell match]} {
ignore class "\$circuit1 \$cell"
}
}
# Run LVS
flatten class "\$circuit2 user_analog_project_wrapper"
lvs "\$circuit1 caravan" "\$circuit2 caravan" $PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl caravan_3_comp.out -json
EOF
export NETGEN_COLUMNS=90
export MAGIC_EXT_USE_GDS=1
netgen -batch source netgenD.tcl >& caravan_3_lvs.log
rm netgenD.tcl
exit 0

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@ -15,13 +15,13 @@ if [ $# -eq 0 ]; then
echo "No arguments---running LVS on existing spice if it exists."
elif [ $1 == "extract" ]; then
echo "Forced new extraction."
rm -f caravel.spice
rm -f $CARAVEL_ROOT/spi/lvs/caravel.spice
else
echo "Ending without running LVS."
exit 0
fi
if [ ! -f caravel.spice ]; then
if [ ! -f $CARAVEL_ROOT/spi/lvs/caravel.spice ]; then
magic -dnull -noconsole -rcfile $PDK_ROOT/$PDK/libs.tech/magic/$PDK.magicrc << EOF
drc off
crashbackups stop
@ -90,13 +90,14 @@ fi
cat > netgenD.tcl << EOF
puts stdout "Reading netlist caravel.spice"
set circuit1 [readnet spice caravel.spice]
set circuit1 [readnet spice $CARAVEL_ROOT/spi/lvs/caravel.spice]
puts stdout "Reading SPICE netlists of I/O"
set circuit2 [readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_fd_io.spice]
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_ef_io.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap_12.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice \$circuit2
readnet spice $CARAVEL_ROOT/xschem/simple_por.spice \$circuit2
puts stdout "Reading all gate-level verilog submodules"
readnet verilog $CARAVEL_ROOT/verilog/rtl/defines.v \$circuit2
readnet verilog $CARAVEL_ROOT/verilog/gl/constant_block.v \$circuit2
@ -145,12 +146,12 @@ foreach cell \$cells1 {
# Run LVS
flatten class "\$circuit2 user_project_wrapper"
lvs "\$circuit1 caravel" "\$circuit2 caravel" $PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl caravel_3_comp.out
lvs "\$circuit1 caravel" "\$circuit2 caravel" $PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl caravel_3_comp.out -json
EOF
export NETGEN_COLUMNS=90
export MAGIC_EXT_USE_GDS=1
netgen -batch source netgenD.tcl
# rm netgenD.tcl
netgen -batch source netgenD.tcl >& caravel_3_lvs.log
rm netgenD.tcl
exit 0

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@ -1,7 +0,0 @@
LVS reports:
net count difference = 32
device count difference = 357
unmatched nets = 373
unmatched devices = 128
unmatched pins = 41
property failures = 0

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@ -31,15 +31,10 @@ set XSCHEM_LIBRARY_PATH {}
append XSCHEM_LIBRARY_PATH ${XSCHEM_SHAREDIR}/xschem_library
#### include skywater libraries. Here i use [pwd]. This works if i start xschem from here.
append XSCHEM_LIBRARY_PATH :$env(PWD)
append XSCHEM_LIBRARY_PATH :/usr/share/pdk/$env(PDK)/libs.tech/xschem
# append XSCHEM_LIBRARY_PATH :/mnt/sda7/home/schippes/pdks/$env(PDK)/libs.tech/xschem
# append XSCHEM_LIBRARY_PATH :/mnt/sda7/home/schippes/pdks/sky130A/libs.tech/xschem
#### add ~/.xschem/xschem_library (USER_CONF_DIR is normally ~/.xschem)
append XSCHEM_LIBRARY_PATH :$USER_CONF_DIR/xschem_library
if {[catch {set PDKPATH $env(PDKPATH)}]} {
set PDKPATH "/usr/local/share/pdk/$env(PDK)"
}
###########################################################################
#### SET CUSTOM COLORS FOR XSCHEM LIBRARIES MATCHING CERTAIN PATTERNS
###########################################################################
@ -66,7 +61,22 @@ set XSCHEM_START_WINDOW {sky130_tests/top.sch}
###########################################################################
#### If unset $USER_CONF_DIR/simulations is assumed (normally ~/.xschem/simulations)
# set netlist_dir $env(HOME)/.xschem/simulations
set netlist_dir .
###########################################################################
#### NETLIST AND HIERARCHICAL PRINT EXCLUDE PATTERNS
###########################################################################
#### xschem_libs is a list of patterns of cells to exclude from netlisting.
#### Matching is done as regular expression on full cell path
#### Example:
#### set xschem_libs { {/cmoslib/} {/analoglib/.*pass} buffer }
#### in this case all schematic cells of directory cmoslib and cells containing
#### /analoglib/...pass and buffer will be excluded from netlisting
#### default value: empty
# set xschem_libs {}
#### noprint_libs is a list with same rules as for xschem_libs. This
#### variable controls hierarchical print
#### default value: empty
# set noprint_libs {}
###########################################################################
#### CHANGE DEFAULT [] WITH SOME OTHER CHARACTERS FOR BUSSED SIGNALS
@ -84,7 +94,6 @@ set netlist_dir .
# set netlist_type spice
#### Some netlisting options (these are the defaults)
# set hspice_netlist 1
# set verilog_2001 1
#### to use a fixed line with set change_lw to 0 and set some value to line_width
@ -113,6 +122,10 @@ set netlist_dir .
#### default: 0
# set persistent_command 1
#### if set to 1 a wire is inserted when separating components that are
#### connected by pins. Default: not enabled (0)
# set connect_by_kissing 1
#### if set to 1 automatically join/trim wires while editing
#### this may slow down on rally big designs. Can be disabled via menu
#### default: 0
@ -142,6 +155,17 @@ set netlist_dir .
# set to_pdf ps2pdf
set to_pdf {ps2pdf -dAutoRotatePages=/None}
###########################################################################
#### UNDO: SAVE ON DISK OR KEEP IN MEMORY
###########################################################################
#### Alloved: 'disk'or 'memory'.
#### Saving undo on disk is safer but slower on extremely big schematics.
#### In most cases you won't notice any delay. Undo on disk allows previous
#### state recovery in case of crashes. In-memory undo is extremely fast
#### but should a crash occur everything is lost.
#### It is highly recommended to keep undo on disk.
#### Default: disk
# set undo_type disk
###########################################################################
#### CUSTOM GRID / SNAP VALUE SETTINGS
@ -231,14 +255,6 @@ set to_pdf {ps2pdf -dAutoRotatePages=/None}
#### default: 0 (can be enabled by menu)
# set show_infowindow 0
###########################################################################
#### CONFIGURE COMPUTER FARM JOB REDIRECTORS FOR SIMULATIONS
###########################################################################
#### RTDA NC
# set computerfarm {nc run -Il}
#### LSF BSUB
# set computerfarm {bsub -Is}
###########################################################################
#### TCP CONNECTION WITH GAW
###########################################################################
@ -258,34 +274,102 @@ set to_pdf {ps2pdf -dAutoRotatePages=/None}
#### set bespice wave listening port; default: not enabled
set bespice_listen_port 2022
###########################################################################
#### UTILE SPICE STIMULI DESCRIPTION LANGUAGE AND TRANSLATOR
###########################################################################
#### default paths are set as shown here:
# set utile_gui_path ${XSCHEM_SHAREDIR}/utile/utile3
# set utile_cmd_path ${XSCHEM_SHAREDIR}/utile/utile
###########################################################################
#### TCL FILES TO LOAD AT STARTUP
###########################################################################
#### list of tcl files to preload.
# lappend tcl_files ${XSCHEM_SHAREDIR}/change_index.tcl
lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl
lappend tcl_files ${PDKPATH}/libs.tech/xschem/scripts/sky130_models.tcl
###########################################################################
#### XSCHEM TOOLBAR
###########################################################################
#### default: not enabled.
# set toolbar_visible 1
set toolbar_visible 1
# set toolbar_horiz 1
###########################################################################
#### TABBED WINDOWS
###########################################################################
# default: not enabled. Interface can be changed runtime if only one window
# or tab is open.
set tabbed_interface 1
###########################################################################
#### CASE INSENSITIVE SYMBOL LOOKUP
###########################################################################
## this option might be useful on filesystems that are case insensitive and
## on designs ported from windows where case of file names does not matter.
## if this option is set symbol lookup will be case insensitive,
## so a symbol reference 'AMPLI.SYM' will match with 'ampli.sym' or
## Amply.sym on disk. File system must be case insensitive for this to work,
## like FAT32 or NTFS.
## Do not set this option if you don't know what you are doing.
## Default: not enabled (0)
# set case_insensitive 1
###########################################################################
#### HIDE GRAPHS IF NO SPICE DATA LOADED
###########################################################################
## if enabled graphs will be hidden if no data is loaded.
## default: not enabled (0)
# set hide_empty_graphs 0
###########################################################################
#### SHOW HIDDEN TEXTS
###########################################################################
## This option shows text objects even if they have attribute 'hide=true' set
## default: 0 (not set)
# set show_hidden_texts 1
###########################################################################
#### LIVE BACKANNOTATION OF DATA AT CURSOR 2 (B) POSITION
###########################################################################
## if enabled will backannotate values in schematic at cursor 'b' position
## in graph. Default: not enabled (0)
# set live_cursor2_backannotate 1
###########################################################################
#### SKYWATER PDK SPECIFIC VARIABLES
###########################################################################
## (spice patched) skywater-pdk install
## opencircuitdesign pdks install. You need to change these to point to your open_pdks installation
set SKYWATER_MODELS $env(PDKPATH)/libs.tech/ngspice
set SKYWATER_STDCELLS $env(PDKPATH)/libs.ref/sky130_fd_sc_hd/spice
## check if env var PDK_ROOT exists, and use it for building open_pdks paths
if { [info exists env(PDK_ROOT)] && $env(PDK_ROOT) ne {} } {
## found variable, set tcl PDK_ROOT var
if {![file isdir $env(PDK_ROOT)]} {
puts stderr "Warning: PDK_ROOT environment variable is set but path not found on the system."
}
set PDK_ROOT $env(PDK_ROOT)
} else {
## not existing or empty.
puts stderr "Warning: PDK_ROOT env. var. not found or empty, trying to find an open_pdks install"
if {[file isdir /usr/share/pdk]} {set PDK_ROOT /usr/share/pdk
} elseif {[file isdir /usr/local/share/pdk]} {set PDK_ROOT /usr/local/share/pdk
} elseif {[file isdir $env(HOME)/share/pdk]} {set PDK_ROOT $env(HOME)/share/pdk
} else {
puts stderr {No open_pdks installation found, set PDK_ROOT env. var. and restart xschem}
}
}
if {[info exists PDK_ROOT]} {
## get process variant
if {[info exists env(PDK)]} {
set PDK $env(PDK)
} else {
set PDK sky130A
}
set SKYWATER_MODELS ${PDK_ROOT}/${PDK}/libs.tech/ngspice
set SKYWATER_STDCELLS ${PDK_ROOT}/${PDK}/libs.ref/sky130_fd_sc_hd/spice
puts stderr "open_pdks installation: using $PDK_ROOT"
puts stderr "SKYWATER_MODELS: $SKYWATER_MODELS"
puts stderr "SKYWATER_STDCELLS: $SKYWATER_STDCELLS"
}
# open_pdks specific:
# Set variables after ${PDK_ROOT} is known
# This overrides some of the variables set above.
set XSCHEM_START_WINDOW ${PDK_ROOT}/${PDK}/libs.tech/xschem/sky130_tests/top.sch
append XSCHEM_LIBRARY_PATH :${PDK_ROOT}/${PDK}/libs.tech/xschem