reharden gpio_defaults_block. Changed the power stripes to be on Metal3.

This commit is contained in:
mo-hosni 2023-02-27 07:34:33 -08:00
parent 50a762407b
commit 8d6cfe6e2b
53 changed files with 8297 additions and 2202 deletions

View File

@ -3,242 +3,200 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN gpio_defaults_block ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 30000 11000 ) ;
ROW ROW_0 unithd 0 2720 N DO 65 BY 1 STEP 460 0 ;
ROW ROW_1 unithd 0 5440 FS DO 65 BY 1 STEP 460 0 ;
ROW ROW_2 unithd 0 8160 N DO 65 BY 1 STEP 460 0 ;
TRACKS X 230 DO 65 STEP 460 LAYER li1 ;
TRACKS Y 170 DO 32 STEP 340 LAYER li1 ;
TRACKS X 170 DO 88 STEP 340 LAYER met1 ;
TRACKS Y 170 DO 32 STEP 340 LAYER met1 ;
TRACKS X 230 DO 65 STEP 460 LAYER met2 ;
TRACKS Y 230 DO 24 STEP 460 LAYER met2 ;
TRACKS X 340 DO 44 STEP 680 LAYER met3 ;
TRACKS Y 340 DO 16 STEP 680 LAYER met3 ;
TRACKS X 460 DO 33 STEP 920 LAYER met4 ;
TRACKS Y 460 DO 12 STEP 920 LAYER met4 ;
TRACKS X 1700 DO 9 STEP 3400 LAYER met5 ;
TRACKS Y 1700 DO 3 STEP 3400 LAYER met5 ;
GCELLGRID X 0 DO 4 STEP 6900 ;
GCELLGRID Y 0 DO 2 STEP 6900 ;
VIAS 4 ;
- via4_1400x1600 + VIARULE M4M5_PR + CUTSIZE 800 800 + LAYERS met4 via4 met5 + CUTSPACING 800 800 + ENCLOSURE 300 400 310 400 ;
- via_1400x480 + VIARULE M1M2_PR + CUTSIZE 150 150 + LAYERS met1 via met2 + CUTSPACING 170 170 + ENCLOSURE 145 165 55 165 + ROWCOL 1 4 ;
- via2_1400x480 + VIARULE M2M3_PR + CUTSIZE 200 200 + LAYERS met2 via2 met3 + CUTSPACING 200 200 + ENCLOSURE 40 140 200 65 + ROWCOL 1 3 ;
- via3_1400x480 + VIARULE M3M4_PR + CUTSIZE 200 200 + LAYERS met3 via3 met4 + CUTSPACING 200 200 + ENCLOSURE 200 60 200 140 + ROWCOL 1 3 ;
DIEAREA ( 0 0 ) ( 17000 28000 ) ;
ROW ROW_0 unithd 2300 5440 N DO 30 BY 1 STEP 460 0 ;
ROW ROW_1 unithd 2300 8160 FS DO 30 BY 1 STEP 460 0 ;
ROW ROW_2 unithd 2300 10880 N DO 30 BY 1 STEP 460 0 ;
ROW ROW_3 unithd 2300 13600 FS DO 30 BY 1 STEP 460 0 ;
ROW ROW_4 unithd 2300 16320 N DO 30 BY 1 STEP 460 0 ;
ROW ROW_5 unithd 2300 19040 FS DO 30 BY 1 STEP 460 0 ;
TRACKS X 230 DO 37 STEP 460 LAYER li1 ;
TRACKS Y 170 DO 82 STEP 340 LAYER li1 ;
TRACKS X 170 DO 50 STEP 340 LAYER met1 ;
TRACKS Y 170 DO 82 STEP 340 LAYER met1 ;
TRACKS X 230 DO 37 STEP 460 LAYER met2 ;
TRACKS Y 230 DO 61 STEP 460 LAYER met2 ;
TRACKS X 340 DO 25 STEP 680 LAYER met3 ;
TRACKS Y 340 DO 41 STEP 680 LAYER met3 ;
TRACKS X 460 DO 18 STEP 920 LAYER met4 ;
TRACKS Y 460 DO 30 STEP 920 LAYER met4 ;
TRACKS X 1700 DO 5 STEP 3400 LAYER met5 ;
TRACKS Y 1700 DO 8 STEP 3400 LAYER met5 ;
GCELLGRID X 0 DO 2 STEP 6900 ;
GCELLGRID Y 0 DO 4 STEP 6900 ;
VIAS 2 ;
- via2_3_1400_480_1_4_320_320 + VIARULE M1M2_PR + CUTSIZE 150 150 + LAYERS met1 via met2 + CUTSPACING 170 170 + ENCLOSURE 85 165 145 85 + ROWCOL 1 4 ;
- via3_4_1400_1400_3_3_400_400 + VIARULE M2M3_PR + CUTSIZE 200 200 + LAYERS met2 via2 met3 + CUTSPACING 200 200 + ENCLOSURE 200 85 65 200 + ROWCOL 3 3 ;
END VIAS
COMPONENTS 49 ;
- FILLER_0_29 sky130_fd_sc_hd__fill_1 + PLACED ( 13340 2720 ) N ;
- FILLER_0_3 sky130_fd_sc_hd__decap_6 + PLACED ( 1380 2720 ) N ;
- FILLER_0_33 sky130_fd_sc_hd__fill_2 + PLACED ( 15180 2720 ) N ;
- FILLER_0_38 sky130_fd_sc_hd__fill_2 + PLACED ( 17480 2720 ) N ;
- FILLER_0_43 sky130_fd_sc_hd__fill_2 + PLACED ( 19780 2720 ) N ;
- FILLER_0_48 sky130_fd_sc_hd__fill_1 + PLACED ( 22080 2720 ) N ;
- FILLER_0_55 sky130_fd_sc_hd__fill_1 + PLACED ( 25300 2720 ) N ;
- FILLER_0_60 sky130_fd_sc_hd__fill_2 + PLACED ( 27600 2720 ) N ;
- FILLER_0_9 sky130_fd_sc_hd__fill_1 + PLACED ( 4140 2720 ) N ;
- FILLER_1_15 sky130_fd_sc_hd__decap_12 + PLACED ( 6900 5440 ) FS ;
- FILLER_1_27 sky130_fd_sc_hd__decap_12 + PLACED ( 12420 5440 ) FS ;
- FILLER_1_3 sky130_fd_sc_hd__decap_12 + PLACED ( 1380 5440 ) FS ;
- FILLER_1_39 sky130_fd_sc_hd__decap_12 + PLACED ( 17940 5440 ) FS ;
- FILLER_1_51 sky130_fd_sc_hd__decap_4 + PLACED ( 23460 5440 ) FS ;
- FILLER_1_55 sky130_fd_sc_hd__fill_1 + PLACED ( 25300 5440 ) FS ;
- FILLER_1_57 sky130_fd_sc_hd__decap_4 + PLACED ( 26220 5440 ) FS ;
- FILLER_1_61 sky130_fd_sc_hd__fill_1 + PLACED ( 28060 5440 ) FS ;
- FILLER_2_15 sky130_fd_sc_hd__decap_12 + PLACED ( 6900 8160 ) N ;
- FILLER_2_27 sky130_fd_sc_hd__fill_1 + PLACED ( 12420 8160 ) N ;
- FILLER_2_29 sky130_fd_sc_hd__decap_12 + PLACED ( 13340 8160 ) N ;
- FILLER_2_3 sky130_fd_sc_hd__decap_12 + PLACED ( 1380 8160 ) N ;
- FILLER_2_41 sky130_fd_sc_hd__decap_12 + PLACED ( 18860 8160 ) N ;
- FILLER_2_53 sky130_fd_sc_hd__decap_3 + PLACED ( 24380 8160 ) N ;
- FILLER_2_57 sky130_fd_sc_hd__decap_4 + PLACED ( 26220 8160 ) N ;
- FILLER_2_61 sky130_fd_sc_hd__fill_1 + PLACED ( 28060 8160 ) N ;
- PHY_0 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 0 2720 ) N ;
- PHY_1 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 28520 2720 ) FN ;
- PHY_2 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 0 5440 ) FS ;
- PHY_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 28520 5440 ) S ;
- PHY_4 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 0 8160 ) N ;
- PHY_5 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 28520 8160 ) FN ;
- TAP_10 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 25760 8160 ) N ;
- TAP_6 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 12880 2720 ) N ;
- TAP_7 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 25760 2720 ) N ;
- TAP_8 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 25760 5440 ) FS ;
- TAP_9 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 12880 8160 ) N ;
- gpio_default_value\[0\] sky130_fd_sc_hd__conb_1 + PLACED ( 4600 2720 ) FN ;
- gpio_default_value\[10\] sky130_fd_sc_hd__conb_1 + PLACED ( 23920 2720 ) N ;
- gpio_default_value\[11\] sky130_fd_sc_hd__conb_1 + PLACED ( 26220 2720 ) FN ;
- gpio_default_value\[12\] sky130_fd_sc_hd__conb_1 + PLACED ( 22540 2720 ) N ;
- gpio_default_value\[1\] sky130_fd_sc_hd__conb_1 + PLACED ( 5980 2720 ) N ;
- gpio_default_value\[2\] sky130_fd_sc_hd__conb_1 + PLACED ( 7360 2720 ) FN ;
- gpio_default_value\[3\] sky130_fd_sc_hd__conb_1 + PLACED ( 8740 2720 ) FN ;
- gpio_default_value\[4\] sky130_fd_sc_hd__conb_1 + PLACED ( 10120 2720 ) FN ;
- gpio_default_value\[5\] sky130_fd_sc_hd__conb_1 + PLACED ( 11500 2720 ) N ;
- gpio_default_value\[6\] sky130_fd_sc_hd__conb_1 + PLACED ( 13800 2720 ) N ;
- gpio_default_value\[7\] sky130_fd_sc_hd__conb_1 + PLACED ( 16100 2720 ) N ;
- gpio_default_value\[8\] sky130_fd_sc_hd__conb_1 + PLACED ( 18400 2720 ) N ;
- gpio_default_value\[9\] sky130_fd_sc_hd__conb_1 + PLACED ( 20700 2720 ) N ;
COMPONENTS 56 ;
- FILLER_0_15 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 9200 5440 ) N ;
- FILLER_0_18 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 10580 5440 ) N ;
- FILLER_0_23 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 12880 5440 ) N ;
- FILLER_0_3 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 3680 5440 ) N ;
- FILLER_0_8 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 5980 5440 ) N ;
- FILLER_1_13 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 8280 8160 ) FS ;
- FILLER_1_17 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 10120 8160 ) FS ;
- FILLER_1_24 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 13340 8160 ) FS ;
- FILLER_1_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 3680 8160 ) FS ;
- FILLER_1_9 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 6440 8160 ) FS ;
- FILLER_2_18 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 10880 ) N ;
- FILLER_2_26 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 14260 10880 ) N ;
- FILLER_2_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 3680 10880 ) N ;
- FILLER_2_9 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6440 10880 ) N ;
- FILLER_3_16 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 9660 13600 ) FS ;
- FILLER_3_24 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 13340 13600 ) FS ;
- FILLER_3_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 3680 13600 ) FS ;
- FILLER_3_9 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 6440 13600 ) FS ;
- FILLER_4_14 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 8740 16320 ) N ;
- FILLER_4_18 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 10580 16320 ) N ;
- FILLER_4_23 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 12880 16320 ) N ;
- FILLER_4_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 3680 16320 ) N ;
- FILLER_5_15 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 9200 19040 ) FS ;
- FILLER_5_18 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 19040 ) FS ;
- FILLER_5_26 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 14260 19040 ) FS ;
- FILLER_5_3 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 3680 19040 ) FS ;
- FILLER_5_8 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 5980 19040 ) FS ;
- PHY_0 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 2300 5440 ) N ;
- PHY_1 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 14720 5440 ) FN ;
- PHY_10 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 2300 19040 ) FS ;
- PHY_11 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 14720 19040 ) S ;
- PHY_2 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 2300 8160 ) FS ;
- PHY_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 14720 8160 ) S ;
- PHY_4 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 2300 10880 ) N ;
- PHY_5 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 14720 10880 ) FN ;
- PHY_6 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 2300 13600 ) FS ;
- PHY_7 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 14720 13600 ) S ;
- PHY_8 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 2300 16320 ) N ;
- PHY_9 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 14720 16320 ) FN ;
- TAP_12 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 10120 5440 ) N ;
- TAP_13 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 10120 10880 ) N ;
- TAP_14 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 10120 16320 ) N ;
- TAP_15 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 10120 19040 ) FS ;
- gpio_default_value\[0\] sky130_fd_sc_hd__conb_1 + PLACED ( 7360 16320 ) FN ;
- gpio_default_value\[10\] sky130_fd_sc_hd__conb_1 + PLACED ( 5060 13600 ) FS ;
- gpio_default_value\[11\] sky130_fd_sc_hd__conb_1 + PLACED ( 11960 8160 ) S ;
- gpio_default_value\[12\] sky130_fd_sc_hd__conb_1 + PLACED ( 8740 8160 ) S ;
- gpio_default_value\[1\] sky130_fd_sc_hd__conb_1 + PLACED ( 11500 16320 ) N ;
- gpio_default_value\[2\] sky130_fd_sc_hd__conb_1 + PLACED ( 4600 5440 ) FN ;
- gpio_default_value\[3\] sky130_fd_sc_hd__conb_1 + PLACED ( 7820 5440 ) FN ;
- gpio_default_value\[4\] sky130_fd_sc_hd__conb_1 + PLACED ( 11500 5440 ) FN ;
- gpio_default_value\[5\] sky130_fd_sc_hd__conb_1 + PLACED ( 5060 8160 ) S ;
- gpio_default_value\[6\] sky130_fd_sc_hd__conb_1 + PLACED ( 5060 10880 ) FN ;
- gpio_default_value\[7\] sky130_fd_sc_hd__conb_1 + PLACED ( 8280 13600 ) S ;
- gpio_default_value\[8\] sky130_fd_sc_hd__conb_1 + PLACED ( 7820 19040 ) S ;
- gpio_default_value\[9\] sky130_fd_sc_hd__conb_1 + PLACED ( 4600 19040 ) S ;
END COMPONENTS
PINS 15 ;
- VGND + NET VGND + SPECIAL + DIRECTION INPUT + USE GROUND
- VGND + NET VGND + SPECIAL + DIRECTION INOUT + USE GROUND
+ PORT
+ LAYER met4 ( -700 -4320 ) ( 700 4320 )
+ LAYER met4 ( -7700 -4320 ) ( -6300 4320 )
+ LAYER met4 ( -14700 -4320 ) ( -13300 4320 )
+ LAYER met4 ( -21700 -4320 ) ( -20300 4320 )
+ LAYER met5 ( -25500 380 ) ( 4400 1980 )
+ FIXED ( 25500 6800 ) N ;
- VPWR + NET VPWR + SPECIAL + DIRECTION INPUT + USE POWER
+ LAYER met3 ( -7140 -700 ) ( 7140 700 )
+ LAYER met2 ( 4200 -11840 ) ( 5600 4960 )
+ FIXED ( 9200 17040 ) N ;
- VPWR + NET VPWR + SPECIAL + DIRECTION INOUT + USE POWER
+ PORT
+ LAYER met4 ( -700 -4320 ) ( 700 4320 )
+ LAYER met4 ( -7700 -4320 ) ( -6300 4320 )
+ LAYER met4 ( -14700 -4320 ) ( -13300 4320 )
+ LAYER met4 ( -21700 -4320 ) ( -20300 4320 )
+ LAYER met5 ( -22000 -3120 ) ( 7900 -1520 )
+ FIXED ( 22000 6800 ) N ;
+ LAYER met3 ( -7140 -700 ) ( 7140 700 )
+ LAYER met2 ( -5200 -4440 ) ( -3800 12360 )
+ FIXED ( 9200 9640 ) N ;
- gpio_defaults[0] + NET gpio_defaults_low\[0\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 1150 1000 ) N ;
+ LAYER met2 ( -140 -3000 ) ( 140 3000 )
+ PLACED ( 3910 28000 ) N ;
- gpio_defaults[10] + NET gpio_defaults_high\[10\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 24150 1000 ) N ;
+ LAYER met3 ( -3000 -300 ) ( 3000 300 )
+ PLACED ( 0 21420 ) N ;
- gpio_defaults[11] + NET gpio_defaults_low\[11\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 26450 1000 ) N ;
+ LAYER met2 ( -140 -3000 ) ( 140 3000 )
+ PLACED ( 3910 0 ) N ;
- gpio_defaults[12] + NET gpio_defaults_low\[12\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 28750 1000 ) N ;
+ LAYER met2 ( -140 -3000 ) ( 140 3000 )
+ PLACED ( 5750 0 ) N ;
- gpio_defaults[1] + NET gpio_defaults_high\[1\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 3450 1000 ) N ;
+ LAYER met2 ( -140 -3000 ) ( 140 3000 )
+ PLACED ( 5750 28000 ) N ;
- gpio_defaults[2] + NET gpio_defaults_low\[2\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 5750 1000 ) N ;
+ LAYER met3 ( -3000 -300 ) ( 3000 300 )
+ PLACED ( 0 5100 ) N ;
- gpio_defaults[3] + NET gpio_defaults_low\[3\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 8050 1000 ) N ;
+ LAYER met3 ( -3000 -300 ) ( 3000 300 )
+ PLACED ( 0 6460 ) N ;
- gpio_defaults[4] + NET gpio_defaults_low\[4\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 10350 1000 ) N ;
+ LAYER met3 ( -3000 -300 ) ( 3000 300 )
+ PLACED ( 0 7820 ) N ;
- gpio_defaults[5] + NET gpio_defaults_low\[5\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 12650 1000 ) N ;
+ LAYER met3 ( -3000 -300 ) ( 3000 300 )
+ PLACED ( 0 11900 ) N ;
- gpio_defaults[6] + NET gpio_defaults_low\[6\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 14950 1000 ) N ;
+ LAYER met3 ( -3000 -300 ) ( 3000 300 )
+ PLACED ( 0 13260 ) N ;
- gpio_defaults[7] + NET gpio_defaults_low\[7\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 17250 1000 ) N ;
+ LAYER met3 ( -3000 -300 ) ( 3000 300 )
+ PLACED ( 0 14620 ) N ;
- gpio_defaults[8] + NET gpio_defaults_low\[8\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 19550 1000 ) N ;
+ LAYER met3 ( -3000 -300 ) ( 3000 300 )
+ PLACED ( 0 18700 ) N ;
- gpio_defaults[9] + NET gpio_defaults_low\[9\] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -140 -1000 ) ( 140 1000 )
+ PLACED ( 21850 1000 ) N ;
+ LAYER met3 ( -3000 -300 ) ( 3000 300 )
+ PLACED ( 0 20060 ) N ;
END PINS
BLOCKAGES 1 ;
- LAYER met5 RECT ( 0 0 ) ( 30000 11000 ) ;
END BLOCKAGES
SPECIALNETS 2 ;
- VGND ( PIN VGND ) ( * VNB ) ( * VGND ) + USE GROUND
+ ROUTED met3 0 + SHAPE STRIPE ( 25500 8160 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 25500 8160 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 25500 8160 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 18500 8160 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 18500 8160 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 18500 8160 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 11500 8160 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 11500 8160 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 11500 8160 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 4500 8160 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 4500 8160 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 4500 8160 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 25500 2720 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 25500 2720 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 25500 2720 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 18500 2720 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 18500 2720 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 18500 2720 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 11500 2720 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 11500 2720 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 11500 2720 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 4500 2720 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 4500 2720 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 4500 2720 ) via_1400x480
NEW met4 0 + SHAPE STRIPE ( 25500 7980 ) via4_1400x1600
NEW met4 0 + SHAPE STRIPE ( 18500 7980 ) via4_1400x1600
NEW met4 0 + SHAPE STRIPE ( 11500 7980 ) via4_1400x1600
NEW met4 0 + SHAPE STRIPE ( 4500 7980 ) via4_1400x1600
NEW met5 1600 + SHAPE STRIPE ( 0 7980 ) ( 29900 7980 )
NEW met4 1400 + SHAPE STRIPE ( 25500 2480 ) ( 25500 11120 )
NEW met4 1400 + SHAPE STRIPE ( 18500 2480 ) ( 18500 11120 )
NEW met4 1400 + SHAPE STRIPE ( 11500 2480 ) ( 11500 11120 )
NEW met4 1400 + SHAPE STRIPE ( 4500 2480 ) ( 4500 11120 )
NEW met1 480 + SHAPE FOLLOWPIN ( 0 8160 ) ( 29900 8160 )
NEW met1 480 + SHAPE FOLLOWPIN ( 0 2720 ) ( 29900 2720 ) ;
+ ROUTED met1 480 + SHAPE FOLLOWPIN ( 2300 21760 ) ( 16100 21760 )
NEW met1 480 + SHAPE FOLLOWPIN ( 2300 16320 ) ( 16100 16320 )
NEW met1 480 + SHAPE FOLLOWPIN ( 2300 10880 ) ( 16100 10880 )
NEW met1 480 + SHAPE FOLLOWPIN ( 2300 5440 ) ( 16100 5440 )
NEW met3 1400 + SHAPE STRIPE ( 2060 17040 ) ( 16340 17040 )
NEW met2 1400 + SHAPE STRIPE ( 14100 5200 ) ( 14100 22000 )
NEW met2 0 + SHAPE STRIPE ( 14100 17040 ) via3_4_1400_1400_3_3_400_400
NEW met1 0 + SHAPE STRIPE ( 14100 21760 ) via2_3_1400_480_1_4_320_320
NEW met1 0 + SHAPE STRIPE ( 14100 16320 ) via2_3_1400_480_1_4_320_320
NEW met1 0 + SHAPE STRIPE ( 14100 10880 ) via2_3_1400_480_1_4_320_320
NEW met1 0 + SHAPE STRIPE ( 14100 5440 ) via2_3_1400_480_1_4_320_320 ;
- VPWR ( PIN VPWR ) ( * VPB ) ( * VPWR ) + USE POWER
+ ROUTED met3 0 + SHAPE STRIPE ( 22000 10880 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 22000 10880 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 22000 10880 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 15000 10880 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 15000 10880 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 15000 10880 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 8000 10880 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 8000 10880 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 8000 10880 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 1000 10880 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 1000 10880 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 1000 10880 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 22000 5440 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 22000 5440 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 22000 5440 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 15000 5440 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 15000 5440 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 15000 5440 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 8000 5440 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 8000 5440 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 8000 5440 ) via_1400x480
NEW met3 0 + SHAPE STRIPE ( 1000 5440 ) via3_1400x480
NEW met2 0 + SHAPE STRIPE ( 1000 5440 ) via2_1400x480
NEW met1 0 + SHAPE STRIPE ( 1000 5440 ) via_1400x480
NEW met4 0 + SHAPE STRIPE ( 22000 4480 ) via4_1400x1600
NEW met4 0 + SHAPE STRIPE ( 15000 4480 ) via4_1400x1600
NEW met4 0 + SHAPE STRIPE ( 8000 4480 ) via4_1400x1600
NEW met4 0 + SHAPE STRIPE ( 1000 4480 ) via4_1400x1600
NEW met5 1600 + SHAPE STRIPE ( 0 4480 ) ( 29900 4480 )
NEW met4 1400 + SHAPE STRIPE ( 22000 2480 ) ( 22000 11120 )
NEW met4 1400 + SHAPE STRIPE ( 15000 2480 ) ( 15000 11120 )
NEW met4 1400 + SHAPE STRIPE ( 8000 2480 ) ( 8000 11120 )
NEW met4 1400 + SHAPE STRIPE ( 1000 2480 ) ( 1000 11120 )
NEW met1 480 + SHAPE FOLLOWPIN ( 0 10880 ) ( 29900 10880 )
NEW met1 480 + SHAPE FOLLOWPIN ( 0 5440 ) ( 29900 5440 ) ;
+ ROUTED met1 480 + SHAPE FOLLOWPIN ( 2300 19040 ) ( 16100 19040 )
NEW met1 480 + SHAPE FOLLOWPIN ( 2300 13600 ) ( 16100 13600 )
NEW met1 480 + SHAPE FOLLOWPIN ( 2300 8160 ) ( 16100 8160 )
NEW met3 1400 + SHAPE STRIPE ( 2060 9640 ) ( 16340 9640 )
NEW met2 1400 + SHAPE STRIPE ( 4700 5200 ) ( 4700 22000 )
NEW met2 0 + SHAPE STRIPE ( 4700 9640 ) via3_4_1400_1400_3_3_400_400
NEW met1 0 + SHAPE STRIPE ( 4700 19040 ) via2_3_1400_480_1_4_320_320
NEW met1 0 + SHAPE STRIPE ( 4700 13600 ) via2_3_1400_480_1_4_320_320
NEW met1 0 + SHAPE STRIPE ( 4700 8160 ) via2_3_1400_480_1_4_320_320 ;
END SPECIALNETS
NETS 26 ;
- gpio_defaults_high\[0\] ( gpio_default_value\[0\] HI ) + USE SIGNAL ;
- gpio_defaults_high\[10\] ( PIN gpio_defaults[10] ) ( gpio_default_value\[10\] HI ) + USE SIGNAL
+ ROUTED met2 ( 24150 1700 0 ) ( * 3230 )
NEW li1 ( 24150 3230 ) L1M1_PR_MR
NEW met1 ( 24150 3230 ) M1M2_PR
NEW met1 ( 24150 3230 ) RECT ( -355 -70 0 70 ) ;
+ ROUTED met1 ( 3450 15810 ) ( 5290 * )
NEW met2 ( 3450 15810 ) ( * 22100 )
NEW met3 ( 3450 22100 ) ( 4140 * )
NEW met3 ( 4140 21420 ) ( * 22100 )
NEW met3 ( 2300 21420 0 ) ( 4140 * )
NEW li1 ( 5290 15810 ) L1M1_PR_MR
NEW met1 ( 3450 15810 ) M1M2_PR
NEW met2 ( 3450 22100 ) M2M3_PR ;
- gpio_defaults_high\[11\] ( gpio_default_value\[11\] HI ) + USE SIGNAL ;
- gpio_defaults_high\[12\] ( gpio_default_value\[12\] HI ) + USE SIGNAL ;
- gpio_defaults_high\[1\] ( PIN gpio_defaults[1] ) ( gpio_default_value\[1\] HI ) + USE SIGNAL
+ ROUTED met2 ( 3450 1700 0 ) ( * 3230 )
NEW met1 ( 3450 3230 ) ( 6210 * )
NEW met1 ( 3450 3230 ) M1M2_PR
NEW li1 ( 6210 3230 ) L1M1_PR_MR ;
+ ROUTED met1 ( 7590 17850 ) ( 11730 * )
NEW met2 ( 7590 17850 ) ( * 19380 )
NEW met2 ( 7130 19380 ) ( 7590 * )
NEW met2 ( 7130 19380 ) ( * 23460 )
NEW met2 ( 6670 23460 ) ( 7130 * )
NEW met2 ( 6670 23460 ) ( * 25500 )
NEW met2 ( 5750 25500 0 ) ( 6670 * )
NEW li1 ( 11730 17850 ) L1M1_PR_MR
NEW met1 ( 7590 17850 ) M1M2_PR ;
- gpio_defaults_high\[2\] ( gpio_default_value\[2\] HI ) + USE SIGNAL ;
- gpio_defaults_high\[3\] ( gpio_default_value\[3\] HI ) + USE SIGNAL ;
- gpio_defaults_high\[4\] ( gpio_default_value\[4\] HI ) + USE SIGNAL ;
@ -248,61 +206,86 @@ NETS 26 ;
- gpio_defaults_high\[8\] ( gpio_default_value\[8\] HI ) + USE SIGNAL ;
- gpio_defaults_high\[9\] ( gpio_default_value\[9\] HI ) + USE SIGNAL ;
- gpio_defaults_low\[0\] ( PIN gpio_defaults[0] ) ( gpio_default_value\[0\] LO ) + USE SIGNAL
+ ROUTED met2 ( 1150 1700 0 ) ( * 3910 )
NEW met1 ( 1150 3910 ) ( 4830 * )
NEW met1 ( 1150 3910 ) M1M2_PR
NEW li1 ( 4830 3910 ) L1M1_PR_MR ;
+ ROUTED met1 ( 7130 18530 ) ( 7590 * )
NEW met2 ( 7130 18530 ) ( * 18700 )
NEW met2 ( 6670 18700 ) ( 7130 * )
NEW met2 ( 6670 18700 ) ( * 22780 )
NEW met2 ( 5290 22780 ) ( 6670 * )
NEW met2 ( 5290 22780 ) ( * 25500 )
NEW met2 ( 3910 25500 0 ) ( 5290 * )
NEW li1 ( 7590 18530 ) L1M1_PR_MR
NEW met1 ( 7130 18530 ) M1M2_PR ;
- gpio_defaults_low\[10\] ( gpio_default_value\[10\] LO ) + USE SIGNAL ;
- gpio_defaults_low\[11\] ( PIN gpio_defaults[11] ) ( gpio_default_value\[11\] LO ) + USE SIGNAL
+ ROUTED met2 ( 26450 1700 0 ) ( * 3910 )
NEW li1 ( 26450 3910 ) L1M1_PR_MR
NEW met1 ( 26450 3910 ) M1M2_PR
NEW met1 ( 26450 3910 ) RECT ( -355 -70 0 70 ) ;
+ ROUTED met2 ( 2990 2380 ) ( 3910 * 0 )
NEW met2 ( 2990 2380 ) ( * 9010 )
NEW met1 ( 2990 9010 ) ( 12190 * )
NEW met1 ( 2990 9010 ) M1M2_PR
NEW li1 ( 12190 9010 ) L1M1_PR_MR ;
- gpio_defaults_low\[12\] ( PIN gpio_defaults[12] ) ( gpio_default_value\[12\] LO ) + USE SIGNAL
+ ROUTED met2 ( 28750 1700 0 ) ( * 4250 )
NEW met1 ( 23690 4250 ) ( 28750 * )
NEW met1 ( 28750 4250 ) M1M2_PR
NEW li1 ( 23690 4250 ) L1M1_PR_MR ;
+ ROUTED met2 ( 5750 2380 0 ) ( 6670 * )
NEW met2 ( 6670 2380 ) ( * 8670 )
NEW met1 ( 6670 8670 ) ( 8970 * )
NEW met1 ( 6670 8670 ) M1M2_PR
NEW li1 ( 8970 8670 ) L1M1_PR_MR ;
- gpio_defaults_low\[1\] ( gpio_default_value\[1\] LO ) + USE SIGNAL ;
- gpio_defaults_low\[2\] ( PIN gpio_defaults[2] ) ( gpio_default_value\[2\] LO ) + USE SIGNAL
+ ROUTED met2 ( 5750 1700 0 ) ( * 3910 )
NEW met1 ( 5750 3910 ) ( 7590 * )
NEW met1 ( 5750 3910 ) M1M2_PR
NEW li1 ( 7590 3910 ) L1M1_PR_MR ;
+ ROUTED met3 ( 2300 5100 0 ) ( 4140 * )
NEW met3 ( 4140 5100 ) ( * 5780 )
NEW met3 ( 3450 5780 ) ( 4140 * )
NEW met2 ( 3450 5780 ) ( * 6970 )
NEW met1 ( 3450 6970 ) ( 4830 * )
NEW met2 ( 3450 5780 ) M2M3_PR
NEW met1 ( 3450 6970 ) M1M2_PR
NEW li1 ( 4830 6970 ) L1M1_PR_MR ;
- gpio_defaults_low\[3\] ( PIN gpio_defaults[3] ) ( gpio_default_value\[3\] LO ) + USE SIGNAL
+ ROUTED met2 ( 8050 1700 0 ) ( * 3910 )
NEW met1 ( 8050 3910 ) ( 8970 * )
NEW met1 ( 8050 3910 ) M1M2_PR
NEW li1 ( 8970 3910 ) L1M1_PR_MR ;
+ ROUTED met3 ( 2300 6460 0 ) ( 5750 * )
NEW met2 ( 5750 6460 ) ( * 6630 )
NEW met1 ( 5750 6630 ) ( 8050 * )
NEW met2 ( 5750 6460 ) M2M3_PR
NEW met1 ( 5750 6630 ) M1M2_PR
NEW li1 ( 8050 6630 ) L1M1_PR_MR ;
- gpio_defaults_low\[4\] ( PIN gpio_defaults[4] ) ( gpio_default_value\[4\] LO ) + USE SIGNAL
+ ROUTED met2 ( 10350 1700 0 ) ( * 3910 )
NEW li1 ( 10350 3910 ) L1M1_PR_MR
NEW met1 ( 10350 3910 ) M1M2_PR
NEW met1 ( 10350 3910 ) RECT ( -355 -70 0 70 ) ;
+ ROUTED met1 ( 6210 7650 ) ( 11730 * )
NEW met2 ( 6210 7650 ) ( * 7820 )
NEW met3 ( 2300 7820 0 ) ( 6210 * )
NEW li1 ( 11730 7650 ) L1M1_PR_MR
NEW met1 ( 6210 7650 ) M1M2_PR
NEW met2 ( 6210 7820 ) M2M3_PR ;
- gpio_defaults_low\[5\] ( PIN gpio_defaults[5] ) ( gpio_default_value\[5\] LO ) + USE SIGNAL
+ ROUTED met2 ( 12650 1700 0 ) ( * 3910 )
NEW li1 ( 12650 3910 ) L1M1_PR_MR
NEW met1 ( 12650 3910 ) M1M2_PR
NEW met1 ( 12650 3910 ) RECT ( -355 -70 0 70 ) ;
+ ROUTED met1 ( 5290 9690 ) ( 5750 * )
NEW met2 ( 5750 9690 ) ( * 11900 )
NEW met3 ( 2300 11900 0 ) ( 5750 * )
NEW li1 ( 5290 9690 ) L1M1_PR_MR
NEW met1 ( 5750 9690 ) M1M2_PR
NEW met2 ( 5750 11900 ) M2M3_PR ;
- gpio_defaults_low\[6\] ( PIN gpio_defaults[6] ) ( gpio_default_value\[6\] LO ) + USE SIGNAL
+ ROUTED met2 ( 14950 1700 0 ) ( * 3910 )
NEW li1 ( 14950 3910 ) L1M1_PR_MR
NEW met1 ( 14950 3910 ) M1M2_PR
NEW met1 ( 14950 3910 ) RECT ( -355 -70 0 70 ) ;
+ ROUTED met1 ( 5290 13090 ) ( 5750 * )
NEW met2 ( 5750 13090 ) ( * 13260 )
NEW met3 ( 2300 13260 0 ) ( 5750 * )
NEW li1 ( 5290 13090 ) L1M1_PR_MR
NEW met1 ( 5750 13090 ) M1M2_PR
NEW met2 ( 5750 13260 ) M2M3_PR ;
- gpio_defaults_low\[7\] ( PIN gpio_defaults[7] ) ( gpio_default_value\[7\] LO ) + USE SIGNAL
+ ROUTED met2 ( 17250 1700 0 ) ( * 3910 )
NEW li1 ( 17250 3910 ) L1M1_PR_MR
NEW met1 ( 17250 3910 ) M1M2_PR
NEW met1 ( 17250 3910 ) RECT ( -355 -70 0 70 ) ;
+ ROUTED met3 ( 2300 14620 0 ) ( 5750 * )
NEW met2 ( 5750 14450 ) ( * 14620 )
NEW met1 ( 5750 14450 ) ( 8510 * )
NEW met2 ( 5750 14620 ) M2M3_PR
NEW met1 ( 5750 14450 ) M1M2_PR
NEW li1 ( 8510 14450 ) L1M1_PR_MR ;
- gpio_defaults_low\[8\] ( PIN gpio_defaults[8] ) ( gpio_default_value\[8\] LO ) + USE SIGNAL
+ ROUTED met2 ( 19550 1700 0 ) ( * 3910 )
NEW li1 ( 19550 3910 ) L1M1_PR_MR
NEW met1 ( 19550 3910 ) M1M2_PR
NEW met1 ( 19550 3910 ) RECT ( -355 -70 0 70 ) ;
+ ROUTED met3 ( 2300 18700 0 ) ( 6210 * )
NEW met2 ( 6210 18700 ) ( * 19550 )
NEW met1 ( 6210 19550 ) ( 8050 * )
NEW met2 ( 6210 18700 ) M2M3_PR
NEW met1 ( 6210 19550 ) M1M2_PR
NEW li1 ( 8050 19550 ) L1M1_PR_MR ;
- gpio_defaults_low\[9\] ( PIN gpio_defaults[9] ) ( gpio_default_value\[9\] LO ) + USE SIGNAL
+ ROUTED met2 ( 21850 1700 0 ) ( * 3910 )
NEW li1 ( 21850 3910 ) L1M1_PR_MR
NEW met1 ( 21850 3910 ) M1M2_PR
NEW met1 ( 21850 3910 ) RECT ( -355 -70 0 70 ) ;
+ ROUTED met3 ( 2300 20060 0 ) ( 5750 * )
NEW met2 ( 5750 19890 ) ( * 20060 )
NEW met1 ( 4830 19890 ) ( 5750 * )
NEW met2 ( 5750 20060 ) M2M3_PR
NEW met1 ( 5750 19890 ) M1M2_PR
NEW li1 ( 4830 19890 ) L1M1_PR_MR ;
END NETS
END DESIGN

Binary file not shown.

View File

@ -6,53 +6,29 @@ MACRO gpio_defaults_block
CLASS BLOCK ;
FOREIGN gpio_defaults_block ;
ORIGIN 0.000 0.000 ;
SIZE 30.000 BY 11.000 ;
SIZE 17.000 BY 28.000 ;
PIN VGND
DIRECTION INPUT ;
DIRECTION INOUT ;
USE GROUND ;
PORT
LAYER met5 ;
RECT 0.000 7.180 29.900 8.780 ;
LAYER met2 ;
RECT 13.400 5.200 14.800 22.000 ;
END
PORT
LAYER met4 ;
RECT 3.800 2.480 5.200 11.120 ;
END
PORT
LAYER met4 ;
RECT 10.800 2.480 12.200 11.120 ;
END
PORT
LAYER met4 ;
RECT 17.800 2.480 19.200 11.120 ;
END
PORT
LAYER met4 ;
RECT 24.800 2.480 26.200 11.120 ;
LAYER met3 ;
RECT 2.060 16.340 16.340 17.740 ;
END
END VGND
PIN VPWR
DIRECTION INPUT ;
DIRECTION INOUT ;
USE POWER ;
PORT
LAYER met5 ;
RECT 0.000 3.680 29.900 5.280 ;
LAYER met2 ;
RECT 4.000 5.200 5.400 22.000 ;
END
PORT
LAYER met4 ;
RECT 0.300 2.480 1.700 11.120 ;
END
PORT
LAYER met4 ;
RECT 7.300 2.480 8.700 11.120 ;
END
PORT
LAYER met4 ;
RECT 14.300 2.480 15.700 11.120 ;
END
PORT
LAYER met4 ;
RECT 21.300 2.480 22.700 11.120 ;
LAYER met3 ;
RECT 2.060 8.940 16.340 10.340 ;
END
END VPWR
PIN gpio_defaults[0]
@ -60,15 +36,15 @@ MACRO gpio_defaults_block
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 1.010 0.000 1.290 2.000 ;
RECT 3.770 25.000 4.050 31.000 ;
END
END gpio_defaults[0]
PIN gpio_defaults[10]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 24.010 0.000 24.290 2.000 ;
LAYER met3 ;
RECT -3.000 21.120 3.000 21.720 ;
END
END gpio_defaults[10]
PIN gpio_defaults[11]
@ -76,7 +52,7 @@ MACRO gpio_defaults_block
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 26.310 0.000 26.590 2.000 ;
RECT 3.770 -3.000 4.050 3.000 ;
END
END gpio_defaults[11]
PIN gpio_defaults[12]
@ -84,7 +60,7 @@ MACRO gpio_defaults_block
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 28.610 0.000 28.890 2.000 ;
RECT 5.610 -3.000 5.890 3.000 ;
END
END gpio_defaults[12]
PIN gpio_defaults[1]
@ -92,106 +68,97 @@ MACRO gpio_defaults_block
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 3.310 0.000 3.590 2.000 ;
RECT 5.610 25.000 5.890 31.000 ;
END
END gpio_defaults[1]
PIN gpio_defaults[2]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 5.610 0.000 5.890 2.000 ;
LAYER met3 ;
RECT -3.000 4.800 3.000 5.400 ;
END
END gpio_defaults[2]
PIN gpio_defaults[3]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 7.910 0.000 8.190 2.000 ;
LAYER met3 ;
RECT -3.000 6.160 3.000 6.760 ;
END
END gpio_defaults[3]
PIN gpio_defaults[4]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 10.210 0.000 10.490 2.000 ;
LAYER met3 ;
RECT -3.000 7.520 3.000 8.120 ;
END
END gpio_defaults[4]
PIN gpio_defaults[5]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 12.510 0.000 12.790 2.000 ;
LAYER met3 ;
RECT -3.000 11.600 3.000 12.200 ;
END
END gpio_defaults[5]
PIN gpio_defaults[6]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 14.810 0.000 15.090 2.000 ;
LAYER met3 ;
RECT -3.000 12.960 3.000 13.560 ;
END
END gpio_defaults[6]
PIN gpio_defaults[7]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 17.110 0.000 17.390 2.000 ;
LAYER met3 ;
RECT -3.000 14.320 3.000 14.920 ;
END
END gpio_defaults[7]
PIN gpio_defaults[8]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 19.410 0.000 19.690 2.000 ;
LAYER met3 ;
RECT -3.000 18.400 3.000 19.000 ;
END
END gpio_defaults[8]
PIN gpio_defaults[9]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 21.710 0.000 21.990 2.000 ;
LAYER met3 ;
RECT -3.000 19.760 3.000 20.360 ;
END
END gpio_defaults[9]
OBS
LAYER nwell ;
RECT -0.190 9.465 30.090 11.070 ;
RECT -0.190 4.025 30.090 6.855 ;
LAYER li1 ;
RECT 0.000 2.635 29.900 10.965 ;
RECT 2.300 5.355 16.100 21.845 ;
LAYER met1 ;
RECT 0.000 2.480 29.900 11.120 ;
RECT 2.300 5.200 16.100 22.000 ;
LAYER met2 ;
RECT 0.390 11.000 1.610 11.120 ;
RECT 7.390 11.000 8.610 11.120 ;
RECT 14.390 11.000 15.610 11.120 ;
RECT 21.390 11.000 22.610 11.120 ;
RECT 0.390 2.280 28.880 11.000 ;
RECT 0.390 2.000 0.730 2.280 ;
RECT 1.570 2.000 3.030 2.280 ;
RECT 3.870 2.000 5.330 2.280 ;
RECT 6.170 2.000 7.630 2.280 ;
RECT 8.470 2.000 9.930 2.280 ;
RECT 10.770 2.000 12.230 2.280 ;
RECT 13.070 2.000 14.530 2.280 ;
RECT 15.370 2.000 16.830 2.280 ;
RECT 17.670 2.000 19.130 2.280 ;
RECT 19.970 2.000 21.430 2.280 ;
RECT 22.270 2.000 23.730 2.280 ;
RECT 24.570 2.000 26.030 2.280 ;
RECT 26.870 2.000 28.330 2.280 ;
RECT 2.860 24.720 3.490 25.570 ;
RECT 4.330 24.720 5.330 25.570 ;
RECT 6.170 24.720 7.720 25.570 ;
RECT 2.860 22.280 7.720 24.720 ;
RECT 2.860 4.920 3.720 22.280 ;
RECT 5.680 4.920 7.720 22.280 ;
RECT 2.860 3.280 7.720 4.920 ;
RECT 2.860 2.310 3.490 3.280 ;
RECT 4.330 2.310 5.330 3.280 ;
RECT 6.170 2.310 7.720 3.280 ;
LAYER met3 ;
RECT 0.300 11.000 1.700 11.045 ;
RECT 7.300 11.000 8.700 11.045 ;
RECT 14.300 11.000 15.700 11.045 ;
RECT 21.300 11.000 22.700 11.045 ;
RECT 0.300 2.555 26.200 11.000 ;
RECT 3.000 22.120 6.375 22.265 ;
RECT 3.400 18.140 6.375 22.120 ;
RECT 3.000 15.320 6.375 15.940 ;
RECT 3.400 11.200 6.375 15.320 ;
RECT 3.000 10.740 6.375 11.200 ;
RECT 3.000 8.520 6.375 8.540 ;
RECT 3.400 4.950 6.375 8.520 ;
END
END gpio_defaults_block
END LIBRARY

104
lib/gpio_defaults_block.lib Normal file
View File

@ -0,0 +1,104 @@
library (gpio_defaults_block) {
comment : "";
delay_model : table_lookup;
simulation : false;
capacitive_load_unit (1,pF);
leakage_power_unit : 1pW;
current_unit : "1A";
pulling_resistance_unit : "1kohm";
time_unit : "1ns";
voltage_unit : "1v";
library_features(report_delay_calculation);
input_threshold_pct_rise : 50;
input_threshold_pct_fall : 50;
output_threshold_pct_rise : 50;
output_threshold_pct_fall : 50;
slew_lower_threshold_pct_rise : 20;
slew_lower_threshold_pct_fall : 20;
slew_upper_threshold_pct_rise : 80;
slew_upper_threshold_pct_fall : 80;
slew_derate_from_library : 1.0;
nom_process : 1.0;
nom_temperature : 25.0;
nom_voltage : 1.80;
type ("gpio_defaults") {
base_type : array;
data_type : bit;
bit_width : 13;
bit_from : 12;
bit_to : 0;
}
cell ("gpio_defaults_block") {
pin("VPWR") {
direction : input;
capacitance : 0.0000;
}
pin("VGND") {
direction : input;
capacitance : 0.0000;
}
bus("gpio_defaults") {
bus_type : gpio_defaults;
direction : output;
capacitance : 0.0000;
pin("gpio_defaults[12]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[11]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[10]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[9]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[8]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[7]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[6]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[5]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[4]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[3]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[2]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[1]") {
direction : output;
capacitance : 0.0334;
}
pin("gpio_defaults[0]") {
direction : output;
capacitance : 0.0334;
}
}
}
}

File diff suppressed because it is too large Load Diff

View File

@ -1,118 +1,90 @@
magic
tech sky130A
magscale 1 2
timestamp 1636146660
<< nwell >>
rect -38 1893 6018 2214
rect -38 805 6018 1371
timestamp 1677507573
<< obsli1 >>
rect 0 527 5980 2193
rect 460 1071 3220 4369
<< obsm1 >>
rect 0 496 5980 2224
rect 460 1040 3220 4400
<< metal2 >>
rect 202 0 258 400
rect 662 0 718 400
rect 1122 0 1178 400
rect 1582 0 1638 400
rect 2042 0 2098 400
rect 2502 0 2558 400
rect 2962 0 3018 400
rect 3422 0 3478 400
rect 3882 0 3938 400
rect 4342 0 4398 400
rect 4802 0 4858 400
rect 5262 0 5318 400
rect 5722 0 5778 400
rect 754 5000 810 6200
rect 1122 5000 1178 6200
rect 800 1040 1080 4400
rect 2680 1040 2960 4400
rect 754 -600 810 600
rect 1122 -600 1178 600
<< obsm2 >>
rect 78 2200 322 2224
rect 1478 2200 1722 2224
rect 2878 2200 3122 2224
rect 4278 2200 4522 2224
rect 78 456 5776 2200
rect 78 400 146 456
rect 314 400 606 456
rect 774 400 1066 456
rect 1234 400 1526 456
rect 1694 400 1986 456
rect 2154 400 2446 456
rect 2614 400 2906 456
rect 3074 400 3366 456
rect 3534 400 3826 456
rect 3994 400 4286 456
rect 4454 400 4746 456
rect 4914 400 5206 456
rect 5374 400 5666 456
rect 572 4944 698 5114
rect 866 4944 1066 5114
rect 1234 4944 1544 5114
rect 572 4456 1544 4944
rect 572 984 744 4456
rect 1136 984 1544 4456
rect 572 656 1544 984
rect 572 462 698 656
rect 866 462 1066 656
rect 1234 462 1544 656
<< metal3 >>
rect -600 4224 600 4344
rect -600 3952 600 4072
rect -600 3680 600 3800
rect 412 3268 3268 3548
rect -600 2864 600 2984
rect -600 2592 600 2712
rect -600 2320 600 2440
rect 412 1788 3268 2068
rect -600 1504 600 1624
rect -600 1232 600 1352
rect -600 960 600 1080
<< obsm3 >>
rect 60 2200 340 2209
rect 1460 2200 1740 2209
rect 2860 2200 3140 2209
rect 4260 2200 4540 2209
rect 60 511 5240 2200
<< metal4 >>
rect 60 496 340 2224
rect 760 496 1040 2224
rect 1460 496 1740 2224
rect 2160 496 2440 2224
rect 2860 496 3140 2224
rect 3560 496 3840 2224
rect 4260 496 4540 2224
rect 4960 496 5240 2224
<< metal5 >>
rect 0 1436 5980 1756
rect 0 736 5980 1056
rect 600 4424 1275 4453
rect 680 3628 1275 4424
rect 600 3064 1275 3188
rect 680 2240 1275 3064
rect 600 2148 1275 2240
rect 600 1704 1275 1708
rect 680 990 1275 1704
<< labels >>
rlabel metal5 s 0 1436 5980 1756 6 VGND
port 1 nsew ground input
rlabel metal4 s 760 496 1040 2224 6 VGND
port 1 nsew ground input
rlabel metal4 s 2160 496 2440 2224 6 VGND
port 1 nsew ground input
rlabel metal4 s 3560 496 3840 2224 6 VGND
port 1 nsew ground input
rlabel metal4 s 4960 496 5240 2224 6 VGND
port 1 nsew ground input
rlabel metal5 s 0 736 5980 1056 6 VPWR
port 2 nsew power input
rlabel metal4 s 60 496 340 2224 6 VPWR
port 2 nsew power input
rlabel metal4 s 1460 496 1740 2224 6 VPWR
port 2 nsew power input
rlabel metal4 s 2860 496 3140 2224 6 VPWR
port 2 nsew power input
rlabel metal4 s 4260 496 4540 2224 6 VPWR
port 2 nsew power input
rlabel metal2 s 202 0 258 400 6 gpio_defaults[0]
rlabel metal2 s 2680 1040 2960 4400 6 VGND
port 1 nsew ground bidirectional
rlabel metal3 s 412 3268 3268 3548 6 VGND
port 1 nsew ground bidirectional
rlabel metal2 s 800 1040 1080 4400 6 VPWR
port 2 nsew power bidirectional
rlabel metal3 s 412 1788 3268 2068 6 VPWR
port 2 nsew power bidirectional
rlabel metal2 s 754 5000 810 6200 6 gpio_defaults[0]
port 3 nsew signal output
rlabel metal2 s 4802 0 4858 400 6 gpio_defaults[10]
rlabel metal3 s -600 4224 600 4344 4 gpio_defaults[10]
port 4 nsew signal output
rlabel metal2 s 5262 0 5318 400 6 gpio_defaults[11]
rlabel metal2 s 754 -600 810 600 8 gpio_defaults[11]
port 5 nsew signal output
rlabel metal2 s 5722 0 5778 400 6 gpio_defaults[12]
rlabel metal2 s 1122 -600 1178 600 8 gpio_defaults[12]
port 6 nsew signal output
rlabel metal2 s 662 0 718 400 6 gpio_defaults[1]
rlabel metal2 s 1122 5000 1178 6200 6 gpio_defaults[1]
port 7 nsew signal output
rlabel metal2 s 1122 0 1178 400 6 gpio_defaults[2]
rlabel metal3 s -600 960 600 1080 4 gpio_defaults[2]
port 8 nsew signal output
rlabel metal2 s 1582 0 1638 400 6 gpio_defaults[3]
rlabel metal3 s -600 1232 600 1352 4 gpio_defaults[3]
port 9 nsew signal output
rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[4]
rlabel metal3 s -600 1504 600 1624 4 gpio_defaults[4]
port 10 nsew signal output
rlabel metal2 s 2502 0 2558 400 6 gpio_defaults[5]
rlabel metal3 s -600 2320 600 2440 4 gpio_defaults[5]
port 11 nsew signal output
rlabel metal2 s 2962 0 3018 400 6 gpio_defaults[6]
rlabel metal3 s -600 2592 600 2712 4 gpio_defaults[6]
port 12 nsew signal output
rlabel metal2 s 3422 0 3478 400 6 gpio_defaults[7]
rlabel metal3 s -600 2864 600 2984 4 gpio_defaults[7]
port 13 nsew signal output
rlabel metal2 s 3882 0 3938 400 6 gpio_defaults[8]
rlabel metal3 s -600 3680 600 3800 4 gpio_defaults[8]
port 14 nsew signal output
rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[9]
rlabel metal3 s -600 3952 600 4072 4 gpio_defaults[9]
port 15 nsew signal output
<< properties >>
string FIXED_BBOX 0 0 3400 5600
string LEFclass BLOCK
string FIXED_BBOX 0 0 6000 2200
string LEFview TRUE
string GDS_FILE ../gds/gpio_defaults_block.gds
string GDS_END 48992
string GDS_START 20598
string GDS_END 41904
string GDS_FILE /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/signoff/gpio_defaults_block.magic.gds
string GDS_START 16846
<< end >>

View File

@ -19,52 +19,64 @@ set ::env(DESIGN_NAME) gpio_defaults_block
set ::env(DESIGN_IS_CORE) 1
set ::env(VERILOG_FILES) "\
$script_dir/../../verilog/rtl/defines.v\
$script_dir/../../verilog/rtl/gpio_defaults_block.v"
$::env(DESIGN_DIR)/../../verilog/rtl/defines.v\
$::env(DESIGN_DIR)/../../verilog/rtl/gpio_defaults_block.v"
set ::env(CLOCK_PORT) ""
set ::env(CLOCK_TREE_SYNTH) 0
## Synthesis
set ::env(SYNTH_BUFFERING) 0
set ::env(SYNTH_ELABORATE_ONLY) 1
set ::env(SYNTH_READ_BLACKBOX_LIB) 1
set ::env(SYNTH_USE_PG_PINS_DEFINES) "USE_POWER_PINS"
## Floorplan
set ::env(DIE_AREA) "0 0 30 11"
set ::env(DIE_AREA) "0 0 17 28"
set ::env(FP_SIZING) absolute
set ::env(FP_PIN_ORDER_CFG) $script_dir/pin_order.cfg
set ::env(FP_IO_VLENGTH) "2"
set ::env(FP_IO_HLENGTH) "2"
set ::env(FP_PIN_ORDER_CFG) $::env(DESIGN_DIR)/pin_order.cfg
set ::env(FP_IO_VLENGTH) 3
set ::env(FP_IO_HLENGTH) 3
set ::env(FP_IO_HEXTEND) 3
set ::env(FP_IO_VEXTEND) 3
set ::env(FP_HORIZONTAL_HALO) 0
set ::env(FP_VERTICAL_HALO) 0
set ::env(TOP_MARGIN_MULT) 0
set ::env(BOTTOM_MARGIN_MULT) 1
set ::env(LEFT_MARGIN_MULT) 0
set ::env(RIGHT_MARGIN_MULT) 0
set ::env(TOP_MARGIN_MULT) 2
set ::env(BOTTOM_MARGIN_MULT) 2
set ::env(LEFT_MARGIN_MULT) 5
set ::env(RIGHT_MARGIN_MULT) 1
set ::env(CELL_PAD) 0
set ::env(FP_TAPCELL_DIST) 8
## PDN Configuration
set ::env(FP_PDN_AUTO_ADJUST) 0
set ::env(FP_PDN_VWIDTH) 1.4
set ::env(FP_PDN_VOFFSET) 1
set ::env(FP_PDN_HOFFSET) 2
set ::env(FP_PDN_VPITCH) 7
set ::env(FP_PDN_HPITCH) 7
set ::env(FP_PDN_HWIDTH) 1.4
set ::env(FP_PDN_VOFFSET) 2.4
set ::env(FP_PDN_HOFFSET) 4.2
set ::env(FP_PDN_VSPACING) 8
set ::env(FP_PDN_HSPACING) 6
set ::env(FP_PDN_VPITCH) 18.8
set ::env(FP_PDN_HPITCH) 18.8
set ::env(FP_PDN_LOWER_LAYER) met2
set ::env(FP_PDN_UPPER_LAYER) met3
set ::env(FP_PDN_SKIPTRIM) 1
## Placement
set ::env(PL_TARGET_DENSITY) 0.92
set ::env(PL_TARGET_DENSITY) 0.45
set ::env(PL_ROUTABILITY_DRIVEN) 1
set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) 1
set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) 0
set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) 0
set ::env(PL_RESZIER_REPIAR_TIE_FANOUT) 0
set ::env(PL_RESIZER_BUFFER_OUTPUT_PORTS) 0
## Routing
set ::env(GLB_RT_MINLAYER) "2"
set ::env(GLB_RT_MAXLAYER) "5"
set ::env(GRT_MINLAYER) "met1"
set ::env(GRT_MAXLAYER) "met3"
set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) 0
## LVS
set ::env(MAGIC_EXT_USE_GDS) 1

View File

@ -1,2 +1,25 @@
#N
$1
gpio_defaults\[0\]
gpio_defaults\[1\]
$5
#W
gpio_defaults\[2\]
gpio_defaults\[3\]
gpio_defaults\[4\]
$2
gpio_defaults\[5\]
gpio_defaults\[6\]
gpio_defaults\[7\]
$2
gpio_defaults\[8\]
gpio_defaults\[9\]
gpio_defaults\[10\]
$1
#S
gpio_defaults.*
$1
gpio_defaults\[11\]
gpio_defaults\[12\]
$5

View File

@ -1 +1 @@
openlane 2021.09.09_03.00.48-53-g97579eb
OpenLane 1ed36219093ce86ddbc1b981e461c5f38e5bba72

View File

@ -1,6 +1 @@
-ne openlane
e6ba5d36a9b32a9f87626d49bf3c80cf3964ebeb
-ne skywater-pdk
c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
-ne open_pdks
f90a86bdd133bd629251d59eebb1aee8452c0f5c
open_pdks 327e268bdb7191fe07a28bd40eeac055bba9dffd

View File

@ -0,0 +1,132 @@
Mon Feb 27 14:19:13 UTC 2023 - Executing "openroad -exit -no_init -python /openlane/scripts/odbpy/lefutil.py get_metal_layers -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/layers.list /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef"
Mon Feb 27 14:19:13 UTC 2023 - Executing "/openlane/scripts/mergeLef.py -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.nom.lef -i /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef} |& tee /dev/null"
Mon Feb 27 14:19:13 UTC 2023 - Executing "/openlane/scripts/mergeLef.py -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.min.lef -i /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__min.tlef {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef} |& tee /dev/null"
Mon Feb 27 14:19:13 UTC 2023 - Executing "/openlane/scripts/mergeLef.py -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.max.lef -i /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__max.tlef {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef} |& tee /dev/null"
Mon Feb 27 14:19:13 UTC 2023 - Executing "python3 /openlane/scripts/mergeLib.py --output /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/merged.lib --name sky130A_merged /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib"
Mon Feb 27 14:19:14 UTC 2023 - Executing "python3 /openlane/scripts/libtrim.py --cell-file /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/trimmed.lib.exclude.list --output /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/trimmed.lib /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/merged.lib"
Mon Feb 27 14:19:14 UTC 2023 - Executing "python3 /openlane/scripts/libtrim.py --cell-file /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/cts/cts.lib.exclude.list --output /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/cts/cts.lib /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib"
Mon Feb 27 14:19:14 UTC 2023 - Executing "python3 /openlane/scripts/new_tracks.py -i /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/tracks.info -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/routing/config.tracks"
Mon Feb 27 14:19:14 UTC 2023 - Executing "echo {OpenLane 1ed36219093ce86ddbc1b981e461c5f38e5bba72} > /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/OPENLANE_VERSION"
Mon Feb 27 14:19:14 UTC 2023 - Executing "sed -E {s/^([[:space:]]+)pg_pin(.*)/\1pin\2\n\1 direction : "inout";/g} /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib > /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/1-sky130_fd_sc_hd__tt_025C_1v80.no_pg.lib"
Mon Feb 27 14:19:14 UTC 2023 - Executing "sed -E {s/^([[:space:]]+)pg_pin(.*)/\1pin\2\n\1 direction : "inout";/g} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/trimmed.lib > /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/1-trimmed.no_pg.lib"
Mon Feb 27 14:19:15 UTC 2023 - Executing "yosys -c /openlane/scripts/yosys/elaborate.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/synthesis/1-synthesis.log"
Mon Feb 27 14:19:15 UTC 2023 - Executing "sed -i -e {s/\(set ::env(CURRENT_NETLIST)\).*/\1 \/home\/hosni\/caravel_sky130\/caravel_redesign-2\/caravel\/openlane\/gpio_defaults_block\/runs\/23_02_27_06_19\/results\/synthesis\/gpio_defaults_block.v/} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/config.tcl"
Mon Feb 27 14:19:15 UTC 2023 - Executing "sed -i /defparam/d /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/synthesis/gpio_defaults_block.v"
Mon Feb 27 14:19:15 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/sta.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/synthesis/2-sta.log"
Mon Feb 27 14:19:16 UTC 2023 - Executing "sed -E {s/^([[:space:]]+)pg_pin(.*)/\1pin\2\n\1 direction : "inout";/g} /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib > /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/2-sky130_fd_sc_hd__tt_025C_1v80.no_pg.lib"
Mon Feb 27 14:19:16 UTC 2023 - Executing "sed -E {s/^([[:space:]]+)pg_pin(.*)/\1pin\2\n\1 direction : "inout";/g} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/trimmed.lib > /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/2-trimmed.no_pg.lib"
Mon Feb 27 14:19:16 UTC 2023 - Executing "yosys -c /openlane/scripts/yosys/elaborate.tcl |& tee /dev/null /dev/null"
Mon Feb 27 14:19:17 UTC 2023 - Executing "sed -i /defparam/d /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/synthesis/gpio_defaults_block.v"
Mon Feb 27 14:19:17 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/floorplan.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/floorplan/3-initial_fp.log"
Mon Feb 27 14:19:17 UTC 2023 - Executing "openroad -exit -no_init -python /openlane/scripts/odbpy/defutil.py extract_core_dims --output-data /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/dimensions.txt --input-lef /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.nom.lef /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/floorplan/3-initial_fp.def"
Mon Feb 27 14:19:18 UTC 2023 - Executing "openroad -exit -no_init -python /openlane/scripts/odbpy/io_place.py --config /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/pin_order.cfg --hor-layer met3 --ver-layer met2 --ver-width-mult 2 --hor-width-mult 2 --hor-extension 3 --ver-extension 3 --length 3 --unmatched-error --input-lef /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.nom.lef --output-def /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/floorplan/4-io.def --output /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/floorplan/4-io.odb /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/floorplan/3-initial_fp.odb |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/floorplan/4-place_io.log"
Mon Feb 27 14:19:18 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/tapcell.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/floorplan/5-tap.log"
Mon Feb 27 14:19:19 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/pdn.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/floorplan/6-pdn.log"
Mon Feb 27 14:19:19 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/gpl.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/placement/7-global.log"
Mon Feb 27 14:19:20 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/dpl.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/placement/8-detailed.log"
Mon Feb 27 14:19:20 UTC 2023 - Executing "sed -i -e {s/\(set ::env(CURRENT_NETLIST)\).*/\1 \/home\/hosni\/caravel_sky130\/caravel_redesign-2\/caravel\/openlane\/gpio_defaults_block\/runs\/23_02_27_06_19\/results\/placement\/gpio_defaults_block.nl.v/} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/config.tcl"
Mon Feb 27 14:19:20 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/dpl.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/routing/9-diode_legalization.log"
Mon Feb 27 14:19:21 UTC 2023 - Executing "sed -i -e {s/\(set ::env(CURRENT_NETLIST)\).*/\1 \/home\/hosni\/caravel_sky130\/caravel_redesign-2\/caravel\/openlane\/gpio_defaults_block\/runs\/23_02_27_06_19\/tmp\/routing\/diode.nl.v/} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/config.tcl"
Mon Feb 27 14:19:21 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/groute.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/routing/10-global.log"
Mon Feb 27 14:19:21 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/write_views.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/routing/10-global_write_netlist.log"
Mon Feb 27 14:19:22 UTC 2023 - Executing "sed -i -e {s/\(set ::env(CURRENT_NETLIST)\).*/\1 \/home\/hosni\/caravel_sky130\/caravel_redesign-2\/caravel\/openlane\/gpio_defaults_block\/runs\/23_02_27_06_19\/tmp\/routing\/global.nl.v/} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/config.tcl"
Mon Feb 27 14:19:22 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/fill.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/routing/12-fill.log"
Mon Feb 27 14:19:22 UTC 2023 - Executing "sed -i -e {s/\(set ::env(CURRENT_NETLIST)\).*/\1 \/home\/hosni\/caravel_sky130\/caravel_redesign-2\/caravel\/openlane\/gpio_defaults_block\/runs\/23_02_27_06_19\/tmp\/routing\/12-fill.nl.v/} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/config.tcl"
Mon Feb 27 14:19:23 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/droute.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/routing/13-detailed.log"
Mon Feb 27 14:19:23 UTC 2023 - Executing "sed -i -e {s/\(set ::env(CURRENT_NETLIST)\).*/\1 \/home\/hosni\/caravel_sky130\/caravel_redesign-2\/caravel\/openlane\/gpio_defaults_block\/runs\/23_02_27_06_19\/results\/routing\/gpio_defaults_block.nl.v/} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/config.tcl"
Mon Feb 27 14:19:23 UTC 2023 - Executing "python3 /openlane/scripts/drc_rosetta.py tr to_klayout -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/routing/drt.klayout.xml --design-name gpio_defaults_block /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/routing/drt.drc"
Mon Feb 27 14:19:24 UTC 2023 - Executing "openroad -exit -no_init -python /openlane/scripts/odbpy/wire_lengths.py --report-out /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/routing/14-wire_lengths.csv --input-lef /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.nom.lef --output-def /dev/null --output /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.odb /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.odb |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/routing/14-wire_lengths.log"
Mon Feb 27 14:19:24 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/rcx.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/15-parasitics_extraction.min.log"
Mon Feb 27 14:19:24 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/sta_multi_corner.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/16-rcx_mcsta.min.log"
Mon Feb 27 14:19:26 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/rcx.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/17-parasitics_extraction.max.log"
Mon Feb 27 14:19:27 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/sta_multi_corner.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/18-rcx_mcsta.max.log"
Mon Feb 27 14:19:28 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/rcx.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/19-parasitics_extraction.nom.log"
Mon Feb 27 14:19:29 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/sta_multi_corner.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/20-rcx_mcsta.nom.log"
Mon Feb 27 14:19:30 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/sta.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/21-rcx_sta.log"
Mon Feb 27 14:19:31 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/irdrop.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/22-irdrop.log"
Mon Feb 27 14:19:31 UTC 2023 - Executing "magic -noconsole -dnull -rcfile /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.magicrc < /openlane/scripts/magic/def/mag_gds.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/23-gdsii.log"
Mon Feb 27 14:19:32 UTC 2023 - Executing "magic -noconsole -dnull -rcfile /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.magicrc < /openlane/scripts/magic/gds/mag_with_pointers.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/23-gds_ptrs.log"
Mon Feb 27 14:19:32 UTC 2023 - Executing "sed -i -n {/^<< properties >>/,/^<< end >>/p} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff/gds_ptrs.mag"
Mon Feb 27 14:19:32 UTC 2023 - Executing "magic -noconsole -dnull -rcfile /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.magicrc < /openlane/scripts/magic/mag/lef.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/23-lef.log"
Mon Feb 27 14:19:32 UTC 2023 - Executing "magic -noconsole -dnull -rcfile /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.magicrc < /openlane/scripts/magic/lef/maglef.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/23-maglef.log"
Mon Feb 27 14:19:33 UTC 2023 - Executing "python3 /openlane/scripts/klayout/stream_out.py --output /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/signoff/gpio_defaults_block.klayout.gds --tech-file /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/klayout/tech/sky130A.lyt --props-file /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/klayout/tech/sky130A.lyp --top gpio_defaults_block --with-gds-file /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds --input-lef /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.nom.lef /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.def |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/24-gdsii-klayout.log"
Mon Feb 27 14:19:33 UTC 2023 - Executing "klayout -b -r /openlane/scripts/klayout/xor.drc -rd a=/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/signoff/gpio_defaults_block.gds -rd b=/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/signoff/gpio_defaults_block.klayout.gds -rd jobs=1 -rd rdb_out=/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/25-xor.xml -rd rpt_out=/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/25-xor.rpt |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/25-xor.log"
Mon Feb 27 14:19:34 UTC 2023 - Executing "magic -noconsole -dnull -rcfile /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.magicrc < /openlane/scripts/magic/extract_spice.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/26-gds.spice.log"
Mon Feb 27 14:19:34 UTC 2023 - Executing "openroad -exit -no_init -python /openlane/scripts/odbpy/power_utils.py write_powered_def --output /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff/26-gpio_defaults_block.p.def --input-lef /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.nom.lef --power-port VPWR --ground-port VGND --powered-netlist /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/pg_define.v /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.def |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/27-write_powered_def.log"
Mon Feb 27 14:19:36 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/write_views.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/27-write_powered_verilog.log"
Mon Feb 27 14:19:36 UTC 2023 - Executing "sed -i -e {s/\(set ::env(CURRENT_NETLIST)\).*/\1 \/home\/hosni\/caravel_sky130\/caravel_redesign-2\/caravel\/openlane\/gpio_defaults_block\/runs\/23_02_27_06_19\/tmp\/signoff\/26-gpio_defaults_block.nl.v/} /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/config.tcl"
Mon Feb 27 14:19:37 UTC 2023 - Executing "netgen -batch source /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff/29-setup_file.gds.lvs |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/29-lvs.gds.log"
Mon Feb 27 14:19:37 UTC 2023 - Executing "magic -noconsole -dnull -rcfile /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.magicrc < /openlane/scripts/magic/drc.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/30-drc.log"
Mon Feb 27 14:19:38 UTC 2023 - Executing "python3 /openlane/scripts/drc_rosetta.py magic to_tcl -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc.tcl /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc.rpt"
Mon Feb 27 14:19:38 UTC 2023 - Executing "python3 /openlane/scripts/drc_rosetta.py magic to_tr -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc.tr /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc.rpt"
Mon Feb 27 14:19:38 UTC 2023 - Executing "python3 /openlane/scripts/drc_rosetta.py tr to_klayout -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc.klayout.xml --design-name gpio_defaults_block /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc.tr"
Mon Feb 27 14:19:38 UTC 2023 - Executing "python3 /openlane/scripts/drc_rosetta.py magic to_rdb -o /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc.rdb /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc.rpt"
Mon Feb 27 14:19:38 UTC 2023 - Executing "openroad -exit /openlane/scripts/openroad/antenna_check.tcl |& tee /dev/null /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/31-antenna.log"
Mon Feb 27 14:19:39 UTC 2023 - Executing "python3 /openlane/scripts/extract_antenna_violators.py --output /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/31-antenna_violators.rpt /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/31-antenna.log"
Mon Feb 27 14:19:39 UTC 2023 - Executing "python3 /openlane/scripts/generate_reports.py -d /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block --design_name gpio_defaults_block --tag 23_02_27_06_19 --output_file /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/metrics.csv --man_report /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/manufacturability.rpt --run_path /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19"

View File

@ -0,0 +1,771 @@
# Run configs
set ::env(PDK_ROOT) {/home/hosni/swift/OpenLane/pdks}
set ::env(BASE_SDC_FILE) {/openlane/scripts/base.sdc}
set ::env(BOTTOM_MARGIN_MULT) {2}
set ::env(CARRY_SELECT_ADDER_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/csa_map.v}
set ::env(CELLS_LEF) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef}
set ::env(CELLS_LEF_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef}
set ::env(CELL_CLK_PORT) {CLK}
set ::env(CELL_PAD) {0}
set ::env(CELL_PAD_EXCLUDE) {sky130_fd_sc_hd__tap* sky130_fd_sc_hd__decap* sky130_ef_sc_hd__decap* sky130_fd_sc_hd__fill*}
set ::env(CHECK_ASSIGN_STATEMENTS) {0}
set ::env(CHECK_UNMAPPED_CELLS) {1}
set ::env(CLK_BUFFER) {sky130_fd_sc_hd__clkbuf_4}
set ::env(CLK_BUFFER_INPUT) {A}
set ::env(CLK_BUFFER_OUTPUT) {X}
set ::env(CLOCK_BUFFER_FANOUT) {16}
set ::env(CLOCK_PERIOD) {10.0}
set ::env(CLOCK_PORT) {}
set ::env(CLOCK_TREE_SYNTH) {0}
set ::env(CLOCK_WIRE_RC_LAYER) {met5}
set ::env(CONFIGS) {general.tcl checkers.tcl synthesis.tcl floorplan.tcl cts.tcl placement.tcl routing.tcl extraction.tcl}
set ::env(CTS_CLK_BUFFER_LIST) {sky130_fd_sc_hd__clkbuf_8 sky130_fd_sc_hd__clkbuf_4 sky130_fd_sc_hd__clkbuf_2}
set ::env(CTS_CLK_MAX_WIRE_LENGTH) {0}
set ::env(CTS_DISABLE_POST_PROCESSING) {0}
set ::env(CTS_DISTANCE_BETWEEN_BUFFERS) {0}
set ::env(CTS_MAX_CAP) {1.53169}
set ::env(CTS_REPORT_TIMING) {1}
set ::env(CTS_ROOT_BUFFER) {sky130_fd_sc_hd__clkbuf_16}
set ::env(CTS_SINK_CLUSTERING_MAX_DIAMETER) {50}
set ::env(CTS_SINK_CLUSTERING_SIZE) {25}
set ::env(CTS_SQR_CAP) {0.258e-3}
set ::env(CTS_SQR_RES) {0.125}
set ::env(CTS_TARGET_SKEW) {200}
set ::env(CTS_TECH_DIR) {N/A}
set ::env(CTS_TOLERANCE) {100}
set ::env(CVC_SCRIPTS_DIR) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/cvc}
set ::env(DATA_WIRE_RC_LAYER) {met2}
set ::env(DECAP_CELL) {sky130_ef_sc_hd__decap_12 sky130_fd_sc_hd__decap_8 sky130_fd_sc_hd__decap_6 sky130_fd_sc_hd__decap_4 sky130_fd_sc_hd__decap_3}
set ::env(DEFAULT_MAX_TRAN) {0.75}
set ::env(DEF_UNITS_PER_MICRON) {1000}
set ::env(DESIGN_CONFIG) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/config.tcl}
set ::env(DESIGN_IS_CORE) {1}
set ::env(DESIGN_NAME) {gpio_defaults_block}
set ::env(DETAILED_ROUTER) {tritonroute}
set ::env(DIE_AREA) {0 0 17 28}
set ::env(DIODE_CELL) {sky130_fd_sc_hd__diode_2}
set ::env(DIODE_CELL_PIN) {DIODE}
set ::env(DIODE_INSERTION_STRATEGY) {3}
set ::env(DIODE_PADDING) {2}
set ::env(DPL_CELL_PADDING) {4}
set ::env(DRC_EXCLUDE_CELL_LIST) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/drc_exclude.cells}
set ::env(DRC_EXCLUDE_CELL_LIST_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/drc_exclude.cells}
set ::env(DRT_OPT_ITERS) {64}
set ::env(ECO_ENABLE) {0}
set ::env(ECO_FINISH) {0}
set ::env(ECO_ITER) {0}
set ::env(ECO_SKIP_PIN) {1}
set ::env(FAKEDIODE_CELL) {sky130_ef_sc_hd__fakediode_2}
set ::env(FILL_CELL) {sky130_fd_sc_hd__fill*}
set ::env(FP_ASPECT_RATIO) {1}
set ::env(FP_CORE_UTIL) {50}
set ::env(FP_ENDCAP_CELL) {sky130_fd_sc_hd__decap_3}
set ::env(FP_IO_HEXTEND) {3}
set ::env(FP_IO_HLAYER) {met3}
set ::env(FP_IO_HLENGTH) {3}
set ::env(FP_IO_HTHICKNESS_MULT) {2}
set ::env(FP_IO_MIN_DISTANCE) {3}
set ::env(FP_IO_MODE) {1}
set ::env(FP_IO_UNMATCHED_ERROR) {1}
set ::env(FP_IO_VEXTEND) {3}
set ::env(FP_IO_VLAYER) {met2}
set ::env(FP_IO_VLENGTH) {3}
set ::env(FP_IO_VTHICKNESS_MULT) {2}
set ::env(FP_PDN_AUTO_ADJUST) {0}
set ::env(FP_PDN_CHECK_NODES) {1}
set ::env(FP_PDN_CORE_RING) {0}
set ::env(FP_PDN_CORE_RING_HOFFSET) {6}
set ::env(FP_PDN_CORE_RING_HSPACING) {1.7}
set ::env(FP_PDN_CORE_RING_HWIDTH) {1.6}
set ::env(FP_PDN_CORE_RING_VOFFSET) {6}
set ::env(FP_PDN_CORE_RING_VSPACING) {1.7}
set ::env(FP_PDN_CORE_RING_VWIDTH) {1.6}
set ::env(FP_PDN_ENABLE_GLOBAL_CONNECTIONS) {1}
set ::env(FP_PDN_ENABLE_MACROS_GRID) {1}
set ::env(FP_PDN_ENABLE_RAILS) {1}
set ::env(FP_PDN_HOFFSET) {4.2}
set ::env(FP_PDN_HORIZONTAL_HALO) {10}
set ::env(FP_PDN_HPITCH) {18.8}
set ::env(FP_PDN_HSPACING) {6}
set ::env(FP_PDN_HWIDTH) {1.4}
set ::env(FP_PDN_IRDROP) {1}
set ::env(FP_PDN_LOWER_LAYER) {met2}
set ::env(FP_PDN_RAILS_LAYER) {met1}
set ::env(FP_PDN_RAIL_OFFSET) {0}
set ::env(FP_PDN_RAIL_WIDTH) {0.48}
set ::env(FP_PDN_SKIPTRIM) {1}
set ::env(FP_PDN_UPPER_LAYER) {met3}
set ::env(FP_PDN_VERTICAL_HALO) {10}
set ::env(FP_PDN_VOFFSET) {2.4}
set ::env(FP_PDN_VPITCH) {18.8}
set ::env(FP_PDN_VSPACING) {8}
set ::env(FP_PDN_VWIDTH) {1.4}
set ::env(FP_PIN_ORDER_CFG) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/pin_order.cfg}
set ::env(FP_SIZING) {absolute}
set ::env(FP_TAPCELL_DIST) {8}
set ::env(FP_TAP_HORIZONTAL_HALO) {10}
set ::env(FP_TAP_VERTICAL_HALO) {10}
set ::env(FP_WELLTAP_CELL) {sky130_fd_sc_hd__tapvpwrvgnd_1}
set ::env(FULL_ADDER_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/fa_map.v}
set ::env(GDS_FILES) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds}
set ::env(GDS_FILES_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds}
set ::env(GENERATE_FINAL_SUMMARY_REPORT) {1}
set ::env(GLB_CFG_FILE) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/config.tcl}
set ::env(GLB_OPTIMIZE_MIRRORING) {1}
set ::env(GLB_RESIZER_ALLOW_SETUP_VIOS) {0}
set ::env(GLB_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
set ::env(GLB_RESIZER_HOLD_SLACK_MARGIN) {0.05}
set ::env(GLB_RESIZER_MAX_CAP_MARGIN) {10}
set ::env(GLB_RESIZER_MAX_SLEW_MARGIN) {10}
set ::env(GLB_RESIZER_MAX_WIRE_LENGTH) {0}
set ::env(GLB_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
set ::env(GLB_RESIZER_SETUP_SLACK_MARGIN) {0.025}
set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) {0}
set ::env(GLOBAL_ROUTER) {fastroute}
set ::env(GND_PIN) {VGND}
set ::env(GPIO_PADS_LEF) { /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_io/lef/sky130_fd_io.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_io/lef/sky130_ef_io.lef }
set ::env(GPIO_PADS_LEF_CORE_SIDE) { /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/custom_cells/lef/sky130_fd_io_core.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/custom_cells/lef/sky130_ef_io_core.lef }
set ::env(GPIO_PADS_PREFIX) {sky130_fd_io sky130_ef_io}
set ::env(GPIO_PADS_VERILOG) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/verilog/sky130_fd_io/sky130_ef_io.v}
set ::env(GPL_CELL_PADDING) {0}
set ::env(GRT_ADJUSTMENT) {0.3}
set ::env(GRT_ALLOW_CONGESTION) {0}
set ::env(GRT_ANT_ITERS) {3}
set ::env(GRT_ESTIMATE_PARASITICS) {1}
set ::env(GRT_LAYER_ADJUSTMENTS) {0.99,0,0,0,0,0}
set ::env(GRT_MACRO_EXTENSION) {0}
set ::env(GRT_MAXLAYER) {met3}
set ::env(GRT_MAX_DIODE_INS_ITERS) {1}
set ::env(GRT_MINLAYER) {met1}
set ::env(GRT_OVERFLOW_ITERS) {50}
set ::env(IO_PCT) {0.2}
set ::env(KLAYOUT_DRC_KLAYOUT_GDS) {0}
set ::env(KLAYOUT_DRC_TECH_SCRIPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/klayout/drc/sky130A_mr.drc}
set ::env(KLAYOUT_PROPERTIES) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/klayout/tech/sky130A.lyp}
set ::env(KLAYOUT_TECH) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/klayout/tech/sky130A.lyt}
set ::env(KLAYOUT_XOR_GDS) {1}
set ::env(KLAYOUT_XOR_THREADS) {1}
set ::env(KLAYOUT_XOR_XML) {1}
set ::env(LEC_ENABLE) {0}
set ::env(LEFT_MARGIN_MULT) {5}
set ::env(LIB_FASTEST) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ff_n40C_1v95.lib}
set ::env(LIB_SLOWEST) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ss_100C_1v60.lib}
set ::env(LIB_SLOWEST_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ss_100C_1v60.lib}
set ::env(LIB_SYNTH) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
set ::env(LIB_TYPICAL) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
set ::env(LOGS_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs}
set ::env(LVS_CONNECT_BY_LABEL) {0}
set ::env(LVS_INSERT_POWER_PINS) {1}
set ::env(MACRO_BLOCKAGES_LAYER) {li1 met1 met2 met3 met4}
set ::env(MAGIC_CONVERT_DRC_TO_RDB) {1}
set ::env(MAGIC_DEF_LABELS) {1}
set ::env(MAGIC_DEF_NO_BLOCKAGES) {1}
set ::env(MAGIC_DISABLE_HIER_GDS) {1}
set ::env(MAGIC_DRC_USE_GDS) {1}
set ::env(MAGIC_EXT_USE_GDS) {1}
set ::env(MAGIC_GDS_ALLOW_ABSTRACT) {0}
set ::env(MAGIC_GDS_POLYGON_SUBCELLS) {0}
set ::env(MAGIC_GENERATE_GDS) {1}
set ::env(MAGIC_GENERATE_LEF) {1}
set ::env(MAGIC_GENERATE_MAGLEF) {1}
set ::env(MAGIC_INCLUDE_GDS_POINTERS) {0}
set ::env(MAGIC_MAGICRC) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.magicrc}
set ::env(MAGIC_PAD) {0}
set ::env(MAGIC_TECH_FILE) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.tech}
set ::env(MAGIC_WRITE_FULL_LEF) {0}
set ::env(MAGIC_ZEROIZE_ORIGIN) {0}
set ::env(NETGEN_SETUP_FILE) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/netgen/sky130A_setup.tcl}
set ::env(NO_SYNTH_CELL_LIST) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/no_synth.cells}
set ::env(OPENLANE_VERBOSE) {1}
set ::env(PDKPATH) {/home/hosni/swift/OpenLane/pdks/sky130A}
set ::env(PDN_CFG) {/openlane/scripts/openroad/common/pdn_cfg.tcl}
set ::env(PLACE_SITE) {unithd}
set ::env(PLACE_SITE_HEIGHT) {2.720}
set ::env(PLACE_SITE_WIDTH) {0.460}
set ::env(PL_BASIC_PLACEMENT) {0}
set ::env(PL_ESTIMATE_PARASITICS) {1}
set ::env(PL_LIB) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
set ::env(PL_MACRO_CHANNEL) {0 0}
set ::env(PL_MACRO_HALO) {0 0}
set ::env(PL_MAX_DISPLACEMENT_X) {500}
set ::env(PL_MAX_DISPLACEMENT_Y) {100}
set ::env(PL_OPTIMIZE_MIRRORING) {1}
set ::env(PL_RANDOM_GLB_PLACEMENT) {0}
set ::env(PL_RANDOM_INITIAL_PLACEMENT) {0}
set ::env(PL_RESIZER_ALLOW_SETUP_VIOS) {0}
set ::env(PL_RESIZER_BUFFER_INPUT_PORTS) {1}
set ::env(PL_RESIZER_BUFFER_OUTPUT_PORTS) {0}
set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) {0}
set ::env(PL_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
set ::env(PL_RESIZER_HOLD_SLACK_MARGIN) {0.1}
set ::env(PL_RESIZER_MAX_CAP_MARGIN) {20}
set ::env(PL_RESIZER_MAX_SLEW_MARGIN) {20}
set ::env(PL_RESIZER_MAX_WIRE_LENGTH) {0}
set ::env(PL_RESIZER_REPAIR_TIE_FANOUT) {1}
set ::env(PL_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
set ::env(PL_RESIZER_SETUP_SLACK_MARGIN) {0.05}
set ::env(PL_RESIZER_TIE_SEPERATION) {0}
set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) {0}
set ::env(PL_RESZIER_REPIAR_TIE_FANOUT) {0}
set ::env(PL_ROUTABILITY_DRIVEN) {1}
set ::env(PL_SKIP_INITIAL_PLACEMENT) {0}
set ::env(PL_TARGET_DENSITY) {0.45}
set ::env(PL_TIME_DRIVEN) {1}
set ::env(PRIMARY_SIGNOFF_TOOL) {magic}
set ::env(PROCESS) {130}
set ::env(QUIT_ON_HOLD_VIOLATIONS) {1}
set ::env(QUIT_ON_ILLEGAL_OVERLAPS) {1}
set ::env(QUIT_ON_LONG_WIRE) {0}
set ::env(QUIT_ON_LVS_ERROR) {1}
set ::env(QUIT_ON_MAGIC_DRC) {1}
set ::env(QUIT_ON_SETUP_VIOLATIONS) {1}
set ::env(QUIT_ON_TIMING_VIOLATIONS) {1}
set ::env(QUIT_ON_TR_DRC) {1}
set ::env(QUIT_ON_XOR_ERROR) {0}
set ::env(RCX_CC_MODEL) {10}
set ::env(RCX_CONTEXT_DEPTH) {5}
set ::env(RCX_CORNER_COUNT) {1}
set ::env(RCX_COUPLING_THRESHOLD) {0.1}
set ::env(RCX_MAX_RESISTANCE) {50}
set ::env(RCX_MERGE_VIA_WIRE_RES) {1}
set ::env(RCX_RULES) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre}
set ::env(RCX_RULES_MAX) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre}
set ::env(RCX_RULES_MIN) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre}
set ::env(REPORTS_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports}
set ::env(RESULTS_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results}
set ::env(RE_BUFFER_CELL) {sky130_fd_sc_hd__buf_4}
set ::env(RIGHT_MARGIN_MULT) {1}
set ::env(RIPPLE_CARRY_ADDER_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/rca_map.v}
set ::env(ROOT_CLK_BUFFER) {sky130_fd_sc_hd__clkbuf_16}
set ::env(ROUTING_CORES) {2}
set ::env(RSZ_DONT_TOUCH_RX) {$^}
set ::env(RSZ_USE_OLD_REMOVER) {0}
set ::env(RT_MAX_LAYER) {met5}
set ::env(RT_MIN_LAYER) {met1}
set ::env(RUN_CVC) {1}
set ::env(RUN_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19}
set ::env(RUN_DRT) {1}
set ::env(RUN_FILL_INSERTION) {1}
set ::env(RUN_IRDROP_REPORT) {1}
set ::env(RUN_KLAYOUT) {1}
set ::env(RUN_KLAYOUT_DRC) {0}
set ::env(RUN_KLAYOUT_XOR) {1}
set ::env(RUN_LVS) {1}
set ::env(RUN_MAGIC) {1}
set ::env(RUN_MAGIC_DRC) {1}
set ::env(RUN_SPEF_EXTRACTION) {1}
set ::env(RUN_TAG) {23_02_27_06_19}
set ::env(RUN_TAP_DECAP_INSERTION) {1}
set ::env(SCLPATH) {/home/hosni/swift/OpenLane/pdks/sky130A/sky130_fd_sc_hd}
set ::env(SPEF_EXTRACTOR) {openrcx}
set ::env(START_TIME) {2023.02.27_14.19.12}
set ::env(STA_REPORT_POWER) {1}
set ::env(STA_WRITE_LIB) {1}
set ::env(STD_CELL_GROUND_PINS) {VGND VNB}
set ::env(STD_CELL_LIBRARY) {sky130_fd_sc_hd}
set ::env(STD_CELL_LIBRARY_CDL) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/cdl/sky130_fd_sc_hd.cdl}
set ::env(STD_CELL_LIBRARY_OPT) {sky130_fd_sc_hd}
set ::env(STD_CELL_LIBRARY_OPT_CDL) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/cdl/sky130_fd_sc_hd.cdl}
set ::env(STD_CELL_POWER_PINS) {VPWR VPB}
set ::env(SYNTH_ADDER_TYPE) {YOSYS}
set ::env(SYNTH_BIN) {yosys}
set ::env(SYNTH_BUFFERING) {0}
set ::env(SYNTH_CAP_LOAD) {33.442}
set ::env(SYNTH_CLOCK_TRANSITION) {0.15}
set ::env(SYNTH_CLOCK_UNCERTAINTY) {0.25}
set ::env(SYNTH_DRIVING_CELL) {sky130_fd_sc_hd__inv_2}
set ::env(SYNTH_DRIVING_CELL_PIN) {Y}
set ::env(SYNTH_ELABORATE_ONLY) {1}
set ::env(SYNTH_EXTRA_MAPPING_FILE) {}
set ::env(SYNTH_FLAT_TOP) {0}
set ::env(SYNTH_LATCH_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/latch_map.v}
set ::env(SYNTH_MAX_FANOUT) {10}
set ::env(SYNTH_MIN_BUF_PORT) {sky130_fd_sc_hd__buf_2 A X}
set ::env(SYNTH_MUX4_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/mux4_map.v}
set ::env(SYNTH_MUX_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/mux2_map.v}
set ::env(SYNTH_NO_FLAT) {0}
set ::env(SYNTH_READ_BLACKBOX_LIB) {1}
set ::env(SYNTH_SCRIPT) {/openlane/scripts/yosys/synth.tcl}
set ::env(SYNTH_SHARE_RESOURCES) {1}
set ::env(SYNTH_SIZING) {0}
set ::env(SYNTH_STRATEGY) {AREA 0}
set ::env(SYNTH_TIEHI_PORT) {sky130_fd_sc_hd__conb_1 HI}
set ::env(SYNTH_TIELO_PORT) {sky130_fd_sc_hd__conb_1 LO}
set ::env(SYNTH_TIMING_DERATE) {0.05}
set ::env(SYNTH_USE_PG_PINS_DEFINES) {USE_POWER_PINS}
set ::env(TAKE_LAYOUT_SCROT) {0}
set ::env(TECH_LEF) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef}
set ::env(TECH_LEF_MAX) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__max.tlef}
set ::env(TECH_LEF_MIN) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__min.tlef}
set ::env(TECH_LEF_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef}
set ::env(TERMINAL_OUTPUT) {/dev/null}
set ::env(TMP_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp}
set ::env(TOP_MARGIN_MULT) {2}
set ::env(TRACKS_INFO_FILE) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/tracks.info}
set ::env(TRISTATE_BUFFER_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/tribuff_map.v}
set ::env(USE_ARC_ANTENNA_CHECK) {1}
set ::env(USE_GPIO_PADS) {0}
set ::env(VDD_PIN) {VPWR}
set ::env(VERILOG_FILES) { /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/../../verilog/rtl/defines.v /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/../../verilog/rtl/gpio_defaults_block.v}
set ::env(WIRE_RC_LAYER) {met1}
set ::env(YOSYS_REWRITE_VERILOG) {0}
set ::env(cts_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/cts}
set ::env(cts_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/cts}
set ::env(cts_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/cts}
set ::env(cts_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/cts}
set ::env(eco_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/eco}
set ::env(eco_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/eco}
set ::env(eco_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/eco}
set ::env(eco_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/eco}
set ::env(floorplan_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/floorplan}
set ::env(floorplan_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/floorplan}
set ::env(floorplan_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/floorplan}
set ::env(floorplan_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/floorplan}
set ::env(placement_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/placement}
set ::env(placement_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/placement}
set ::env(placement_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/placement}
set ::env(placement_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/placement}
set ::env(routing_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/routing}
set ::env(routing_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/routing}
set ::env(routing_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing}
set ::env(routing_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/routing}
set ::env(signoff_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff}
set ::env(signoff_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff}
set ::env(signoff_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/signoff}
set ::env(signoff_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff}
set ::env(synthesis_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/synthesis}
set ::env(synthesis_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/synthesis}
set ::env(synthesis_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/synthesis}
set ::env(synthesis_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis}
set ::env(SYNTH_MAX_TRAN) {0.75}
set ::env(CURRENT_INDEX) 31
set ::env(CURRENT_DEF) /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.def
set ::env(CURRENT_GUIDE) /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/routing/10-global.guide
set ::env(CURRENT_NETLIST) /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff/26-gpio_defaults_block.nl.v
set ::env(CURRENT_POWERED_NETLIST) {0}
set ::env(CURRENT_ODB) /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.odb
set ::env(PDK_ROOT) {/home/hosni/swift/OpenLane/pdks}
set ::env(ANTENNA_CHECK_CURRENT_DEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff/26-gpio_defaults_block.p.def}
set ::env(ANTENNA_VIOLATOR_LIST) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/31-antenna_violators.rpt}
set ::env(BASE_SDC_FILE) {/openlane/scripts/base.sdc}
set ::env(BASIC_PREP_COMPLETE) {1}
set ::env(BOTTOM_MARGIN_MULT) {2}
set ::env(CARAVEL_ROOT) {/home/hosni/caravel_sky130/caravel}
set ::env(CARRY_SELECT_ADDER_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/csa_map.v}
set ::env(CELLS_LEF) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef}
set ::env(CELLS_LEF_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_ef_sc_hd.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef}
set ::env(CELL_CLK_PORT) {CLK}
set ::env(CELL_PAD) {0}
set ::env(CELL_PAD_EXCLUDE) {sky130_fd_sc_hd__tap* sky130_fd_sc_hd__decap* sky130_ef_sc_hd__decap* sky130_fd_sc_hd__fill*}
set ::env(CHECK_ASSIGN_STATEMENTS) {0}
set ::env(CHECK_UNMAPPED_CELLS) {1}
set ::env(CLK_BUFFER) {sky130_fd_sc_hd__clkbuf_4}
set ::env(CLK_BUFFER_INPUT) {A}
set ::env(CLK_BUFFER_OUTPUT) {X}
set ::env(CLOCK_BUFFER_FANOUT) {16}
set ::env(CLOCK_PERIOD) {10.0}
set ::env(CLOCK_PORT) {}
set ::env(CLOCK_TREE_SYNTH) {0}
set ::env(CLOCK_WIRE_RC_LAYER) {met5}
set ::env(CONFIGS) {general.tcl checkers.tcl synthesis.tcl floorplan.tcl cts.tcl placement.tcl routing.tcl extraction.tcl}
set ::env(CORE_AREA) {2.3 5.44 16.1 21.76}
set ::env(CORE_HEIGHT) {16.32}
set ::env(CORE_WIDTH) {13.8}
set ::env(CTS_CLK_BUFFER_LIST) {sky130_fd_sc_hd__clkbuf_8 sky130_fd_sc_hd__clkbuf_4 sky130_fd_sc_hd__clkbuf_2}
set ::env(CTS_CLK_MAX_WIRE_LENGTH) {0}
set ::env(CTS_CURRENT_DEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/placement/gpio_defaults_block.def}
set ::env(CTS_DISABLE_POST_PROCESSING) {0}
set ::env(CTS_DISTANCE_BETWEEN_BUFFERS) {0}
set ::env(CTS_MAX_CAP) {1.53169}
set ::env(CTS_REPORT_TIMING) {1}
set ::env(CTS_ROOT_BUFFER) {sky130_fd_sc_hd__clkbuf_16}
set ::env(CTS_SINK_CLUSTERING_MAX_DIAMETER) {50}
set ::env(CTS_SINK_CLUSTERING_SIZE) {25}
set ::env(CTS_SQR_CAP) {0.258e-3}
set ::env(CTS_SQR_RES) {0.125}
set ::env(CTS_TARGET_SKEW) {200}
set ::env(CTS_TECH_DIR) {N/A}
set ::env(CTS_TOLERANCE) {100}
set ::env(CURRENT_DEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff/26-gpio_defaults_block.p.def}
set ::env(CURRENT_GDS) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/signoff/gpio_defaults_block.gds}
set ::env(CURRENT_GUIDE) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/routing/10-global.guide}
set ::env(CURRENT_INDEX) {31}
set ::env(CURRENT_LIB) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/mca/process_corner_nom/gpio_defaults_block.lib}
set ::env(CURRENT_NETLIST) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff/26-gpio_defaults_block.nl.v}
set ::env(CURRENT_ODB) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.odb}
set ::env(CURRENT_POWERED_NETLIST) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff/26-gpio_defaults_block.pnl.v}
set ::env(CURRENT_SDC) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/floorplan/3-initial_fp.sdc}
set ::env(CURRENT_SDF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/mca/process_corner_nom/gpio_defaults_block.sdf}
set ::env(CURRENT_SPEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/mca/process_corner_nom/gpio_defaults_block.spef}
set ::env(CURRENT_STEP) {}
set ::env(CVC_SCRIPTS_DIR) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/cvc}
set ::env(DATA_WIRE_RC_LAYER) {met2}
set ::env(DECAP_CELL) {sky130_ef_sc_hd__decap_12 sky130_fd_sc_hd__decap_8 sky130_fd_sc_hd__decap_6 sky130_fd_sc_hd__decap_4 sky130_fd_sc_hd__decap_3}
set ::env(DEFAULT_MAX_TRAN) {0.75}
set ::env(DEF_UNITS_PER_MICRON) {1000}
set ::env(DESIGN_CONFIG) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/config.tcl}
set ::env(DESIGN_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block}
set ::env(DESIGN_IS_CORE) {1}
set ::env(DESIGN_NAME) {gpio_defaults_block}
set ::env(DETAILED_ROUTER) {tritonroute}
set ::env(DIE_AREA) {0.0 0.0 17.0 28.0}
set ::env(DIODE_CELL) {sky130_fd_sc_hd__diode_2}
set ::env(DIODE_CELL_PIN) {DIODE}
set ::env(DIODE_INSERTION_CURRENT_DEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.def}
set ::env(DIODE_INSERTION_STRATEGY) {3}
set ::env(DIODE_PADDING) {2}
set ::env(DONT_USE_CELLS) {sky130_fd_sc_hd__a2111oi_0 sky130_fd_sc_hd__a21boi_0 sky130_fd_sc_hd__and2_0 sky130_fd_sc_hd__buf_16 sky130_fd_sc_hd__clkdlybuf4s15_1 sky130_fd_sc_hd__clkdlybuf4s18_1 sky130_fd_sc_hd__fa_4 sky130_fd_sc_hd__lpflow_bleeder_1 sky130_fd_sc_hd__lpflow_clkbufkapwr_1 sky130_fd_sc_hd__lpflow_clkbufkapwr_16 sky130_fd_sc_hd__lpflow_clkbufkapwr_2 sky130_fd_sc_hd__lpflow_clkbufkapwr_4 sky130_fd_sc_hd__lpflow_clkbufkapwr_8 sky130_fd_sc_hd__lpflow_clkinvkapwr_1 sky130_fd_sc_hd__lpflow_clkinvkapwr_16 sky130_fd_sc_hd__lpflow_clkinvkapwr_2 sky130_fd_sc_hd__lpflow_clkinvkapwr_4 sky130_fd_sc_hd__lpflow_clkinvkapwr_8 sky130_fd_sc_hd__lpflow_decapkapwr_12 sky130_fd_sc_hd__lpflow_decapkapwr_3 sky130_fd_sc_hd__lpflow_decapkapwr_4 sky130_fd_sc_hd__lpflow_decapkapwr_6 sky130_fd_sc_hd__lpflow_decapkapwr_8 sky130_fd_sc_hd__lpflow_inputiso0n_1 sky130_fd_sc_hd__lpflow_inputiso0p_1 sky130_fd_sc_hd__lpflow_inputiso1n_1 sky130_fd_sc_hd__lpflow_inputiso1p_1 sky130_fd_sc_hd__lpflow_inputisolatch_1 sky130_fd_sc_hd__lpflow_isobufsrc_1 sky130_fd_sc_hd__lpflow_isobufsrc_16 sky130_fd_sc_hd__lpflow_isobufsrc_2 sky130_fd_sc_hd__lpflow_isobufsrc_4 sky130_fd_sc_hd__lpflow_isobufsrc_8 sky130_fd_sc_hd__lpflow_isobufsrckapwr_16 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4 sky130_fd_sc_hd__mux4_4 sky130_fd_sc_hd__o21ai_0 sky130_fd_sc_hd__o311ai_0 sky130_fd_sc_hd__or2_0 sky130_fd_sc_hd__probe_p_8 sky130_fd_sc_hd__probec_p_8 sky130_fd_sc_hd__xor3_1 sky130_fd_sc_hd__xor3_2 sky130_fd_sc_hd__xor3_4 sky130_fd_sc_hd__xnor3_1 sky130_fd_sc_hd__xnor3_2 sky130_fd_sc_hd__xnor3_4 }
set ::env(DPL_CELL_PADDING) {4}
set ::env(DRC_CURRENT_DEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff/26-gpio_defaults_block.p.def}
set ::env(DRC_EXCLUDE_CELL_LIST) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/drc_exclude.cells}
set ::env(DRC_EXCLUDE_CELL_LIST_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/drc_exclude.cells}
set ::env(DRT_OPT_ITERS) {64}
set ::env(ECO_ENABLE) {0}
set ::env(ECO_FINISH) {0}
set ::env(ECO_ITER) {0}
set ::env(ECO_SKIP_PIN) {1}
set ::env(EXT_NETLIST) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/signoff/gpio_defaults_block.gds.spice}
set ::env(FAKEDIODE_CELL) {sky130_ef_sc_hd__fakediode_2}
set ::env(FILL_CELL) {sky130_fd_sc_hd__fill*}
set ::env(FP_ASPECT_RATIO) {1}
set ::env(FP_CORE_UTIL) {50}
set ::env(FP_ENDCAP_CELL) {sky130_fd_sc_hd__decap_3}
set ::env(FP_IO_HEXTEND) {3}
set ::env(FP_IO_HLAYER) {met3}
set ::env(FP_IO_HLENGTH) {3}
set ::env(FP_IO_HTHICKNESS_MULT) {2}
set ::env(FP_IO_MIN_DISTANCE) {3}
set ::env(FP_IO_MODE) {1}
set ::env(FP_IO_UNMATCHED_ERROR) {1}
set ::env(FP_IO_VEXTEND) {3}
set ::env(FP_IO_VLAYER) {met2}
set ::env(FP_IO_VLENGTH) {3}
set ::env(FP_IO_VTHICKNESS_MULT) {2}
set ::env(FP_PDN_AUTO_ADJUST) {0}
set ::env(FP_PDN_CHECK_NODES) {1}
set ::env(FP_PDN_CORE_RING) {0}
set ::env(FP_PDN_CORE_RING_HOFFSET) {6}
set ::env(FP_PDN_CORE_RING_HSPACING) {1.7}
set ::env(FP_PDN_CORE_RING_HWIDTH) {1.6}
set ::env(FP_PDN_CORE_RING_VOFFSET) {6}
set ::env(FP_PDN_CORE_RING_VSPACING) {1.7}
set ::env(FP_PDN_CORE_RING_VWIDTH) {1.6}
set ::env(FP_PDN_ENABLE_GLOBAL_CONNECTIONS) {1}
set ::env(FP_PDN_ENABLE_MACROS_GRID) {1}
set ::env(FP_PDN_ENABLE_RAILS) {1}
set ::env(FP_PDN_HOFFSET) {4.2}
set ::env(FP_PDN_HORIZONTAL_HALO) {10}
set ::env(FP_PDN_HPITCH) {18.8}
set ::env(FP_PDN_HSPACING) {6}
set ::env(FP_PDN_HWIDTH) {1.4}
set ::env(FP_PDN_IRDROP) {1}
set ::env(FP_PDN_LOWER_LAYER) {met2}
set ::env(FP_PDN_RAILS_LAYER) {met1}
set ::env(FP_PDN_RAIL_OFFSET) {0}
set ::env(FP_PDN_RAIL_WIDTH) {0.48}
set ::env(FP_PDN_SKIPTRIM) {1}
set ::env(FP_PDN_UPPER_LAYER) {met3}
set ::env(FP_PDN_VERTICAL_HALO) {10}
set ::env(FP_PDN_VOFFSET) {2.4}
set ::env(FP_PDN_VPITCH) {18.8}
set ::env(FP_PDN_VSPACING) {8}
set ::env(FP_PDN_VWIDTH) {1.4}
set ::env(FP_PIN_ORDER_CFG) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/pin_order.cfg}
set ::env(FP_SIZING) {absolute}
set ::env(FP_TAPCELL_DIST) {8}
set ::env(FP_TAP_HORIZONTAL_HALO) {10}
set ::env(FP_TAP_VERTICAL_HALO) {10}
set ::env(FP_WELLTAP_CELL) {sky130_fd_sc_hd__tapvpwrvgnd_1}
set ::env(FULL_ADDER_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/fa_map.v}
set ::env(GDS_FILES) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds}
set ::env(GDS_FILES_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds}
set ::env(GENERATE_FINAL_SUMMARY_REPORT) {1}
set ::env(GLB_CFG_FILE) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/config.tcl}
set ::env(GLB_OPTIMIZE_MIRRORING) {1}
set ::env(GLB_RESIZER_ALLOW_SETUP_VIOS) {0}
set ::env(GLB_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
set ::env(GLB_RESIZER_HOLD_SLACK_MARGIN) {0.05}
set ::env(GLB_RESIZER_MAX_CAP_MARGIN) {10}
set ::env(GLB_RESIZER_MAX_SLEW_MARGIN) {10}
set ::env(GLB_RESIZER_MAX_WIRE_LENGTH) {0}
set ::env(GLB_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
set ::env(GLB_RESIZER_SETUP_SLACK_MARGIN) {0.025}
set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) {0}
set ::env(GLOBAL_ROUTER) {fastroute}
set ::env(GND_NET) {VGND}
set ::env(GND_NETS) {VGND}
set ::env(GND_PIN) {VGND}
set ::env(GPIO_PADS_LEF) { /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_io/lef/sky130_fd_io.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_io/lef/sky130_ef_io.lef }
set ::env(GPIO_PADS_LEF_CORE_SIDE) { /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/custom_cells/lef/sky130_fd_io_core.lef /home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/custom_cells/lef/sky130_ef_io_core.lef }
set ::env(GPIO_PADS_PREFIX) {sky130_fd_io sky130_ef_io}
set ::env(GPIO_PADS_VERILOG) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/verilog/sky130_fd_io/sky130_ef_io.v}
set ::env(GPL_CELL_PADDING) {0}
set ::env(GRT_ADJUSTMENT) {0.3}
set ::env(GRT_ALLOW_CONGESTION) {0}
set ::env(GRT_ANT_ITERS) {3}
set ::env(GRT_ESTIMATE_PARASITICS) {1}
set ::env(GRT_LAYER_ADJUSTMENTS) {0.99,0,0,0,0,0}
set ::env(GRT_MACRO_EXTENSION) {0}
set ::env(GRT_MAXLAYER) {met3}
set ::env(GRT_MAX_DIODE_INS_ITERS) {1}
set ::env(GRT_MINLAYER) {met1}
set ::env(GRT_OVERFLOW_ITERS) {50}
set ::env(HOME) {/}
set ::env(HOSTNAME) {d5adda714282}
set ::env(IO_PCT) {0.2}
set ::env(KLAYOUT_DRC_KLAYOUT_GDS) {0}
set ::env(KLAYOUT_DRC_TECH_SCRIPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/klayout/drc/sky130A_mr.drc}
set ::env(KLAYOUT_PROPERTIES) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/klayout/tech/sky130A.lyp}
set ::env(KLAYOUT_TECH) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/klayout/tech/sky130A.lyt}
set ::env(KLAYOUT_XOR_GDS) {1}
set ::env(KLAYOUT_XOR_THREADS) {1}
set ::env(KLAYOUT_XOR_XML) {1}
set ::env(LANG) {en_US.UTF-8}
set ::env(LAST_TIMING_REPORT_TAG) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/21-rcx_sta}
set ::env(LC_ALL) {en_US.UTF-8}
set ::env(LC_CTYPE) {en_US.UTF-8}
set ::env(LD_LIBRARY_PATH) {/build//lib:/build//lib/Linux-x86_64:}
set ::env(LEC_ENABLE) {0}
set ::env(LEFT_MARGIN_MULT) {5}
set ::env(LIB_CTS) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/cts/cts.lib}
set ::env(LIB_FASTEST) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ff_n40C_1v95.lib}
set ::env(LIB_SLOWEST) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ss_100C_1v60.lib}
set ::env(LIB_SLOWEST_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ss_100C_1v60.lib}
set ::env(LIB_SYNTH) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/trimmed.lib}
set ::env(LIB_SYNTH_COMPLETE) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
set ::env(LIB_SYNTH_COMPLETE_NO_PG) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/2-sky130_fd_sc_hd__tt_025C_1v80.no_pg.lib}
set ::env(LIB_SYNTH_MERGED) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/merged.lib}
set ::env(LIB_SYNTH_NO_PG) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/2-trimmed.no_pg.lib}
set ::env(LIB_TYPICAL) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
set ::env(LOGS_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs}
set ::env(LVS_CONNECT_BY_LABEL) {0}
set ::env(LVS_CURRENT_DEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.def}
set ::env(LVS_INSERT_POWER_PINS) {1}
set ::env(MACRO_BLOCKAGES_LAYER) {li1 met1 met2 met3 met4}
set ::env(MAGIC_CONVERT_DRC_TO_RDB) {1}
set ::env(MAGIC_DEF_LABELS) {1}
set ::env(MAGIC_DEF_NO_BLOCKAGES) {1}
set ::env(MAGIC_DISABLE_HIER_GDS) {1}
set ::env(MAGIC_DRC_USE_GDS) {1}
set ::env(MAGIC_EXT_USE_GDS) {1}
set ::env(MAGIC_GDS) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/signoff/gpio_defaults_block.magic.gds}
set ::env(MAGIC_GDS_ALLOW_ABSTRACT) {0}
set ::env(MAGIC_GDS_POLYGON_SUBCELLS) {0}
set ::env(MAGIC_GENERATE_GDS) {1}
set ::env(MAGIC_GENERATE_LEF) {1}
set ::env(MAGIC_GENERATE_MAGLEF) {1}
set ::env(MAGIC_INCLUDE_GDS_POINTERS) {0}
set ::env(MAGIC_MAGICRC) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.magicrc}
set ::env(MAGIC_PAD) {0}
set ::env(MAGIC_TECH_FILE) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/magic/sky130A.tech}
set ::env(MAGIC_WRITE_FULL_LEF) {0}
set ::env(MAGIC_ZEROIZE_ORIGIN) {0}
set ::env(MAGTYPE) {maglef}
set ::env(MANPATH) {/build//share/man:}
set ::env(MAX_METAL_LAYER) {6}
set ::env(MCW_ROOT) {/home/hosni/caravel_sky130/caravel_mgmt_soc_litex}
set ::env(MC_SDF_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/mca/sdf}
set ::env(MC_SPEF_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/mca/spef}
set ::env(MERGED_LEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.nom.lef}
set ::env(MERGED_LEF_MAX) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.max.lef}
set ::env(MERGED_LEF_MIN) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/merged.min.lef}
set ::env(MISMATCHES_OK) {1}
set ::env(NETGEN_SETUP_FILE) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/netgen/sky130A_setup.tcl}
set ::env(NO_SYNTH_CELL_LIST) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/no_synth.cells}
set ::env(OPENLANE_ROOT) {/openlane}
set ::env(OPENLANE_RUN_TAG) {23_02_27_06_19}
set ::env(OPENLANE_VERBOSE) {1}
set ::env(OPENLANE_VERSION) {1ed36219093ce86ddbc1b981e461c5f38e5bba72}
set ::env(OPENROAD) {/build/}
set ::env(OPENROAD_BIN) {openroad}
set ::env(PARSITICS_CURRENT_DEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/gpio_defaults_block.def}
set ::env(PATH) {/openlane:/openlane/scripts:/build//bin:/build//bin/Linux-x86_64:/build//pdn/scripts:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin}
set ::env(PDK) {sky130A}
set ::env(PDKPATH) {/home/hosni/swift/OpenLane/pdks/sky130A}
set ::env(PDK_ROOT) {/home/hosni/swift/OpenLane/pdks}
set ::env(PDN_CFG) {/openlane/scripts/openroad/common/pdn_cfg.tcl}
set ::env(PLACEMENT_CURRENT_DEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/floorplan/6-pdn.def}
set ::env(PLACE_SITE) {unithd}
set ::env(PLACE_SITE_HEIGHT) {2.720}
set ::env(PLACE_SITE_WIDTH) {0.460}
set ::env(PL_BASIC_PLACEMENT) {0}
set ::env(PL_ESTIMATE_PARASITICS) {1}
set ::env(PL_INIT_COEFF) {0.00002}
set ::env(PL_IO_ITER) {5}
set ::env(PL_LIB) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib}
set ::env(PL_MACRO_CHANNEL) {0 0}
set ::env(PL_MACRO_HALO) {0 0}
set ::env(PL_MAX_DISPLACEMENT_X) {500}
set ::env(PL_MAX_DISPLACEMENT_Y) {100}
set ::env(PL_OPTIMIZE_MIRRORING) {1}
set ::env(PL_RANDOM_GLB_PLACEMENT) {0}
set ::env(PL_RANDOM_INITIAL_PLACEMENT) {0}
set ::env(PL_RESIZER_ALLOW_SETUP_VIOS) {0}
set ::env(PL_RESIZER_BUFFER_INPUT_PORTS) {1}
set ::env(PL_RESIZER_BUFFER_OUTPUT_PORTS) {0}
set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) {0}
set ::env(PL_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
set ::env(PL_RESIZER_HOLD_SLACK_MARGIN) {0.1}
set ::env(PL_RESIZER_MAX_CAP_MARGIN) {20}
set ::env(PL_RESIZER_MAX_SLEW_MARGIN) {20}
set ::env(PL_RESIZER_MAX_WIRE_LENGTH) {0}
set ::env(PL_RESIZER_REPAIR_TIE_FANOUT) {1}
set ::env(PL_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
set ::env(PL_RESIZER_SETUP_SLACK_MARGIN) {0.05}
set ::env(PL_RESIZER_TIE_SEPERATION) {0}
set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) {0}
set ::env(PL_RESZIER_REPIAR_TIE_FANOUT) {0}
set ::env(PL_ROUTABILITY_DRIVEN) {1}
set ::env(PL_SKIP_INITIAL_PLACEMENT) {0}
set ::env(PL_TARGET_DENSITY) {0.45}
set ::env(PL_TIME_DRIVEN) {1}
set ::env(PRIMARY_SIGNOFF_TOOL) {magic}
set ::env(PROCESS) {130}
set ::env(PWD) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane}
set ::env(QUIT_ON_HOLD_VIOLATIONS) {1}
set ::env(QUIT_ON_ILLEGAL_OVERLAPS) {1}
set ::env(QUIT_ON_LONG_WIRE) {0}
set ::env(QUIT_ON_LVS_ERROR) {1}
set ::env(QUIT_ON_MAGIC_DRC) {1}
set ::env(QUIT_ON_SETUP_VIOLATIONS) {1}
set ::env(QUIT_ON_TIMING_VIOLATIONS) {1}
set ::env(QUIT_ON_TR_DRC) {1}
set ::env(QUIT_ON_XOR_ERROR) {0}
set ::env(RCX_CC_MODEL) {10}
set ::env(RCX_CONTEXT_DEPTH) {5}
set ::env(RCX_CORNER_COUNT) {1}
set ::env(RCX_COUPLING_THRESHOLD) {0.1}
set ::env(RCX_MAX_RESISTANCE) {50}
set ::env(RCX_MERGE_VIA_WIRE_RES) {1}
set ::env(RCX_RULES) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre}
set ::env(RCX_RULES_MAX) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre}
set ::env(RCX_RULES_MIN) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre}
set ::env(RCX_SDC_FILE) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/floorplan/3-initial_fp.sdc}
set ::env(REPORTS_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports}
set ::env(RESULTS_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results}
set ::env(RE_BUFFER_CELL) {sky130_fd_sc_hd__buf_4}
set ::env(RIGHT_MARGIN_MULT) {1}
set ::env(RIPPLE_CARRY_ADDER_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/rca_map.v}
set ::env(ROOT_CLK_BUFFER) {sky130_fd_sc_hd__clkbuf_16}
set ::env(ROUTING_CORES) {2}
set ::env(ROUTING_CURRENT_DEF) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/placement/gpio_defaults_block.def}
set ::env(RSZ_DONT_TOUCH_RX) {\$^}
set ::env(RSZ_LIB) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis/resizer_sky130_fd_sc_hd__tt_025C_1v80.lib}
set ::env(RSZ_USE_OLD_REMOVER) {0}
set ::env(RT_MAX_LAYER) {met5}
set ::env(RT_MIN_LAYER) {met1}
set ::env(RUN_CVC) {1}
set ::env(RUN_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19}
set ::env(RUN_DRT) {1}
set ::env(RUN_FILL_INSERTION) {1}
set ::env(RUN_IRDROP_REPORT) {1}
set ::env(RUN_KLAYOUT) {1}
set ::env(RUN_KLAYOUT_DRC) {0}
set ::env(RUN_KLAYOUT_XOR) {1}
set ::env(RUN_LVS) {1}
set ::env(RUN_MAGIC) {1}
set ::env(RUN_MAGIC_DRC) {1}
set ::env(RUN_SPEF_EXTRACTION) {1}
set ::env(RUN_STANDALONE) {1}
set ::env(RUN_TAG) {23_02_27_06_19}
set ::env(RUN_TAP_DECAP_INSERTION) {1}
set ::env(SCLPATH) {/home/hosni/swift/OpenLane/pdks/sky130A/sky130_fd_sc_hd}
set ::env(SCRIPTS_DIR) {/openlane/scripts}
set ::env(SHLVL) {1}
set ::env(SPEF_EXTRACTOR) {openrcx}
set ::env(START_TIME) {2023.02.27_14.19.12}
set ::env(STA_PRE_CTS) {0}
set ::env(STA_REPORT_POWER) {1}
set ::env(STA_WRITE_LIB) {1}
set ::env(STD_CELL_GROUND_PINS) {VGND VNB}
set ::env(STD_CELL_LIBRARY) {sky130_fd_sc_hd}
set ::env(STD_CELL_LIBRARY_CDL) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/cdl/sky130_fd_sc_hd.cdl}
set ::env(STD_CELL_LIBRARY_OPT) {sky130_fd_sc_hd}
set ::env(STD_CELL_LIBRARY_OPT_CDL) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/cdl/sky130_fd_sc_hd.cdl}
set ::env(STD_CELL_POWER_PINS) {VPWR VPB}
set ::env(SYNTH_ADDER_TYPE) {YOSYS}
set ::env(SYNTH_BIN) {yosys}
set ::env(SYNTH_BUFFERING) {0}
set ::env(SYNTH_CAP_LOAD) {33.442}
set ::env(SYNTH_CLOCK_TRANSITION) {0.15}
set ::env(SYNTH_CLOCK_UNCERTAINTY) {0.25}
set ::env(SYNTH_DEFINES) {USE_POWER_PINS}
set ::env(SYNTH_DRIVING_CELL) {sky130_fd_sc_hd__inv_2}
set ::env(SYNTH_DRIVING_CELL_PIN) {Y}
set ::env(SYNTH_ELABORATE_ONLY) {1}
set ::env(SYNTH_EXTRA_MAPPING_FILE) {}
set ::env(SYNTH_FLAT_TOP) {0}
set ::env(SYNTH_LATCH_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/latch_map.v}
set ::env(SYNTH_MAX_FANOUT) {10}
set ::env(SYNTH_MAX_TRAN) {0.75}
set ::env(SYNTH_MIN_BUF_PORT) {sky130_fd_sc_hd__buf_2 A X}
set ::env(SYNTH_MUX4_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/mux4_map.v}
set ::env(SYNTH_MUX_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/mux2_map.v}
set ::env(SYNTH_NO_FLAT) {0}
set ::env(SYNTH_OPT) {0}
set ::env(SYNTH_READ_BLACKBOX_LIB) {1}
set ::env(SYNTH_SCRIPT) {/openlane/scripts/yosys/elaborate.tcl}
set ::env(SYNTH_SHARE_RESOURCES) {1}
set ::env(SYNTH_SIZING) {0}
set ::env(SYNTH_STRATEGY) {AREA 0}
set ::env(SYNTH_TIEHI_PORT) {sky130_fd_sc_hd__conb_1 HI}
set ::env(SYNTH_TIELO_PORT) {sky130_fd_sc_hd__conb_1 LO}
set ::env(SYNTH_TIMING_DERATE) {0.05}
set ::env(SYNTH_USE_PG_PINS_DEFINES) {USE_POWER_PINS}
set ::env(TAKE_LAYOUT_SCROT) {0}
set ::env(TECH_LEF) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef}
set ::env(TECH_LEF_MAX) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__max.tlef}
set ::env(TECH_LEF_MIN) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__min.tlef}
set ::env(TECH_LEF_OPT) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef}
set ::env(TECH_METAL_LAYERS) {li1 met1 met2 met3 met4 met5}
set ::env(TERM) {xterm}
set ::env(TERMINAL_OUTPUT) {/dev/null}
set ::env(TMP_DIR) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp}
set ::env(TOP_MARGIN_MULT) {2}
set ::env(TRACKS_INFO_FILE) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/tracks.info}
set ::env(TRACKS_INFO_FILE_PROCESSED) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/routing/config.tracks}
set ::env(TRISTATE_BUFFER_MAP) {/home/hosni/swift/OpenLane/pdks/sky130A/libs.tech/openlane/sky130_fd_sc_hd/tribuff_map.v}
set ::env(USE_ARC_ANTENNA_CHECK) {1}
set ::env(USE_GPIO_PADS) {0}
set ::env(VCHECK_OUTPUT) {}
set ::env(VDD_NET) {VPWR}
set ::env(VDD_NETS) {VPWR}
set ::env(VDD_PIN) {VPWR}
set ::env(VERILOG_FILES) { /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/../../verilog/rtl/defines.v /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/../../verilog/rtl/gpio_defaults_block.v}
set ::env(WIRE_RC_LAYER) {met1}
set ::env(YOSYS_REWRITE_VERILOG) {0}
set ::env(_) {/openlane/flow.tcl}
set ::env(cts_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/cts}
set ::env(cts_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/cts}
set ::env(cts_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/cts}
set ::env(cts_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/cts}
set ::env(drc_prefix) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc}
set ::env(eco_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/eco}
set ::env(eco_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/eco}
set ::env(eco_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/eco}
set ::env(eco_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/eco}
set ::env(floorplan_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/floorplan}
set ::env(floorplan_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/floorplan}
set ::env(floorplan_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/floorplan}
set ::env(floorplan_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/floorplan}
set ::env(fp_report_prefix) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/floorplan/3-initial_fp}
set ::env(placement_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/placement}
set ::env(placement_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/placement}
set ::env(placement_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/placement}
set ::env(placement_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/placement}
set ::env(routing_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/routing}
set ::env(routing_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/routing}
set ::env(routing_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing}
set ::env(routing_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/routing}
set ::env(signoff_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff}
set ::env(signoff_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff}
set ::env(signoff_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/signoff}
set ::env(signoff_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/signoff}
set ::env(synth_report_prefix) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/synthesis/2-synthesis}
set ::env(synthesis_logs) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/synthesis}
set ::env(synthesis_reports) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/synthesis}
set ::env(synthesis_results) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/synthesis}
set ::env(synthesis_tmpfiles) {/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/tmp/synthesis}
set ::env(timer_end) {1677507579}
set ::env(timer_routed) {1677507564}
set ::env(timer_start) {1677507552}

View File

@ -1,2 +0,0 @@
,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
0,/project/openlane/gpio_defaults_block,gpio_defaults_block,gpio_defaults_block,flow_completed,0h0m57s,-1,78787.87878787878,0.00033,39393.93939393939,22.67,443.21,13,0,-1,-1,-1,-1,0,0,-1,0,0,-1,41,26,0.0,0.0,-1,0.0,-1,0.0,0.0,-1,0.0,-1,55260.0,0.0,2.33,0.0,0.0,0.0,-1,5,41,5,41,0,0,0,13,0,0,0,0,0,0,0,4,-1,-1,-1,6,5,0,11,90.9090909090909,11.0,10.0,AREA 0,5,50,1,7,7,0.92,0.0,sky130_fd_sc_hd,0,3
1 design design_name config flow_status total_runtime routed_runtime (Cell/mm^2)/Core_Util DIEAREA_mm^2 CellPer_mm^2 OpenDP_Util Peak_Memory_Usage_MB cell_count tritonRoute_violations Short_violations MetSpc_violations OffGrid_violations MinHole_violations Other_violations Magic_violations antenna_violations lvs_total_errors cvc_total_errors klayout_violations wire_length vias wns pl_wns optimized_wns fastroute_wns spef_wns tns pl_tns optimized_tns fastroute_tns spef_tns HPWL routing_layer1_pct routing_layer2_pct routing_layer3_pct routing_layer4_pct routing_layer5_pct routing_layer6_pct wires_count wire_bits public_wires_count public_wire_bits memories_count memory_bits processes_count cells_pre_abc AND DFF NAND NOR OR XOR XNOR MUX inputs outputs level EndCaps TapCells Diodes Total_Physical_Cells suggested_clock_frequency suggested_clock_period CLOCK_PERIOD SYNTH_STRATEGY SYNTH_MAX_FANOUT FP_CORE_UTIL FP_ASPECT_RATIO FP_PDN_VPITCH FP_PDN_HPITCH PL_TARGET_DENSITY GLB_RT_ADJUSTMENT STD_CELL_LIBRARY CELL_PAD DIODE_INSERTION_STRATEGY
2 0 /project/openlane/gpio_defaults_block gpio_defaults_block gpio_defaults_block flow_completed 0h0m57s -1 78787.87878787878 0.00033 39393.93939393939 22.67 443.21 13 0 -1 -1 -1 -1 0 0 -1 0 0 -1 41 26 0.0 0.0 -1 0.0 -1 0.0 0.0 -1 0.0 -1 55260.0 0.0 2.33 0.0 0.0 0.0 -1 5 41 5 41 0 0 0 13 0 0 0 0 0 0 0 4 -1 -1 -1 6 5 0 11 90.9090909090909 11.0 10.0 AREA 0 5 50 1 7 7 0.92 0.0 sky130_fd_sc_hd 0 3

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Design Name: gpio_defaults_block
Run Directory: /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19
----------------------------------------
Magic DRC Summary:
Source: /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/reports/signoff/drc.rpt
Total Magic DRC violations is 0
----------------------------------------
LVS Summary:
Source: /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/logs/signoff/gpio_defaults_block.lvs.lef.log
Source not found.
----------------------------------------
Antenna Summary:
No antenna report found.

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design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block,gpio_defaults_block,23_02_27_06_19,flow completed,0h0m27s0ms,0h0m12s0ms,54621.8487394958,0.000476,27310.9243697479,27.86,478.93,13,0,0,0,0,0,0,0,0,0,-1,-1,110,35,0.0,0.0,-1,0.0,0.0,0.0,0.0,-1,0.0,0.0,114016.0,0.0,14.81,8.33,0.0,0.0,0.0,3,39,3,39,0,0,0,13,0,0,0,0,0,0,0,0,-1,-1,-1,12,4,0,16,225.216,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10.0,3,1,50,18.8,18.8,0.3,0.45,sky130_fd_sc_hd,10,AREA 0
1 design design_name config flow_status total_runtime routed_runtime (Cell/mm^2)/Core_Util DIEAREA_mm^2 CellPer_mm^2 OpenDP_Util Peak_Memory_Usage_MB cell_count tritonRoute_violations Short_violations MetSpc_violations OffGrid_violations MinHole_violations Other_violations Magic_violations antenna_violations lvs_total_errors cvc_total_errors klayout_violations wire_length vias wns pl_wns optimized_wns fastroute_wns spef_wns tns pl_tns optimized_tns fastroute_tns spef_tns HPWL routing_layer1_pct routing_layer2_pct routing_layer3_pct routing_layer4_pct routing_layer5_pct routing_layer6_pct wires_count wire_bits public_wires_count public_wire_bits memories_count memory_bits processes_count cells_pre_abc AND DFF NAND NOR OR XOR XNOR MUX inputs outputs level EndCaps TapCells Diodes Total_Physical_Cells CoreArea_um^2 power_slowest_internal_uW power_slowest_switching_uW power_slowest_leakage_uW power_typical_internal_uW power_typical_switching_uW power_typical_leakage_uW power_fastest_internal_uW power_fastest_switching_uW power_fastest_leakage_uW critical_path_ns suggested_clock_period suggested_clock_frequency CLOCK_PERIOD SYNTH_STRATEGY SYNTH_MAX_FANOUT FP_CORE_UTIL FP_ASPECT_RATIO FP_PDN_VPITCH FP_PDN_HPITCH PL_TARGET_DENSITY GRT_ADJUSTMENT STD_CELL_LIBRARY DIODE_INSERTION_STRATEGY
2 /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block gpio_defaults_block 23_02_27_06_19 flow completed 0h0m27s0ms 0h0m12s0ms 54621.8487394958 0.000476 27310.9243697479 27.86 478.93 13 0 0 0 0 0 0 0 0 0 -1 -1 110 35 0.0 0.0 -1 0.0 0.0 0.0 0.0 -1 0.0 0.0 114016.0 0.0 14.81 8.33 0.0 0.0 0.0 3 39 3 39 0 0 0 13 0 0 0 0 0 0 0 0 -1 -1 -1 12 4 0 16 225.216 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10.0 100.0 10.0 3 1 50 18.8 18.8 0.3 0.45 sky130_fd_sc_hd 10 AREA 0

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===========================================================================
report_design_area
============================================================================
Design area 54 u^2 24% utilization.

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SKIPPED!

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===========================================================================
report_checks -path_delay max (Setup)
============================================================================
No paths found.

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===========================================================================
report_checks -path_delay min (Hold)
============================================================================
No paths found.

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===========================================================================
report_parasitic_annotation -report_unannotated
============================================================================
Found 13 unannotated nets.
gpio_defaults_high\[0\]
gpio_defaults_high\[11\]
gpio_defaults_high\[12\]
gpio_defaults_high\[2\]
gpio_defaults_high\[3\]
gpio_defaults_high\[4\]
gpio_defaults_high\[5\]
gpio_defaults_high\[6\]
gpio_defaults_high\[7\]
gpio_defaults_high\[8\]
gpio_defaults_high\[9\]
gpio_defaults_low\[10\]
gpio_defaults_low\[1\]
Found 0 partially unannotated nets.
parastic_annotation_check
check_slew
===========================================================================
report_check_types -max_slew -max_cap -max_fanout -violators
============================================================================
===========================================================================
max slew violation count 0
max fanout violation count 0
max cap violation count 0
============================================================================
check_slew_end
tns_report
===========================================================================
report_tns
============================================================================
tns 0.00
tns_report_end
wns_report
===========================================================================
report_wns
============================================================================
wns 0.00
wns_report_end
worst_slack
===========================================================================
report_worst_slack -max (Setup)
============================================================================
worst slack INF
===========================================================================
report_worst_slack -min (Hold)
============================================================================
worst slack INF
worst_slack_end
power_report
===========================================================================
report_power
============================================================================
Group Internal Switching Leakage Total
Power Power Power Power (Watts)
----------------------------------------------------------------
Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
Combinational 0.00e+00 0.00e+00 1.39e-10 1.39e-10 100.0%
Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
----------------------------------------------------------------
Total 0.00e+00 0.00e+00 1.39e-10 1.39e-10 100.0%
0.0% 0.0% 100.0%
power_report_end
area_report
===========================================================================
report_design_area
============================================================================
Design area 54 u^2 24% utilization.
area_report_end
Setting global connections for newly added cells...
[WARNING] Did not save OpenROAD database!
Writing SDF to /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/mca/process_corner_nom/gpio_defaults_block.sdf...
Writing timing model to /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/gpio_defaults_block/runs/23_02_27_06_19/results/routing/mca/process_corner_nom/gpio_defaults_block.lib...

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===========================================================================
report_power
============================================================================
Group Internal Switching Leakage Total
Power Power Power Power (Watts)
----------------------------------------------------------------
Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
Combinational 0.00e+00 0.00e+00 1.39e-10 1.39e-10 100.0%
Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
----------------------------------------------------------------
Total 0.00e+00 0.00e+00 1.39e-10 1.39e-10 100.0%
0.0% 0.0% 100.0%

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===========================================================================
report_checks -unconstrained
============================================================================
No paths found.
===========================================================================
report_checks --slack_max -0.01
============================================================================
No paths found.

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===========================================================================
report_check_types -max_slew -max_cap -max_fanout -violators
============================================================================
===========================================================================
max slew violation count 0
max fanout violation count 0
max cap violation count 0
============================================================================

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===========================================================================
report_tns
============================================================================
tns 0.00

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===========================================================================
report_wns
============================================================================
wns 0.00

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===========================================================================
report_worst_slack -max (Setup)
============================================================================
worst slack INF
===========================================================================
report_worst_slack -min (Hold)
============================================================================
worst slack INF

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Instance name, X location, Y location, Voltage
FILLER_4_3, 4.7, 19.04, 1.8
FILLER_5_8, 4.7, 19.04, 1.8
gpio_default_value\[8\], 4.7, 19.04, 1.8
gpio_default_value\[9\], 4.7, 19.04, 1.8
FILLER_2_3, 4.7, 13.6, 1.8
FILLER_3_16, 4.7, 13.6, 1.8
FILLER_3_3, 4.7, 13.6, 1.8
FILLER_3_9, 4.7, 13.6, 1.8
FILLER_4_14, 4.7, 13.6, 1.8
gpio_default_value\[0\], 4.7, 13.6, 1.8
gpio_default_value\[10\], 4.7, 13.6, 1.8
gpio_default_value\[7\], 4.7, 13.6, 1.8
FILLER_0_8, 4.7, 8.16, 1.8
FILLER_1_17, 4.7, 8.16, 1.8
FILLER_1_3, 4.7, 8.16, 1.8
FILLER_1_9, 4.7, 8.16, 1.8
FILLER_2_9, 4.7, 8.16, 1.8
gpio_default_value\[12\], 4.7, 8.16, 1.8
gpio_default_value\[2\], 4.7, 8.16, 1.8
gpio_default_value\[3\], 4.7, 8.16, 1.8
gpio_default_value\[5\], 4.7, 8.16, 1.8
gpio_default_value\[6\], 4.7, 8.16, 1.8
PHY_10, 2.3, 19.04, 1.8
PHY_8, 2.3, 19.04, 1.8
FILLER_4_23, 16.1, 19.04, 1.8
FILLER_5_18, 16.1, 19.04, 1.8
PHY_11, 16.1, 19.04, 1.8
PHY_9, 16.1, 19.04, 1.8
gpio_default_value\[1\], 16.1, 19.04, 1.8
PHY_4, 2.3, 13.6, 1.8
PHY_6, 2.3, 13.6, 1.8
FILLER_2_18, 16.1, 13.6, 1.8
FILLER_3_24, 16.1, 13.6, 1.8
PHY_5, 16.1, 13.6, 1.8
PHY_7, 16.1, 13.6, 1.8
PHY_0, 2.3, 8.16, 1.8
PHY_2, 2.3, 8.16, 1.8
FILLER_0_23, 16.1, 8.16, 1.8
FILLER_1_24, 16.1, 8.16, 1.8
PHY_1, 16.1, 8.16, 1.8
PHY_3, 16.1, 8.16, 1.8
gpio_default_value\[11\], 16.1, 8.16, 1.8
gpio_default_value\[4\], 16.1, 8.16, 1.8

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Total XOR differences = 464

File diff suppressed because it is too large Load Diff

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LVS reports no net, device, pin, or property mismatches.
Total errors = 0

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<?xml version="1.0" ?>
<report-database>
<categories/>
<cells>
<cell>
<name>gpio_defaults_block</name>
</cell>
</cells>
<items/>
</report-database>

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$gpio_defaults_block 100

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gpio_defaults_block
----------------------------------------
[INFO]: COUNT: 0
[INFO]: Should be divided by 3 or 4

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box 3023 4195 3141 4305
feedback add "device missing 1 terminal;
connecting remainder to node VGND" pale
box 3023 3855 3141 4029
feedback add "device missing 1 terminal;
connecting remainder to node VPWR" pale
box 2195 4195 2773 4305
feedback add "device missing 1 terminal;
connecting remainder to node VGND" pale
box 2195 3855 2773 4029
feedback add "device missing 1 terminal;
connecting remainder to node VPWR" pale
box 1275 4195 1485 4305
feedback add "device missing 1 terminal;
connecting remainder to node VGND" pale
box 1275 3855 1485 4029
feedback add "device missing 1 terminal;
connecting remainder to node VPWR" pale

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(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "gpio_defaults_block")
(DATE "Mon Feb 27 14:19:28 2023")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
(DIVIDER .)
(VOLTAGE 1.600::1.600)
(PROCESS "1.000::1.000")
(TEMPERATURE 100.000::100.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "gpio_defaults_block")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT gpio_default_value\[0\].LO gpio_defaults[0] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].HI gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[11\].LO gpio_defaults[11] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[12\].LO gpio_defaults[12] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].HI gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[2\].LO gpio_defaults[2] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[3\].LO gpio_defaults[3] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[4\].LO gpio_defaults[4] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[5\].LO gpio_defaults[5] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[6\].LO gpio_defaults[6] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[7\].LO gpio_defaults[7] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[8\].LO gpio_defaults[8] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[9\].LO gpio_defaults[9] (0.000:0.000:0.000))
)
)
)
)

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(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "gpio_defaults_block")
(DATE "Mon Feb 27 14:19:28 2023")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
(DIVIDER .)
(VOLTAGE 1.600::1.600)
(PROCESS "1.000::1.000")
(TEMPERATURE 100.000::100.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "gpio_defaults_block")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT gpio_default_value\[0\].LO gpio_defaults[0] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].HI gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[11\].LO gpio_defaults[11] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[12\].LO gpio_defaults[12] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].HI gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[2\].LO gpio_defaults[2] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[3\].LO gpio_defaults[3] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[4\].LO gpio_defaults[4] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[5\].LO gpio_defaults[5] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[6\].LO gpio_defaults[6] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[7\].LO gpio_defaults[7] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[8\].LO gpio_defaults[8] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[9\].LO gpio_defaults[9] (0.000:0.000:0.000))
)
)
)
)

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(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "gpio_defaults_block")
(DATE "Mon Feb 27 14:19:28 2023")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
(DIVIDER .)
(VOLTAGE 1.600::1.600)
(PROCESS "1.000::1.000")
(TEMPERATURE 100.000::100.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "gpio_defaults_block")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT gpio_default_value\[0\].LO gpio_defaults[0] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].HI gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[11\].LO gpio_defaults[11] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[12\].LO gpio_defaults[12] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].HI gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[2\].LO gpio_defaults[2] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[3\].LO gpio_defaults[3] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[4\].LO gpio_defaults[4] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[5\].LO gpio_defaults[5] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[6\].LO gpio_defaults[6] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[7\].LO gpio_defaults[7] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[8\].LO gpio_defaults[8] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[9\].LO gpio_defaults[9] (0.000:0.000:0.000))
)
)
)
)

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(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "gpio_defaults_block")
(DATE "Mon Feb 27 14:19:26 2023")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
(DIVIDER .)
(VOLTAGE 1.600::1.600)
(PROCESS "1.000::1.000")
(TEMPERATURE 100.000::100.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "gpio_defaults_block")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT gpio_default_value\[0\].LO gpio_defaults[0] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].HI gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[11\].LO gpio_defaults[11] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[12\].LO gpio_defaults[12] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].HI gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[2\].LO gpio_defaults[2] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[3\].LO gpio_defaults[3] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[4\].LO gpio_defaults[4] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[5\].LO gpio_defaults[5] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[6\].LO gpio_defaults[6] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[7\].LO gpio_defaults[7] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[8\].LO gpio_defaults[8] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[9\].LO gpio_defaults[9] (0.000:0.000:0.000))
)
)
)
)

View File

@ -0,0 +1,34 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "gpio_defaults_block")
(DATE "Mon Feb 27 14:19:26 2023")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
(DIVIDER .)
(VOLTAGE 1.600::1.600)
(PROCESS "1.000::1.000")
(TEMPERATURE 100.000::100.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "gpio_defaults_block")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT gpio_default_value\[0\].LO gpio_defaults[0] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].HI gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[11\].LO gpio_defaults[11] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[12\].LO gpio_defaults[12] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].HI gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[2\].LO gpio_defaults[2] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[3\].LO gpio_defaults[3] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[4\].LO gpio_defaults[4] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[5\].LO gpio_defaults[5] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[6\].LO gpio_defaults[6] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[7\].LO gpio_defaults[7] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[8\].LO gpio_defaults[8] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[9\].LO gpio_defaults[9] (0.000:0.000:0.000))
)
)
)
)

View File

@ -0,0 +1,34 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "gpio_defaults_block")
(DATE "Mon Feb 27 14:19:26 2023")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
(DIVIDER .)
(VOLTAGE 1.600::1.600)
(PROCESS "1.000::1.000")
(TEMPERATURE 100.000::100.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "gpio_defaults_block")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT gpio_default_value\[0\].LO gpio_defaults[0] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].HI gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[11\].LO gpio_defaults[11] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[12\].LO gpio_defaults[12] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].HI gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[2\].LO gpio_defaults[2] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[3\].LO gpio_defaults[3] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[4\].LO gpio_defaults[4] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[5\].LO gpio_defaults[5] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[6\].LO gpio_defaults[6] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[7\].LO gpio_defaults[7] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[8\].LO gpio_defaults[8] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[9\].LO gpio_defaults[9] (0.000:0.000:0.000))
)
)
)
)

View File

@ -0,0 +1,34 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "gpio_defaults_block")
(DATE "Mon Feb 27 14:19:30 2023")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
(DIVIDER .)
(VOLTAGE 1.600::1.600)
(PROCESS "1.000::1.000")
(TEMPERATURE 100.000::100.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "gpio_defaults_block")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT gpio_default_value\[0\].LO gpio_defaults[0] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].HI gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[11\].LO gpio_defaults[11] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[12\].LO gpio_defaults[12] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].HI gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[2\].LO gpio_defaults[2] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[3\].LO gpio_defaults[3] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[4\].LO gpio_defaults[4] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[5\].LO gpio_defaults[5] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[6\].LO gpio_defaults[6] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[7\].LO gpio_defaults[7] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[8\].LO gpio_defaults[8] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[9\].LO gpio_defaults[9] (0.000:0.000:0.000))
)
)
)
)

View File

@ -0,0 +1,34 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "gpio_defaults_block")
(DATE "Mon Feb 27 14:19:30 2023")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
(DIVIDER .)
(VOLTAGE 1.600::1.600)
(PROCESS "1.000::1.000")
(TEMPERATURE 100.000::100.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "gpio_defaults_block")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT gpio_default_value\[0\].LO gpio_defaults[0] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].HI gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[11\].LO gpio_defaults[11] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[12\].LO gpio_defaults[12] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].HI gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[2\].LO gpio_defaults[2] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[3\].LO gpio_defaults[3] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[4\].LO gpio_defaults[4] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[5\].LO gpio_defaults[5] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[6\].LO gpio_defaults[6] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[7\].LO gpio_defaults[7] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[8\].LO gpio_defaults[8] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[9\].LO gpio_defaults[9] (0.000:0.000:0.000))
)
)
)
)

View File

@ -1,14 +1,14 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "gpio_defaults_block")
(DATE "Thu Dec 16 12:33:43 2021")
(DATE "Mon Feb 27 14:19:30 2023")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.1")
(VERSION "2.3.2")
(DIVIDER .)
(VOLTAGE 1.800:1.800:1.800)
(PROCESS "1.000:1.000:1.000")
(TEMPERATURE 25.000:25.000:25.000)
(VOLTAGE 1.600::1.600)
(PROCESS "1.000::1.000")
(TEMPERATURE 100.000::100.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "gpio_defaults_block")
@ -16,10 +16,10 @@
(DELAY
(ABSOLUTE
(INTERCONNECT gpio_default_value\[0\].LO gpio_defaults[0] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].LO gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[10\].HI gpio_defaults[10] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[11\].LO gpio_defaults[11] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[12\].LO gpio_defaults[12] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].LO gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[1\].HI gpio_defaults[1] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[2\].LO gpio_defaults[2] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[3\].LO gpio_defaults[3] (0.000:0.000:0.000))
(INTERCONNECT gpio_default_value\[4\].LO gpio_defaults[4] (0.000:0.000:0.000))

View File

@ -0,0 +1,298 @@
*SPEF "ieee 1481-1999"
*DESIGN "gpio_defaults_block"
*DATE "11:11:11 Fri 11 11, 1111"
*VENDOR "OpenRCX"
*PROGRAM "Parallel Extraction"
*VERSION "1.0"
*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE"
*DIVIDER /
*DELIMITER :
*BUS_DELIMITER []
*T_UNIT 1 NS
*C_UNIT 1 PF
*R_UNIT 1 OHM
*L_UNIT 1 HENRY
*NAME_MAP
*3 gpio_defaults_low\[0\]
*4 gpio_defaults_high\[10\]
*5 gpio_defaults_low\[11\]
*6 gpio_defaults_low\[12\]
*7 gpio_defaults_high\[1\]
*8 gpio_defaults_low\[2\]
*9 gpio_defaults_low\[3\]
*10 gpio_defaults_low\[4\]
*11 gpio_defaults_low\[5\]
*12 gpio_defaults_low\[6\]
*13 gpio_defaults_low\[7\]
*14 gpio_defaults_low\[8\]
*15 gpio_defaults_low\[9\]
*16 gpio_defaults_high\[0\]
*17 gpio_defaults_high\[11\]
*18 gpio_defaults_high\[12\]
*19 gpio_defaults_high\[2\]
*20 gpio_defaults_high\[3\]
*21 gpio_defaults_high\[4\]
*22 gpio_defaults_high\[5\]
*23 gpio_defaults_high\[6\]
*24 gpio_defaults_high\[7\]
*25 gpio_defaults_high\[8\]
*26 gpio_defaults_high\[9\]
*27 gpio_defaults_low\[10\]
*28 gpio_defaults_low\[1\]
*29 FILLER_0_15
*30 FILLER_0_18
*31 FILLER_0_23
*32 FILLER_0_3
*33 FILLER_0_8
*34 FILLER_1_13
*35 FILLER_1_17
*36 FILLER_1_24
*37 FILLER_1_3
*38 FILLER_1_9
*39 FILLER_2_18
*40 FILLER_2_26
*41 FILLER_2_3
*42 FILLER_2_9
*43 FILLER_3_16
*44 FILLER_3_24
*45 FILLER_3_3
*46 FILLER_3_9
*47 FILLER_4_14
*48 FILLER_4_18
*49 FILLER_4_23
*50 FILLER_4_3
*51 FILLER_5_15
*52 FILLER_5_18
*53 FILLER_5_26
*54 FILLER_5_3
*55 FILLER_5_8
*56 PHY_0
*57 PHY_1
*58 PHY_10
*59 PHY_11
*60 PHY_2
*61 PHY_3
*62 PHY_4
*63 PHY_5
*64 PHY_6
*65 PHY_7
*66 PHY_8
*67 PHY_9
*68 TAP_12
*69 TAP_13
*70 TAP_14
*71 TAP_15
*72 gpio_default_value\[0\]
*73 gpio_default_value\[10\]
*74 gpio_default_value\[11\]
*75 gpio_default_value\[12\]
*76 gpio_default_value\[1\]
*77 gpio_default_value\[2\]
*78 gpio_default_value\[3\]
*79 gpio_default_value\[4\]
*80 gpio_default_value\[5\]
*81 gpio_default_value\[6\]
*82 gpio_default_value\[7\]
*83 gpio_default_value\[8\]
*84 gpio_default_value\[9\]
*PORTS
gpio_defaults[0] O
gpio_defaults[10] O
gpio_defaults[11] O
gpio_defaults[12] O
gpio_defaults[1] O
gpio_defaults[2] O
gpio_defaults[3] O
gpio_defaults[4] O
gpio_defaults[5] O
gpio_defaults[6] O
gpio_defaults[7] O
gpio_defaults[8] O
gpio_defaults[9] O
*D_NET *3 0.00145601
*CONN
*P gpio_defaults[0] O
*I *72:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[0] 0.000485632
2 *72:LO 0.000485632
3 gpio_defaults[0] gpio_defaults[1] 6.56481e-05
4 gpio_defaults[0] gpio_defaults[8] 6.97747e-05
5 gpio_defaults[0] gpio_defaults[9] 8.22421e-06
6 gpio_defaults[0] *7:14 0.000341103
*RES
1 *72:LO gpio_defaults[0] 49.9729
*END
*D_NET *4 0.0019023
*CONN
*P gpio_defaults[10] O
*I *73:HI O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[10] 0.000191961
2 *73:HI 0.000708002
3 *4:8 0.000899964
4 gpio_defaults[10] gpio_defaults[9] 0.000102374
*RES
1 *73:HI *4:8 46.7104
2 *4:8 gpio_defaults[10] 8.7392
*END
*D_NET *5 0.00234287
*CONN
*P gpio_defaults[11] O
*I *74:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[11] 0.000421163
2 *74:LO 0.000569641
3 *5:7 0.000990803
4 gpio_defaults[11] gpio_defaults[12] 0
5 gpio_defaults[11] gpio_defaults[2] 0.000103718
6 *5:7 gpio_defaults[12] 0.000228909
7 *5:7 gpio_defaults[5] 2.86398e-05
*RES
1 *74:LO *5:7 47.6736
2 *5:7 gpio_defaults[11] 8.03714
*END
*D_NET *6 0.00139679
*CONN
*P gpio_defaults[12] O
*I *75:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[12] 0.000569558
2 *75:LO 0.000569558
3 gpio_defaults[12] gpio_defaults[3] 8.21456e-06
4 gpio_defaults[12] *10:8 2.05503e-05
5 gpio_defaults[11] gpio_defaults[12] 0
6 *5:7 gpio_defaults[12] 0.000228909
*RES
1 *75:LO gpio_defaults[12] 48.2121
*END
*D_NET *7 0.00178365
*CONN
*P gpio_defaults[1] O
*I *76:HI O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[1] 0.000109849
2 *76:HI 0.0005786
3 *7:14 0.000688449
4 gpio_defaults[0] gpio_defaults[1] 6.56481e-05
5 gpio_defaults[0] *7:14 0.000341103
*RES
1 *76:HI *7:14 49.7761
2 *7:14 gpio_defaults[1] 3.28321
*END
*D_NET *8 0.000996446
*CONN
*P gpio_defaults[2] O
*I *77:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[2] 0.00037389
2 *77:LO 0.00037389
3 gpio_defaults[2] gpio_defaults[3] 0.000144949
4 gpio_defaults[11] gpio_defaults[2] 0.000103718
*RES
1 *77:LO gpio_defaults[2] 49.691
*END
*D_NET *9 0.0010657
*CONN
*P gpio_defaults[3] O
*I *78:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[3] 0.000333765
2 *78:LO 0.000333765
3 gpio_defaults[3] gpio_defaults[4] 0.000174461
4 gpio_defaults[3] *10:8 7.05498e-05
5 gpio_defaults[12] gpio_defaults[3] 8.21456e-06
6 gpio_defaults[2] gpio_defaults[3] 0.000144949
*RES
1 *78:LO gpio_defaults[3] 49.5202
*END
*D_NET *10 0.00173219
*CONN
*P gpio_defaults[4] O
*I *79:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[4] 0.000285296
2 *79:LO 0.000448018
3 *10:8 0.000733314
4 gpio_defaults[12] *10:8 2.05503e-05
5 gpio_defaults[3] gpio_defaults[4] 0.000174461
6 gpio_defaults[3] *10:8 7.05498e-05
*RES
1 *79:LO *10:8 44.1832
2 *10:8 gpio_defaults[4] 8.75787
*END
*D_NET *11 0.00113356
*CONN
*P gpio_defaults[5] O
*I *80:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[5] 0.00046113
2 *80:LO 0.00046113
3 gpio_defaults[5] gpio_defaults[6] 0.000182664
4 *5:7 gpio_defaults[5] 2.86398e-05
*RES
1 *80:LO gpio_defaults[5] 49.7274
*END
*D_NET *12 0.000817045
*CONN
*P gpio_defaults[6] O
*I *81:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[6] 0.000225859
2 *81:LO 0.000225859
3 gpio_defaults[6] gpio_defaults[7] 0.000182664
4 gpio_defaults[5] gpio_defaults[6] 0.000182664
*RES
1 *81:LO gpio_defaults[6] 47.6145
*END
*D_NET *13 0.00102803
*CONN
*P gpio_defaults[7] O
*I *82:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[7] 0.000422684
2 *82:LO 0.000422684
3 gpio_defaults[6] gpio_defaults[7] 0.000182664
*RES
1 *82:LO gpio_defaults[7] 49.9966
*END
*D_NET *14 0.00130875
*CONN
*P gpio_defaults[8] O
*I *83:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[8] 0.000528509
2 *83:LO 0.000528509
3 gpio_defaults[8] gpio_defaults[9] 0.000181959
4 gpio_defaults[0] gpio_defaults[8] 6.97747e-05
*RES
1 *83:LO gpio_defaults[8] 49.8339
*END
*D_NET *15 0.000864321
*CONN
*P gpio_defaults[9] O
*I *84:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[9] 0.000285882
2 *84:LO 0.000285882
3 gpio_defaults[0] gpio_defaults[9] 8.22421e-06
4 gpio_defaults[10] gpio_defaults[9] 0.000102374
5 gpio_defaults[8] gpio_defaults[9] 0.000181959
*RES
1 *84:LO gpio_defaults[9] 48.0909
*END

View File

@ -0,0 +1,284 @@
*SPEF "ieee 1481-1999"
*DESIGN "gpio_defaults_block"
*DATE "11:11:11 Fri 11 11, 1111"
*VENDOR "OpenRCX"
*PROGRAM "Parallel Extraction"
*VERSION "1.0"
*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE"
*DIVIDER /
*DELIMITER :
*BUS_DELIMITER []
*T_UNIT 1 NS
*C_UNIT 1 PF
*R_UNIT 1 OHM
*L_UNIT 1 HENRY
*NAME_MAP
*3 gpio_defaults_low\[0\]
*4 gpio_defaults_high\[10\]
*5 gpio_defaults_low\[11\]
*6 gpio_defaults_low\[12\]
*7 gpio_defaults_high\[1\]
*8 gpio_defaults_low\[2\]
*9 gpio_defaults_low\[3\]
*10 gpio_defaults_low\[4\]
*11 gpio_defaults_low\[5\]
*12 gpio_defaults_low\[6\]
*13 gpio_defaults_low\[7\]
*14 gpio_defaults_low\[8\]
*15 gpio_defaults_low\[9\]
*16 gpio_defaults_high\[0\]
*17 gpio_defaults_high\[11\]
*18 gpio_defaults_high\[12\]
*19 gpio_defaults_high\[2\]
*20 gpio_defaults_high\[3\]
*21 gpio_defaults_high\[4\]
*22 gpio_defaults_high\[5\]
*23 gpio_defaults_high\[6\]
*24 gpio_defaults_high\[7\]
*25 gpio_defaults_high\[8\]
*26 gpio_defaults_high\[9\]
*27 gpio_defaults_low\[10\]
*28 gpio_defaults_low\[1\]
*29 FILLER_0_15
*30 FILLER_0_18
*31 FILLER_0_23
*32 FILLER_0_3
*33 FILLER_0_8
*34 FILLER_1_13
*35 FILLER_1_17
*36 FILLER_1_24
*37 FILLER_1_3
*38 FILLER_1_9
*39 FILLER_2_18
*40 FILLER_2_26
*41 FILLER_2_3
*42 FILLER_2_9
*43 FILLER_3_16
*44 FILLER_3_24
*45 FILLER_3_3
*46 FILLER_3_9
*47 FILLER_4_14
*48 FILLER_4_18
*49 FILLER_4_23
*50 FILLER_4_3
*51 FILLER_5_15
*52 FILLER_5_18
*53 FILLER_5_26
*54 FILLER_5_3
*55 FILLER_5_8
*56 PHY_0
*57 PHY_1
*58 PHY_10
*59 PHY_11
*60 PHY_2
*61 PHY_3
*62 PHY_4
*63 PHY_5
*64 PHY_6
*65 PHY_7
*66 PHY_8
*67 PHY_9
*68 TAP_12
*69 TAP_13
*70 TAP_14
*71 TAP_15
*72 gpio_default_value\[0\]
*73 gpio_default_value\[10\]
*74 gpio_default_value\[11\]
*75 gpio_default_value\[12\]
*76 gpio_default_value\[1\]
*77 gpio_default_value\[2\]
*78 gpio_default_value\[3\]
*79 gpio_default_value\[4\]
*80 gpio_default_value\[5\]
*81 gpio_default_value\[6\]
*82 gpio_default_value\[7\]
*83 gpio_default_value\[8\]
*84 gpio_default_value\[9\]
*PORTS
gpio_defaults[0] O
gpio_defaults[10] O
gpio_defaults[11] O
gpio_defaults[12] O
gpio_defaults[1] O
gpio_defaults[2] O
gpio_defaults[3] O
gpio_defaults[4] O
gpio_defaults[5] O
gpio_defaults[6] O
gpio_defaults[7] O
gpio_defaults[8] O
gpio_defaults[9] O
*D_NET *3 0.00122503
*CONN
*P gpio_defaults[0] O
*I *72:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[0] 0.000401869
2 *72:LO 0.000401869
3 gpio_defaults[0] gpio_defaults[1] 0.000353887
4 gpio_defaults[0] gpio_defaults[8] 5.89912e-05
5 gpio_defaults[0] gpio_defaults[9] 8.41703e-06
*RES
1 *72:LO gpio_defaults[0] 12.27
*END
*D_NET *4 0.00150251
*CONN
*P gpio_defaults[10] O
*I *73:HI O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[10] 0.000704956
2 *73:HI 0.000704956
3 gpio_defaults[10] gpio_defaults[9] 9.26027e-05
*RES
1 *73:HI gpio_defaults[10] 10.9091
*END
*D_NET *5 0.00195556
*CONN
*P gpio_defaults[11] O
*I *74:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[11] 0.000820804
2 *74:LO 0.000820804
3 gpio_defaults[11] gpio_defaults[12] 0.000201508
4 gpio_defaults[11] gpio_defaults[2] 8.59804e-05
5 gpio_defaults[11] gpio_defaults[5] 2.64607e-05
*RES
1 *74:LO gpio_defaults[11] 16.425
*END
*D_NET *6 0.00117424
*CONN
*P gpio_defaults[12] O
*I *75:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[12] 0.000473342
2 *75:LO 0.000473342
3 gpio_defaults[12] gpio_defaults[3] 8.41015e-06
4 gpio_defaults[12] gpio_defaults[4] 1.7635e-05
5 gpio_defaults[11] gpio_defaults[12] 0.000201508
*RES
1 *75:LO gpio_defaults[12] 10.995
*END
*D_NET *7 0.00150072
*CONN
*P gpio_defaults[1] O
*I *76:HI O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[1] 0.000573415
2 *76:HI 0.000573415
3 gpio_defaults[0] gpio_defaults[1] 0.000353887
*RES
1 *76:HI gpio_defaults[1] 14.505
*END
*D_NET *8 0.000801502
*CONN
*P gpio_defaults[2] O
*I *77:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[2] 0.000294798
2 *77:LO 0.000294798
3 gpio_defaults[2] gpio_defaults[3] 0.000125926
4 gpio_defaults[11] gpio_defaults[2] 8.59804e-05
*RES
1 *77:LO gpio_defaults[2] 6.7391
*END
*D_NET *9 0.000870244
*CONN
*P gpio_defaults[3] O
*I *78:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[3] 0.000256569
2 *78:LO 0.000256569
3 gpio_defaults[3] gpio_defaults[4] 0.000222769
4 gpio_defaults[12] gpio_defaults[3] 8.41015e-06
5 gpio_defaults[2] gpio_defaults[3] 0.000125926
*RES
1 *78:LO gpio_defaults[3] 6.6185
*END
*D_NET *10 0.00145562
*CONN
*P gpio_defaults[4] O
*I *79:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[4] 0.00060761
2 *79:LO 0.00060761
3 gpio_defaults[12] gpio_defaults[4] 1.7635e-05
4 gpio_defaults[3] gpio_defaults[4] 0.000222769
*RES
1 *79:LO gpio_defaults[4] 9.09177
*END
*D_NET *11 0.000912118
*CONN
*P gpio_defaults[5] O
*I *80:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[5] 0.000360275
2 *80:LO 0.000360275
3 gpio_defaults[5] gpio_defaults[6] 0.000165107
4 gpio_defaults[11] gpio_defaults[5] 2.64607e-05
*RES
1 *80:LO gpio_defaults[5] 6.7685
*END
*D_NET *12 0.000665538
*CONN
*P gpio_defaults[6] O
*I *81:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[6] 0.000167662
2 *81:LO 0.000167662
3 gpio_defaults[6] gpio_defaults[7] 0.000165107
4 gpio_defaults[5] gpio_defaults[6] 0.000165107
*RES
1 *81:LO gpio_defaults[6] 5.2385
*END
*D_NET *13 0.000869901
*CONN
*P gpio_defaults[7] O
*I *82:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[7] 0.000352397
2 *82:LO 0.000352397
3 gpio_defaults[6] gpio_defaults[7] 0.000165107
*RES
1 *82:LO gpio_defaults[7] 6.9635
*END
*D_NET *14 0.00105479
*CONN
*P gpio_defaults[8] O
*I *83:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[8] 0.000415682
2 *83:LO 0.000415682
3 gpio_defaults[8] gpio_defaults[9] 0.000164436
4 gpio_defaults[0] gpio_defaults[8] 5.89912e-05
*RES
1 *83:LO gpio_defaults[8] 6.84177
*END
*D_NET *15 0.000698837
*CONN
*P gpio_defaults[9] O
*I *84:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[9] 0.000216691
2 *84:LO 0.000216691
3 gpio_defaults[0] gpio_defaults[9] 8.41703e-06
4 gpio_defaults[10] gpio_defaults[9] 9.26027e-05
5 gpio_defaults[8] gpio_defaults[9] 0.000164436
*RES
1 *84:LO gpio_defaults[9] 5.5835
*END

View File

@ -40,55 +40,62 @@
*26 gpio_defaults_high\[9\]
*27 gpio_defaults_low\[10\]
*28 gpio_defaults_low\[1\]
*29 FILLER_0_29
*30 FILLER_0_3
*31 FILLER_0_33
*32 FILLER_0_38
*33 FILLER_0_43
*34 FILLER_0_48
*35 FILLER_0_55
*36 FILLER_0_60
*37 FILLER_0_9
*38 FILLER_1_15
*39 FILLER_1_27
*40 FILLER_1_3
*41 FILLER_1_39
*42 FILLER_1_51
*43 FILLER_1_55
*44 FILLER_1_57
*45 FILLER_1_61
*46 FILLER_2_15
*47 FILLER_2_27
*48 FILLER_2_29
*49 FILLER_2_3
*50 FILLER_2_41
*51 FILLER_2_53
*52 FILLER_2_57
*53 FILLER_2_61
*54 PHY_0
*55 PHY_1
*56 PHY_2
*57 PHY_3
*58 PHY_4
*59 PHY_5
*60 TAP_10
*61 TAP_6
*62 TAP_7
*63 TAP_8
*64 TAP_9
*65 gpio_default_value\[0\]
*66 gpio_default_value\[10\]
*67 gpio_default_value\[11\]
*68 gpio_default_value\[12\]
*69 gpio_default_value\[1\]
*70 gpio_default_value\[2\]
*71 gpio_default_value\[3\]
*72 gpio_default_value\[4\]
*73 gpio_default_value\[5\]
*74 gpio_default_value\[6\]
*75 gpio_default_value\[7\]
*76 gpio_default_value\[8\]
*77 gpio_default_value\[9\]
*29 FILLER_0_15
*30 FILLER_0_18
*31 FILLER_0_23
*32 FILLER_0_3
*33 FILLER_0_8
*34 FILLER_1_13
*35 FILLER_1_17
*36 FILLER_1_24
*37 FILLER_1_3
*38 FILLER_1_9
*39 FILLER_2_18
*40 FILLER_2_26
*41 FILLER_2_3
*42 FILLER_2_9
*43 FILLER_3_16
*44 FILLER_3_24
*45 FILLER_3_3
*46 FILLER_3_9
*47 FILLER_4_14
*48 FILLER_4_18
*49 FILLER_4_23
*50 FILLER_4_3
*51 FILLER_5_15
*52 FILLER_5_18
*53 FILLER_5_26
*54 FILLER_5_3
*55 FILLER_5_8
*56 PHY_0
*57 PHY_1
*58 PHY_10
*59 PHY_11
*60 PHY_2
*61 PHY_3
*62 PHY_4
*63 PHY_5
*64 PHY_6
*65 PHY_7
*66 PHY_8
*67 PHY_9
*68 TAP_12
*69 TAP_13
*70 TAP_14
*71 TAP_15
*72 gpio_default_value\[0\]
*73 gpio_default_value\[10\]
*74 gpio_default_value\[11\]
*75 gpio_default_value\[12\]
*76 gpio_default_value\[1\]
*77 gpio_default_value\[2\]
*78 gpio_default_value\[3\]
*79 gpio_default_value\[4\]
*80 gpio_default_value\[5\]
*81 gpio_default_value\[6\]
*82 gpio_default_value\[7\]
*83 gpio_default_value\[8\]
*84 gpio_default_value\[9\]
*PORTS
gpio_defaults[0] O
@ -105,169 +112,173 @@ gpio_defaults[7] O
gpio_defaults[8] O
gpio_defaults[9] O
*D_NET *3 0.000662868
*D_NET *3 0.00132652
*CONN
*P gpio_defaults[0] O
*I *65:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[0] 0.000295589
2 *65:LO 0.000295589
3 gpio_defaults[0] gpio_defaults[1] 7.16893e-05
*RES
1 *65:LO gpio_defaults[0] 21.1394
*END
*D_NET *4 0.000169932
*CONN
*P gpio_defaults[10] O
*I *66:HI O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[10] 8.49658e-05
2 *66:HI 8.49658e-05
3 gpio_defaults[10] gpio_defaults[11] 0
4 gpio_defaults[10] gpio_defaults[9] 0
*RES
1 *66:HI gpio_defaults[10] 15.7033
*END
*D_NET *5 0.000230895
*CONN
*P gpio_defaults[11] O
*I *67:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[11] 0.000115448
2 *67:LO 0.000115448
3 gpio_defaults[11] gpio_defaults[12] 0
4 gpio_defaults[10] gpio_defaults[11] 0
*RES
1 *67:LO gpio_defaults[11] 16.5338
*END
*D_NET *6 0.000822209
*CONN
*P gpio_defaults[12] O
*I *68:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[12] 0.000411104
2 *68:LO 0.000411104
3 gpio_defaults[11] gpio_defaults[12] 0
*RES
1 *68:LO gpio_defaults[12] 23.2185
*END
*D_NET *7 0.00071336
*CONN
*P gpio_defaults[1] O
*I *69:HI O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[1] 0.000307544
2 *69:HI 0.000307544
3 gpio_defaults[1] gpio_defaults[2] 2.65831e-05
4 gpio_defaults[0] gpio_defaults[1] 7.16893e-05
*RES
1 *69:HI gpio_defaults[1] 19.1997
*END
*D_NET *8 0.000464143
*CONN
*P gpio_defaults[2] O
*I *70:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[2] 0.00021878
2 *70:LO 0.00021878
3 gpio_defaults[2] gpio_defaults[3] 0
4 gpio_defaults[1] gpio_defaults[2] 2.65831e-05
*RES
1 *70:LO gpio_defaults[2] 18.921
*END
*D_NET *9 0.000363376
*CONN
*P gpio_defaults[3] O
*I *71:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[3] 0.000181688
2 *71:LO 0.000181688
3 gpio_defaults[3] gpio_defaults[4] 0
4 gpio_defaults[2] gpio_defaults[3] 0
*RES
1 *71:LO gpio_defaults[3] 17.8118
*END
*D_NET *10 0.000236028
*CONN
*P gpio_defaults[4] O
*I *72:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[4] 0.000118014
2 *72:LO 0.000118014
3 gpio_defaults[4] gpio_defaults[5] 0
4 gpio_defaults[3] gpio_defaults[4] 0
1 gpio_defaults[0] 0.000439999
2 *72:LO 0.000439999
3 gpio_defaults[0] gpio_defaults[1] 0.000374302
4 gpio_defaults[0] gpio_defaults[8] 6.39808e-05
5 gpio_defaults[0] gpio_defaults[9] 8.23597e-06
*RES
1 *72:LO gpio_defaults[4] 16.5338
1 *72:LO gpio_defaults[0] 24.1214
*END
*D_NET *11 0.000230895
*D_NET *4 0.00168556
*CONN
*P gpio_defaults[5] O
*I *73:LO O *D sky130_fd_sc_hd__conb_1
*P gpio_defaults[10] O
*I *73:HI O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[5] 0.000115448
2 *73:LO 0.000115448
3 gpio_defaults[5] gpio_defaults[6] 0
4 gpio_defaults[4] gpio_defaults[5] 0
1 gpio_defaults[10] 0.000789412
2 *73:HI 0.000789412
3 gpio_defaults[10] gpio_defaults[9] 0.000106739
*RES
1 *73:LO gpio_defaults[5] 16.5338
1 *73:HI gpio_defaults[10] 25.3393
*END
*D_NET *12 0.000230895
*D_NET *5 0.00214491
*CONN
*P gpio_defaults[6] O
*P gpio_defaults[11] O
*I *74:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[6] 0.000115448
2 *74:LO 0.000115448
3 gpio_defaults[6] gpio_defaults[7] 0
4 gpio_defaults[5] gpio_defaults[6] 0
1 gpio_defaults[11] 0.000896545
2 *74:LO 0.000896545
3 gpio_defaults[11] gpio_defaults[12] 0.000230482
4 gpio_defaults[11] gpio_defaults[2] 9.3479e-05
5 gpio_defaults[11] gpio_defaults[5] 2.78576e-05
*RES
1 *74:LO gpio_defaults[6] 16.5338
1 *74:LO gpio_defaults[11] 29.0679
*END
*D_NET *13 0.00022764
*D_NET *6 0.0013025
*CONN
*P gpio_defaults[7] O
*P gpio_defaults[12] O
*I *75:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[7] 0.00011382
2 *75:LO 0.00011382
3 gpio_defaults[7] gpio_defaults[8] 0
4 gpio_defaults[6] gpio_defaults[7] 0
1 gpio_defaults[12] 0.000522349
2 *75:LO 0.000522349
3 gpio_defaults[12] gpio_defaults[3] 8.22793e-06
4 gpio_defaults[12] gpio_defaults[4] 1.90936e-05
5 gpio_defaults[11] gpio_defaults[12] 0.000230482
*RES
1 *75:LO gpio_defaults[7] 16.5338
1 *75:LO gpio_defaults[12] 22.6036
*END
*D_NET *14 0.000224385
*D_NET *7 0.00162191
*CONN
*P gpio_defaults[8] O
*I *76:LO O *D sky130_fd_sc_hd__conb_1
*P gpio_defaults[1] O
*I *76:HI O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[8] 0.000112192
2 *76:LO 0.000112192
3 gpio_defaults[8] gpio_defaults[9] 0
4 gpio_defaults[7] gpio_defaults[8] 0
1 gpio_defaults[1] 0.000623807
2 *76:HI 0.000623807
3 gpio_defaults[0] gpio_defaults[1] 0.000374302
*RES
1 *76:LO gpio_defaults[8] 16.5338
1 *76:HI gpio_defaults[1] 26.7821
*END
*D_NET *15 0.00022764
*D_NET *8 0.000894465
*CONN
*P gpio_defaults[9] O
*P gpio_defaults[2] O
*I *77:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[9] 0.00011382
2 *77:LO 0.00011382
3 gpio_defaults[10] gpio_defaults[9] 0
4 gpio_defaults[8] gpio_defaults[9] 0
1 gpio_defaults[2] 0.000326553
2 *77:LO 0.000326553
3 gpio_defaults[2] gpio_defaults[3] 0.000147881
4 gpio_defaults[11] gpio_defaults[2] 9.3479e-05
*RES
1 *77:LO gpio_defaults[9] 16.5338
1 *77:LO gpio_defaults[2] 20.375
*END
*D_NET *9 0.00098307
*CONN
*P gpio_defaults[3] O
*I *78:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[3] 0.000288265
2 *78:LO 0.000288265
3 gpio_defaults[3] gpio_defaults[4] 0.000250431
4 gpio_defaults[12] gpio_defaults[3] 8.22793e-06
5 gpio_defaults[2] gpio_defaults[3] 0.000147881
*RES
1 *78:LO gpio_defaults[3] 20.2294
*END
*D_NET *10 0.00165019
*CONN
*P gpio_defaults[4] O
*I *79:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[4] 0.000690334
2 *79:LO 0.000690334
3 gpio_defaults[12] gpio_defaults[4] 1.90936e-05
4 gpio_defaults[3] gpio_defaults[4] 0.000250431
*RES
1 *79:LO gpio_defaults[4] 23.1764
*END
*D_NET *11 0.00102271
*CONN
*P gpio_defaults[5] O
*I *80:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[5] 0.000402342
2 *80:LO 0.000402342
3 gpio_defaults[5] gpio_defaults[6] 0.000190165
4 gpio_defaults[11] gpio_defaults[5] 2.78576e-05
*RES
1 *80:LO gpio_defaults[5] 20.4079
*END
*D_NET *12 0.000763271
*CONN
*P gpio_defaults[6] O
*I *81:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[6] 0.000191471
2 *81:LO 0.000191471
3 gpio_defaults[6] gpio_defaults[7] 0.000190165
4 gpio_defaults[5] gpio_defaults[6] 0.000190165
*RES
1 *81:LO gpio_defaults[6] 18.5865
*END
*D_NET *13 0.000959504
*CONN
*P gpio_defaults[7] O
*I *82:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[7] 0.000384669
2 *82:LO 0.000384669
3 gpio_defaults[6] gpio_defaults[7] 0.000190165
*RES
1 *82:LO gpio_defaults[7] 20.6401
*END
*D_NET *14 0.00120869
*CONN
*P gpio_defaults[8] O
*I *83:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[8] 0.000477682
2 *83:LO 0.000477682
3 gpio_defaults[8] gpio_defaults[9] 0.000189351
4 gpio_defaults[0] gpio_defaults[8] 6.39808e-05
*RES
1 *83:LO gpio_defaults[8] 20.4979
*END
*D_NET *15 0.000792497
*CONN
*P gpio_defaults[9] O
*I *84:LO O *D sky130_fd_sc_hd__conb_1
*CAP
1 gpio_defaults[9] 0.000244086
2 *84:LO 0.000244086
3 gpio_defaults[0] gpio_defaults[9] 8.23597e-06
4 gpio_defaults[10] gpio_defaults[9] 0.000106739
5 gpio_defaults[8] gpio_defaults[9] 0.000189351
*RES
1 *84:LO gpio_defaults[9] 18.9972
*END

File diff suppressed because one or more lines are too long

View File

@ -0,0 +1,103 @@
- status: 0 - openlane design prep
runtime_s: 1.79
runtime_ts: 0h0m1s788ms
- status: 1 - synthesis - yosys
runtime_s: 0.89
runtime_ts: 0h0m0s892ms
- status: 2 - sta - openroad
runtime_s: 0.44
runtime_ts: 0h0m0s437ms
- status: 3 - floorplan initialization - openroad
runtime_s: 0.55
runtime_ts: 0h0m0s545ms
- status: 4 - io_place - openlane
runtime_s: 0.31
runtime_ts: 0h0m0s309ms
- status: 5 - tap/decap insertion - openroad
runtime_s: 0.43
runtime_ts: 0h0m0s431ms
- status: 6 - pdn generation - openroad
runtime_s: 0.44
runtime_ts: 0h0m0s444ms
- status: 7 - global placement - openroad
runtime_s: 0.55
runtime_ts: 0h0m0s550ms
- status: 8 - detailed placement - openroad
runtime_s: 0.45
runtime_ts: 0h0m0s454ms
- status: 9 - detailed placement - openroad
runtime_s: 0.46
runtime_ts: 0h0m0s462ms
- status: 11 - write verilog - openroad
runtime_s: 0.39
runtime_ts: 0h0m0s390ms
- status: 11 - global routing - openroad
runtime_s: 0.49
runtime_ts: 0h0m0s487ms
- status: 12 - fill insertion - openroad
runtime_s: 0.47
runtime_ts: 0h0m0s467ms
- status: 13 - detailed_routing - openroad
runtime_s: 0.96
runtime_ts: 0h0m0s964ms
- status: 14 - wire lengths - openlane
runtime_s: 0.26
runtime_ts: 0h0m0s257ms
- status: 15 - parasitics extraction - openroad
runtime_s: 0.43
runtime_ts: 0h0m0s430ms
- status: 16 - sta - openroad
runtime_s: 1.52
runtime_ts: 0h0m1s518ms
- status: 17 - parasitics extraction - openroad
runtime_s: 0.43
runtime_ts: 0h0m0s431ms
- status: 18 - sta - openroad
runtime_s: 1.52
runtime_ts: 0h0m1s515ms
- status: 19 - parasitics extraction - openroad
runtime_s: 0.43
runtime_ts: 0h0m0s435ms
- status: 20 - sta - openroad
runtime_s: 1.5
runtime_ts: 0h0m1s502ms
- status: 21 - sta - openroad
runtime_s: 0.38
runtime_ts: 0h0m0s376ms
- status: 22 - ir drop report - openroad
runtime_s: 0.43
runtime_ts: 0h0m0s430ms
- status: 23 - gdsii - magic
runtime_s: 1.28
runtime_ts: 0h0m1s281ms
- status: 24 - gdsii - klayout
runtime_s: 0.42
runtime_ts: 0h0m0s424ms
- status: 25 - xor - klayout
runtime_s: 0.34
runtime_ts: 0h0m0s343ms
- status: 26 - gds.spice extraction - magic
runtime_s: 0.38
runtime_ts: 0h0m0s377ms
- status: 28 - write verilog - openroad
runtime_s: 0.39
runtime_ts: 0h0m0s393ms
- status: 28 - write powered verilog - openlane
runtime_s: 0.51
runtime_ts: 0h0m0s505ms
- status: 29 - lvs - netgen
runtime_s: 0.28
runtime_ts: 0h0m0s282ms
- status: 30 - drc - magic
runtime_s: 1.13
runtime_ts: 0h0m1s125ms
- status: 31 - antenna check - openroad
runtime_s: 0.45
runtime_ts: 0h0m0s446ms
---
- status: routed
runtime_s: 12.0
runtime_ts: 0h0m12s0ms
- status: flow completed
runtime_s: 27.0
runtime_ts: 0h0m27s0ms

View File

@ -0,0 +1 @@
[WARNING]: No lefspice found, skipping CVC...

View File

@ -1,26 +1,15 @@
module gpio_defaults_block (VGND,
VPWR,
module gpio_defaults_block (VPWR,
VGND,
gpio_defaults);
input VGND;
input VPWR;
input VGND;
output [12:0] gpio_defaults;
wire \gpio_defaults_low[0] ;
wire \gpio_defaults_high[10] ;
wire \gpio_defaults_low[11] ;
wire \gpio_defaults_low[12] ;
wire \gpio_defaults_high[1] ;
wire \gpio_defaults_low[2] ;
wire \gpio_defaults_low[3] ;
wire \gpio_defaults_low[4] ;
wire \gpio_defaults_low[5] ;
wire \gpio_defaults_low[6] ;
wire \gpio_defaults_low[7] ;
wire \gpio_defaults_low[8] ;
wire \gpio_defaults_low[9] ;
wire \gpio_defaults_high[0] ;
wire \gpio_defaults_high[10] ;
wire \gpio_defaults_high[11] ;
wire \gpio_defaults_high[12] ;
wire \gpio_defaults_high[1] ;
wire \gpio_defaults_high[2] ;
wire \gpio_defaults_high[3] ;
wire \gpio_defaults_high[4] ;
@ -29,109 +18,98 @@ module gpio_defaults_block (VGND,
wire \gpio_defaults_high[7] ;
wire \gpio_defaults_high[8] ;
wire \gpio_defaults_high[9] ;
wire \gpio_defaults_low[0] ;
wire \gpio_defaults_low[10] ;
wire \gpio_defaults_low[11] ;
wire \gpio_defaults_low[12] ;
wire \gpio_defaults_low[1] ;
wire \gpio_defaults_low[2] ;
wire \gpio_defaults_low[3] ;
wire \gpio_defaults_low[4] ;
wire \gpio_defaults_low[5] ;
wire \gpio_defaults_low[6] ;
wire \gpio_defaults_low[7] ;
wire \gpio_defaults_low[8] ;
wire \gpio_defaults_low[9] ;
sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
sky130_fd_sc_hd__conb_1 \gpio_default_value[0] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[0] ),
.LO(\gpio_defaults_low[0] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[10] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[10] ),
.LO(\gpio_defaults_low[10] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[11] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[11] ),
.LO(\gpio_defaults_low[11] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[12] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[12] ),
.LO(\gpio_defaults_low[12] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[1] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[1] ),
.LO(\gpio_defaults_low[1] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[2] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[2] ),
.LO(\gpio_defaults_low[2] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[3] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[3] ),
.LO(\gpio_defaults_low[3] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[4] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[4] ),
.LO(\gpio_defaults_low[4] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[5] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[5] ),
.LO(\gpio_defaults_low[5] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[6] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[6] ),
.LO(\gpio_defaults_low[6] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[7] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[7] ),
.LO(\gpio_defaults_low[7] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[8] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
.VPWR(VPWR),
.HI(\gpio_defaults_high[8] ),
.LO(\gpio_defaults_low[8] ));
sky130_fd_sc_hd__conb_1 \gpio_default_value[9] (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
.VPWR(VPWR),
.HI(\gpio_defaults_high[9] ),
.LO(\gpio_defaults_low[9] ));
sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
@ -156,96 +134,151 @@ module gpio_defaults_block (VGND,
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
.VPWR(VPWR));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
.VPWR(VPWR));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
.VPWR(VPWR));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
.VPWR(VPWR));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[0] (.HI(\gpio_defaults_high[0] ),
.LO(\gpio_defaults_low[0] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_3 PHY_6 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[10] (.HI(\gpio_defaults_high[10] ),
.LO(\gpio_defaults_low[10] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_3 PHY_7 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[11] (.HI(\gpio_defaults_high[11] ),
.LO(\gpio_defaults_low[11] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_3 PHY_8 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[12] (.HI(\gpio_defaults_high[12] ),
.LO(\gpio_defaults_low[12] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_3 PHY_9 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[1] (.HI(\gpio_defaults_high[1] ),
.LO(\gpio_defaults_low[1] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_3 PHY_10 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[2] (.HI(\gpio_defaults_high[2] ),
.LO(\gpio_defaults_low[2] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_3 PHY_11 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[3] (.HI(\gpio_defaults_high[3] ),
.LO(\gpio_defaults_low[3] ),
.VGND(VGND),
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_12 (.VGND(VGND),
.VPWR(VPWR));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_13 (.VGND(VGND),
.VPWR(VPWR));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_14 (.VGND(VGND),
.VPWR(VPWR));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_15 (.VGND(VGND),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_2 FILLER_0_3 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[4] (.HI(\gpio_defaults_high[4] ),
.LO(\gpio_defaults_low[4] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_4 FILLER_0_8 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[5] (.HI(\gpio_defaults_high[5] ),
.LO(\gpio_defaults_low[5] ),
.VGND(VGND),
sky130_fd_sc_hd__fill_2 FILLER_0_15 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[6] (.HI(\gpio_defaults_high[6] ),
.LO(\gpio_defaults_low[6] ),
.VGND(VGND),
sky130_fd_sc_hd__fill_2 FILLER_0_18 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[7] (.HI(\gpio_defaults_high[7] ),
.LO(\gpio_defaults_low[7] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_4 FILLER_0_23 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[8] (.HI(\gpio_defaults_high[8] ),
.LO(\gpio_defaults_low[8] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_3 FILLER_1_3 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__conb_1 \gpio_default_value[9] (.HI(\gpio_defaults_high[9] ),
.LO(\gpio_defaults_low[9] ),
.VGND(VGND),
sky130_fd_sc_hd__decap_4 FILLER_1_9 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
assign gpio_defaults[0] = \gpio_defaults_low[0] ;
sky130_fd_sc_hd__fill_1 FILLER_1_13 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_4 FILLER_1_17 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_3 FILLER_1_24 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_3 FILLER_2_3 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_8 FILLER_2_9 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_8 FILLER_2_18 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_1 FILLER_2_26 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_3 FILLER_3_3 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_4 FILLER_3_9 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_8 FILLER_3_16 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_3 FILLER_3_24 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_8 FILLER_4_3 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_3 FILLER_4_14 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_2 FILLER_4_18 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_4 FILLER_4_23 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_2 FILLER_5_3 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_4 FILLER_5_8 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_2 FILLER_5_15 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__decap_8 FILLER_5_18 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
sky130_fd_sc_hd__fill_1 FILLER_5_26 (.VGND(VGND),
.VNB(VGND),
.VPB(VPWR),
.VPWR(VPWR));
assign gpio_defaults[10] = \gpio_defaults_high[10] ;
assign gpio_defaults[1] = \gpio_defaults_high[1] ;
assign gpio_defaults[0] = \gpio_defaults_low[0] ;
assign gpio_defaults[11] = \gpio_defaults_low[11] ;
assign gpio_defaults[12] = \gpio_defaults_low[12] ;
assign gpio_defaults[2] = \gpio_defaults_low[2] ;
assign gpio_defaults[3] = \gpio_defaults_low[3] ;
assign gpio_defaults[4] = \gpio_defaults_low[4] ;
@ -254,7 +287,4 @@ module gpio_defaults_block (VGND,
assign gpio_defaults[7] = \gpio_defaults_low[7] ;
assign gpio_defaults[8] = \gpio_defaults_low[8] ;
assign gpio_defaults[9] = \gpio_defaults_low[9] ;
assign gpio_defaults[10] = \gpio_defaults_high[10] ;
assign gpio_defaults[11] = \gpio_defaults_low[11] ;
assign gpio_defaults[12] = \gpio_defaults_low[12] ;
endmodule