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Add gpio_all_i_pd_user and gpio_all_i_pu_user

This commit is contained in:
M0stafaRady 2022-10-10 14:49:24 -07:00
parent a572a8ec14
commit 8cca3a5002
6 changed files with 334 additions and 2 deletions
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12
verilog/dv/cocotb/tests.json
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@ -45,12 +45,24 @@
"GL":["r_gl","push_gl","nightly","weekly","tape_out"],
"GL_SDF":["r_sdf","weekly","tape_out"],
"description":"configure all gpios as mgmt input pull up using automatic approach firmware and check them"}
,"gpio_all_i_pu_user" :{"level":0,
"SW":true,
"RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
"GL":["r_gl","push_gl","nightly","weekly","tape_out"],
"GL_SDF":["r_sdf","weekly","tape_out"],
"description":"configure all gpios as user input pull up using automatic approach firmware and check them"}
,"gpio_all_i_pd" :{"level":0,
"SW":true,
"RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
"GL":["r_gl","push_gl","nightly","weekly","tape_out"],
"GL_SDF":["r_sdf","weekly","tape_out"],
"description":"configure all gpios as mgmt input pull down using automatic approach firmware and check them"}
,"gpio_all_i_pd_user" :{"level":0,
"SW":true,
"RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
"GL":["r_gl","push_gl","nightly","weekly","tape_out"],
"GL_SDF":["r_sdf","weekly","tape_out"],
"description":"configure all gpios as user input pull down using automatic approach firmware and check them"}
,"gpio_all_bidir" :{"level":0,
"SW":true,
"RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],

57
verilog/dv/cocotb/tests/gpio/gpio_all_i_pd_user.c Normal file
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@ -0,0 +1,57 @@
#include <defs.h>
#include <stub.c>
#include "../bitbang/bitbang_functions.c"
void main(){
unsigned int i, j, k;
reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2
reg_debug_1 = 0x0;
reg_debug_2 = 0x0;
reg_hkspi_disable = 1;
reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_35 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_28 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_23 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_11 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLDOWN;
reg_mprj_xfer = 1;
while (reg_mprj_xfer == 1);
reg_debug_1 = 0XAA; // configuration done
while (true);
}

57
verilog/dv/cocotb/tests/gpio/gpio_all_i_pu_user.c Normal file
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@ -0,0 +1,57 @@
#include <defs.h>
#include <stub.c>
#include "../bitbang/bitbang_functions.c"
void main(){
unsigned int i, j, k;
reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2
reg_debug_1 = 0x0;
reg_debug_2 = 0x0;
reg_hkspi_disable = 1;
reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_35 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_28 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_23 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_11 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLUP;
reg_mprj_xfer = 1;
while (reg_mprj_xfer == 1);
reg_debug_1 = 0XAA; // configuration done
while (true);
}

3
verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c
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@ -50,7 +50,8 @@ void main(){
reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_NOPULL;
reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL;
reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL;
reg_mprj_userl = 0xFFFFFFFF;
reg_mprj_userh = 0x3F;
reg_mprj_xfer = 1;
while (reg_mprj_xfer == 1);

205
verilog/dv/cocotb/tests/gpio/gpio_user.py
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@ -149,3 +149,208 @@ async def gpio_all_i_user(dut):
else:
cocotb.log.info(f"[TEST] [TEST] PASS: firmware cannot write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}")
cocotb.log.info(f"[TEST] finish")
@cocotb.test()
@repot_test
async def gpio_all_i_pu_user(dut):
caravelEnv,clock = await test_configure(dut,timeout_cycles=58961,num_error=2000)
await caravelEnv.release_csb()
cpu = RiskV(dut)
cpu.cpu_force_reset()
cpu.cpu_release_reset()
uut = dut.uut
await wait_reg1(cpu,caravelEnv,0xAA)
# monitor the output of padframe module it suppose to be all ones when no input is applied
await ClockCycles(caravelEnv.clk,100)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i] != "1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and float")
await ClockCycles(caravelEnv.clk,1000)
# drive gpios with zero
data_in = 0x0
caravelEnv.drive_gpio_in((37,0),data_in)
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i] != "0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with 0")
await ClockCycles(caravelEnv.clk,1000)
# drive gpios with ones
data_in = 0x3FFFFFFFFF
caravelEnv.drive_gpio_in((37,0),data_in)
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i] != "1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with 1")
await ClockCycles(caravelEnv.clk,1000)
# drive odd half gpios with zeros and float other half
data_in = 0x0
caravelEnv.drive_gpio_in((37,0),data_in)
for i in range(0,38,2):
caravelEnv.release_gpio(i) # release even gpios
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if i%2 ==1: #odd
if gpio[i]!="1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 0")
else:
if gpio[i] != "0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with odd half with 0")
await ClockCycles(caravelEnv.clk,1000)
# drive even half gpios with zeros and float other half
caravelEnv.drive_gpio_in((37,0),data_in)
for i in range(1,38,2):
caravelEnv.release_gpio(i) # release odd gpios
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if i%2 ==1: #odd
if gpio[i] != "0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with even half with 0")
else:
if gpio[i]!="1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 0")
await ClockCycles(caravelEnv.clk,1000)
# drive odd half gpios with ones and float other half
data_in = 0x3FFFFFFFFF
caravelEnv.drive_gpio_in((37,0),data_in)
for i in range(0,38,2):
caravelEnv.release_gpio(i) # release even gpios
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i]!="1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 1")
await ClockCycles(caravelEnv.clk,1000)
# drive even half gpios with zeros and float other half
caravelEnv.drive_gpio_in((37,0),data_in)
for i in range(1,38,2):
caravelEnv.release_gpio(i) # release odd gpios
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i] != "1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 1")
await ClockCycles(caravelEnv.clk,1000)
# drive with zeros then release all gpio
data_in = 0x0
caravelEnv.drive_gpio_in((37,0),data_in)
await ClockCycles(caravelEnv.clk,1000)
caravelEnv.release_gpio((37,0))
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i] != "1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and all released")
await ClockCycles(caravelEnv.clk,1000)
@cocotb.test()
@repot_test
async def gpio_all_i_pd_user(dut):
caravelEnv,clock = await test_configure(dut,timeout_cycles=58961,num_error=2000)
await caravelEnv.release_csb()
cpu = RiskV(dut)
cpu.cpu_force_reset()
cpu.cpu_release_reset()
uut = dut.uut
await wait_reg1(cpu,caravelEnv,0xAA)
# monitor the output of padframe module it suppose to be all ones when no input is applied
await ClockCycles(caravelEnv.clk,100)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i] != "0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and float")
await ClockCycles(caravelEnv.clk,1000)
# drive gpios with zero
data_in = 0x0
caravelEnv.drive_gpio_in((37,0),data_in)
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i] != "0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with 0")
await ClockCycles(caravelEnv.clk,1000)
# drive gpios with ones
data_in = 0x3FFFFFFFFF
caravelEnv.drive_gpio_in((37,0),data_in)
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i] != "1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with 1")
await ClockCycles(caravelEnv.clk,1000)
# drive odd half gpios with zeros and float other half
data_in = 0x0
caravelEnv.drive_gpio_in((37,0),data_in)
for i in range(0,38,2):
caravelEnv.release_gpio(i) # release even gpios
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i]!="0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 0")
await ClockCycles(caravelEnv.clk,1000)
# drive even half gpios with zeros and float other half
caravelEnv.drive_gpio_in((37,0),data_in)
for i in range(1,38,2):
caravelEnv.release_gpio(i) # release odd gpios
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i]!="0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with even half with 0")
await ClockCycles(caravelEnv.clk,1000)
# drive odd half gpios with ones and float other half
data_in = 0x3FFFFFFFFF
caravelEnv.drive_gpio_in((37,0),data_in)
for i in range(0,38,2):
caravelEnv.release_gpio(i) # release even gpios
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if i%2 ==0: #even
if gpio[i]!="1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1")
else:
if gpio[i] != "0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1")
await ClockCycles(caravelEnv.clk,1000)
# drive even half gpios with zeros and float other half
caravelEnv.drive_gpio_in((37,0),data_in)
for i in range(1,38,2):
caravelEnv.release_gpio(i) # release odd gpios
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if i%2 ==1: #odd
if gpio[i]!="1":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1")
else:
if gpio[i] != "0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1")
await ClockCycles(caravelEnv.clk,1000)
# drive with ones then release all gpio
data_in = 0x3FFFFFFFFF
caravelEnv.drive_gpio_in((37,0),data_in)
await ClockCycles(caravelEnv.clk,1000)
caravelEnv.release_gpio((37,0))
await ClockCycles(caravelEnv.clk,1000)
gpio = dut.uut.padframe.mprj_io_in.value.binstr
for i in range(38):
if gpio[i] != "0":
cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and all released")
await ClockCycles(caravelEnv.clk,1000)

2
verilog/dv/cocotb/verify_cocotb.py
View File

@ -91,7 +91,7 @@ class RunTest:
macros = f'+define+FUNCTIONAL +define+USE_POWER_PINS +define+UNIT_DELAY=#1 +define+MAIN_PATH=\\\"{self.cocotb_path}\\\" +define+VCS '
if self.test_name == "la":
macros = f'{macros} +define+LA_TESTING'
if self.test_name in ["gpio_all_o_user","gpio_all_i_user"]:
if self.test_name in ["gpio_all_o_user","gpio_all_i_user","gpio_all_i_pu_user","gpio_all_i_pd_user"]:
macros = f'{macros} +define+GPIO_TESTING'
# shutil.copyfile(f'{self.test_full_dir}/{self.test_name}.hex',f'{self.sim_path}/{self.test_name}.hex')
# if os.path.exists(f'{self.test_full_dir}/test_data'):