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fix iverlog command for the new structure

This commit is contained in:
M0stafaRady 2022-10-02 06:38:22 -07:00
parent d8a4b812e8
commit 752d12928b
1 changed files with 1 additions and 1 deletions
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2
verilog/dv/cocotb/Makefile
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@ -46,7 +46,7 @@ cocotb:
iverilog -Ttyp -DFUNCTIONAL -DSIM -DUSE_POWER_PINS -DUNIT_DELAY=#1 \
-DTESTNAME=\"$(TestName)\" -DTAG=\"$(RUNTAG)\" -DSIM=\"$(SIM)\" \
-f$(VERILOG_PATH)/includes/includes.rtl.caravel \
-f$(USER_PROJECT_VERILOG)/includes/includes.rtl.$(CONFIG) -o sim_build/sim.vvp caravel_top.sv
-o sim_build/sim.vvp caravel_top.sv
#GL
# iverilog -Ttyp -DFUNCTIONAL -DGL -DUSE_POWER_PINS -DUNIT_DELAY=#1 \
# -DTESTNAME=\"$(TestName)\" -DRUNTAG=\"$(RUNTAG)\" -DSIM=\"$(SIM)\" \