diff --git a/verilog/gl/gpio_signal_buffering.v b/verilog/gl/gpio_signal_buffering.v
index b9247a37..d4890ba6 100644
--- a/verilog/gl/gpio_signal_buffering.v
+++ b/verilog/gl/gpio_signal_buffering.v
@@ -1987,7 +1987,7 @@ module gpio_signal_buffering(vccd, vssd, mgmt_io_in_unbuf, mgmt_io_out_unbuf, mg
     .VGND(vssd),
     .VNB(vssd),
     .VPB(vccd),
-    .VPWR(vccd),
+    .VPWR(vccd)
   );
 
   /* End of hand-editing */