From 653e7fa56142f6b2c8faf2c069354b607a88668c Mon Sep 17 00:00:00 2001 From: Passant Date: Fri, 14 Oct 2022 15:02:16 -0700 Subject: [PATCH] update top-level rtl to resolve conflict with adding top level buffers between housekeeping and `gpio_control_block` https://github.com/efabless/caravel/pull/213 --- verilog/rtl/caravel.v | 41 +++++++++++++++++++++++++++++++++-------- 1 file changed, 33 insertions(+), 8 deletions(-) diff --git a/verilog/rtl/caravel.v b/verilog/rtl/caravel.v index 8be8aba5..1aa740db 100644 --- a/verilog/rtl/caravel.v +++ b/verilog/rtl/caravel.v @@ -174,12 +174,18 @@ module caravel ( // ser_tx = mprj_io[6] (output) // irq = mprj_io[7] (input) - wire [`MPRJ_IO_PADS-1:0] mgmt_io_in; /* one- and three-pin data in */ - wire [`MPRJ_IO_PADS-1:0] mgmt_io_out; /* one- and three-pin data out */ - wire [`MPRJ_IO_PADS-1:0] mgmt_io_oeb; /* output enable, used only by */ - /* the three-pin interfaces */ - wire [`MPRJ_PWR_PADS-1:0] pwr_ctrl_nc; /* no-connects */ + wire [`MPRJ_IO_PADS-1:0] mgmt_io_in; /* two- and three-pin data in */ + wire [`MPRJ_IO_PADS-1:0] mgmt_io_out; /* two- and three-pin data out */ + wire [`MPRJ_IO_PADS-1:0] mgmt_io_oeb; /* output enable, used only by */ + /* the three-pin interfaces */ + wire [`MPRJ_PWR_PADS-1:0] pwr_ctrl_nc; /* no-connects */ + /* Buffers are placed between housekeeping and gpio_control_block */ + /* instances to mitigate timing issues on very long (> 1.5mm) wires. */ + wire [`MPRJ_IO_PADS-1:0] mgmt_io_in_hk; /* two- and three-pin data in */ + wire [`MPRJ_IO_PADS-1:0] mgmt_io_out_hk; /* two- and three-pin data out */ + wire [`MPRJ_IO_PADS-1:0] mgmt_io_oeb_hk; /* output enable, used only by */ + wire clock_core; // Power-on-reset signal. The reset pad generates the sense-inverted @@ -276,6 +282,25 @@ module caravel ( flash_io0_di_buf }) ); + `ifdef NO_TOP_LEVEL_BUFFERING + assign mgmt_io_in_hk = mgmt_io_in; + assign mgmt_io_out = mgmt_io_out_hk; + assign mgmt_io_oeb = mgmt_io_oeb_hk; + `else + gpio_signal_buffering sigbuf ( + `ifdef USE_POWER_PINS + .vccd(vccd), + .vssd(vssd), + `endif + .mgmt_io_in_unbuf(mgmt_io_in), + .mgmt_io_out_unbuf(mgmt_io_out_hk), + .mgmt_io_oeb_unbuf(mgmt_io_oeb_hk), + .mgmt_io_in_buf(mgmt_io_in_hk), + .mgmt_io_out_buf(mgmt_io_out), + .mgmt_io_oeb_buf(mgmt_io_oeb) + ); + `endif + chip_io padframe( `ifndef TOP_ROUTING // Package Pins @@ -791,9 +816,9 @@ module caravel ( .serial_data_1(mprj_io_loader_data_1), .serial_data_2(mprj_io_loader_data_2), - .mgmt_gpio_in(mgmt_io_in), - .mgmt_gpio_out(mgmt_io_out), - .mgmt_gpio_oeb(mgmt_io_oeb), + .mgmt_gpio_in(mgmt_io_in_hk), + .mgmt_gpio_out(mgmt_io_out_hk), + .mgmt_gpio_oeb(mgmt_io_oeb_hk), .pwr_ctrl_out(pwr_ctrl_nc), /* Not used in this version */