Merge branch 'main' into remove_depency_over_power

This commit is contained in:
Jeff DiCorpo 2023-10-23 07:50:12 -07:00 committed by GitHub
commit 610a874a82
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28 changed files with 14858 additions and 10151 deletions

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@ -51,7 +51,7 @@ jobs:
git remote add parent https://github.com/efabless/caravel
git pull parent main
git fetch --all --tags
git filter-repo --path def --path-glob 'signoff/*/openlane-signoff/spef' --path signoff/caravel/caravel.sdc --path signoff/caravan/caravan.sdc --path openlane/user_project_wrapper --path openlane/user_analog_project_wrapper --path openlane/Makefile --path gds/user_project_wrapper_empty.gds.gz --path gds/user_analog_project_wrapper_empty.gds.gz --path mag/user_project_wrapper_empty.mag --path mag/user_analog_project_wrapper_empty.mag --path lef/user_project_wrapper_empty.lef --path lef/user_analog_project_wrapper_empty.lef --path verilog/ --path Makefile --path scripts/ --path LICENSE --path manifest --path spi/lvs/run_lvs.sh --path gds/gds2mag-all.sh --path gds/drc_on_gds.tcl --path gds/antenna_on_gds.tcl --path spi/lvs/caravel.spice --path spi/lvs/caravan.spice --force
git filter-repo --path def --path-glob 'signoff/*/openlane-signoff/spef' --path signoff/caravel/caravel.sdc --path signoff/caravan/caravan.sdc --path openlane/user_project_wrapper --path openlane/user_analog_project_wrapper --path openlane/Makefile --path gds/user_project_wrapper_empty.gds.gz --path gds/user_analog_project_wrapper_empty.gds.gz --path gds/openframe_project_wrapper_empty.gds.gz --path mag/user_project_wrapper_empty.mag --path mag/user_analog_project_wrapper_empty.mag --path lef/user_project_wrapper_empty.lef --path lef/user_analog_project_wrapper_empty.lef --path verilog/ --path Makefile --path scripts/ --path LICENSE --path manifest --path spi/lvs/run_lvs.sh --path gds/gds2mag-all.sh --path gds/drc_on_gds.tcl --path gds/antenna_on_gds.tcl --path spi/lvs/caravel.spice --path spi/lvs/caravan.spice --force
git remote add caravel_lite https://x-access-token:${{ secrets.EFSTAFF_TOKEN }}@github.com/efabless/caravel-lite
git push --force caravel_lite main
git push -f --tags caravel_lite main

27
.github/workflows/block_CI.yaml vendored Normal file
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@ -0,0 +1,27 @@
name: Block PR
on:
pull_request:
branches:
- main
jobs:
changed_files:
runs-on: ubuntu-latest
name: Test changed-files
permissions:
pull-requests: read
steps:
- name: Get changed files
id: changed-files
uses: tj-actions/changed-files@v39
- name: List all changed files
run: |
for file in ${{ steps.changed-files.outputs.all_changed_files }}; do
echo "$file was changed"
if [[ "$file" == *"verilog/rtl/"* || "$file" == *"mag/"* || "$file" == *"gds/"* ]]; then
exit 1
fi
done

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@ -31,12 +31,18 @@ SPLIT_FILES := $(shell find . -type f -name "*.$(ARCHIVE_EXT).00.split")
SPLIT_FILES_SOURCES := $(basename $(basename $(basename $(SPLIT_FILES))))
# Needed to uncompress the existing archives
ARCHIVES := $(shell find . -type f -not -path "./signoff/*" -not -path "./mgmt_core_wrapper/signoff/*" -name "*.$(ARCHIVE_EXT)")
ARCHIVES := $(shell find . -type f -not -path "*/signoff/*" -name "*.$(ARCHIVE_EXT)")
ARCHIVE_SOURCES := $(basename $(ARCHIVES))
# Needed to compress and split files/archives that are too large
LARGE_FILES := $(shell find ./gds -type f -name "*.gds")
LARGE_FILES += $(shell find . -type f -size +$(FILE_SIZE_LIMIT_MB)M -not -path "./signoff/*" -not -path "./mgmt_core_wrapper/signoff/*" -not -path "./.git/*" -not -path "./*/.git/*" -not -path "./gds/*" -not -path "./tapeout/outputs/oas/*" -not -path "./openlane/*")
LARGE_FILES += $(shell find . -type f -size +$(FILE_SIZE_LIMIT_MB)M \
-not -path "*/signoff/*" \
-not -path "*/.git/*" \
-not -path "./gds/*" \
-not -path "./tapeout/outputs/oas/*" \
-not -path "*/openlane/*" \
-not -name "*.$(ARCHIVE_EXT)")
LARGE_FILES_GZ := $(addsuffix .$(ARCHIVE_EXT), $(LARGE_FILES))
LARGE_FILES_GZ_SPLIT := $(addsuffix .$(ARCHIVE_EXT).00.split, $(LARGE_FILES))
# consider splitting existing archives
@ -44,7 +50,7 @@ LARGE_FILES_GZ_SPLIT += $(addsuffix .00.split, $(ARCHIVES))
MCW_ROOT?=$(PWD)/mgmt_core_wrapper
MCW ?=LITEX_VEXRISCV
MPW_TAG ?= mpw-9c
MPW_TAG ?= mpw-9e
PYTHON_BIN ?= python3
@ -56,12 +62,12 @@ MCW_LITE?=1
ifeq ($(MCW),LITEX_VEXRISCV)
MCW_NAME := mcw-litex-vexriscv
MCW_REPO := https://github.com/efabless/caravel_mgmt_soc_litex
MCW_TAG := $(MPW_TAG)
MCW_REPO ?= https://github.com/efabless/caravel_mgmt_soc_litex
MCW_TAG ?= $(MPW_TAG)
else
MCW_NAME := mcw-pico
MCW_REPO := https://github.com/efabless/caravel_pico
MCW_TAG := $(MPW_TAG)
MCW_REPO ?= https://github.com/efabless/caravel_pico
MCW_TAG ?= $(MPW_TAG)
endif
# Install caravel as submodule, (1): submodule, (0): clone
@ -194,6 +200,47 @@ __truck:
@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_truck.out
### @rm $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl
.PHONY: openframe
openframe: check-env uncompress uncompress-caravel
ifeq ($(FOREGROUND),1)
@echo "Running make openframe in the foreground..."
$(MAKE) -f $(CARAVEL_ROOT)/Makefile __openframe
@echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out
else
@echo "Running make openframe in the background..."
nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __openframe >/dev/null 2>&1 &
tail -f signoff/build/make_openframe.out
@echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out
endif
__openframe:
@echo "###############################################"
@echo "Generating Caravel GDS (sources are in the 'gds' directory)"
@sleep 1
#### Runs from the CARAVEL_ROOT mag directory
@echo "\
drc off; \
crashbackups stop; \
addpath hexdigits; \
addpath $(UPRJ_ROOT)/mag; \
load openframe_project_wrapper; \
property LEFview true; \
property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \
property GDS_START 0; \
load $(UPRJ_ROOT)/mag/user_id_programming; \
load $(UPRJ_ROOT)/mag/user_id_textblock; \
load $(CARAVEL_ROOT)/maglef/simple_por; \
load caravel_openframe -dereference; \
select top cell; \
expand; \
cif *hier write disable; \
cif *array write disable; \
gds write $(UPRJ_ROOT)/gds/caravel_openframe.gds; \
quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel_openframe.tcl
### Runs from CARAVEL_ROOT
@mkdir -p ./signoff/build
@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel_openframe.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_openframe.out
.PHONY: clean
clean:
cd $(CARAVEL_ROOT)/verilog/dv/caravel/mgmt_soc/ && \
@ -1173,7 +1220,7 @@ update_caravel:
.PHONY: install_mcw
install_mcw:
if [ -d "$(MCW_ROOT)" ]; then \
echo "Deleting exisiting $(MCW_ROOT)" && \
echo "Deleting existing $(MCW_ROOT)" && \
rm -rf $(MCW_ROOT) && sleep 2;\
fi
ifeq ($(SUBMODULE),1)
@ -1250,7 +1297,7 @@ clean-pdk:
.PHONY: skywater-pdk
skywater-pdk:
if [ -d "$(PDK_ROOT)/skywater-pdk" ]; then\
echo "Deleting exisiting $(PDK_ROOT)/skywater-pdk" && \
echo "Deleting existing $(PDK_ROOT)/skywater-pdk" && \
rm -rf $(PDK_ROOT)/skywater-pdk && sleep 2;\
fi
git clone https://github.com/google/skywater-pdk.git $(PDK_ROOT)/skywater-pdk
@ -1267,7 +1314,7 @@ skywater-pdk:
.PHONY: open-pdks
open-pdks:
if [ -d "$(PDK_ROOT)/open_pdks" ]; then \
echo "Deleting exisiting $(PDK_ROOT)/open_pdks" && \
echo "Deleting existing $(PDK_ROOT)/open_pdks" && \
rm -rf $(PDK_ROOT)/open_pdks && sleep 2; \
fi
git clone git://opencircuitdesign.com/open_pdks $(PDK_ROOT)/open_pdks
@ -1278,7 +1325,7 @@ open-pdks:
.PHONY: sky130
sky130:
if [ -d "$(PDK_ROOT)/$(PDK)" ]; then \
echo "Deleting exisiting $(PDK_ROOT)/$(PDK)" && \
echo "Deleting existing $(PDK_ROOT)/$(PDK)" && \
rm -rf $(PDK_ROOT)/$(PDK) && sleep 2;\
fi
docker run --rm\

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@ -1,26 +1,7 @@
magic
tech sky130A
magscale 1 2
timestamp 1686190293
<< checkpaint >>
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rect 40504 1354274 43088 1356846
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rect 674512 -299646 677096 -297074
rect 674512 -342846 677096 -340274
rect 674512 -386046 677096 -383474
<< error_p >>
rect 149223 18082 150855 18116
timestamp 1695675344
<< metal5 >>
rect 78440 1018512 90960 1031002
rect 129840 1018512 142360 1031002
@ -86,11 +67,11 @@ rect 515440 6598 527960 19088
rect 570422 6811 582590 18975
rect 624222 6811 636390 18975
use chip_io_openframe chip_io_openframe_0
timestamp 1686190293
timestamp 1695675801
transform 1 0 0 0 1 0
box 0 0 717600 1037600
use openframe_project_wrapper openframe_project_wrapper_0
timestamp 1686190293
timestamp 1695675240
transform 1 0 42137 0 1 42137
box -444 -444 633770 953770
<< labels >>

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@ -1,216 +1,272 @@
magic
tech sky130A
magscale 1 2
timestamp 1686190293
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rect 675731 107091 675887 107147
rect 675407 107084 675887 107091
rect 675407 106503 675887 106510
rect 675407 106447 675506 106503
rect 675731 106447 675887 106503
rect 675407 106440 675887 106447
rect 675407 105859 675887 105866
rect 675407 105803 675505 105859
rect 675730 105803 675887 105859
rect 675407 105796 675887 105803
rect 675406 105307 675886 105314
rect 675406 105251 675504 105307
rect 675729 105251 675886 105307
rect 675406 105244 675886 105251
rect 675407 104663 675887 104670
rect 675407 104607 675504 104663
rect 675729 104607 675887 104663
rect 675407 104600 675887 104607
rect 675407 103467 675887 103474
rect 675407 103411 675506 103467
rect 675731 103411 675887 103467
rect 675407 103404 675887 103411
rect 675407 102823 675887 102830
rect 675407 102767 675505 102823
rect 675730 102767 675887 102823
rect 675407 102760 675887 102767
rect 675407 100983 675887 100990
rect 675407 100927 675505 100983
rect 675730 100927 675887 100983
rect 675407 100920 675887 100927
rect 677177 115796 677607 115920
rect 677177 115711 677247 115796
rect 675407 115641 677247 115711
rect 677191 115332 677421 115337
rect 675942 115272 677196 115332
rect 677416 115272 677421 115332
rect 675942 115159 676002 115272
rect 677191 115267 677421 115272
rect 675407 115089 676002 115159
rect 677193 114923 677423 114928
rect 676200 114863 677198 114923
rect 677418 114863 677423 114923
rect 676200 114515 676260 114863
rect 677193 114858 677423 114863
rect 677190 114778 677420 114783
rect 675407 114445 676260 114515
rect 676326 114718 677195 114778
rect 677415 114718 677420 114778
rect 676326 113871 676386 114718
rect 677190 114713 677420 114718
rect 675407 113801 676386 113871
rect 675407 111961 677290 112031
rect 677220 111689 677290 111961
rect 675407 111409 677054 111479
rect 677220 111469 677225 111689
rect 677285 111469 677290 111689
rect 677220 111464 677290 111469
rect 676984 110840 677054 111409
rect 675407 110765 676832 110835
rect 676762 110463 676832 110765
rect 676984 110620 676989 110840
rect 677049 110620 677054 110840
rect 676984 110615 677054 110620
rect 676762 110243 676767 110463
rect 676827 110243 676832 110463
rect 676762 110238 676832 110243
rect 675407 110121 676617 110191
rect 676547 110016 676617 110121
rect 676547 109796 676552 110016
rect 676612 109796 676617 110016
rect 676547 109790 676617 109796
rect 675407 107637 677442 107707
rect 675407 107085 677250 107155
rect 677382 107120 677442 107637
rect 677180 106827 677250 107085
rect 677377 107115 677447 107120
rect 677377 106895 677382 107115
rect 677442 106895 677447 107115
rect 677377 106890 677447 106895
rect 677180 106761 677616 106827
rect 675407 106510 677379 106511
rect 675407 106505 677444 106510
rect 675407 106441 677379 106505
rect 677374 106285 677379 106441
rect 677439 106285 677444 106505
rect 677374 106280 677444 106285
rect 677375 105867 677445 105870
rect 675407 105865 677445 105867
rect 675407 105807 677380 105865
rect 675407 105797 675887 105807
rect 677375 105645 677380 105807
rect 677440 105645 677445 105865
rect 677375 105640 677445 105645
rect 675407 105172 677260 105386
rect 675407 104601 676955 104671
rect 675407 103375 676790 103503
rect 675407 102761 676542 102831
rect 676286 102179 676362 102187
rect 676286 101963 676291 102179
rect 676357 101963 676362 102179
rect 676286 101958 676362 101963
rect 675407 100921 676153 100991
rect 676087 100152 676153 100921
rect 676291 100284 676357 101958
rect 676482 100647 676542 102761
rect 676662 100909 676790 103375
rect 676894 102802 676954 104601
rect 677046 103436 677260 105172
rect 677046 103222 677607 103436
rect 676889 102797 676959 102802
rect 676889 102577 676894 102797
rect 676954 102577 676959 102797
rect 676889 102572 676959 102577
rect 676657 100904 676795 100909
rect 676477 100642 676547 100647
rect 676477 100422 676482 100642
rect 676542 100422 676547 100642
rect 676657 100616 676662 100904
rect 676790 100616 676795 100904
rect 676657 100611 676795 100616
rect 676477 100417 676547 100422
rect 676291 100218 677607 100284
rect 676087 100086 677607 100152
<< properties >>
string flatten true
<< end >>

View File

@ -0,0 +1,215 @@
magic
tech sky130A
magscale 1 2
timestamp 1695745122
<< metal1 >>
rect 675768 115799 675774 116011
rect 675826 115799 675832 116011
rect 675682 113371 675734 115709
rect 675586 112665 675638 112671
rect 675586 112487 675638 112493
rect 675588 108330 675636 112487
rect 675682 108990 675734 113199
rect 675586 108324 675638 108330
rect 675586 108146 675638 108152
rect 675588 100462 675636 108146
rect 675586 100456 675638 100462
rect 675586 100278 675638 100284
rect 675588 100265 675636 100278
rect 675682 99896 675734 108806
rect 675776 102383 675824 115799
rect 675878 109636 675930 109642
rect 675878 109452 675930 109458
rect 675774 102377 675826 102383
rect 675774 102119 675826 102125
rect 675880 101831 675928 109452
rect 677392 103462 677399 103674
rect 677451 103514 677458 103674
rect 677451 103462 677652 103514
rect 675878 101825 675930 101831
rect 675878 101567 675930 101573
<< via1 >>
rect 675774 115799 675826 116011
rect 675682 113199 675734 113371
rect 675586 112493 675638 112665
rect 675682 108806 675734 108990
rect 675586 108152 675638 108324
rect 675586 100284 675638 100456
rect 675878 109458 675930 109636
rect 675774 102125 675826 102377
rect 677399 103462 677451 103674
rect 675878 101573 675930 101825
<< metal2 >>
rect 675774 116011 675826 116017
rect 676698 116015 676758 116024
rect 675826 115961 676698 116009
rect 675826 115801 675836 115961
rect 676685 115801 676698 115961
rect 675774 115793 675826 115799
rect 676698 115786 676758 115795
rect 677000 115915 677278 115920
rect 677000 115801 677159 115915
rect 677273 115801 677282 115915
rect 677000 115796 677278 115801
rect 677000 115703 677085 115796
rect 675831 115647 677085 115703
rect 677025 115279 677614 115325
rect 677025 115151 677071 115279
rect 675874 115095 677071 115151
rect 676855 114870 677614 114916
rect 676855 114507 676901 114870
rect 675874 114451 676901 114507
rect 677017 114722 677614 114774
rect 677017 113863 677069 114722
rect 675874 113807 677069 113863
rect 676969 113397 677614 113449
rect 675676 113199 675682 113371
rect 675734 113311 675740 113371
rect 676969 113311 677021 113397
rect 675734 113255 677021 113311
rect 675734 113199 675740 113255
rect 677022 112686 677614 112738
rect 677022 112667 677074 112686
rect 675580 112665 677074 112667
rect 675580 112493 675586 112665
rect 675638 112611 677074 112665
rect 675638 112493 675644 112611
rect 675874 111967 677216 112023
rect 677164 111529 677216 111967
rect 677164 111477 677614 111529
rect 675874 111415 677044 111471
rect 675874 110771 676892 110827
rect 676836 110302 676892 110771
rect 676992 110680 677044 111415
rect 676992 110628 677614 110680
rect 676836 110250 677614 110302
rect 675874 110127 676727 110183
rect 676671 109850 676727 110127
rect 676671 109798 677614 109850
rect 675872 109637 675936 109643
rect 675872 109636 677614 109637
rect 675872 109458 675878 109636
rect 675930 109585 677614 109636
rect 675930 109581 676776 109585
rect 675930 109458 675936 109581
rect 675872 109451 675936 109458
rect 675676 108990 675740 108997
rect 675676 108806 675682 108990
rect 675734 108908 675740 108990
rect 675734 108856 677614 108908
rect 675734 108806 675740 108856
rect 675676 108799 675740 108806
rect 675580 108326 675644 108331
rect 675580 108324 677230 108326
rect 675580 108152 675586 108324
rect 675638 108322 677230 108324
rect 675638 108270 677614 108322
rect 675638 108152 675644 108270
rect 675580 108145 675644 108152
rect 675874 107643 677216 107699
rect 675874 107091 677086 107147
rect 677020 106982 677086 107091
rect 677016 106766 677025 106982
rect 677081 106766 677090 106982
rect 677164 106951 677216 107643
rect 677164 106899 677614 106951
rect 677020 106761 677086 106766
rect 675874 106447 677230 106503
rect 677174 106029 677230 106447
rect 677174 105977 677614 106029
rect 675874 105803 677451 105859
rect 676806 105386 677010 105390
rect 675407 105381 677015 105386
rect 675407 105172 676806 105381
rect 676801 104977 676806 105172
rect 677010 104977 677015 105381
rect 676801 104972 677015 104977
rect 676806 104968 677010 104972
rect 675874 104607 676520 104663
rect 675407 103375 676368 103503
rect 676240 103038 676368 103375
rect 676466 103185 676518 104607
rect 677399 103674 677451 105803
rect 677399 103456 677451 103462
rect 676466 103133 677240 103185
rect 676240 102910 677133 103038
rect 675874 102767 676909 102823
rect 675769 102377 675832 102383
rect 675769 102125 675774 102377
rect 675826 102179 675832 102377
rect 675826 102125 676776 102179
rect 675769 102123 676776 102125
rect 675769 102116 675832 102123
rect 675871 101825 675936 101834
rect 675871 101573 675878 101825
rect 675930 101627 675936 101825
rect 675930 101573 676610 101627
rect 675871 101571 676610 101573
rect 675871 101564 675936 101571
rect 675874 100927 676467 100983
rect 675580 100456 675644 100463
rect 675580 100284 675586 100456
rect 675638 100339 675644 100456
rect 675638 100284 676255 100339
rect 676401 100307 676467 100927
rect 675580 100283 676255 100284
rect 675580 100276 675644 100283
rect 676214 100057 676254 100283
rect 676397 100091 676406 100307
rect 676462 100091 676471 100307
rect 676570 100259 676610 101571
rect 676710 100595 676776 102123
rect 676710 100379 676715 100595
rect 676771 100379 676776 100595
rect 676857 100478 676909 102767
rect 677005 100744 677133 102910
rect 677188 102633 677240 103133
rect 677188 102581 677614 102633
rect 677005 100616 677614 100744
rect 676857 100426 677614 100478
rect 676710 100374 676776 100379
rect 676715 100370 676771 100374
rect 676570 100219 677614 100259
rect 676401 100086 676467 100091
rect 676214 100017 677614 100057
<< via2 >>
rect 676698 115795 676758 116015
rect 677159 115801 677273 115915
rect 677025 106766 677081 106982
rect 676806 104977 677010 105381
rect 676406 100091 676462 100307
rect 676715 100379 676771 100595
<< metal3 >>
rect 676696 116020 676756 117658
rect 676693 116015 676763 116020
rect 676693 115795 676698 116015
rect 676758 115795 676763 116015
rect 677154 115915 677614 115920
rect 677154 115801 677159 115915
rect 677273 115801 677614 115915
rect 677154 115796 677614 115801
rect 676693 115790 676763 115795
rect 676696 115783 676756 115790
rect 677020 106982 677095 106987
rect 677020 106766 677025 106982
rect 677081 106827 677095 106982
rect 677081 106766 677614 106827
rect 677020 106761 677614 106766
rect 676801 105381 677015 105386
rect 676801 104977 676806 105381
rect 677010 104977 677015 105381
rect 676801 103436 677015 104977
rect 676801 103222 677614 103436
rect 676710 100595 676776 100600
rect 676710 100379 676715 100595
rect 676771 100379 676776 100595
rect 676401 100307 676472 100312
rect 676401 100091 676406 100307
rect 676462 100152 676472 100307
rect 676710 100284 676776 100379
rect 676710 100218 677614 100284
rect 676462 100091 677614 100152
rect 676401 100086 677614 100091
<< properties >>
string flatten true
<< end >>

File diff suppressed because it is too large Load Diff

View File

@ -2,6 +2,8 @@ magic
tech sky130A
magscale 1 2
timestamp 1665254080
<< checkpaint >>
rect -1206 -764 3966 3484
<< viali >>
rect 581 1853 615 1887
rect 1409 1717 1443 1751
@ -486,70 +488,70 @@ rect 2202 1056 2220 1120
rect 2284 1056 2300 1120
rect 2364 1056 2382 1120
rect 2202 496 2382 1056
use sky130_fd_sc_hd__fill_2 FILLER_0_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1663720911
transform 1 0 92 0 1 544
box -38 -48 222 592
use sky130_fd_sc_hd__fill_2 FILLER_0_24
timestamp 1663720911
transform 1 0 2300 0 1 544
box -38 -48 222 592
use sky130_fd_sc_hd__fill_1 FILLER_0_27 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1663720911
transform 1 0 2576 0 1 544
box -38 -48 130 592
use sky130_fd_sc_hd__fill_4 FILLER_1_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1663720911
transform 1 0 92 0 -1 1632
box -38 -48 406 592
use sky130_fd_sc_hd__fill_1 FILLER_1_4
timestamp 1663720911
transform 1 0 460 0 -1 1632
box -38 -48 130 592
use sky130_fd_sc_hd__fill_8 FILLER_1_8 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1663720911
transform 1 0 828 0 -1 1632
box -38 -48 774 592
use sky130_fd_sc_hd__fill_8 FILLER_1_16
timestamp 1663720911
transform 1 0 1564 0 -1 1632
box -38 -48 774 592
use sky130_fd_sc_hd__fill_4 FILLER_1_24
timestamp 1663720911
transform 1 0 2300 0 -1 1632
box -38 -48 406 592
use sky130_fd_sc_hd__fill_2 FILLER_2_0
timestamp 1663720911
transform 1 0 92 0 1 1632
box -38 -48 222 592
use sky130_fd_sc_hd__fill_2 FILLER_2_24
timestamp 1663720911
transform 1 0 2300 0 1 1632
box -38 -48 222 592
use sky130_fd_sc_hd__fill_1 FILLER_2_27
timestamp 1663720911
transform 1 0 2576 0 1 1632
box -38 -48 130 592
use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1663720911
transform 1 0 2484 0 1 544
box -38 -48 130 592
use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_1
timestamp 1663720911
transform 1 0 2484 0 1 1632
box -38 -48 130 592
use sky130_fd_sc_hd__buf_16 const_one_buf $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1663720911
timestamp 1692890899
transform 1 0 276 0 1 1632
box -38 -48 2062 592
use sky130_fd_sc_hd__conb_1 const_source $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1663720911
timestamp 1692890899
transform -1 0 828 0 -1 1632
box -38 -48 314 592
use sky130_fd_sc_hd__buf_16 const_zero_buf
timestamp 1663720911
timestamp 1692890899
transform 1 0 276 0 1 544
box -38 -48 2062 592
use sky130_fd_sc_hd__fill_2 FILLER_0_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1692890899
transform 1 0 92 0 1 544
box -38 -48 222 592
use sky130_fd_sc_hd__fill_2 FILLER_0_24
timestamp 1692890899
transform 1 0 2300 0 1 544
box -38 -48 222 592
use sky130_fd_sc_hd__fill_1 FILLER_0_27 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1692890899
transform 1 0 2576 0 1 544
box -38 -48 130 592
use sky130_fd_sc_hd__fill_4 FILLER_1_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1692890899
transform 1 0 92 0 -1 1632
box -38 -48 406 592
use sky130_fd_sc_hd__fill_1 FILLER_1_4
timestamp 1692890899
transform 1 0 460 0 -1 1632
box -38 -48 130 592
use sky130_fd_sc_hd__fill_8 FILLER_1_8 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1692890899
transform 1 0 828 0 -1 1632
box -38 -48 774 592
use sky130_fd_sc_hd__fill_8 FILLER_1_16
timestamp 1692890899
transform 1 0 1564 0 -1 1632
box -38 -48 774 592
use sky130_fd_sc_hd__fill_4 FILLER_1_24
timestamp 1692890899
transform 1 0 2300 0 -1 1632
box -38 -48 406 592
use sky130_fd_sc_hd__fill_2 FILLER_2_0
timestamp 1692890899
transform 1 0 92 0 1 1632
box -38 -48 222 592
use sky130_fd_sc_hd__fill_2 FILLER_2_24
timestamp 1692890899
transform 1 0 2300 0 1 1632
box -38 -48 222 592
use sky130_fd_sc_hd__fill_1 FILLER_2_27
timestamp 1692890899
transform 1 0 2576 0 1 1632
box -38 -48 130 592
use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
timestamp 1692890899
transform 1 0 2484 0 1 544
box -38 -48 130 592
use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_1
timestamp 1692890899
transform 1 0 2484 0 1 1632
box -38 -48 130 592
<< labels >>
flabel metal3 s 2000 1232 2800 1352 0 FreeSans 480 0 0 0 one
port 0 nsew signal tristate

File diff suppressed because it is too large Load Diff

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@ -2,6 +2,10 @@ magic
tech sky130A
magscale 1 2
timestamp 1680223961
<< checkpaint >>
rect 6151 8561 12163 9595
rect 6141 6135 12163 8561
rect 6141 5101 12153 6135
<< isosubstrate >>
rect -52 7354 7222 8450
rect -52 -62 11288 7354
@ -615,23 +619,23 @@ timestamp 1606074388
transform 1 0 5446 0 1 3098
box -5446 -3098 5446 3098
use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1679235063
timestamp 1692890899
transform 1 0 8523 0 1 6404
box -66 -43 1986 897
use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_1
timestamp 1679235063
timestamp 1692890899
transform 1 0 7477 0 1 7438
box -66 -43 1986 897
use sky130_fd_sc_hvl__fill_4 sky130_fd_sc_hvl__fill_4_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1679235063
timestamp 1692890899
transform 1 0 10443 0 1 6404
box -66 -43 450 897
use sky130_fd_sc_hvl__inv_8 sky130_fd_sc_hvl__inv_8_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1679235063
timestamp 1692890899
transform 1 0 9397 0 1 7438
box -66 -43 1506 897
use sky130_fd_sc_hvl__schmittbuf_1 sky130_fd_sc_hvl__schmittbuf_1_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1679235063
timestamp 1692890899
transform 1 0 7467 0 1 6404
box -66 -43 1122 897
<< labels >>

File diff suppressed because it is too large Load Diff

View File

@ -2,6 +2,8 @@ magic
tech sky130A
magscale 1 2
timestamp 1678062433
<< checkpaint >>
rect -846 -529 4782 4559
<< isosubstrate >>
rect 0 0 4000 3400
<< viali >>
@ -236,67 +238,67 @@ rect 790 763 970 782
rect 2090 763 2270 1596
rect 2970 814 3150 3256
use sky130_fd_sc_hvl__diode_2 ANTENNA_lvlshiftdown_A $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1648946573
timestamp 1692890899
transform 1 0 1536 0 -1 3256
box -66 -43 258 897
use sky130_fd_sc_hvl__decap_8 FILLER_0_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1648946573
timestamp 1692890899
transform 1 0 480 0 -1 1628
box -66 -43 834 897
use sky130_fd_sc_hvl__decap_8 FILLER_0_8
timestamp 1648946573
timestamp 1692890899
transform 1 0 1248 0 -1 1628
box -66 -43 834 897
use sky130_fd_sc_hvl__decap_8 FILLER_0_16
timestamp 1648946573
timestamp 1692890899
transform 1 0 2016 0 -1 1628
box -66 -43 834 897
use sky130_fd_sc_hvl__decap_4 FILLER_0_24 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1648946573
timestamp 1692890899
transform 1 0 2784 0 -1 1628
box -66 -43 450 897
use sky130_fd_sc_hvl__fill_2 FILLER_0_28 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1648946573
timestamp 1692890899
transform 1 0 3168 0 -1 1628
box -66 -43 258 897
use sky130_fd_sc_hvl__fill_1 FILLER_0_30 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1648946573
timestamp 1692890899
transform 1 0 3360 0 -1 1628
box -66 -43 162 897
use sky130_fd_sc_hvl__decap_8 FILLER_1_0
timestamp 1648946573
timestamp 1692890899
transform 1 0 480 0 1 1628
box -66 -43 834 897
use sky130_fd_sc_hvl__decap_4 FILLER_1_8
timestamp 1648946573
timestamp 1692890899
transform 1 0 1248 0 1 1628
box -66 -43 450 897
use sky130_fd_sc_hvl__fill_1 FILLER_1_12
timestamp 1648946573
timestamp 1692890899
transform 1 0 1632 0 1 1628
box -66 -43 162 897
use sky130_fd_sc_hvl__fill_1 FILLER_1_30
timestamp 1648946573
timestamp 1692890899
transform 1 0 3360 0 1 1628
box -66 -43 162 897
use sky130_fd_sc_hvl__decap_8 FILLER_2_0
timestamp 1648946573
timestamp 1692890899
transform 1 0 480 0 -1 3256
box -66 -43 834 897
use sky130_fd_sc_hvl__fill_2 FILLER_2_8
timestamp 1648946573
timestamp 1692890899
transform 1 0 1248 0 -1 3256
box -66 -43 258 897
use sky130_fd_sc_hvl__fill_1 FILLER_2_10
timestamp 1648946573
timestamp 1692890899
transform 1 0 1440 0 -1 3256
box -66 -43 162 897
use sky130_fd_sc_hvl__fill_1 FILLER_2_30
timestamp 1648946573
timestamp 1692890899
transform 1 0 3360 0 -1 3256
box -66 -43 162 897
use sky130_fd_sc_hvl__lsbufhv2lv_1 lvlshiftdown $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag
timestamp 1648946573
timestamp 1692890899
transform 1 0 1728 0 1 1628
box -66 -43 1698 1671
<< labels >>

View File

@ -1,4 +1,4 @@
489e60b851555f9238e3f9949c01b95fbad13565 verilog/rtl/__openframe_project_wrapper.v
5b0e67cbc4fd8ee8edeb380102e7e7ae07796bcc verilog/rtl/__openframe_project_wrapper.v
535d0592c0b1349489b6b86fd5449f9d1d81482e verilog/rtl/__uprj_analog_netlists.v
87735eb5981740ca4d4b48e6b0321c8bb0023800 verilog/rtl/__uprj_netlists.v
729a8ce3c67c5197578ecc31db960c91ce437b27 verilog/rtl/__user_analog_project_wrapper.v
@ -7,10 +7,10 @@
cc82a78753f5f5d0a1519bd81adbcff8a4296d91 verilog/rtl/__user_project_wrapper.v
3c8c04f53b2848dc46132cda82c614e06e56571b verilog/rtl/buff_flash_clkrst.v
14064261ec18d633a5d72b45b2347c388f2f446f verilog/rtl/caravan.v
120661aaee20d83948e5e419a88ca9b63531ec95 verilog/rtl/caravan_core.v
864365067a3fbb8fe3354d94d94c7b8469999850 verilog/rtl/caravan_core.v
e68fd2e085679d0f61040115fdd1d50651705d3a verilog/rtl/caravan_logo.v
d265ea6bf861e3f5c1b1b984ae057dbaed995008 verilog/rtl/caravan_motto.v
d36e539fad7563a03974cb7d18489e6a0ccfe80d verilog/rtl/caravan_netlists.v
baf7cf0e8a8a712621aed75aff98198a663db43b verilog/rtl/caravan_netlists.v
a3d12a2d2d3596800bec47d1266dce2399a2fcc6 verilog/rtl/caravan_openframe.v
b532b4c6315c29fd19fe38ac221b6fc41e6f5ecb verilog/rtl/caravan_power_routing.v
fa26aa34b4b382aacad9b7ac07a36b17172a401f verilog/rtl/caravel.v
@ -52,7 +52,8 @@ b53c154e6acaf44e858c936c8027d0229608676e verilog/rtl/pads.v
669d16642d5dd5f6824812754db20db98c9fe17b verilog/rtl/ring_osc2x13.v
83937790b8f5dbcdd7e9a804b5e9bdf475c0ab7d verilog/rtl/simple_por.v
b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v
9178c87e3d5196fd3e6abae6fc310e1b663ade0e verilog/rtl/toplevel_cocotb.v
8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v
256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py
98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py
9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py
731116709a44d13225170acc83cd34ff9e00fa39 scripts/generate_fill.py
dff8adfb05bedf96f86e16a18ce3cd5818d6fb78 scripts/compositor.py

View File

@ -147,9 +147,10 @@ if __name__ == '__main__':
keepmode = True
magpath = mag_dir_path
rcfile = magpath + '/.magicrc'
# pdk_root = os.getenv("PDK_ROOT")
# rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc'
# rcfile = magpath + '/.magicrc'
pdk_root = os.getenv("PDK_ROOT")
pdk = os.getenv("PDK")
rcfile = pdk_root + '/' + pdk + '/libs.tech/magic/' + pdk + '.magicrc'
gdspath = gds_dir_path

View File

@ -153,9 +153,10 @@ if __name__ == '__main__':
distmode = True
magpath = user_project_path + '/mag'
rcfile = magpath + '/.magicrc'
# pdk_root = os.getenv("PDK_ROOT")
# rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc'
# rcfile = magpath + '/.magicrc'
pdk_root = os.getenv("PDK_ROOT")
pdk = os.getenv("PDK")
rcfile = pdk_root + '/' + pdk + '/libs.tech/magic/' + pdk + '.magicrc'
if not os.path.isfile(rcfile):
rcfile = None
@ -187,12 +188,14 @@ if __name__ == '__main__':
print('gds readonly true', file=ofile)
print('gds rescale false', file=ofile)
print('gds read ../gds/' + project, file=ofile)
print('load ' + project, file=ofile)
print('select top cell', file=ofile)
print('expand', file=ofile)
if not distmode:
print('cif ostyle wafflefill(tiled)', file=ofile)
print('', file=ofile)
print('set fullbox [box values]', file=ofile)
# print('set fullbox [box values]', file=ofile)
print('set fullbox { 0 0 717600 1037600 }', file=ofile)
print('set xmax [lindex $fullbox 2]', file=ofile)
print('set xmin [lindex $fullbox 0]', file=ofile)
print('set fullwidth [expr {$xmax - $xmin}]', file=ofile)

View File

@ -2,7 +2,7 @@
#
# Run LVS on the Openframe padframe layout and verilog.
# If the layout netlist does not exist, then generate it from the
# extracted .mag layout of the caravel_openframe top level. The
# extracted .mag layout of the chip_io_openframe top level. The
# LVS script for netgen will read both top level netlists and then
# compare the padframe cell.
#
@ -11,11 +11,11 @@
echo ${PDK_ROOT:=/usr/share/pdk} > /dev/null
echo ${PDK:=sky130A} > /dev/null
if [ ! -f caravel_openframe.spice ]; then
if [ ! -f chip_io_openframe.spice ]; then
magic -dnull -noconsole -rcfile $PDK_ROOT/$PDK/libs.tech/magic/$PDK.magicrc << EOF
drc off
crashbackups stop
load caravel_openframe
load chip_io_openframe
select top cell
expand
extract do local
@ -40,11 +40,11 @@ cat > netgen.tcl << EOF
# Load top level netlists
puts stdout "Reading layout netlist:"
set circuit1 [readnet spice caravel_openframe.spice]
set circuit1 [readnet spice chip_io_openframe.spice]
puts stdout "Reading verilog and schematic netlists:"
puts stdout "Reading SPICE netlists of I/O:"
set circuit2 [readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_fd_io.spice]
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_ef_io.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/cdl/sky130_ef_io.cdl \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap_12.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice \$circuit2
@ -61,8 +61,8 @@ readnet verilog ../verilog/gl/constant_block.v \$circuit2
readnet verilog ../verilog/gl/xres_buf.v \$circuit2
# ALSO NOTE: Top-level modules are in the RTL directory but are purely gate level.
readnet verilog ../verilog/rtl/chip_io_openframe.v \$circuit2
readnet verilog ../verilog/rtl/caravel_openframe.v \$circuit2
# readnet verilog ../verilog/rtl/chip_io_openframe.v \$circuit2
readnet verilog ../verilog/gl/chip_io_openframe.v \$circuit2
puts stdout "Done reading netlists."
# Run LVS on the chip_io_openframe cells in layout and verilog.

View File

@ -44,7 +44,7 @@ set circuit1 [readnet spice caravel_openframe.spice]
puts stdout "Reading verilog and schematic netlists:"
puts stdout "Reading SPICE netlists of I/O:"
set circuit2 [readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_fd_io.spice]
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_ef_io.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/cdl/sky130_ef_io.cdl \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap_12.spice \$circuit2
readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice \$circuit2

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -43,6 +43,8 @@ module openframe_project_wrapper (
inout vssd, // Common digital ground
inout vssd1, // User area 1 digital ground
inout vssd2, // User area 2 digital ground
inout vddio, // Common 3.3V ESD supply
inout vssio, // Common ESD ground
`endif
/* Signals exported from the frame area to the user project */
@ -116,6 +118,8 @@ module openframe_project_wrapper (
.vssd(vssd),
.vssd1(vssd1),
.vssd2(vssd2),
.vddio(vddio),
.vssio(vssio),
`endif
.porb_h(porb_h),
.porb_l(porb_l),

View File

@ -123,10 +123,10 @@ module caravan_core (
// User project direct access to gpio pad connections for analog
// (all but the lowest-numbered 7 pads)
inout [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_analog,
inout [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_noesd,
inout [`ANALOG_PADS-1:0] user_analog,
inout [2:0] user_clamp_high,
inout wire [2:0] user_clamp_low
inout [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_noesd,
inout [`ANALOG_PADS-1:0] user_analog,
inout [2:0] user_clamp_high,
inout [2:0] user_clamp_low
);
//------------------------------------------------------------
@ -180,28 +180,28 @@ module caravan_core (
*/
// One-bit GPIO dedicated to management SoC (outside of user control)
wire gpio_out_core;
wire gpio_in_core;
wire gpio_mode0_core;
wire gpio_mode1_core;
wire gpio_outenb_core;
wire gpio_inenb_core;
// wire gpio_out_core;
// wire gpio_in_core;
// wire gpio_mode0_core;
// wire gpio_mode1_core;
// wire gpio_outenb_core;
// wire gpio_inenb_core;
// 27 GPIO pads with full controls
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_inp_dis;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_oeb;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_ib_mode_sel;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_vtrip_sel;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_slow_sel;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_holdover;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_en;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_sel;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_pol;
wire [(`MPRJ_IO_PADS-`ANALOG_PADS)*3-1:0] mprj_io_dm;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_in;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_in_3v3;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_out;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_one;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_inp_dis;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_oeb;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_ib_mode_sel;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_vtrip_sel;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_slow_sel;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_holdover;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_en;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_sel;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_pol;
// wire [(`MPRJ_IO_PADS-`ANALOG_PADS)*3-1:0] mprj_io_dm;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_in;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_in_3v3;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_out;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_one;
wire [7:0] mprj_io_zero;
// User Project Control (user-facing)
@ -212,15 +212,15 @@ module caravan_core (
wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] user_io_in_3v3;
// 18 direct connections to GPIO for low-frequency, low-voltage analog
wire [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_analog;
wire [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_noesd;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_analog;
// wire [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_noesd;
// 3 power supply ESD clamps for user applications
wire [2:0] user_clamp_high;
wire [2:0] user_clamp_low;
// wire [2:0] user_clamp_high;
// wire [2:0] user_clamp_low;
// 11 core connections to the analog pads
wire [`ANALOG_PADS-1:0] user_analog;
// wire [`ANALOG_PADS-1:0] user_analog;
/* Padframe control signals */
wire [`MPRJ_IO_PADS_1-`ANALOG_PADS_1-1:0] gpio_serial_link_1;

View File

@ -97,11 +97,16 @@
`include "buff_flash_clkrst.v"
`include "RAM128.v"
`include "RAM256.v"
`include "VexRiscv_MinDebug.v"
`include "VexRiscv_MinDebugCache.v"
`include "mgmt_core.v"
`include "caravan.v"
`endif
`include "simple_por.v"
`include "caravan_core.v"
`include "caravan_logo.v"
`include "caravan_motto.v"
`include "copyright_block_a.v"
`include "open_source.v"
`include "user_id_textblock.v"
`endif

View File

@ -419,7 +419,7 @@ module chip_io_openframe #(
/* Openframe pads (right side, power domain 1) */
sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad [`MPRJ_IO_PADS_1 - 1:0] (
sky130_ef_io__gpiov2_pad area1_gpio_pad [`MPRJ_IO_PADS_1 - 1:0] (
`USER1_ABUTMENT_PINS
`ifndef TOP_ROUTING
.PAD(gpio[`MPRJ_IO_PADS_1 - 1:0]),
@ -452,7 +452,7 @@ module chip_io_openframe #(
/* Openframe pads (left side, power domain 2) */
sky130_ef_io__gpiov2_pad_wrapped area2_gpio_pad [`MPRJ_IO_PADS_2 - 1:0] (
sky130_ef_io__gpiov2_pad area2_gpio_pad [`MPRJ_IO_PADS_2 - 1:0] (
`USER2_ABUTMENT_PINS
`ifndef TOP_ROUTING
.PAD(gpio[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]),
@ -485,7 +485,7 @@ module chip_io_openframe #(
/* Openframe pads (bottom side, power domain 0) */
sky130_ef_io__gpiov2_pad_wrapped area0_gpio_pad [`OPENFRAME_IO_PADS - (`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2) - 1:0] (
sky130_ef_io__gpiov2_pad area0_gpio_pad [`OPENFRAME_IO_PADS - (`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2) - 1:0] (
`MGMT_ABUTMENT_PINS
`ifndef TOP_ROUTING
.PAD(gpio[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]),

View File

@ -45,11 +45,11 @@
`endif
`ifdef GL
`include "gl/user_id_programming.v"
`include "gl/chip_io_openframe.v"
`include "user_id_programming.v"
`include "chip_io_openframe.v"
`include "gl/constant_block.v"
`include "gl/xres_buf.v"
`include "gl/caravel_openframe.v"
`include "caravel_openframe.v"
`else
`include "user_id_programming.v"
`include "chip_io_openframe.v"

View File

@ -0,0 +1,445 @@
`timescale 1 ns / 1 ps
`include "includes.v" // in case of RTL coverage is needed and it doesn't work correctly without include files by this way
module caravel_top ;
// parameter FILENAME = {"hex_files/",`TESTNAME,".hex"};
parameter FILENAME={"firmware.hex"};
`ifdef WAVE_GEN
initial begin
`ifdef VCS
`ifdef ENABLE_SDF
$vcdplusfile("waves.vpd");
`else
$vcdplusfile("waves.vpd");
`endif
// $vcdplusmemorydump();
$vcdpluson();
`else
$dumpfile ({"waves.vcd"});
$dumpvars (0, caravel_top);
`endif
end
`endif // WAVE_GEN
`ifdef ENABLE_SDF
`ifdef VCS
initial begin
`ifndef CARAVAN
`ifdef ARM
$sdf_annotate({`SDF_PATH,"/",`SDF_POSTFIX,"/swift_caravel.",`CORNER ,".sdf"}, uut,,{`RUN_PATH,"/sim/",`TAG,"/",`FTESTNAME,"/caravel_sdf.log"},`ifdef MAX_SDF "MAXIMUM" `else "MINIMUM" `endif );
`else
$sdf_annotate({`SDF_PATH,"/",`SDF_POSTFIX,"/caravel.",`CORNER ,".sdf"}, uut,,{`RUN_PATH,"/sim/",`TAG,"/",`FTESTNAME,"/caravel_sdf.log"},`ifdef MAX_SDF "MAXIMUM" `else "MINIMUM" `endif );
`endif //ARM
`else // CARAVAN
$sdf_annotate({`SDF_PATH,"/",`SDF_POSTFIX,"/caravan.", `CORNER,".sdf"}, uut,,{`RUN_PATH,"/sim/",`TAG,"/",`FTESTNAME,"/caravan_sdf.log"},`ifdef MAX_SDF "MAXIMUM" `else "MINIMUM" `endif );
`endif
`ifdef USER_SDF_ENABLE
$sdf_annotate({`USER_PROJECT_ROOT,"/signoff/user_project_wrapper/primetime/sdf/",`SDF_POSTFIX,"/user_project_wrapper.", `CORNER,".sdf"}, uut.chip_core.mprj,,{`RUN_PATH,"/sim/",`TAG,"/",`FTESTNAME,"/user_prog_sdf.log"},`ifdef MAX_SDF "MAXIMUM" `else "MINIMUM" `endif );
`endif // USER_SDF_ENABLE
end
`endif // VCS
`endif // ENABLE_SDF
wire vddio_tb; // Common 3.3V padframe/ESD power
wire vddio_2_tb; // Common 3.3V padframe/ESD power
wire vssio_tb; // Common padframe/ESD ground
wire vssio_2_tb; // Common padframe/ESD ground
wire vdda_tb; // Management 3.3V power
wire vssa_tb; // Common analog ground
wire vccd_tb; // Management/Common 1.8V power
wire vssd_tb; // Common digital ground
wire vdda1_tb; // User area 1 3.3V power
wire vdda1_2_tb; // User area 1 3.3V power
wire vdda2_tb; // User area 2 3.3V power
wire vssa1_tb; // User area 1 analog ground
wire vssa1_2_tb; // User area 1 analog ground
wire vssa2_tb; // User area 2 analog ground
wire vccd1_tb; // User area 1 1.8V power
wire vccd2_tb; // User area 2 1.8V power
wire vssd1_tb; // User area 1 digital ground
wire vssd2_tb; // User area 2 digital ground
wire gpio_tb; // Used for external LDO control
`ifndef OPENFRAME
wire [`MPRJ_IO_PADS-1:0] mprj_io_tb;
`else //OPENFRAME
wire [`OPENFRAME_IO_PADS-1:0] mprj_io_tb;
`endif //OPENFRAME
reg clock_tb; // CMOS core clock input; not a crystal
wire resetb_tb; // Reset input (sense inverted)
// Note that only two flash data pins are dedicated to the
// management SoC wrapper. The management SoC exports the
// quad SPI mode status to make use of the top two mprj_io
// pins for io2 and io3.
wire flash_csb_tb;
wire flash_clk_tb;
wire flash_io0_tb;
wire flash_io1_tb;
`ifndef OPENFRAME
`ifdef CPU_TYPE_ARM
swift_caravel uut (
`else //CPU_TYPE_ARM
`ifdef CARAVAN
caravan uut (
`else // caravan
caravel uut (
`endif // caravan
`endif // CPU_TYPE_ARM
`ifdef sky130
.vddio (vddio_tb),
.vddio_2 (vddio_2_tb),
.vssio (vssio_tb),
.vssio_2 (vssio_2_tb),
.vdda (vdda_tb),
.vssa (vssa_tb),
.vccd (vccd_tb),
.vssd (vssd_tb),
.vdda1 (vdda1_tb),
.vdda1_2 (vdda1_2_tb),
.vdda2 (vdda2_tb),
.vssa1 (vssa1_tb),
.vssa1_2 (vssa1_2_tb),
.vssa2 (vssa2_tb),
.vccd1 (vccd1_tb),
.vccd2 (vccd2_tb),
.vssd1 (vssd1_tb),
.vssd2 (vssd2_tb),
`elsif gf180
.VDD (vddio_tb),
.VSS (vssio_tb),
`endif // sky130
.clock (clock_tb),
.gpio (gpio_tb),
.mprj_io (mprj_io_tb),
.flash_csb(flash_csb_tb),
.flash_clk(flash_clk_tb),
.flash_io0(flash_io0_tb),
.flash_io1(flash_io1_tb),
.resetb (resetb_tb)
);
`ifdef CPU_TYPE_ARM
sst26wf080b flash(
.SCK (flash_clk_tb),
.SIO ({mprj_io_tb[37], mprj_io_tb[36], flash_io1_tb, flash_io0_tb} ),
.CEb (flash_csb_tb)
);
initial begin
$display("Reading %s", FILENAME);
#1 $readmemh(FILENAME, flash.I0.memory);
//$display("Memory 5 bytes = 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
// memory[0], memory[1], memory[2],
// memory[3], memory[4]);
$display("%s loaded into memory", FILENAME);
$display("Memory 5 bytes = 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
flash.I0.memory[0], flash.I0.memory[1], flash.I0.memory[2],
flash.I0.memory[3], flash.I0.memory[4]);
end
`else
spiflash #(
FILENAME
) spiflash (
.csb(flash_csb_tb),
.clk(flash_clk_tb),
.io0(flash_io0_tb),
.io1(flash_io1_tb),
.io2(), // not used
.io3() // not used
);
`endif // CPU_TYPE_ARM
`else // ! openframe
assign mprj_io_tb[38] = clock_tb;
caravel_openframe uut (
.vddio (vddio_tb),
.vssio (vssio_tb),
.vdda (vdda_tb),
.vssa (vssa_tb),
.vccd (vccd_tb),
.vssd (vssd_tb),
.vdda1 (vdda1_tb),
.vdda2 (vdda2_tb),
.vssa1 (vssa1_tb),
.vssa2 (vssa2_tb),
.vccd1 (vccd1_tb),
.vccd2 (vccd2_tb),
.vssd1 (vssd1_tb),
.vssd2 (vssd2_tb),
.gpio (mprj_io_tb),
.resetb (resetb_tb)
);
spiflash #(
.FILENAME(FILENAME)
) spiflash (
.csb(mprj_io_tb[39]),
.clk(mprj_io_tb[40]),
.io0(mprj_io_tb[41]),
.io1(mprj_io_tb[42]),
.io2(mprj_io_tb[36]),
.io3(mprj_io_tb[37])
);
// do anything to the unused wires so cocotb can read them when iverilog is used
// apparently iverilog can't read the unused wires and that causes an error in python
assign gpio_tb = 0;
assign vddio_2_tb = 0;
assign vssio_2_tb = 0;
assign vdda1_2_tb = 0;
assign vssa1_2_tb = 0;
`endif // ! openframe
`ifdef USE_USER_VIP
`USER_VIP
`endif // USE_USER_VIP
// make speical variables for the mprj input to assign the input without writing to the output gpios
// cocotb limitation #2587: iverilog deal with array as 1 object not multiple of objects so can't write to only 1 element
wire gpio0;
wire gpio0_en;
wire gpio1;
wire gpio1_en;
wire gpio2;
wire gpio2_en;
wire gpio3;
wire gpio3_en;
wire gpio4;
wire gpio4_en;
wire gpio5;
wire gpio5_en;
wire gpio6;
wire gpio6_en;
wire gpio7;
wire gpio7_en;
wire gpio8;
wire gpio8_en;
wire gpio9;
wire gpio9_en;
wire gpio10;
wire gpio10_en;
wire gpio11;
wire gpio11_en;
wire gpio12;
wire gpio12_en;
wire gpio13;
wire gpio13_en;
wire gpio14;
wire gpio14_en;
wire gpio15;
wire gpio15_en;
wire gpio16;
wire gpio16_en;
wire gpio17;
wire gpio17_en;
wire gpio18;
wire gpio18_en;
wire gpio19;
wire gpio19_en;
wire gpio20;
wire gpio20_en;
wire gpio21;
wire gpio21_en;
wire gpio22;
wire gpio22_en;
wire gpio23;
wire gpio23_en;
wire gpio24;
wire gpio24_en;
wire gpio25;
wire gpio25_en;
wire gpio26;
wire gpio26_en;
wire gpio27;
wire gpio27_en;
wire gpio28;
wire gpio28_en;
wire gpio29;
wire gpio29_en;
wire gpio30;
wire gpio30_en;
wire gpio31;
wire gpio31_en;
wire gpio32;
wire gpio32_en;
wire gpio33;
wire gpio33_en;
wire gpio34;
wire gpio34_en;
wire gpio35;
wire gpio35_en;
wire gpio36;
wire gpio36_en;
wire gpio37;
wire gpio37_en;
`ifdef OPENFRAME
wire gpio38;
wire gpio38_en;
wire gpio39;
wire gpio39_en;
wire gpio40;
wire gpio40_en;
wire gpio41;
wire gpio41_en;
wire gpio42;
wire gpio42_en;
wire gpio43;
wire gpio43_en;
`endif // OPENFRAME
assign mprj_io_tb[0] = (gpio0_en) ? gpio0 : 1'bz;
assign mprj_io_tb[1] = (gpio1_en) ? gpio1 : 1'bz;
assign mprj_io_tb[2] = (gpio2_en) ? gpio2 : 1'bz;
assign mprj_io_tb[3] = (gpio3_en) ? gpio3 : 1'bz;
assign mprj_io_tb[4] = (gpio4_en) ? gpio4 : 1'bz;
assign mprj_io_tb[5] = (gpio5_en) ? gpio5 : 1'bz;
assign mprj_io_tb[6] = (gpio6_en) ? gpio6 : 1'bz;
assign mprj_io_tb[7] = (gpio7_en) ? gpio7 : 1'bz;
assign mprj_io_tb[8] = (gpio8_en) ? gpio8 : 1'bz;
assign mprj_io_tb[9] = (gpio9_en) ? gpio9 : 1'bz;
assign mprj_io_tb[10] = (gpio10_en) ? gpio10 : 1'bz;
assign mprj_io_tb[11] = (gpio11_en) ? gpio11 : 1'bz;
assign mprj_io_tb[12] = (gpio12_en) ? gpio12 : 1'bz;
assign mprj_io_tb[13] = (gpio13_en) ? gpio13 : 1'bz;
assign mprj_io_tb[14] = (gpio14_en) ? gpio14 : 1'bz;
assign mprj_io_tb[15] = (gpio15_en) ? gpio15 : 1'bz;
assign mprj_io_tb[16] = (gpio16_en) ? gpio16 : 1'bz;
assign mprj_io_tb[17] = (gpio17_en) ? gpio17 : 1'bz;
assign mprj_io_tb[18] = (gpio18_en) ? gpio18 : 1'bz;
assign mprj_io_tb[19] = (gpio19_en) ? gpio19 : 1'bz;
assign mprj_io_tb[20] = (gpio20_en) ? gpio20 : 1'bz;
assign mprj_io_tb[21] = (gpio21_en) ? gpio21 : 1'bz;
assign mprj_io_tb[22] = (gpio22_en) ? gpio22 : 1'bz;
assign mprj_io_tb[23] = (gpio23_en) ? gpio23 : 1'bz;
assign mprj_io_tb[24] = (gpio24_en) ? gpio24 : 1'bz;
assign mprj_io_tb[25] = (gpio25_en) ? gpio25 : 1'bz;
assign mprj_io_tb[26] = (gpio26_en) ? gpio26 : 1'bz;
assign mprj_io_tb[27] = (gpio27_en) ? gpio27 : 1'bz;
assign mprj_io_tb[28] = (gpio28_en) ? gpio28 : 1'bz;
assign mprj_io_tb[29] = (gpio29_en) ? gpio29 : 1'bz;
assign mprj_io_tb[30] = (gpio30_en) ? gpio30 : 1'bz;
assign mprj_io_tb[31] = (gpio31_en) ? gpio31 : 1'bz;
assign mprj_io_tb[32] = (gpio32_en) ? gpio32 : 1'bz;
assign mprj_io_tb[33] = (gpio33_en) ? gpio33 : 1'bz;
assign mprj_io_tb[34] = (gpio34_en) ? gpio34 : 1'bz;
assign mprj_io_tb[35] = (gpio35_en) ? gpio35 : 1'bz;
assign mprj_io_tb[36] = (gpio36_en) ? gpio36 : 1'bz;
assign mprj_io_tb[37] = (gpio37_en) ? gpio37 : 1'bz;
`ifdef OPENFRAME
assign mprj_io_tb[38] = (gpio38_en) ? gpio38 : 1'bz;
assign mprj_io_tb[39] = (gpio39_en) ? gpio39 : 1'bz;
assign mprj_io_tb[40] = (gpio40_en) ? gpio40 : 1'bz;
assign mprj_io_tb[41] = (gpio41_en) ? gpio41 : 1'bz;
assign mprj_io_tb[42] = (gpio42_en) ? gpio42 : 1'bz;
assign mprj_io_tb[43] = (gpio43_en) ? gpio43 : 1'bz;
`endif // OPENFRAME
// to read from mprj array with iverilog
wire gpio0_monitor;
wire gpio1_monitor;
wire gpio2_monitor;
wire gpio3_monitor;
wire gpio4_monitor;
wire gpio5_monitor;
wire gpio6_monitor;
wire gpio7_monitor;
wire gpio8_monitor;
wire gpio9_monitor;
wire gpio10_monitor;
wire gpio11_monitor;
wire gpio12_monitor;
wire gpio13_monitor;
wire gpio14_monitor;
wire gpio15_monitor;
wire gpio16_monitor;
wire gpio17_monitor;
wire gpio18_monitor;
wire gpio19_monitor;
wire gpio20_monitor;
wire gpio21_monitor;
wire gpio22_monitor;
wire gpio23_monitor;
wire gpio24_monitor;
wire gpio25_monitor;
wire gpio26_monitor;
wire gpio27_monitor;
wire gpio28_monitor;
wire gpio29_monitor;
wire gpio30_monitor;
wire gpio31_monitor;
wire gpio32_monitor;
wire gpio33_monitor;
wire gpio34_monitor;
wire gpio35_monitor;
wire gpio36_monitor;
wire gpio37_monitor;
`ifdef OPENFRAME
wire gpio38_monitor;
wire gpio39_monitor;
wire gpio40_monitor;
wire gpio41_monitor;
wire gpio42_monitor;
wire gpio43_monitor;
`endif // OPENFRAME
assign gpio0_monitor = mprj_io_tb[0];
assign gpio1_monitor = mprj_io_tb[1];
assign gpio2_monitor = mprj_io_tb[2];
assign gpio3_monitor = mprj_io_tb[3];
assign gpio4_monitor = mprj_io_tb[4];
assign gpio5_monitor = mprj_io_tb[5];
assign gpio6_monitor = mprj_io_tb[6];
assign gpio7_monitor = mprj_io_tb[7];
assign gpio8_monitor = mprj_io_tb[8];
assign gpio9_monitor = mprj_io_tb[9];
assign gpio10_monitor = mprj_io_tb[10];
assign gpio11_monitor = mprj_io_tb[11];
assign gpio12_monitor = mprj_io_tb[12];
assign gpio13_monitor = mprj_io_tb[13];
assign gpio14_monitor = mprj_io_tb[14];
assign gpio15_monitor = mprj_io_tb[15];
assign gpio16_monitor = mprj_io_tb[16];
assign gpio17_monitor = mprj_io_tb[17];
assign gpio18_monitor = mprj_io_tb[18];
assign gpio19_monitor = mprj_io_tb[19];
assign gpio20_monitor = mprj_io_tb[20];
assign gpio21_monitor = mprj_io_tb[21];
assign gpio22_monitor = mprj_io_tb[22];
assign gpio23_monitor = mprj_io_tb[23];
assign gpio24_monitor = mprj_io_tb[24];
assign gpio25_monitor = mprj_io_tb[25];
assign gpio26_monitor = mprj_io_tb[26];
assign gpio27_monitor = mprj_io_tb[27];
assign gpio28_monitor = mprj_io_tb[28];
assign gpio29_monitor = mprj_io_tb[29];
assign gpio30_monitor = mprj_io_tb[30];
assign gpio31_monitor = mprj_io_tb[31];
assign gpio32_monitor = mprj_io_tb[32];
assign gpio33_monitor = mprj_io_tb[33];
assign gpio34_monitor = mprj_io_tb[34];
assign gpio35_monitor = mprj_io_tb[35];
assign gpio36_monitor = mprj_io_tb[36];
assign gpio37_monitor = mprj_io_tb[37];
`ifdef OPENFRAME
assign gpio38_monitor = mprj_io_tb[38];
assign gpio39_monitor = mprj_io_tb[39];
assign gpio40_monitor = mprj_io_tb[40];
assign gpio41_monitor = mprj_io_tb[41];
assign gpio42_monitor = mprj_io_tb[42];
assign gpio43_monitor = mprj_io_tb[43];
`endif // OPENFRAME
endmodule