mirror of https://github.com/efabless/caravel.git
Implemented fix from early issue #16. Finally decided to pull the
trigger on this one in the hopes that it helps prevent user error in implementing input pull-up and pull-down on GPIO pins.
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@ -45,7 +45,18 @@
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* the clock half cycle. This avoids the need to fine-tune the clock
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* skew between GPIO blocks.
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*
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* Modified 10/05/2022 by Tim Edwards
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* Modified 10/4/2022 by Tim Edwards
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* Replaces the tri-state output with a zero-value output when the
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* user project is powered down (same modification as was made to the
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* management protect module). This allows all outputs to be buffered
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* and sized by the synthesis tools.
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*
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* Modified 10/5/2022 by Tim Edwards
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* Changed the behavior of the logic for the pad "out" and "oeb"
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* pins for the user so that they match the logic used for the
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* management SoC, which is to automatically control these values
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* when the configuration is set to either input pull-up or input
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* pull-down modes.
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*
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*---------------------------------------------------------------------
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*/
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@ -235,16 +246,18 @@ module gpio_control_block #(
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/* the control block. In this case, the output enable state is */
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/* determined by the OEB configuration bit. */
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assign pad_gpio_outenb = (mgmt_ena) ? ((mgmt_gpio_oeb == 1'b1) ?
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gpio_outenb : 1'b0) : user_gpio_oeb;
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assign pad_gpio_outenb =
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(gpio_dm[2:1] == 2'b01) ? 1'b0 :
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((mgmt_ena) ? ((mgmt_gpio_oeb == 1'b1) ? gpio_outenb : 1'b0) :
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user_gpio_oeb);
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/* For 2-wire interfaces, if the pad is configured for pull-up or */
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/* pull-down, drive the output value locally to achieve the */
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/* expected pull. */
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assign pad_gpio_out = (mgmt_ena) ? ((mgmt_gpio_oeb == 1'b1) ?
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((gpio_dm[2:1] == 2'b01) ? ~gpio_dm[0] : mgmt_gpio_out) :
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mgmt_gpio_out) : user_gpio_out;
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assign pad_gpio_out =
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(gpio_dm[2:1] == 2'b01) ? ~gpio_dm[0] :
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((mgmt_ena) ? mgmt_gpio_out : user_gpio_out);
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/* Buffer user_gpio_in with an enable that is set by the user domain vccd */
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