From 53b09f43d187c83fc4f34f77cd9518a7ac35823a Mon Sep 17 00:00:00 2001 From: manarabdelaty Date: Fri, 5 Nov 2021 12:33:36 +0200 Subject: [PATCH] Add gpio_defaults_block views --- def/gpio_defaults_block.def | 291 ++++ gds/gpio_defaults_block.gds.gz | Bin 0 -> 7794 bytes lef/gpio_defaults_block.lef | 194 +++ mag/gpio_defaults_block.mag | 1307 +++++++++++++++++ maglef/gpio_defaults_block.mag | 115 ++ openlane/gpio_defaults_block/config.tcl | 70 + openlane/gpio_defaults_block/pin_order.cfg | 2 + signoff/gpio_defaults_block/OPENLANE_VERSION | 1 + signoff/gpio_defaults_block/PDK_SOURCES | 6 + .../final_summary_report.csv | 2 + spi/lvs/gpio_defaults_block.spice | 90 ++ verilog/gl/gpio_defaults_block.v | 222 +++ 12 files changed, 2300 insertions(+) create mode 100644 def/gpio_defaults_block.def create mode 100644 gds/gpio_defaults_block.gds.gz create mode 100644 lef/gpio_defaults_block.lef create mode 100644 mag/gpio_defaults_block.mag create mode 100644 maglef/gpio_defaults_block.mag create mode 100644 openlane/gpio_defaults_block/config.tcl create mode 100644 openlane/gpio_defaults_block/pin_order.cfg create mode 100644 signoff/gpio_defaults_block/OPENLANE_VERSION create mode 100644 signoff/gpio_defaults_block/PDK_SOURCES create mode 100644 signoff/gpio_defaults_block/final_summary_report.csv create mode 100644 spi/lvs/gpio_defaults_block.spice create mode 100644 verilog/gl/gpio_defaults_block.v diff --git a/def/gpio_defaults_block.def b/def/gpio_defaults_block.def new file mode 100644 index 00000000..241447d5 --- /dev/null +++ b/def/gpio_defaults_block.def @@ -0,0 +1,291 @@ +VERSION 5.8 ; +DIVIDERCHAR "/" ; +BUSBITCHARS "[]" ; +DESIGN gpio_defaults_block ; +UNITS DISTANCE MICRONS 1000 ; +DIEAREA ( 0 0 ) ( 25000 11000 ) ; +ROW ROW_0 unithd 0 2720 N DO 54 BY 1 STEP 460 0 ; +ROW ROW_1 unithd 0 5440 FS DO 54 BY 1 STEP 460 0 ; +ROW ROW_2 unithd 0 8160 N DO 54 BY 1 STEP 460 0 ; +TRACKS X 230 DO 54 STEP 460 LAYER li1 ; +TRACKS Y 170 DO 32 STEP 340 LAYER li1 ; +TRACKS X 170 DO 74 STEP 340 LAYER met1 ; +TRACKS Y 170 DO 32 STEP 340 LAYER met1 ; +TRACKS X 230 DO 54 STEP 460 LAYER met2 ; +TRACKS Y 230 DO 24 STEP 460 LAYER met2 ; +TRACKS X 340 DO 37 STEP 680 LAYER met3 ; +TRACKS Y 340 DO 16 STEP 680 LAYER met3 ; +TRACKS X 460 DO 27 STEP 920 LAYER met4 ; +TRACKS Y 460 DO 12 STEP 920 LAYER met4 ; +TRACKS X 1700 DO 7 STEP 3400 LAYER met5 ; +TRACKS Y 1700 DO 3 STEP 3400 LAYER met5 ; +GCELLGRID X 0 DO 3 STEP 6900 ; +GCELLGRID Y 0 DO 2 STEP 6900 ; +VIAS 4 ; + - via4_1400x1600 + VIARULE M4M5_PR + CUTSIZE 800 800 + LAYERS met4 via4 met5 + CUTSPACING 800 800 + ENCLOSURE 300 400 310 400 ; + - via_1400x480 + VIARULE M1M2_PR + CUTSIZE 150 150 + LAYERS met1 via met2 + CUTSPACING 170 170 + ENCLOSURE 145 165 55 165 + ROWCOL 1 4 ; + - via2_1400x480 + VIARULE M2M3_PR + CUTSIZE 200 200 + LAYERS met2 via2 met3 + CUTSPACING 200 200 + ENCLOSURE 40 140 200 65 + ROWCOL 1 3 ; + - via3_1400x480 + VIARULE M3M4_PR + CUTSIZE 200 200 + LAYERS met3 via3 met4 + CUTSPACING 200 200 + ENCLOSURE 200 60 200 140 + ROWCOL 1 3 ; +END VIAS +COMPONENTS 38 ; + - FILLER_0_26 sky130_fd_sc_hd__fill_2 + PLACED ( 11960 2720 ) N ; + - FILLER_0_3 sky130_fd_sc_hd__decap_4 + PLACED ( 1380 2720 ) N ; + - FILLER_0_38 sky130_fd_sc_hd__fill_2 + PLACED ( 17480 2720 ) N ; + - FILLER_0_49 sky130_fd_sc_hd__fill_2 + PLACED ( 22540 2720 ) N ; + - FILLER_0_7 sky130_fd_sc_hd__fill_1 + PLACED ( 3220 2720 ) N ; + - FILLER_1_15 sky130_fd_sc_hd__decap_12 + PLACED ( 6900 5440 ) FS ; + - FILLER_1_27 sky130_fd_sc_hd__decap_8 + PLACED ( 12420 5440 ) FS ; + - FILLER_1_3 sky130_fd_sc_hd__decap_12 + PLACED ( 1380 5440 ) FS ; + - FILLER_1_35 sky130_fd_sc_hd__fill_2 + PLACED ( 16100 5440 ) FS ; + - FILLER_1_40 sky130_fd_sc_hd__decap_8 + PLACED ( 18400 5440 ) FS ; + - FILLER_1_48 sky130_fd_sc_hd__decap_3 + PLACED ( 22080 5440 ) FS ; + - FILLER_2_15 sky130_fd_sc_hd__decap_12 + PLACED ( 6900 8160 ) N ; + - FILLER_2_27 sky130_fd_sc_hd__fill_1 + PLACED ( 12420 8160 ) N ; + - FILLER_2_29 sky130_fd_sc_hd__decap_12 + PLACED ( 13340 8160 ) N ; + - FILLER_2_3 sky130_fd_sc_hd__decap_12 + PLACED ( 1380 8160 ) N ; + - FILLER_2_41 sky130_fd_sc_hd__decap_8 + PLACED ( 18860 8160 ) N ; + - FILLER_2_49 sky130_fd_sc_hd__fill_2 + PLACED ( 22540 8160 ) N ; + - PHY_0 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 0 2720 ) N ; + - PHY_1 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 23460 2720 ) FN ; + - PHY_2 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 0 5440 ) FS ; + - PHY_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 23460 5440 ) S ; + - PHY_4 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 0 8160 ) N ; + - PHY_5 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 23460 8160 ) FN ; + - TAP_6 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 12880 2720 ) N ; + - TAP_7 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 12880 8160 ) N ; + - gpio_default_value\[0\] sky130_fd_sc_hd__conb_1 + PLACED ( 3680 2720 ) FN ; + - gpio_default_value\[10\] sky130_fd_sc_hd__conb_1 + PLACED ( 19780 2720 ) N ; + - gpio_default_value\[11\] sky130_fd_sc_hd__conb_1 + PLACED ( 21160 2720 ) FN ; + - gpio_default_value\[12\] sky130_fd_sc_hd__conb_1 + PLACED ( 18400 2720 ) N ; + - gpio_default_value\[1\] sky130_fd_sc_hd__conb_1 + PLACED ( 5060 2720 ) N ; + - gpio_default_value\[2\] sky130_fd_sc_hd__conb_1 + PLACED ( 6440 2720 ) FN ; + - gpio_default_value\[3\] sky130_fd_sc_hd__conb_1 + PLACED ( 7820 2720 ) FN ; + - gpio_default_value\[4\] sky130_fd_sc_hd__conb_1 + PLACED ( 9200 2720 ) FN ; + - gpio_default_value\[5\] sky130_fd_sc_hd__conb_1 + PLACED ( 10580 2720 ) FN ; + - gpio_default_value\[6\] sky130_fd_sc_hd__conb_1 + PLACED ( 13340 2720 ) FN ; + - gpio_default_value\[7\] sky130_fd_sc_hd__conb_1 + PLACED ( 14720 2720 ) FN ; + - gpio_default_value\[8\] sky130_fd_sc_hd__conb_1 + PLACED ( 16100 2720 ) FN ; + - gpio_default_value\[9\] sky130_fd_sc_hd__conb_1 + PLACED ( 17020 5440 ) FS ; +END COMPONENTS +PINS 15 ; + - VGND + NET VGND + SPECIAL + DIRECTION INPUT + USE GROUND + + PORT + + LAYER met4 ( -700 -4320 ) ( 700 4320 ) + + LAYER met4 ( -7700 -4320 ) ( -6300 4320 ) + + LAYER met4 ( -14700 -4320 ) ( -13300 4320 ) + + LAYER met5 ( -18500 380 ) ( 6340 1980 ) + + FIXED ( 18500 6800 ) N ; + - VPWR + NET VPWR + SPECIAL + DIRECTION INPUT + USE POWER + + PORT + + LAYER met4 ( -700 -4320 ) ( 700 4320 ) + + LAYER met4 ( -7700 -4320 ) ( -6300 4320 ) + + LAYER met4 ( -14700 -4320 ) ( -13300 4320 ) + + LAYER met4 ( -21700 -4320 ) ( -20300 4320 ) + + LAYER met5 ( -22000 -3120 ) ( 2840 -1520 ) + + FIXED ( 22000 6800 ) N ; + - gpio_defaults[0] + NET gpio_defaults_low\[0\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 1150 1000 ) N ; + - gpio_defaults[10] + NET gpio_defaults_high\[10\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 20010 1000 ) N ; + - gpio_defaults[11] + NET gpio_defaults_low\[11\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 21850 1000 ) N ; + - gpio_defaults[12] + NET gpio_defaults_low\[12\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 23690 1000 ) N ; + - gpio_defaults[1] + NET gpio_defaults_high\[1\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 2990 1000 ) N ; + - gpio_defaults[2] + NET gpio_defaults_low\[2\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 4830 1000 ) N ; + - gpio_defaults[3] + NET gpio_defaults_low\[3\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 6670 1000 ) N ; + - gpio_defaults[4] + NET gpio_defaults_low\[4\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 8510 1000 ) N ; + - gpio_defaults[5] + NET gpio_defaults_low\[5\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 10350 1000 ) N ; + - gpio_defaults[6] + NET gpio_defaults_low\[6\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 12190 1000 ) N ; + - gpio_defaults[7] + NET gpio_defaults_low\[7\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 14490 1000 ) N ; + - gpio_defaults[8] + NET gpio_defaults_low\[8\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 16330 1000 ) N ; + - gpio_defaults[9] + NET gpio_defaults_low\[9\] + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met2 ( -140 -1000 ) ( 140 1000 ) + + PLACED ( 18170 1000 ) N ; +END PINS +BLOCKAGES 1 ; + - LAYER met5 RECT ( 0 0 ) ( 25000 11000 ) ; +END BLOCKAGES +SPECIALNETS 2 ; + - VGND ( PIN VGND ) ( * VNB ) ( * VGND ) + USE GROUND + + ROUTED met3 0 + SHAPE STRIPE ( 18500 8160 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 18500 8160 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 18500 8160 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 11500 8160 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 11500 8160 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 11500 8160 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 4500 8160 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 4500 8160 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 4500 8160 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 18500 2720 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 18500 2720 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 18500 2720 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 11500 2720 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 11500 2720 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 11500 2720 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 4500 2720 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 4500 2720 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 4500 2720 ) via_1400x480 + NEW met4 0 + SHAPE STRIPE ( 18500 7980 ) via4_1400x1600 + NEW met4 0 + SHAPE STRIPE ( 11500 7980 ) via4_1400x1600 + NEW met4 0 + SHAPE STRIPE ( 4500 7980 ) via4_1400x1600 + NEW met5 1600 + SHAPE STRIPE ( 0 7980 ) ( 24840 7980 ) + NEW met4 1400 + SHAPE STRIPE ( 18500 2480 ) ( 18500 11120 ) + NEW met4 1400 + SHAPE STRIPE ( 11500 2480 ) ( 11500 11120 ) + NEW met4 1400 + SHAPE STRIPE ( 4500 2480 ) ( 4500 11120 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 0 8160 ) ( 24840 8160 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 0 2720 ) ( 24840 2720 ) ; + - VPWR ( PIN VPWR ) ( * VPB ) ( * VPWR ) + USE POWER + + ROUTED met3 0 + SHAPE STRIPE ( 22000 10880 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 22000 10880 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 22000 10880 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 15000 10880 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 15000 10880 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 15000 10880 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 8000 10880 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 8000 10880 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 8000 10880 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 1000 10880 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 1000 10880 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 1000 10880 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 22000 5440 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 22000 5440 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 22000 5440 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 15000 5440 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 15000 5440 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 15000 5440 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 8000 5440 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 8000 5440 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 8000 5440 ) via_1400x480 + NEW met3 0 + SHAPE STRIPE ( 1000 5440 ) via3_1400x480 + NEW met2 0 + SHAPE STRIPE ( 1000 5440 ) via2_1400x480 + NEW met1 0 + SHAPE STRIPE ( 1000 5440 ) via_1400x480 + NEW met4 0 + SHAPE STRIPE ( 22000 4480 ) via4_1400x1600 + NEW met4 0 + SHAPE STRIPE ( 15000 4480 ) via4_1400x1600 + NEW met4 0 + SHAPE STRIPE ( 8000 4480 ) via4_1400x1600 + NEW met4 0 + SHAPE STRIPE ( 1000 4480 ) via4_1400x1600 + NEW met5 1600 + SHAPE STRIPE ( 0 4480 ) ( 24840 4480 ) + NEW met4 1400 + SHAPE STRIPE ( 22000 2480 ) ( 22000 11120 ) + NEW met4 1400 + SHAPE STRIPE ( 15000 2480 ) ( 15000 11120 ) + NEW met4 1400 + SHAPE STRIPE ( 8000 2480 ) ( 8000 11120 ) + NEW met4 1400 + SHAPE STRIPE ( 1000 2480 ) ( 1000 11120 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 0 10880 ) ( 24840 10880 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 0 5440 ) ( 24840 5440 ) ; +END SPECIALNETS +NETS 26 ; + - gpio_defaults_high\[0\] ( gpio_default_value\[0\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[10\] ( PIN gpio_defaults[10] ) ( gpio_default_value\[10\] HI ) + USE SIGNAL + + ROUTED met2 ( 20010 1700 0 ) ( * 3230 ) + NEW li1 ( 20010 3230 ) L1M1_PR_MR + NEW met1 ( 20010 3230 ) M1M2_PR + NEW met1 ( 20010 3230 ) RECT ( -355 -70 0 70 ) ; + - gpio_defaults_high\[11\] ( gpio_default_value\[11\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[12\] ( gpio_default_value\[12\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[1\] ( PIN gpio_defaults[1] ) ( gpio_default_value\[1\] HI ) + USE SIGNAL + + ROUTED met2 ( 2990 1700 0 ) ( * 3230 ) + NEW met1 ( 2990 3230 ) ( 5290 * ) + NEW met1 ( 2990 3230 ) M1M2_PR + NEW li1 ( 5290 3230 ) L1M1_PR_MR ; + - gpio_defaults_high\[2\] ( gpio_default_value\[2\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[3\] ( gpio_default_value\[3\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[4\] ( gpio_default_value\[4\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[5\] ( gpio_default_value\[5\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[6\] ( gpio_default_value\[6\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[7\] ( gpio_default_value\[7\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[8\] ( gpio_default_value\[8\] HI ) + USE SIGNAL ; + - gpio_defaults_high\[9\] ( gpio_default_value\[9\] HI ) + USE SIGNAL ; + - gpio_defaults_low\[0\] ( PIN gpio_defaults[0] ) ( gpio_default_value\[0\] LO ) + USE SIGNAL + + ROUTED met2 ( 1150 1700 0 ) ( * 3910 ) + NEW met1 ( 1150 3910 ) ( 3910 * ) + NEW met1 ( 1150 3910 ) M1M2_PR + NEW li1 ( 3910 3910 ) L1M1_PR_MR ; + - gpio_defaults_low\[10\] ( gpio_default_value\[10\] LO ) + USE SIGNAL ; + - gpio_defaults_low\[11\] ( PIN gpio_defaults[11] ) ( gpio_default_value\[11\] LO ) + USE SIGNAL + + ROUTED met2 ( 21850 1700 0 ) ( * 3910 ) + NEW met1 ( 21390 3910 ) ( 21850 * ) + NEW met1 ( 21850 3910 ) M1M2_PR + NEW li1 ( 21390 3910 ) L1M1_PR_MR ; + - gpio_defaults_low\[12\] ( PIN gpio_defaults[12] ) ( gpio_default_value\[12\] LO ) + USE SIGNAL + + ROUTED met2 ( 23690 1700 0 ) ( * 4250 ) + NEW met1 ( 19550 4250 ) ( 23690 * ) + NEW met1 ( 23690 4250 ) M1M2_PR + NEW li1 ( 19550 4250 ) L1M1_PR_MR ; + - gpio_defaults_low\[1\] ( gpio_default_value\[1\] LO ) + USE SIGNAL ; + - gpio_defaults_low\[2\] ( PIN gpio_defaults[2] ) ( gpio_default_value\[2\] LO ) + USE SIGNAL + + ROUTED met2 ( 4830 1700 0 ) ( 5750 * ) + NEW met2 ( 5750 1700 ) ( * 3910 ) + NEW met1 ( 5750 3910 ) ( 6670 * ) + NEW met1 ( 5750 3910 ) M1M2_PR + NEW li1 ( 6670 3910 ) L1M1_PR_MR ; + - gpio_defaults_low\[3\] ( PIN gpio_defaults[3] ) ( gpio_default_value\[3\] LO ) + USE SIGNAL + + ROUTED met2 ( 6670 1700 0 ) ( * 4590 ) + NEW met1 ( 6670 4590 ) ( 8050 * ) + NEW met1 ( 6670 4590 ) M1M2_PR + NEW li1 ( 8050 4590 ) L1M1_PR_MR ; + - gpio_defaults_low\[4\] ( PIN gpio_defaults[4] ) ( gpio_default_value\[4\] LO ) + USE SIGNAL + + ROUTED met2 ( 8510 1700 0 ) ( * 3910 ) + NEW met1 ( 8510 3910 ) ( 9430 * ) + NEW met1 ( 8510 3910 ) M1M2_PR + NEW li1 ( 9430 3910 ) L1M1_PR_MR ; + - gpio_defaults_low\[5\] ( PIN gpio_defaults[5] ) ( gpio_default_value\[5\] LO ) + USE SIGNAL + + ROUTED met2 ( 10350 1700 0 ) ( * 3910 ) + NEW met1 ( 10350 3910 ) ( 10810 * ) + NEW met1 ( 10350 3910 ) M1M2_PR + NEW li1 ( 10810 3910 ) L1M1_PR_MR ; + - gpio_defaults_low\[6\] ( PIN gpio_defaults[6] ) ( gpio_default_value\[6\] LO ) + USE SIGNAL + + ROUTED met2 ( 12190 1700 0 ) ( 13570 * ) + NEW met2 ( 13570 1700 ) ( * 3910 ) + NEW li1 ( 13570 3910 ) L1M1_PR_MR + NEW met1 ( 13570 3910 ) M1M2_PR + NEW met1 ( 13570 3910 ) RECT ( -355 -70 0 70 ) ; + - gpio_defaults_low\[7\] ( PIN gpio_defaults[7] ) ( gpio_default_value\[7\] LO ) + USE SIGNAL + + ROUTED met2 ( 14490 1700 0 ) ( * 3910 ) + NEW met1 ( 14490 3910 ) ( 14950 * ) + NEW met1 ( 14490 3910 ) M1M2_PR + NEW li1 ( 14950 3910 ) L1M1_PR_MR ; + - gpio_defaults_low\[8\] ( PIN gpio_defaults[8] ) ( gpio_default_value\[8\] LO ) + USE SIGNAL + + ROUTED met2 ( 16330 1700 0 ) ( * 3910 ) + NEW li1 ( 16330 3910 ) L1M1_PR_MR + NEW met1 ( 16330 3910 ) M1M2_PR + NEW met1 ( 16330 3910 ) RECT ( -355 -70 0 70 ) ; + - gpio_defaults_low\[9\] ( PIN gpio_defaults[9] ) ( gpio_default_value\[9\] LO ) + USE SIGNAL + + ROUTED met2 ( 17250 1700 ) ( 18170 * 0 ) + NEW met2 ( 17250 1700 ) ( * 5950 ) + NEW met1 ( 17250 5950 ) ( 18170 * ) + NEW met1 ( 17250 5950 ) M1M2_PR + NEW li1 ( 18170 5950 ) L1M1_PR_MR ; +END NETS +END DESIGN diff --git a/gds/gpio_defaults_block.gds.gz b/gds/gpio_defaults_block.gds.gz new file mode 100644 index 0000000000000000000000000000000000000000..6ebf67a8cfac3670fa37bf6b0290a786acd9e71e GIT binary patch literal 7794 zcmc(Ed0f)j*Z)-0s9BkrnW^zrr_3zLF&9!{%!(Q-voa;O%F@adm)u!qCe5;hN>fXP zY;j4G$^}rhD|pQE7E^``h+wZF^|EX8o@7+m7mAe5n8P?~a!L(kg0GZwdJMSo+;# zx1Z%7FFtPL5pbsLafxFI_SLh;r*;f|vQ1;<_4eKKJW+Gz*_G@2@&mU2a{P7g@Ftu0 z5;TcBEE#bKLPv59b;3OQwxdfGb_&^SEe#}z64dLw`m^i#-fNcT8|X&o)O7zExEOyr zo3BW7J(~#_NQmNIO`wxFL&$!^8RRgjIL2T9$JDF3t{t^knKfu}@tCg#*_MrSu$&DO)oC4#@_=oXe7o2zs5sOLn}-2j~*i^5<3MZ0}26^S1Enoa;a%`P=x)|wvI->N;HK#90d8NXWxTx{6why?9Z-r>s zAq8M(iGrIf=Y1U}G?C=TU$atPpR)K1U67s?+n&8A!v?ud0XFJMoRI&#kb3<$-}3me zmQK-0l+Z4u`k~aLa|yn_spl!f0<`@=3+Gp4wS27%H68`!5K9Kc`>=excbMd+4=w>6 zx}G!4Ds>ZKi*OVvCt#rv4J~E(C?@7LZa<&N95=lqo|lwqqj={I=rhou^W2|(uPJp3 z_-An`4e6d<^=Y^AI$z3lL5o1SsF|-PLyQYuV@}gQw5XSr1cmr~J4^rYoAE>vwvY|P zABk%v11@DOmZVysTD;{*)i|N~483PmI}k=2s`^?`S5%vnt_S}5PRgDbfuI9FX|~bW zM#VdnesA>x)<1Id>if0k%cQ#^Vu_%|LF40)n(auwGc^ThK=Y&WobpRRm?|1mXFHxK z?Fra5|3PFPzE`q)LizDJJ)B% zYcaGd>8Piy2)zscj_34BGqqIg4i_dC+TF^#pg`&D7aac_N=@-oDhY^;OEtTSVvY<@ zvJjNX*6NLfSK#Kk$zp)`7I&R9z|?S9ckBX1u|>;4hL%6oHT#>>df){G+=awWT{@V zwAiuOzL~rKEeVjS!!#{{Tpp9dzJ}!6kOM9h_*^SbQl{S=eqxT@DOga)UzNcOJf-7i}ko&v_)cXFOxI^|euya#yF-K@G`rQ4P?_fPOIWTU@ zWQm=SGXet=1Dwg&CFate*sXqTTy{VE3T-vi>vj3Kqarz(a3*Cj;rwy45Zzy<{ladZ zO>uaCNc{0S{fT@e?hjHQKDKtuAQ)L8e;+w@&ja)FscVDTLi=lft%S7*#g-A*Z^)Py zuI_UjrSn0A4qOitnx0+W8GayPZL@{pCBna=Gfp2?JhcAp9P%!%_`PP*f{zFCSRvs_ zF)*K9lfRd;mjg3E2N1?m>oH#FiH7u;wkQ8iy@1j!XZ(bB<545*=KB)*FRk%?O;03v zUSGO~IdCrF1r9x;pB^(3W4e4x!yDb=s7TLaaZJ-`QLrML*Eg#D@7#__e#oOhd-(n6 zG@h-`j(^67!>U!|SaK5YRMx-mg2N?}YTS;8J3LnW?**k2)|tZtuwhl{8QB(hEDv_Pa$ywIwjz4t5EnRvRT`(X4_!42KC6< z#KWrV^9_5&0FtSlDPn`noIvck?+P zme+`-b7$H7tJ?JiBbKYq3nmmSdx}Hg``Y#M8pzu9$2~>IWAxVz?)+O)@VD=368DtI zcXiKMdy1v=%pOQo&Dgc`qGpS|ti!){dH8jC1a^6Zc6mg1dB}H*GY5P#OvL>IzWFJw ziKcVEOw^6((e2po4zQ-WvE=BAx+MO{Wf>h7ER0_lM=kHt<~}>$1NthUMDz{vdJxP9 zwH?~r$6uo~G@m|6o*fKo<>Tx>{`N`=IXMWAc;M}kE^F2<&YQp0klV-I2Ot9yE`Rla zrn}ely?=p6PzF36Ig)$x+lED>h`=cm6&~q*HY=&SuS8o9NT6U|!>TsfvL{e<)st5{ zqhr(xaaMw&9L8EJ9YRlR>#zid^#sN-_bx@_CVuG*W$ul6l*%ca(TmGyKU|wsHdA|3 zY6E+{6MwY>Aamf=66lJ`NeABXpr;nRg!f_PLoBcO2k|F6ZO^ zrgJn5JUM#(ni(g;O6o8zx?2Z0oo7!UuRl33Y*h?)SzbfIMLV_;+de;Od8vvl>L9hG z=8jU9xqaJ;Gs?8jK;+!IG*kWIE@1JF+ue8KXm0qDl{CLNJM^@0SB z-H;>+dhMz6h`vy2og_F5z$X4(Cbi*^E5B8_-+h7t%C;?1$`XJM z6gA&0Hf_}60HHd~UA_=nLH813w|@S#&9K9Sb5mL|vi4Ywrq#5^ zwN#|cluJo>v%6Zq<<+w@9N=!cZv?>#VKiqG>{it6V>WAe>T&lK$5q&UR8Q=s*G|Eu zL2h3L(&O2<+X-5JWr7+fC7O54){9%NOk|)ZiDyFxgHBclxX;Op6ByyM9%@TGQy`muyzR;}M_6RApU% zyTe-qdh3W94~g7U-@V=8=$3ENMp7Dh4vKjRB52{m5@UD)>`jHlumh2I=jHyVralm-KCrZ`To^K!dQz4-ne?K}RiIq`Z=KOd3b;@igot{4Gcviu3#QUJHPu z1vJ(3F$|p>_*uwKa5j1~&Gj-?2RwsZ$J7*n6GBE5gYojv-+Mx#!aZUm8%5P`@uOoq z!ai~CSoZj#C$v$DIkCFLi(3}1h-(KthR;Y$X9DVJO)_?r$Xae=_nj>e00JXF;wFL7 zt-NT3F-EcxY&_>MNvV?n*-qtQJ`gOMNy$q4HOtJK{+a*K;jO~v;Po%Cfm1_MR>f7p z(MDBsA8YAxqZ1Nf11d<0N}nnQ2h9~&B-UkCcy5~(n+f#{7_}yjZQ@G?p6oM!5rt_( zC(4V;t*B50L<`JR=dx3U8i*d3Xq-wYR-XFd}9XRyGy>JFG{>>a7=Hz?_vObE&ko~nXV+= z!7K^UDniB)iTnABkdA&um6G(Ou~DSCwj1)C!Y`8rT}7=-cHHXt(4?zxUuinAQ%lHS zy~lO#1Xt~#rohcnAO-($VuN7M76@@zhcZzAxSwa>cvQB*#4Leur6-_Mn162W^qDVr z4}f$Pqp1@Csqi|5WLvf0Qu%Lz~5wR=^Da4GT=~(tXE_lZ zQ`%fzWQt|*#CA6r-$65O?%+#-k0ceB5K5=~$=P{zpZ-F+4J1N=1EXGnP~%TJhSP_M zxA4RwLC)cRBInK{0vDvgH7;*B2HLu-?NOvwY{adtPuEOXqT%D)<6CC8H_FHrO_8+d zTe?VEDR{b?b}$7HV|jsPQCwE|fk&W~S~Wl$tDUU^f_?6ZOvj}!po9$;n%nC4@7+~p z7g<^Xq>fM`e|*FNU#{kxOknJJKZ$Q%qfZ99h&+o-cax6dsz26gvsYX3kGcUMzyd6= zD$uB%)K#;2f!As40wllt+t2wom}IS6{XrJy4KW2+Y!Oa)h>qFY?E7?MG4pXQC6eYEJXX6UcFgfJ#%um!xOtzR2-lStL~WT+;?k z)%#4mcwaT{zDBfFR2_Yv8Oh7}nLFDQb!GR_BxR&#&@RsCe9 zy2#cKz|<@uUmT<77P&(pAsTpmWg^YZo5C*G$K-cs%!{tO3Z>;c5vZZf;QyEo>7miy z(fcWC zUg(caz0$N(58duYyz(>bmoc8ld*i|;B7EK|Uae=-s^SyH%6dIa4%exu4cn}+*|Kae zUzU%z?q-<#r_BGrQM)<9!7uFsdPsks=29N9+iAj5qjQJ z9s?bq#gkJxqBTovOAU+ks2-4^4U1b}7@B8}-H>&LHd`bDOJXi6!`JG2j;2pLZ2wXG zduoCV4m(1!w#2@}FQN?k`D!zoKAZd{k5*XQsqoSr_^-Z zd!bbo9|HQig(#!m^#65}InUp`>?T9ma6D&2YhR8g?uJe`hF8eKM&04Yh)cC=ZA&Ww zycgeHj&R8H{R;@P}CoOJNCJw=tmeBrOG&pHrx=i-!2nN z4!XEFxy}-kAmac`{j-$6poLmPRXFm~VYjN@-uq+ml6F=+Et+83LmaB2quPDAfr5jF zkj1Ik*bkZ0* z^&EX=hhZVlLKJCes}vzoCZhbMBUzW60>=Cl9qxTN0o{6Xd{~_S-6CPwRp2#RjHyz~TL!j%G!C)B)rfi9 zvPZgs+H5C}UqLHHB5XW+K179FoQCo2`bI0nPk`tiX~@p;U`gT%bSX;s%`tsihASTj zk+F!#Q;{neSdiVEDgU5?x5dVBZ&{s6ZZBviMq^a+EVemD-iw)6wq7llWt z-J!UGW445#Yh~Mlo<{^WSan*9p=IC$0jCxTCXP*FD`kS(Ngb4x!+>ek zhaIdsi2mfi^jBSH#N9<>C1u0TU!q?FeG)%RE#@l&3NJUjjBIY|6`3Nk>@IA4556)s zE!76M8SG2;0(=OMlB)w)sTnRMTFZtKwfIL{jr)>s`s6|=$#E|yHgQ~ROFNW@@!v4- zu6Q#k*940mL~0fBjl$;53F+0>6`RY2~oalg2?4LUHGC_8gkoE0zIY_Ra{cg_e zm1Z!6EpS6TLf99ZtQ%I$?wo&_bG0H>*|`7eOrOU4f(fx z@-bOkkHly>SCri!)oC4|1FX>?c|PjSx7%m3oFkjl-BqJ!i) z2y5(ezgj4A2>lo1PXpCe&rSQ>-#eqqqnbO2);^Vr_o>shw5m?+iSnGVo*^{r1g~BC zCSU+#ZKS+#YL0f>>=I)`pKDgI&FUaAJQ=ZjG&#aQ(r0lDFqdH5@+bl{M@BQ;NapzH z!w$bHFLnmmnDKzBav8)ULfR0jV}t}bR-8>JUOt>5{_tP3^%ql3OB1MehBjz3h#(ib z^2HqfHG*MT9Fqv2O2s^bAdn8#a)(jQ!)RvJG!;^wt>h2Yh61wu0xwF23mDi~fq90W z+RWQm+pJ2J7f=1zDJ~eMe#Wwq4&9H5B_%dr>(z z$G{!sEsl(Bt8{t!lEolBMhuhLcR4>O!`&^JBEe*4u=4vav^9Gc zb>O>cF0)QA>K~`x&ps2c?*BeRu$GN32!3*w>0u3xi)w~RcsW29mBFh zQ$)6Zc#qU6M^Bc&iG&+Aw1J4B!Y^=D5t;;iOHEOl?45X}$tS_Wy%ZY%EaLxmcD}-o>EzhG>k5XFTrSy074yNZ+F>X65IZ)%Hg`Ef2P2l>+q zHnrP5hBsNLqL<{B#(g`glG}}x)qkxj@^4}Ory!YqBuYlMvXLI;z(dR!IW8(a54$ui z^hM{D2vQfX*WE774*MFp{GSOwh%jt4aXD5fAHe@t#J|a$s?jL+d}LV?4JMaeQxRmok=d=#&BN)=ri{phJg4*3>k(f=S*49pGtU!V5QC8It{{JiYc z8zLh^FmYV;+a0zF5}wUCvBEg|^yV*(8n35~j!qVe8bl(QBRXgWSl@&H(Bf=0Mli+v zWvwuZ6`2J*(d|=4`{Xg5*zyIsEjT@PfU3H~nBxK~EDqhcLdEbtTZJ zL*MmlWb|&(eNel8W+Y24%+XBGY0UW{wH3rJ73Q#agT_udvGCh_Bcf3U!R$jjgRIPU zjzw4^9l=2bkIS;UpM-*IFU&dR64qbACIdfW2NBhribR@WcNBxJBJD literal 0 HcmV?d00001 diff --git a/lef/gpio_defaults_block.lef b/lef/gpio_defaults_block.lef new file mode 100644 index 00000000..1057151e --- /dev/null +++ b/lef/gpio_defaults_block.lef @@ -0,0 +1,194 @@ +VERSION 5.7 ; + NOWIREEXTENSIONATPIN ON ; + DIVIDERCHAR "/" ; + BUSBITCHARS "[]" ; +MACRO gpio_defaults_block + CLASS BLOCK ; + FOREIGN gpio_defaults_block ; + ORIGIN 0.000 0.000 ; + SIZE 25.000 BY 11.000 ; + PIN VGND + DIRECTION INPUT ; + USE GROUND ; + PORT + LAYER met5 ; + RECT 0.000 7.180 24.840 8.780 ; + END + PORT + LAYER met4 ; + RECT 3.800 2.480 5.200 11.120 ; + END + PORT + LAYER met4 ; + RECT 10.800 2.480 12.200 11.120 ; + END + PORT + LAYER met4 ; + RECT 17.800 2.480 19.200 11.120 ; + END + END VGND + PIN VPWR + DIRECTION INPUT ; + USE POWER ; + PORT + LAYER met5 ; + RECT 0.000 3.680 24.840 5.280 ; + END + PORT + LAYER met4 ; + RECT 0.300 2.480 1.700 11.120 ; + END + PORT + LAYER met4 ; + RECT 7.300 2.480 8.700 11.120 ; + END + PORT + LAYER met4 ; + RECT 14.300 2.480 15.700 11.120 ; + END + PORT + LAYER met4 ; + RECT 21.300 2.480 22.700 11.120 ; + END + END VPWR + PIN gpio_defaults[0] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 1.010 0.000 1.290 2.000 ; + END + END gpio_defaults[0] + PIN gpio_defaults[10] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 19.870 0.000 20.150 2.000 ; + END + END gpio_defaults[10] + PIN gpio_defaults[11] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 21.710 0.000 21.990 2.000 ; + END + END gpio_defaults[11] + PIN gpio_defaults[12] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 23.550 0.000 23.830 2.000 ; + END + END gpio_defaults[12] + PIN gpio_defaults[1] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 2.850 0.000 3.130 2.000 ; + END + END gpio_defaults[1] + PIN gpio_defaults[2] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 4.690 0.000 4.970 2.000 ; + END + END gpio_defaults[2] + PIN gpio_defaults[3] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 6.530 0.000 6.810 2.000 ; + END + END gpio_defaults[3] + PIN gpio_defaults[4] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 8.370 0.000 8.650 2.000 ; + END + END gpio_defaults[4] + PIN gpio_defaults[5] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 10.210 0.000 10.490 2.000 ; + END + END gpio_defaults[5] + PIN gpio_defaults[6] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 12.050 0.000 12.330 2.000 ; + END + END gpio_defaults[6] + PIN gpio_defaults[7] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 14.350 0.000 14.630 2.000 ; + END + END gpio_defaults[7] + PIN gpio_defaults[8] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 16.190 0.000 16.470 2.000 ; + END + END gpio_defaults[8] + PIN gpio_defaults[9] + DIRECTION OUTPUT TRISTATE ; + USE SIGNAL ; + PORT + LAYER met2 ; + RECT 18.030 0.000 18.310 2.000 ; + END + END gpio_defaults[9] + OBS + LAYER nwell ; + RECT -0.190 9.465 25.030 11.070 ; + RECT -0.190 4.025 25.030 6.855 ; + LAYER li1 ; + RECT 0.000 2.635 24.840 10.965 ; + LAYER met1 ; + RECT 0.000 2.480 24.840 11.120 ; + LAYER met2 ; + RECT 0.390 11.000 1.610 11.120 ; + RECT 7.390 11.000 8.610 11.120 ; + RECT 14.390 11.000 15.610 11.120 ; + RECT 21.390 11.000 22.610 11.120 ; + RECT 0.390 2.280 23.820 11.000 ; + RECT 0.390 1.630 0.730 2.280 ; + RECT 1.570 1.630 2.570 2.280 ; + RECT 3.410 1.630 4.410 2.280 ; + RECT 5.250 1.630 6.250 2.280 ; + RECT 7.090 1.630 8.090 2.280 ; + RECT 8.930 1.630 9.930 2.280 ; + RECT 10.770 1.630 11.770 2.280 ; + RECT 12.610 1.630 14.070 2.280 ; + RECT 14.910 1.630 15.910 2.280 ; + RECT 16.750 1.630 17.750 2.280 ; + RECT 18.590 1.630 19.590 2.280 ; + RECT 20.430 1.630 21.430 2.280 ; + RECT 22.270 1.630 23.270 2.280 ; + LAYER met3 ; + RECT 0.300 11.000 1.700 11.045 ; + RECT 7.300 11.000 8.700 11.045 ; + RECT 14.300 11.000 15.700 11.045 ; + RECT 21.300 11.000 22.700 11.045 ; + RECT 0.300 2.555 22.700 11.000 ; + END +END gpio_defaults_block +END LIBRARY + diff --git a/mag/gpio_defaults_block.mag b/mag/gpio_defaults_block.mag new file mode 100644 index 00000000..069e1a54 --- /dev/null +++ b/mag/gpio_defaults_block.mag @@ -0,0 +1,1307 @@ +magic +tech sky130A +magscale 1 2 +timestamp 1636108274 +<< viali >> +rect 3617 1173 3651 1207 +rect 1593 901 1627 935 +rect 3893 833 3927 867 +rect 765 765 799 799 +rect 1317 765 1351 799 +rect 1869 765 1903 799 +rect 2145 765 2179 799 +rect 2697 765 2731 799 +rect 2973 765 3007 799 +rect 3249 765 3283 799 +rect 4261 765 4295 799 +rect 1041 629 1075 663 +rect 3985 629 4019 663 +<< metal1 >> +rect 0 2202 4968 2224 +rect 0 2150 78 2202 +rect 130 2150 142 2202 +rect 194 2150 206 2202 +rect 258 2150 270 2202 +rect 322 2150 1478 2202 +rect 1530 2150 1542 2202 +rect 1594 2150 1606 2202 +rect 1658 2150 1670 2202 +rect 1722 2150 2878 2202 +rect 2930 2150 2942 2202 +rect 2994 2150 3006 2202 +rect 3058 2150 3070 2202 +rect 3122 2150 4278 2202 +rect 4330 2150 4342 2202 +rect 4394 2150 4406 2202 +rect 4458 2150 4470 2202 +rect 4522 2150 4968 2202 +rect 0 2128 4968 2150 +rect 0 1658 4968 1680 +rect 0 1606 778 1658 +rect 830 1606 842 1658 +rect 894 1606 906 1658 +rect 958 1606 970 1658 +rect 1022 1606 2178 1658 +rect 2230 1606 2242 1658 +rect 2294 1606 2306 1658 +rect 2358 1606 2370 1658 +rect 2422 1606 3578 1658 +rect 3630 1606 3642 1658 +rect 3694 1606 3706 1658 +rect 3758 1606 3770 1658 +rect 3822 1606 4968 1658 +rect 0 1584 4968 1606 +rect 3418 1164 3424 1216 +rect 3476 1204 3482 1216 +rect 3605 1207 3663 1213 +rect 3605 1204 3617 1207 +rect 3476 1176 3617 1204 +rect 3476 1164 3482 1176 +rect 3605 1173 3617 1176 +rect 3651 1173 3663 1207 +rect 3605 1167 3663 1173 +rect 0 1114 4968 1136 +rect 0 1062 78 1114 +rect 130 1062 142 1114 +rect 194 1062 206 1114 +rect 258 1062 270 1114 +rect 322 1062 1478 1114 +rect 1530 1062 1542 1114 +rect 1594 1062 1606 1114 +rect 1658 1062 1670 1114 +rect 1722 1062 2878 1114 +rect 2930 1062 2942 1114 +rect 2994 1062 3006 1114 +rect 3058 1062 3070 1114 +rect 3122 1062 4278 1114 +rect 4330 1062 4342 1114 +rect 4394 1062 4406 1114 +rect 4458 1062 4470 1114 +rect 4522 1062 4968 1114 +rect 0 1040 4968 1062 +rect 1302 892 1308 944 +rect 1360 932 1366 944 +rect 1581 935 1639 941 +rect 1581 932 1593 935 +rect 1360 904 1593 932 +rect 1360 892 1366 904 +rect 1581 901 1593 904 +rect 1627 901 1639 935 +rect 1581 895 1639 901 +rect 3881 867 3939 873 +rect 3881 833 3893 867 +rect 3927 864 3939 867 +rect 4706 864 4712 876 +rect 3927 836 4712 864 +rect 3927 833 3939 836 +rect 3881 827 3939 833 +rect 4706 824 4712 836 +rect 4764 824 4770 876 +rect 198 756 204 808 +rect 256 796 262 808 +rect 753 799 811 805 +rect 753 796 765 799 +rect 256 768 765 796 +rect 256 756 262 768 +rect 753 765 765 768 +rect 799 765 811 799 +rect 753 759 811 765 +rect 1118 756 1124 808 +rect 1176 796 1182 808 +rect 1305 799 1363 805 +rect 1305 796 1317 799 +rect 1176 768 1317 796 +rect 1176 756 1182 768 +rect 1305 765 1317 768 +rect 1351 765 1363 799 +rect 1305 759 1363 765 +rect 1670 756 1676 808 +rect 1728 796 1734 808 +rect 1857 799 1915 805 +rect 1857 796 1869 799 +rect 1728 768 1869 796 +rect 1728 756 1734 768 +rect 1857 765 1869 768 +rect 1903 765 1915 799 +rect 1857 759 1915 765 +rect 2038 756 2044 808 +rect 2096 796 2102 808 +rect 2133 799 2191 805 +rect 2133 796 2145 799 +rect 2096 768 2145 796 +rect 2096 756 2102 768 +rect 2133 765 2145 768 +rect 2179 765 2191 799 +rect 2682 796 2688 808 +rect 2643 768 2688 796 +rect 2133 759 2191 765 +rect 2682 756 2688 768 +rect 2740 756 2746 808 +rect 2866 756 2872 808 +rect 2924 796 2930 808 +rect 2961 799 3019 805 +rect 2961 796 2973 799 +rect 2924 768 2973 796 +rect 2924 756 2930 768 +rect 2961 765 2973 768 +rect 3007 765 3019 799 +rect 3234 796 3240 808 +rect 3195 768 3240 796 +rect 2961 759 3019 765 +rect 3234 756 3240 768 +rect 3292 756 3298 808 +rect 4249 799 4307 805 +rect 4249 765 4261 799 +rect 4295 796 4307 799 +rect 4338 796 4344 808 +rect 4295 768 4344 796 +rect 4295 765 4307 768 +rect 4249 759 4307 765 +rect 4338 756 4344 768 +rect 4396 756 4402 808 +rect 566 620 572 672 +rect 624 660 630 672 +rect 1029 663 1087 669 +rect 1029 660 1041 663 +rect 624 632 1041 660 +rect 624 620 630 632 +rect 1029 629 1041 632 +rect 1075 629 1087 663 +rect 3970 660 3976 672 +rect 3931 632 3976 660 +rect 1029 623 1087 629 +rect 3970 620 3976 632 +rect 4028 620 4034 672 +rect 0 570 4968 592 +rect 0 518 778 570 +rect 830 518 842 570 +rect 894 518 906 570 +rect 958 518 970 570 +rect 1022 518 2178 570 +rect 2230 518 2242 570 +rect 2294 518 2306 570 +rect 2358 518 2370 570 +rect 2422 518 3578 570 +rect 3630 518 3642 570 +rect 3694 518 3706 570 +rect 3758 518 3770 570 +rect 3822 518 4968 570 +rect 0 496 4968 518 +<< via1 >> +rect 78 2150 130 2202 +rect 142 2150 194 2202 +rect 206 2150 258 2202 +rect 270 2150 322 2202 +rect 1478 2150 1530 2202 +rect 1542 2150 1594 2202 +rect 1606 2150 1658 2202 +rect 1670 2150 1722 2202 +rect 2878 2150 2930 2202 +rect 2942 2150 2994 2202 +rect 3006 2150 3058 2202 +rect 3070 2150 3122 2202 +rect 4278 2150 4330 2202 +rect 4342 2150 4394 2202 +rect 4406 2150 4458 2202 +rect 4470 2150 4522 2202 +rect 778 1606 830 1658 +rect 842 1606 894 1658 +rect 906 1606 958 1658 +rect 970 1606 1022 1658 +rect 2178 1606 2230 1658 +rect 2242 1606 2294 1658 +rect 2306 1606 2358 1658 +rect 2370 1606 2422 1658 +rect 3578 1606 3630 1658 +rect 3642 1606 3694 1658 +rect 3706 1606 3758 1658 +rect 3770 1606 3822 1658 +rect 3424 1164 3476 1216 +rect 78 1062 130 1114 +rect 142 1062 194 1114 +rect 206 1062 258 1114 +rect 270 1062 322 1114 +rect 1478 1062 1530 1114 +rect 1542 1062 1594 1114 +rect 1606 1062 1658 1114 +rect 1670 1062 1722 1114 +rect 2878 1062 2930 1114 +rect 2942 1062 2994 1114 +rect 3006 1062 3058 1114 +rect 3070 1062 3122 1114 +rect 4278 1062 4330 1114 +rect 4342 1062 4394 1114 +rect 4406 1062 4458 1114 +rect 4470 1062 4522 1114 +rect 1308 892 1360 944 +rect 4712 824 4764 876 +rect 204 756 256 808 +rect 1124 756 1176 808 +rect 1676 756 1728 808 +rect 2044 756 2096 808 +rect 2688 799 2740 808 +rect 2688 765 2697 799 +rect 2697 765 2731 799 +rect 2731 765 2740 799 +rect 2688 756 2740 765 +rect 2872 756 2924 808 +rect 3240 799 3292 808 +rect 3240 765 3249 799 +rect 3249 765 3283 799 +rect 3283 765 3292 799 +rect 3240 756 3292 765 +rect 4344 756 4396 808 +rect 572 620 624 672 +rect 3976 663 4028 672 +rect 3976 629 3985 663 +rect 3985 629 4019 663 +rect 4019 629 4028 663 +rect 3976 620 4028 629 +rect 778 518 830 570 +rect 842 518 894 570 +rect 906 518 958 570 +rect 970 518 1022 570 +rect 2178 518 2230 570 +rect 2242 518 2294 570 +rect 2306 518 2358 570 +rect 2370 518 2422 570 +rect 3578 518 3630 570 +rect 3642 518 3694 570 +rect 3706 518 3758 570 +rect 3770 518 3822 570 +<< metal2 >> +rect 78 2204 322 2224 +rect 78 2202 92 2204 +rect 148 2202 172 2204 +rect 228 2202 252 2204 +rect 308 2202 322 2204 +rect 78 2148 92 2150 +rect 148 2148 172 2150 +rect 228 2148 252 2150 +rect 308 2148 322 2150 +rect 78 2128 322 2148 +rect 1478 2204 1722 2224 +rect 1478 2202 1492 2204 +rect 1548 2202 1572 2204 +rect 1628 2202 1652 2204 +rect 1708 2202 1722 2204 +rect 1478 2148 1492 2150 +rect 1548 2148 1572 2150 +rect 1628 2148 1652 2150 +rect 1708 2148 1722 2150 +rect 1478 2128 1722 2148 +rect 2878 2204 3122 2224 +rect 2878 2202 2892 2204 +rect 2948 2202 2972 2204 +rect 3028 2202 3052 2204 +rect 3108 2202 3122 2204 +rect 2878 2148 2892 2150 +rect 2948 2148 2972 2150 +rect 3028 2148 3052 2150 +rect 3108 2148 3122 2150 +rect 2878 2128 3122 2148 +rect 4278 2204 4522 2224 +rect 4278 2202 4292 2204 +rect 4348 2202 4372 2204 +rect 4428 2202 4452 2204 +rect 4508 2202 4522 2204 +rect 4278 2148 4292 2150 +rect 4348 2148 4372 2150 +rect 4428 2148 4452 2150 +rect 4508 2148 4522 2150 +rect 4278 2128 4522 2148 +rect 778 1660 1022 1680 +rect 778 1658 792 1660 +rect 848 1658 872 1660 +rect 928 1658 952 1660 +rect 1008 1658 1022 1660 +rect 778 1604 792 1606 +rect 848 1604 872 1606 +rect 928 1604 952 1606 +rect 1008 1604 1022 1606 +rect 778 1584 1022 1604 +rect 2178 1660 2422 1680 +rect 2178 1658 2192 1660 +rect 2248 1658 2272 1660 +rect 2328 1658 2352 1660 +rect 2408 1658 2422 1660 +rect 2178 1604 2192 1606 +rect 2248 1604 2272 1606 +rect 2328 1604 2352 1606 +rect 2408 1604 2422 1606 +rect 2178 1584 2422 1604 +rect 3578 1660 3822 1680 +rect 3578 1658 3592 1660 +rect 3648 1658 3672 1660 +rect 3728 1658 3752 1660 +rect 3808 1658 3822 1660 +rect 3578 1604 3592 1606 +rect 3648 1604 3672 1606 +rect 3728 1604 3752 1606 +rect 3808 1604 3822 1606 +rect 3578 1584 3822 1604 +rect 3424 1216 3476 1222 +rect 3424 1158 3476 1164 +rect 78 1116 322 1136 +rect 78 1114 92 1116 +rect 148 1114 172 1116 +rect 228 1114 252 1116 +rect 308 1114 322 1116 +rect 78 1060 92 1062 +rect 148 1060 172 1062 +rect 228 1060 252 1062 +rect 308 1060 322 1062 +rect 78 1040 322 1060 +rect 1478 1116 1722 1136 +rect 1478 1114 1492 1116 +rect 1548 1114 1572 1116 +rect 1628 1114 1652 1116 +rect 1708 1114 1722 1116 +rect 1478 1060 1492 1062 +rect 1548 1060 1572 1062 +rect 1628 1060 1652 1062 +rect 1708 1060 1722 1062 +rect 1478 1040 1722 1060 +rect 2878 1116 3122 1136 +rect 2878 1114 2892 1116 +rect 2948 1114 2972 1116 +rect 3028 1114 3052 1116 +rect 3108 1114 3122 1116 +rect 2878 1060 2892 1062 +rect 2948 1060 2972 1062 +rect 3028 1060 3052 1062 +rect 3108 1060 3122 1062 +rect 2878 1040 3122 1060 +rect 1308 944 1360 950 +rect 1308 886 1360 892 +rect 204 808 256 814 +rect 204 750 256 756 +rect 1124 808 1176 814 +rect 1124 750 1176 756 +rect 216 400 244 750 +rect 572 672 624 678 +rect 572 614 624 620 +rect 584 400 612 614 +rect 778 572 1022 592 +rect 778 570 792 572 +rect 848 570 872 572 +rect 928 570 952 572 +rect 1008 570 1022 572 +rect 778 516 792 518 +rect 848 516 872 518 +rect 928 516 952 518 +rect 1008 516 1022 518 +rect 778 496 1022 516 +rect 202 0 258 400 +rect 570 0 626 400 +rect 938 354 994 400 +rect 1136 354 1164 750 +rect 1320 400 1348 886 +rect 1676 808 1728 814 +rect 1676 750 1728 756 +rect 2044 808 2096 814 +rect 2044 750 2096 756 +rect 2688 808 2740 814 +rect 2688 750 2740 756 +rect 2872 808 2924 814 +rect 2872 750 2924 756 +rect 3240 808 3292 814 +rect 3240 750 3292 756 +rect 1688 400 1716 750 +rect 2056 400 2084 750 +rect 2178 572 2422 592 +rect 2178 570 2192 572 +rect 2248 570 2272 572 +rect 2328 570 2352 572 +rect 2408 570 2422 572 +rect 2178 516 2192 518 +rect 2248 516 2272 518 +rect 2328 516 2352 518 +rect 2408 516 2422 518 +rect 2178 496 2422 516 +rect 938 326 1164 354 +rect 938 0 994 326 +rect 1306 0 1362 400 +rect 1674 0 1730 400 +rect 2042 0 2098 400 +rect 2410 354 2466 400 +rect 2700 354 2728 750 +rect 2884 400 2912 750 +rect 3252 400 3280 750 +rect 2410 326 2728 354 +rect 2410 0 2466 326 +rect 2870 0 2926 400 +rect 3238 0 3294 400 +rect 3436 354 3464 1158 +rect 4278 1116 4522 1136 +rect 4278 1114 4292 1116 +rect 4348 1114 4372 1116 +rect 4428 1114 4452 1116 +rect 4508 1114 4522 1116 +rect 4278 1060 4292 1062 +rect 4348 1060 4372 1062 +rect 4428 1060 4452 1062 +rect 4508 1060 4522 1062 +rect 4278 1040 4522 1060 +rect 4712 876 4764 882 +rect 4712 818 4764 824 +rect 4344 808 4396 814 +rect 4344 750 4396 756 +rect 3976 672 4028 678 +rect 3976 614 4028 620 +rect 3578 572 3822 592 +rect 3578 570 3592 572 +rect 3648 570 3672 572 +rect 3728 570 3752 572 +rect 3808 570 3822 572 +rect 3578 516 3592 518 +rect 3648 516 3672 518 +rect 3728 516 3752 518 +rect 3808 516 3822 518 +rect 3578 496 3822 516 +rect 3988 400 4016 614 +rect 4356 400 4384 750 +rect 4724 400 4752 818 +rect 3606 354 3662 400 +rect 3436 326 3662 354 +rect 3606 0 3662 326 +rect 3974 0 4030 400 +rect 4342 0 4398 400 +rect 4710 0 4766 400 +<< via2 >> +rect 92 2202 148 2204 +rect 172 2202 228 2204 +rect 252 2202 308 2204 +rect 92 2150 130 2202 +rect 130 2150 142 2202 +rect 142 2150 148 2202 +rect 172 2150 194 2202 +rect 194 2150 206 2202 +rect 206 2150 228 2202 +rect 252 2150 258 2202 +rect 258 2150 270 2202 +rect 270 2150 308 2202 +rect 92 2148 148 2150 +rect 172 2148 228 2150 +rect 252 2148 308 2150 +rect 1492 2202 1548 2204 +rect 1572 2202 1628 2204 +rect 1652 2202 1708 2204 +rect 1492 2150 1530 2202 +rect 1530 2150 1542 2202 +rect 1542 2150 1548 2202 +rect 1572 2150 1594 2202 +rect 1594 2150 1606 2202 +rect 1606 2150 1628 2202 +rect 1652 2150 1658 2202 +rect 1658 2150 1670 2202 +rect 1670 2150 1708 2202 +rect 1492 2148 1548 2150 +rect 1572 2148 1628 2150 +rect 1652 2148 1708 2150 +rect 2892 2202 2948 2204 +rect 2972 2202 3028 2204 +rect 3052 2202 3108 2204 +rect 2892 2150 2930 2202 +rect 2930 2150 2942 2202 +rect 2942 2150 2948 2202 +rect 2972 2150 2994 2202 +rect 2994 2150 3006 2202 +rect 3006 2150 3028 2202 +rect 3052 2150 3058 2202 +rect 3058 2150 3070 2202 +rect 3070 2150 3108 2202 +rect 2892 2148 2948 2150 +rect 2972 2148 3028 2150 +rect 3052 2148 3108 2150 +rect 4292 2202 4348 2204 +rect 4372 2202 4428 2204 +rect 4452 2202 4508 2204 +rect 4292 2150 4330 2202 +rect 4330 2150 4342 2202 +rect 4342 2150 4348 2202 +rect 4372 2150 4394 2202 +rect 4394 2150 4406 2202 +rect 4406 2150 4428 2202 +rect 4452 2150 4458 2202 +rect 4458 2150 4470 2202 +rect 4470 2150 4508 2202 +rect 4292 2148 4348 2150 +rect 4372 2148 4428 2150 +rect 4452 2148 4508 2150 +rect 792 1658 848 1660 +rect 872 1658 928 1660 +rect 952 1658 1008 1660 +rect 792 1606 830 1658 +rect 830 1606 842 1658 +rect 842 1606 848 1658 +rect 872 1606 894 1658 +rect 894 1606 906 1658 +rect 906 1606 928 1658 +rect 952 1606 958 1658 +rect 958 1606 970 1658 +rect 970 1606 1008 1658 +rect 792 1604 848 1606 +rect 872 1604 928 1606 +rect 952 1604 1008 1606 +rect 2192 1658 2248 1660 +rect 2272 1658 2328 1660 +rect 2352 1658 2408 1660 +rect 2192 1606 2230 1658 +rect 2230 1606 2242 1658 +rect 2242 1606 2248 1658 +rect 2272 1606 2294 1658 +rect 2294 1606 2306 1658 +rect 2306 1606 2328 1658 +rect 2352 1606 2358 1658 +rect 2358 1606 2370 1658 +rect 2370 1606 2408 1658 +rect 2192 1604 2248 1606 +rect 2272 1604 2328 1606 +rect 2352 1604 2408 1606 +rect 3592 1658 3648 1660 +rect 3672 1658 3728 1660 +rect 3752 1658 3808 1660 +rect 3592 1606 3630 1658 +rect 3630 1606 3642 1658 +rect 3642 1606 3648 1658 +rect 3672 1606 3694 1658 +rect 3694 1606 3706 1658 +rect 3706 1606 3728 1658 +rect 3752 1606 3758 1658 +rect 3758 1606 3770 1658 +rect 3770 1606 3808 1658 +rect 3592 1604 3648 1606 +rect 3672 1604 3728 1606 +rect 3752 1604 3808 1606 +rect 92 1114 148 1116 +rect 172 1114 228 1116 +rect 252 1114 308 1116 +rect 92 1062 130 1114 +rect 130 1062 142 1114 +rect 142 1062 148 1114 +rect 172 1062 194 1114 +rect 194 1062 206 1114 +rect 206 1062 228 1114 +rect 252 1062 258 1114 +rect 258 1062 270 1114 +rect 270 1062 308 1114 +rect 92 1060 148 1062 +rect 172 1060 228 1062 +rect 252 1060 308 1062 +rect 1492 1114 1548 1116 +rect 1572 1114 1628 1116 +rect 1652 1114 1708 1116 +rect 1492 1062 1530 1114 +rect 1530 1062 1542 1114 +rect 1542 1062 1548 1114 +rect 1572 1062 1594 1114 +rect 1594 1062 1606 1114 +rect 1606 1062 1628 1114 +rect 1652 1062 1658 1114 +rect 1658 1062 1670 1114 +rect 1670 1062 1708 1114 +rect 1492 1060 1548 1062 +rect 1572 1060 1628 1062 +rect 1652 1060 1708 1062 +rect 2892 1114 2948 1116 +rect 2972 1114 3028 1116 +rect 3052 1114 3108 1116 +rect 2892 1062 2930 1114 +rect 2930 1062 2942 1114 +rect 2942 1062 2948 1114 +rect 2972 1062 2994 1114 +rect 2994 1062 3006 1114 +rect 3006 1062 3028 1114 +rect 3052 1062 3058 1114 +rect 3058 1062 3070 1114 +rect 3070 1062 3108 1114 +rect 2892 1060 2948 1062 +rect 2972 1060 3028 1062 +rect 3052 1060 3108 1062 +rect 792 570 848 572 +rect 872 570 928 572 +rect 952 570 1008 572 +rect 792 518 830 570 +rect 830 518 842 570 +rect 842 518 848 570 +rect 872 518 894 570 +rect 894 518 906 570 +rect 906 518 928 570 +rect 952 518 958 570 +rect 958 518 970 570 +rect 970 518 1008 570 +rect 792 516 848 518 +rect 872 516 928 518 +rect 952 516 1008 518 +rect 2192 570 2248 572 +rect 2272 570 2328 572 +rect 2352 570 2408 572 +rect 2192 518 2230 570 +rect 2230 518 2242 570 +rect 2242 518 2248 570 +rect 2272 518 2294 570 +rect 2294 518 2306 570 +rect 2306 518 2328 570 +rect 2352 518 2358 570 +rect 2358 518 2370 570 +rect 2370 518 2408 570 +rect 2192 516 2248 518 +rect 2272 516 2328 518 +rect 2352 516 2408 518 +rect 4292 1114 4348 1116 +rect 4372 1114 4428 1116 +rect 4452 1114 4508 1116 +rect 4292 1062 4330 1114 +rect 4330 1062 4342 1114 +rect 4342 1062 4348 1114 +rect 4372 1062 4394 1114 +rect 4394 1062 4406 1114 +rect 4406 1062 4428 1114 +rect 4452 1062 4458 1114 +rect 4458 1062 4470 1114 +rect 4470 1062 4508 1114 +rect 4292 1060 4348 1062 +rect 4372 1060 4428 1062 +rect 4452 1060 4508 1062 +rect 3592 570 3648 572 +rect 3672 570 3728 572 +rect 3752 570 3808 572 +rect 3592 518 3630 570 +rect 3630 518 3642 570 +rect 3642 518 3648 570 +rect 3672 518 3694 570 +rect 3694 518 3706 570 +rect 3706 518 3728 570 +rect 3752 518 3758 570 +rect 3758 518 3770 570 +rect 3770 518 3808 570 +rect 3592 516 3648 518 +rect 3672 516 3728 518 +rect 3752 516 3808 518 +<< metal3 >> +rect 60 2208 340 2209 +rect 60 2144 88 2208 +rect 152 2144 168 2208 +rect 232 2144 248 2208 +rect 312 2144 340 2208 +rect 60 2143 340 2144 +rect 1460 2208 1740 2209 +rect 1460 2144 1488 2208 +rect 1552 2144 1568 2208 +rect 1632 2144 1648 2208 +rect 1712 2144 1740 2208 +rect 1460 2143 1740 2144 +rect 2860 2208 3140 2209 +rect 2860 2144 2888 2208 +rect 2952 2144 2968 2208 +rect 3032 2144 3048 2208 +rect 3112 2144 3140 2208 +rect 2860 2143 3140 2144 +rect 4260 2208 4540 2209 +rect 4260 2144 4288 2208 +rect 4352 2144 4368 2208 +rect 4432 2144 4448 2208 +rect 4512 2144 4540 2208 +rect 4260 2143 4540 2144 +rect 760 1664 1040 1665 +rect 760 1600 788 1664 +rect 852 1600 868 1664 +rect 932 1600 948 1664 +rect 1012 1600 1040 1664 +rect 760 1599 1040 1600 +rect 2160 1664 2440 1665 +rect 2160 1600 2188 1664 +rect 2252 1600 2268 1664 +rect 2332 1600 2348 1664 +rect 2412 1600 2440 1664 +rect 2160 1599 2440 1600 +rect 3560 1664 3840 1665 +rect 3560 1600 3588 1664 +rect 3652 1600 3668 1664 +rect 3732 1600 3748 1664 +rect 3812 1600 3840 1664 +rect 3560 1599 3840 1600 +rect 60 1120 340 1121 +rect 60 1056 88 1120 +rect 152 1056 168 1120 +rect 232 1056 248 1120 +rect 312 1056 340 1120 +rect 60 1055 340 1056 +rect 1460 1120 1740 1121 +rect 1460 1056 1488 1120 +rect 1552 1056 1568 1120 +rect 1632 1056 1648 1120 +rect 1712 1056 1740 1120 +rect 1460 1055 1740 1056 +rect 2860 1120 3140 1121 +rect 2860 1056 2888 1120 +rect 2952 1056 2968 1120 +rect 3032 1056 3048 1120 +rect 3112 1056 3140 1120 +rect 2860 1055 3140 1056 +rect 4260 1120 4540 1121 +rect 4260 1056 4288 1120 +rect 4352 1056 4368 1120 +rect 4432 1056 4448 1120 +rect 4512 1056 4540 1120 +rect 4260 1055 4540 1056 +rect 760 576 1040 577 +rect 760 512 788 576 +rect 852 512 868 576 +rect 932 512 948 576 +rect 1012 512 1040 576 +rect 760 511 1040 512 +rect 2160 576 2440 577 +rect 2160 512 2188 576 +rect 2252 512 2268 576 +rect 2332 512 2348 576 +rect 2412 512 2440 576 +rect 2160 511 2440 512 +rect 3560 576 3840 577 +rect 3560 512 3588 576 +rect 3652 512 3668 576 +rect 3732 512 3748 576 +rect 3812 512 3840 576 +rect 3560 511 3840 512 +<< via3 >> +rect 88 2204 152 2208 +rect 88 2148 92 2204 +rect 92 2148 148 2204 +rect 148 2148 152 2204 +rect 88 2144 152 2148 +rect 168 2204 232 2208 +rect 168 2148 172 2204 +rect 172 2148 228 2204 +rect 228 2148 232 2204 +rect 168 2144 232 2148 +rect 248 2204 312 2208 +rect 248 2148 252 2204 +rect 252 2148 308 2204 +rect 308 2148 312 2204 +rect 248 2144 312 2148 +rect 1488 2204 1552 2208 +rect 1488 2148 1492 2204 +rect 1492 2148 1548 2204 +rect 1548 2148 1552 2204 +rect 1488 2144 1552 2148 +rect 1568 2204 1632 2208 +rect 1568 2148 1572 2204 +rect 1572 2148 1628 2204 +rect 1628 2148 1632 2204 +rect 1568 2144 1632 2148 +rect 1648 2204 1712 2208 +rect 1648 2148 1652 2204 +rect 1652 2148 1708 2204 +rect 1708 2148 1712 2204 +rect 1648 2144 1712 2148 +rect 2888 2204 2952 2208 +rect 2888 2148 2892 2204 +rect 2892 2148 2948 2204 +rect 2948 2148 2952 2204 +rect 2888 2144 2952 2148 +rect 2968 2204 3032 2208 +rect 2968 2148 2972 2204 +rect 2972 2148 3028 2204 +rect 3028 2148 3032 2204 +rect 2968 2144 3032 2148 +rect 3048 2204 3112 2208 +rect 3048 2148 3052 2204 +rect 3052 2148 3108 2204 +rect 3108 2148 3112 2204 +rect 3048 2144 3112 2148 +rect 4288 2204 4352 2208 +rect 4288 2148 4292 2204 +rect 4292 2148 4348 2204 +rect 4348 2148 4352 2204 +rect 4288 2144 4352 2148 +rect 4368 2204 4432 2208 +rect 4368 2148 4372 2204 +rect 4372 2148 4428 2204 +rect 4428 2148 4432 2204 +rect 4368 2144 4432 2148 +rect 4448 2204 4512 2208 +rect 4448 2148 4452 2204 +rect 4452 2148 4508 2204 +rect 4508 2148 4512 2204 +rect 4448 2144 4512 2148 +rect 788 1660 852 1664 +rect 788 1604 792 1660 +rect 792 1604 848 1660 +rect 848 1604 852 1660 +rect 788 1600 852 1604 +rect 868 1660 932 1664 +rect 868 1604 872 1660 +rect 872 1604 928 1660 +rect 928 1604 932 1660 +rect 868 1600 932 1604 +rect 948 1660 1012 1664 +rect 948 1604 952 1660 +rect 952 1604 1008 1660 +rect 1008 1604 1012 1660 +rect 948 1600 1012 1604 +rect 2188 1660 2252 1664 +rect 2188 1604 2192 1660 +rect 2192 1604 2248 1660 +rect 2248 1604 2252 1660 +rect 2188 1600 2252 1604 +rect 2268 1660 2332 1664 +rect 2268 1604 2272 1660 +rect 2272 1604 2328 1660 +rect 2328 1604 2332 1660 +rect 2268 1600 2332 1604 +rect 2348 1660 2412 1664 +rect 2348 1604 2352 1660 +rect 2352 1604 2408 1660 +rect 2408 1604 2412 1660 +rect 2348 1600 2412 1604 +rect 3588 1660 3652 1664 +rect 3588 1604 3592 1660 +rect 3592 1604 3648 1660 +rect 3648 1604 3652 1660 +rect 3588 1600 3652 1604 +rect 3668 1660 3732 1664 +rect 3668 1604 3672 1660 +rect 3672 1604 3728 1660 +rect 3728 1604 3732 1660 +rect 3668 1600 3732 1604 +rect 3748 1660 3812 1664 +rect 3748 1604 3752 1660 +rect 3752 1604 3808 1660 +rect 3808 1604 3812 1660 +rect 3748 1600 3812 1604 +rect 88 1116 152 1120 +rect 88 1060 92 1116 +rect 92 1060 148 1116 +rect 148 1060 152 1116 +rect 88 1056 152 1060 +rect 168 1116 232 1120 +rect 168 1060 172 1116 +rect 172 1060 228 1116 +rect 228 1060 232 1116 +rect 168 1056 232 1060 +rect 248 1116 312 1120 +rect 248 1060 252 1116 +rect 252 1060 308 1116 +rect 308 1060 312 1116 +rect 248 1056 312 1060 +rect 1488 1116 1552 1120 +rect 1488 1060 1492 1116 +rect 1492 1060 1548 1116 +rect 1548 1060 1552 1116 +rect 1488 1056 1552 1060 +rect 1568 1116 1632 1120 +rect 1568 1060 1572 1116 +rect 1572 1060 1628 1116 +rect 1628 1060 1632 1116 +rect 1568 1056 1632 1060 +rect 1648 1116 1712 1120 +rect 1648 1060 1652 1116 +rect 1652 1060 1708 1116 +rect 1708 1060 1712 1116 +rect 1648 1056 1712 1060 +rect 2888 1116 2952 1120 +rect 2888 1060 2892 1116 +rect 2892 1060 2948 1116 +rect 2948 1060 2952 1116 +rect 2888 1056 2952 1060 +rect 2968 1116 3032 1120 +rect 2968 1060 2972 1116 +rect 2972 1060 3028 1116 +rect 3028 1060 3032 1116 +rect 2968 1056 3032 1060 +rect 3048 1116 3112 1120 +rect 3048 1060 3052 1116 +rect 3052 1060 3108 1116 +rect 3108 1060 3112 1116 +rect 3048 1056 3112 1060 +rect 4288 1116 4352 1120 +rect 4288 1060 4292 1116 +rect 4292 1060 4348 1116 +rect 4348 1060 4352 1116 +rect 4288 1056 4352 1060 +rect 4368 1116 4432 1120 +rect 4368 1060 4372 1116 +rect 4372 1060 4428 1116 +rect 4428 1060 4432 1116 +rect 4368 1056 4432 1060 +rect 4448 1116 4512 1120 +rect 4448 1060 4452 1116 +rect 4452 1060 4508 1116 +rect 4508 1060 4512 1116 +rect 4448 1056 4512 1060 +rect 788 572 852 576 +rect 788 516 792 572 +rect 792 516 848 572 +rect 848 516 852 572 +rect 788 512 852 516 +rect 868 572 932 576 +rect 868 516 872 572 +rect 872 516 928 572 +rect 928 516 932 572 +rect 868 512 932 516 +rect 948 572 1012 576 +rect 948 516 952 572 +rect 952 516 1008 572 +rect 1008 516 1012 572 +rect 948 512 1012 516 +rect 2188 572 2252 576 +rect 2188 516 2192 572 +rect 2192 516 2248 572 +rect 2248 516 2252 572 +rect 2188 512 2252 516 +rect 2268 572 2332 576 +rect 2268 516 2272 572 +rect 2272 516 2328 572 +rect 2328 516 2332 572 +rect 2268 512 2332 516 +rect 2348 572 2412 576 +rect 2348 516 2352 572 +rect 2352 516 2408 572 +rect 2408 516 2412 572 +rect 2348 512 2412 516 +rect 3588 572 3652 576 +rect 3588 516 3592 572 +rect 3592 516 3648 572 +rect 3648 516 3652 572 +rect 3588 512 3652 516 +rect 3668 572 3732 576 +rect 3668 516 3672 572 +rect 3672 516 3728 572 +rect 3728 516 3732 572 +rect 3668 512 3732 516 +rect 3748 572 3812 576 +rect 3748 516 3752 572 +rect 3752 516 3808 572 +rect 3808 516 3812 572 +rect 3748 512 3812 516 +<< metal4 >> +rect 60 2208 340 2224 +rect 60 2144 88 2208 +rect 152 2144 168 2208 +rect 232 2144 248 2208 +rect 312 2144 340 2208 +rect 60 1120 340 2144 +rect 60 1056 88 1120 +rect 152 1056 168 1120 +rect 232 1056 248 1120 +rect 312 1056 340 1120 +rect 60 1014 340 1056 +rect 60 778 82 1014 +rect 318 778 340 1014 +rect 60 496 340 778 +rect 760 1714 1040 2224 +rect 760 1478 782 1714 +rect 1018 1478 1040 1714 +rect 760 576 1040 1478 +rect 760 512 788 576 +rect 852 512 868 576 +rect 932 512 948 576 +rect 1012 512 1040 576 +rect 760 496 1040 512 +rect 1460 2208 1740 2224 +rect 1460 2144 1488 2208 +rect 1552 2144 1568 2208 +rect 1632 2144 1648 2208 +rect 1712 2144 1740 2208 +rect 1460 1120 1740 2144 +rect 1460 1056 1488 1120 +rect 1552 1056 1568 1120 +rect 1632 1056 1648 1120 +rect 1712 1056 1740 1120 +rect 1460 1014 1740 1056 +rect 1460 778 1482 1014 +rect 1718 778 1740 1014 +rect 1460 496 1740 778 +rect 2160 1714 2440 2224 +rect 2160 1478 2182 1714 +rect 2418 1478 2440 1714 +rect 2160 576 2440 1478 +rect 2160 512 2188 576 +rect 2252 512 2268 576 +rect 2332 512 2348 576 +rect 2412 512 2440 576 +rect 2160 496 2440 512 +rect 2860 2208 3140 2224 +rect 2860 2144 2888 2208 +rect 2952 2144 2968 2208 +rect 3032 2144 3048 2208 +rect 3112 2144 3140 2208 +rect 2860 1120 3140 2144 +rect 2860 1056 2888 1120 +rect 2952 1056 2968 1120 +rect 3032 1056 3048 1120 +rect 3112 1056 3140 1120 +rect 2860 1014 3140 1056 +rect 2860 778 2882 1014 +rect 3118 778 3140 1014 +rect 2860 496 3140 778 +rect 3560 1714 3840 2224 +rect 3560 1478 3582 1714 +rect 3818 1478 3840 1714 +rect 3560 576 3840 1478 +rect 3560 512 3588 576 +rect 3652 512 3668 576 +rect 3732 512 3748 576 +rect 3812 512 3840 576 +rect 3560 496 3840 512 +rect 4260 2208 4540 2224 +rect 4260 2144 4288 2208 +rect 4352 2144 4368 2208 +rect 4432 2144 4448 2208 +rect 4512 2144 4540 2208 +rect 4260 1120 4540 2144 +rect 4260 1056 4288 1120 +rect 4352 1056 4368 1120 +rect 4432 1056 4448 1120 +rect 4512 1056 4540 1120 +rect 4260 1014 4540 1056 +rect 4260 778 4282 1014 +rect 4518 778 4540 1014 +rect 4260 496 4540 778 +<< via4 >> +rect 82 778 318 1014 +rect 782 1664 1018 1714 +rect 782 1600 788 1664 +rect 788 1600 852 1664 +rect 852 1600 868 1664 +rect 868 1600 932 1664 +rect 932 1600 948 1664 +rect 948 1600 1012 1664 +rect 1012 1600 1018 1664 +rect 782 1478 1018 1600 +rect 1482 778 1718 1014 +rect 2182 1664 2418 1714 +rect 2182 1600 2188 1664 +rect 2188 1600 2252 1664 +rect 2252 1600 2268 1664 +rect 2268 1600 2332 1664 +rect 2332 1600 2348 1664 +rect 2348 1600 2412 1664 +rect 2412 1600 2418 1664 +rect 2182 1478 2418 1600 +rect 2882 778 3118 1014 +rect 3582 1664 3818 1714 +rect 3582 1600 3588 1664 +rect 3588 1600 3652 1664 +rect 3652 1600 3668 1664 +rect 3668 1600 3732 1664 +rect 3732 1600 3748 1664 +rect 3748 1600 3812 1664 +rect 3812 1600 3818 1664 +rect 3582 1478 3818 1600 +rect 4282 778 4518 1014 +<< metal5 >> +rect 0 1714 4968 1756 +rect 0 1478 782 1714 +rect 1018 1478 2182 1714 +rect 2418 1478 3582 1714 +rect 3818 1478 4968 1714 +rect 0 1436 4968 1478 +rect 0 1014 4968 1056 +rect 0 778 82 1014 +rect 318 778 1482 1014 +rect 1718 778 2882 1014 +rect 3118 778 4282 1014 +rect 4518 778 4968 1014 +rect 0 736 4968 778 +use sky130_fd_sc_hd__decap_4 FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1635271187 +transform 1 0 276 0 1 544 +box -38 -48 406 592 +use sky130_fd_sc_hd__fill_1 FILLER_0_7 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1635271187 +transform 1 0 644 0 1 544 +box -38 -48 130 592 +use sky130_fd_sc_hd__decap_12 FILLER_1_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1635271187 +transform 1 0 276 0 -1 1632 +box -38 -48 1142 592 +use sky130_fd_sc_hd__decap_3 PHY_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1635271187 +transform 1 0 0 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_2 +timestamp 1635271187 +transform 1 0 0 0 -1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1635271187 +transform -1 0 1012 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[1\] +timestamp 1635271187 +transform 1 0 1012 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_12 FILLER_1_15 +timestamp 1635271187 +transform 1 0 1380 0 -1 1632 +box -38 -48 1142 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[2\] +timestamp 1635271187 +transform -1 0 1564 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[3\] +timestamp 1635271187 +transform -1 0 1840 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[4\] +timestamp 1635271187 +transform -1 0 2116 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[5\] +timestamp 1635271187 +transform -1 0 2392 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__fill_2 FILLER_0_26 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1635271187 +transform 1 0 2392 0 1 544 +box -38 -48 222 592 +use sky130_fd_sc_hd__fill_2 FILLER_0_38 +timestamp 1635271187 +transform 1 0 3496 0 1 544 +box -38 -48 222 592 +use sky130_fd_sc_hd__decap_8 FILLER_1_27 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1635271187 +transform 1 0 2484 0 -1 1632 +box -38 -48 774 592 +use sky130_fd_sc_hd__fill_2 FILLER_1_35 +timestamp 1635271187 +transform 1 0 3220 0 -1 1632 +box -38 -48 222 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1635271187 +transform 1 0 2576 0 1 544 +box -38 -48 130 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[6\] +timestamp 1635271187 +transform -1 0 2944 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[7\] +timestamp 1635271187 +transform -1 0 3220 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[8\] +timestamp 1635271187 +transform -1 0 3496 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[9\] +timestamp 1635271187 +transform 1 0 3404 0 -1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__fill_2 FILLER_0_49 +timestamp 1635271187 +transform 1 0 4508 0 1 544 +box -38 -48 222 592 +use sky130_fd_sc_hd__decap_8 FILLER_1_40 +timestamp 1635271187 +transform 1 0 3680 0 -1 1632 +box -38 -48 774 592 +use sky130_fd_sc_hd__decap_3 FILLER_1_48 +timestamp 1635271187 +transform 1 0 4416 0 -1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_1 +timestamp 1635271187 +transform -1 0 4968 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_3 +timestamp 1635271187 +transform -1 0 4968 0 -1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[10\] +timestamp 1635271187 +transform 1 0 3956 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[11\] +timestamp 1635271187 +transform -1 0 4508 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__conb_1 gpio_default_value\[12\] +timestamp 1635271187 +transform 1 0 3680 0 1 544 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_12 FILLER_2_3 +timestamp 1635271187 +transform 1 0 276 0 1 1632 +box -38 -48 1142 592 +use sky130_fd_sc_hd__decap_3 PHY_4 +timestamp 1635271187 +transform 1 0 0 0 1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_12 FILLER_2_15 +timestamp 1635271187 +transform 1 0 1380 0 1 1632 +box -38 -48 1142 592 +use sky130_fd_sc_hd__fill_1 FILLER_2_27 +timestamp 1635271187 +transform 1 0 2484 0 1 1632 +box -38 -48 130 592 +use sky130_fd_sc_hd__decap_12 FILLER_2_29 +timestamp 1635271187 +transform 1 0 2668 0 1 1632 +box -38 -48 1142 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 +timestamp 1635271187 +transform 1 0 2576 0 1 1632 +box -38 -48 130 592 +use sky130_fd_sc_hd__decap_8 FILLER_2_41 +timestamp 1635271187 +transform 1 0 3772 0 1 1632 +box -38 -48 774 592 +use sky130_fd_sc_hd__fill_2 FILLER_2_49 +timestamp 1635271187 +transform 1 0 4508 0 1 1632 +box -38 -48 222 592 +use sky130_fd_sc_hd__decap_3 PHY_5 +timestamp 1635271187 +transform -1 0 4968 0 1 1632 +box -38 -48 314 592 +<< labels >> +rlabel metal5 s 0 1436 4968 1756 6 VGND +port 0 nsew ground input +rlabel metal4 s 760 496 1040 2224 6 VGND +port 0 nsew ground input +rlabel metal4 s 2160 496 2440 2224 6 VGND +port 0 nsew ground input +rlabel metal4 s 3560 496 3840 2224 6 VGND +port 0 nsew ground input +rlabel metal5 s 0 736 4968 1056 6 VPWR +port 1 nsew power input +rlabel metal4 s 60 496 340 2224 6 VPWR +port 1 nsew power input +rlabel metal4 s 1460 496 1740 2224 6 VPWR +port 1 nsew power input +rlabel metal4 s 2860 496 3140 2224 6 VPWR +port 1 nsew power input +rlabel metal4 s 4260 496 4540 2224 6 VPWR +port 1 nsew power input +rlabel metal2 s 202 0 258 400 6 gpio_defaults[0] +port 2 nsew signal tristate +rlabel metal2 s 3974 0 4030 400 6 gpio_defaults[10] +port 3 nsew signal tristate +rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[11] +port 4 nsew signal tristate +rlabel metal2 s 4710 0 4766 400 6 gpio_defaults[12] +port 5 nsew signal tristate +rlabel metal2 s 570 0 626 400 6 gpio_defaults[1] +port 6 nsew signal tristate +rlabel metal2 s 938 0 994 400 6 gpio_defaults[2] +port 7 nsew signal tristate +rlabel metal2 s 1306 0 1362 400 6 gpio_defaults[3] +port 8 nsew signal tristate +rlabel metal2 s 1674 0 1730 400 6 gpio_defaults[4] +port 9 nsew signal tristate +rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[5] +port 10 nsew signal tristate +rlabel metal2 s 2410 0 2466 400 6 gpio_defaults[6] +port 11 nsew signal tristate +rlabel metal2 s 2870 0 2926 400 6 gpio_defaults[7] +port 12 nsew signal tristate +rlabel metal2 s 3238 0 3294 400 6 gpio_defaults[8] +port 13 nsew signal tristate +rlabel metal2 s 3606 0 3662 400 6 gpio_defaults[9] +port 14 nsew signal tristate +<< properties >> +string FIXED_BBOX 0 0 5000 2200 +<< end >> diff --git a/maglef/gpio_defaults_block.mag b/maglef/gpio_defaults_block.mag new file mode 100644 index 00000000..d737b238 --- /dev/null +++ b/maglef/gpio_defaults_block.mag @@ -0,0 +1,115 @@ +magic +tech sky130A +magscale 1 2 +timestamp 1636108275 +<< nwell >> +rect -38 1893 5006 2214 +rect -38 805 5006 1371 +<< obsli1 >> +rect 0 527 4968 2193 +<< obsm1 >> +rect 0 496 4968 2224 +<< metal2 >> +rect 202 0 258 400 +rect 570 0 626 400 +rect 938 0 994 400 +rect 1306 0 1362 400 +rect 1674 0 1730 400 +rect 2042 0 2098 400 +rect 2410 0 2466 400 +rect 2870 0 2926 400 +rect 3238 0 3294 400 +rect 3606 0 3662 400 +rect 3974 0 4030 400 +rect 4342 0 4398 400 +rect 4710 0 4766 400 +<< obsm2 >> +rect 78 2200 322 2224 +rect 1478 2200 1722 2224 +rect 2878 2200 3122 2224 +rect 4278 2200 4522 2224 +rect 78 456 4764 2200 +rect 78 326 146 456 +rect 314 326 514 456 +rect 682 326 882 456 +rect 1050 326 1250 456 +rect 1418 326 1618 456 +rect 1786 326 1986 456 +rect 2154 326 2354 456 +rect 2522 326 2814 456 +rect 2982 326 3182 456 +rect 3350 326 3550 456 +rect 3718 326 3918 456 +rect 4086 326 4286 456 +rect 4454 326 4654 456 +<< obsm3 >> +rect 60 2200 340 2209 +rect 1460 2200 1740 2209 +rect 2860 2200 3140 2209 +rect 4260 2200 4540 2209 +rect 60 511 4540 2200 +<< metal4 >> +rect 60 496 340 2224 +rect 760 496 1040 2224 +rect 1460 496 1740 2224 +rect 2160 496 2440 2224 +rect 2860 496 3140 2224 +rect 3560 496 3840 2224 +rect 4260 496 4540 2224 +<< metal5 >> +rect 0 1436 4968 1756 +rect 0 736 4968 1056 +<< labels >> +rlabel metal5 s 0 1436 4968 1756 6 VGND +port 1 nsew ground input +rlabel metal4 s 760 496 1040 2224 6 VGND +port 1 nsew ground input +rlabel metal4 s 2160 496 2440 2224 6 VGND +port 1 nsew ground input +rlabel metal4 s 3560 496 3840 2224 6 VGND +port 1 nsew ground input +rlabel metal5 s 0 736 4968 1056 6 VPWR +port 2 nsew power input +rlabel metal4 s 60 496 340 2224 6 VPWR +port 2 nsew power input +rlabel metal4 s 1460 496 1740 2224 6 VPWR +port 2 nsew power input +rlabel metal4 s 2860 496 3140 2224 6 VPWR +port 2 nsew power input +rlabel metal4 s 4260 496 4540 2224 6 VPWR +port 2 nsew power input +rlabel metal2 s 202 0 258 400 6 gpio_defaults[0] +port 3 nsew signal output +rlabel metal2 s 3974 0 4030 400 6 gpio_defaults[10] +port 4 nsew signal output +rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[11] +port 5 nsew signal output +rlabel metal2 s 4710 0 4766 400 6 gpio_defaults[12] +port 6 nsew signal output +rlabel metal2 s 570 0 626 400 6 gpio_defaults[1] +port 7 nsew signal output +rlabel metal2 s 938 0 994 400 6 gpio_defaults[2] +port 8 nsew signal output +rlabel metal2 s 1306 0 1362 400 6 gpio_defaults[3] +port 9 nsew signal output +rlabel metal2 s 1674 0 1730 400 6 gpio_defaults[4] +port 10 nsew signal output +rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[5] +port 11 nsew signal output +rlabel metal2 s 2410 0 2466 400 6 gpio_defaults[6] +port 12 nsew signal output +rlabel metal2 s 2870 0 2926 400 6 gpio_defaults[7] +port 13 nsew signal output +rlabel metal2 s 3238 0 3294 400 6 gpio_defaults[8] +port 14 nsew signal output +rlabel metal2 s 3606 0 3662 400 6 gpio_defaults[9] +port 15 nsew signal output +<< properties >> +string LEFclass BLOCK +string FIXED_BBOX 0 0 5000 2200 +string LEFview TRUE +string GDS_FILE ../gds/gpio_defaults_block.gds +string GDS_END 47838 +string GDS_START 20982 +<< end >> + diff --git a/openlane/gpio_defaults_block/config.tcl b/openlane/gpio_defaults_block/config.tcl new file mode 100644 index 00000000..b0b72e7f --- /dev/null +++ b/openlane/gpio_defaults_block/config.tcl @@ -0,0 +1,70 @@ +# SPDX-FileCopyrightText: 2020 Efabless Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# SPDX-License-Identifier: Apache-2.0 + +set script_dir [file dirname [file normalize [info script]]] + +set ::env(DESIGN_NAME) gpio_defaults_block +set ::env(DESIGN_IS_CORE) 1 + +set ::env(VERILOG_FILES) "\ + $script_dir/../../verilog/rtl/defines.v\ + $script_dir/../../verilog/rtl/gpio_defaults_block.v" + +set ::env(CLOCK_PORT) "" +set ::env(CLOCK_TREE_SYNTH) 0 + +## Synthesis +set ::env(SYNTH_BUFFERING) 0 +set ::env(SYNTH_READ_BLACKBOX_LIB) 1 +set ::env(SYNTH_USE_PG_PINS_DEFINES) "USE_POWER_PINS" + +## Floorplan +set ::env(DIE_AREA) "0 0 25 11" +set ::env(FP_SIZING) absolute + +set ::env(FP_PIN_ORDER_CFG) $script_dir/pin_order.cfg +set ::env(FP_IO_VLENGTH) "2" +set ::env(FP_IO_HLENGTH) "2" + +set ::env(FP_HORIZONTAL_HALO) 0 +set ::env(FP_VERTICAL_HALO) 0 + +set ::env(TOP_MARGIN_MULT) 0 +set ::env(BOTTOM_MARGIN_MULT) 1 +set ::env(LEFT_MARGIN_MULT) 0 +set ::env(RIGHT_MARGIN_MULT) 0 + +set ::env(CELL_PAD) 0 + +## PDN Configuration +set ::env(FP_PDN_AUTO_ADJUST) 0 +set ::env(FP_PDN_VWIDTH) 1.4 +set ::env(FP_PDN_VOFFSET) 1 +set ::env(FP_PDN_HOFFSET) 2 +set ::env(FP_PDN_VPITCH) 7 +set ::env(FP_PDN_HPITCH) 7 + +## Placement +set ::env(PL_TARGET_DENSITY) 0.92 + +set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) 1 +set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) 0 +set ::env(PL_RESZIER_REPIAR_TIE_FANOUT) 0 + +## Routing +set ::env(GLB_RT_MINLAYER) "2" +set ::env(GLB_RT_MAXLAYER) "5" + +set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) 0 diff --git a/openlane/gpio_defaults_block/pin_order.cfg b/openlane/gpio_defaults_block/pin_order.cfg new file mode 100644 index 00000000..2953639a --- /dev/null +++ b/openlane/gpio_defaults_block/pin_order.cfg @@ -0,0 +1,2 @@ +#S +gpio_defaults.* \ No newline at end of file diff --git a/signoff/gpio_defaults_block/OPENLANE_VERSION b/signoff/gpio_defaults_block/OPENLANE_VERSION new file mode 100644 index 00000000..c63f3866 --- /dev/null +++ b/signoff/gpio_defaults_block/OPENLANE_VERSION @@ -0,0 +1 @@ +openlane 2021.09.09_03.00.48-53-g97579eb diff --git a/signoff/gpio_defaults_block/PDK_SOURCES b/signoff/gpio_defaults_block/PDK_SOURCES new file mode 100644 index 00000000..a2247507 --- /dev/null +++ b/signoff/gpio_defaults_block/PDK_SOURCES @@ -0,0 +1,6 @@ +-ne openlane +e6ba5d36a9b32a9f87626d49bf3c80cf3964ebeb +-ne skywater-pdk +c094b6e83a4f9298e47f696ec5a7fd53535ec5eb +-ne open_pdks +f90a86bdd133bd629251d59eebb1aee8452c0f5c diff --git a/signoff/gpio_defaults_block/final_summary_report.csv b/signoff/gpio_defaults_block/final_summary_report.csv new file mode 100644 index 00000000..71ce477f --- /dev/null +++ b/signoff/gpio_defaults_block/final_summary_report.csv @@ -0,0 +1,2 @@ +,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY +0,/project/openlane/gpio_defaults_block,gpio_defaults_block,gpio_defaults_block,flow_completed,0h1m12s,-1,94545.45454545453,0.000275,47272.727272727265,27.46,442.66,13,0,-1,-1,-1,-1,0,0,-1,0,0,-1,48,26,0.0,0.0,-1,0.0,-1,0.0,0.0,-1,0.0,-1,52604.0,0.0,3.85,0.0,0.0,0.0,-1,5,41,5,41,0,0,0,13,0,0,0,0,0,0,0,4,-1,-1,-1,6,2,0,8,90.9090909090909,11.0,10.0,AREA 0,5,50,1,7,7,0.92,0.0,sky130_fd_sc_hd,0,3 diff --git a/spi/lvs/gpio_defaults_block.spice b/spi/lvs/gpio_defaults_block.spice new file mode 100644 index 00000000..37f35dae --- /dev/null +++ b/spi/lvs/gpio_defaults_block.spice @@ -0,0 +1,90 @@ +* NGSPICE file created from gpio_defaults_block.ext - technology: sky130A + +* Black-box entry subcircuit for sky130_fd_sc_hd__conb_1 abstract view +.subckt sky130_fd_sc_hd__conb_1 VGND VNB VPB VPWR HI LO +.ends + +* Black-box entry subcircuit for sky130_fd_sc_hd__fill_2 abstract view +.subckt sky130_fd_sc_hd__fill_2 VGND VNB VPB VPWR +.ends + +* Black-box entry subcircuit for sky130_fd_sc_hd__decap_12 abstract view +.subckt sky130_fd_sc_hd__decap_12 VGND VNB VPB VPWR +.ends + +* Black-box entry subcircuit for sky130_fd_sc_hd__decap_8 abstract view +.subckt sky130_fd_sc_hd__decap_8 VGND VNB VPB VPWR +.ends + +* Black-box entry subcircuit for sky130_fd_sc_hd__decap_3 abstract view +.subckt sky130_fd_sc_hd__decap_3 VGND VNB VPB VPWR +.ends + +* Black-box entry subcircuit for sky130_fd_sc_hd__tapvpwrvgnd_1 abstract view +.subckt sky130_fd_sc_hd__tapvpwrvgnd_1 VGND VPWR +.ends + +* Black-box entry subcircuit for sky130_fd_sc_hd__decap_4 abstract view +.subckt sky130_fd_sc_hd__decap_4 VGND VNB VPB VPWR +.ends + +* Black-box entry subcircuit for sky130_fd_sc_hd__fill_1 abstract view +.subckt sky130_fd_sc_hd__fill_1 VGND VNB VPB VPWR +.ends + +.subckt gpio_defaults_block VGND VPWR gpio_defaults[0] gpio_defaults[10] gpio_defaults[11] ++ gpio_defaults[12] gpio_defaults[1] gpio_defaults[2] gpio_defaults[3] gpio_defaults[4] ++ gpio_defaults[5] gpio_defaults[6] gpio_defaults[7] gpio_defaults[8] gpio_defaults[9] +Xgpio_default_value\[8\] VGND VGND VPWR VPWR gpio_default_value\[8\]/HI gpio_defaults[8] ++ sky130_fd_sc_hd__conb_1 +XFILLER_0_26 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2 +XFILLER_0_49 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2 +XFILLER_0_38 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2 +Xgpio_default_value\[6\] VGND VGND VPWR VPWR gpio_default_value\[6\]/HI gpio_defaults[6] ++ sky130_fd_sc_hd__conb_1 +XFILLER_1_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12 +XFILLER_1_40 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_8 +XPHY_0 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3 +XPHY_1 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3 +Xgpio_default_value\[4\] VGND VGND VPWR VPWR gpio_default_value\[4\]/HI gpio_defaults[4] ++ sky130_fd_sc_hd__conb_1 +XPHY_2 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3 +XPHY_4 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3 +XPHY_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3 +XPHY_5 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3 +Xgpio_default_value\[2\] VGND VGND VPWR VPWR gpio_default_value\[2\]/HI gpio_defaults[2] ++ sky130_fd_sc_hd__conb_1 +Xgpio_default_value\[12\] VGND VGND VPWR VPWR gpio_default_value\[12\]/HI gpio_defaults[12] ++ sky130_fd_sc_hd__conb_1 +XFILLER_1_35 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2 +Xgpio_default_value\[0\] VGND VGND VPWR VPWR gpio_default_value\[0\]/HI gpio_defaults[0] ++ sky130_fd_sc_hd__conb_1 +XFILLER_1_48 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3 +XFILLER_1_27 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_8 +XFILLER_1_15 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12 +Xgpio_default_value\[10\] VGND VGND VPWR VPWR gpio_defaults[10] gpio_default_value\[10\]/LO ++ sky130_fd_sc_hd__conb_1 +Xgpio_default_value\[9\] VGND VGND VPWR VPWR gpio_default_value\[9\]/HI gpio_defaults[9] ++ sky130_fd_sc_hd__conb_1 +XFILLER_2_41 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_8 +Xgpio_default_value\[7\] VGND VGND VPWR VPWR gpio_default_value\[7\]/HI gpio_defaults[7] ++ sky130_fd_sc_hd__conb_1 +XFILLER_2_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12 +XTAP_7 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1 +XTAP_6 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1 +Xgpio_default_value\[5\] VGND VGND VPWR VPWR gpio_default_value\[5\]/HI gpio_defaults[5] ++ sky130_fd_sc_hd__conb_1 +XFILLER_0_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_4 +XFILLER_2_15 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12 +XFILLER_2_49 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2 +XFILLER_2_27 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1 +Xgpio_default_value\[3\] VGND VGND VPWR VPWR gpio_default_value\[3\]/HI gpio_defaults[3] ++ sky130_fd_sc_hd__conb_1 +XFILLER_0_7 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1 +XFILLER_2_29 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12 +Xgpio_default_value\[1\] VGND VGND VPWR VPWR gpio_defaults[1] gpio_default_value\[1\]/LO ++ sky130_fd_sc_hd__conb_1 +Xgpio_default_value\[11\] VGND VGND VPWR VPWR gpio_default_value\[11\]/HI gpio_defaults[11] ++ sky130_fd_sc_hd__conb_1 +.ends + diff --git a/verilog/gl/gpio_defaults_block.v b/verilog/gl/gpio_defaults_block.v new file mode 100644 index 00000000..7b186130 --- /dev/null +++ b/verilog/gl/gpio_defaults_block.v @@ -0,0 +1,222 @@ +module gpio_defaults_block (VGND, + VPWR, + gpio_defaults); + input VGND; + input VPWR; + output [12:0] gpio_defaults; + + wire \gpio_defaults_low[0] ; + wire \gpio_defaults_high[10] ; + wire \gpio_defaults_low[11] ; + wire \gpio_defaults_low[12] ; + wire \gpio_defaults_high[1] ; + wire \gpio_defaults_low[2] ; + wire \gpio_defaults_low[3] ; + wire \gpio_defaults_low[4] ; + wire \gpio_defaults_low[5] ; + wire \gpio_defaults_low[6] ; + wire \gpio_defaults_low[7] ; + wire \gpio_defaults_low[8] ; + wire \gpio_defaults_low[9] ; + wire \gpio_defaults_high[0] ; + wire \gpio_defaults_high[11] ; + wire \gpio_defaults_high[12] ; + wire \gpio_defaults_high[2] ; + wire \gpio_defaults_high[3] ; + wire \gpio_defaults_high[4] ; + wire \gpio_defaults_high[5] ; + wire \gpio_defaults_high[6] ; + wire \gpio_defaults_high[7] ; + wire \gpio_defaults_high[8] ; + wire \gpio_defaults_high[9] ; + wire \gpio_defaults_low[10] ; + wire \gpio_defaults_low[1] ; + + sky130_fd_sc_hd__fill_2 FILLER_0_26 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_0_49 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_7 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_1_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_1_35 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_1_40 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 FILLER_1_48 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_2_41 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_2_49 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[0] (.HI(\gpio_defaults_high[0] ), + .LO(\gpio_defaults_low[0] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[10] (.HI(\gpio_defaults_high[10] ), + .LO(\gpio_defaults_low[10] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[11] (.HI(\gpio_defaults_high[11] ), + .LO(\gpio_defaults_low[11] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[12] (.HI(\gpio_defaults_high[12] ), + .LO(\gpio_defaults_low[12] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[1] (.HI(\gpio_defaults_high[1] ), + .LO(\gpio_defaults_low[1] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[2] (.HI(\gpio_defaults_high[2] ), + .LO(\gpio_defaults_low[2] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[3] (.HI(\gpio_defaults_high[3] ), + .LO(\gpio_defaults_low[3] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[4] (.HI(\gpio_defaults_high[4] ), + .LO(\gpio_defaults_low[4] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[5] (.HI(\gpio_defaults_high[5] ), + .LO(\gpio_defaults_low[5] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[6] (.HI(\gpio_defaults_high[6] ), + .LO(\gpio_defaults_low[6] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[7] (.HI(\gpio_defaults_high[7] ), + .LO(\gpio_defaults_low[7] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[8] (.HI(\gpio_defaults_high[8] ), + .LO(\gpio_defaults_low[8] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__conb_1 \gpio_default_value[9] (.HI(\gpio_defaults_high[9] ), + .LO(\gpio_defaults_low[9] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + assign gpio_defaults[0] = \gpio_defaults_low[0] ; + assign gpio_defaults[10] = \gpio_defaults_high[10] ; + assign gpio_defaults[11] = \gpio_defaults_low[11] ; + assign gpio_defaults[12] = \gpio_defaults_low[12] ; + assign gpio_defaults[1] = \gpio_defaults_high[1] ; + assign gpio_defaults[2] = \gpio_defaults_low[2] ; + assign gpio_defaults[3] = \gpio_defaults_low[3] ; + assign gpio_defaults[4] = \gpio_defaults_low[4] ; + assign gpio_defaults[5] = \gpio_defaults_low[5] ; + assign gpio_defaults[6] = \gpio_defaults_low[6] ; + assign gpio_defaults[7] = \gpio_defaults_low[7] ; + assign gpio_defaults[8] = \gpio_defaults_low[8] ; + assign gpio_defaults[9] = \gpio_defaults_low[9] ; +endmodule