Merge pull request #258 from efabless/cocotb

Cocotb tests and script updates

verilog/dv/cocotb/caravel_tests.py

@@ -42,7 +42,7 @@ from tests.timer.timer import *
 from tests.uart.uart import *
 from tests.spi_master.spi_master import *
 from tests.logicAnalyzer.la import *
-
+from tests.debug.debug import *
 
 
 # archive tests

verilog/dv/cocotb/tests.json

@@ -2,273 +2,12 @@
     "Tests": {
         "_comment0" :"level is priorty of the test low is better, SW spcify if the test uses SW, RTL regressions run this test in RTL ",
         "_comment1" :"GL regressions run this test in gatelevel, GL_SDF regression run this test with SDF included"
-
-        ,"bitbang_no_cpu_all_o" :{"level":0, 
-            "SW":false,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":[],
-            "GL_SDF":[],
-            "description":"test disable CPU and control the wishbone to configure gpio[4:37] as mgmt output using bitbang and check them"}
-        ,"bitbang_cpu_all_o" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"configure all gpios as mgmt output using bitbang and check them"}
-        ,"gpio_all_o" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"configure all gpios as mgmt output using automatic approach firmware and check them"}
-        ,"gpio_all_o_user" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"configure all gpios as user output using automatic approach firmware and check them"}
         ,"gpio_all_i" :{"level":0, 
             "SW":true,
             "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
             "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
             "GL_SDF":["r_sdf","weekly","tape_out"],
             "description":"configure all gpios as mgmt input using automatic approach firmware and check them"}
-        ,"gpio_all_i_user" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"configure all gpios as user input using automatic approach firmware and check them"}
-        ,"gpio_all_i_pu" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"configure all gpios as mgmt input pull up using automatic approach firmware and check them"}
-        ,"gpio_all_i_pu_user" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"configure all gpios as user input pull up using automatic approach firmware and check them"}
-        ,"gpio_all_i_pd" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"configure all gpios as mgmt input pull down using automatic approach firmware and check them"}
-        ,"gpio_all_i_pd_user" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"configure all gpios as user input pull down using automatic approach firmware and check them"}
-        ,"gpio_all_bidir_user" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"configure all gpios as user bidir  using automatic approach firmware and check them"}
-        ,"bitbang_cpu_all_10" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"shift all the register with 10"}
-        ,"bitbang_cpu_all_01" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"shift all the register with 01"}
-        ,"bitbang_cpu_all_1100" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"shift all the register with 1100"}
-        ,"bitbang_cpu_all_0011" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"shift all the register with 0011"}
-        ,"bitbang_no_cpu_all_i" :{"level":0, 
-            "SW":false,
-            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
-            "GL":[],
-            "GL_SDF":[],
-            "description":"test disable CPU and control the wishbone to configure gpio[0:31] as mgmt input using bitbang and check them"}
-        ,"bitbang_cpu_all_i" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":" configure gpio[0:37] as mgmt input using bitbang and check them"}
-
-        ,"bitbang_spi_o" :{"level":0, 
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "SW":true,
-            "description":"Same as bitbang_cpu_all but configure the gpio using the SPI not the firmware"}
-
-        ,"bitbang_spi_i" :{"level":0, 
-            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "SW":true,
-            "description":"Same as bitbang_cpu_all_i but configure the gpio using the SPI not the firmware"}
-        ,"hk_regs_wr_wb_cpu" :{"level":0, 
-            "SW":false,
-            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"bit bash test for housekeeping registers"}
-        ,"hk_regs_wr_wb" :{"level":0, 
-            "SW":false,
-            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
-            "GL":[],
-            "GL_SDF":[],
-            "description":"write then read (the written value) from random housekeeping registers through the firmware but without using CPU, the SPI and system regs can't be read using firmware so the test only GPIO regs inside housekeeping "}
-        ,"hk_regs_wr_spi" :{"level":0, 
-            "SW":false,
-            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"write then read(the written value) from random housekeeping registers through the SPI housekeeping"}
-        ,"hk_regs_rst_spi" :{"level":0, 
-            "SW":false,
-            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
-            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"check reset value of house keeping registers by reading them trough the spi housekeeping"}
-        ,"helloWorld" :{"level":3, 
-            "SW":false,
-            "RTL":[],
-            "GL":[],
-            "GL_SDF":[],
-            "description":"hello world test"}
-        
-        ,"cpu_stress" :{"level":2, 
-            "SW":true,
-            "RTL":["r_rtl","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"stress the cpu with heavy processing"}
-        ,"mem_dff2" :{"level":2, 
-            "SW":true,
-            "RTL":["r_rtl","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"Memory stress for all space of dff2"}
-        ,"mem_dff" :{"level":2, 
-            "SW":true,
-            "RTL":["r_rtl","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"Memory stress for all space of dff"}
-        ,"IRQ_external" :{"level":2, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"test external interrupt by mprj 7"}            
-        ,"IRQ_timer" :{"level":2, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"test timer0 interrupt"}         
-        ,"IRQ_uart" :{"level":2, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"test timer0 interrupt"}     
-        ,"mgmt_gpio_out" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"tests blinking of mgmt gpio bit as an output"}        
-        ,"mgmt_gpio_in" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"tests blinking of mgmt gpio bit as an output"}    
-        ,"mgmt_gpio_bidir" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"send random number of blinks through mgmt_gpio and expect to recieve the same number back "}    
-        ,"timer0_oneshot" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"check timer0 oneshot mode"} 
-        ,"timer0_periodic" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"check timer0 periodic mode"}
-        ,"uart_tx" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"test uart transmit"}
-        ,"uart_rx" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"test uart reception"}
-        ,"uart_loopback" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"test uart in loopback mode input and output is shorted"}
-        ,"spi_master_rd" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"using SPI master for reading from external memory"}
-
-        ,"spi_master_temp" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"To be deleted"}
-
-        ,"user_pass_thru_rd" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"use the housekeeping spi in user pass thru mode to read from external mem"}
-
-
-        ,"pll" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"Check pll diffrent configuration"}
-
-        ,"clock_redirect" :{"level":0, 
-            "SW":true,
-            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
-            "GL":["r_gl","nightly","weekly","tape_out"],
-            "GL_SDF":["r_sdf","weekly","tape_out"],
-            "description":"check clock redirect is working as expected"}
 
         ,"hk_disable" :{"level":0, 
             "SW":true,
@@ -276,6 +15,197 @@
             "GL":["r_gl","nightly","weekly","tape_out"],
             "GL_SDF":["r_sdf","weekly","tape_out"],
             "description":"check Housekeeping SPI disable register is working"}
+        ,"uart_rx" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"test uart reception"}
+        ,"hk_regs_rst_spi" :{"level":0, 
+            "SW":false,
+            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"check reset value of house keeping registers by reading them trough the spi housekeeping"}
+        
+        ,"gpio_all_i_user" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"configure all gpios as user input using automatic approach firmware and check them"}
+
+        ,"gpio_all_i_pu" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"configure all gpios as mgmt input pull up using automatic approach firmware and check them"}
+
+        ,"gpio_all_i_pu_user" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"configure all gpios as user input pull up using automatic approach firmware and check them"}
+
+        ,"gpio_all_i_pd" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"configure all gpios as mgmt input pull down using automatic approach firmware and check them"}
+
+        ,"gpio_all_i_pd_user" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"configure all gpios as user input pull down using automatic approach firmware and check them"}
+
+        ,"gpio_all_bidir_user" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"configure all gpios as user bidir  using automatic approach firmware and check them"}
+
+        ,"gpio_all_o" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"configure all gpios as mgmt output using automatic approach firmware and check them"}
+
+        ,"gpio_all_o_user" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"configure all gpios as user output using automatic approach firmware and check them"}
+        ,"hk_regs_wr_wb_cpu" :{"level":0, 
+            "SW":false,
+            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"bit bash test for housekeeping registers"}
+        ,"IRQ_timer" :{"level":2, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"test timer0 interrupt"} 
+
+        ,"bitbang_cpu_all_i" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":" configure gpio[0:37] as mgmt input using bitbang and check them"}
+        
+        ,"bitbang_spi_o" :{"level":0, 
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "SW":true,
+            "description":"Same as bitbang_cpu_all but configure the gpio using the SPI not the firmware"}
+
+        ,"mgmt_gpio_out" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"tests blinking of mgmt gpio bit as an output"} 
+
+        ,"bitbang_spi_i" :{"level":0, 
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "SW":true,
+            "description":"Same as bitbang_cpu_all_i but configure the gpio using the SPI not the firmware"}
+        ,"hk_regs_wr_spi" :{"level":0, 
+            "SW":false,
+            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"write then read(the written value) from random housekeeping registers through the SPI housekeeping"}
+
+        ,"IRQ_external" :{"level":2, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"test external interrupt by mprj 7"}  
+        
+        ,"IRQ_uart" :{"level":2, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"test timer0 interrupt"}     
+         
+        ,"mgmt_gpio_in" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"tests blinking of mgmt gpio bit as an output"}     
+        
+        ,"timer0_oneshot" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"check timer0 oneshot mode"} 
+
+        ,"uart_loopback" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"test uart in loopback mode input and output is shorted"}
+
+        ,"timer0_periodic" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"check timer0 periodic mode"}
+
+        ,"uart_tx" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"test uart transmit"}
+    
+        ,"spi_master_rd" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"using SPI master for reading from external memory"}
+
+        ,"user_pass_thru_rd" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"use the housekeeping spi in user pass thru mode to read from external mem"}
+    
+        ,"clock_redirect" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"check clock redirect is working as expected"}
+
+        ,"mgmt_gpio_bidir" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"send random number of blinks through mgmt_gpio and expect to recieve the same number back "}    
 
         ,"la" :{"level":0, 
             "SW":true,
@@ -283,5 +213,104 @@
             "GL":["r_gl","nightly","weekly","tape_out"],
             "GL_SDF":["r_sdf","weekly","tape_out"],
             "description":"check logic analyzer input and output enable"}
+
+        ,"pll" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"Check pll diffrent configuration"}
+            
+        ,"spi_master_temp" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"To be deleted"}
+
+        ,"bitbang_cpu_all_o" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"configure all gpios as mgmt output using bitbang and check them"}
+
+        ,"mem_dff" :{"level":2, 
+            "SW":true,
+            "RTL":["r_rtl","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"Memory stress for all space of dff"}
+
+        ,"bitbang_cpu_all_01" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"shift all the register with 01"}
+
+        ,"mem_dff2" :{"level":2, 
+            "SW":true,
+            "RTL":["r_rtl","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"Memory stress for all space of dff2"}
+        
+        ,"bitbang_cpu_all_10" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"shift all the register with 10"}
+
+        ,"bitbang_cpu_all_1100" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"shift all the register with 1100"}
+
+        ,"bitbang_cpu_all_0011" :{"level":0, 
+            "SW":true,
+            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
+            "GL":["r_gl","push_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"shift all the register with 0011"}
+        ,"cpu_stress" :{"level":2, 
+            "SW":true,
+            "RTL":["r_rtl","nightly","weekly","tape_out"],
+            "GL":["r_gl","nightly","weekly","tape_out"],
+            "GL_SDF":["r_sdf","weekly","tape_out"],
+            "description":"stress the cpu with heavy processing"}
+        ,"bitbang_no_cpu_all_o" :{"level":0, 
+            "SW":false,
+            "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"],
+            "GL":[],
+            "GL_SDF":[],
+            "description":"test disable CPU and control the wishbone to configure gpio[4:37] as mgmt output using bitbang and check them"}
+        ,"bitbang_no_cpu_all_i" :{"level":0, 
+            "SW":false,
+            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
+            "GL":[],
+            "GL_SDF":[],
+            "description":"test disable CPU and control the wishbone to configure gpio[0:31] as mgmt input using bitbang and check them"}
+        ,"hk_regs_wr_wb" :{"level":0, 
+            "SW":false,
+            "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"],
+            "GL":[],
+            "GL_SDF":[],
+            "description":"write then read (the written value) from random housekeeping registers through the firmware but without using CPU, the SPI and system regs can't be read using firmware so the test only GPIO regs inside housekeeping "}
+        ,"helloWorld" :{"level":3, 
+            "SW":false,
+            "RTL":[],
+            "GL":[],
+            "GL_SDF":[],
+            "description":"hello world test"}
+        ,"debug" :{"level":0, 
+            "SW":true,
+            "RTL":[],
+            "GL":[],
+            "GL_SDF":[],
+            "description":""}
     }
 }

verilog/dv/cocotb/tests/bitbang/bitbang_tests.py

@@ -80,6 +80,7 @@ async def bitbang_no_cpu_all_o(dut):
     await clock_in_right_o_left_i_standard(cpu,0) # 1	and 36	
     await clock_in_end_output(cpu)		          # 0   and 37 and load
 
+    await caravelEnv.release_csb()
     await cpu.drive_data2address(reg.get_addr('reg_mprj_datal'),0x0) 
     await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),0x0) 
 

verilog/dv/cocotb/tests/bitbang/bitbang_tests_cpu.py

@@ -57,7 +57,7 @@ async def bitbang_cpu_all_o(dut):
 @cocotb.test()
 @repot_test
 async def bitbang_cpu_all_10(dut):
-    caravelEnv = await test_configure(dut,timeout_cycles=2863378)
+    caravelEnv,clock = await test_configure(dut,timeout_cycles=1581680)
     cpu = RiskV(dut)
     cpu.cpu_force_reset()
     cpu.cpu_release_reset()
@@ -68,11 +68,17 @@ async def bitbang_cpu_all_10(dut):
     gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_in_2[10]","gpio_control_in_2[11]","gpio_control_in_2[12]","gpio_control_in_2[13]","gpio_control_in_2[14]","gpio_control_in_2[15]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]")
     type = True # type of shifting 01 or 10
     for gpio in gpios_l:
-        shift(uut._id(gpio,False),type)
+        if not Macros['GL']:
+            shift(uut._id(gpio,False),type)
+        else: 
+            shift(uut._id(f'\\{gpio} ',False),type)
         type = not type
     type = True # type of shifting 01 or 10
     for gpio in reversed(gpios_h):
-        shift(uut._id(gpio,False),type)
+        if not Macros['GL']:
+            shift(uut._id(gpio,False),type)
+        else: 
+            shift(uut._id(f'\\{gpio} ',False),type)
         type = not type
        
 
@@ -82,9 +88,14 @@ def shift(gpio,shift_type):
     else: 
         bits = "1010101010101"
     fail = False
-    cocotb.log.info(f"[TEST] gpio {gpio} shift {gpio._id(f'shift_register',False).value} expected {bits}")
+    if not Macros['GL']:
+        cocotb.log.info(f"[TEST] gpio {gpio} shift {gpio._id(f'shift_register',False).value} expected {bits}")
     for i in range(13):
-        if gpio._id(f"shift_register",False).value.binstr[i] != bits[i]:
+        if not Macros['GL']:
+            shift_register = gpio._id(f"shift_register",False).value.binstr[i]
+        else:  
+            shift_register = gpio._id(f"\\shift_register[{i}] ",False).value.binstr
+        if shift_register != bits[i]:
             fail = True
             cocotb.log.error(f"[TEST] wrong shift register {i} in {gpio}")
     if not fail: 
@@ -104,11 +115,17 @@ async def bitbang_cpu_all_01(dut):
     gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_in_2[10]","gpio_control_in_2[11]","gpio_control_in_2[12]","gpio_control_in_2[13]","gpio_control_in_2[14]","gpio_control_in_2[15]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]")
     type = False # type of shifting 01 or 10
     for gpio in gpios_l:
-        shift(uut._id(gpio,False),type)
+        if not Macros['GL']:
+            shift(uut._id(gpio,False),type)
+        else: 
+            shift(uut._id(f'\\{gpio} ',False),type)
         type = not type
     type = False # type of shifting 01 or 10
     for gpio in reversed(gpios_h):
-        shift(uut._id(gpio,False),type)
+        if not Macros['GL']:
+            shift(uut._id(gpio,False),type)
+        else: 
+            shift(uut._id(f'\\{gpio} ',False),type)
         type = not type
 
 @cocotb.test()
@@ -123,13 +140,19 @@ async def bitbang_cpu_all_0011(dut):
     gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]","gpio_control_in_1[6]","gpio_control_in_1[7]","gpio_control_in_1[8]","gpio_control_in_1[9]","gpio_control_in_1[10]")
     
     gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_in_2[10]","gpio_control_in_2[11]","gpio_control_in_2[12]","gpio_control_in_2[13]","gpio_control_in_2[14]","gpio_control_in_2[15]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]")
-    type = 0 # type of shifting 01 or 10
+    type = 2 # type of shifting 01 or 10
     for gpio in gpios_l:
-        shift_2(uut._id(gpio,False),type)
+        if not Macros['GL']:
+            shift_2(uut._id(gpio,False),type)
+        else: 
+            shift_2(uut._id(f'\\{gpio} ',False),type)
         type = (type + 1) %4
-    type = 0 # type of shifting 01 or 10
+    type = 2 # type of shifting 01 or 10
     for gpio in reversed(gpios_h):
-        shift_2(uut._id(gpio,False),type)
+        if not Macros['GL']:
+            shift_2(uut._id(gpio,False),type)
+        else: 
+            shift_2(uut._id(f'\\{gpio} ',False),type)
         type = (type + 1) %4
 
 @cocotb.test()
@@ -144,28 +167,44 @@ async def bitbang_cpu_all_1100(dut):
     gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]","gpio_control_in_1[6]","gpio_control_in_1[7]","gpio_control_in_1[8]","gpio_control_in_1[9]","gpio_control_in_1[10]")
     
     gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_in_2[10]","gpio_control_in_2[11]","gpio_control_in_2[12]","gpio_control_in_2[13]","gpio_control_in_2[14]","gpio_control_in_2[15]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]")
-    type = 2 # type of shifting 01 or 10
+    type = 0 # type of shifting 01 or 10
     for gpio in gpios_l:
-        shift_2(uut._id(gpio,False),type)
+        if not Macros['GL']:
+            shift_2(uut._id(gpio,False),type)
+        else: 
+            shift_2(uut._id(f'\\{gpio} ',False),type)
         type = (type + 1) %4
-    type = 2 # type of shifting 01 or 10
+    type = 0 # type of shifting 01 or 10
     for gpio in reversed(gpios_h):
-        shift_2(uut._id(gpio,False),type)
+        if not Macros['GL']:
+            shift_2(uut._id(gpio,False),type)
+        else: 
+            shift_2(uut._id(f'\\{gpio} ',False),type)
         type = (type + 1) %4
 
 def shift_2(gpio,shift_type):
     if shift_type == 0: 
-        bits = "1001100110011"
-    elif shift_type == 1: 
-        bits = "1100110011001"
-    elif shift_type == 2: 
-        bits = "0110011001100"
-    elif shift_type == 3: 
         bits = "0011001100110"
+    elif shift_type == 1: 
+        bits = "0110011001100"
+    elif shift_type == 2: 
+        bits = "1100110011001"
+    elif shift_type == 3: 
+        bits = "1001100110011"
     fail = False
-    cocotb.log.info(f"[TEST] gpio {gpio} shift {gpio._id(f'shift_register',False).value} expected {bits}")
+    if not Macros['GL']:
+        cocotb.log.info(f"[TEST] gpio {gpio} shift {gpio._id(f'shift_register',False).value.binstr[::-1]} expected {bits}")
+    else :
+        shift_reg =''
+        for i in range(13):
+            shift_reg +=  gpio._id(f"\\shift_register[{i}] ",False).value.binstr
+        cocotb.log.info(f"[TEST] gpio {gpio} shift {shift_reg} expected {bits}")
     for i in range(13):
-        if gpio._id(f"shift_register",False).value.binstr[i] != bits[i]:
+        if not Macros['GL']:
+            shift_register = gpio._id(f"shift_register",False).value.binstr[12-i]
+        else:  
+            shift_register = gpio._id(f"\\shift_register[{i}] ",False).value.binstr
+        if shift_register != bits[i]:
             fail = True
             cocotb.log.error(f"[TEST] wrong shift register {i} in {gpio}")
     if not fail: 

verilog/dv/cocotb/tests/debug/debug.c

@@ -0,0 +1,72 @@
+/*
+ * SPDX-FileCopyrightText: 2020 Efabless Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <defs.h>
+#include <stub.c>
+
+// --------------------------------------------------------
+
+void main()
+{
+    int j;
+    reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2
+    reg_debug_1  = 0x0;
+    reg_debug_2  = 0x0;
+
+
+    reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT;
+    reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_NOPULL;
+
+    // Set clock to 64 kbaud and enable the UART.  It is important to do this
+    // before applying the configuration, or else the Tx line initializes as
+    // zero, which indicates the start of a byte to the receiver.
+
+
+    // Now, apply the configuration
+    reg_mprj_xfer = 1;
+    while (reg_mprj_xfer == 1);
+    // reg_uart_enable = 1;
+    // start of the test
+    reg_debug_1 = 0xAA;
+    // very long wait
+    for (j = 0; j < 160; j++);
+    for (j = 0; j < 160; j++);
+    for (j = 0; j < 160; j++);
+
+
+    // Set clock to 64 kbaud and enable the UART.  It is important to do this
+    // before applying the configuration, or else the Tx line initializes as
+    // zero, which indicates the start of a byte to the receiver.
+
+//     // these instruction work without using interrupt, they seem to be timing dependent
+//    reg_uart_enable = 1;
+//    reg_debug_irq_en = 1;
+//    reg_reset = 1;
+
+
+//     irq_setmask(0);
+// 	irq_setie(1);
+// 	irq_setmask(irq_getmask() | (1 << USER_IRQ_3_INTERRUPT));
+
+//     for (j = 0; j < 500; j++);
+
+// //    reg_uart_data = 0xab;
+
+//     // Allow transmission to complete before signalling that the program
+//     // has ended.
+//     for (j = 0; j < 160; j++);
+}

verilog/dv/cocotb/tests/debug/debug.py

@@ -0,0 +1,114 @@
+from curses import baudrate
+import random
+import cocotb
+from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles,Timer,Edge
+import cocotb.log
+from interfaces.cpu import RiskV
+from interfaces.defsParser import Regs
+from cocotb.result import TestSuccess
+from tests.common_functions.test_functions import *
+from tests.bitbang.bitbang_functions import *
+from interfaces.caravel import GPIO_MODE
+from interfaces.common import Macros
+
+
+bit_time_ns = 0
+reg = Regs()
+
+
+@cocotb.test()
+@repot_test
+async def debug(dut):
+    caravelEnv,clock = await test_configure(dut,timeout_cycles=375862)
+    cpu = RiskV(dut)
+    cpu.cpu_force_reset()
+    cpu.cpu_release_reset()
+    # calculate bit time
+    clk = clock.period/1000
+    global bit_time_ns
+    bit_time_ns = round(10**5 * clk / (96))
+    cocotb.log.info(f"[TEST] bit time in nano second = {bit_time_ns}")  
+    caravelEnv.drive_gpio_in((0,0),0) # IO[0] affects the uart selecting btw system and debug
+    caravelEnv.drive_gpio_in((5,5),1)
+    # wait for start of sending
+    await wait_reg1(cpu,caravelEnv,0XAA) 
+    cocotb.log.info(f"[TEST] Start debug test")  
+    # send random data to address 30'h00400024 and expect to recieve the same data back it back
+    address = 0x00000410
+    data = random.getrandbits(32)
+    data = 0xFFFFFFFF
+    cocotb.log.info (f"[TEST] Executing DFF2 write address={hex(address)} data = {hex(data)}")
+    await wb_write(caravelEnv,address,data)
+    receieved_data = await wb_read(caravelEnv,address)
+    if data != receieved_data: 
+        cocotb.log.error(f"[TEST] DFF2 write failed expected data = {hex(data)} recieved data = {hex(receieved_data)}")
+    else: 
+        cocotb.log.info(f"[TEST] DFF2 write succeeded")
+
+    
+async def start_of_tx(caravelEnv):
+    while (True): # wait for the start of the transimission it 1 then 0
+        if (caravelEnv.monitor_gpio((6,6)).integer == 0):
+            break
+        await Timer(bit_time_ns, units='ns')
+    await Timer(bit_time_ns, units='ns')
+        
+async def uart_send_char(caravelEnv,char):
+    cocotb.log.info (f"[uart_send_char] start sending on uart {char}")
+    #send start bit
+    caravelEnv.drive_gpio_in((5,5),0)
+    await Timer(bit_time_ns, units='ns')
+    #send bits 
+    for i in range(8):
+        caravelEnv.drive_gpio_in((5,5),char[i])
+        await Timer(bit_time_ns, units='ns')
+
+    # stop of frame
+    caravelEnv.drive_gpio_in((5,5),1)
+    await Timer(bit_time_ns, units='ns')
+    await Timer(bit_time_ns, units='ns')
+    # insert 4 bit delay just for debugging
+    await Timer(bit_time_ns, units='ns')
+    await Timer(bit_time_ns, units='ns')
+    await Timer(bit_time_ns, units='ns')
+    await Timer(bit_time_ns, units='ns')
+
+async def uart_get_char(caravelEnv):
+    await start_of_tx(caravelEnv)
+    char  = ''
+    for i in range (8):
+        char = char + caravelEnv.monitor_gpio((6,6)).binstr 
+        await Timer(bit_time_ns, units='ns')  
+    cocotb.log.info (f"[uart_get_char] recieving {char} from uart")
+    
+    return char
+
+async def wb_write(caravelEnv,addr,data):
+    addr_bits = bin(addr)[2:].zfill(32)[::-1]
+    data_bits = bin(data)[2:].zfill(32)[::-1]
+    cocotb.log.info(f"[TEST] address bits = {addr_bits} {type(addr_bits)}")
+    await uart_send_char(caravelEnv, '10000000') # write cmd
+    await uart_send_char(caravelEnv, '10000000') # size
+    await uart_send_char(caravelEnv, addr_bits[24:32]) 
+    await uart_send_char(caravelEnv, addr_bits[16:24])
+    await uart_send_char(caravelEnv, addr_bits[8:16])
+    await uart_send_char(caravelEnv, addr_bits[0:8])
+    await uart_send_char(caravelEnv, data_bits[24:32])
+    await uart_send_char(caravelEnv, data_bits[16:24])
+    await uart_send_char(caravelEnv, data_bits[8:16])
+    await uart_send_char(caravelEnv, data_bits[0:8])
+
+
+async def wb_read(caravelEnv,addr):
+    addr_bits = bin(addr)[2:].zfill(32)[::-1]
+    await uart_send_char(caravelEnv, '01000000') # read cmd
+    await uart_send_char(caravelEnv, '10000000') # size
+    await uart_send_char(caravelEnv, addr_bits[24:32])
+    await uart_send_char(caravelEnv, addr_bits[16:24])
+    await uart_send_char(caravelEnv, addr_bits[8:16])
+    await uart_send_char(caravelEnv, addr_bits[0:8])
+    data_bits = await uart_get_char(caravelEnv) 
+    data_bits += await uart_get_char(caravelEnv)
+    data_bits += await uart_get_char(caravelEnv) 
+    data_bits += await uart_get_char(caravelEnv) 
+    return int(data_bits,2)

verilog/dv/cocotb/verify_cocotb.py

@@ -231,6 +231,7 @@ class RunRegression:
         self.test_arg = test
         self.testlist_arg = testlist
         self.corners = corner
+        self.total_start_time = datetime.now()
         if type_arg is None:
             type_arg = "RTL"
         self.type_arg = type_arg
@@ -338,13 +339,13 @@ class RunRegression:
     def update_reg_log(self):
         file_name=f"sim/{os.getenv('RUNTAG')}/runs.log"
         f = open(file_name, "w")
-        f.write(f"{'Test':<25} {'status':<10} {'start':<15} {'end':<15} {'duration':<13} {'p/f':<5}\n")
+        f.write(f"{'Test':<33} {'status':<10} {'start':<15} {'end':<15} {'duration':<13} {'p/f':<5}\n")
         for test,sim_types in self.tests.items():
             for sim_type,corners in sim_types.items():
                 for corner,status in corners.items():
                     new_test_name= f"{sim_type}-{test}-{corner}"
                     f.write(f"{new_test_name:<33} {status['status']:<10} {status['starttime']:<15} {status['endtime']:<15} {status['duration']:<13} {status['pass']:<5}\n")
-        f.write(f"\n\nTotal: ({self.passed_tests})passed ({self.failed_tests})failed ({self.unknown_tests})unknown ")
+        f.write(f"\n\nTotal: ({self.passed_tests})passed ({self.failed_tests})failed ({self.unknown_tests})unknown  ({('%.10s' % (datetime.now() - self.total_start_time))})time consumed ")
         f.close()
     
     def write_command_log(self):