Merge pull request #239 from efabless/buff_power_connection

added power connection to buffer top level rtl

manifest

@@ -8,7 +8,7 @@ cc82a78753f5f5d0a1519bd81adbcff8a4296d91  verilog/rtl/__user_project_wrapper.v
 9bfe4a18a8b9a68fc21cfa07884f99409ec1f72d  verilog/rtl/caravan.v
 06e92151b5928e3f28e30a5cde76f7dd6530ed91  verilog/rtl/caravan_netlists.v
 a3d12a2d2d3596800bec47d1266dce2399a2fcc6  verilog/rtl/caravan_openframe.v
-20768cb15f74f6a47d2e39d145f4dadf45069209  verilog/rtl/caravel.v
+b7ac4e432861dff22eadb50beee88c487c744201  verilog/rtl/caravel.v
 2fe34f043edbe87c626e5616ad54f82c9ba067c2  verilog/rtl/caravel_clocking.v
 3b9185fd0dc2d0e8c49f1af3d14724e0948fe650  verilog/rtl/caravel_openframe.v
 d97cb60c8d125d6098111d4f0aa00410515770eb  verilog/rtl/caravel_power_routing.v

verilog/rtl/caravel.v

@@ -246,6 +246,10 @@ module caravel (
 	
 	// top-level buffers
 	buff_flash_clkrst flash_clkrst_buffers (
+	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+	`endif
 	.in_n({
 		caravel_clk,
 		caravel_rstn,