riscv
/
caravel
mirror of https://github.com/efabless/caravel.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Fixed the LEF views of caravel and caravan, which determine the (#297) 

location, use, class, and name of all of the pins around the
padframe.
This commit is contained in:
R. Timothy Edwards 2022-10-20 17:34:28 -04:00 committed by GitHub
parent 6d3cfe66c4
commit 1d26e4df32
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 3843 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3811
lef/caravan.lef Normal file
View File

File diff suppressed because it is too large Load Diff

64
lef/caravel.lef
View File

@ -367,16 +367,8 @@ MACRO caravel
RECT 683.565 35.715 720.750 91.545 ; RECT 683.565 35.715 720.750 91.545 ;
END END
END resetb END resetb
PIN vccd
DIRECTION INOUT ;
USE POWER ;
PORT
LAYER met5 ;
RECT 30.835 350.270 98.100 404.670 ;
END
END vccd
PIN vccd1 PIN vccd1
DIRECTION INOUT ; DIRECTION INPUT ;
USE POWER ; USE POWER ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -384,7 +376,7 @@ MACRO caravel
END END
END vccd1 END vccd1
PIN vccd2 PIN vccd2
DIRECTION INOUT ; DIRECTION INPUT ;
USE POWER ; USE POWER ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -392,7 +384,7 @@ MACRO caravel
END END
END vccd2 END vccd2
PIN vdda PIN vdda
DIRECTION INOUT ; DIRECTION INPUT ;
USE POWER ; USE POWER ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -400,7 +392,7 @@ MACRO caravel
END END
END vdda END vdda
PIN vdda1 PIN vdda1
DIRECTION INOUT ; DIRECTION INPUT ;
USE POWER ; USE POWER ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -408,7 +400,7 @@ MACRO caravel
END END
END vdda1 END vdda1
PIN vdda1_2 PIN vdda1_2
DIRECTION INOUT ; DIRECTION INPUT ;
USE POWER ; USE POWER ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -416,7 +408,7 @@ MACRO caravel
END END
END vdda1_2 END vdda1_2
PIN vdda2 PIN vdda2
DIRECTION INOUT ; DIRECTION INPUT ;
USE POWER ; USE POWER ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -424,7 +416,7 @@ MACRO caravel
END END
END vdda2 END vdda2
PIN vddio PIN vddio
DIRECTION INOUT ; DIRECTION INPUT ;
USE POWER ; USE POWER ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -432,7 +424,7 @@ MACRO caravel
END END
END vddio END vddio
PIN vddio_2 PIN vddio_2
DIRECTION INOUT ; DIRECTION INPUT ;
USE POWER ; USE POWER ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -440,7 +432,7 @@ MACRO caravel
END END
END vddio_2 END vddio_2
PIN vssa PIN vssa
DIRECTION INOUT ; DIRECTION INPUT ;
USE GROUND ; USE GROUND ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -448,7 +440,7 @@ MACRO caravel
END END
END vssa END vssa
PIN vssa1 PIN vssa1
DIRECTION INOUT ; DIRECTION INPUT ;
USE GROUND ; USE GROUND ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -456,7 +448,7 @@ MACRO caravel
END END
END vssa1 END vssa1
PIN vssa1_2 PIN vssa1_2
DIRECTION INOUT ; DIRECTION INPUT ;
USE GROUND ; USE GROUND ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -464,23 +456,15 @@ MACRO caravel
END END
END vssa1_2 END vssa1_2
PIN vssa2 PIN vssa2
DIRECTION INOUT ; DIRECTION INPUT ;
USE GROUND ; USE GROUND ;
PORT PORT
LAYER met5 ; LAYER met5 ;
RECT 34.055 4145.050 94.880 4205.890 ; RECT 34.055 4145.050 94.880 4205.890 ;
END END
END vssa2 END vssa2
PIN vssd
DIRECTION INOUT ;
USE GROUND ;
PORT
LAYER met5 ;
RECT 1216.330 30.835 1270.730 98.100 ;
END
END vssd
PIN vssd1 PIN vssd1
DIRECTION INOUT ; DIRECTION INPUT ;
USE GROUND ; USE GROUND ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -488,7 +472,7 @@ MACRO caravel
END END
END vssd1 END vssd1
PIN vssd2 PIN vssd2
DIRECTION INOUT ; DIRECTION INPUT ;
USE GROUND ; USE GROUND ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -496,7 +480,7 @@ MACRO caravel
END END
END vssd2 END vssd2
PIN vssio PIN vssio
DIRECTION INOUT ; DIRECTION INPUT ;
USE GROUND ; USE GROUND ;
PORT PORT
LAYER met5 ; LAYER met5 ;
@ -504,13 +488,29 @@ MACRO caravel
END END
END vssio END vssio
PIN vssio_2 PIN vssio_2
DIRECTION INOUT ; DIRECTION INPUT ;
USE GROUND ; USE GROUND ;
PORT PORT
LAYER met5 ; LAYER met5 ;
RECT 1674.050 5093.120 1734.890 5153.945 ; RECT 1674.050 5093.120 1734.890 5153.945 ;
END END
END vssio_2 END vssio_2
PIN vccd
DIRECTION INPUT ;
USE POWER ;
PORT
LAYER met5 ;
RECT 30.835 350.270 98.100 404.670 ;
END
END vccd
PIN vssd
DIRECTION INPUT ;
USE GROUND ;
PORT
LAYER met5 ;
RECT 1216.330 30.835 1270.730 98.100 ;
END
END vssd
OBS OBS
LAYER li1 ; LAYER li1 ;
RECT 0.220 0.220 3587.780 5187.705 ; RECT 0.220 0.220 3587.780 5187.705 ;