mirror of https://github.com/efabless/caravel.git
update verify_cocotb.py script to collect coverage only when -cov is passed
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@ -14,7 +14,7 @@ from pathlib import Path
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iverilog = True
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vcs = False
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coverage = False
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def go_up(path, n):
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for i in range(n):
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path = os.path.dirname(path)
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@ -93,13 +93,15 @@ class RunTest:
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macros = f'{macros} +define+SIM=\\\"RTL\\\"'
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else:
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print(f"Fatal: incorrect simulation type {self.sim_type}")
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coverage_command = ""
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if coverage:
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coverage_command = "-cm line+tgl+cond+fsm+branch+assert"
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os.environ["TESTCASE"] = f"{self.test_name}"
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os.environ["MODULE"] = f"caravel_tests"
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os.environ["SIM"] = self.sim_type
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os.system(f"vlogan -full64 -sverilog +error+25 caravel_top.sv {dirs} {macros} +define+TESTNAME=\\\"{self.test_name}\\\" +define+FTESTNAME=\\\"{self.sim_type}-{self.test_name}\\\" +define+TAG=\\\"{os.getenv('RUNTAG')}\\\" -l {self.sim_path}/analysis.log -o {self.sim_path} ")
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os.system(f"vcs -cm line+tgl+cond+fsm+branch+assert -R -diag=sdf:verbose +sdfverbose +neg_tchk -debug_access -full64 -l {self.sim_path}/test.log caravel_top -Mdir={self.sim_path}/csrc -o {self.sim_path}/simv +vpi -P pli.tab -load $(cocotb-config --lib-name-path vpi vcs)")
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os.system(f"vcs {coverage_command} -R -diag=sdf:verbose +sdfverbose +neg_tchk -debug_access -full64 -l {self.sim_path}/test.log caravel_top -Mdir={self.sim_path}/csrc -o {self.sim_path}/simv +vpi -P pli.tab -load $(cocotb-config --lib-name-path vpi vcs)")
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self.passed = search_str(self.full_terminal.name,"Test passed with (0)criticals (0)errors")
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Path(f'{self.sim_path}/{self.passed}').touch()
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# os.system("rm AN.DB/ cm.log results.xml ucli.key -rf")
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@ -242,7 +244,8 @@ class RunRegression:
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self.failed_tests +=1
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self.unknown_tests -=1
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self.update_reg_log()
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self.generate_cov()
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if coverage:
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self.generate_cov()
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#TODO: add send mail here
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def generate_cov(self):
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@ -325,10 +328,13 @@ parser.add_argument('-testlist','-tl', help='path of testlist to be run ')
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parser.add_argument('-tag', help='provide tag of the run default would be regression name and if no regression is provided would be run_<random float>_<timestamp>_')
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parser.add_argument('-maxerr', help='max number of errors for every test before simulation breaks default = 3')
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parser.add_argument('-vcs','-v',action='store_true', help='use vcs as compiler if not used iverilog would be used')
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parser.add_argument('-cov','-c',action='store_true', help='enale code coverage')
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args = parser.parse_args()
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if (args.vcs) :
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iverilog = False
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vcs = True
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if args.cov:
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coverage = True
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if args.sim == None:
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args.sim= ["RTL"]
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print(f"regression:{args.regression}, test:{args.test}, testlist:{args.testlist} sim: {args.sim}")
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