diff --git a/manifest b/manifest index f8b88d6e..e2f6339e 100644 --- a/manifest +++ b/manifest @@ -1,9 +1,9 @@ 535d0592c0b1349489b6b86fd5449f9d1d81482e verilog/rtl/__uprj_analog_netlists.v 87735eb5981740ca4d4b48e6b0321c8bb0023800 verilog/rtl/__uprj_netlists.v 684085713662e37a26f9f981d35be7c6c7ff6e9a verilog/rtl/__user_analog_project_wrapper.v -1315c3df4decc1a015ec78dfb7df174eb3a74e9a verilog/rtl/__user_project_gpio_example.v +79cdb50a7dd60f69b63c0b6440b0dea35386387d verilog/rtl/__user_project_gpio_example.v 5f8e2d6670ce912bc209201d23430f62730e2627 verilog/rtl/__user_project_la_example.v -ef356bbc8938fef0c1866a709a3bf846d8c7e1e4 verilog/rtl/__user_project_wrapper.v +f43d11cf1be9d4530d4ac0fa043cb56958041c03 verilog/rtl/__user_project_wrapper.v f93c57988b0044d2bff4470a84b5eddc158f2094 verilog/rtl/caravan.v 1b8dc7f0a4f2196b7c2de926af9c648ebf315f3d verilog/rtl/caravan_netlists.v a3d12a2d2d3596800bec47d1266dce2399a2fcc6 verilog/rtl/caravan_openframe.v diff --git a/verilog/dv/cocotb/tests.json b/verilog/dv/cocotb/tests.json index 308efdf4..d93a6dc8 100644 --- a/verilog/dv/cocotb/tests.json +++ b/verilog/dv/cocotb/tests.json @@ -33,24 +33,48 @@ "GL":["r_gl","push_gl","nightly","weekly","tape_out"], "GL_SDF":["r_sdf","weekly","tape_out"], "description":"configure all gpios as mgmt input using automatic approach firmware and check them"} + ,"gpio_all_i_user" :{"level":0, + "SW":true, + "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], + "GL":["r_gl","push_gl","nightly","weekly","tape_out"], + "GL_SDF":["r_sdf","weekly","tape_out"], + "description":"configure all gpios as user input using automatic approach firmware and check them"} ,"gpio_all_i_pu" :{"level":0, "SW":true, "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], "GL":["r_gl","push_gl","nightly","weekly","tape_out"], "GL_SDF":["r_sdf","weekly","tape_out"], "description":"configure all gpios as mgmt input pull up using automatic approach firmware and check them"} + ,"gpio_all_i_pu_user" :{"level":0, + "SW":true, + "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], + "GL":["r_gl","push_gl","nightly","weekly","tape_out"], + "GL_SDF":["r_sdf","weekly","tape_out"], + "description":"configure all gpios as user input pull up using automatic approach firmware and check them"} ,"gpio_all_i_pd" :{"level":0, "SW":true, "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], "GL":["r_gl","push_gl","nightly","weekly","tape_out"], "GL_SDF":["r_sdf","weekly","tape_out"], "description":"configure all gpios as mgmt input pull down using automatic approach firmware and check them"} + ,"gpio_all_i_pd_user" :{"level":0, + "SW":true, + "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], + "GL":["r_gl","push_gl","nightly","weekly","tape_out"], + "GL_SDF":["r_sdf","weekly","tape_out"], + "description":"configure all gpios as user input pull down using automatic approach firmware and check them"} ,"gpio_all_bidir" :{"level":0, "SW":true, "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], "GL":["r_gl","push_gl","nightly","weekly","tape_out"], "GL_SDF":["r_sdf","weekly","tape_out"], "description":"configure all gpios as mgmt bidir using automatic approach firmware and check them"} + ,"gpio_all_bidir_user" :{"level":0, + "SW":true, + "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], + "GL":["r_gl","push_gl","nightly","weekly","tape_out"], + "GL_SDF":["r_sdf","weekly","tape_out"], + "description":"configure all gpios as user bidir using automatic approach firmware and check them"} ,"bitbang_cpu_all_10" :{"level":0, "SW":true, "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], diff --git a/verilog/dv/cocotb/tests/gpio/gpio.py b/verilog/dv/cocotb/tests/gpio/gpio.py index 388034d2..92bb82c0 100644 --- a/verilog/dv/cocotb/tests/gpio/gpio.py +++ b/verilog/dv/cocotb/tests/gpio/gpio.py @@ -51,7 +51,7 @@ async def gpio_all_o(dut): await wait_reg1(cpu,caravelEnv,0XBB) data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] try send {hex(data_in)} to gpio[31:0]") + cocotb.log.info(f"[TEST] try drive {hex(data_in)} to gpio[31:0]") caravelEnv.drive_gpio_in((31,0),data_in) reg2 =0 await wait_reg1(cpu,caravelEnv,0XFF) @@ -73,47 +73,82 @@ async def gpio_all_o(dut): @cocotb.test() @repot_test async def gpio_all_i(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=44980) + caravelEnv,clock = await test_configure(dut,timeout_cycles=56837) cpu = RiskV(dut) cpu.cpu_force_reset() cpu.cpu_release_reset() - uut = dut.uut await wait_reg1(cpu,caravelEnv,0xAA) cocotb.log.info(f"[TEST] configuration finished") - data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") + data_in = 0xFFFFFFFF + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") caravelEnv.drive_gpio_in((31,0),data_in) await wait_reg1(cpu,caravelEnv,0xBB) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") - data_in = 0xFFA88C5A - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xAAAAAAAA + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") caravelEnv.drive_gpio_in((31,0),data_in) await wait_reg1(cpu,caravelEnv,0xCC) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") - data_in = 0xC9536346 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x55555555 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xDD) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x0 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") caravelEnv.drive_gpio_in((31,0),data_in) await wait_reg1(cpu,caravelEnv,0xD1) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0x3F - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") caravelEnv.drive_gpio_in((37,32),data_in) await wait_reg1(cpu,caravelEnv,0xD2) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[37:32]") + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0x0 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") caravelEnv.drive_gpio_in((37,32),data_in) await wait_reg1(cpu,caravelEnv,0xD3) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[37:32]") + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0x15 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") caravelEnv.drive_gpio_in((37,32),data_in) await wait_reg1(cpu,caravelEnv,0xD4) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[37:32]") + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0x2A - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg2(cpu,caravelEnv,0xFF) + await wait_reg1(cpu,caravelEnv,0XD5) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + caravelEnv.release_gpio((37,0)) + await wait_reg2(cpu,caravelEnv,0XFF) + if caravelEnv.monitor_gpio((37,0)).binstr != "zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz": + cocotb.log.error(f"[TEST] ERROR: firmware can write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") + else: + cocotb.log.info(f"[TEST] [TEST] PASS: firmware cannot write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") cocotb.log.info(f"[TEST] finish") @@ -361,59 +396,59 @@ async def gpio_all_bidir(dut): await wait_reg1(cpu,caravelEnv,0x2A) cocotb.log.info(f"[TEST] configuration finished") data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") caravelEnv.drive_gpio_in((31,0),data_in) await wait_reg1(cpu,caravelEnv,0xBB) if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") else: cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0xFFA88C5A - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") caravelEnv.drive_gpio_in((31,0),data_in) await wait_reg1(cpu,caravelEnv,0xCC) if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") else: cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0xC9536346 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") caravelEnv.drive_gpio_in((31,0),data_in) await wait_reg1(cpu,caravelEnv,0xD1) if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") else: cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0xC9536346 data_in = 0x3F - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") caravelEnv.drive_gpio_in((37,32),data_in) await wait_reg1(cpu,caravelEnv,0xD2) if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") else: cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0xC9536346 data_in = 0x0 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") caravelEnv.drive_gpio_in((37,32),data_in) await wait_reg1(cpu,caravelEnv,0xD3) if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") else: cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0xC9536346 data_in = 0x15 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") caravelEnv.drive_gpio_in((37,32),data_in) await wait_reg1(cpu,caravelEnv,0xD4) if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") else: cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") data_in = 0xC9536346 data_in = 0x2A - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") caravelEnv.drive_gpio_in((37,32),data_in) await wait_reg2(cpu,caravelEnv,0xFF) cocotb.log.info(f"[TEST] finish") diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_bidir_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_bidir_user.c new file mode 100644 index 00000000..19c85ad3 --- /dev/null +++ b/verilog/dv/cocotb/tests/gpio/gpio_all_bidir_user.c @@ -0,0 +1,115 @@ +#include +#include + +#define reg_mprj_userl (*(volatile uint32_t*)0x300FFFF0) +#define reg_mprj_userh (*(volatile uint32_t*)0x300FFFF4) +#define reg_oeb_userl (*(volatile uint32_t*)0x300FFFEC) +#define reg_oeb_userh (*(volatile uint32_t*)0x300FFFE8) + +void main(){ + unsigned int i, j, k; + reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 + reg_debug_1 = 0x0; + reg_debug_2 = 0x0; + reg_hkspi_disable = 1; + + reg_mprj_io_37 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_36 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_35 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_34 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_33 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_32 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_31 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_30 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_29 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_28 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_27 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_26 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_25 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_24 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_23 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_22 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_21 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_20 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_19 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_18 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_17 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_16 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_15 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_14 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_13 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_12 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_11 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_10 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_9 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_8 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_7 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_6 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_5 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_4 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_3 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_2 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_1 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + reg_mprj_io_0 = GPIO_MODE_USER_STD_BIDIRECTIONAL; + + reg_mprj_xfer = 1; + while (reg_mprj_xfer == 1); + reg_oeb_userl = 0x0; + reg_oeb_userh = 0x0; + reg_debug_1 = 0x1A; // try the gpios as output + reg_mprj_userl = 0x0; + reg_mprj_userh = 0x0; + i = 0x20; + for (j = 0; j < 5; j++) { + reg_mprj_userh = i; + reg_debug_2 = 37-j; + reg_mprj_userh = 0x00000000; + reg_debug_2 = 0; + i >>=1; + i |= 0x20; + } + i = 0x80000000; + for (j = 0; j < 32; j++) { + reg_mprj_userh = 0x3f; + reg_mprj_userl = i; + reg_debug_2 = 32-j; + reg_mprj_userh = 0x00; + reg_mprj_userl = 0x00000000; + reg_debug_2 = 0; + i >>=1; + i |= 0x80000000; + } + reg_oeb_userl = 0xFFFFFFFF; + reg_oeb_userh = 0x3F; + reg_mprj_userl =0; + reg_mprj_userh =0; + // test input + reg_debug_1 = 0XAA; // configuration done wait environment to send 0xFFFFFFFF to reg_mprj_userl + while (reg_mprj_userl != 0xFFFFFFFF); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XBB; // configuration done wait environment to send 0xAAAAAAAA to reg_mprj_userl + while (reg_mprj_userl != 0xAAAAAAAA); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XCC; // configuration done wait environment to send 0x55555555 to reg_mprj_userl + while (reg_mprj_userl != 0x55555555); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XDD; // configuration done wait environment to send 0x0 to reg_mprj_userl + while (reg_mprj_userl != 0x0); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XD1; + while (reg_mprj_userh != 0x3F); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD2; + while (reg_mprj_userh != 0x0); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD3; + while (reg_mprj_userh != 0x15); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD4; + while (reg_mprj_userh != 0x2A); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD5; + + + reg_debug_2=0xFF; +} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i.c index 4882b056..dadfaf80 100644 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_i.c +++ b/verilog/dv/cocotb/tests/gpio/gpio_all_i.c @@ -7,7 +7,7 @@ void main(){ reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 reg_debug_1 = 0x0; reg_debug_2 = 0x0; - + reg_hkspi_disable = 1; reg_mprj_io_37 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; reg_mprj_io_36 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; reg_mprj_io_35 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; @@ -51,20 +51,35 @@ void main(){ reg_mprj_xfer = 1; while (reg_mprj_xfer == 1); - reg_debug_1 = 0XAA; // configuration done wait environment to send 0x8F66FD7B to reg_mprj_datal - while (reg_mprj_datal != 0x8F66FD7B); - reg_debug_1 = 0XBB; // configuration done wait environment to send 0xFFA88C5A to reg_mprj_datal - while (reg_mprj_datal != 0xFFA88C5A); - reg_debug_1 = 0XCC; // configuration done wait environment to send 0xC9536346 to reg_mprj_datal - while (reg_mprj_datal != 0xC9536346); + reg_debug_1 = 0XAA; // configuration done wait environment to send 0xFFFFFFFF to reg_mprj_datal + while (reg_mprj_datal != 0xFFFFFFFF); + reg_debug_2 = reg_mprj_datal; + reg_debug_1 = 0XBB; // configuration done wait environment to send 0xAAAAAAAA to reg_mprj_datal + while (reg_mprj_datal != 0xAAAAAAAA); + reg_debug_2 = reg_mprj_datal; + reg_debug_1 = 0XCC; // configuration done wait environment to send 0x55555555 to reg_mprj_datal + while (reg_mprj_datal != 0x55555555); + reg_debug_2 = reg_mprj_datal; + reg_debug_1 = 0XDD; // configuration done wait environment to send 0x0 to reg_mprj_datal + while (reg_mprj_datal != 0x0); + reg_debug_2 = reg_mprj_datal; reg_debug_1 = 0XD1; while (reg_mprj_datah != 0x3F); + reg_debug_2 = reg_mprj_datah; reg_debug_1 = 0XD2; while (reg_mprj_datah != 0x0); + reg_debug_2 = reg_mprj_datah; reg_debug_1 = 0XD3; while (reg_mprj_datah != 0x15); + reg_debug_2 = reg_mprj_datah; reg_debug_1 = 0XD4; while (reg_mprj_datah != 0x2A); + reg_debug_2 = reg_mprj_datah; + reg_debug_1 = 0XD5; + reg_debug_1 = 0XD5; // for delay insertion for release + // trying to inject error by sending data to gpio by firmware where gpios configured as input + reg_mprj_datal = 0x5AE1FFB8; // random number + reg_mprj_datah = 0x1E; // random number reg_debug_2 = 0xFF; } diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pd_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i_pd_user.c new file mode 100644 index 00000000..5614703b --- /dev/null +++ b/verilog/dv/cocotb/tests/gpio/gpio_all_i_pd_user.c @@ -0,0 +1,57 @@ +#include +#include +#include "../bitbang/bitbang_functions.c" + +void main(){ + unsigned int i, j, k; + reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 + reg_debug_1 = 0x0; + reg_debug_2 = 0x0; + reg_hkspi_disable = 1; + reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_35 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_28 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_23 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_11 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; + + reg_mprj_xfer = 1; + while (reg_mprj_xfer == 1); + + reg_debug_1 = 0XAA; // configuration done + + while (true); +} diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pu_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i_pu_user.c new file mode 100644 index 00000000..08442b55 --- /dev/null +++ b/verilog/dv/cocotb/tests/gpio/gpio_all_i_pu_user.c @@ -0,0 +1,63 @@ +#include +#include +#include "../bitbang/bitbang_functions.c" +#define reg_mprj_userl (*(volatile uint32_t*)0x300FFFF0) +#define reg_mprj_userh (*(volatile uint32_t*)0x300FFFF4) +#define reg_oeb_userl (*(volatile uint32_t*)0x300FFFEC) +#define reg_oeb_userh (*(volatile uint32_t*)0x300FFFE8) +void main(){ + unsigned int i, j, k; + reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 + reg_debug_1 = 0x0; + reg_debug_2 = 0x0; + reg_hkspi_disable = 1; + reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_35 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_28 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_23 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_11 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLUP; + reg_mprj_userl = 0xFFFFFFFF; + reg_mprj_userh = 0x3F; + reg_oeb_userl = 0x0; + reg_oeb_userh = 0x0; + reg_mprj_xfer = 1; + while (reg_mprj_xfer == 1); + + reg_debug_1 = 0XAA; // configuration done + + while (true); +} diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c new file mode 100644 index 00000000..f69acd0c --- /dev/null +++ b/verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c @@ -0,0 +1,88 @@ +#include +#include +#include "../bitbang/bitbang_functions.c" + +#define reg_mprj_userl (*(volatile uint32_t*)0x300FFFF0) +#define reg_mprj_userh (*(volatile uint32_t*)0x300FFFF4) + +void main(){ + unsigned int i, j, k; + reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 + reg_debug_1 = 0x0; + reg_debug_2 = 0x0; + reg_hkspi_disable = 1; + reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_35 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_28 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_23 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_11 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_xfer = 1; + while (reg_mprj_xfer == 1); + + reg_debug_1 = 0XAA; // configuration done wait environment to send 0xFFFFFFFF to reg_mprj_userl + while (reg_mprj_userl != 0xFFFFFFFF); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XBB; // configuration done wait environment to send 0xAAAAAAAA to reg_mprj_userl + while (reg_mprj_userl != 0xAAAAAAAA); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XCC; // configuration done wait environment to send 0x55555555 to reg_mprj_userl + while (reg_mprj_userl != 0x55555555); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XDD; // configuration done wait environment to send 0x0 to reg_mprj_userl + while (reg_mprj_userl != 0x0); + reg_debug_2 = reg_mprj_userl; + reg_debug_1 = 0XD1; + while (reg_mprj_userh != 0x3F); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD2; + while (reg_mprj_userh != 0x0); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD3; + while (reg_mprj_userh != 0x15); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD4; + while (reg_mprj_userh != 0x2A); + reg_debug_2 = reg_mprj_userh; + reg_debug_1 = 0XD5; + reg_debug_1 = 0XD5; // for delay insertion for release + // trying to inject error by sending data to gpio by firmware where gpios configured as input + reg_mprj_userl = 0x5AE1FFB8; // random number + reg_mprj_userh = 0x1E; // random number + + reg_debug_2 = 0xFF; +} + diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_o_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_o_user.c index 851b25ea..604b87ed 100644 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_o_user.c +++ b/verilog/dv/cocotb/tests/gpio/gpio_all_o_user.c @@ -4,7 +4,8 @@ // Debug reg DEBUG_ON #define reg_mprj_userl (*(volatile uint32_t*)0x300FFFF0) #define reg_mprj_userh (*(volatile uint32_t*)0x300FFFF4) - +#define reg_oeb_userl (*(volatile uint32_t*)0x300FFFEC) +#define reg_oeb_userh (*(volatile uint32_t*)0x300FFFE8) void main(){ unsigned int i, j, k; reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 @@ -53,7 +54,8 @@ void main(){ reg_mprj_xfer = 1; while (reg_mprj_xfer == 1); - + reg_oeb_userl = 0x0; + reg_oeb_userh = 0x0; reg_debug_1 = 0xAA; // finish configuration reg_mprj_userl = 0x0; reg_mprj_userh = 0x0; @@ -80,7 +82,7 @@ void main(){ // try to give input reg_debug_1 = 0XBB; // configuration done wait environment to send 0x8F66FD7B to reg_mprj_userl - int timeout = 1000; + int timeout = 100; while (reg_mprj_userl != 0x8F66FD7B){ timeout--; if (timeout==0){ diff --git a/verilog/dv/cocotb/tests/gpio/gpio_user.py b/verilog/dv/cocotb/tests/gpio/gpio_user.py index d68dad6a..bf4d5f7f 100644 --- a/verilog/dv/cocotb/tests/gpio/gpio_user.py +++ b/verilog/dv/cocotb/tests/gpio/gpio_user.py @@ -15,7 +15,7 @@ reg = Regs() @cocotb.test() @repot_test async def gpio_all_o_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=376123) + caravelEnv,clock = await test_configure(dut,timeout_cycles=585321) cpu = RiskV(dut) cpu.cpu_force_reset() cpu.cpu_release_reset() @@ -67,3 +67,400 @@ async def gpio_all_o_user(dut): await ClockCycles(caravelEnv.clk, 10) + + +@cocotb.test() +@repot_test +async def gpio_all_i_user(dut): + caravelEnv,clock = await test_configure(dut,timeout_cycles=56694) + cpu = RiskV(dut) + cpu.cpu_force_reset() + cpu.cpu_release_reset() + await wait_reg1(cpu,caravelEnv,0xAA) + cocotb.log.info(f"[TEST] configuration finished") + data_in = 0xFFFFFFFF + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xBB) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xAAAAAAAA + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xCC) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x55555555 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xDD) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x0 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xD1) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x3F + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD2) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x0 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD3) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x15 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD4) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x2A + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0XD5) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + caravelEnv.release_gpio((37,0)) + await wait_reg2(cpu,caravelEnv,0XFF) + if caravelEnv.monitor_gpio((37,0)).binstr != "zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz": + cocotb.log.error(f"[TEST] ERROR: firmware can write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") + else: + cocotb.log.info(f"[TEST] [TEST] PASS: firmware cannot write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") + cocotb.log.info(f"[TEST] finish") + + +@cocotb.test() +@repot_test +async def gpio_all_i_pu_user(dut): + caravelEnv,clock = await test_configure(dut,timeout_cycles=58961,num_error=2000) + await caravelEnv.release_csb() + cpu = RiskV(dut) + cpu.cpu_force_reset() + cpu.cpu_release_reset() + uut = dut.uut + + await wait_reg1(cpu,caravelEnv,0xAA) + # monitor the output of padframe module it suppose to be all ones when no input is applied + await ClockCycles(caravelEnv.clk,100) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i] != "1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and float") + await ClockCycles(caravelEnv.clk,1000) + # drive gpios with zero + data_in = 0x0 + caravelEnv.drive_gpio_in((37,0),data_in) + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i] != "0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with 0") + await ClockCycles(caravelEnv.clk,1000) + # drive gpios with ones + data_in = 0x3FFFFFFFFF + caravelEnv.drive_gpio_in((37,0),data_in) + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i] != "1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with 1") + await ClockCycles(caravelEnv.clk,1000) + # drive odd half gpios with zeros and float other half + data_in = 0x0 + caravelEnv.drive_gpio_in((37,0),data_in) + for i in range(0,38,2): + caravelEnv.release_gpio(i) # release even gpios + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if i%2 ==1: #odd + if gpio[i]!="1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 0") + else: + if gpio[i] != "0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with odd half with 0") + await ClockCycles(caravelEnv.clk,1000) + # drive even half gpios with zeros and float other half + caravelEnv.drive_gpio_in((37,0),data_in) + for i in range(1,38,2): + caravelEnv.release_gpio(i) # release odd gpios + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if i%2 ==1: #odd + if gpio[i] != "0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with even half with 0") + else: + if gpio[i]!="1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 0") + await ClockCycles(caravelEnv.clk,1000) + # drive odd half gpios with ones and float other half + data_in = 0x3FFFFFFFFF + caravelEnv.drive_gpio_in((37,0),data_in) + for i in range(0,38,2): + caravelEnv.release_gpio(i) # release even gpios + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i]!="1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 1") + + await ClockCycles(caravelEnv.clk,1000) + # drive even half gpios with zeros and float other half + caravelEnv.drive_gpio_in((37,0),data_in) + for i in range(1,38,2): + caravelEnv.release_gpio(i) # release odd gpios + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i] != "1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 1") + + await ClockCycles(caravelEnv.clk,1000) + + # drive with zeros then release all gpio + data_in = 0x0 + caravelEnv.drive_gpio_in((37,0),data_in) + await ClockCycles(caravelEnv.clk,1000) + caravelEnv.release_gpio((37,0)) + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i] != "1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and all released") + await ClockCycles(caravelEnv.clk,1000) + + +@cocotb.test() +@repot_test +async def gpio_all_i_pd_user(dut): + caravelEnv,clock = await test_configure(dut,timeout_cycles=58961,num_error=2000) + await caravelEnv.release_csb() + cpu = RiskV(dut) + cpu.cpu_force_reset() + cpu.cpu_release_reset() + uut = dut.uut + + await wait_reg1(cpu,caravelEnv,0xAA) + # monitor the output of padframe module it suppose to be all ones when no input is applied + await ClockCycles(caravelEnv.clk,100) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i] != "0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and float") + await ClockCycles(caravelEnv.clk,1000) + # drive gpios with zero + data_in = 0x0 + caravelEnv.drive_gpio_in((37,0),data_in) + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i] != "0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with 0") + await ClockCycles(caravelEnv.clk,1000) + # drive gpios with ones + data_in = 0x3FFFFFFFFF + caravelEnv.drive_gpio_in((37,0),data_in) + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i] != "1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with 1") + await ClockCycles(caravelEnv.clk,1000) + # drive odd half gpios with zeros and float other half + data_in = 0x0 + caravelEnv.drive_gpio_in((37,0),data_in) + for i in range(0,38,2): + caravelEnv.release_gpio(i) # release even gpios + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i]!="0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 0") + + await ClockCycles(caravelEnv.clk,1000) + # drive even half gpios with zeros and float other half + caravelEnv.drive_gpio_in((37,0),data_in) + for i in range(1,38,2): + caravelEnv.release_gpio(i) # release odd gpios + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i]!="0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with even half with 0") + await ClockCycles(caravelEnv.clk,1000) + # drive odd half gpios with ones and float other half + data_in = 0x3FFFFFFFFF + caravelEnv.drive_gpio_in((37,0),data_in) + for i in range(0,38,2): + caravelEnv.release_gpio(i) # release even gpios + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if i%2 ==0: #even + if gpio[i]!="1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") + else: + if gpio[i] != "0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") + + await ClockCycles(caravelEnv.clk,1000) + # drive even half gpios with zeros and float other half + caravelEnv.drive_gpio_in((37,0),data_in) + for i in range(1,38,2): + caravelEnv.release_gpio(i) # release odd gpios + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if i%2 ==1: #odd + if gpio[i]!="1": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") + else: + if gpio[i] != "0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") + + await ClockCycles(caravelEnv.clk,1000) + + # drive with ones then release all gpio + data_in = 0x3FFFFFFFFF + caravelEnv.drive_gpio_in((37,0),data_in) + await ClockCycles(caravelEnv.clk,1000) + caravelEnv.release_gpio((37,0)) + await ClockCycles(caravelEnv.clk,1000) + gpio = dut.uut.padframe.mprj_io_in.value.binstr + for i in range(38): + if gpio[i] != "0": + cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and all released") + await ClockCycles(caravelEnv.clk,1000) + + + +@cocotb.test() +@repot_test +async def gpio_all_bidir_user(dut): + caravelEnv,clock = await test_configure(dut,timeout_cycles=290455) + cpu = RiskV(dut) + cpu.cpu_force_reset() + cpu.cpu_release_reset() + uut = dut.uut + await wait_reg1(cpu,caravelEnv,0x1A) + cocotb.log.info("[TEST] finish configuring ") + i= 0x20 + for j in range(5): + await wait_reg2(cpu,caravelEnv,37-j) + cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') + if caravelEnv.monitor_gpio((37,0)).integer != i << 32: + cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i << 32)}') + await wait_reg2(cpu,caravelEnv,0) + if caravelEnv.monitor_gpio((37,0)).integer != 0: + cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') + i = i >> 1 + i |= 0x20 + + i= 0x80000000 + for j in range(32): + await wait_reg2(cpu,caravelEnv,32-j) + cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') + if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: + cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') + if caravelEnv.monitor_gpio((31,0)).integer != i : + cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') + await wait_reg2(cpu,caravelEnv,0) + if caravelEnv.monitor_gpio((37,0)).integer != 0: + cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') + + i = i >> 1 + i |= 0x80000000 + caravelEnv.release_gpio((37,0)) + await ClockCycles(caravelEnv.clk, 10) + caravelEnv.drive_gpio_in((31,0),0) + await ClockCycles(caravelEnv.clk, 10) + await wait_reg1(cpu,caravelEnv,0xAA) + cocotb.log.info(f"[TEST] configuration finished") + data_in = 0xFFFFFFFF + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xBB) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xAAAAAAAA + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xCC) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x55555555 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xDD) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x0 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xD1) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x3F + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD2) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x0 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD3) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x15 + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD4) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0x2A + cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0XD5) + + await wait_reg2(cpu,caravelEnv,0XFF) + + cocotb.log.info(f"[TEST] finish") + await ClockCycles(caravelEnv.clk, 10) diff --git a/verilog/dv/cocotb/verify_cocotb.py b/verilog/dv/cocotb/verify_cocotb.py index 71c5958b..f5343482 100755 --- a/verilog/dv/cocotb/verify_cocotb.py +++ b/verilog/dv/cocotb/verify_cocotb.py @@ -75,7 +75,7 @@ class RunTest: os.system(f"docker run -it {env_vars} -v {os.getenv('CARAVEL_ROOT')}:{os.getenv('CARAVEL_ROOT')} -v {os.getenv('MCW_ROOT')}:{os.getenv('MCW_ROOT')} -v {os.getenv('PDK_ROOT')}:{os.getenv('PDK_ROOT')} efabless/dv:cocotb sh -c 'cd {self.cocotb_path} && {command}'") self.passed = search_str(self.full_terminal.name,"Test passed with (0)criticals (0)errors") Path(f'{self.sim_path}/{self.passed}').touch() - + # vcs function def runTest_vcs(self): print(f"Start running test: {self.sim_type}-{self.test_name}") @@ -91,7 +91,7 @@ class RunTest: macros = f'+define+FUNCTIONAL +define+USE_POWER_PINS +define+UNIT_DELAY=#1 +define+MAIN_PATH=\\\"{self.cocotb_path}\\\" +define+VCS ' if self.test_name == "la": macros = f'{macros} +define+LA_TESTING' - if self.test_name == "gpio_all_o_user": + if self.test_name in ["gpio_all_o_user","gpio_all_i_user","gpio_all_i_pu_user","gpio_all_i_pd_user","gpio_all_bidir_user"]: macros = f'{macros} +define+GPIO_TESTING' # shutil.copyfile(f'{self.test_full_dir}/{self.test_name}.hex',f'{self.sim_path}/{self.test_name}.hex') # if os.path.exists(f'{self.test_full_dir}/test_data'): diff --git a/verilog/rtl/__user_project_gpio_example.v b/verilog/rtl/__user_project_gpio_example.v index 4bcdfc39..848a74d4 100644 --- a/verilog/rtl/__user_project_gpio_example.v +++ b/verilog/rtl/__user_project_gpio_example.v @@ -45,26 +45,40 @@ module user_project_gpio_example ( ); reg [31:0] io_l; reg [5:0] io_h; - + reg [31:0] oeb_l; + reg [5:0] oeb_h; always @(posedge wb_clk_i or posedge wb_rst_i) begin if (wb_rst_i) begin io_l <=0; io_h <=0; + oeb_l <=0; + oeb_h <=0; wbs_dat_o <=0; wbs_ack_o <=0; - end else if (wbs_cyc_i && wbs_stb_i && wbs_we_i && !wbs_ack_o && (wbs_adr_i[3:0]==4'h4||wbs_adr_i[3:0]==4'h0))begin // write + + end else if (wbs_cyc_i && wbs_stb_i && wbs_we_i && !wbs_ack_o && (wbs_adr_i[31:0]==32'h300FFFF4||wbs_adr_i[31:0]==32'h300FFFF0||wbs_adr_i[31:0]==32'h300FFFEC||wbs_adr_i[31:0]==32'h300FFFE8))begin // write // write to io_l - io_l[7:0] <= ((wbs_adr_i[3:0]==4'h0) && wbs_sel_i[0])? wbs_dat_i[7:0] :io_l[7:0]; - io_l[15:8] <= ((wbs_adr_i[3:0]==4'h0) && wbs_sel_i[1])? wbs_dat_i[15:8] :io_l[15:8]; - io_l[23:16] <= ((wbs_adr_i[3:0]==4'h0) && wbs_sel_i[2])? wbs_dat_i[23:16] :io_l[23:16]; - io_l[31:24] <= ((wbs_adr_i[3:0]==4'h0) && wbs_sel_i[3])? wbs_dat_i[31:24] :io_l[31:24]; + io_l[7:0] <= ((wbs_adr_i[31:0]==32'h300FFFF0) && wbs_sel_i[0])? wbs_dat_i[7:0] :io_l[7:0]; + io_l[15:8] <= ((wbs_adr_i[31:0]==32'h300FFFF0) && wbs_sel_i[1])? wbs_dat_i[15:8] :io_l[15:8]; + io_l[23:16] <= ((wbs_adr_i[31:0]==32'h300FFFF0) && wbs_sel_i[2])? wbs_dat_i[23:16] :io_l[23:16]; + io_l[31:24] <= ((wbs_adr_i[31:0]==32'h300FFFF0) && wbs_sel_i[3])? wbs_dat_i[31:24] :io_l[31:24]; // io_h - io_h[5:0] <= ((wbs_adr_i[3:0]==4'h4) && wbs_sel_i[0])? wbs_dat_i[5:0] :io_h[5:0]; + io_h[5:0] <= ((wbs_adr_i[31:0]==32'h300FFFF4) && wbs_sel_i[0])? wbs_dat_i[5:0] :io_h[5:0]; + // oeb_l + oeb_l[7:0] <= ((wbs_adr_i[31:0]==32'h300FFFEC) && wbs_sel_i[0])? wbs_dat_i[7:0] :oeb_l[7:0]; + oeb_l[15:8] <= ((wbs_adr_i[31:0]==32'h300FFFEC) && wbs_sel_i[1])? wbs_dat_i[15:8] :oeb_l[15:8]; + oeb_l[23:16] <= ((wbs_adr_i[31:0]==32'h300FFFEC) && wbs_sel_i[2])? wbs_dat_i[23:16] :oeb_l[23:16]; + oeb_l[31:24] <= ((wbs_adr_i[31:0]==32'h300FFFEC) && wbs_sel_i[3])? wbs_dat_i[31:24] :oeb_l[31:24]; + // oeb_h + oeb_h[7:0] <= ((wbs_adr_i[31:0]==32'h300FFFE8) && wbs_sel_i[0])? wbs_dat_i[7:0] :oeb_h[7:0]; + oeb_h[15:8] <= ((wbs_adr_i[31:0]==32'h300FFFE8) && wbs_sel_i[1])? wbs_dat_i[15:8] :oeb_h[15:8]; + oeb_h[23:16] <= ((wbs_adr_i[31:0]==32'h300FFFE8) && wbs_sel_i[2])? wbs_dat_i[23:16] :oeb_h[23:16]; + oeb_h[31:24] <= ((wbs_adr_i[31:0]==32'h300FFFE8) && wbs_sel_i[3])? wbs_dat_i[31:24] :oeb_h[31:24]; wbs_ack_o <= 1; - end else if (wbs_cyc_i && wbs_stb_i && !wbs_we_i && !wbs_ack_o && (wbs_adr_i[3:0]==4'h4||wbs_adr_i[3:0]==4'h0)) begin // read - wbs_dat_o <= (wbs_adr_i[3:0]==4'h0)? io_in[31:0] : io_in[`MPRJ_IO_PADS-1:32]; + end else if (wbs_cyc_i && wbs_stb_i && !wbs_we_i && !wbs_ack_o && (wbs_adr_i[31:0]==32'h300FFFF4||wbs_adr_i[31:0]==32'h300FFFF0||wbs_adr_i[31:0]==32'h300FFFEC||wbs_adr_i[31:0]==32'h300FFFE8)) begin // read + wbs_dat_o <= (wbs_adr_i[31:0]==32'h300FFFF0)? io_in[31:0] :(wbs_adr_i[31:0]==32'h300FFFF4)? io_in[`MPRJ_IO_PADS-1:32] : (wbs_adr_i[31:0]==32'h300FFFEC) ? io_oeb[31:0]: io_oeb[37:32]; wbs_ack_o <= 1; end else begin wbs_ack_o <= 0; @@ -73,7 +87,7 @@ module user_project_gpio_example ( end assign io_out = {io_h,io_l}; - assign io_oeb = 38'h0; + assign io_oeb = {oeb_h,oeb_l}; endmodule diff --git a/verilog/rtl/__user_project_wrapper.v b/verilog/rtl/__user_project_wrapper.v index bda6291a..2f14781e 100644 --- a/verilog/rtl/__user_project_wrapper.v +++ b/verilog/rtl/__user_project_wrapper.v @@ -108,42 +108,42 @@ wire [31:0] wbs_dat_o_gpio; wire [31:0] wbs_dat_o_debug; // reserve the last 2 regs for debugging registers -`ifndef GPIO_TESTING +// `ifndef GPIO_TESTING assign wbs_cyc_i_user = (wbs_adr_i[31:3] != 29'h601FFFF) ? wbs_cyc_i : 0; assign wbs_cyc_i_debug = (wbs_adr_i[31:3] == 29'h601FFFF) ? wbs_cyc_i : 0; -`endif +// `endif -`ifndef GPIO_TESTING -assign wbs_ack_o = (wbs_adr_i[31:3] == 28'h601FFFF) ? wbs_ack_o_debug : wbs_ack_o_debug; +// `ifndef GPIO_TESTING +assign wbs_ack_o = (wbs_adr_i[31:3] == 28'h601FFFF) ? wbs_ack_o_debug : wbs_ack_o_user; assign wbs_dat_o = (wbs_adr_i[31:3] == 28'h601FFFF) ? wbs_dat_o_debug : wbs_dat_o_user; -`endif +// `endif -// reserve the last 4 regs for debugging registers in case of user gpio testing -`ifdef GPIO_TESTING -assign wbs_cyc_i_user = (wbs_adr_i[31:4] != 28'h300FFFF) ? wbs_cyc_i : 0; -assign wbs_cyc_i_debug = (wbs_adr_i[31:4] == 28'h300FFFF) ? wbs_cyc_i : 0; -`endif +// // reserve the last 4 regs for debugging registers in case of user gpio testing +// `ifdef GPIO_TESTING +// assign wbs_cyc_i_user = (wbs_adr_i[31:4] != 28'h300FFFF) ? wbs_cyc_i : 0; +// assign wbs_cyc_i_debug = (wbs_adr_i[31:4] == 28'h300FFFF) ? wbs_cyc_i : 0; +// `endif -`ifdef GPIO_TESTING -assign wbs_ack_o = (wbs_adr_i[31:4] == 28'h300FFFF) ? (wbs_adr_i[3:0]>=4'h8) ? wbs_ack_o_debug : wbs_ack_o_gpio : wbs_ack_o_debug; -assign wbs_dat_o = (wbs_adr_i[31:4] == 28'h300FFFF) ? (wbs_adr_i[3:0]>=4'h8) ? wbs_dat_o_debug : wbs_dat_o_gpio : wbs_dat_o_user; -`endif +// `ifdef GPIO_TESTING +// assign wbs_ack_o = (wbs_adr_i[31:4] == 28'h300FFFF) ? (wbs_adr_i[3:0]>=4'h8) ? wbs_ack_o_debug : wbs_ack_o_gpio : wbs_ack_o_debug; +// assign wbs_dat_o = (wbs_adr_i[31:4] == 28'h300FFFF) ? (wbs_adr_i[3:0]>=4'h8) ? wbs_dat_o_debug : wbs_dat_o_gpio : wbs_dat_o_user; +// `endif `ifdef GPIO_TESTING user_project_gpio_example gpio_testing( .wb_clk_i(wb_clk_i), .wb_rst_i(wb_rst_i), - .wbs_cyc_i(wbs_cyc_i_debug), + .wbs_cyc_i(wbs_cyc_i_user), .wbs_stb_i(wbs_stb_i), .wbs_we_i(wbs_we_i), .wbs_sel_i(wbs_sel_i), .wbs_adr_i(wbs_adr_i), .wbs_dat_i(wbs_dat_i), - .wbs_ack_o(wbs_ack_o_gpio), - .wbs_dat_o(wbs_dat_o_gpio), + .wbs_ack_o(wbs_ack_o_user), + .wbs_dat_o(wbs_dat_o_user), .io_in(io_in), .io_out(io_out), .io_oeb(io_oeb));