mirror of https://github.com/efabless/caravel.git
reharden: digital_pll
~ reimplement digital_pll using updated RTL ~ changes in config to generate same PDN ~ change deprecated variables
This commit is contained in:
kareem
parent
bb2d983e03
commit
0eed96f33f
12036
def/digital_pll.def
12036
def/digital_pll.def
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@ -8,28 +8,20 @@ MACRO digital_pll
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ORIGIN 0.000 0.000 ;
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SIZE 75.000 BY 75.000 ;
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PIN VGND
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DIRECTION INPUT ;
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DIRECTION INOUT ;
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USE GROUND ;
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PORT
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LAYER met5 ;
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RECT 5.520 41.050 69.460 42.650 ;
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END
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PORT
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LAYER met4 ;
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RECT 41.040 5.200 42.640 68.240 ;
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END
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PORT
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LAYER met5 ;
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RECT 5.280 41.050 69.700 42.650 ;
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END
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END VGND
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PIN VPWR
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DIRECTION INPUT ;
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DIRECTION INOUT ;
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USE POWER ;
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PORT
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LAYER met5 ;
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RECT 5.520 21.050 69.460 22.650 ;
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END
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PORT
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LAYER met5 ;
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RECT 5.520 61.050 69.460 62.650 ;
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END
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PORT
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LAYER met4 ;
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RECT 21.040 5.200 22.640 68.240 ;
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@ -38,6 +30,14 @@ MACRO digital_pll
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LAYER met4 ;
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RECT 61.040 5.200 62.640 68.240 ;
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END
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PORT
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LAYER met5 ;
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RECT 5.280 21.050 69.700 22.650 ;
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END
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PORT
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LAYER met5 ;
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RECT 5.280 61.050 69.700 62.650 ;
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END
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END VPWR
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PIN clockp[0]
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DIRECTION OUTPUT TRISTATE ;
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@ -339,7 +339,7 @@ MACRO digital_pll
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LAYER li1 ;
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RECT 5.520 5.355 69.460 68.085 ;
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LAYER met1 ;
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RECT 2.830 5.200 72.150 68.980 ;
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RECT 2.830 4.460 72.150 69.320 ;
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LAYER met2 ;
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RECT 3.410 70.720 8.090 72.605 ;
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RECT 8.930 70.720 14.070 72.605 ;
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37070
mag/digital_pll.mag
37070
mag/digital_pll.mag
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@ -1,11 +1,11 @@
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magic
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tech sky130A
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magscale 1 2
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timestamp 1638875309
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timestamp 1665667072
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<< obsli1 >>
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rect 1104 1071 13892 13617
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<< obsm1 >>
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rect 566 1040 14430 13796
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rect 566 892 14430 13864
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<< metal2 >>
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rect 570 14200 626 15000
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rect 1674 14200 1730 15000
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@ -107,22 +107,22 @@ rect 4208 1040 4528 13648
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rect 8208 1040 8528 13648
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rect 12208 1040 12528 13648
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<< metal5 >>
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rect 1104 12210 13892 12530
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rect 1104 8210 13892 8530
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rect 1104 4210 13892 4530
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rect 1056 12210 13940 12530
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rect 1056 8210 13940 8530
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rect 1056 4210 13940 4530
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<< labels >>
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rlabel metal5 s 1104 8210 13892 8530 6 VGND
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port 1 nsew ground input
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rlabel metal4 s 8208 1040 8528 13648 6 VGND
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port 1 nsew ground input
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rlabel metal5 s 1104 4210 13892 4530 6 VPWR
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port 2 nsew power input
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rlabel metal5 s 1104 12210 13892 12530 6 VPWR
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port 2 nsew power input
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port 1 nsew ground bidirectional
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rlabel metal5 s 1056 8210 13940 8530 6 VGND
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port 1 nsew ground bidirectional
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rlabel metal4 s 4208 1040 4528 13648 6 VPWR
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port 2 nsew power input
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port 2 nsew power bidirectional
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rlabel metal4 s 12208 1040 12528 13648 6 VPWR
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port 2 nsew power input
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port 2 nsew power bidirectional
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rlabel metal5 s 1056 4210 13940 4530 6 VPWR
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port 2 nsew power bidirectional
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rlabel metal5 s 1056 12210 13940 12530 6 VPWR
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port 2 nsew power bidirectional
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rlabel metal3 s 0 416 800 536 6 clockp[0]
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port 3 nsew signal output
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rlabel metal3 s 0 1232 800 1352 6 clockp[1]
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@ -198,11 +198,11 @@ port 38 nsew signal input
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rlabel metal2 s 3698 0 3754 800 6 resetb
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port 39 nsew signal input
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<< properties >>
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string LEFclass BLOCK
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string FIXED_BBOX 0 0 15000 15000
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string LEFclass BLOCK
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string LEFview TRUE
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string GDS_FILE ../gds/digital_pll.gds
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string GDS_END 1091926
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string GDS_START 342938
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string GDS_END 1139226
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string GDS_FILE /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.magic.gds
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string GDS_START 323722
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<< end >>
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@ -21,8 +21,8 @@ puts "\[INFO\]: Setting timing derate to: [expr {$::env(SYNTH_TIMING_DERATE) * 1
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set_timing_derate -early [expr {1-$::env(SYNTH_TIMING_DERATE)}]
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set_timing_derate -late [expr {1+$::env(SYNTH_TIMING_DERATE)}]
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puts "\[INFO\]: Setting clock uncertainity to: $::env(SYNTH_CLOCK_UNCERTAINITY)"
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set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINITY) [get_clocks {pll_control_clock}]
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puts "\[INFO\]: Setting clock uncertainity to: $::env(SYNTH_CLOCK_UNCERTAINTY)"
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set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINTY) [get_clocks {pll_control_clock}]
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puts "\[INFO\]: Setting clock transition to: $::env(SYNTH_CLOCK_TRANSITION)"
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set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks {pll_control_clock}]
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@ -12,13 +12,10 @@
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# SPDX-License-Identifier: Apache-2.0
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set script_dir [file dirname [file normalize [info script]]]
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set ::env(DESIGN_NAME) digital_pll
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set ::env(DESIGN_IS_CORE) 1
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set ::env(VERILOG_FILES) $script_dir/../../verilog/rtl/digital_pll.v
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set ::env(VERILOG_FILES) $::env(DESIGN_DIR)/../../verilog/rtl/digital_pll.v
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set ::env(CLOCK_PORT) ""
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set ::env(CLOCK_TREE_SYNTH) 0
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@ -29,10 +26,10 @@ set ::env(SYNTH_MAX_FANOUT) 6
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set ::env(SYNTH_BUFFERING) 0
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set ::env(SYNTH_SIZING) 0
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set ::env(BASE_SDC_FILE) $script_dir/base.sdc
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set ::env(BASE_SDC_FILE) $::env(DESIGN_DIR)/base.sdc
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## Floorplan
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set ::env(FP_PIN_ORDER_CFG) $script_dir/pin_order.cfg
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set ::env(FP_DEF_TEMPLATE) $::env(DESIGN_DIR)/template/digital_pll.def
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set ::env(FP_SIZING) absolute
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set ::env(DIE_AREA) "0 0 75 75"
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@ -40,23 +37,29 @@ set ::env(DIE_AREA) "0 0 75 75"
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set ::env(TOP_MARGIN_MULT) 2
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set ::env(BOTTOM_MARGIN_MULT) 2
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set ::env(CELL_PAD) 0
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set ::env(DIODE_PADDING) 0
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set ::env(DPL_CELL_PADDING) 0
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set ::env(DRT_CELL_PADDING) 0
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## PDN
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set ::env(FP_PDN_VPITCH) 40
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set ::env(FP_PDN_HPITCH) 40
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set ::env(FP_PDN_HOFFSET) 16.41
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set ::env(FP_PDN_HSPACING) 18.4
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set ::env(FP_PDN_VSPACING) 18.4
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## Placement
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set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) 0
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set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) 0
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set ::env(PL_TARGET_DENSITY) 0.82
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set ::env(PL_TARGET_DENSITY) 0.9
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## Routing
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set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) 0
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set ::env(GLB_RT_ADJUSTMENT) 0
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set ::env(GLB_RT_MINLAYER) 2
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set ::env(GLB_RT_MAXLAYER) 6
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set ::env(GRT_ADJUSTMENT) 0
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## Diode Insertion
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set ::env(DIODE_INSERTION_STRATEGY) "4"
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set ::env(STA_WRITE_LIB) 0
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set ::env(FP_PDN_SKIPTRIM) 1
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File diff suppressed because it is too large
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5911
sdf/digital_pll.sdf
5911
sdf/digital_pll.sdf
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -1 +1 @@
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openlane 2021.11.23_01.42.34-11-g0c24fcf
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OpenLane e3a5189a1b0fc4290686fcf2ae46cd6d7947cf9f
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@ -1,3 +1 @@
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openlane cbb562bd43c5c410b1b498604803c3dd88a44856
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skywater-pdk c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
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open_pdks c5730b574461889c82858b08d12ba42423d9c2cb
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open_pdks de752ec0ba4da0ecb1fbcd309eeec4993d88f5bc
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@ -0,0 +1,2 @@
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design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
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/home/kareem_farid/caravel/openlane/digital_pll,digital_pll,22_10_13_06_16,flow completed,0h1m15s0ms,0h0m54s0ms,-2.0,0.005625,-1,88.14,510.45,-1,0,0,0,0,0,0,0,-1,-1,0,-1,6696,2403,0.0,0.0,-1,0.0,0.0,0.0,0.0,-1,0.0,0.0,4104199.0,0.0,28.99,27.61,0.0,0.0,0.0,580,776,121,305,0,0,0,614,5,3,17,11,297,19,12,27,56,70,11,46,50,0,96,4000.0864,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10.0,AREA 0,6,50,1,40,40,0.9,0,sky130_fd_sc_hd,4
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@ -0,0 +1,40 @@
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OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
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This program is licensed under the BSD-3 license. See the LICENSE file for details.
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Components of this program may be licensed under more restrictive licenses which must be honored.
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[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.min.lef
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[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
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The LEF parser will ignore this statement.
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To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.min.lef at line 930.
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[INFO ODB-0223] Created 13 technology layers
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[INFO ODB-0224] Created 25 technology vias
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[INFO ODB-0225] Created 441 library cells
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[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.min.lef
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[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
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[INFO ODB-0128] Design: digital_pll
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[INFO ODB-0130] Created 39 pins.
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[INFO ODB-0131] Created 621 components and 3575 component-terminals.
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[INFO ODB-0132] Created 2 special nets and 2384 connections.
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[INFO ODB-0133] Created 333 nets and 1190 connections.
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[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
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Using RCX ruleset '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre'...
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[INFO RCX-0431] Defined process_corner X with ext_model_index 0
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[INFO RCX-0029] Defined extraction corner X
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[INFO RCX-0008] extracting parasitics of digital_pll ...
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[INFO RCX-0435] Reading extraction model file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.min.calibre ...
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[INFO RCX-0436] RC segment generation digital_pll (max_merge_res 50.0) ...
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[INFO RCX-0040] Final 1448 rc segments
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[INFO RCX-0439] Coupling Cap extraction digital_pll ...
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[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.
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[INFO RCX-0043] 2563 wires to be extracted
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[INFO RCX-0442] 51% completion -- 1327 wires have been extracted
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[INFO RCX-0442] 100% completion -- 2563 wires have been extracted
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[INFO RCX-0045] Extract 333 nets, 1781 rsegs, 1781 caps, 2860 ccs
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[INFO RCX-0015] Finished extracting digital_pll.
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Writing result to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/mca/process_corner_min/digital_pll.spef...
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Setting global connections for newly added cells...
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[WARNING] Did not save OpenROAD database!
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Writing extracted parasitics to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/mca/process_corner_min/digital_pll.spef...
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[INFO RCX-0016] Writing SPEF ...
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[INFO RCX-0443] 333 nets finished
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[INFO RCX-0017] Finished writing SPEF ...
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,40 @@
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OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
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This program is licensed under the BSD-3 license. See the LICENSE file for details.
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Components of this program may be licensed under more restrictive licenses which must be honored.
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[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.max.lef
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[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
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The LEF parser will ignore this statement.
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To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.max.lef at line 930.
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[INFO ODB-0223] Created 13 technology layers
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[INFO ODB-0224] Created 25 technology vias
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[INFO ODB-0225] Created 441 library cells
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[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.max.lef
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[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
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[INFO ODB-0128] Design: digital_pll
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[INFO ODB-0130] Created 39 pins.
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[INFO ODB-0131] Created 621 components and 3575 component-terminals.
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[INFO ODB-0132] Created 2 special nets and 2384 connections.
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[INFO ODB-0133] Created 333 nets and 1190 connections.
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[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
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Using RCX ruleset '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre'...
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[INFO RCX-0431] Defined process_corner X with ext_model_index 0
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[INFO RCX-0029] Defined extraction corner X
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[INFO RCX-0008] extracting parasitics of digital_pll ...
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[INFO RCX-0435] Reading extraction model file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.max.calibre ...
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[INFO RCX-0436] RC segment generation digital_pll (max_merge_res 50.0) ...
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[INFO RCX-0040] Final 1769 rc segments
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[INFO RCX-0439] Coupling Cap extraction digital_pll ...
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[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.
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[INFO RCX-0043] 2563 wires to be extracted
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[INFO RCX-0442] 51% completion -- 1327 wires have been extracted
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[INFO RCX-0442] 100% completion -- 2563 wires have been extracted
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[INFO RCX-0045] Extract 333 nets, 2102 rsegs, 2102 caps, 2900 ccs
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[INFO RCX-0015] Finished extracting digital_pll.
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Writing result to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/mca/process_corner_max/digital_pll.spef...
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Setting global connections for newly added cells...
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[WARNING] Did not save OpenROAD database!
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Writing extracted parasitics to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/mca/process_corner_max/digital_pll.spef...
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[INFO RCX-0016] Writing SPEF ...
|
||||
[INFO RCX-0443] 333 nets finished
|
||||
[INFO RCX-0017] Finished writing SPEF ...
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,40 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef
|
||||
[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
|
||||
The LEF parser will ignore this statement.
|
||||
To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef at line 930.
|
||||
|
||||
[INFO ODB-0223] Created 13 technology layers
|
||||
[INFO ODB-0224] Created 25 technology vias
|
||||
[INFO ODB-0225] Created 441 library cells
|
||||
[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef
|
||||
[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
|
||||
[INFO ODB-0128] Design: digital_pll
|
||||
[INFO ODB-0130] Created 39 pins.
|
||||
[INFO ODB-0131] Created 621 components and 3575 component-terminals.
|
||||
[INFO ODB-0132] Created 2 special nets and 2384 connections.
|
||||
[INFO ODB-0133] Created 333 nets and 1190 connections.
|
||||
[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
|
||||
Using RCX ruleset '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre'...
|
||||
[INFO RCX-0431] Defined process_corner X with ext_model_index 0
|
||||
[INFO RCX-0029] Defined extraction corner X
|
||||
[INFO RCX-0008] extracting parasitics of digital_pll ...
|
||||
[INFO RCX-0435] Reading extraction model file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/rules.openrcx.sky130A.nom.calibre ...
|
||||
[INFO RCX-0436] RC segment generation digital_pll (max_merge_res 50.0) ...
|
||||
[INFO RCX-0040] Final 1460 rc segments
|
||||
[INFO RCX-0439] Coupling Cap extraction digital_pll ...
|
||||
[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.
|
||||
[INFO RCX-0043] 2563 wires to be extracted
|
||||
[INFO RCX-0442] 51% completion -- 1327 wires have been extracted
|
||||
[INFO RCX-0442] 100% completion -- 2563 wires have been extracted
|
||||
[INFO RCX-0045] Extract 333 nets, 1793 rsegs, 1793 caps, 2864 ccs
|
||||
[INFO RCX-0015] Finished extracting digital_pll.
|
||||
Writing result to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/mca/process_corner_nom/digital_pll.spef...
|
||||
Setting global connections for newly added cells...
|
||||
[WARNING] Did not save OpenROAD database!
|
||||
Writing extracted parasitics to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/mca/process_corner_nom/digital_pll.spef...
|
||||
[INFO RCX-0016] Writing SPEF ...
|
||||
[INFO RCX-0443] 333 nets finished
|
||||
[INFO RCX-0017] Finished writing SPEF ...
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,5 @@
|
|||
|
||||
===========================================================================
|
||||
report_design_area
|
||||
============================================================================
|
||||
Design area 3616 u^2 90% utilization.
|
||||
|
|
@ -0,0 +1 @@
|
|||
SKIPPED!
|
||||
|
|
@ -0,0 +1,666 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.odb
|
||||
min_report
|
||||
|
||||
===========================================================================
|
||||
report_checks -path_delay min (Hold)
|
||||
============================================================================
|
||||
Startpoint: _394_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _395_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _394_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.04 0.33 0.34 ^ _394_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
1 0.00 pll_control.oscbuf[0] (net)
|
||||
0.04 0.00 0.34 ^ _395_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.34 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _395_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.34 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.11 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _395_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _396_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _395_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.12 0.41 0.41 ^ _395_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.02 pll_control.oscbuf[1] (net)
|
||||
0.12 0.00 0.41 ^ _396_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.41 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _396_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.04 0.21 library hold time
|
||||
0.21 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.21 data required time
|
||||
-0.41 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.20 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _379_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _379_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _379_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.06 0.36 0.36 ^ _379_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.01 pll_control.prep[0] (net)
|
||||
0.06 0.00 0.36 ^ _287_/A (sky130_fd_sc_hd__or2_2)
|
||||
0.03 0.09 0.46 ^ _287_/X (sky130_fd_sc_hd__or2_2)
|
||||
1 0.00 _023_ (net)
|
||||
0.03 0.00 0.46 ^ _379_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.46 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _379_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.02 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.46 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _381_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _381_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _381_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.05 0.35 0.35 ^ _381_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
2 0.01 pll_control.prep[2] (net)
|
||||
0.05 0.00 0.35 ^ _285_/A1 (sky130_fd_sc_hd__mux2_1)
|
||||
0.04 0.11 0.46 ^ _285_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _025_ (net)
|
||||
0.04 0.00 0.46 ^ _381_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.46 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _381_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.46 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.24 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _380_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _380_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _380_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.06 0.35 0.36 ^ _380_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.01 pll_control.prep[1] (net)
|
||||
0.06 0.00 0.36 ^ _286_/A0 (sky130_fd_sc_hd__mux2_1)
|
||||
0.04 0.11 0.47 ^ _286_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _024_ (net)
|
||||
0.04 0.00 0.47 ^ _380_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.47 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _380_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.47 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.24 slack (MET)
|
||||
|
||||
|
||||
min_report_end
|
||||
max_report
|
||||
|
||||
===========================================================================
|
||||
report_checks -path_delay max (Setup)
|
||||
============================================================================
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _392_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _260_/S (sky130_fd_sc_hd__mux2_1)
|
||||
0.06 0.35 3.99 v _260_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _036_ (net)
|
||||
0.06 0.00 3.99 v _392_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.99 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _392_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.11 6.31 library setup time
|
||||
6.31 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.31 data required time
|
||||
-3.99 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.32 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _388_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _270_/S (sky130_fd_sc_hd__mux2_1)
|
||||
0.05 0.34 3.98 v _270_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _032_ (net)
|
||||
0.05 0.00 3.98 v _388_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.98 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _388_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.11 6.31 library setup time
|
||||
6.31 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.31 data required time
|
||||
-3.98 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.34 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _391_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _262_/S (sky130_fd_sc_hd__mux2_1)
|
||||
0.05 0.34 3.98 v _262_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _035_ (net)
|
||||
0.05 0.00 3.98 v _391_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.98 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _391_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.11 6.31 library setup time
|
||||
6.31 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.31 data required time
|
||||
-3.98 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.34 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _390_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _264_/C1 (sky130_fd_sc_hd__o211a_2)
|
||||
0.05 0.17 3.80 v _264_/X (sky130_fd_sc_hd__o211a_2)
|
||||
1 0.01 _123_ (net)
|
||||
0.05 0.00 3.80 v _265_/B (sky130_fd_sc_hd__xnor2_2)
|
||||
0.05 0.13 3.94 v _265_/Y (sky130_fd_sc_hd__xnor2_2)
|
||||
1 0.00 _034_ (net)
|
||||
0.05 0.00 3.94 v _390_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.94 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _390_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.32 library setup time
|
||||
6.32 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.32 data required time
|
||||
-3.94 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.38 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _393_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.64 v _257_/A2 (sky130_fd_sc_hd__o22a_2)
|
||||
0.03 0.25 3.89 v _257_/X (sky130_fd_sc_hd__o22a_2)
|
||||
1 0.00 _037_ (net)
|
||||
0.03 0.00 3.89 v _393_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.89 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _393_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.32 library setup time
|
||||
6.32 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.32 data required time
|
||||
-3.89 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.43 slack (MET)
|
||||
|
||||
|
||||
max_report_end
|
||||
check_report
|
||||
|
||||
===========================================================================
|
||||
report_checks -unconstrained
|
||||
============================================================================
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _392_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _260_/S (sky130_fd_sc_hd__mux2_1)
|
||||
0.06 0.35 3.99 v _260_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _036_ (net)
|
||||
0.06 0.00 3.99 v _392_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.99 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _392_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.11 6.31 library setup time
|
||||
6.31 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.31 data required time
|
||||
-3.99 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.32 slack (MET)
|
||||
|
||||
|
||||
|
||||
===========================================================================
|
||||
report_checks --slack_max -0.01
|
||||
============================================================================
|
||||
No paths found.
|
||||
check_report_end
|
||||
check_slew
|
||||
|
||||
===========================================================================
|
||||
report_check_types -max_slew -max_cap -max_fanout -violators
|
||||
============================================================================
|
||||
max fanout
|
||||
|
||||
Pin Limit Fanout Slack
|
||||
---------------------------------------------------------
|
||||
dco 6 108 -102 (VIOLATED)
|
||||
_355_/Y 6 25 -19 (VIOLATED)
|
||||
ringosc.ibufp01/Y 6 24 -18 (VIOLATED)
|
||||
_227_/X 6 13 -7 (VIOLATED)
|
||||
_393_/Q 6 11 -5 (VIOLATED)
|
||||
_292_/Y 6 10 -4 (VIOLATED)
|
||||
_390_/Q 6 10 -4 (VIOLATED)
|
||||
_181_/Y 6 9 -3 (VIOLATED)
|
||||
_228_/X 6 9 -3 (VIOLATED)
|
||||
_243_/X 6 8 -2 (VIOLATED)
|
||||
_293_/X 6 8 -2 (VIOLATED)
|
||||
_382_/Q 6 8 -2 (VIOLATED)
|
||||
_391_/Q 6 8 -2 (VIOLATED)
|
||||
_392_/Q 6 8 -2 (VIOLATED)
|
||||
_241_/Y 6 7 (VIOLATED)
|
||||
|
||||
|
||||
===========================================================================
|
||||
max slew violation count 0
|
||||
max fanout violation count 15
|
||||
max cap violation count 0
|
||||
============================================================================
|
||||
check_slew_end
|
||||
tns_report
|
||||
|
||||
===========================================================================
|
||||
report_tns
|
||||
============================================================================
|
||||
tns 0.00
|
||||
tns_report_end
|
||||
wns_report
|
||||
|
||||
===========================================================================
|
||||
report_wns
|
||||
============================================================================
|
||||
wns 0.00
|
||||
wns_report_end
|
||||
worst_slack
|
||||
|
||||
===========================================================================
|
||||
report_worst_slack -max (Setup)
|
||||
============================================================================
|
||||
worst slack 2.32
|
||||
|
||||
===========================================================================
|
||||
report_worst_slack -min (Hold)
|
||||
============================================================================
|
||||
worst slack 0.11
|
||||
worst_slack_end
|
||||
power_report
|
||||
|
||||
===========================================================================
|
||||
report_power
|
||||
============================================================================
|
||||
Group Internal Switching Leakage Total
|
||||
Power Power Power Power (Watts)
|
||||
----------------------------------------------------------------
|
||||
Sequential 1.48e-04 2.06e-05 1.84e-10 1.69e-04 32.4%
|
||||
Combinational 1.55e-04 1.96e-04 1.24e-09 3.51e-04 67.6%
|
||||
Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
||||
Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
||||
----------------------------------------------------------------
|
||||
Total 3.03e-04 2.17e-04 1.42e-09 5.20e-04 100.0%
|
||||
58.3% 41.7% 0.0%
|
||||
power_report_end
|
||||
area_report
|
||||
|
||||
===========================================================================
|
||||
report_design_area
|
||||
============================================================================
|
||||
Design area 3616 u^2 90% utilization.
|
||||
area_report_end
|
||||
Setting global connections for newly added cells...
|
||||
[WARNING] Did not save OpenROAD database!
|
||||
Writing SDF to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/mca/process_corner_nom/digital_pll.sdf...
|
||||
|
|
@ -0,0 +1,322 @@
|
|||
|
||||
===========================================================================
|
||||
report_checks -path_delay max (Setup)
|
||||
============================================================================
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _392_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _260_/S (sky130_fd_sc_hd__mux2_1)
|
||||
0.06 0.35 3.99 v _260_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _036_ (net)
|
||||
0.06 0.00 3.99 v _392_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.99 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _392_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.11 6.31 library setup time
|
||||
6.31 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.31 data required time
|
||||
-3.99 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.32 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _388_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _270_/S (sky130_fd_sc_hd__mux2_1)
|
||||
0.05 0.34 3.98 v _270_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _032_ (net)
|
||||
0.05 0.00 3.98 v _388_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.98 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _388_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.11 6.31 library setup time
|
||||
6.31 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.31 data required time
|
||||
-3.98 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.34 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _391_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _262_/S (sky130_fd_sc_hd__mux2_1)
|
||||
0.05 0.34 3.98 v _262_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _035_ (net)
|
||||
0.05 0.00 3.98 v _391_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.98 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _391_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.11 6.31 library setup time
|
||||
6.31 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.31 data required time
|
||||
-3.98 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.34 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _390_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _264_/C1 (sky130_fd_sc_hd__o211a_2)
|
||||
0.05 0.17 3.80 v _264_/X (sky130_fd_sc_hd__o211a_2)
|
||||
1 0.01 _123_ (net)
|
||||
0.05 0.00 3.80 v _265_/B (sky130_fd_sc_hd__xnor2_2)
|
||||
0.05 0.13 3.94 v _265_/Y (sky130_fd_sc_hd__xnor2_2)
|
||||
1 0.00 _034_ (net)
|
||||
0.05 0.00 3.94 v _390_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.94 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _390_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.32 library setup time
|
||||
6.32 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.32 data required time
|
||||
-3.94 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.38 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _393_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.64 v _257_/A2 (sky130_fd_sc_hd__o22a_2)
|
||||
0.03 0.25 3.89 v _257_/X (sky130_fd_sc_hd__o22a_2)
|
||||
1 0.00 _037_ (net)
|
||||
0.03 0.00 3.89 v _393_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.89 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _393_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.10 6.32 library setup time
|
||||
6.32 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.32 data required time
|
||||
-3.89 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.43 slack (MET)
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,178 @@
|
|||
|
||||
===========================================================================
|
||||
report_checks -path_delay min (Hold)
|
||||
============================================================================
|
||||
Startpoint: _394_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _395_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _394_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.04 0.33 0.34 ^ _394_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
1 0.00 pll_control.oscbuf[0] (net)
|
||||
0.04 0.00 0.34 ^ _395_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.34 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _395_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.34 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.11 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _395_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _396_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _395_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.12 0.41 0.41 ^ _395_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.02 pll_control.oscbuf[1] (net)
|
||||
0.12 0.00 0.41 ^ _396_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.41 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _396_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.04 0.21 library hold time
|
||||
0.21 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.21 data required time
|
||||
-0.41 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.20 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _379_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _379_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _379_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.06 0.36 0.36 ^ _379_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.01 pll_control.prep[0] (net)
|
||||
0.06 0.00 0.36 ^ _287_/A (sky130_fd_sc_hd__or2_2)
|
||||
0.03 0.09 0.46 ^ _287_/X (sky130_fd_sc_hd__or2_2)
|
||||
1 0.00 _023_ (net)
|
||||
0.03 0.00 0.46 ^ _379_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.46 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _379_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.02 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.46 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _381_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _381_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _381_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.05 0.35 0.35 ^ _381_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
2 0.01 pll_control.prep[2] (net)
|
||||
0.05 0.00 0.35 ^ _285_/A1 (sky130_fd_sc_hd__mux2_1)
|
||||
0.04 0.11 0.46 ^ _285_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _025_ (net)
|
||||
0.04 0.00 0.46 ^ _381_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.46 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _381_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.46 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.24 slack (MET)
|
||||
|
||||
|
||||
Startpoint: _380_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _380_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: min
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _380_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.06 0.35 0.36 ^ _380_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
3 0.01 pll_control.prep[1] (net)
|
||||
0.06 0.00 0.36 ^ _286_/A0 (sky130_fd_sc_hd__mux2_1)
|
||||
0.04 0.11 0.47 ^ _286_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _024_ (net)
|
||||
0.04 0.00 0.47 ^ _380_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.47 data arrival time
|
||||
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _380_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.25 0.25 clock uncertainty
|
||||
0.00 0.25 clock reconvergence pessimism
|
||||
-0.03 0.23 library hold time
|
||||
0.23 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
0.23 data required time
|
||||
-0.47 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
0.24 slack (MET)
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
|
||||
===========================================================================
|
||||
report_power
|
||||
============================================================================
|
||||
Group Internal Switching Leakage Total
|
||||
Power Power Power Power (Watts)
|
||||
----------------------------------------------------------------
|
||||
Sequential 1.48e-04 2.06e-05 1.84e-10 1.69e-04 32.4%
|
||||
Combinational 1.55e-04 1.96e-04 1.24e-09 3.51e-04 67.6%
|
||||
Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
||||
Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
|
||||
----------------------------------------------------------------
|
||||
Total 3.03e-04 2.17e-04 1.42e-09 5.20e-04 100.0%
|
||||
58.3% 41.7% 0.0%
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
|
||||
===========================================================================
|
||||
report_checks -unconstrained
|
||||
============================================================================
|
||||
Startpoint: _383_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Endpoint: _392_ (rising edge-triggered flip-flop clocked by pll_control_clock)
|
||||
Path Group: pll_control_clock
|
||||
Path Type: max
|
||||
|
||||
Fanout Cap Slew Delay Time Description
|
||||
-----------------------------------------------------------------------------
|
||||
0.00 0.00 clock pll_control_clock (rise edge)
|
||||
0.00 0.00 clock source latency
|
||||
0.10 0.00 0.00 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 0.00 ^ _383_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
0.10 0.50 0.51 v _383_/Q (sky130_fd_sc_hd__dfrtp_2)
|
||||
6 0.03 pll_control.count0[1] (net)
|
||||
0.10 0.00 0.51 v _200_/A (sky130_fd_sc_hd__xor2_2)
|
||||
0.09 0.23 0.74 v _200_/X (sky130_fd_sc_hd__xor2_2)
|
||||
3 0.01 _062_ (net)
|
||||
0.09 0.00 0.74 v _202_/A2 (sky130_fd_sc_hd__a211o_2)
|
||||
0.07 0.39 1.13 v _202_/X (sky130_fd_sc_hd__a211o_2)
|
||||
3 0.01 _064_ (net)
|
||||
0.07 0.00 1.13 v _212_/A2 (sky130_fd_sc_hd__a21o_2)
|
||||
0.06 0.26 1.39 v _212_/X (sky130_fd_sc_hd__a21o_2)
|
||||
3 0.01 _074_ (net)
|
||||
0.06 0.00 1.39 v _213_/A3 (sky130_fd_sc_hd__a32o_2)
|
||||
0.05 0.29 1.68 v _213_/X (sky130_fd_sc_hd__a32o_2)
|
||||
3 0.01 _075_ (net)
|
||||
0.05 0.00 1.68 v _224_/B1 (sky130_fd_sc_hd__a2111oi_2)
|
||||
0.26 0.34 2.02 ^ _224_/Y (sky130_fd_sc_hd__a2111oi_2)
|
||||
1 0.00 _086_ (net)
|
||||
0.26 0.00 2.02 ^ _227_/A1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.42 0.49 2.51 ^ _227_/X (sky130_fd_sc_hd__o31a_2)
|
||||
13 0.08 _089_ (net)
|
||||
0.42 0.01 2.52 ^ _233_/C_N (sky130_fd_sc_hd__or4bb_2)
|
||||
0.09 0.67 3.18 v _233_/X (sky130_fd_sc_hd__or4bb_2)
|
||||
1 0.00 _095_ (net)
|
||||
0.09 0.00 3.18 v _238_/B (sky130_fd_sc_hd__and4_2)
|
||||
0.06 0.26 3.44 v _238_/X (sky130_fd_sc_hd__and4_2)
|
||||
3 0.01 _100_ (net)
|
||||
0.06 0.00 3.44 v _243_/B1 (sky130_fd_sc_hd__o31a_2)
|
||||
0.12 0.19 3.63 v _243_/X (sky130_fd_sc_hd__o31a_2)
|
||||
8 0.03 _105_ (net)
|
||||
0.12 0.00 3.63 v _260_/S (sky130_fd_sc_hd__mux2_1)
|
||||
0.06 0.35 3.99 v _260_/X (sky130_fd_sc_hd__mux2_1)
|
||||
1 0.00 _036_ (net)
|
||||
0.06 0.00 3.99 v _392_/D (sky130_fd_sc_hd__dfrtp_2)
|
||||
3.99 data arrival time
|
||||
|
||||
6.67 6.67 clock pll_control_clock (rise edge)
|
||||
0.00 6.67 clock source latency
|
||||
0.10 0.00 6.67 ^ ringosc.ibufp01/Y (sky130_fd_sc_hd__clkinv_8)
|
||||
24 0.09 pll_control.clock (net)
|
||||
0.10 0.00 6.67 ^ _392_/CLK (sky130_fd_sc_hd__dfrtp_2)
|
||||
-0.25 6.42 clock uncertainty
|
||||
0.00 6.42 clock reconvergence pessimism
|
||||
-0.11 6.31 library setup time
|
||||
6.31 data required time
|
||||
-----------------------------------------------------------------------------
|
||||
6.31 data required time
|
||||
-3.99 data arrival time
|
||||
-----------------------------------------------------------------------------
|
||||
2.32 slack (MET)
|
||||
|
||||
|
||||
|
||||
===========================================================================
|
||||
report_checks --slack_max -0.01
|
||||
============================================================================
|
||||
No paths found.
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
|
||||
===========================================================================
|
||||
report_check_types -max_slew -max_cap -max_fanout -violators
|
||||
============================================================================
|
||||
max fanout
|
||||
|
||||
Pin Limit Fanout Slack
|
||||
---------------------------------------------------------
|
||||
dco 6 108 -102 (VIOLATED)
|
||||
_355_/Y 6 25 -19 (VIOLATED)
|
||||
ringosc.ibufp01/Y 6 24 -18 (VIOLATED)
|
||||
_227_/X 6 13 -7 (VIOLATED)
|
||||
_393_/Q 6 11 -5 (VIOLATED)
|
||||
_292_/Y 6 10 -4 (VIOLATED)
|
||||
_390_/Q 6 10 -4 (VIOLATED)
|
||||
_181_/Y 6 9 -3 (VIOLATED)
|
||||
_228_/X 6 9 -3 (VIOLATED)
|
||||
_243_/X 6 8 -2 (VIOLATED)
|
||||
_293_/X 6 8 -2 (VIOLATED)
|
||||
_382_/Q 6 8 -2 (VIOLATED)
|
||||
_391_/Q 6 8 -2 (VIOLATED)
|
||||
_392_/Q 6 8 -2 (VIOLATED)
|
||||
_241_/Y 6 7 (VIOLATED)
|
||||
|
||||
|
||||
===========================================================================
|
||||
max slew violation count 0
|
||||
max fanout violation count 15
|
||||
max cap violation count 0
|
||||
============================================================================
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
|
||||
===========================================================================
|
||||
report_tns
|
||||
============================================================================
|
||||
tns 0.00
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
|
||||
===========================================================================
|
||||
report_wns
|
||||
============================================================================
|
||||
wns 0.00
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
|
||||
===========================================================================
|
||||
report_worst_slack -max (Setup)
|
||||
============================================================================
|
||||
worst slack 2.32
|
||||
|
||||
===========================================================================
|
||||
report_worst_slack -min (Hold)
|
||||
============================================================================
|
||||
worst slack 0.11
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef
|
||||
[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
|
||||
The LEF parser will ignore this statement.
|
||||
To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef at line 930.
|
||||
|
||||
[INFO ODB-0223] Created 13 technology layers
|
||||
[INFO ODB-0224] Created 25 technology vias
|
||||
[INFO ODB-0225] Created 441 library cells
|
||||
[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef
|
||||
[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
|
||||
[INFO ODB-0128] Design: digital_pll
|
||||
[INFO ODB-0130] Created 39 pins.
|
||||
[INFO ODB-0131] Created 621 components and 3575 component-terminals.
|
||||
[INFO ODB-0132] Created 2 special nets and 2384 connections.
|
||||
[INFO ODB-0133] Created 333 nets and 1190 connections.
|
||||
[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
|
||||
[INFO]: Setting RC values...
|
||||
[INFO PSM-0002] Output voltage file is specified as: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/22-irdrop.rpt.
|
||||
[WARNING PSM-0016] Voltage pad location (VSRC) file not specified, defaulting pad location to checkerboard pattern on core area.
|
||||
[WARNING PSM-0017] X direction bump pitch is not specified, defaulting to 140um.
|
||||
[WARNING PSM-0018] Y direction bump pitch is not specified, defaulting to 140um.
|
||||
[WARNING PSM-0019] Voltage on net VPWR is not explicitly set.
|
||||
[WARNING PSM-0022] Using voltage 1.800V for VDD network.
|
||||
[WARNING PSM-0063] Specified bump pitches of 140.000 and 140.000 are less than core width of 63.940 or core height of 62.560. Changing bump location to the center of the die at (37.490, 36.720).
|
||||
[WARNING PSM-0065] VSRC location not specified, using default checkerboard pattern with one VDD every size bumps in x-direction and one in two bumps in the y-direction
|
||||
[INFO PSM-0076] Setting metal node density to be standard cell height times 5.
|
||||
[WARNING PSM-0030] VSRC location at (37.490um, 36.720um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (21.840um, 21.850um).
|
||||
[INFO PSM-0031] Number of PDN nodes on net VPWR = 268.
|
||||
[INFO PSM-0064] Number of voltage sources = 1.
|
||||
[INFO PSM-0040] All PDN stripes on net VPWR are connected.
|
||||
########## IR report #################
|
||||
Worstcase voltage: 1.80e+00 V
|
||||
Average IR drop : 7.43e-10 V
|
||||
Worstcase IR drop: 1.08e-09 V
|
||||
######################################
|
||||
|
|
@ -0,0 +1,480 @@
|
|||
Instance name, X location, Y location, Voltage
|
||||
ringosc.dstage\[8\].id.delaybuf1, 61.84, 68, 1.8
|
||||
ringosc.dstage\[8\].id.delayen0, 61.84, 68, 1.8
|
||||
ringosc.dstage\[8\].id.delayen1, 61.84, 68, 1.8
|
||||
ringosc.dstage\[8\].id.delayenb0, 61.84, 62.56, 1.8
|
||||
ringosc.dstage\[9\].id.delayen0, 61.84, 62.56, 1.8
|
||||
ringosc.dstage\[9\].id.delayenb0, 61.84, 62.56, 1.8
|
||||
_341_, 61.84, 57.12, 1.8
|
||||
_350_, 61.84, 57.12, 1.8
|
||||
ringosc.dstage\[9\].id.delayen1, 61.84, 57.12, 1.8
|
||||
ringosc.dstage\[9\].id.delayenb1, 61.84, 57.12, 1.8
|
||||
_323_, 61.84, 51.68, 1.8
|
||||
_342_, 61.84, 51.68, 1.8
|
||||
_349_, 61.84, 51.68, 1.8
|
||||
ringosc.dstage\[10\].id.delayen0, 61.84, 51.68, 1.8
|
||||
ringosc.dstage\[10\].id.delayen1, 61.84, 51.68, 1.8
|
||||
ringosc.dstage\[10\].id.delayenb0, 61.84, 51.68, 1.8
|
||||
_344_, 61.84, 46.24, 1.8
|
||||
_351_, 61.84, 46.24, 1.8
|
||||
_354_, 61.84, 46.24, 1.8
|
||||
ringosc.dstage\[10\].id.delayenb1, 61.84, 46.24, 1.8
|
||||
ANTENNA__350__B1, 61.84, 40.8, 1.8
|
||||
ANTENNA__351__A1, 61.84, 40.8, 1.8
|
||||
ANTENNA__354__A1, 61.84, 40.8, 1.8
|
||||
ANTENNA__354__A2, 61.84, 40.8, 1.8
|
||||
ringosc.iss.ctrlen0, 61.84, 40.8, 1.8
|
||||
ringosc.iss.delaybuf0, 61.84, 40.8, 1.8
|
||||
ringosc.iss.delayen1, 61.84, 40.8, 1.8
|
||||
ringosc.iss.delayenb0, 61.84, 40.8, 1.8
|
||||
ringosc.iss.delayenb1, 61.84, 40.8, 1.8
|
||||
FILLER_11_109, 61.84, 35.36, 1.8
|
||||
FILLER_11_113, 61.84, 35.36, 1.8
|
||||
ringosc.dstage\[11\].id.delayenb0, 61.84, 35.36, 1.8
|
||||
ringosc.iss.const1, 61.84, 35.36, 1.8
|
||||
ringosc.iss.delayen0, 61.84, 35.36, 1.8
|
||||
ringosc.iss.reseten0, 61.84, 35.36, 1.8
|
||||
ANTENNA__367__A, 61.84, 29.92, 1.8
|
||||
ANTENNA__368__A, 61.84, 29.92, 1.8
|
||||
FILLER_8_121, 61.84, 29.92, 1.8
|
||||
_367_, 61.84, 29.92, 1.8
|
||||
_368_, 61.84, 29.92, 1.8
|
||||
ringosc.dstage\[11\].id.delayen0, 61.84, 29.92, 1.8
|
||||
ANTENNA__352__A_N, 61.84, 24.48, 1.8
|
||||
ANTENNA__366__A, 61.84, 24.48, 1.8
|
||||
_352_, 61.84, 24.48, 1.8
|
||||
_366_, 61.84, 24.48, 1.8
|
||||
ringosc.dstage\[11\].id.delayenb1, 61.84, 24.48, 1.8
|
||||
ANTENNA__369__A, 61.84, 19.04, 1.8
|
||||
_353_, 61.84, 19.04, 1.8
|
||||
_358_, 61.84, 19.04, 1.8
|
||||
_364_, 61.84, 19.04, 1.8
|
||||
_369_, 61.84, 19.04, 1.8
|
||||
ringosc.dstage\[11\].id.delayen1, 61.84, 19.04, 1.8
|
||||
ANTENNA__353__A1, 61.84, 13.6, 1.8
|
||||
ANTENNA__358__A, 61.84, 13.6, 1.8
|
||||
ANTENNA__373__A, 61.84, 13.6, 1.8
|
||||
_181_, 61.84, 13.6, 1.8
|
||||
_182_, 61.84, 13.6, 1.8
|
||||
_373_, 61.84, 13.6, 1.8
|
||||
ANTENNA__371__A, 61.84, 8.16, 1.8
|
||||
ANTENNA__372__A, 61.84, 8.16, 1.8
|
||||
ANTENNA__374__A, 61.84, 8.16, 1.8
|
||||
ANTENNA__394__D, 61.84, 8.16, 1.8
|
||||
_372_, 61.84, 8.16, 1.8
|
||||
_374_, 61.84, 8.16, 1.8
|
||||
_395_, 61.84, 8.16, 1.8
|
||||
_305_, 21.84, 68, 1.8
|
||||
ANTENNA__312__A2, 21.84, 62.56, 1.8
|
||||
_306_, 21.84, 62.56, 1.8
|
||||
_313_, 21.84, 62.56, 1.8
|
||||
ringosc.dstage\[6\].id.delayen0, 21.84, 62.56, 1.8
|
||||
ringosc.dstage\[6\].id.delayen1, 21.84, 62.56, 1.8
|
||||
ringosc.dstage\[6\].id.delayenb0, 21.84, 62.56, 1.8
|
||||
ANTENNA__310__A1, 21.84, 57.12, 1.8
|
||||
_301_, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[4\].id.delayint0, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[5\].id.delaybuf0, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[5\].id.delaybuf1, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[5\].id.delayen0, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[5\].id.delayenb0, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[6\].id.delaybuf0, 21.84, 57.12, 1.8
|
||||
ringosc.dstage\[6\].id.delayenb1, 21.84, 57.12, 1.8
|
||||
ANTENNA__316__B1, 21.84, 51.68, 1.8
|
||||
ANTENNA__316__B2, 21.84, 51.68, 1.8
|
||||
_316_, 21.84, 51.68, 1.8
|
||||
ringosc.dstage\[1\].id.delayen0, 21.84, 51.68, 1.8
|
||||
ringosc.dstage\[5\].id.delayen1, 21.84, 51.68, 1.8
|
||||
ringosc.dstage\[5\].id.delayenb1, 21.84, 51.68, 1.8
|
||||
ringosc.dstage\[5\].id.delayint0, 21.84, 51.68, 1.8
|
||||
ANTENNA__317__A1, 21.84, 46.24, 1.8
|
||||
_289_, 21.84, 46.24, 1.8
|
||||
_294_, 21.84, 46.24, 1.8
|
||||
_297_, 21.84, 46.24, 1.8
|
||||
ringosc.dstage\[1\].id.delayenb0, 21.84, 46.24, 1.8
|
||||
ringosc.dstage\[1\].id.delayenb1, 21.84, 46.24, 1.8
|
||||
ANTENNA__289__A2, 21.84, 40.8, 1.8
|
||||
_295_, 21.84, 40.8, 1.8
|
||||
ringosc.dstage\[0\].id.delayen0, 21.84, 40.8, 1.8
|
||||
ringosc.dstage\[1\].id.delaybuf0, 21.84, 40.8, 1.8
|
||||
ringosc.dstage\[1\].id.delayen1, 21.84, 40.8, 1.8
|
||||
ringosc.ibufp00, 21.84, 40.8, 1.8
|
||||
_219_, 21.84, 35.36, 1.8
|
||||
_377_, 21.84, 35.36, 1.8
|
||||
_400_, 21.84, 35.36, 1.8
|
||||
ringosc.dstage\[0\].id.delaybuf0, 21.84, 35.36, 1.8
|
||||
ringosc.dstage\[0\].id.delayen1, 21.84, 35.36, 1.8
|
||||
ringosc.dstage\[0\].id.delayenb1, 21.84, 35.36, 1.8
|
||||
ANTENNA__219__A, 21.84, 29.92, 1.8
|
||||
_184_, 21.84, 29.92, 1.8
|
||||
_203_, 21.84, 29.92, 1.8
|
||||
_210_, 21.84, 29.92, 1.8
|
||||
ringosc.ibufp01, 21.84, 29.92, 1.8
|
||||
_192_, 21.84, 24.48, 1.8
|
||||
_193_, 21.84, 24.48, 1.8
|
||||
_212_, 21.84, 24.48, 1.8
|
||||
_275_, 21.84, 24.48, 1.8
|
||||
_386_, 21.84, 24.48, 1.8
|
||||
_399_, 21.84, 24.48, 1.8
|
||||
ANTENNA__363__A, 21.84, 19.04, 1.8
|
||||
_185_, 21.84, 19.04, 1.8
|
||||
_195_, 21.84, 19.04, 1.8
|
||||
_202_, 21.84, 19.04, 1.8
|
||||
_363_, 21.84, 19.04, 1.8
|
||||
_194_, 21.84, 13.6, 1.8
|
||||
_196_, 21.84, 13.6, 1.8
|
||||
_197_, 21.84, 13.6, 1.8
|
||||
_198_, 21.84, 13.6, 1.8
|
||||
_200_, 21.84, 13.6, 1.8
|
||||
_218_, 21.84, 13.6, 1.8
|
||||
ANTENNA__359__A, 21.84, 8.16, 1.8
|
||||
_186_, 21.84, 8.16, 1.8
|
||||
_223_, 21.84, 8.16, 1.8
|
||||
_284_, 21.84, 8.16, 1.8
|
||||
_375_, 21.84, 8.16, 1.8
|
||||
_382_, 21.84, 8.16, 1.8
|
||||
_398_, 21.84, 8.16, 1.8
|
||||
PHY_44, 5.52, 68, 1.8
|
||||
ANTENNA__342__A2, 69.46, 68, 1.8
|
||||
PHY_45, 69.46, 68, 1.8
|
||||
ANTENNA__313__A_N, 13.68, 68, 1.8
|
||||
ANTENNA__313__B, 13.68, 68, 1.8
|
||||
ringosc.dstage\[3\].id.delayint0, 13.68, 68, 1.8
|
||||
_309_, 35.173, 68, 1.8
|
||||
ringosc.dstage\[6\].id.delaybuf1, 35.173, 68, 1.8
|
||||
ringosc.dstage\[6\].id.delayint0, 35.173, 68, 1.8
|
||||
ANTENNA__309__A1, 48.506, 68, 1.8
|
||||
ANTENNA__337__A1, 48.506, 68, 1.8
|
||||
ANTENNA__337__A2, 48.506, 68, 1.8
|
||||
ANTENNA__341__B1, 48.506, 68, 1.8
|
||||
ANTENNA__348__A2, 48.506, 68, 1.8
|
||||
PHY_40, 5.52, 62.56, 1.8
|
||||
PHY_42, 5.52, 62.56, 1.8
|
||||
_302_, 5.52, 62.56, 1.8
|
||||
ringosc.dstage\[3\].id.delaybuf1, 5.52, 62.56, 1.8
|
||||
ringosc.dstage\[3\].id.delayen1, 5.52, 62.56, 1.8
|
||||
PHY_41, 69.46, 62.56, 1.8
|
||||
PHY_43, 69.46, 62.56, 1.8
|
||||
ringosc.dstage\[9\].id.delaybuf0, 69.46, 62.56, 1.8
|
||||
ANTENNA__306__A1, 13.68, 62.56, 1.8
|
||||
ANTENNA__309__A2, 13.68, 62.56, 1.8
|
||||
ringosc.dstage\[4\].id.delaybuf0, 13.68, 62.56, 1.8
|
||||
ringosc.dstage\[4\].id.delayen0, 13.68, 62.56, 1.8
|
||||
ringosc.dstage\[4\].id.delayenb0, 13.68, 62.56, 1.8
|
||||
ANTENNA__310__A2, 35.173, 62.56, 1.8
|
||||
ANTENNA__312__A1, 35.173, 62.56, 1.8
|
||||
ANTENNA__346__B2, 35.173, 62.56, 1.8
|
||||
_308_, 35.173, 62.56, 1.8
|
||||
_310_, 35.173, 62.56, 1.8
|
||||
_312_, 35.173, 62.56, 1.8
|
||||
_346_, 35.173, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delaybuf0, 35.173, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delayen1, 35.173, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delayenb1, 35.173, 62.56, 1.8
|
||||
ANTENNA__343__A2, 48.506, 62.56, 1.8
|
||||
ANTENNA__346__B1, 48.506, 62.56, 1.8
|
||||
ANTENNA__348__A1, 48.506, 62.56, 1.8
|
||||
_337_, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delaybuf1, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delayen0, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delayenb0, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[7\].id.delayint0, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[8\].id.delaybuf0, 48.506, 62.56, 1.8
|
||||
ringosc.dstage\[8\].id.delayint0, 48.506, 62.56, 1.8
|
||||
ANTENNA__305__A1, 5.52, 57.12, 1.8
|
||||
PHY_36, 5.52, 57.12, 1.8
|
||||
PHY_38, 5.52, 57.12, 1.8
|
||||
ringosc.dstage\[3\].id.delayen0, 5.52, 57.12, 1.8
|
||||
ringosc.dstage\[3\].id.delayenb1, 5.52, 57.12, 1.8
|
||||
PHY_37, 69.46, 57.12, 1.8
|
||||
PHY_39, 69.46, 57.12, 1.8
|
||||
ringosc.dstage\[10\].id.delaybuf0, 69.46, 57.12, 1.8
|
||||
ringosc.dstage\[10\].id.delayint0, 69.46, 57.12, 1.8
|
||||
ringosc.dstage\[3\].id.delaybuf0, 13.68, 57.12, 1.8
|
||||
ringosc.dstage\[4\].id.delayen1, 13.68, 57.12, 1.8
|
||||
ringosc.dstage\[4\].id.delayenb1, 13.68, 57.12, 1.8
|
||||
ANTENNA__343__A1, 35.173, 57.12, 1.8
|
||||
_303_, 35.173, 57.12, 1.8
|
||||
_304_, 35.173, 57.12, 1.8
|
||||
_311_, 35.173, 57.12, 1.8
|
||||
_329_, 35.173, 57.12, 1.8
|
||||
_331_, 35.173, 57.12, 1.8
|
||||
_332_, 35.173, 57.12, 1.8
|
||||
_343_, 35.173, 57.12, 1.8
|
||||
ANTENNA__334__B1, 48.506, 57.12, 1.8
|
||||
ANTENNA__341__B2, 48.506, 57.12, 1.8
|
||||
ANTENNA__350__B2, 48.506, 57.12, 1.8
|
||||
_333_, 48.506, 57.12, 1.8
|
||||
_335_, 48.506, 57.12, 1.8
|
||||
_336_, 48.506, 57.12, 1.8
|
||||
_338_, 48.506, 57.12, 1.8
|
||||
_340_, 48.506, 57.12, 1.8
|
||||
_348_, 48.506, 57.12, 1.8
|
||||
ringosc.dstage\[8\].id.delayenb1, 48.506, 57.12, 1.8
|
||||
ringosc.dstage\[9\].id.delayint0, 48.506, 57.12, 1.8
|
||||
PHY_32, 5.52, 51.68, 1.8
|
||||
PHY_34, 5.52, 51.68, 1.8
|
||||
_299_, 5.52, 51.68, 1.8
|
||||
ringosc.dstage\[3\].id.delayenb0, 5.52, 51.68, 1.8
|
||||
PHY_33, 69.46, 51.68, 1.8
|
||||
PHY_35, 69.46, 51.68, 1.8
|
||||
ANTENNA__300__A1, 13.68, 51.68, 1.8
|
||||
ANTENNA__300__A2, 13.68, 51.68, 1.8
|
||||
ANTENNA__306__A2, 13.68, 51.68, 1.8
|
||||
_300_, 13.68, 51.68, 1.8
|
||||
ringosc.dstage\[2\].id.delayen0, 13.68, 51.68, 1.8
|
||||
ringosc.dstage\[4\].id.delaybuf1, 13.68, 51.68, 1.8
|
||||
ANTENNA__293__A_N, 35.173, 51.68, 1.8
|
||||
ANTENNA__314__A1, 35.173, 51.68, 1.8
|
||||
ANTENNA__317__A2, 35.173, 51.68, 1.8
|
||||
_293_, 35.173, 51.68, 1.8
|
||||
_298_, 35.173, 51.68, 1.8
|
||||
_314_, 35.173, 51.68, 1.8
|
||||
_315_, 35.173, 51.68, 1.8
|
||||
_317_, 35.173, 51.68, 1.8
|
||||
_321_, 35.173, 51.68, 1.8
|
||||
_330_, 35.173, 51.68, 1.8
|
||||
ANTENNA__296__B, 48.506, 51.68, 1.8
|
||||
ANTENNA__342__A1, 48.506, 51.68, 1.8
|
||||
_240_, 48.506, 51.68, 1.8
|
||||
_307_, 48.506, 51.68, 1.8
|
||||
_320_, 48.506, 51.68, 1.8
|
||||
_324_, 48.506, 51.68, 1.8
|
||||
_325_, 48.506, 51.68, 1.8
|
||||
_328_, 48.506, 51.68, 1.8
|
||||
_339_, 48.506, 51.68, 1.8
|
||||
_347_, 48.506, 51.68, 1.8
|
||||
ringosc.dstage\[9\].id.delaybuf1, 48.506, 51.68, 1.8
|
||||
ANTENNA__299__A1, 5.52, 46.24, 1.8
|
||||
ANTENNA__299__A2, 5.52, 46.24, 1.8
|
||||
ANTENNA__302__A1, 5.52, 46.24, 1.8
|
||||
PHY_28, 5.52, 46.24, 1.8
|
||||
PHY_30, 5.52, 46.24, 1.8
|
||||
ringosc.dstage\[2\].id.delayenb0, 5.52, 46.24, 1.8
|
||||
ringosc.ibufp10, 5.52, 46.24, 1.8
|
||||
ANTENNA__351__A2, 69.46, 46.24, 1.8
|
||||
PHY_29, 69.46, 46.24, 1.8
|
||||
PHY_31, 69.46, 46.24, 1.8
|
||||
ringosc.dstage\[10\].id.delaybuf1, 69.46, 46.24, 1.8
|
||||
ringosc.dstage\[11\].id.delaybuf0, 69.46, 46.24, 1.8
|
||||
ANTENNA__305__A2, 13.68, 46.24, 1.8
|
||||
ringosc.dstage\[2\].id.delaybuf0, 13.68, 46.24, 1.8
|
||||
ringosc.dstage\[2\].id.delayen1, 13.68, 46.24, 1.8
|
||||
ringosc.dstage\[2\].id.delayenb1, 13.68, 46.24, 1.8
|
||||
ringosc.dstage\[2\].id.delayint0, 13.68, 46.24, 1.8
|
||||
ANTENNA__326__A1, 35.173, 46.24, 1.8
|
||||
_231_, 35.173, 46.24, 1.8
|
||||
_288_, 35.173, 46.24, 1.8
|
||||
_290_, 35.173, 46.24, 1.8
|
||||
_318_, 35.173, 46.24, 1.8
|
||||
_319_, 35.173, 46.24, 1.8
|
||||
_322_, 35.173, 46.24, 1.8
|
||||
_326_, 35.173, 46.24, 1.8
|
||||
ringosc.dstage\[1\].id.delaybuf1, 35.173, 46.24, 1.8
|
||||
ringosc.dstage\[1\].id.delayint0, 35.173, 46.24, 1.8
|
||||
ANTENNA__326__A2, 48.506, 46.24, 1.8
|
||||
ANTENNA__334__B2, 48.506, 46.24, 1.8
|
||||
_176_, 48.506, 46.24, 1.8
|
||||
_177_, 48.506, 46.24, 1.8
|
||||
_178_, 48.506, 46.24, 1.8
|
||||
_179_, 48.506, 46.24, 1.8
|
||||
_242_, 48.506, 46.24, 1.8
|
||||
_291_, 48.506, 46.24, 1.8
|
||||
_292_, 48.506, 46.24, 1.8
|
||||
_296_, 48.506, 46.24, 1.8
|
||||
_327_, 48.506, 46.24, 1.8
|
||||
_334_, 48.506, 46.24, 1.8
|
||||
_345_, 48.506, 46.24, 1.8
|
||||
ANTENNA__302__A2, 5.52, 40.8, 1.8
|
||||
FILLER_14_5, 5.52, 40.8, 1.8
|
||||
PHY_24, 5.52, 40.8, 1.8
|
||||
PHY_26, 5.52, 40.8, 1.8
|
||||
clockp_buffer_1, 5.52, 40.8, 1.8
|
||||
PHY_25, 69.46, 40.8, 1.8
|
||||
PHY_27, 69.46, 40.8, 1.8
|
||||
ringosc.iss.delayint0, 69.46, 40.8, 1.8
|
||||
ANTENNA__295__A1, 13.68, 40.8, 1.8
|
||||
ANTENNA__295__A2, 13.68, 40.8, 1.8
|
||||
_189_, 13.68, 40.8, 1.8
|
||||
ringosc.dstage\[0\].id.delayenb0, 13.68, 40.8, 1.8
|
||||
ringosc.dstage\[2\].id.delaybuf1, 13.68, 40.8, 1.8
|
||||
ANTENNA__288__A, 35.173, 40.8, 1.8
|
||||
ANTENNA__319__A1, 35.173, 40.8, 1.8
|
||||
ANTENNA__319__A2, 35.173, 40.8, 1.8
|
||||
_230_, 35.173, 40.8, 1.8
|
||||
_248_, 35.173, 40.8, 1.8
|
||||
_250_, 35.173, 40.8, 1.8
|
||||
_254_, 35.173, 40.8, 1.8
|
||||
_256_, 35.173, 40.8, 1.8
|
||||
ringosc.dstage\[0\].id.delayint0, 35.173, 40.8, 1.8
|
||||
_180_, 48.506, 40.8, 1.8
|
||||
_228_, 48.506, 40.8, 1.8
|
||||
_229_, 48.506, 40.8, 1.8
|
||||
_241_, 48.506, 40.8, 1.8
|
||||
_249_, 48.506, 40.8, 1.8
|
||||
_252_, 48.506, 40.8, 1.8
|
||||
_263_, 48.506, 40.8, 1.8
|
||||
_266_, 48.506, 40.8, 1.8
|
||||
FILLER_11_3, 5.52, 35.36, 1.8
|
||||
PHY_20, 5.52, 35.36, 1.8
|
||||
PHY_22, 5.52, 35.36, 1.8
|
||||
_190_, 5.52, 35.36, 1.8
|
||||
ringosc.ibufp11, 5.52, 35.36, 1.8
|
||||
FILLER_11_131, 69.46, 35.36, 1.8
|
||||
PHY_21, 69.46, 35.36, 1.8
|
||||
PHY_23, 69.46, 35.36, 1.8
|
||||
ANTENNA__289__A1, 13.68, 35.36, 1.8
|
||||
ANTENNA__377__A, 13.68, 35.36, 1.8
|
||||
ANTENNA__378__A, 13.68, 35.36, 1.8
|
||||
_183_, 13.68, 35.36, 1.8
|
||||
_188_, 13.68, 35.36, 1.8
|
||||
_378_, 13.68, 35.36, 1.8
|
||||
_244_, 35.173, 35.36, 1.8
|
||||
_246_, 35.173, 35.36, 1.8
|
||||
_253_, 35.173, 35.36, 1.8
|
||||
_255_, 35.173, 35.36, 1.8
|
||||
_257_, 35.173, 35.36, 1.8
|
||||
_393_, 35.173, 35.36, 1.8
|
||||
ringosc.dstage\[0\].id.delaybuf1, 35.173, 35.36, 1.8
|
||||
FILLER_11_101, 48.506, 35.36, 1.8
|
||||
_251_, 48.506, 35.36, 1.8
|
||||
_262_, 48.506, 35.36, 1.8
|
||||
_264_, 48.506, 35.36, 1.8
|
||||
_265_, 48.506, 35.36, 1.8
|
||||
ANTENNA__207__A1, 5.52, 29.92, 1.8
|
||||
ANTENNA__215__B1, 5.52, 29.92, 1.8
|
||||
ANTENNA__225__B1, 5.52, 29.92, 1.8
|
||||
PHY_16, 5.52, 29.92, 1.8
|
||||
PHY_18, 5.52, 29.92, 1.8
|
||||
_207_, 5.52, 29.92, 1.8
|
||||
_401_, 5.52, 29.92, 1.8
|
||||
FILLER_9_132, 69.46, 29.92, 1.8
|
||||
PHY_17, 69.46, 29.92, 1.8
|
||||
PHY_19, 69.46, 29.92, 1.8
|
||||
ringosc.dstage\[11\].id.delayint0, 69.46, 29.92, 1.8
|
||||
_204_, 13.68, 29.92, 1.8
|
||||
_206_, 13.68, 29.92, 1.8
|
||||
_214_, 13.68, 29.92, 1.8
|
||||
_225_, 13.68, 29.92, 1.8
|
||||
ANTENNA__370__A, 35.173, 29.92, 1.8
|
||||
FILLER_10_72, 35.173, 29.92, 1.8
|
||||
_245_, 35.173, 29.92, 1.8
|
||||
_247_, 35.173, 29.92, 1.8
|
||||
_258_, 35.173, 29.92, 1.8
|
||||
_261_, 35.173, 29.92, 1.8
|
||||
_269_, 35.173, 29.92, 1.8
|
||||
_370_, 35.173, 29.92, 1.8
|
||||
_239_, 48.506, 29.92, 1.8
|
||||
_243_, 48.506, 29.92, 1.8
|
||||
_259_, 48.506, 29.92, 1.8
|
||||
_267_, 48.506, 29.92, 1.8
|
||||
_391_, 48.506, 29.92, 1.8
|
||||
ANTENNA__214__B1, 5.52, 24.48, 1.8
|
||||
PHY_12, 5.52, 24.48, 1.8
|
||||
PHY_14, 5.52, 24.48, 1.8
|
||||
_205_, 5.52, 24.48, 1.8
|
||||
_215_, 5.52, 24.48, 1.8
|
||||
PHY_13, 69.46, 24.48, 1.8
|
||||
PHY_15, 69.46, 24.48, 1.8
|
||||
ringosc.dstage\[11\].id.delaybuf1, 69.46, 24.48, 1.8
|
||||
_191_, 13.68, 24.48, 1.8
|
||||
_211_, 13.68, 24.48, 1.8
|
||||
_213_, 13.68, 24.48, 1.8
|
||||
_227_, 13.68, 24.48, 1.8
|
||||
_376_, 13.68, 24.48, 1.8
|
||||
FILLER_7_53, 35.173, 24.48, 1.8
|
||||
_260_, 35.173, 24.48, 1.8
|
||||
_274_, 35.173, 24.48, 1.8
|
||||
_276_, 35.173, 24.48, 1.8
|
||||
_277_, 35.173, 24.48, 1.8
|
||||
_388_, 35.173, 24.48, 1.8
|
||||
_232_, 48.506, 24.48, 1.8
|
||||
_233_, 48.506, 24.48, 1.8
|
||||
_268_, 48.506, 24.48, 1.8
|
||||
_390_, 48.506, 24.48, 1.8
|
||||
_392_, 48.506, 24.48, 1.8
|
||||
ANTENNA__213__A1, 5.52, 19.04, 1.8
|
||||
ANTENNA__213__B1, 5.52, 19.04, 1.8
|
||||
PHY_10, 5.52, 19.04, 1.8
|
||||
PHY_8, 5.52, 19.04, 1.8
|
||||
_217_, 5.52, 19.04, 1.8
|
||||
_224_, 5.52, 19.04, 1.8
|
||||
ANTENNA__353__A2, 69.46, 19.04, 1.8
|
||||
ANTENNA__364__A, 69.46, 19.04, 1.8
|
||||
FILLER_4_131, 69.46, 19.04, 1.8
|
||||
PHY_11, 69.46, 19.04, 1.8
|
||||
PHY_9, 69.46, 19.04, 1.8
|
||||
ANTENNA__376__A, 13.68, 19.04, 1.8
|
||||
_209_, 13.68, 19.04, 1.8
|
||||
_226_, 13.68, 19.04, 1.8
|
||||
_237_, 13.68, 19.04, 1.8
|
||||
ANTENNA__362__A, 35.173, 19.04, 1.8
|
||||
ANTENNA__365__A, 35.173, 19.04, 1.8
|
||||
_270_, 35.173, 19.04, 1.8
|
||||
_278_, 35.173, 19.04, 1.8
|
||||
_362_, 35.173, 19.04, 1.8
|
||||
_365_, 35.173, 19.04, 1.8
|
||||
_384_, 35.173, 19.04, 1.8
|
||||
_385_, 35.173, 19.04, 1.8
|
||||
_234_, 48.506, 19.04, 1.8
|
||||
_238_, 48.506, 19.04, 1.8
|
||||
_271_, 48.506, 19.04, 1.8
|
||||
_272_, 48.506, 19.04, 1.8
|
||||
_387_, 48.506, 19.04, 1.8
|
||||
_389_, 48.506, 19.04, 1.8
|
||||
PHY_4, 5.52, 13.6, 1.8
|
||||
PHY_6, 5.52, 13.6, 1.8
|
||||
_216_, 5.52, 13.6, 1.8
|
||||
_222_, 5.52, 13.6, 1.8
|
||||
_236_, 5.52, 13.6, 1.8
|
||||
FILLER_3_131, 69.46, 13.6, 1.8
|
||||
PHY_5, 69.46, 13.6, 1.8
|
||||
PHY_7, 69.46, 13.6, 1.8
|
||||
ANTENNA__216__A, 13.68, 13.6, 1.8
|
||||
ANTENNA__222__B2, 13.68, 13.6, 1.8
|
||||
ANTENNA__235__A, 13.68, 13.6, 1.8
|
||||
_201_, 13.68, 13.6, 1.8
|
||||
_208_, 13.68, 13.6, 1.8
|
||||
_221_, 13.68, 13.6, 1.8
|
||||
_235_, 13.68, 13.6, 1.8
|
||||
ANTENNA__361__A, 35.173, 13.6, 1.8
|
||||
_273_, 35.173, 13.6, 1.8
|
||||
_279_, 35.173, 13.6, 1.8
|
||||
_281_, 35.173, 13.6, 1.8
|
||||
_361_, 35.173, 13.6, 1.8
|
||||
_380_, 35.173, 13.6, 1.8
|
||||
ANTENNA__355__A, 48.506, 13.6, 1.8
|
||||
ANTENNA__356__A, 48.506, 13.6, 1.8
|
||||
_285_, 48.506, 13.6, 1.8
|
||||
_286_, 48.506, 13.6, 1.8
|
||||
_381_, 48.506, 13.6, 1.8
|
||||
ANTENNA__222__A1, 5.52, 8.16, 1.8
|
||||
PHY_0, 5.52, 8.16, 1.8
|
||||
PHY_2, 5.52, 8.16, 1.8
|
||||
_199_, 5.52, 8.16, 1.8
|
||||
_220_, 5.52, 8.16, 1.8
|
||||
_397_, 5.52, 8.16, 1.8
|
||||
clockp_buffer_0, 5.52, 8.16, 1.8
|
||||
FILLER_0_132, 69.46, 8.16, 1.8
|
||||
PHY_1, 69.46, 8.16, 1.8
|
||||
PHY_3, 69.46, 8.16, 1.8
|
||||
ANTENNA__375__A, 13.68, 8.16, 1.8
|
||||
_187_, 13.68, 8.16, 1.8
|
||||
ANTENNA__355__B, 35.173, 8.16, 1.8
|
||||
ANTENNA__360__A, 35.173, 8.16, 1.8
|
||||
_280_, 35.173, 8.16, 1.8
|
||||
_282_, 35.173, 8.16, 1.8
|
||||
_283_, 35.173, 8.16, 1.8
|
||||
_359_, 35.173, 8.16, 1.8
|
||||
_360_, 35.173, 8.16, 1.8
|
||||
_383_, 35.173, 8.16, 1.8
|
||||
ANTENNA__357__A, 48.506, 8.16, 1.8
|
||||
_287_, 48.506, 8.16, 1.8
|
||||
_355_, 48.506, 8.16, 1.8
|
||||
_356_, 48.506, 8.16, 1.8
|
||||
_357_, 48.506, 8.16, 1.8
|
||||
_371_, 48.506, 8.16, 1.8
|
||||
_379_, 48.506, 8.16, 1.8
|
||||
_394_, 48.506, 8.16, 1.8
|
||||
_396_, 48.506, 8.16, 1.8
|
||||
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Warning: Calma reading is not undoable! I hope that's OK.
|
||||
Library written using GDS-II Release 3.0
|
||||
Library name: digital_pll
|
||||
Reading "sky130_fd_sc_hd__diode_2".
|
||||
Reading "sky130_fd_sc_hd__fill_2".
|
||||
Reading "sky130_fd_sc_hd__decap_3".
|
||||
Reading "sky130_fd_sc_hd__dfrtp_2".
|
||||
Reading "sky130_fd_sc_hd__buf_16".
|
||||
Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
|
||||
Reading "sky130_fd_sc_hd__mux2_1".
|
||||
Reading "sky130_fd_sc_hd__nand2_2".
|
||||
Reading "sky130_fd_sc_hd__nor2_2".
|
||||
Reading "sky130_fd_sc_hd__nand3_2".
|
||||
Reading "sky130_fd_sc_hd__fill_1".
|
||||
Reading "sky130_fd_sc_hd__xnor2_2".
|
||||
Reading "sky130_fd_sc_hd__or2_2".
|
||||
Reading "sky130_fd_sc_hd__decap_4".
|
||||
Reading "sky130_fd_sc_hd__and2_2".
|
||||
Reading "sky130_fd_sc_hd__xor2_2".
|
||||
Reading "sky130_fd_sc_hd__a21oi_2".
|
||||
Reading "sky130_fd_sc_hd__a21o_2".
|
||||
Reading "sky130_fd_sc_hd__o22a_2".
|
||||
Reading "sky130_fd_sc_hd__and3_2".
|
||||
Reading "sky130_fd_sc_hd__or3b_2".
|
||||
Reading "sky130_fd_sc_hd__or3_2".
|
||||
Reading "sky130_fd_sc_hd__a211o_2".
|
||||
Reading "sky130_fd_sc_hd__o21a_2".
|
||||
Reading "sky130_fd_sc_hd__and4_2".
|
||||
Reading "sky130_fd_sc_hd__a32o_2".
|
||||
Reading "sky130_fd_sc_hd__a2111oi_2".
|
||||
Reading "sky130_fd_sc_hd__o31a_2".
|
||||
Reading "sky130_fd_sc_hd__nand2b_2".
|
||||
Reading "sky130_fd_sc_hd__o211a_2".
|
||||
Reading "sky130_fd_sc_hd__or4bb_2".
|
||||
Reading "sky130_fd_sc_hd__and3b_2".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_1".
|
||||
Reading "sky130_fd_sc_hd__einvp_2".
|
||||
Reading "sky130_fd_sc_hd__einvn_4".
|
||||
Reading "sky130_fd_sc_hd__inv_2".
|
||||
Reading "sky130_fd_sc_hd__a31o_2".
|
||||
Reading "sky130_fd_sc_hd__o2bb2a_2".
|
||||
Reading "sky130_fd_sc_hd__decap_8".
|
||||
Reading "sky130_fd_sc_hd__clkinv_1".
|
||||
Reading "sky130_fd_sc_hd__clkinv_8".
|
||||
Reading "sky130_fd_sc_hd__einvn_8".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_2".
|
||||
Reading "sky130_fd_sc_hd__a21bo_2".
|
||||
Reading "sky130_fd_sc_hd__conb_1".
|
||||
Reading "sky130_fd_sc_hd__einvp_1".
|
||||
Reading "sky130_fd_sc_hd__clkinv_2".
|
||||
Reading "sky130_fd_sc_hd__o21ai_2".
|
||||
Reading "sky130_fd_sc_hd__a22o_2".
|
||||
Reading "sky130_fd_sc_hd__or4_2".
|
||||
Reading "sky130_fd_sc_hd__and2b_2".
|
||||
Reading "sky130_fd_sc_hd__o221a_2".
|
||||
Reading "digital_pll".
|
||||
[INFO]: Wrote /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/gds_ptrs.mag including GDS pointers.
|
||||
|
|
@ -0,0 +1,111 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Reading LEF data from file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef.
|
||||
This action cannot be undone.
|
||||
LEF read, Line 78 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 79 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 112 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 114 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 115 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 121 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 122 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 123 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 156 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 164 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 165 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 167 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 168 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 169 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 206 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 207 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 209 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 210 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 211 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 248 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 249 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 251 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 252 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 253 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 290 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 291 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read: Processed 797 lines.
|
||||
Reading DEF data from file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def.
|
||||
This action cannot be undone.
|
||||
Processed 4 vias total.
|
||||
Processed 621 subcell instances total.
|
||||
Processed 39 pins total.
|
||||
Processed 2 special nets total.
|
||||
Processed 333 nets total.
|
||||
DEF read: Processed 6655 lines.
|
||||
Root cell box:
|
||||
width x height ( llx, lly ), ( urx, ury ) area (units^2)
|
||||
|
||||
microns: 75.000 x 75.000 ( 0.000, 0.000), ( 75.000, 75.000) 5625.000
|
||||
lambda: 7500.00 x 7500.00 ( 0.00, 0.00 ), ( 7500.00, 7500.00) 56250000.00
|
||||
internal: 15000 x 15000 ( 0, 0 ), ( 15000, 15000) 225000000
|
||||
Generating output for cell sky130_fd_sc_hd__diode_2
|
||||
Generating output for cell sky130_fd_sc_hd__fill_2
|
||||
Generating output for cell sky130_fd_sc_hd__decap_3
|
||||
Generating output for cell sky130_fd_sc_hd__dfrtp_2
|
||||
Generating output for cell sky130_fd_sc_hd__buf_16
|
||||
Generating output for cell sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
Generating output for cell sky130_fd_sc_hd__mux2_1
|
||||
Generating output for cell sky130_fd_sc_hd__nand2_2
|
||||
Generating output for cell sky130_fd_sc_hd__nor2_2
|
||||
Generating output for cell sky130_fd_sc_hd__nand3_2
|
||||
Generating output for cell sky130_fd_sc_hd__fill_1
|
||||
Generating output for cell sky130_fd_sc_hd__xnor2_2
|
||||
Generating output for cell sky130_fd_sc_hd__or2_2
|
||||
Generating output for cell sky130_fd_sc_hd__decap_4
|
||||
Generating output for cell sky130_fd_sc_hd__and2_2
|
||||
Generating output for cell sky130_fd_sc_hd__xor2_2
|
||||
Generating output for cell sky130_fd_sc_hd__a21oi_2
|
||||
Generating output for cell sky130_fd_sc_hd__a21o_2
|
||||
Generating output for cell sky130_fd_sc_hd__o22a_2
|
||||
Generating output for cell sky130_fd_sc_hd__and3_2
|
||||
Generating output for cell sky130_fd_sc_hd__or3b_2
|
||||
Generating output for cell sky130_fd_sc_hd__or3_2
|
||||
Generating output for cell sky130_fd_sc_hd__a211o_2
|
||||
Generating output for cell sky130_fd_sc_hd__o21a_2
|
||||
Generating output for cell sky130_fd_sc_hd__and4_2
|
||||
Generating output for cell sky130_fd_sc_hd__a32o_2
|
||||
Generating output for cell sky130_fd_sc_hd__a2111oi_2
|
||||
Generating output for cell sky130_fd_sc_hd__o31a_2
|
||||
Generating output for cell sky130_fd_sc_hd__nand2b_2
|
||||
Generating output for cell sky130_fd_sc_hd__o211a_2
|
||||
Generating output for cell sky130_fd_sc_hd__or4bb_2
|
||||
Generating output for cell sky130_fd_sc_hd__and3b_2
|
||||
Generating output for cell sky130_fd_sc_hd__clkbuf_1
|
||||
Generating output for cell sky130_fd_sc_hd__einvp_2
|
||||
Generating output for cell sky130_fd_sc_hd__einvn_4
|
||||
Generating output for cell sky130_fd_sc_hd__inv_2
|
||||
Generating output for cell sky130_fd_sc_hd__a31o_2
|
||||
Generating output for cell sky130_fd_sc_hd__o2bb2a_2
|
||||
Generating output for cell sky130_fd_sc_hd__decap_8
|
||||
Generating output for cell sky130_fd_sc_hd__clkinv_1
|
||||
Generating output for cell sky130_fd_sc_hd__clkinv_8
|
||||
Generating output for cell sky130_fd_sc_hd__einvn_8
|
||||
Generating output for cell sky130_fd_sc_hd__clkbuf_2
|
||||
Generating output for cell sky130_fd_sc_hd__a21bo_2
|
||||
Generating output for cell sky130_fd_sc_hd__conb_1
|
||||
Generating output for cell sky130_fd_sc_hd__einvp_1
|
||||
Generating output for cell sky130_fd_sc_hd__clkinv_2
|
||||
Generating output for cell sky130_fd_sc_hd__o21ai_2
|
||||
Generating output for cell sky130_fd_sc_hd__a22o_2
|
||||
Generating output for cell sky130_fd_sc_hd__or4_2
|
||||
Generating output for cell sky130_fd_sc_hd__and2b_2
|
||||
Generating output for cell sky130_fd_sc_hd__o221a_2
|
||||
Generating output for cell digital_pll
|
||||
[INFO]: GDS Write Complete
|
||||
|
|
@ -0,0 +1,206 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Reading LEF data from file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef.
|
||||
This action cannot be undone.
|
||||
LEF read, Line 78 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 79 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 112 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 114 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 115 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 121 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 122 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 123 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 156 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 164 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 165 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 167 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 168 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 169 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 206 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 207 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 209 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 210 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 211 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 248 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 249 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 251 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 252 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 253 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 290 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 291 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read: Processed 797 lines.
|
||||
digital_pll: 10000 rects
|
||||
[INFO]: Writing abstract LEF
|
||||
Generating LEF output /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.lef for cell digital_pll:
|
||||
Diagnostic: Write LEF header for cell digital_pll
|
||||
Diagnostic: Writing LEF output for cell digital_pll
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__einvp_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__einvp_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__einvp_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkinv_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__clkinv_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkinv_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__einvn_4" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__einvn_4.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__einvn_4.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__einvn_8" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__einvn_8.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__einvn_8.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__einvp_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__einvp_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__einvp_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__clkbuf_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkbuf_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__or2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__or2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__or2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__conb_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__conb_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__conb_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkinv_8" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__clkinv_8.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkinv_8.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkinv_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__clkinv_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkinv_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__clkbuf_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__clkbuf_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__buf_16" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__buf_16.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__buf_16.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__dfrtp_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__dfrtp_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__dfrtp_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nor2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__nor2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nor2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nand2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__nand2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nand2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a22o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__a22o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a22o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a21o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__a21o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a21o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and3b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__and3b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and3b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a32o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__a32o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a32o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__or3_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__or3_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__or3_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o21ai_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__o21ai_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o21ai_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and3_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__and3_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and3_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o221a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__o221a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o221a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o22a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__o22a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o22a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o211a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__o211a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o211a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a211o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__a211o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a211o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o31a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__o31a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o31a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nand2b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__nand2b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nand2b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and2b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__and2b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and2b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__mux2_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__mux2_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__mux2_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__nand3_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__nand3_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__nand3_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a21oi_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__a21oi_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a21oi_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__xnor2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__xnor2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__xnor2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o21a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__o21a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o21a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__and2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__o2bb2a_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__o2bb2a_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__o2bb2a_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__xor2_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__xor2_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__xor2_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a21bo_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__a21bo_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a21bo_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__or4_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__or4_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__or4_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__and4_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__and4_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__and4_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__or3b_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__or3b_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__or3b_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__or4bb_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__or4bb_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__or4bb_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a2111oi_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__a2111oi_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a2111oi_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__a31o_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__a31o_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__a31o_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__inv_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__inv_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__inv_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__tapvpwrvgnd_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__tapvpwrvgnd_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__tapvpwrvgnd_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_3" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__decap_3.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_3.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__fill_1" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__fill_1.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__fill_1.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__fill_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__fill_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__fill_2.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_8" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__decap_8.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_8.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__decap_4" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__decap_4.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__decap_4.mag.
|
||||
The discovered version will be used.
|
||||
Warning: Parent cell lists instance of "sky130_fd_sc_hd__diode_2" at bad file path /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/sky130_fd_sc_hd__diode_2.mag.
|
||||
The cell exists in the search paths at /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/maglef/sky130_fd_sc_hd__diode_2.mag.
|
||||
The discovered version will be used.
|
||||
Diagnostic: Scale value is 0.005000
|
||||
[INFO]: LEF Write Complete
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Reading LEF data from file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.lef.
|
||||
This action cannot be undone.
|
||||
LEF read: Processed 402 lines.
|
||||
[INFO]: DONE GENERATING MAGLEF VIEW
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
|
||||
Input: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
|
||||
Output: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.klayout.gds
|
||||
Design: digital_pll
|
||||
Technology File: /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/klayout/tech/sky130A.lyt
|
||||
GDS File List: ['/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds']
|
||||
LEF File: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef
|
||||
|
||||
[INFO] Clearing cells...
|
||||
[INFO] Merging GDS files...
|
||||
/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds
|
||||
[INFO] Copying toplevel cell 'digital_pll'
|
||||
WARNING: no fill config file specified
|
||||
[INFO] Checking for missing GDS...
|
||||
[INFO] All LEF cells have matching GDS cells
|
||||
[INFO] Writing out GDS '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.klayout.gds'
|
||||
[INFO] Done.
|
||||
|
|
@ -0,0 +1,820 @@
|
|||
First Layout: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.gds
|
||||
Second Layout: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.klayout.gds
|
||||
Design Name: digital_pll
|
||||
Output GDS will be: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.xor.xml
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.gds ..
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.klayout.gds ..
|
||||
--- Running XOR for 10/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 144 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 144 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 144
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 144 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
--- Running XOR for 11/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 11/1 ---
|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 11/2 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 12/0 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 122/16 ---
|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 13/0 ---
|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 8 (flat) 4 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 8
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 8 (flat) 4 (hierarchical)
|
||||
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|
||||
--- Running XOR for 13/1 ---
|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
--- Running XOR for 13/2 ---
|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 3 (flat) 3 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 3
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 3 (flat) 3 (hierarchical)
|
||||
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|
||||
--- Running XOR for 14/0 ---
|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 1 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 1
|
||||
"output" in: xor.drc:40
|
||||
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|
||||
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|
||||
--- Running XOR for 235/4 ---
|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 1 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 1
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 1 (flat) 1 (hierarchical)
|
||||
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|
||||
--- Running XOR for 236/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 478 (flat) 49 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 478 (flat) 49 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 348.00M
|
||||
--- Running XOR for 3/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1164 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 1164 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 1164
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 1164 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
--- Running XOR for 4/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
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|
||||
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|
||||
Elapsed: 0.010s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 1164 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 1164
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 1164 (flat) 1 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
--- Running XOR for 5/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 4270 (flat) 1920 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 4270 (flat) 1920 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 4270
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 4270 (flat) 1920 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
--- Running XOR for 6/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1334 (flat) 7 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 1334 (flat) 7 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 1334
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 1334 (flat) 7 (hierarchical)
|
||||
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|
||||
--- Running XOR for 64/16 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 571 (flat) 51 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 349.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 64/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 621 (flat) 52 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
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|
||||
Polygons (raw): 621 (flat) 52 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 348.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 64/5 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
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|
||||
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|
||||
--- Running XOR for 64/59 ---
|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 348.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 65/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1235 (flat) 136 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1235 (flat) 136 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 348.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 65/44 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 100 (flat) 2 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
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|
||||
Polygons (raw): 100 (flat) 2 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 66/15 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 2 (flat) 2 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 2 (flat) 2 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 66/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1610 (flat) 216 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 1610 (flat) 216 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 348.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.040s Memory: 349.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 66/44 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 9786 (flat) 1291 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 9786 (flat) 1291 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.050s Memory: 349.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 67/16 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 3430 (flat) 338 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 3430 (flat) 338 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.020s Memory: 349.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 67/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 4910 (flat) 1548 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 3746 (flat) 384 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 349.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 96 (flat) 96 (hierarchical)
|
||||
Elapsed: 0.060s Memory: 352.00M
|
||||
XOR differences: 96
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 96 (flat) 96 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
--- Running XOR for 67/44 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 7822 (flat) 1960 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 6658 (flat) 796 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 1164 (flat) 1164 (hierarchical)
|
||||
Elapsed: 0.030s Memory: 352.00M
|
||||
XOR differences: 1164
|
||||
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||||
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|
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
Elapsed: 0.030s Memory: 352.00M
|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
XOR differences: 15
|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
XOR differences: 2193
|
||||
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|
||||
Polygons (raw): 2193 (flat) 2193 (hierarchical)
|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Polygons (raw): 229 (flat) 229 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
XOR differences: 229
|
||||
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|
||||
Polygons (raw): 229 (flat) 229 (hierarchical)
|
||||
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|
||||
--- Running XOR for 7/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 2227 (flat) 921 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
XOR differences: 2227
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 2227 (flat) 921 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
--- Running XOR for 7/1 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
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|
||||
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|
||||
--- Running XOR for 7/2 ---
|
||||
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|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 15 (flat) 15 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
XOR differences: 15
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 15 (flat) 15 (hierarchical)
|
||||
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|
||||
--- Running XOR for 70/16 ---
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 22 (flat) 22 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
XOR differences: 22
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 22 (flat) 22 (hierarchical)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 305 (flat) 305 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
XOR differences: 305
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 305 (flat) 305 (hierarchical)
|
||||
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|
||||
--- Running XOR for 70/44 ---
|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 144 (flat) 144 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 352.00M
|
||||
XOR differences: 144
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 144 (flat) 144 (hierarchical)
|
||||
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|
||||
--- Running XOR for 71/16 ---
|
||||
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|
||||
Polygons (raw): 3 (flat) 3 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
XOR differences: 3
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 3 (flat) 3 (hierarchical)
|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
XOR differences: 3
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 3 (flat) 3 (hierarchical)
|
||||
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|
||||
--- Running XOR for 71/44 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 5 (flat) 5 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
XOR differences: 5
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 5 (flat) 5 (hierarchical)
|
||||
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|
||||
--- Running XOR for 72/16 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
XOR differences: 3
|
||||
"output" in: xor.drc:40
|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
XOR differences: 3
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 3 (flat) 3 (hierarchical)
|
||||
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|
||||
--- Running XOR for 78/44 ---
|
||||
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||||
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|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
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|
||||
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|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 353.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
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|
||||
--- Running XOR for 8/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 229 (flat) 5 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
XOR differences: 229
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 229 (flat) 5 (hierarchical)
|
||||
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|
||||
--- Running XOR for 81/23 ---
|
||||
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|
||||
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|
||||
Elapsed: 0.010s Memory: 353.00M
|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
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|
||||
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|
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--- Running XOR for 81/4 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 353.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
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|
||||
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|
||||
--- Running XOR for 83/44 ---
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"^" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
--- Running XOR for 9/0 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 253 (flat) 99 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
XOR differences: 253
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 253 (flat) 99 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 353.00M
|
||||
--- Running XOR for 9/1 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
"input" in: xor.drc:38
|
||||
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|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
--- Running XOR for 9/2 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 22 (flat) 22 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 22 (flat) 22 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
XOR differences: 22
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 22 (flat) 22 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
--- Running XOR for 93/44 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 671 (flat) 53 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 671 (flat) 53 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 353.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
--- Running XOR for 94/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 671 (flat) 53 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 354.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 671 (flat) 53 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 354.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
--- Running XOR for 95/20 ---
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 425 (flat) 56 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
"input" in: xor.drc:38
|
||||
Polygons (raw): 425 (flat) 56 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
"^" in: xor.drc:38
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.010s Memory: 354.00M
|
||||
XOR differences: 0
|
||||
"output" in: xor.drc:40
|
||||
Polygons (raw): 0 (flat) 0 (hierarchical)
|
||||
Elapsed: 0.000s Memory: 354.00M
|
||||
Writing report database: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.xor.xml ..
|
||||
Total elapsed: 0.820s Memory: 354.00M
|
||||
|
|
@ -0,0 +1 @@
|
|||
Total XOR differences = 17432
|
||||
|
|
@ -0,0 +1,106 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Reading LEF data from file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef.
|
||||
This action cannot be undone.
|
||||
LEF read, Line 78 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 79 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 112 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 114 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 115 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 121 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 122 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 123 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 156 (Message): Unknown keyword "MINENCLOSEDAREA" in LEF file; ignoring.
|
||||
LEF read, Line 164 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 165 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 167 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 168 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 169 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 206 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 207 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 209 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 210 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 211 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 248 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 249 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read, Line 251 (Message): Unknown keyword "MAXIMUMDENSITY" in LEF file; ignoring.
|
||||
LEF read, Line 252 (Message): Unknown keyword "DENSITYCHECKWINDOW" in LEF file; ignoring.
|
||||
LEF read, Line 253 (Message): Unknown keyword "DENSITYCHECKSTEP" in LEF file; ignoring.
|
||||
LEF read, Line 290 (Message): Unknown keyword "ANTENNAMODEL" in LEF file; ignoring.
|
||||
LEF read, Line 291 (Message): Unknown keyword "ANTENNADIFFSIDEAREARATIO" in LEF file; ignoring.
|
||||
LEF read: Processed 797 lines.
|
||||
Reading DEF data from file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def.
|
||||
This action cannot be undone.
|
||||
Processed 4 vias total.
|
||||
Processed 621 subcell instances total.
|
||||
Processed 39 pins total.
|
||||
Processed 2 special nets total.
|
||||
Processed 333 nets total.
|
||||
DEF read: Processed 6655 lines.
|
||||
Processing digital_pll
|
||||
Extracting sky130_fd_sc_hd__diode_2 into sky130_fd_sc_hd__diode_2.ext:
|
||||
Extracting sky130_fd_sc_hd__fill_2 into sky130_fd_sc_hd__fill_2.ext:
|
||||
Extracting sky130_fd_sc_hd__decap_3 into sky130_fd_sc_hd__decap_3.ext:
|
||||
Extracting sky130_fd_sc_hd__dfrtp_2 into sky130_fd_sc_hd__dfrtp_2.ext:
|
||||
Extracting sky130_fd_sc_hd__buf_16 into sky130_fd_sc_hd__buf_16.ext:
|
||||
Extracting sky130_fd_sc_hd__tapvpwrvgnd_1 into sky130_fd_sc_hd__tapvpwrvgnd_1.ext:
|
||||
Extracting sky130_fd_sc_hd__mux2_1 into sky130_fd_sc_hd__mux2_1.ext:
|
||||
Extracting sky130_fd_sc_hd__nand2_2 into sky130_fd_sc_hd__nand2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__nor2_2 into sky130_fd_sc_hd__nor2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__nand3_2 into sky130_fd_sc_hd__nand3_2.ext:
|
||||
Extracting sky130_fd_sc_hd__fill_1 into sky130_fd_sc_hd__fill_1.ext:
|
||||
Extracting sky130_fd_sc_hd__xnor2_2 into sky130_fd_sc_hd__xnor2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__or2_2 into sky130_fd_sc_hd__or2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__decap_4 into sky130_fd_sc_hd__decap_4.ext:
|
||||
Extracting sky130_fd_sc_hd__and2_2 into sky130_fd_sc_hd__and2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__xor2_2 into sky130_fd_sc_hd__xor2_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a21oi_2 into sky130_fd_sc_hd__a21oi_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a21o_2 into sky130_fd_sc_hd__a21o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o22a_2 into sky130_fd_sc_hd__o22a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__and3_2 into sky130_fd_sc_hd__and3_2.ext:
|
||||
Extracting sky130_fd_sc_hd__or3b_2 into sky130_fd_sc_hd__or3b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__or3_2 into sky130_fd_sc_hd__or3_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a211o_2 into sky130_fd_sc_hd__a211o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o21a_2 into sky130_fd_sc_hd__o21a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__and4_2 into sky130_fd_sc_hd__and4_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a32o_2 into sky130_fd_sc_hd__a32o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a2111oi_2 into sky130_fd_sc_hd__a2111oi_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o31a_2 into sky130_fd_sc_hd__o31a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__nand2b_2 into sky130_fd_sc_hd__nand2b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o211a_2 into sky130_fd_sc_hd__o211a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__or4bb_2 into sky130_fd_sc_hd__or4bb_2.ext:
|
||||
Extracting sky130_fd_sc_hd__and3b_2 into sky130_fd_sc_hd__and3b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__clkbuf_1 into sky130_fd_sc_hd__clkbuf_1.ext:
|
||||
Extracting sky130_fd_sc_hd__einvp_2 into sky130_fd_sc_hd__einvp_2.ext:
|
||||
Extracting sky130_fd_sc_hd__einvn_4 into sky130_fd_sc_hd__einvn_4.ext:
|
||||
Extracting sky130_fd_sc_hd__inv_2 into sky130_fd_sc_hd__inv_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a31o_2 into sky130_fd_sc_hd__a31o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o2bb2a_2 into sky130_fd_sc_hd__o2bb2a_2.ext:
|
||||
Extracting sky130_fd_sc_hd__decap_8 into sky130_fd_sc_hd__decap_8.ext:
|
||||
Extracting sky130_fd_sc_hd__clkinv_1 into sky130_fd_sc_hd__clkinv_1.ext:
|
||||
Extracting sky130_fd_sc_hd__clkinv_8 into sky130_fd_sc_hd__clkinv_8.ext:
|
||||
Extracting sky130_fd_sc_hd__einvn_8 into sky130_fd_sc_hd__einvn_8.ext:
|
||||
Extracting sky130_fd_sc_hd__clkbuf_2 into sky130_fd_sc_hd__clkbuf_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a21bo_2 into sky130_fd_sc_hd__a21bo_2.ext:
|
||||
Extracting sky130_fd_sc_hd__conb_1 into sky130_fd_sc_hd__conb_1.ext:
|
||||
Extracting sky130_fd_sc_hd__einvp_1 into sky130_fd_sc_hd__einvp_1.ext:
|
||||
Extracting sky130_fd_sc_hd__clkinv_2 into sky130_fd_sc_hd__clkinv_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o21ai_2 into sky130_fd_sc_hd__o21ai_2.ext:
|
||||
Extracting sky130_fd_sc_hd__a22o_2 into sky130_fd_sc_hd__a22o_2.ext:
|
||||
Extracting sky130_fd_sc_hd__or4_2 into sky130_fd_sc_hd__or4_2.ext:
|
||||
Extracting sky130_fd_sc_hd__and2b_2 into sky130_fd_sc_hd__and2b_2.ext:
|
||||
Extracting sky130_fd_sc_hd__o221a_2 into sky130_fd_sc_hd__o221a_2.ext:
|
||||
Extracting digital_pll into digital_pll.ext:
|
||||
exttospice finished.
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef
|
||||
[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
|
||||
The LEF parser will ignore this statement.
|
||||
To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef at line 930.
|
||||
|
||||
[INFO ODB-0223] Created 13 technology layers
|
||||
[INFO ODB-0224] Created 25 technology vias
|
||||
[INFO ODB-0225] Created 441 library cells
|
||||
[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/merged.nom.lef
|
||||
[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
|
||||
[INFO ODB-0128] Design: digital_pll
|
||||
[INFO ODB-0130] Created 39 pins.
|
||||
[INFO ODB-0131] Created 621 components and 3575 component-terminals.
|
||||
[INFO ODB-0132] Created 2 special nets and 2384 connections.
|
||||
[INFO ODB-0133] Created 333 nets and 1190 connections.
|
||||
[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.def
|
||||
Top-level design name: digital_pll
|
||||
Found default power net 'VPWR'
|
||||
Found default ground net 'VGND'
|
||||
Found 1 power ports.
|
||||
Found 1 ground ports.
|
||||
Modified power connections of 621/621 cells.
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.odb
|
||||
Setting global connections for newly added cells...
|
||||
[WARNING] Did not save OpenROAD database!
|
||||
Writing netlist to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/26-digital_pll.nl.v...
|
||||
Writing powered netlist to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/26-digital_pll.pnl.v...
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,3 @@
|
|||
LVS reports no net, device, pin, or property mismatches.
|
||||
|
||||
Total errors = 0
|
||||
|
|
@ -0,0 +1,349 @@
|
|||
Netgen 1.5.234 compiled on Sun Oct 9 10:24:01 UTC 2022
|
||||
Warning: netgen command 'format' use fully-qualified name '::netgen::format'
|
||||
Warning: netgen command 'global' use fully-qualified name '::netgen::global'
|
||||
Generating JSON file result
|
||||
Reading netlist file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.spice
|
||||
Reading netlist file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/26-digital_pll.pnl.v
|
||||
Warning: A case-insensitive file has been read and so the verilog file must be treated case-insensitive to match.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__inv_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__xnor2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__xor2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__mux2_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nand2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__or2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nor2_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a21o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a211o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a31o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o211a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nand3_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a32o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a21oi_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__or3_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o22a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a2111oi_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o21a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o31a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__or4bb_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and3_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__or3b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and4_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__or4_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a21bo_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o21ai_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o2bb2a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__nand2b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and2b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__a22o_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__o221a_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__and3b_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__dfrtp_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__buf_16.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkbuf_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkbuf_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__einvp_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__einvn_8.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__einvn_4.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkinv_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkinv_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__clkinv_8.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__conb_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__einvp_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__decap_3.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__tapvpwrvgnd_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__diode_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__fill_2.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__fill_1.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__decap_4.
|
||||
Creating placeholder cell definition for module sky130_fd_sc_hd__decap_8.
|
||||
Reading setup file /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl
|
||||
Comparison output logged to file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/logs/signoff/29-digital_pll.lef.log
|
||||
Logging to file "/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/logs/signoff/29-digital_pll.lef.log" enabled
|
||||
Circuit sky130_fd_sc_hd__and3_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nor2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkinv_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a32o_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o211a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__xor2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a21o_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__fill_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__einvp_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__einvn_8 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__and2b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nand2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nand2b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__or2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__xnor2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__einvn_4 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__fill_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o21ai_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o21a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a21oi_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__diode_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkbuf_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a22o_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__and2_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o22a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkbuf_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__decap_3 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__or3_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__mux2_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__and4_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__decap_8 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__dfrtp_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__or3b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a211o_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a21bo_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__einvp_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__or4bb_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__inv_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__tapvpwrvgnd_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__decap_4 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__nand3_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o221a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o2bb2a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__and3b_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__buf_16 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkinv_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__o31a_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__clkinv_8 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__or4_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__conb_1 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a2111oi_2 contains no devices.
|
||||
Circuit sky130_fd_sc_hd__a31o_2 contains no devices.
|
||||
|
||||
Contents of circuit 1: Circuit: 'digital_pll'
|
||||
Circuit digital_pll contains 621 device instances.
|
||||
Class: sky130_fd_sc_hd__a31o_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21o_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__or4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__and3b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__xor2_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__dfrtp_2 instances: 23
|
||||
Class: sky130_fd_sc_hd__and4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__inv_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__clkbuf_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__or3_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__nand3_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__conb_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__and2b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21bo_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__buf_16 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkinv_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_8 instances: 2
|
||||
Class: sky130_fd_sc_hd__and3_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__decap_3 instances: 51
|
||||
Class: sky130_fd_sc_hd__decap_4 instances: 5
|
||||
Class: sky130_fd_sc_hd__decap_8 instances: 3
|
||||
Class: sky130_fd_sc_hd__or2_2 instances: 22
|
||||
Class: sky130_fd_sc_hd__a2111oi_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_2 instances: 26
|
||||
Class: sky130_fd_sc_hd__nand2_2 instances: 16
|
||||
Class: sky130_fd_sc_hd__mux2_1 instances: 10
|
||||
Class: sky130_fd_sc_hd__and2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o22a_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__xnor2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o221a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o211a_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__nand2b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__diode_2 instances: 94
|
||||
Class: sky130_fd_sc_hd__a211o_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__or3b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__or4bb_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a32o_2 instances: 8
|
||||
Class: sky130_fd_sc_hd__a22o_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__o31a_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o2bb2a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21a_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__einvn_4 instances: 13
|
||||
Class: sky130_fd_sc_hd__einvn_8 instances: 13
|
||||
Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances: 50
|
||||
Class: sky130_fd_sc_hd__o21ai_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__a21oi_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__fill_1 instances: 76
|
||||
Class: sky130_fd_sc_hd__fill_2 instances: 17
|
||||
Class: sky130_fd_sc_hd__nor2_2 instances: 36
|
||||
Circuit contains 336 nets.
|
||||
Contents of circuit 2: Circuit: 'digital_pll'
|
||||
Circuit digital_pll contains 621 device instances.
|
||||
Class: sky130_fd_sc_hd__a31o_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21o_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__or4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__and3b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__xor2_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__dfrtp_2 instances: 23
|
||||
Class: sky130_fd_sc_hd__and4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__inv_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__clkbuf_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__or3_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__nand3_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__conb_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__and2b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21bo_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__buf_16 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkinv_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_8 instances: 2
|
||||
Class: sky130_fd_sc_hd__and3_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__decap_3 instances: 51
|
||||
Class: sky130_fd_sc_hd__decap_4 instances: 5
|
||||
Class: sky130_fd_sc_hd__decap_8 instances: 3
|
||||
Class: sky130_fd_sc_hd__or2_2 instances: 22
|
||||
Class: sky130_fd_sc_hd__a2111oi_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_2 instances: 26
|
||||
Class: sky130_fd_sc_hd__nand2_2 instances: 16
|
||||
Class: sky130_fd_sc_hd__mux2_1 instances: 10
|
||||
Class: sky130_fd_sc_hd__and2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o22a_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__xnor2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o221a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o211a_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__nand2b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__diode_2 instances: 94
|
||||
Class: sky130_fd_sc_hd__a211o_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__or3b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__or4bb_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a32o_2 instances: 8
|
||||
Class: sky130_fd_sc_hd__a22o_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__o31a_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o2bb2a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21a_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__einvn_4 instances: 13
|
||||
Class: sky130_fd_sc_hd__einvn_8 instances: 13
|
||||
Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances: 50
|
||||
Class: sky130_fd_sc_hd__o21ai_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__a21oi_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__fill_1 instances: 76
|
||||
Class: sky130_fd_sc_hd__fill_2 instances: 17
|
||||
Class: sky130_fd_sc_hd__nor2_2 instances: 36
|
||||
Circuit contains 336 nets.
|
||||
|
||||
Circuit was modified by parallel/series device merging.
|
||||
New circuit summary:
|
||||
|
||||
Contents of circuit 1: Circuit: 'digital_pll'
|
||||
Circuit digital_pll contains 366 device instances.
|
||||
Class: sky130_fd_sc_hd__a31o_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21o_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__or4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__and3b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__xor2_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__dfrtp_2 instances: 23
|
||||
Class: sky130_fd_sc_hd__and4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__inv_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__clkbuf_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__or3_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__nand3_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__conb_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__and2b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21bo_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__buf_16 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkinv_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_8 instances: 2
|
||||
Class: sky130_fd_sc_hd__and3_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__decap_3 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_4 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_8 instances: 1
|
||||
Class: sky130_fd_sc_hd__or2_2 instances: 22
|
||||
Class: sky130_fd_sc_hd__a2111oi_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_2 instances: 26
|
||||
Class: sky130_fd_sc_hd__nand2_2 instances: 16
|
||||
Class: sky130_fd_sc_hd__mux2_1 instances: 10
|
||||
Class: sky130_fd_sc_hd__and2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o22a_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__xnor2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o221a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o211a_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__nand2b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__diode_2 instances: 35
|
||||
Class: sky130_fd_sc_hd__a211o_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__or3b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__or4bb_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a32o_2 instances: 8
|
||||
Class: sky130_fd_sc_hd__a22o_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__o31a_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o2bb2a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21a_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__einvn_4 instances: 13
|
||||
Class: sky130_fd_sc_hd__einvn_8 instances: 13
|
||||
Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21ai_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__a21oi_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__fill_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__fill_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__nor2_2 instances: 36
|
||||
Circuit contains 336 nets.
|
||||
Contents of circuit 2: Circuit: 'digital_pll'
|
||||
Circuit digital_pll contains 366 device instances.
|
||||
Class: sky130_fd_sc_hd__a31o_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21o_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__or4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__and3b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__xor2_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__dfrtp_2 instances: 23
|
||||
Class: sky130_fd_sc_hd__and4_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__inv_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__clkbuf_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkbuf_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__or3_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__nand3_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__conb_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__and2b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a21bo_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__buf_16 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_1 instances: 13
|
||||
Class: sky130_fd_sc_hd__clkinv_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__clkinv_8 instances: 2
|
||||
Class: sky130_fd_sc_hd__and3_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__decap_3 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_4 instances: 1
|
||||
Class: sky130_fd_sc_hd__decap_8 instances: 1
|
||||
Class: sky130_fd_sc_hd__or2_2 instances: 22
|
||||
Class: sky130_fd_sc_hd__a2111oi_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__einvp_2 instances: 26
|
||||
Class: sky130_fd_sc_hd__nand2_2 instances: 16
|
||||
Class: sky130_fd_sc_hd__mux2_1 instances: 10
|
||||
Class: sky130_fd_sc_hd__and2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o22a_2 instances: 5
|
||||
Class: sky130_fd_sc_hd__xnor2_2 instances: 11
|
||||
Class: sky130_fd_sc_hd__o221a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o211a_2 instances: 7
|
||||
Class: sky130_fd_sc_hd__nand2b_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__diode_2 instances: 35
|
||||
Class: sky130_fd_sc_hd__a211o_2 instances: 2
|
||||
Class: sky130_fd_sc_hd__or3b_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__or4bb_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__a32o_2 instances: 8
|
||||
Class: sky130_fd_sc_hd__a22o_2 instances: 12
|
||||
Class: sky130_fd_sc_hd__o31a_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__o2bb2a_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21a_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__einvn_4 instances: 13
|
||||
Class: sky130_fd_sc_hd__einvn_8 instances: 13
|
||||
Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__o21ai_2 instances: 3
|
||||
Class: sky130_fd_sc_hd__a21oi_2 instances: 6
|
||||
Class: sky130_fd_sc_hd__fill_1 instances: 1
|
||||
Class: sky130_fd_sc_hd__fill_2 instances: 1
|
||||
Class: sky130_fd_sc_hd__nor2_2 instances: 36
|
||||
Circuit contains 336 nets.
|
||||
|
||||
Circuit 1 contains 366 devices, Circuit 2 contains 366 devices.
|
||||
Circuit 1 contains 336 nets, Circuit 2 contains 336 nets.
|
||||
|
||||
|
||||
Final result:
|
||||
Circuits match uniquely.
|
||||
.
|
||||
Logging to file "/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/logs/signoff/29-digital_pll.lef.log" disabled
|
||||
LVS Done.
|
||||
|
|
@ -0,0 +1,80 @@
|
|||
|
||||
Magic 8.3 revision 324 - Compiled on Thu Sep 15 11:38:02 UTC 2022.
|
||||
Starting magic under Tcl interpreter
|
||||
Using the terminal as the console.
|
||||
Using NULL graphics device.
|
||||
Processing system .magicrc file
|
||||
Sourcing design .magicrc for technology sky130A ...
|
||||
2 Magic internal units = 1 Lambda
|
||||
Input style sky130(vendor): scaleFactor=2, multiplier=2
|
||||
The following types are not handled by extraction and will be treated as non-electrical types:
|
||||
ubm
|
||||
Scaled tech values by 2 / 1 to match internal grid scaling
|
||||
Loading sky130A Device Generator Menu ...
|
||||
Using technology "sky130A", version 1.0.341-2-gde752ec
|
||||
Warning: Calma reading is not undoable! I hope that's OK.
|
||||
Library written using GDS-II Release 3.0
|
||||
Library name: digital_pll
|
||||
Reading "sky130_fd_sc_hd__diode_2".
|
||||
Reading "sky130_fd_sc_hd__fill_2".
|
||||
Reading "sky130_fd_sc_hd__decap_3".
|
||||
Reading "sky130_fd_sc_hd__dfrtp_2".
|
||||
Reading "sky130_fd_sc_hd__buf_16".
|
||||
Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
|
||||
Reading "sky130_fd_sc_hd__mux2_1".
|
||||
Reading "sky130_fd_sc_hd__nand2_2".
|
||||
Reading "sky130_fd_sc_hd__nor2_2".
|
||||
Reading "sky130_fd_sc_hd__nand3_2".
|
||||
Reading "sky130_fd_sc_hd__fill_1".
|
||||
Reading "sky130_fd_sc_hd__xnor2_2".
|
||||
Reading "sky130_fd_sc_hd__or2_2".
|
||||
Reading "sky130_fd_sc_hd__decap_4".
|
||||
Reading "sky130_fd_sc_hd__and2_2".
|
||||
Reading "sky130_fd_sc_hd__xor2_2".
|
||||
Reading "sky130_fd_sc_hd__a21oi_2".
|
||||
Reading "sky130_fd_sc_hd__a21o_2".
|
||||
Reading "sky130_fd_sc_hd__o22a_2".
|
||||
Reading "sky130_fd_sc_hd__and3_2".
|
||||
Reading "sky130_fd_sc_hd__or3b_2".
|
||||
Reading "sky130_fd_sc_hd__or3_2".
|
||||
Reading "sky130_fd_sc_hd__a211o_2".
|
||||
Reading "sky130_fd_sc_hd__o21a_2".
|
||||
Reading "sky130_fd_sc_hd__and4_2".
|
||||
Reading "sky130_fd_sc_hd__a32o_2".
|
||||
Reading "sky130_fd_sc_hd__a2111oi_2".
|
||||
Reading "sky130_fd_sc_hd__o31a_2".
|
||||
Reading "sky130_fd_sc_hd__nand2b_2".
|
||||
Reading "sky130_fd_sc_hd__o211a_2".
|
||||
Reading "sky130_fd_sc_hd__or4bb_2".
|
||||
Reading "sky130_fd_sc_hd__and3b_2".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_1".
|
||||
Reading "sky130_fd_sc_hd__einvp_2".
|
||||
Reading "sky130_fd_sc_hd__einvn_4".
|
||||
Reading "sky130_fd_sc_hd__inv_2".
|
||||
Reading "sky130_fd_sc_hd__a31o_2".
|
||||
Reading "sky130_fd_sc_hd__o2bb2a_2".
|
||||
Reading "sky130_fd_sc_hd__decap_8".
|
||||
Reading "sky130_fd_sc_hd__clkinv_1".
|
||||
Reading "sky130_fd_sc_hd__clkinv_8".
|
||||
Reading "sky130_fd_sc_hd__einvn_8".
|
||||
Reading "sky130_fd_sc_hd__clkbuf_2".
|
||||
Reading "sky130_fd_sc_hd__a21bo_2".
|
||||
Reading "sky130_fd_sc_hd__conb_1".
|
||||
Reading "sky130_fd_sc_hd__einvp_1".
|
||||
Reading "sky130_fd_sc_hd__clkinv_2".
|
||||
Reading "sky130_fd_sc_hd__o21ai_2".
|
||||
Reading "sky130_fd_sc_hd__a22o_2".
|
||||
Reading "sky130_fd_sc_hd__or4_2".
|
||||
Reading "sky130_fd_sc_hd__and2b_2".
|
||||
Reading "sky130_fd_sc_hd__o221a_2".
|
||||
Reading "digital_pll".
|
||||
[INFO]: Loading digital_pll
|
||||
|
||||
DRC style is now "drc(full)"
|
||||
Loading DRC CIF style.
|
||||
No errors found.
|
||||
[INFO]: COUNT: 0
|
||||
[INFO]: Should be divided by 3 or 4
|
||||
[INFO]: DRC Checking DONE (/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/drc.rpt)
|
||||
[INFO]: Saving mag view with DRC errors (/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/signoff/digital_pll.drc.mag)
|
||||
[INFO]: Saved
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
|
||||
This program is licensed under the BSD-3 license. See the LICENSE file for details.
|
||||
Components of this program may be licensed under more restrictive licenses which must be honored.
|
||||
Reading /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/results/routing/digital_pll.odb
|
||||
[INFO ANT-0002] Found 0 net violations.
|
||||
[INFO ANT-0001] Found 0 pin violations.
|
||||
|
|
@ -0,0 +1,145 @@
|
|||
CVC: Circuit Validation Check Version 1.1.0
|
||||
CVC: Log output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt
|
||||
CVC: Error output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt.error.gz
|
||||
CVC: Debug output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt.debug.gz
|
||||
CVC: Start: Thu Oct 13 13:18:00 2022
|
||||
|
||||
Using the following parameters for CVC (Circuit Validation Check) from /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/cvcrc
|
||||
CVC_TOP = 'digital_pll'
|
||||
CVC_NETLIST = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/digital_pll.cdl'
|
||||
CVC_MODE = 'digital_pll'
|
||||
CVC_MODEL_FILE = '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/models'
|
||||
CVC_POWER_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/digital_pll.power'
|
||||
CVC_FUSE_FILE = ''
|
||||
CVC_REPORT_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt'
|
||||
CVC_REPORT_TITLE = 'CVC $CVC_TOP'
|
||||
CVC_CIRCUIT_ERROR_LIMIT = '100'
|
||||
CVC_SEARCH_LIMIT = '100'
|
||||
CVC_LEAK_LIMIT = '0.0002'
|
||||
CVC_SOI = 'false'
|
||||
CVC_SCRC = 'false'
|
||||
CVC_VTH_GATES = 'false'
|
||||
CVC_MIN_VTH_GATES = 'false'
|
||||
CVC_IGNORE_VTH_FLOATING = 'false'
|
||||
CVC_IGNORE_NO_LEAK_FLOATING = 'false'
|
||||
CVC_LEAK_OVERVOLTAGE = 'true'
|
||||
CVC_LOGIC_DIODES = 'false'
|
||||
CVC_ANALOG_GATES = 'true'
|
||||
CVC_BACKUP_RESULTS = 'false'
|
||||
CVC_MOS_DIODE_ERROR_THRESHOLD = '0'
|
||||
CVC_SHORT_ERROR_THRESHOLD = '0'
|
||||
CVC_BIAS_ERROR_THRESHOLD = '0'
|
||||
CVC_FORWARD_ERROR_THRESHOLD = '0'
|
||||
CVC_FLOATING_ERROR_THRESHOLD = '0'
|
||||
CVC_GATE_ERROR_THRESHOLD = '0'
|
||||
CVC_LEAK?_ERROR_THRESHOLD = '0'
|
||||
CVC_EXPECTED_ERROR_THRESHOLD = '0'
|
||||
CVC_OVERVOLTAGE_ERROR_THRESHOLD = '0'
|
||||
CVC_PARALLEL_CIRCUIT_PORT_LIMIT = '0'
|
||||
CVC_CELL_ERROR_LIMIT_FILE = ''
|
||||
CVC_CELL_CHECKSUM_FILE = ''
|
||||
CVC_LARGE_CIRCUIT_SIZE = '10000000'
|
||||
CVC_NET_CHECK_FILE = ''
|
||||
CVC_MODEL_CHECK_FILE = ''
|
||||
End of parameters
|
||||
|
||||
CVC: Reading device model settings...
|
||||
CVC: Reading power settings...
|
||||
CVC: Parsing netlist /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/digital_pll.cdl
|
||||
|
||||
Cdl fixed data size 29257
|
||||
Usage CDL: Time: 0 Memory: 6924 I/O: 376 Swap: 0
|
||||
CVC: Counting and linking...
|
||||
CVC: Assigning IDs ...
|
||||
Usage DB: Time: 0 Memory: 7180 I/O: 376 Swap: 0
|
||||
CVC: 622(622) instances, 1368(1368) nets, 2706(2706) devices.
|
||||
Setting power for mode...
|
||||
Setting models...
|
||||
CVC: Setting models ...
|
||||
Setting model tolerances...
|
||||
CVC: Shorting switches...
|
||||
model short...
|
||||
Shorted 2 short
|
||||
Setting instance power...
|
||||
CVC: Linking devices...
|
||||
|
||||
Usage EQUIV: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 44
|
||||
CVC: Shorting non conducting resistors...
|
||||
CVC: Calculating resistor voltages...
|
||||
Usage RES: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 44
|
||||
CVC: Calculating min/max voltages...
|
||||
Processing trivial nets found 335 trivial nets
|
||||
CVC: Ignoring invalid calculations...
|
||||
CVC: Removed 0 calculations
|
||||
Copying master nets
|
||||
CVC: Ignoring non-conducting devices...
|
||||
CVC: Ignored 0 devices
|
||||
Usage MIN/MAX1: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 613
|
||||
! Checking forward bias diode errors:
|
||||
|
||||
! Checking nmos source/drain vs bias errors:
|
||||
|
||||
! Checking nmos gate vs source errors:
|
||||
|
||||
! Checking pmos source/drain vs bias errors:
|
||||
|
||||
! Checking pmos gate vs source errors:
|
||||
|
||||
Usage ERROR: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Saving min/max voltages...
|
||||
CVC: Propagating Simulation voltages 1...
|
||||
Usage SIM1: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 613
|
||||
Saving simulation voltages...
|
||||
CVC: Propagating Simulation voltages 3...
|
||||
Usage SIM2: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 613
|
||||
Added 0 latch voltages
|
||||
CVC: Calculating min/max voltages...
|
||||
Processing trivial nets found 335 trivial nets
|
||||
CVC: Ignoring invalid calculations...
|
||||
CVC: Removed 0 calculations
|
||||
Copying master nets
|
||||
CVC: Ignoring non-conducting devices...
|
||||
CVC: Ignored 0 devices
|
||||
Usage MIN/MAX2: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 1182
|
||||
! Checking overvoltage errors
|
||||
|
||||
! Checking nmos possible leak errors:
|
||||
|
||||
! Checking pmos possible leak errors:
|
||||
|
||||
! Checking mos floating input errors:
|
||||
|
||||
! Checking expected values:
|
||||
|
||||
CVC: Error Counts
|
||||
CVC: Fuse Problems: 0
|
||||
CVC: Min Voltage Conflicts: 0
|
||||
CVC: Max Voltage Conflicts: 0
|
||||
CVC: Leaks: 0
|
||||
CVC: LDD drain->source: 0
|
||||
CVC: HI-Z Inputs: 0
|
||||
CVC: Forward Bias Diodes: 0
|
||||
CVC: NMOS Source vs Bulk: 0
|
||||
CVC: NMOS Gate vs Source: 0
|
||||
CVC: NMOS Possible Leaks: 0
|
||||
CVC: PMOS Source vs Bulk: 0
|
||||
CVC: PMOS Gate vs Source: 0
|
||||
CVC: PMOS Possible Leaks: 0
|
||||
CVC: Overvoltage-VBG: 0
|
||||
CVC: Overvoltage-VBS: 0
|
||||
CVC: Overvoltage-VDS: 0
|
||||
CVC: Overvoltage-VGS: 0
|
||||
CVC: Model errors: 0
|
||||
CVC: Unexpected voltage : 0
|
||||
CVC: Total: 0
|
||||
Usage Total: Time: 0 Memory: 8464 I/O: 432 Swap: 0
|
||||
Virtual net update/access 12546/308300
|
||||
CVC: Log output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt
|
||||
CVC: End: Thu Oct 13 13:18:00 2022
|
||||
|
||||
|
|
@ -0,0 +1,250 @@
|
|||
CVC: Log output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt
|
||||
CVC: Error output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt.error.gz
|
||||
CVC: Debug output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt.debug.gz
|
||||
CVC: Circuit Validation Check Version 1.1.0
|
||||
CVC: Start: Thu Oct 13 13:18:00 2022
|
||||
|
||||
Using the following parameters for CVC (Circuit Validation Check) from /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/cvcrc
|
||||
CVC_TOP = 'digital_pll'
|
||||
CVC_NETLIST = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/digital_pll.cdl'
|
||||
CVC_MODE = 'digital_pll'
|
||||
CVC_MODEL_FILE = '/home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/models'
|
||||
CVC_POWER_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/digital_pll.power'
|
||||
CVC_FUSE_FILE = ''
|
||||
CVC_REPORT_FILE = '/home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt'
|
||||
CVC_REPORT_TITLE = 'CVC $CVC_TOP'
|
||||
CVC_CIRCUIT_ERROR_LIMIT = '100'
|
||||
CVC_SEARCH_LIMIT = '100'
|
||||
CVC_LEAK_LIMIT = '0.0002'
|
||||
CVC_SOI = 'false'
|
||||
CVC_SCRC = 'false'
|
||||
CVC_VTH_GATES = 'false'
|
||||
CVC_MIN_VTH_GATES = 'false'
|
||||
CVC_IGNORE_VTH_FLOATING = 'false'
|
||||
CVC_IGNORE_NO_LEAK_FLOATING = 'false'
|
||||
CVC_LEAK_OVERVOLTAGE = 'true'
|
||||
CVC_LOGIC_DIODES = 'false'
|
||||
CVC_ANALOG_GATES = 'true'
|
||||
CVC_BACKUP_RESULTS = 'false'
|
||||
CVC_MOS_DIODE_ERROR_THRESHOLD = '0'
|
||||
CVC_SHORT_ERROR_THRESHOLD = '0'
|
||||
CVC_BIAS_ERROR_THRESHOLD = '0'
|
||||
CVC_FORWARD_ERROR_THRESHOLD = '0'
|
||||
CVC_FLOATING_ERROR_THRESHOLD = '0'
|
||||
CVC_GATE_ERROR_THRESHOLD = '0'
|
||||
CVC_LEAK?_ERROR_THRESHOLD = '0'
|
||||
CVC_EXPECTED_ERROR_THRESHOLD = '0'
|
||||
CVC_OVERVOLTAGE_ERROR_THRESHOLD = '0'
|
||||
CVC_PARALLEL_CIRCUIT_PORT_LIMIT = '0'
|
||||
CVC_CELL_ERROR_LIMIT_FILE = ''
|
||||
CVC_CELL_CHECKSUM_FILE = ''
|
||||
CVC_LARGE_CIRCUIT_SIZE = '10000000'
|
||||
CVC_NET_CHECK_FILE = ''
|
||||
CVC_MODEL_CHECK_FILE = ''
|
||||
End of parameters
|
||||
|
||||
CVC: Reading device model settings...
|
||||
CVC: Reading power settings...
|
||||
CVC: Parsing netlist /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/digital_pll.cdl
|
||||
Cdl fixed data size 29257
|
||||
Usage CDL: Time: 0 Memory: 6924 I/O: 376 Swap: 0
|
||||
CVC: Counting and linking...
|
||||
CVC: Assigning IDs ...
|
||||
Usage DB: Time: 0 Memory: 7180 I/O: 376 Swap: 0
|
||||
CVC: 622(622) instances, 1368(1368) nets, 2706(2706) devices.
|
||||
CVC: Setting models ...
|
||||
Setting model tolerances...
|
||||
CVC: Shorting switches...
|
||||
Shorted 2 short
|
||||
Setting instance power...
|
||||
|
||||
ModelList> filename /home/kareem_farid/caravel/deps/openlane-new/pdk/sky130A/libs.tech/openlane/cvc/models
|
||||
Model> sky130_fd_pr__cap_mim_m3_1 0 C->capacitor Parameters>
|
||||
Model> sky130_fd_pr__cap_mim_m3_2 0 C->capacitor Parameters>
|
||||
Model> sky130_fd_pr__cap_var 0 C->capacitor Parameters>
|
||||
Model> condiode 0 D->diode Parameters> Diodes> 1-2
|
||||
Model> sky130_fd_pr__diode_pd2nw_05v5 0 D->diode Parameters> Diodes> 1-2
|
||||
Model> sky130_fd_pr__diode_pw2nd_05v5 0 D->diode Parameters> Diodes> 1-2
|
||||
Model> sky130_fd_pr__diode_pw2nd_11v0 0 D->diode Parameters> Diodes> 1-2
|
||||
Model> sky130_fd_pr__model__parasitic__diode_ps2dn 0 D->diode Parameters> Diodes> 1-2
|
||||
Model> sky130_fd_pr__model__parasitic__diode_ps2nw 0 D->diode Parameters> Diodes> 1-2
|
||||
Model> sky130_fd_pr__model__parasitic__diode_pw2dn 0 D->diode Parameters> Diodes> 1-2
|
||||
Model> nfet_01v8 1352 M->nmos Parameters> Vth=0.2 Vds=1.8 Vgs=1.8 R=L/W*7000 Diodes> 4-1 4-3
|
||||
Model> pfet_01v8_hvt 1352 M->pmos Parameters> Vth=-0.2 Vds=1.8 Vgs=1.8 R=L/W*7000 Diodes> 1-4 3-4
|
||||
Model> sky130_fd_bs_flash__special_sonosfet_star 0 M->nmos Parameters> Vth=0.2 R=L/W*7000 Diodes> 4-1 4-3
|
||||
Model> sky130_fd_pr__esd_nfet_g5v0d10v5 0 M->nmos Parameters> Vth=0.2 R=L/W*7000 Diodes> 4-1 4-3
|
||||
Model> sky130_fd_pr__nfet_01v8 0 M->nmos Parameters> Vth=0.2 Vds=1.8 Vgs=1.8 R=L/W*7000 Diodes> 4-1 4-3
|
||||
Model> sky130_fd_pr__nfet_01v8_lvt 0 M->nmos Parameters> Vth=0.1 Vds=1.8 Vgs=1.8 R=L/W*7000 Diodes> 4-1 4-3
|
||||
Model> sky130_fd_pr__nfet_03v3_nvt 0 M->nmos Parameters> Vth=0.2 Vds=3.3 Vgs=3.3 R=L/W*7000 Diodes> 4-1 4-3
|
||||
Model> sky130_fd_pr__nfet_05v0_nvt 0 M->nmos Parameters> Vth=0.2 R=L/W*7000 Diodes> 4-1 4-3
|
||||
Model> sky130_fd_pr__nfet_g5v0d10v5 0 M->nmos Parameters> Vth=0.2 R=L/W*7000 Diodes> 4-1 4-3
|
||||
Model> sky130_fd_pr__pfet_01v8 0 M->pmos Parameters> Vth=-0.2 Vds=1.8 Vgs=1.8 R=L/W*7000 Diodes> 1-4 3-4
|
||||
Model> sky130_fd_pr__pfet_01v8_hvt 0 M->pmos Parameters> Vth=-0.3 Vds=1.8 Vgs=1.8 R=L/W*7000 Diodes> 1-4 3-4
|
||||
Model> sky130_fd_pr__pfet_01v8_lvt 0 M->pmos Parameters> Vth=-0.1 Vds=1.8 Vgs=1.8 R=L/W*7000 Diodes> 1-4 3-4
|
||||
Model> sky130_fd_pr__pfet_g5v0d10v5 0 M->pmos Parameters> Vth=-0.2 R=L/W*7000 Diodes> 1-4 3-4
|
||||
Model> sky130_fd_pr__special_nfet_latch 0 M->nmos Parameters> Vth=0.2 Vds=1.8 Vgs=1.8 R=L/W*7000 Diodes> 4-1 4-3
|
||||
Model> sky130_fd_pr__special_pfet_pass 0 M->pmos Parameters> Vth=-0.2 Vds=1.8 Vgs=1.8 R=L/W*7000 Diodes> 1-4 3-4
|
||||
Model> sky130_fd_pr__pnp_05v5 0 Q->bipolar Parameters>
|
||||
Model> short 2 R->switch_on Parameters>
|
||||
Model> sky130_fd_pr__res_generic_m1 0 R->resistor Parameters> R=l/w
|
||||
Model> sky130_fd_pr__res_generic_m2 0 R->resistor Parameters> R=l/w
|
||||
Model> sky130_fd_pr__res_generic_m3 0 R->resistor Parameters> R=l/w
|
||||
Model> sky130_fd_pr__res_generic_m4 0 R->resistor Parameters> R=l/w
|
||||
Model> sky130_fd_pr__res_generic_m5 0 R->resistor Parameters> R=l/w
|
||||
Model> sky130_fd_pr__res_generic_nd 0 R->resistor Parameters> R=l/w*120
|
||||
Model> sky130_fd_pr__res_generic_nd__hv 0 R->resistor Parameters> R=l/w*114
|
||||
Model> sky130_fd_pr__res_generic_pd__hv 0 R->resistor Parameters> R=l/w*191
|
||||
Model> sky130_fd_pr__res_generic_po 0 R->resistor Parameters> R=l/w*48
|
||||
Model> sky130_fd_pr__res_high_po 0 R->resistor Parameters> R=l/w*2000
|
||||
Model> sky130_fd_pr__res_xhigh_po 0 R->resistor Parameters> R=l/w*2000
|
||||
ModelList> end
|
||||
|
||||
Power List> filename /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/tmp/signoff/digital_pll.power
|
||||
VPWR power 1.8 -> 1.8 power
|
||||
VGND power 0.0 -> 0.0 power
|
||||
dco~>std_input input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
enable~>std_input input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
osc~>std_input input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
resetb~>std_input input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
div[4:0]~>std_input input std_input
|
||||
->div[0] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->div[1] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->div[2] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->div[3] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->div[4] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
ext_trim[25:0]~>std_input input std_input
|
||||
->ext_trim[0] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[10] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[11] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[12] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[13] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[14] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[15] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[16] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[17] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[18] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[19] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[1] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[20] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[21] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[22] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[23] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[24] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[25] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[2] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[3] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[4] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[5] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[6] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[7] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[8] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
->ext_trim[9] input std_input -> min@0.0 max@1.8 input family(std_input;)
|
||||
> expected values
|
||||
> macros
|
||||
#define std_input min@VGND max@VPWR -> min@0.0 max@1.8
|
||||
Power List> end
|
||||
|
||||
CVC: Linking devices...
|
||||
Usage EQUIV: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 44
|
||||
Hash dump:parameter->resistance map
|
||||
Contains 53 buckets, 35 elements
|
||||
Element count 0, 18
|
||||
Element count 1, 35
|
||||
Unused hash: 0.34, average depth 1.00
|
||||
Hash dump:text->circuit map
|
||||
Contains 337 buckets, 438 elements
|
||||
Element count 0, 71
|
||||
Element count 1, 144
|
||||
Element count 2, 81
|
||||
Element count 3, 33
|
||||
Element count 4, 7
|
||||
Element count 5, 1
|
||||
Unused hash: 0.21, average depth 2.06
|
||||
Hash dump:string->text map
|
||||
Contains 1493 buckets, 2088 elements
|
||||
Element count 0, 377
|
||||
Element count 1, 512
|
||||
Element count 2, 340
|
||||
Element count 3, 181
|
||||
Element count 4, 67
|
||||
Element count 5, 12
|
||||
Element count 6, 3
|
||||
Element count 7, 1
|
||||
Unused hash: 0.25, average depth 2.41
|
||||
CVC: Shorting non conducting resistors...
|
||||
CVC: Calculating resistor voltages...
|
||||
Usage RES: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 44
|
||||
CVC: Calculating min/max voltages...
|
||||
Processing trivial nets found 335 trivial nets
|
||||
CVC: Ignoring invalid calculations...
|
||||
CVC: Removed 0 calculations
|
||||
Copying master nets
|
||||
CVC: Ignoring non-conducting devices...
|
||||
CVC: Ignored 0 devices
|
||||
Usage MIN/MAX1: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 613
|
||||
! Checking forward bias diode errors:
|
||||
|
||||
! Checking nmos source/drain vs bias errors:
|
||||
|
||||
! Checking nmos gate vs source errors:
|
||||
|
||||
! Checking pmos source/drain vs bias errors:
|
||||
|
||||
! Checking pmos gate vs source errors:
|
||||
|
||||
Usage ERROR: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
CVC: Propagating Simulation voltages 1...
|
||||
Usage SIM1: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 613
|
||||
CVC: Propagating Simulation voltages 3...
|
||||
Usage SIM2: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 613
|
||||
Added 0 latch voltages
|
||||
CVC: Calculating min/max voltages...
|
||||
Processing trivial nets found 335 trivial nets
|
||||
CVC: Ignoring invalid calculations...
|
||||
CVC: Removed 0 calculations
|
||||
Copying master nets
|
||||
CVC: Ignoring non-conducting devices...
|
||||
CVC: Ignored 0 devices
|
||||
Usage MIN/MAX2: Time: 0 Memory: 7808 I/O: 392 Swap: 0
|
||||
Power nets 1182
|
||||
! Checking overvoltage errors
|
||||
|
||||
! Checking nmos possible leak errors:
|
||||
|
||||
! Checking pmos possible leak errors:
|
||||
|
||||
! Checking mos floating input errors:
|
||||
|
||||
! Checking expected values:
|
||||
|
||||
CVC: Error Counts
|
||||
CVC: Fuse Problems: 0
|
||||
CVC: Min Voltage Conflicts: 0
|
||||
CVC: Max Voltage Conflicts: 0
|
||||
CVC: Leaks: 0
|
||||
CVC: LDD drain->source: 0
|
||||
CVC: HI-Z Inputs: 0
|
||||
CVC: Forward Bias Diodes: 0
|
||||
CVC: NMOS Source vs Bulk: 0
|
||||
CVC: NMOS Gate vs Source: 0
|
||||
CVC: NMOS Possible Leaks: 0
|
||||
CVC: PMOS Source vs Bulk: 0
|
||||
CVC: PMOS Gate vs Source: 0
|
||||
CVC: PMOS Possible Leaks: 0
|
||||
CVC: Overvoltage-VBG: 0
|
||||
CVC: Overvoltage-VBS: 0
|
||||
CVC: Overvoltage-VDS: 0
|
||||
CVC: Overvoltage-VGS: 0
|
||||
CVC: Model errors: 0
|
||||
CVC: Unexpected voltage : 0
|
||||
CVC: Total: 0
|
||||
Usage Total: Time: 0 Memory: 8464 I/O: 432 Swap: 0
|
||||
Virtual net update/access 12546/308300
|
||||
CVC: Log output to /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_13_06_16/reports/signoff/digital_pll.rpt
|
||||
CVC: End: Thu Oct 13 13:18:00 2022
|
||||
|
||||
Binary file not shown.
Binary file not shown.
|
|
@ -1,6 +1,6 @@
|
|||
###############################################################################
|
||||
# Created by write_sdc
|
||||
# Tue Dec 7 11:07:45 2021
|
||||
# Thu Oct 13 13:16:52 2022
|
||||
###############################################################################
|
||||
current_design digital_pll
|
||||
###############################################################################
|
||||
|
|
@ -9,7 +9,6 @@ current_design digital_pll
|
|||
create_clock -name pll_control_clock -period 6.6667 [get_pins {ringosc.ibufp01/Y}]
|
||||
set_clock_transition 0.1500 [get_clocks {pll_control_clock}]
|
||||
set_clock_uncertainty 0.2500 pll_control_clock
|
||||
set_propagated_clock [get_clocks {pll_control_clock}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {dco}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {div[0]}]
|
||||
set_input_delay 2.0000 -add_delay [get_ports {div[1]}]
|
||||
|
|
@ -52,41 +51,41 @@ set_output_delay 2.0000 -add_delay [get_ports {clockp[1]}]
|
|||
###############################################################################
|
||||
set_load -pin_load 0.0334 [get_ports {clockp[1]}]
|
||||
set_load -pin_load 0.0334 [get_ports {clockp[0]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {dco}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {enable}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {osc}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {resetb}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[4]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[3]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[2]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[1]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[0]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[25]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[24]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[23]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[22]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[21]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[20]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[19]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[18]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[17]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[16]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[15]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[14]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[13]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[12]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[11]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[10]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[9]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[8]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[7]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[6]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[5]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[4]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[3]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[2]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[1]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_1 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[0]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {dco}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {enable}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {osc}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {resetb}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[4]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[3]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[2]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[1]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {div[0]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[25]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[24]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[23]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[22]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[21]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[20]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[19]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[18]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[17]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[16]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[15]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[14]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[13]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[12]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[11]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[10]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[9]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[8]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[7]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[6]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[5]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[4]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[3]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[2]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[1]}]
|
||||
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {ext_trim[0]}]
|
||||
set_timing_derate -early 0.9500
|
||||
set_timing_derate -late 1.0500
|
||||
###############################################################################
|
||||
|
|
|
|||
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|
|
@ -0,0 +1,10 @@
|
|||
<?xml version="1.0" ?>
|
||||
<report-database>
|
||||
<categories/>
|
||||
<cells>
|
||||
<cell>
|
||||
<name>digital_pll</name>
|
||||
</cell>
|
||||
</cells>
|
||||
<items/>
|
||||
</report-database>
|
||||
|
|
@ -0,0 +1 @@
|
|||
$digital_pll 100
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
digital_pll
|
||||
----------------------------------------
|
||||
[INFO]: COUNT: 0
|
||||
[INFO]: Should be divided by 3 or 4
|
||||
|
||||
23821
spef/digital_pll.spef
23821
spef/digital_pll.spef
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Loading…
Reference in New Issue