From 08229d6a9b659ebc35a85aac6cc50d1e96eec543 Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Sun, 9 Oct 2022 05:08:12 -0700 Subject: [PATCH] Add gpio_all_bidir test but it still not working yet --- verilog/dv/cocotb/tests.json | 6 ++ verilog/dv/cocotb/tests/gpio/gpio.py | 101 +++++++++++++++++- verilog/dv/cocotb/tests/gpio/gpio_all_bidir.c | 98 +++++++++++++++++ 3 files changed, 204 insertions(+), 1 deletion(-) create mode 100644 verilog/dv/cocotb/tests/gpio/gpio_all_bidir.c diff --git a/verilog/dv/cocotb/tests.json b/verilog/dv/cocotb/tests.json index 48e08259..0c3f0ed7 100644 --- a/verilog/dv/cocotb/tests.json +++ b/verilog/dv/cocotb/tests.json @@ -39,6 +39,12 @@ "GL":["r_gl","push_gl","nightly","weekly","tape_out"], "GL_SDF":["r_sdf","weekly","tape_out"], "description":"configure all gpios as mgmt input pull down using automatic approach firmware and check them"} + ,"gpio_all_bidir" :{"level":0, + "SW":true, + "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], + "GL":["r_gl","push_gl","nightly","weekly","tape_out"], + "GL_SDF":["r_sdf","weekly","tape_out"], + "description":"configure all gpios as mgmt bidir using automatic approach firmware and check them"} ,"bitbang_cpu_all_10" :{"level":0, "SW":true, "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], diff --git a/verilog/dv/cocotb/tests/gpio/gpio.py b/verilog/dv/cocotb/tests/gpio/gpio.py index 44855a2d..6383f917 100644 --- a/verilog/dv/cocotb/tests/gpio/gpio.py +++ b/verilog/dv/cocotb/tests/gpio/gpio.py @@ -302,4 +302,103 @@ async def gpio_all_i_pd(dut): for i in range(38): if gpio[i] != "0": cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and all released") - await ClockCycles(caravelEnv.clk,1000) \ No newline at end of file + await ClockCycles(caravelEnv.clk,1000) + +@cocotb.test() +@repot_test +async def gpio_all_bidir(dut): + caravelEnv,clock = await test_configure(dut,timeout_cycles=1144980) + cpu = RiskV(dut) + cpu.cpu_force_reset() + cpu.cpu_release_reset() + uut = dut.uut + await wait_reg1(cpu,caravelEnv,0x1A) + cocotb.log.info("[TEST] finish configuring using bitbang") + i= 0x20 + for j in range(5): + await wait_reg2(cpu,caravelEnv,37-j) + cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') + if caravelEnv.monitor_gpio((37,0)).integer != i << 32: + cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i << 32)}') + await wait_reg2(cpu,caravelEnv,0) + if caravelEnv.monitor_gpio((37,0)).integer != 0: + cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') + i = i >> 1 + i |= 0x20 + + i= 0x80000000 + for j in range(32): + await wait_reg2(cpu,caravelEnv,32-j) + cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') + if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: + cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') + if caravelEnv.monitor_gpio((31,0)).integer != i : + cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') + await wait_reg2(cpu,caravelEnv,0) + if caravelEnv.monitor_gpio((37,0)).integer != 0: + cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') + + i = i >> 1 + i |= 0x80000000 + + await wait_reg1(cpu,caravelEnv,0x2A) + cocotb.log.info(f"[TEST] configuration finished") + data_in = 0x8F66FD7B + cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xBB) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xFFA88C5A + cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xCC) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xC9536346 + cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") + caravelEnv.drive_gpio_in((31,0),data_in) + await wait_reg1(cpu,caravelEnv,0xD1) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xC9536346 + data_in = 0x3F + cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD2) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xC9536346 + data_in = 0x0 + cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD3) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xC9536346 + data_in = 0x15 + cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg1(cpu,caravelEnv,0xD4) + if cpu.read_debug_reg2() == data_in: + cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") + else: + cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") + data_in = 0xC9536346 + data_in = 0x2A + cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") + caravelEnv.drive_gpio_in((37,32),data_in) + await wait_reg2(cpu,caravelEnv,0xFF) + cocotb.log.info(f"[TEST] finish") + + await ClockCycles(caravelEnv.clk, 10) diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_bidir.c b/verilog/dv/cocotb/tests/gpio/gpio_all_bidir.c new file mode 100644 index 00000000..a6280785 --- /dev/null +++ b/verilog/dv/cocotb/tests/gpio/gpio_all_bidir.c @@ -0,0 +1,98 @@ +#include +#include + +void main(){ + unsigned int i, j, k; + reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 + reg_debug_1 = 0x0; + reg_debug_2 = 0x0; + reg_hkspi_disable = 1; + + reg_mprj_io_37 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_36 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_35 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_34 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_33 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_32 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_31 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_30 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_29 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_28 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_27 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_26 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_25 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_24 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_23 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_22 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_21 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_20 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_19 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_18 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_17 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_16 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_15 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_14 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_13 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_12 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_11 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_10 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_9 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_8 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_7 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_6 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_5 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_4 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_3 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_2 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_1 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + reg_mprj_io_0 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; + + reg_mprj_xfer = 1; + while (reg_mprj_xfer == 1); + reg_debug_1 = 0x1A; // try the gpios as output + reg_mprj_datal = 0x0; + reg_mprj_datah = 0x0; + i = 0x20; + for (j = 0; j < 5; j++) { + reg_mprj_datah = i; + reg_debug_2 = 37-j; + reg_mprj_datah = 0x00000000; + reg_debug_2 = 0; + i >>=1; + i |= 0x20; + } + i = 0x80000000; + for (j = 0; j < 32; j++) { + reg_mprj_datah = 0x3f; + reg_mprj_datal = i; + reg_debug_2 = 32-j; + reg_mprj_datah = 0x00; + reg_mprj_datal = 0x00000000; + reg_debug_2 = 0; + i >>=1; + i |= 0x80000000; + } + // test input + reg_debug_1 = 0X2A; // configuration done wait environment to send 0x8F66FD7B to reg_mprj_datal + while (reg_mprj_datal != 0x8F66FD7B); + reg_debug_2 = reg_mprj_datal; + reg_debug_1 = 0XBB; // configuration done wait environment to send 0xFFA88C5A to reg_mprj_datal + while (reg_mprj_datal != 0xFFA88C5A); + reg_debug_2 = reg_mprj_datal; + reg_debug_1 = 0XCC; // configuration done wait environment to send 0xC9536346 to reg_mprj_datal + while (reg_mprj_datal != 0xC9536346); + reg_debug_2 = reg_mprj_datal; + reg_debug_1 = 0XD1; + while (reg_mprj_datah != 0x3F); + reg_debug_2 = reg_mprj_datal; + reg_debug_1 = 0XD2; + while (reg_mprj_datah != 0x0); + reg_debug_2 = reg_mprj_datal; + reg_debug_1 = 0XD3; + while (reg_mprj_datah != 0x15); + reg_debug_2 = reg_mprj_datal; + reg_debug_1 = 0XD4; + while (reg_mprj_datah != 0x2A); + + reg_debug_2=0xFF; +} \ No newline at end of file