mirror of https://github.com/efabless/caravel.git
Create memory_map.rst
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Marwan Abbas
GitHub
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.. raw:: html
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<!---
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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-->
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=========================================
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Caravel memory map vs. SPI register map
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=========================================
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================ =========================== ============================== =======================
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SPI register description signal memory map address
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================ =========================== ============================== =======================
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00 SPI status (reserved) (undefined) 2610_0000
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01 Manufacturer ID (high) mfgr_id[11:8] 2610_0006
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02 Manufacturer ID (low) mfgr_id[7:0] 2610_0005
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03 Product ID prod_id[7:0] 2610_0004
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04 User project ID mask_rev[31:24] 2610_000b
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05 User project ID mask_rev[23:16] 2610_000a
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06 User project ID mask_rev[15:8] 2610_0009
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07 User project ID mask_rev[7:0] 2610_0008
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08 PLL enables pll_dco_ena, pll_ena 2610_000c
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09 PLL bypass pll_bypass 2610_0010
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0a IRQ irq 2610_0014
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0b Reset reset 2610_0018
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0c CPU trap state trap 2610_0028
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0d PLL trim pll_trim[31:24] 2610_001f
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0e PLL trim pll_trim[23:16] 2610_001e
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0f PLL trim pll_trim[15:8] 2610_001d
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10 PLL trim pll_trim[7:0] 2610_001c
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11 PLL source pll90_sel[2:0], pll_sel[2:0] 2610_0020
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12 PLL divider pll_div[4:0] 2610_0024
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13 GPIO control serial_resetn/clock/data 2600_0000
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14 SRAM read-only control hkspi_sram_clk/csb 2610_0034
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15 SRAM read-only address hkspi_sram_addr 2610_0030
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16 SRAM read-only data hkspi_sram_data[31:24] 2610_002f
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17 SRAM read-only data hkspi_sram_data[23:16] 2610_002e
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18 SRAM read-only data hkspi_sram_data[15:8] 2610_002d
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19 SRAM read-only data hkspi_sram_data[7:0] 2610_002c
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1a Power monitor usr1/2_vcc/vdd_pwrgood 2620_0000
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1b Output redirect clk1/clk2/trap_output_dest 2620_0004
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1c Input redirect irq_8/7_inputsrc 2620_000c
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1d GPIO[0] configure gpio_configure[0][12:8] 2600_0025
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1e GPIO[0] configure gpio_configure[0][7:0] 2600_0024
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1f GPIO[1] configure gpio_configure[1][12:8] 2600_0029
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20 GPIO[1] configure gpio_configure[1][7:0] 2600_0028
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21 GPIO[2] configure gpio_configure[2][12:8] 2600_002d
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22 GPIO[2] configure gpio_configure[2][7:0] 2600_002c
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23 GPIO[3] configure gpio_configure[3][12:8] 2600_0031
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24 GPIO[3] configure gpio_configure[3][7:0] 2600_0030
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25 GPIO[4] configure gpio_configure[4][12:8] 2600_0035
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26 GPIO[4] configure gpio_configure[4][7:0] 2600_0034
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27 GPIO[5] configure gpio_configure[5][12:8] 2600_0039
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28 GPIO[5] configure gpio_configure[5][7:0] 2600_0038
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29 GPIO[6] configure gpio_configure[6][12:8] 2600_003d
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2a GPIO[6] configure gpio_configure[6][7:0] 2600_003c
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2b GPIO[7] configure gpio_configure[7][12:8] 2600_0041
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2c GPIO[7] configure gpio_configure[7][7:0] 2600_0040
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2d GPIO[8] configure gpio_configure[8][12:8] 2600_0045
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2e GPIO[8] configure gpio_configure[8][7:0] 2600_0044
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2f GPIO[9] configure gpio_configure[9][12:8] 2600_0049
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30 GPIO[9] configure gpio_configure[9][7:0] 2600_0048
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31 GPIO[10] configure gpio_configure[10][12:8] 2600_004d
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32 GPIO[10] configure gpio_configure[10][7:0] 2600_004c
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33 GPIO[11] configure gpio_configure[11][12:8] 2600_0051
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34 GPIO[11] configure gpio_configure[11][7:0] 2600_0050
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35 GPIO[12] configure gpio_configure[12][12:8] 2600_0055
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36 GPIO[12] configure gpio_configure[12][7:0] 2600_0054
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37 GPIO[13] configure gpio_configure[13][12:8] 2600_0059
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38 GPIO[13] configure gpio_configure[13][7:0] 2600_0058
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39 GPIO[14] configure gpio_configure[14][12:8] 2600_005d
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3a GPIO[14] configure gpio_configure[14][7:0] 2600_005c
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3b GPIO[15] configure gpio_configure[15][12:8] 2600_0061
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3c GPIO[15] configure gpio_configure[15][7:0] 2600_0060
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3d GPIO[16] configure gpio_configure[16][12:8] 2600_0065
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3e GPIO[16] configure gpio_configure[16][7:0] 2600_0064
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3f GPIO[17] configure gpio_configure[17][12:8] 2600_0069
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40 GPIO[17] configure gpio_configure[17][7:0] 2600_0068
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41 GPIO[18] configure gpio_configure[18][12:8] 2600_006d
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42 GPIO[18] configure gpio_configure[18][7:0] 2600_006c
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43 GPIO[19] configure gpio_configure[19][12:8] 2600_0071
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44 GPIO[19] configure gpio_configure[19][7:0] 2600_0070
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45 GPIO[20] configure gpio_configure[20][12:8] 2600_0075
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46 GPIO[20] configure gpio_configure[20][7:0] 2600_0074
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47 GPIO[21] configure gpio_configure[21][12:8] 2600_0079
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48 GPIO[21] configure gpio_configure[21][7:0] 2600_0078
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49 GPIO[22] configure gpio_configure[22][12:8] 2600_007d
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4a GPIO[22] configure gpio_configure[22][7:0] 2600_007c
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4b GPIO[23] configure gpio_configure[23][12:8] 2600_0081
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4c GPIO[23] configure gpio_configure[23][7:0] 2600_0080
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4d GPIO[24] configure gpio_configure[24][12:8] 2600_0085
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4e GPIO[24] configure gpio_configure[24][7:0] 2600_0084
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4f GPIO[25] configure gpio_configure[25][12:8] 2600_0089
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50 GPIO[25] configure gpio_configure[25][7:0] 2600_0088
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51 GPIO[26] configure gpio_configure[26][12:8] 2600_008d
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52 GPIO[26] configure gpio_configure[26][7:0] 2600_008c
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53 GPIO[27] configure gpio_configure[27][12:8] 2600_0091
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54 GPIO[27] configure gpio_configure[27][7:0] 2600_0090
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55 GPIO[28] configure gpio_configure[28][12:8] 2600_0095
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56 GPIO[28] configure gpio_configure[28][7:0] 2600_0094
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57 GPIO[29] configure gpio_configure[29][12:8] 2600_0099
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58 GPIO[29] configure gpio_configure[29][7:0] 2600_0098
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59 GPIO[30] configure gpio_configure[30][12:8] 2600_009d
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5a GPIO[30] configure gpio_configure[30][7:0] 2600_009c
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5b GPIO[31] configure gpio_configure[31][12:8] 2600_00a1
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5c GPIO[31] configure gpio_configure[31][7:0] 2600_00a0
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5d GPIO[32] configure gpio_configure[32][12:8] 2600_00a5
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5e GPIO[32] configure gpio_configure[32][7:0] 2600_00a4
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5f GPIO[33] configure gpio_configure[33][12:8] 2600_00a9
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60 GPIO[33] configure gpio_configure[33][7:0] 2600_00a8
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61 GPIO[34] configure gpio_configure[34][12:8] 2600_00ad
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62 GPIO[34] configure gpio_configure[34][7:0] 2600_00ac
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63 GPIO[35] configure gpio_configure[35][12:8] 2600_00b1
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64 GPIO[35] configure gpio_configure[35][7:0] 2600_00b0
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65 GPIO[36] configure gpio_configure[36][12:8] 2600_00b5
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66 GPIO[36] configure gpio_configure[36][7:0] 2600_00b4
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67 GPIO[37] configure gpio_configure[37][12:8] 2600_00b9
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68 GPIO[37] configure gpio_configure[37][7:0] 2600_00b8
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69 GPIO data mgmt_gpio_in[37:32] 2600_0010
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6a GPIO data mgmt_gpio_in[31:24] 2600_000f
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6b GPIO data mgmt_gpio_in[23:16] 2600_000e
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6c GPIO data mgmt_gpio_in[15:8] 2600_000d
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6d GPIO data mgmt_gpio_in[7:0] 2600_000c
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6e Power control pwr_ctrl_out[3:0] 2600_0004
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6f HK SPI disable hkspi_disable 2620_0010
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================ =========================== ============================== =======================
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