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caravel/signoff/gpio_control_block/openlane-signoff/39-gpio_control_block.lvs.l...

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Caravel redesign new top (#300) * reharden: caravel ~ shift caravel_clocking due to change in size ~ change the pr boundary of caravel_power_routing mag file ~ regenarate lef of caravel_power_routing * update pdn for `caravel_clocking` & `digital_pll` * added script to update and generate the power routing views * ~ run update_power_routing_views from the caravel root with prboundary * fix output message * added power routing lef, mag and gds * fix update_power_routing_views saving wrong cell name * reharden: caravel ~ incorperate pdn changes ~ re-extract spefs * fix caravel_power_routing views * fix abs path in maglef views * fix abs path in mag views add substcut layers in gpio_control_block and mgmt_protect * generate a new chip_io gds * regenerate gpio_control_block due to mag and gds not in sync * reharden: caravel ~ change config to pass clean routing ~ use updated views of macros * lvs clean views * add caravel top-level generated sdf for all corners * fix absolute path for mgmt_core_wrapper Co-authored-by: kareem <kareem.farid@efabless.com> Co-authored-by: Bassant Hassan <bassant.hassan@efabless.com>
2022-10-18 19:24:07 -05:00
LVS reports no net, device, pin, or property mismatches.
Total errors = 0