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Caravan top lvs (#67) * - update caravan configuration * change correct gpio_default blocks instance names * implement powerrouting work around * place spare logic blocks * keep the history of runs and sym link last/final one * - update caravan mag, def and gl views - add fake power routing cell in the rtl as a placeholder for openlane to prevent routing on that cell - fix some syntax errors in chip_io_alt - match simple_por lef pins with mag by regenerating it * Apply automatic changes to Manifest and README.rst * add caravan power routing lef * - update mag and def view of caravan - add_macro_placement for fake cell * Added back the power routing to Caravan, fixed DRC errors, ran LVS, corrected placement of isolated substrate regions, and replaced the signal routing for the analog lines. Be aware that merging with main may cause issues with the mgmt_protect.mag file and its subcells mprj2_logic_high.mag and mprj_logic_high.mag. It may be worth cherry-picking the files to merge and exclude those layouts. Co-authored-by: kareem <kareem.farid@efabless.com> Co-authored-by: kareefardi <kareefardi@users.noreply.github.com> Co-authored-by: Jeff DiCorpo <42048757+jeffdi@users.noreply.github.com>
2022-04-14 17:05:16 -05:00
magic
tech sky130A
magscale 1 2
Caravan redesign (#321) * Fixed caravan top level power routing and updated views for mag, gds and lef * caravan(rtl): updates ~ typos fix - remove unused pin in chip_io_alt + add caravan_power_routing verilog * Apply automatic changes to Manifest and README.rst * ~ update caravan openlane configs to add extra cell references ~ correct placment and cell names of some macro in caravan interactive script * reharden: caravan + add non functional blocks + add an initial iteration of caravan * Apply automatic changes to Manifest and README.rst * Revert "Fixed caravan top level power routing and updated views for mag, gds and lef" This reverts commit 70628f748af35aaeae06829b05b2c28a49648fc2. * fixed caravan top level power routing * reharden: caravan based on new power routing ~ guard rtl chip_io power pins in the power macro guard * Apply automatic changes to Manifest and README.rst * fixed caravan top level power routing * rehadren: caravan + add caravan signal routing to openlane run ~ change rtl to guard power and analog against routing by openlane by ifndef TOP_ROUTING ~ add pr bounadry for caravan signal routing to fix origin issues * Apply automatic changes to Manifest and README.rst * fix power connection in buffering block and regenerate gl * Apply automatic changes to Manifest and README.rst * updated views for caravan * Added extract unique to lvs-gds-cell target. (#313) * This fixes errors in the top level RTL of caravan that failed to hook up the buffers through the SoC correctly. * Apply automatic changes to Manifest and README.rst * reharden: caravan ~ rtl updated * fixed caravan mag top level * updated views for caravan + signoff * fixed top level cell name * fix syntax error related to signal initialization place in caravan (#319) * fix syntax error related to signal initialization place in caravan- fixed in caravel in another commit * Apply automatic changes to Manifest and README.rst Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com> * Apply automatic changes to Manifest and README.rst Co-authored-by: Marwan Abbas <marwaneltoukhy@aucegypt.edu> Co-authored-by: kareem <kareem.farid@efabless.com> Co-authored-by: kareefardi <kareefardi@users.noreply.github.com> Co-authored-by: Mitch Bailey <d-m-bailey@users.noreply.github.com> Co-authored-by: Tim Edwards <tim@opencircuitdesign.com> Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com> Co-authored-by: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Co-authored-by: M0stafaRady <107422726+M0stafaRady@users.noreply.github.com> Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com> Co-authored-by: jeffdi <jeffdi@users.noreply.github.com>
2022-10-21 09:37:41 -05:00
timestamp 1666277172
Caravan top lvs (#67) * - update caravan configuration * change correct gpio_default blocks instance names * implement powerrouting work around * place spare logic blocks * keep the history of runs and sym link last/final one * - update caravan mag, def and gl views - add fake power routing cell in the rtl as a placeholder for openlane to prevent routing on that cell - fix some syntax errors in chip_io_alt - match simple_por lef pins with mag by regenerating it * Apply automatic changes to Manifest and README.rst * add caravan power routing lef * - update mag and def view of caravan - add_macro_placement for fake cell * Added back the power routing to Caravan, fixed DRC errors, ran LVS, corrected placement of isolated substrate regions, and replaced the signal routing for the analog lines. Be aware that merging with main may cause issues with the mgmt_protect.mag file and its subcells mprj2_logic_high.mag and mprj_logic_high.mag. It may be worth cherry-picking the files to merge and exclude those layouts. Co-authored-by: kareem <kareem.farid@efabless.com> Co-authored-by: kareefardi <kareefardi@users.noreply.github.com> Co-authored-by: Jeff DiCorpo <42048757+jeffdi@users.noreply.github.com>
2022-04-14 17:05:16 -05:00
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Caravan redesign (#321) * Fixed caravan top level power routing and updated views for mag, gds and lef * caravan(rtl): updates ~ typos fix - remove unused pin in chip_io_alt + add caravan_power_routing verilog * Apply automatic changes to Manifest and README.rst * ~ update caravan openlane configs to add extra cell references ~ correct placment and cell names of some macro in caravan interactive script * reharden: caravan + add non functional blocks + add an initial iteration of caravan * Apply automatic changes to Manifest and README.rst * Revert "Fixed caravan top level power routing and updated views for mag, gds and lef" This reverts commit 70628f748af35aaeae06829b05b2c28a49648fc2. * fixed caravan top level power routing * reharden: caravan based on new power routing ~ guard rtl chip_io power pins in the power macro guard * Apply automatic changes to Manifest and README.rst * fixed caravan top level power routing * rehadren: caravan + add caravan signal routing to openlane run ~ change rtl to guard power and analog against routing by openlane by ifndef TOP_ROUTING ~ add pr bounadry for caravan signal routing to fix origin issues * Apply automatic changes to Manifest and README.rst * fix power connection in buffering block and regenerate gl * Apply automatic changes to Manifest and README.rst * updated views for caravan * Added extract unique to lvs-gds-cell target. (#313) * This fixes errors in the top level RTL of caravan that failed to hook up the buffers through the SoC correctly. * Apply automatic changes to Manifest and README.rst * reharden: caravan ~ rtl updated * fixed caravan mag top level * updated views for caravan + signoff * fixed top level cell name * fix syntax error related to signal initialization place in caravan (#319) * fix syntax error related to signal initialization place in caravan- fixed in caravel in another commit * Apply automatic changes to Manifest and README.rst Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com> * Apply automatic changes to Manifest and README.rst Co-authored-by: Marwan Abbas <marwaneltoukhy@aucegypt.edu> Co-authored-by: kareem <kareem.farid@efabless.com> Co-authored-by: kareefardi <kareefardi@users.noreply.github.com> Co-authored-by: Mitch Bailey <d-m-bailey@users.noreply.github.com> Co-authored-by: Tim Edwards <tim@opencircuitdesign.com> Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com> Co-authored-by: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Co-authored-by: M0stafaRady <107422726+M0stafaRady@users.noreply.github.com> Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com> Co-authored-by: jeffdi <jeffdi@users.noreply.github.com>
2022-10-21 09:37:41 -05:00
<< properties >>
string FIXED_BBOX 0 0 717600 1037600
Caravan top lvs (#67) * - update caravan configuration * change correct gpio_default blocks instance names * implement powerrouting work around * place spare logic blocks * keep the history of runs and sym link last/final one * - update caravan mag, def and gl views - add fake power routing cell in the rtl as a placeholder for openlane to prevent routing on that cell - fix some syntax errors in chip_io_alt - match simple_por lef pins with mag by regenerating it * Apply automatic changes to Manifest and README.rst * add caravan power routing lef * - update mag and def view of caravan - add_macro_placement for fake cell * Added back the power routing to Caravan, fixed DRC errors, ran LVS, corrected placement of isolated substrate regions, and replaced the signal routing for the analog lines. Be aware that merging with main may cause issues with the mgmt_protect.mag file and its subcells mprj2_logic_high.mag and mprj_logic_high.mag. It may be worth cherry-picking the files to merge and exclude those layouts. Co-authored-by: kareem <kareem.farid@efabless.com> Co-authored-by: kareefardi <kareefardi@users.noreply.github.com> Co-authored-by: Jeff DiCorpo <42048757+jeffdi@users.noreply.github.com>
2022-04-14 17:05:16 -05:00
<< end >>