mirror of https://github.com/efabless/caravel.git
35 lines
1.4 KiB
Plaintext
35 lines
1.4 KiB
Plaintext
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Caravel Power control
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----------------------------
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The user project power control register is a "reserved" register that is
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intended for future use with on-chip LDOs to power the user project
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area. In the current version of the Caravel chip, it has no function.
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In the current version of the Caravel chip, all user area power supplies
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are provided by voltage regulators on the demonstration/development
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board.
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The usable ranges of these power supplies is:
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user1 vccd (VCCD1) = 1.8V
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user2 vccd (VCCD2) = 1.8V
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user1 vdda (VDDA1) = 1.8V to 5.5V (nominally 3.3V)
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user2 vdda (VDDA2) = 1.8V to 5.5V (nominally 3.3V)
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It is the responsibility of the user project area designer to ensure that
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the value of VDDA1 and VDDA2 is compatible with the circuitry connected
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to it in the user project.
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--------------------------------------------------------------------------
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Register name = reg_mprj_pwr
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Memory location = 0x26000004
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Housekeeping SPI location = 0x6e
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+------+-------+-------+-------+-------+-------+-------+-------+-------+
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| | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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+------+-------+-------+-------+-------+-------+-------+-------+-------+
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| 0x6e | | | | | user1 | user2 | user1 | user2 |
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| | | | | | vccd | vccd | vdda | vdda |
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+------+-------+-------+-------+-------+-------+-------+-------+-------+
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